drivers/usb/host/xhci-hub.c

   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/gfp.h>
  24 #include <asm/unaligned.h>
  25
  26 #include "xhci.h"
  27
  28 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
  29 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
  30                          PORT_RC | PORT_PLC | PORT_PE)
  31
  32 /* usb 1.1 root hub device descriptor */
  33 static u8 usb_bos_descriptor [] = {
  34         USB_DT_BOS_SIZE,                /*  __u8 bLength, 5 bytes */
  35         USB_DT_BOS,                     /*  __u8 bDescriptorType */
  36         0x0F, 0x00,                     /*  __le16 wTotalLength, 15 bytes */
  37         0x1,                            /*  __u8 bNumDeviceCaps */
  38         /* First device capability */
  39         USB_DT_USB_SS_CAP_SIZE,         /*  __u8 bLength, 10 bytes */
  40         USB_DT_DEVICE_CAPABILITY,       /* Device Capability */
  41         USB_SS_CAP_TYPE,                /* bDevCapabilityType, SUPERSPEED_USB */
  42         0x00,                           /* bmAttributes, LTM off by default */
  43         USB_5GBPS_OPERATION, 0x00,      /* wSpeedsSupported, 5Gbps only */
  44         0x03,                           /* bFunctionalitySupport,
  45                                            USB 3.0 speed only */
  46         0x00,                           /* bU1DevExitLat, set later. */
  47         0x00, 0x00                      /* __le16 bU2DevExitLat, set later. */
  48 };
  49
  50
  51 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
  52                 struct usb_hub_descriptor *desc, int ports)
  53 {
  54         u16 temp;
  55
  56         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
  57         desc->bHubContrCurrent = 0;
  58
  59         desc->bNbrPorts = ports;
  60         /* Ugh, these should be #defines, FIXME */
  61         /* Using table 11-13 in USB 2.0 spec. */
  62         temp = 0;
  63         /* Bits 1:0 - support port power switching, or power always on */
  64         if (HCC_PPC(xhci->hcc_params))
  65                 temp |= 0x0001;
  66         else
  67                 temp |= 0x0002;
  68         /* Bit  2 - root hubs are not part of a compound device */
  69         /* Bits 4:3 - individual port over current protection */
  70         temp |= 0x0008;
  71         /* Bits 6:5 - no TTs in root ports */
  72         /* Bit  7 - no port indicators */
  73         desc->wHubCharacteristics = cpu_to_le16(temp);
  74 }
  75
  76 /* Fill in the USB 2.0 roothub descriptor */
  77 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
  78                 struct usb_hub_descriptor *desc)
  79 {
  80         int ports;
  81         u16 temp;
  82         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
  83         u32 portsc;
  84         unsigned int i;
  85
  86         ports = xhci->num_usb2_ports;
  87
  88         xhci_common_hub_descriptor(xhci, desc, ports);
  89         desc->bDescriptorType = 0x29;
  90         temp = 1 + (ports / 8);
  91         desc->bDescLength = 7 + 2 * temp;
  92
  93         /* The Device Removable bits are reported on a byte granularity.
  94          * If the port doesn't exist within that byte, the bit is set to 0.
  95          */
  96         memset(port_removable, 0, sizeof(port_removable));
  97         for (i = 0; i < ports; i++) {
  98                 portsc = xhci_readl(xhci, xhci->usb2_ports[i]);
  99                 /* If a device is removable, PORTSC reports a 0, same as in the
 100                  * hub descriptor DeviceRemovable bits.
 101                  */
 102                 if (portsc & PORT_DEV_REMOVE)
 103                         /* This math is hairy because bit 0 of DeviceRemovable
 104                          * is reserved, and bit 1 is for port 1, etc.
 105                          */
 106                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
 107         }
 108
 109         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
 110          * ports on it.  The USB 2.0 specification says that there are two
 111          * variable length fields at the end of the hub descriptor:
 112          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
 113          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
 114          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
 115          * 0xFF, so we initialize the both arrays (DeviceRemovable and
 116          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
 117          * set of ports that actually exist.
 118          */
 119         memset(desc->u.hs.DeviceRemovable, 0xff,
 120                         sizeof(desc->u.hs.DeviceRemovable));
 121         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
 122                         sizeof(desc->u.hs.PortPwrCtrlMask));
 123
 124         for (i = 0; i < (ports + 1 + 7) / 8; i++)
 125                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
 126                                 sizeof(__u8));
 127 }
 128
 129 /* Fill in the USB 3.0 roothub descriptor */
 130 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 131                 struct usb_hub_descriptor *desc)
 132 {
 133         int ports;
 134         u16 port_removable;
 135         u32 portsc;
 136         unsigned int i;
 137
 138         ports = xhci->num_usb3_ports;
 139         xhci_common_hub_descriptor(xhci, desc, ports);
 140         desc->bDescriptorType = 0x2a;
 141         desc->bDescLength = 12;
 142
 143         /* header decode latency should be zero for roothubs,
 144          * see section 4.23.5.2.
 145          */
 146         desc->u.ss.bHubHdrDecLat = 0;
 147         desc->u.ss.wHubDelay = 0;
 148
 149         port_removable = 0;
 150         /* bit 0 is reserved, bit 1 is for port 1, etc. */
 151         for (i = 0; i < ports; i++) {
 152                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
 153                 if (portsc & PORT_DEV_REMOVE)
 154                         port_removable |= 1 << (i + 1);
 155         }
 156         memset(&desc->u.ss.DeviceRemovable,
 157                         (__force __u16) cpu_to_le16(port_removable),
 158                         sizeof(__u16));
 159 }
 160
 161 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 162                 struct usb_hub_descriptor *desc)
 163 {
 164
 165         if (hcd->speed == HCD_USB3)
 166                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
 167         else
 168                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
 169
 170 }
 171
 172 static unsigned int xhci_port_speed(unsigned int port_status)
 173 {
 174         if (DEV_LOWSPEED(port_status))
 175                 return USB_PORT_STAT_LOW_SPEED;
 176         if (DEV_HIGHSPEED(port_status))
 177                 return USB_PORT_STAT_HIGH_SPEED;
 178         /*
 179          * FIXME: Yes, we should check for full speed, but the core uses that as
 180          * a default in portspeed() in usb/core/hub.c (which is the only place
 181          * USB_PORT_STAT_*_SPEED is used).
 182          */
 183         return 0;
 184 }
 185
 186 /*
 187  * These bits are Read Only (RO) and should be saved and written to the
 188  * registers: 0, 3, 10:13, 30
 189  * connect status, over-current status, port speed, and device removable.
 190  * connect status and port speed are also sticky - meaning they're in
 191  * the AUX well and they aren't changed by a hot, warm, or cold reset.
 192  */
 193 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
 194 /*
 195  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
 196  * bits 5:8, 9, 14:15, 25:27
 197  * link state, port power, port indicator state, "wake on" enable state
 198  */
 199 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
 200 /*
 201  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
 202  * bit 4 (port reset)
 203  */
 204 #define XHCI_PORT_RW1S  ((1<<4))
 205 /*
 206  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
 207  * bits 1, 17, 18, 19, 20, 21, 22, 23
 208  * port enable/disable, and
 209  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
 210  * over-current, reset, link state, and L1 change
 211  */
 212 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
 213 /*
 214  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
 215  * latched in
 216  */
 217 #define XHCI_PORT_RW    ((1<<16))
 218 /*
 219  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
 220  * bits 2, 24, 28:31
 221  */
 222 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
 223
 224 /*
 225  * Given a port state, this function returns a value that would result in the
 226  * port being in the same state, if the value was written to the port status
 227  * control register.
 228  * Save Read Only (RO) bits and save read/write bits where
 229  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
 230  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
 231  */
 232 u32 xhci_port_state_to_neutral(u32 state)
 233 {
 234         /* Save read-only status and port state */
 235         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
 236 }
 237
 238 /*
 239  * find slot id based on port number.
 240  * @port: The one-based port number from one of the two split roothubs.
 241  */
 242 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 243                 u16 port)
 244 {
 245         int slot_id;
 246         int i;
 247         enum usb_device_speed speed;
 248
 249         slot_id = 0;
 250         for (i = 0; i < MAX_HC_SLOTS; i++) {
 251                 if (!xhci->devs[i])
 252                         continue;
 253                 speed = xhci->devs[i]->udev->speed;
 254                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
 255                                 && xhci->devs[i]->fake_port == port) {
 256                         slot_id = i;
 257                         break;
 258                 }
 259         }
 260
 261         return slot_id;
 262 }
 263
 264 /*
 265  * Stop device
 266  * It issues stop endpoint command for EP 0 to 30. And wait the last command
 267  * to complete.
 268  * suspend will set to 1, if suspend bit need to set in command.
 269  */
 270 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
 271 {
 272         struct xhci_virt_device *virt_dev;
 273         struct xhci_command *cmd;
 274         unsigned long flags;
 275         int timeleft;
 276         int ret;
 277         int i;
 278
 279         ret = 0;
 280         virt_dev = xhci->devs[slot_id];
 281         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
 282         if (!cmd) {
 283                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
 284                 return -ENOMEM;
 285         }
 286
 287         spin_lock_irqsave(&xhci->lock, flags);
 288         for (i = LAST_EP_INDEX; i > 0; i--) {
 289                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
 290                         xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
 291         }
 292         cmd->command_trb = xhci->cmd_ring->enqueue;
 293         list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
 294         xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
 295         xhci_ring_cmd_db(xhci);
 296         spin_unlock_irqrestore(&xhci->lock, flags);
 297
 298         /* Wait for last stop endpoint command to finish */
 299         timeleft = wait_for_completion_interruptible_timeout(
 300                         cmd->completion,
 301                         USB_CTRL_SET_TIMEOUT);
 302         if (timeleft <= 0) {
 303                 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
 304                                 timeleft == 0 ? "Timeout" : "Signal");
 305                 spin_lock_irqsave(&xhci->lock, flags);
 306                 /* The timeout might have raced with the event ring handler, so
 307                  * only delete from the list if the item isn't poisoned.
 308                  */
 309                 if (cmd->cmd_list.next != LIST_POISON1)
 310                         list_del(&cmd->cmd_list);
 311                 spin_unlock_irqrestore(&xhci->lock, flags);
 312                 ret = -ETIME;
 313                 goto command_cleanup;
 314         }
 315
 316 command_cleanup:
 317         xhci_free_command(xhci, cmd);
 318         return ret;
 319 }
 320
 321 /*
 322  * Ring device, it rings the all doorbells unconditionally.
 323  */
 324 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
 325 {
 326         int i;
 327
 328         for (i = 0; i < LAST_EP_INDEX + 1; i++)
 329                 if (xhci->devs[slot_id]->eps[i].ring &&
 330                     xhci->devs[slot_id]->eps[i].ring->dequeue)
 331                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
 332
 333         return;
 334 }
 335
 336 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 337                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 338 {
 339         /* Don't allow the USB core to disable SuperSpeed ports. */
 340         if (hcd->speed == HCD_USB3) {
 341                 xhci_dbg(xhci, "Ignoring request to disable "
 342                                 "SuperSpeed port.\n");
 343                 return;
 344         }
 345
 346         /* Write 1 to disable the port */
 347         xhci_writel(xhci, port_status | PORT_PE, addr);
 348         port_status = xhci_readl(xhci, addr);
 349         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
 350                         wIndex, port_status);
 351 }
 352
 353 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
 354                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 355 {
 356         char *port_change_bit;
 357         u32 status;
 358
 359         switch (wValue) {
 360         case USB_PORT_FEAT_C_RESET:
 361                 status = PORT_RC;
 362                 port_change_bit = "reset";
 363                 break;
 364         case USB_PORT_FEAT_C_BH_PORT_RESET:
 365                 status = PORT_WRC;
 366                 port_change_bit = "warm(BH) reset";
 367                 break;
 368         case USB_PORT_FEAT_C_CONNECTION:
 369                 status = PORT_CSC;
 370                 port_change_bit = "connect";
 371                 break;
 372         case USB_PORT_FEAT_C_OVER_CURRENT:
 373                 status = PORT_OCC;
 374                 port_change_bit = "over-current";
 375                 break;
 376         case USB_PORT_FEAT_C_ENABLE:
 377                 status = PORT_PEC;
 378                 port_change_bit = "enable/disable";
 379                 break;
 380         case USB_PORT_FEAT_C_SUSPEND:
 381                 status = PORT_PLC;
 382                 port_change_bit = "suspend/resume";
 383                 break;
 384         case USB_PORT_FEAT_C_PORT_LINK_STATE:
 385                 status = PORT_PLC;
 386                 port_change_bit = "link state";
 387                 break;
 388         case USB_PORT_FEAT_C_PORT_CONFIG_ERROR:
 389                 status = PORT_CEC;
 390                 port_change_bit = "config error";
 391                 break;
 392         default:
 393                 /* Should never happen */
 394                 return;
 395         }
 396         /* Change bits are all write 1 to clear */
 397         xhci_writel(xhci, port_status | status, addr);
 398         port_status = xhci_readl(xhci, addr);
 399         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
 400                         port_change_bit, wIndex, port_status);
 401 }
 402
 403 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
 404 {
 405         int max_ports;
 406         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 407
 408         if (hcd->speed == HCD_USB3) {
 409                 max_ports = xhci->num_usb3_ports;
 410                 *port_array = xhci->usb3_ports;
 411         } else {
 412                 max_ports = xhci->num_usb2_ports;
 413                 *port_array = xhci->usb2_ports;
 414         }
 415
 416         return max_ports;
 417 }
 418
 419 void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 420                                 int port_id, u32 link_state)
 421 {
 422         u32 temp;
 423
 424         temp = xhci_readl(xhci, port_array[port_id]);
 425         temp = xhci_port_state_to_neutral(temp);
 426         temp &= ~PORT_PLS_MASK;
 427         temp |= PORT_LINK_STROBE | link_state;
 428         xhci_writel(xhci, temp, port_array[port_id]);
 429 }
 430
 431 /* Test and clear port RWC bit */
 432 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 433                                 int port_id, u32 port_bit)
 434 {
 435         u32 temp;
 436
 437         temp = xhci_readl(xhci, port_array[port_id]);
 438         if (temp & port_bit) {
 439                 temp = xhci_port_state_to_neutral(temp);
 440                 temp |= port_bit;
 441                 xhci_writel(xhci, temp, port_array[port_id]);
 442         }
 443 }
 444
 445 /* Updates Link Status for super Speed port */
 446 static void xhci_hub_report_link_state(struct xhci_hcd *xhci,
 447                 u32 *status, u32 status_reg)
 448 {
 449         u32 pls = status_reg & PORT_PLS_MASK;
 450
 451         /* resume state is a xHCI internal state.
 452          * Do not report it to usb core, instead, pretend to be U3,
 453          * thus usb core knows it's not ready for transfer
 454          */
 455         if (pls == XDEV_RESUME) {
 456                 *status |= USB_SS_PORT_LS_U3;
 457                 return;
 458         }
 459
 460         /* When the CAS bit is set then warm reset
 461          * should be performed on port
 462          */
 463         if (status_reg & PORT_CAS) {
 464                 /* The CAS bit can be set while the port is
 465                  * in any link state.
 466                  * Only roothubs have CAS bit, so we
 467                  * pretend to be in compliance mode
 468                  * unless we're already in compliance
 469                  * or the inactive state.
 470                  */
 471                 if (pls != USB_SS_PORT_LS_COMP_MOD &&
 472                     pls != USB_SS_PORT_LS_SS_INACTIVE) {
 473                         pls = USB_SS_PORT_LS_COMP_MOD;
 474                 }
 475                 /* Return also connection bit -
 476                  * hub state machine resets port
 477                  * when this bit is set.
 478                  */
 479                 pls |= USB_PORT_STAT_CONNECTION;
 480         } else {
 481                 /*
 482                  * If CAS bit isn't set but the Port is already at
 483                  * Compliance Mode, fake a connection so the USB core
 484                  * notices the Compliance state and resets the port.
 485                  * This resolves an issue generated by the SN65LVPE502CP
 486                  * in which sometimes the port enters compliance mode
 487                  * caused by a delay on the host-device negotiation.
 488                  */
 489                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
 490                                 (pls == USB_SS_PORT_LS_COMP_MOD))
 491                         pls |= USB_PORT_STAT_CONNECTION;
 492         }
 493
 494         /* update status field */
 495         *status |= pls;
 496 }
 497
 498 /*
 499  * Function for Compliance Mode Quirk.
 500  *
 501  * This Function verifies if all xhc USB3 ports have entered U0, if so,
 502  * the compliance mode timer is deleted. A port won't enter
 503  * compliance mode if it has previously entered U0.
 504  */
 505 void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status, u16 wIndex)
 506 {
 507         u32 all_ports_seen_u0 = ((1 << xhci->num_usb3_ports)-1);
 508         bool port_in_u0 = ((status & PORT_PLS_MASK) == XDEV_U0);
 509
 510         if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK))
 511                 return;
 512
 513         if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) {
 514                 xhci->port_status_u0 |= 1 << wIndex;
 515                 if (xhci->port_status_u0 == all_ports_seen_u0) {
 516                         del_timer_sync(&xhci->comp_mode_recovery_timer);
 517                         xhci_dbg(xhci, "All USB3 ports have entered U0 already!\n");
 518                         xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted.\n");
 519                 }
 520         }
 521 }
 522
 523 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 524                 u16 wIndex, char *buf, u16 wLength)
 525 {
 526         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 527         int max_ports;
 528         unsigned long flags;
 529         u32 temp, status;
 530         int retval = 0;
 531         __le32 __iomem **port_array;
 532         int slot_id;
 533         struct xhci_bus_state *bus_state;
 534         u16 link_state = 0;
 535
 536         max_ports = xhci_get_ports(hcd, &port_array);
 537         bus_state = &xhci->bus_state[hcd_index(hcd)];
 538
 539         spin_lock_irqsave(&xhci->lock, flags);
 540         switch (typeReq) {
 541         case GetHubStatus:
 542                 /* No power source, over-current reported per port */
 543                 memset(buf, 0, 4);
 544                 break;
 545         case GetHubDescriptor:
 546                 /* Check to make sure userspace is asking for the USB 3.0 hub
 547                  * descriptor for the USB 3.0 roothub.  If not, we stall the
 548                  * endpoint, like external hubs do.
 549                  */
 550                 if (hcd->speed == HCD_USB3 &&
 551                                 (wLength < USB_DT_SS_HUB_SIZE ||
 552                                  wValue != (USB_DT_SS_HUB << 8))) {
 553                         xhci_dbg(xhci, "Wrong hub descriptor type for "
 554                                         "USB 3.0 roothub.\n");
 555                         goto error;
 556                 }
 557                 xhci_hub_descriptor(hcd, xhci,
 558                                 (struct usb_hub_descriptor *) buf);
 559                 break;
 560         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 561                 if ((wValue & 0xff00) != (USB_DT_BOS << 8))
 562                         goto error;
 563
 564                 if (hcd->speed != HCD_USB3)
 565                         goto error;
 566
 567                 memcpy(buf, &usb_bos_descriptor,
 568                                 USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);
 569                 temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
 570                 buf[12] = HCS_U1_LATENCY(temp);
 571                 put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
 572
 573                 spin_unlock_irqrestore(&xhci->lock, flags);
 574                 return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;
 575         case GetPortStatus:
 576                 if (!wIndex || wIndex > max_ports)
 577                         goto error;
 578                 wIndex--;
 579                 status = 0;
 580                 temp = xhci_readl(xhci, port_array[wIndex]);
 581                 if (temp == 0xffffffff) {
 582                         retval = -ENODEV;
 583                         break;
 584                 }
 585                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
 586
 587                 /* wPortChange bits */
 588                 if (temp & PORT_CSC)
 589                         status |= USB_PORT_STAT_C_CONNECTION << 16;
 590                 if (temp & PORT_PEC)
 591                         status |= USB_PORT_STAT_C_ENABLE << 16;
 592                 if ((temp & PORT_OCC))
 593                         status |= USB_PORT_STAT_C_OVERCURRENT << 16;
 594                 if ((temp & PORT_RC))
 595                         status |= USB_PORT_STAT_C_RESET << 16;
 596                 /* USB3.0 only */
 597                 if (hcd->speed == HCD_USB3) {
 598                         /* Port link change with port in resume state should not be
 599                          * reported to usbcore, as this is an internal state to be
 600                          * handled by xhci driver. Reporting PLC to usbcore may
 601                          * cause usbcore clearing PLC first and port change event
 602                          * irq won't be generated.
 603                          */
 604                         if ((temp & PORT_PLC) &&
 605                                 (temp & PORT_PLS_MASK) != XDEV_RESUME)
 606                                 status |= USB_PORT_STAT_C_LINK_STATE << 16;
 607                         if ((temp & PORT_WRC))
 608                                 status |= USB_PORT_STAT_C_BH_RESET << 16;
 609                         if ((temp & PORT_CEC))
 610                                 status |= USB_PORT_STAT_C_CONFIG_ERROR << 16;
 611                 }
 612
 613                 if (hcd->speed != HCD_USB3) {
 614                         if ((temp & PORT_PLS_MASK) == XDEV_U3
 615                                         && (temp & PORT_POWER))
 616                                 status |= USB_PORT_STAT_SUSPEND;
 617                 }
 618                 if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
 619                                 !DEV_SUPERSPEED(temp)) {
 620                         if ((temp & PORT_RESET) || !(temp & PORT_PE))
 621                                 goto error;
 622                         if (time_after_eq(jiffies,
 623                                         bus_state->resume_done[wIndex])) {
 624                                 xhci_dbg(xhci, "Resume USB2 port %d\n",
 625                                         wIndex + 1);
 626                                 bus_state->resume_done[wIndex] = 0;
 627                                 xhci_set_link_state(xhci, port_array, wIndex,
 628                                                         XDEV_U0);
 629                                 xhci_dbg(xhci, "set port %d resume\n",
 630                                         wIndex + 1);
 631                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 632                                                                  wIndex + 1);
 633                                 if (!slot_id) {
 634                                         xhci_dbg(xhci, "slot_id is zero\n");
 635                                         goto error;
 636                                 }
 637                                 xhci_ring_device(xhci, slot_id);
 638                                 bus_state->port_c_suspend |= 1 << wIndex;
 639                                 bus_state->suspended_ports &= ~(1 << wIndex);
 640                         } else {
 641                                 /*
 642                                  * The resume has been signaling for less than
 643                                  * 20ms. Report the port status as SUSPEND,
 644                                  * let the usbcore check port status again
 645                                  * and clear resume signaling later.
 646                                  */
 647                                 status |= USB_PORT_STAT_SUSPEND;
 648                         }
 649                 }
 650                 if ((temp & PORT_PLS_MASK) == XDEV_U0
 651                         && (temp & PORT_POWER)
 652                         && (bus_state->suspended_ports & (1 << wIndex))) {
 653                         bus_state->suspended_ports &= ~(1 << wIndex);
 654                         if (hcd->speed != HCD_USB3)
 655                                 bus_state->port_c_suspend |= 1 << wIndex;
 656                 }
 657                 if (temp & PORT_CONNECT) {
 658                         status |= USB_PORT_STAT_CONNECTION;
 659                         status |= xhci_port_speed(temp);
 660                 }
 661                 if (temp & PORT_PE)
 662                         status |= USB_PORT_STAT_ENABLE;
 663                 if (temp & PORT_OC)
 664                         status |= USB_PORT_STAT_OVERCURRENT;
 665                 if (temp & PORT_RESET)
 666                         status |= USB_PORT_STAT_RESET;
 667                 if (temp & PORT_POWER) {
 668                         if (hcd->speed == HCD_USB3)
 669                                 status |= USB_SS_PORT_STAT_POWER;
 670                         else
 671                                 status |= USB_PORT_STAT_POWER;
 672                 }
 673                 /* Update Port Link State for super speed ports*/
 674                 if (hcd->speed == HCD_USB3) {
 675                         xhci_hub_report_link_state(xhci, &status, temp);
 676                         /*
 677                          * Verify if all USB3 Ports Have entered U0 already.
 678                          * Delete Compliance Mode Timer if so.
 679                          */
 680                         xhci_del_comp_mod_timer(xhci, temp, wIndex);
 681                 }
 682                 if (bus_state->port_c_suspend & (1 << wIndex))
 683                         status |= 1 << USB_PORT_FEAT_C_SUSPEND;
 684                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
 685                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
 686                 break;
 687         case SetPortFeature:
 688                 if (wValue == USB_PORT_FEAT_LINK_STATE)
 689                         link_state = (wIndex & 0xff00) >> 3;
 690                 wIndex &= 0xff;
 691                 if (!wIndex || wIndex > max_ports)
 692                         goto error;
 693                 wIndex--;
 694                 temp = xhci_readl(xhci, port_array[wIndex]);
 695                 if (temp == 0xffffffff) {
 696                         retval = -ENODEV;
 697                         break;
 698                 }
 699                 temp = xhci_port_state_to_neutral(temp);
 700                 /* FIXME: What new port features do we need to support? */
 701                 switch (wValue) {
 702                 case USB_PORT_FEAT_SUSPEND:
 703                         temp = xhci_readl(xhci, port_array[wIndex]);
 704                         if ((temp & PORT_PLS_MASK) != XDEV_U0) {
 705                                 /* Resume the port to U0 first */
 706                                 xhci_set_link_state(xhci, port_array, wIndex,
 707                                                         XDEV_U0);
 708                                 spin_unlock_irqrestore(&xhci->lock, flags);
 709                                 msleep(10);
 710                                 spin_lock_irqsave(&xhci->lock, flags);
 711                         }
 712                         /* In spec software should not attempt to suspend
 713                          * a port unless the port reports that it is in the
 714                          * enabled (PED = ‘1’,PLS < ‘3’) state.
 715                          */
 716                         temp = xhci_readl(xhci, port_array[wIndex]);
 717                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
 718                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
 719                                 xhci_warn(xhci, "USB core suspending device "
 720                                           "not in U0/U1/U2.\n");
 721                                 goto error;
 722                         }
 723
 724                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 725                                         wIndex + 1);
 726                         if (!slot_id) {
 727                                 xhci_warn(xhci, "slot_id is zero\n");
 728                                 goto error;
 729                         }
 730                         /* unlock to execute stop endpoint commands */
 731                         spin_unlock_irqrestore(&xhci->lock, flags);
 732                         xhci_stop_device(xhci, slot_id, 1);
 733                         spin_lock_irqsave(&xhci->lock, flags);
 734
 735                         xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3);
 736
 737                         spin_unlock_irqrestore(&xhci->lock, flags);
 738                         msleep(10); /* wait device to enter */
 739                         spin_lock_irqsave(&xhci->lock, flags);
 740
 741                         temp = xhci_readl(xhci, port_array[wIndex]);
 742                         bus_state->suspended_ports |= 1 << wIndex;
 743                         break;
 744                 case USB_PORT_FEAT_LINK_STATE:
 745                         temp = xhci_readl(xhci, port_array[wIndex]);
 746
 747                         /* Disable port */
 748                         if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
 749                                 xhci_dbg(xhci, "Disable port %d\n", wIndex);
 750                                 temp = xhci_port_state_to_neutral(temp);
 751                                 /*
 752                                  * Clear all change bits, so that we get a new
 753                                  * connection event.
 754                                  */
 755                                 temp |= PORT_CSC | PORT_PEC | PORT_WRC |
 756                                         PORT_OCC | PORT_RC | PORT_PLC |
 757                                         PORT_CEC;
 758                                 xhci_writel(xhci, temp | PORT_PE,
 759                                         port_array[wIndex]);
 760                                 temp = xhci_readl(xhci, port_array[wIndex]);
 761                                 break;
 762                         }
 763
 764                         /* Put link in RxDetect (enable port) */
 765                         if (link_state == USB_SS_PORT_LS_RX_DETECT) {
 766                                 xhci_dbg(xhci, "Enable port %d\n", wIndex);
 767                                 xhci_set_link_state(xhci, port_array, wIndex,
 768                                                 link_state);
 769                                 temp = xhci_readl(xhci, port_array[wIndex]);
 770                                 break;
 771                         }
 772
 773                         /* Software should not attempt to set
 774                          * port link state above '3' (U3) and the port
 775                          * must be enabled.
 776                          */
 777                         if ((temp & PORT_PE) == 0 ||
 778                                 (link_state > USB_SS_PORT_LS_U3)) {
 779                                 xhci_warn(xhci, "Cannot set link state.\n");
 780                                 goto error;
 781                         }
 782
 783                         if (link_state == USB_SS_PORT_LS_U3) {
 784                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 785                                                 wIndex + 1);
 786                                 if (slot_id) {
 787                                         /* unlock to execute stop endpoint
 788                                          * commands */
 789                                         spin_unlock_irqrestore(&xhci->lock,
 790                                                                 flags);
 791                                         xhci_stop_device(xhci, slot_id, 1);
 792                                         spin_lock_irqsave(&xhci->lock, flags);
 793                                 }
 794                         }
 795
 796                         xhci_set_link_state(xhci, port_array, wIndex,
 797                                                 link_state);
 798
 799                         spin_unlock_irqrestore(&xhci->lock, flags);
 800                         msleep(20); /* wait device to enter */
 801                         spin_lock_irqsave(&xhci->lock, flags);
 802
 803                         temp = xhci_readl(xhci, port_array[wIndex]);
 804                         if (link_state == USB_SS_PORT_LS_U3)
 805                                 bus_state->suspended_ports |= 1 << wIndex;
 806                         break;
 807                 case USB_PORT_FEAT_POWER:
 808                         /*
 809                          * Turn on ports, even if there isn't per-port switching.
 810                          * HC will report connect events even before this is set.
 811                          * However, khubd will ignore the roothub events until
 812                          * the roothub is registered.
 813                          */
 814                         xhci_writel(xhci, temp | PORT_POWER,
 815                                         port_array[wIndex]);
 816
 817                         temp = xhci_readl(xhci, port_array[wIndex]);
 818                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
 819                         break;
 820                 case USB_PORT_FEAT_RESET:
 821                         temp = (temp | PORT_RESET);
 822                         xhci_writel(xhci, temp, port_array[wIndex]);
 823
 824                         temp = xhci_readl(xhci, port_array[wIndex]);
 825                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
 826                         break;
 827                 case USB_PORT_FEAT_BH_PORT_RESET:
 828                         temp |= PORT_WR;
 829                         xhci_writel(xhci, temp, port_array[wIndex]);
 830
 831                         temp = xhci_readl(xhci, port_array[wIndex]);
 832                         break;
 833                 default:
 834                         goto error;
 835                 }
 836                 /* unblock any posted writes */
 837                 temp = xhci_readl(xhci, port_array[wIndex]);
 838                 break;
 839         case ClearPortFeature:
 840                 if (!wIndex || wIndex > max_ports)
 841                         goto error;
 842                 wIndex--;
 843                 temp = xhci_readl(xhci, port_array[wIndex]);
 844                 if (temp == 0xffffffff) {
 845                         retval = -ENODEV;
 846                         break;
 847                 }
 848                 /* FIXME: What new port features do we need to support? */
 849                 temp = xhci_port_state_to_neutral(temp);
 850                 switch (wValue) {
 851                 case USB_PORT_FEAT_SUSPEND:
 852                         temp = xhci_readl(xhci, port_array[wIndex]);
 853                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
 854                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
 855                         if (temp & PORT_RESET)
 856                                 goto error;
 857                         if ((temp & PORT_PLS_MASK) == XDEV_U3) {
 858                                 if ((temp & PORT_PE) == 0)
 859                                         goto error;
 860
 861                                 xhci_set_link_state(xhci, port_array, wIndex,
 862                                                         XDEV_RESUME);
 863                                 spin_unlock_irqrestore(&xhci->lock, flags);
 864                                 msleep(20);
 865                                 spin_lock_irqsave(&xhci->lock, flags);
 866                                 xhci_set_link_state(xhci, port_array, wIndex,
 867                                                         XDEV_U0);
 868                         }
 869                         bus_state->port_c_suspend |= 1 << wIndex;
 870
 871                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 872                                         wIndex + 1);
 873                         if (!slot_id) {
 874                                 xhci_dbg(xhci, "slot_id is zero\n");
 875                                 goto error;
 876                         }
 877                         xhci_ring_device(xhci, slot_id);
 878                         break;
 879                 case USB_PORT_FEAT_C_SUSPEND:
 880                         bus_state->port_c_suspend &= ~(1 << wIndex);
 881                 case USB_PORT_FEAT_C_RESET:
 882                 case USB_PORT_FEAT_C_BH_PORT_RESET:
 883                 case USB_PORT_FEAT_C_CONNECTION:
 884                 case USB_PORT_FEAT_C_OVER_CURRENT:
 885                 case USB_PORT_FEAT_C_ENABLE:
 886                 case USB_PORT_FEAT_C_PORT_LINK_STATE:
 887                 case USB_PORT_FEAT_C_PORT_CONFIG_ERROR:
 888                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
 889                                         port_array[wIndex], temp);
 890                         break;
 891                 case USB_PORT_FEAT_ENABLE:
 892                         xhci_disable_port(hcd, xhci, wIndex,
 893                                         port_array[wIndex], temp);
 894                         break;
 895                 default:
 896                         goto error;
 897                 }
 898                 break;
 899         default:
 900 error:
 901                 /* "stall" on error */
 902                 retval = -EPIPE;
 903         }
 904         spin_unlock_irqrestore(&xhci->lock, flags);
 905         return retval;
 906 }
 907
 908 /*
 909  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
 910  * Ports are 0-indexed from the HCD point of view,
 911  * and 1-indexed from the USB core pointer of view.
 912  *
 913  * Note that the status change bits will be cleared as soon as a port status
 914  * change event is generated, so we use the saved status from that event.
 915  */
 916 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
 917 {
 918         unsigned long flags;
 919         u32 temp, status;
 920         u32 mask;
 921         int i, retval;
 922         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 923         int max_ports;
 924         __le32 __iomem **port_array;
 925         struct xhci_bus_state *bus_state;
 926         bool reset_change = false;
 927
 928         max_ports = xhci_get_ports(hcd, &port_array);
 929         bus_state = &xhci->bus_state[hcd_index(hcd)];
 930
 931         /* Initial status is no changes */
 932         retval = (max_ports + 8) / 8;
 933         memset(buf, 0, retval);
 934         status = 0;
 935
 936         mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC | PORT_CEC;
 937
 938         spin_lock_irqsave(&xhci->lock, flags);
 939         /* For each port, did anything change?  If so, set that bit in buf. */
 940         for (i = 0; i < max_ports; i++) {
 941                 temp = xhci_readl(xhci, port_array[i]);
 942                 if (temp == 0xffffffff) {
 943                         retval = -ENODEV;
 944                         break;
 945                 }
 946                 if ((temp & mask) != 0 ||
 947                         (bus_state->port_c_suspend & 1 << i) ||
 948                         (bus_state->resume_done[i] && time_after_eq(
 949                             jiffies, bus_state->resume_done[i]))) {
 950                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
 951                         status = 1;
 952                 }
 953                 if ((temp & PORT_RC))
 954                         reset_change = true;
 955         }
 956         if (!status && !reset_change) {
 957                 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
 958                 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 959         }
 960         spin_unlock_irqrestore(&xhci->lock, flags);
 961         return status ? retval : 0;
 962 }
 963
 964 #ifdef CONFIG_PM
 965
 966 int xhci_bus_suspend(struct usb_hcd *hcd)
 967 {
 968         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 969         int max_ports, port_index;
 970         __le32 __iomem **port_array;
 971         struct xhci_bus_state *bus_state;
 972         unsigned long flags;
 973
 974         max_ports = xhci_get_ports(hcd, &port_array);
 975         bus_state = &xhci->bus_state[hcd_index(hcd)];
 976
 977         spin_lock_irqsave(&xhci->lock, flags);
 978
 979         if (hcd->self.root_hub->do_remote_wakeup) {
 980                 port_index = max_ports;
 981                 while (port_index--) {
 982                         if (bus_state->resume_done[port_index] != 0) {
 983                                 spin_unlock_irqrestore(&xhci->lock, flags);
 984                                 xhci_dbg(xhci, "suspend failed because "
 985                                                 "port %d is resuming\n",
 986                                                 port_index + 1);
 987                                 return -EBUSY;
 988                         }
 989                 }
 990         }
 991
 992         port_index = max_ports;
 993         bus_state->bus_suspended = 0;
 994         while (port_index--) {
 995                 /* suspend the port if the port is not suspended */
 996                 u32 t1, t2;
 997                 int slot_id;
 998
 999                 t1 = xhci_readl(xhci, port_array[port_index]);
1000                 t2 = xhci_port_state_to_neutral(t1);
1001
1002                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
1003                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
1004                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1005                                         port_index + 1);
1006                         if (slot_id) {
1007                                 spin_unlock_irqrestore(&xhci->lock, flags);
1008                                 xhci_stop_device(xhci, slot_id, 1);
1009                                 spin_lock_irqsave(&xhci->lock, flags);
1010                         }
1011                         t2 &= ~PORT_PLS_MASK;
1012                         t2 |= PORT_LINK_STROBE | XDEV_U3;
1013                         set_bit(port_index, &bus_state->bus_suspended);
1014                 }
1015                 if (hcd->self.root_hub->do_remote_wakeup) {
1016                         if (t1 & PORT_CONNECT) {
1017                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
1018                                 t2 &= ~PORT_WKCONN_E;
1019                         } else {
1020                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
1021                                 t2 &= ~PORT_WKDISC_E;
1022                         }
1023                 } else
1024                         t2 &= ~PORT_WAKE_BITS;
1025
1026                 t1 = xhci_port_state_to_neutral(t1);
1027                 if (t1 != t2)
1028                         xhci_writel(xhci, t2, port_array[port_index]);
1029         }
1030         hcd->state = HC_STATE_SUSPENDED;
1031         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
1032         spin_unlock_irqrestore(&xhci->lock, flags);
1033         return 0;
1034 }
1035
1036 int xhci_bus_resume(struct usb_hcd *hcd)
1037 {
1038         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1039         int max_ports, port_index;
1040         __le32 __iomem **port_array;
1041         struct xhci_bus_state *bus_state;
1042         u32 temp;
1043         unsigned long flags;
1044
1045         max_ports = xhci_get_ports(hcd, &port_array);
1046         bus_state = &xhci->bus_state[hcd_index(hcd)];
1047
1048         if (time_before(jiffies, bus_state->next_statechange))
1049                 msleep(5);
1050
1051         spin_lock_irqsave(&xhci->lock, flags);
1052         if (!HCD_HW_ACCESSIBLE(hcd)) {
1053                 spin_unlock_irqrestore(&xhci->lock, flags);
1054                 return -ESHUTDOWN;
1055         }
1056
1057         /* delay the irqs */
1058         temp = xhci_readl(xhci, &xhci->op_regs->command);
1059         temp &= ~CMD_EIE;
1060         xhci_writel(xhci, temp, &xhci->op_regs->command);
1061
1062         port_index = max_ports;
1063         while (port_index--) {
1064                 /* Check whether need resume ports. If needed
1065                    resume port and disable remote wakeup */
1066                 u32 temp;
1067                 int slot_id;
1068
1069                 temp = xhci_readl(xhci, port_array[port_index]);
1070                 if (DEV_SUPERSPEED(temp))
1071                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
1072                 else
1073                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
1074                 if (test_bit(port_index, &bus_state->bus_suspended) &&
1075                     (temp & PORT_PLS_MASK)) {
1076                         if (DEV_SUPERSPEED(temp)) {
1077                                 xhci_set_link_state(xhci, port_array,
1078                                                         port_index, XDEV_U0);
1079                         } else {
1080                                 xhci_set_link_state(xhci, port_array,
1081                                                 port_index, XDEV_RESUME);
1082
1083                                 spin_unlock_irqrestore(&xhci->lock, flags);
1084                                 msleep(20);
1085                                 spin_lock_irqsave(&xhci->lock, flags);
1086
1087                                 xhci_set_link_state(xhci, port_array,
1088                                                         port_index, XDEV_U0);
1089                         }
1090                         /* wait for the port to enter U0 and report port link
1091                          * state change.
1092                          */
1093                         spin_unlock_irqrestore(&xhci->lock, flags);
1094                         msleep(20);
1095                         spin_lock_irqsave(&xhci->lock, flags);
1096
1097                         /* Clear PLC */
1098                         xhci_test_and_clear_bit(xhci, port_array, port_index,
1099                                                 PORT_PLC);
1100
1101                         slot_id = xhci_find_slot_id_by_port(hcd,
1102                                         xhci, port_index + 1);
1103                         if (slot_id)
1104                                 xhci_ring_device(xhci, slot_id);
1105                 } else
1106                         xhci_writel(xhci, temp, port_array[port_index]);
1107         }
1108
1109         (void) xhci_readl(xhci, &xhci->op_regs->command);
1110
1111         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
1112         /* re-enable irqs */
1113         temp = xhci_readl(xhci, &xhci->op_regs->command);
1114         temp |= CMD_EIE;
1115         xhci_writel(xhci, temp, &xhci->op_regs->command);
1116         temp = xhci_readl(xhci, &xhci->op_regs->command);
1117
1118         spin_unlock_irqrestore(&xhci->lock, flags);
1119         return 0;
1120 }
1121
1122 #endif  /* CONFIG_PM */