2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/unistd.h>
35 #include <linux/interrupt.h>
36 #include <linux/spinlock.h>
37 #include <linux/debugfs.h>
39 #include <linux/dmapool.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/usb.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
48 #include <asm/system.h>
50 #include "../core/hcd.h"
52 #include "pci-quirks.h"
57 #define DRIVER_VERSION "v3.0"
58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
61 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
63 /* for flakey hardware, ignore overcurrent indicators */
65 module_param(ignore_oc, bool, S_IRUGO);
66 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
69 * debug = 0, no debugging messages
70 * debug = 1, dump failed URBs except for stalls
71 * debug = 2, dump all failed URBs (including stalls)
72 * show all queues in /debug/uhci/[pci_addr]
73 * debug = 3, show all TDs in URBs when dumping
76 #define DEBUG_CONFIGURED 1
78 module_param(debug, int, S_IRUGO | S_IWUSR);
79 MODULE_PARM_DESC(debug, "Debug level");
82 #define DEBUG_CONFIGURED 0
87 #define ERRBUF_LEN (32 * 1024)
89 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
91 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
92 static void wakeup_rh(struct uhci_hcd *uhci);
93 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
95 #include "uhci-debug.c"
100 * Finish up a host controller reset and update the recorded state.
102 static void finish_reset(struct uhci_hcd *uhci)
106 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
107 * bits in the port status and control registers.
108 * We have to clear them by hand.
110 for (port = 0; port < uhci->rh_numports; ++port)
111 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
113 uhci->port_c_suspend = uhci->resuming_ports = 0;
114 uhci->rh_state = UHCI_RH_RESET;
115 uhci->is_stopped = UHCI_IS_STOPPED;
116 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
117 uhci_to_hcd(uhci)->poll_rh = 0;
119 uhci->dead = 0; /* Full reset resurrects the controller */
123 * Last rites for a defunct/nonfunctional controller
124 * or one we don't want to use any more.
126 static void uhci_hc_died(struct uhci_hcd *uhci)
128 uhci_get_current_frame_number(uhci);
129 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
133 /* The current frame may already be partway finished */
134 ++uhci->frame_number;
138 * Initialize a controller that was newly discovered or has lost power
139 * or otherwise been reset while it was suspended. In none of these cases
140 * can we be sure of its previous state.
142 static void check_and_reset_hc(struct uhci_hcd *uhci)
144 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
149 * Store the basic register settings needed by the controller.
151 static void configure_hc(struct uhci_hcd *uhci)
153 /* Set the frame length to the default: 1 ms exactly */
154 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
156 /* Store the frame list base address */
157 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
159 /* Set the current frame number */
160 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
161 uhci->io_addr + USBFRNUM);
163 /* Mark controller as not halted before we enable interrupts */
164 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
168 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
173 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
177 /* If we have to ignore overcurrent events then almost by definition
178 * we can't depend on resume-detect interrupts. */
182 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
186 case PCI_VENDOR_ID_GENESYS:
187 /* Genesys Logic's GL880S controllers don't generate
188 * resume-detect interrupts.
192 case PCI_VENDOR_ID_INTEL:
193 /* Some of Intel's USB controllers have a bug that causes
194 * resume-detect interrupts if any port has an over-current
195 * condition. To make matters worse, some motherboards
196 * hardwire unused USB ports' over-current inputs active!
197 * To prevent problems, we will not enable resume-detect
198 * interrupts if any ports are OC.
200 for (port = 0; port < uhci->rh_numports; ++port) {
201 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
210 static int remote_wakeup_is_broken(struct uhci_hcd *uhci)
214 static char bad_Asus_board[] = "A7V8X";
216 /* One of Asus's motherboards has a bug which causes it to
217 * wake up immediately from suspend-to-RAM if any of the ports
218 * are connected. In such cases we will not set EGSM.
220 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
221 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
222 for (port = 0; port < uhci->rh_numports; ++port) {
223 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
232 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
233 __releases(uhci->lock)
234 __acquires(uhci->lock)
237 int int_enable, egsm_enable;
239 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
240 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
241 "%s%s\n", __FUNCTION__,
242 (auto_stop ? " (auto-stop)" : ""));
244 /* If we get a suspend request when we're already auto-stopped
245 * then there's nothing to do.
247 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
248 uhci->rh_state = new_state;
252 /* Enable resume-detect interrupts if they work.
253 * Then enter Global Suspend mode if _it_ works, still configured.
255 egsm_enable = USBCMD_EGSM;
256 uhci->working_RD = 1;
257 int_enable = USBINTR_RESUME;
258 if (remote_wakeup_is_broken(uhci))
260 if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable)
261 uhci->working_RD = int_enable = 0;
263 outw(int_enable, uhci->io_addr + USBINTR);
264 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
268 /* If we're auto-stopping then no devices have been attached
269 * for a while, so there shouldn't be any active URBs and the
270 * controller should stop after a few microseconds. Otherwise
271 * we will give the controller one frame to stop.
273 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
274 uhci->rh_state = UHCI_RH_SUSPENDING;
275 spin_unlock_irq(&uhci->lock);
277 spin_lock_irq(&uhci->lock);
281 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
282 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,
283 "Controller not stopped yet!\n");
285 uhci_get_current_frame_number(uhci);
287 uhci->rh_state = new_state;
288 uhci->is_stopped = UHCI_IS_STOPPED;
289 uhci_to_hcd(uhci)->poll_rh = !int_enable;
291 uhci_scan_schedule(uhci);
295 static void start_rh(struct uhci_hcd *uhci)
297 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
298 uhci->is_stopped = 0;
300 /* Mark it configured and running with a 64-byte max packet.
301 * All interrupts are enabled, even though RESUME won't do anything.
303 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
304 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
305 uhci->io_addr + USBINTR);
307 uhci->rh_state = UHCI_RH_RUNNING;
308 uhci_to_hcd(uhci)->poll_rh = 1;
311 static void wakeup_rh(struct uhci_hcd *uhci)
312 __releases(uhci->lock)
313 __acquires(uhci->lock)
315 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
316 "%s%s\n", __FUNCTION__,
317 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
318 " (auto-start)" : "");
320 /* If we are auto-stopped then no devices are attached so there's
321 * no need for wakeup signals. Otherwise we send Global Resume
324 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
325 uhci->rh_state = UHCI_RH_RESUMING;
326 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
327 uhci->io_addr + USBCMD);
328 spin_unlock_irq(&uhci->lock);
330 spin_lock_irq(&uhci->lock);
334 /* End Global Resume and wait for EOP to be sent */
335 outw(USBCMD_CF, uhci->io_addr + USBCMD);
338 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
339 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
344 /* Restart root hub polling */
345 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
348 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
350 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
351 unsigned short status;
355 * Read the interrupt status, and write it back to clear the
356 * interrupt cause. Contrary to the UHCI specification, the
357 * "HC Halted" status bit is persistent: it is RO, not R/WC.
359 status = inw(uhci->io_addr + USBSTS);
360 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
362 outw(status, uhci->io_addr + USBSTS); /* Clear it */
364 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
365 if (status & USBSTS_HSE)
366 dev_err(uhci_dev(uhci), "host system error, "
368 if (status & USBSTS_HCPE)
369 dev_err(uhci_dev(uhci), "host controller process "
370 "error, something bad happened!\n");
371 if (status & USBSTS_HCH) {
372 spin_lock_irqsave(&uhci->lock, flags);
373 if (uhci->rh_state >= UHCI_RH_RUNNING) {
374 dev_err(uhci_dev(uhci),
375 "host controller halted, "
377 if (debug > 1 && errbuf) {
378 /* Print the schedule for debugging */
379 uhci_sprint_schedule(uhci,
385 /* Force a callback in case there are
387 mod_timer(&hcd->rh_timer, jiffies);
389 spin_unlock_irqrestore(&uhci->lock, flags);
393 if (status & USBSTS_RD)
394 usb_hcd_poll_rh_status(hcd);
396 spin_lock_irqsave(&uhci->lock, flags);
397 uhci_scan_schedule(uhci);
398 spin_unlock_irqrestore(&uhci->lock, flags);
405 * Store the current frame number in uhci->frame_number if the controller
406 * is runnning. Expand from 11 bits (of which we use only 10) to a
407 * full-sized integer.
409 * Like many other parts of the driver, this code relies on being polled
410 * more than once per second as long as the controller is running.
412 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
414 if (!uhci->is_stopped) {
417 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
418 (UHCI_NUMFRAMES - 1);
419 uhci->frame_number += delta;
424 * De-allocate all resources
426 static void release_uhci(struct uhci_hcd *uhci)
430 if (DEBUG_CONFIGURED) {
431 spin_lock_irq(&uhci->lock);
432 uhci->is_initialized = 0;
433 spin_unlock_irq(&uhci->lock);
435 debugfs_remove(uhci->dentry);
438 for (i = 0; i < UHCI_NUM_SKELQH; i++)
439 uhci_free_qh(uhci, uhci->skelqh[i]);
441 uhci_free_td(uhci, uhci->term_td);
443 dma_pool_destroy(uhci->qh_pool);
445 dma_pool_destroy(uhci->td_pool);
447 kfree(uhci->frame_cpu);
449 dma_free_coherent(uhci_dev(uhci),
450 UHCI_NUMFRAMES * sizeof(*uhci->frame),
451 uhci->frame, uhci->frame_dma_handle);
454 static int uhci_init(struct usb_hcd *hcd)
456 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
457 unsigned io_size = (unsigned) hcd->rsrc_len;
460 uhci->io_addr = (unsigned long) hcd->rsrc_start;
462 /* The UHCI spec says devices must have 2 ports, and goes on to say
463 * they may have more but gives no way to determine how many there
464 * are. However according to the UHCI spec, Bit 7 of the port
465 * status and control register is always set to 1. So we try to
466 * use this to our advantage. Another common failure mode when
467 * a nonexistent register is addressed is to return all ones, so
468 * we test for that also.
470 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
471 unsigned int portstatus;
473 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
474 if (!(portstatus & 0x0080) || portstatus == 0xffff)
478 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
480 /* Anything greater than 7 is weird so we'll ignore it. */
481 if (port > UHCI_RH_MAXCHILD) {
482 dev_info(uhci_dev(uhci), "port count misdetected? "
483 "forcing to 2 ports\n");
486 uhci->rh_numports = port;
488 /* Kick BIOS off this hardware and reset if the controller
489 * isn't already safely quiescent.
491 check_and_reset_hc(uhci);
495 /* Make sure the controller is quiescent and that we're not using it
496 * any more. This is mainly for the benefit of programs which, like kexec,
497 * expect the hardware to be idle: not doing DMA or generating IRQs.
499 * This routine may be called in a damaged or failing kernel. Hence we
500 * do not acquire the spinlock before shutting down the controller.
502 static void uhci_shutdown(struct pci_dev *pdev)
504 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
506 uhci_hc_died(hcd_to_uhci(hcd));
510 * Allocate a frame list, and then setup the skeleton
512 * The hardware doesn't really know any difference
513 * in the queues, but the order does matter for the
514 * protocols higher up. The order is:
516 * - any isochronous events handled before any
517 * of the queues. We don't do that here, because
518 * we'll create the actual TD entries on demand.
519 * - The first queue is the interrupt queue.
520 * - The second queue is the control queue, split into low- and full-speed
521 * - The third queue is bulk queue.
522 * - The fourth queue is the bandwidth reclamation queue, which loops back
523 * to the full-speed control queue.
525 static int uhci_start(struct usb_hcd *hcd)
527 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
530 struct dentry *dentry;
532 hcd->uses_new_polling = 1;
534 spin_lock_init(&uhci->lock);
535 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
536 (unsigned long) uhci);
537 INIT_LIST_HEAD(&uhci->idle_qh_list);
538 init_waitqueue_head(&uhci->waitqh);
540 if (DEBUG_CONFIGURED) {
541 dentry = debugfs_create_file(hcd->self.bus_name,
542 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
543 uhci, &uhci_debug_operations);
545 dev_err(uhci_dev(uhci), "couldn't create uhci "
548 goto err_create_debug_entry;
550 uhci->dentry = dentry;
553 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
554 UHCI_NUMFRAMES * sizeof(*uhci->frame),
555 &uhci->frame_dma_handle, 0);
557 dev_err(uhci_dev(uhci), "unable to allocate "
558 "consistent memory for frame list\n");
559 goto err_alloc_frame;
561 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
563 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
565 if (!uhci->frame_cpu) {
566 dev_err(uhci_dev(uhci), "unable to allocate "
567 "memory for frame pointers\n");
568 goto err_alloc_frame_cpu;
571 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
572 sizeof(struct uhci_td), 16, 0);
573 if (!uhci->td_pool) {
574 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
575 goto err_create_td_pool;
578 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
579 sizeof(struct uhci_qh), 16, 0);
580 if (!uhci->qh_pool) {
581 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
582 goto err_create_qh_pool;
585 uhci->term_td = uhci_alloc_td(uhci);
586 if (!uhci->term_td) {
587 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
588 goto err_alloc_term_td;
591 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
592 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
593 if (!uhci->skelqh[i]) {
594 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
595 goto err_alloc_skelqh;
600 * 8 Interrupt queues; link all higher int queues to int1,
601 * then link int1 to control and control to bulk
603 uhci->skel_int128_qh->link =
604 uhci->skel_int64_qh->link =
605 uhci->skel_int32_qh->link =
606 uhci->skel_int16_qh->link =
607 uhci->skel_int8_qh->link =
608 uhci->skel_int4_qh->link =
609 uhci->skel_int2_qh->link = UHCI_PTR_QH |
610 cpu_to_le32(uhci->skel_int1_qh->dma_handle);
612 uhci->skel_int1_qh->link = UHCI_PTR_QH |
613 cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
614 uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
615 cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
616 uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
617 cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
618 uhci->skel_bulk_qh->link = UHCI_PTR_QH |
619 cpu_to_le32(uhci->skel_term_qh->dma_handle);
621 /* This dummy TD is to work around a bug in Intel PIIX controllers */
622 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
623 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
624 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
626 uhci->skel_term_qh->link = UHCI_PTR_TERM;
627 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
630 * Fill the frame list: make all entries point to the proper
633 * The interrupt queues will be interleaved as evenly as possible.
634 * There's not much to be done about period-1 interrupts; they have
635 * to occur in every frame. But we can schedule period-2 interrupts
636 * in odd-numbered frames, period-4 interrupts in frames congruent
637 * to 2 (mod 4), and so on. This way each frame only has two
638 * interrupt QHs, which will help spread out bandwidth utilization.
640 for (i = 0; i < UHCI_NUMFRAMES; i++) {
644 * ffs (Find First bit Set) does exactly what we need:
645 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8],
646 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
647 * ffs >= 7 => not on any high-period queue, so use
648 * skel_int1_qh = skelqh[9].
649 * Add UHCI_NUMFRAMES to insure at least one bit is set.
651 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
655 /* Only place we don't use the frame list routines */
656 uhci->frame[i] = UHCI_PTR_QH |
657 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
661 * Some architectures require a full mb() to enforce completion of
662 * the memory writes above before the I/O transfers in configure_hc().
667 uhci->is_initialized = 1;
675 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
677 uhci_free_qh(uhci, uhci->skelqh[i]);
680 uhci_free_td(uhci, uhci->term_td);
683 dma_pool_destroy(uhci->qh_pool);
686 dma_pool_destroy(uhci->td_pool);
689 kfree(uhci->frame_cpu);
692 dma_free_coherent(uhci_dev(uhci),
693 UHCI_NUMFRAMES * sizeof(*uhci->frame),
694 uhci->frame, uhci->frame_dma_handle);
697 debugfs_remove(uhci->dentry);
699 err_create_debug_entry:
703 static void uhci_stop(struct usb_hcd *hcd)
705 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
707 spin_lock_irq(&uhci->lock);
708 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
710 uhci_scan_schedule(uhci);
711 spin_unlock_irq(&uhci->lock);
713 del_timer_sync(&uhci->fsbr_timer);
718 static int uhci_rh_suspend(struct usb_hcd *hcd)
720 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
723 spin_lock_irq(&uhci->lock);
724 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
726 else if (!uhci->dead)
727 suspend_rh(uhci, UHCI_RH_SUSPENDED);
728 spin_unlock_irq(&uhci->lock);
732 static int uhci_rh_resume(struct usb_hcd *hcd)
734 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
737 spin_lock_irq(&uhci->lock);
738 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
739 dev_warn(&hcd->self.root_hub->dev, "HC isn't running!\n");
741 } else if (!uhci->dead)
743 spin_unlock_irq(&uhci->lock);
747 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
749 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
752 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
754 spin_lock_irq(&uhci->lock);
755 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
756 goto done_okay; /* Already suspended or dead */
758 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
759 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
764 /* All PCI host controllers are required to disable IRQ generation
765 * at the source, so we must turn off PIRQ.
767 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
771 /* FIXME: Enable non-PME# remote wakeup? */
773 /* make sure snapshot being resumed re-enumerates everything */
774 if (message.event == PM_EVENT_PRETHAW)
778 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
780 spin_unlock_irq(&uhci->lock);
784 static int uhci_resume(struct usb_hcd *hcd)
786 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
788 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
790 /* Since we aren't in D3 any more, it's safe to set this flag
791 * even if the controller was dead.
793 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
796 spin_lock_irq(&uhci->lock);
798 /* FIXME: Disable non-PME# remote wakeup? */
800 /* The firmware or a boot kernel may have changed the controller
801 * settings during a system wakeup. Check it and reconfigure
804 check_and_reset_hc(uhci);
806 /* If the controller was dead before, it's back alive now */
809 if (uhci->rh_state == UHCI_RH_RESET) {
811 /* The controller had to be reset */
812 usb_root_hub_lost_power(hcd->self.root_hub);
813 suspend_rh(uhci, UHCI_RH_SUSPENDED);
816 spin_unlock_irq(&uhci->lock);
818 if (!uhci->working_RD) {
819 /* Suspended root hub needs to be polled */
821 usb_hcd_poll_rh_status(hcd);
827 /* Wait until a particular device/endpoint's QH is idle, and free it */
828 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
829 struct usb_host_endpoint *hep)
831 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
834 spin_lock_irq(&uhci->lock);
835 qh = (struct uhci_qh *) hep->hcpriv;
839 while (qh->state != QH_STATE_IDLE) {
841 spin_unlock_irq(&uhci->lock);
842 wait_event_interruptible(uhci->waitqh,
843 qh->state == QH_STATE_IDLE);
844 spin_lock_irq(&uhci->lock);
848 uhci_free_qh(uhci, qh);
850 spin_unlock_irq(&uhci->lock);
853 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
855 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
856 unsigned frame_number;
859 /* Minimize latency by avoiding the spinlock */
860 frame_number = uhci->frame_number;
862 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
863 (UHCI_NUMFRAMES - 1);
864 return frame_number + delta;
867 static const char hcd_name[] = "uhci_hcd";
869 static const struct hc_driver uhci_driver = {
870 .description = hcd_name,
871 .product_desc = "UHCI Host Controller",
872 .hcd_priv_size = sizeof(struct uhci_hcd),
874 /* Generic hardware linkage */
878 /* Basic lifecycle operations */
882 .suspend = uhci_suspend,
883 .resume = uhci_resume,
884 .bus_suspend = uhci_rh_suspend,
885 .bus_resume = uhci_rh_resume,
889 .urb_enqueue = uhci_urb_enqueue,
890 .urb_dequeue = uhci_urb_dequeue,
892 .endpoint_disable = uhci_hcd_endpoint_disable,
893 .get_frame_number = uhci_hcd_get_frame_number,
895 .hub_status_data = uhci_hub_status_data,
896 .hub_control = uhci_hub_control,
899 static const struct pci_device_id uhci_pci_ids[] = { {
900 /* handle any USB UHCI controller */
901 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
902 .driver_data = (unsigned long) &uhci_driver,
903 }, { /* end: all zeroes */ }
906 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
908 static struct pci_driver uhci_pci_driver = {
909 .name = (char *)hcd_name,
910 .id_table = uhci_pci_ids,
912 .probe = usb_hcd_pci_probe,
913 .remove = usb_hcd_pci_remove,
914 .shutdown = uhci_shutdown,
917 .suspend = usb_hcd_pci_suspend,
918 .resume = usb_hcd_pci_resume,
922 static int __init uhci_hcd_init(void)
924 int retval = -ENOMEM;
926 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n",
927 ignore_oc ? ", overcurrent ignored" : "");
932 if (DEBUG_CONFIGURED) {
933 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
936 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
937 if (!uhci_debugfs_root)
941 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
942 sizeof(struct urb_priv), 0, 0, NULL, NULL);
946 retval = pci_register_driver(&uhci_pci_driver);
953 kmem_cache_destroy(uhci_up_cachep);
956 debugfs_remove(uhci_debugfs_root);
966 static void __exit uhci_hcd_cleanup(void)
968 pci_unregister_driver(&uhci_pci_driver);
969 kmem_cache_destroy(uhci_up_cachep);
970 debugfs_remove(uhci_debugfs_root);
974 module_init(uhci_hcd_init);
975 module_exit(uhci_hcd_cleanup);
977 MODULE_AUTHOR(DRIVER_AUTHOR);
978 MODULE_DESCRIPTION(DRIVER_DESC);
979 MODULE_LICENSE("GPL");