2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
46 /*-------------------------------------------------------------------------*/
49 * EHCI hc_driver implementation ... experimental, incomplete.
50 * Based on the final 1.0 register interface specification.
52 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53 * First was PCMCIA, like ISA; then CardBus, which is PCI.
54 * Next comes "CardBay", using USB 2.0 signals.
56 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57 * Special thanks to Intel and VIA for providing host controllers to
58 * test this driver on, and Cypress (including In-System Design) for
59 * providing early devices for those host controllers to talk to!
62 #define DRIVER_VERSION "10 Dec 2004"
63 #define DRIVER_AUTHOR "David Brownell"
64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
66 static const char hcd_name [] = "ehci_hcd";
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
84 #define EHCI_IAA_MSECS 10 /* arbitrary */
85 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
86 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
87 #define EHCI_SHRINK_JIFFIES (HZ/100) /* async qh unlink delay */
88 #define EHCI_SHRINK_UFRAMES (10*8) /* same value in uframes */
90 /* Initial IRQ latency: faster than hw default */
91 static int log2_irq_thresh = 0; // 0 to 6
92 module_param (log2_irq_thresh, int, S_IRUGO);
93 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
95 /* initial park setting: slower than hw default */
96 static unsigned park = 0;
97 module_param (park, uint, S_IRUGO);
98 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
100 /* for flakey hardware, ignore overcurrent indicators */
101 static int ignore_oc = 0;
102 module_param (ignore_oc, bool, S_IRUGO);
103 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
107 /*-------------------------------------------------------------------------*/
110 #include "ehci-dbg.c"
112 /*-------------------------------------------------------------------------*/
115 * handshake - spin reading hc until handshake completes or fails
116 * @ptr: address of hc register to be read
117 * @mask: bits to look at in result of read
118 * @done: value of those bits when handshake succeeds
119 * @usec: timeout in microseconds
121 * Returns negative errno, or zero on success
123 * Success happens when the "mask" bits have the specified value (hardware
124 * handshake done). There are two failure modes: "usec" have passed (major
125 * hardware flakeout), or the register reads as all-ones (hardware removed).
127 * That last failure should_only happen in cases like physical cardbus eject
128 * before driver shutdown. But it also seems to be caused by bugs in cardbus
129 * bridge shutdown: shutting down the bridge before the devices using it.
131 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
132 u32 mask, u32 done, int usec)
137 result = ehci_readl(ehci, ptr);
138 if (result == ~(u32)0) /* card removed */
149 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
150 u32 mask, u32 done, int usec)
152 int error = handshake(ehci, ptr, mask, done, usec);
154 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
159 /* force HC to halt state from unknown (EHCI spec section 2.3) */
160 static int ehci_halt (struct ehci_hcd *ehci)
162 u32 temp = ehci_readl(ehci, &ehci->regs->status);
164 /* disable any irqs left enabled by previous code */
165 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
167 if ((temp & STS_HALT) != 0)
170 temp = ehci_readl(ehci, &ehci->regs->command);
172 ehci_writel(ehci, temp, &ehci->regs->command);
173 return handshake (ehci, &ehci->regs->status,
174 STS_HALT, STS_HALT, 16 * 125);
177 /* put TDI/ARC silicon into EHCI mode */
178 static void tdi_reset (struct ehci_hcd *ehci)
180 u32 __iomem *reg_ptr;
183 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
184 tmp = ehci_readl(ehci, reg_ptr);
185 tmp |= USBMODE_CM_HC;
186 /* The default byte access to MMR space is LE after
187 * controller reset. Set the required endian mode
188 * for transfer buffers to match the host microprocessor
190 if (ehci_big_endian_mmio(ehci))
192 ehci_writel(ehci, tmp, reg_ptr);
195 /* reset a non-running (STS_HALT == 1) controller */
196 static int ehci_reset (struct ehci_hcd *ehci)
199 u32 command = ehci_readl(ehci, &ehci->regs->command);
201 command |= CMD_RESET;
202 dbg_cmd (ehci, "reset", command);
203 ehci_writel(ehci, command, &ehci->regs->command);
204 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
205 ehci->next_statechange = jiffies;
206 retval = handshake (ehci, &ehci->regs->command,
207 CMD_RESET, 0, 250 * 1000);
212 if (ehci_is_TDI(ehci))
218 /* idle the controller (from running) */
219 static void ehci_quiesce (struct ehci_hcd *ehci)
224 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
228 /* wait for any schedule enables/disables to take effect */
229 temp = ehci_readl(ehci, &ehci->regs->command) << 10;
230 temp &= STS_ASS | STS_PSS;
231 if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
232 STS_ASS | STS_PSS, temp, 16 * 125))
235 /* then disable anything that's still active */
236 temp = ehci_readl(ehci, &ehci->regs->command);
237 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
238 ehci_writel(ehci, temp, &ehci->regs->command);
240 /* hardware can take 16 microframes to turn off ... */
241 handshake_on_error_set_halt(ehci, &ehci->regs->status,
242 STS_ASS | STS_PSS, 0, 16 * 125);
245 /*-------------------------------------------------------------------------*/
247 static void end_unlink_async(struct ehci_hcd *ehci);
248 static void ehci_work(struct ehci_hcd *ehci);
250 #include "ehci-hub.c"
251 #include "ehci-mem.c"
253 #include "ehci-sched.c"
255 /*-------------------------------------------------------------------------*/
257 static void ehci_iaa_watchdog(unsigned long param)
259 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
262 spin_lock_irqsave (&ehci->lock, flags);
264 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
265 * So we need this watchdog, but must protect it against both
266 * (a) SMP races against real IAA firing and retriggering, and
267 * (b) clean HC shutdown, when IAA watchdog was pending.
270 && !timer_pending(&ehci->iaa_watchdog)
271 && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
274 /* If we get here, IAA is *REALLY* late. It's barely
275 * conceivable that the system is so busy that CMD_IAAD
276 * is still legitimately set, so let's be sure it's
277 * clear before we read STS_IAA. (The HC should clear
278 * CMD_IAAD when it sets STS_IAA.)
280 cmd = ehci_readl(ehci, &ehci->regs->command);
282 ehci_writel(ehci, cmd & ~CMD_IAAD,
283 &ehci->regs->command);
285 /* If IAA is set here it either legitimately triggered
286 * before we cleared IAAD above (but _way_ late, so we'll
287 * still count it as lost) ... or a silicon erratum:
288 * - VIA seems to set IAA without triggering the IRQ;
289 * - IAAD potentially cleared without setting IAA.
291 status = ehci_readl(ehci, &ehci->regs->status);
292 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
293 COUNT (ehci->stats.lost_iaa);
294 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
297 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
299 end_unlink_async(ehci);
302 spin_unlock_irqrestore(&ehci->lock, flags);
305 static void ehci_watchdog(unsigned long param)
307 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
310 spin_lock_irqsave(&ehci->lock, flags);
312 /* stop async processing after it's idled a bit */
313 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
314 start_unlink_async (ehci, ehci->async);
316 /* ehci could run by timer, without IRQs ... */
319 spin_unlock_irqrestore (&ehci->lock, flags);
322 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
323 * The firmware seems to think that powering off is a wakeup event!
324 * This routine turns off remote wakeup and everything else, on all ports.
326 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
328 int port = HCS_N_PORTS(ehci->hcs_params);
331 ehci_writel(ehci, PORT_RWC_BITS,
332 &ehci->regs->port_status[port]);
336 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
337 * Should be called with ehci->lock held.
339 static void ehci_silence_controller(struct ehci_hcd *ehci)
342 ehci_turn_off_all_ports(ehci);
344 /* make BIOS/etc use companion controller during reboot */
345 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
347 /* unblock posted writes */
348 ehci_readl(ehci, &ehci->regs->configured_flag);
351 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
352 * This forcibly disables dma and IRQs, helping kexec and other cases
353 * where the next system software may expect clean state.
355 static void ehci_shutdown(struct usb_hcd *hcd)
357 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
359 del_timer_sync(&ehci->watchdog);
360 del_timer_sync(&ehci->iaa_watchdog);
362 spin_lock_irq(&ehci->lock);
363 ehci_silence_controller(ehci);
364 spin_unlock_irq(&ehci->lock);
367 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
371 if (!HCS_PPC (ehci->hcs_params))
374 ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
375 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
376 (void) ehci_hub_control(ehci_to_hcd(ehci),
377 is_on ? SetPortFeature : ClearPortFeature,
380 /* Flush those writes */
381 ehci_readl(ehci, &ehci->regs->command);
385 /*-------------------------------------------------------------------------*/
388 * ehci_work is called from some interrupts, timers, and so on.
389 * it calls driver completion functions, after dropping ehci->lock.
391 static void ehci_work (struct ehci_hcd *ehci)
393 timer_action_done (ehci, TIMER_IO_WATCHDOG);
395 /* another CPU may drop ehci->lock during a schedule scan while
396 * it reports urb completions. this flag guards against bogus
397 * attempts at re-entrant schedule scanning.
403 if (ehci->next_uframe != -1)
404 scan_periodic (ehci);
407 /* the IO watchdog guards against hardware or driver bugs that
408 * misplace IRQs, and should let us run completely without IRQs.
409 * such lossage has been observed on both VT6202 and VT8235.
411 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
412 (ehci->async->qh_next.ptr != NULL ||
413 ehci->periodic_sched != 0))
414 timer_action (ehci, TIMER_IO_WATCHDOG);
418 * Called when the ehci_hcd module is removed.
420 static void ehci_stop (struct usb_hcd *hcd)
422 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
424 ehci_dbg (ehci, "stop\n");
426 /* no more interrupts ... */
427 del_timer_sync (&ehci->watchdog);
428 del_timer_sync(&ehci->iaa_watchdog);
430 spin_lock_irq(&ehci->lock);
431 if (HC_IS_RUNNING (hcd->state))
434 ehci_silence_controller(ehci);
436 spin_unlock_irq(&ehci->lock);
438 remove_companion_file(ehci);
439 remove_debug_files (ehci);
441 /* root hub is shut down separately (first, when possible) */
442 spin_lock_irq (&ehci->lock);
445 spin_unlock_irq (&ehci->lock);
446 ehci_mem_cleanup (ehci);
449 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
450 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
451 ehci->stats.lost_iaa);
452 ehci_dbg (ehci, "complete %ld unlink %ld\n",
453 ehci->stats.complete, ehci->stats.unlink);
456 dbg_status (ehci, "ehci_stop completed",
457 ehci_readl(ehci, &ehci->regs->status));
460 /* one-time init, only for memory state */
461 static int ehci_init(struct usb_hcd *hcd)
463 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
468 spin_lock_init(&ehci->lock);
470 init_timer(&ehci->watchdog);
471 ehci->watchdog.function = ehci_watchdog;
472 ehci->watchdog.data = (unsigned long) ehci;
474 init_timer(&ehci->iaa_watchdog);
475 ehci->iaa_watchdog.function = ehci_iaa_watchdog;
476 ehci->iaa_watchdog.data = (unsigned long) ehci;
479 * hw default: 1K periodic list heads, one per frame.
480 * periodic_size can shrink by USBCMD update if hcc_params allows.
482 ehci->periodic_size = DEFAULT_I_TDPS;
483 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
486 /* controllers may cache some of the periodic schedule ... */
487 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
488 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
490 else // N microframes cached
491 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
493 ehci->reclaim = NULL;
494 ehci->next_uframe = -1;
497 * dedicate a qh for the async ring head, since we couldn't unlink
498 * a 'real' qh without stopping the async schedule [4.8]. use it
499 * as the 'reclamation list head' too.
500 * its dummy is used in hw_alt_next of many tds, to prevent the qh
501 * from automatically advancing to the next td after short reads.
503 ehci->async->qh_next.qh = NULL;
504 ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
505 ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
506 ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
507 ehci->async->hw_qtd_next = EHCI_LIST_END(ehci);
508 ehci->async->qh_state = QH_STATE_LINKED;
509 ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
511 /* clear interrupt enables, set irq latency */
512 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
514 temp = 1 << (16 + log2_irq_thresh);
515 if (HCC_CANPARK(hcc_params)) {
516 /* HW default park == 3, on hardware that supports it (like
517 * NVidia and ALI silicon), maximizes throughput on the async
518 * schedule by avoiding QH fetches between transfers.
520 * With fast usb storage devices and NForce2, "park" seems to
521 * make problems: throughput reduction (!), data errors...
524 park = min(park, (unsigned) 3);
528 ehci_dbg(ehci, "park %d\n", park);
530 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
531 /* periodic schedule size can be smaller than default */
533 temp |= (EHCI_TUNE_FLS << 2);
534 switch (EHCI_TUNE_FLS) {
535 case 0: ehci->periodic_size = 1024; break;
536 case 1: ehci->periodic_size = 512; break;
537 case 2: ehci->periodic_size = 256; break;
541 ehci->command = temp;
546 /* start HC running; it's halted, ehci_init() has been run (once) */
547 static int ehci_run (struct usb_hcd *hcd)
549 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
554 hcd->uses_new_polling = 1;
557 /* EHCI spec section 4.1 */
558 if ((retval = ehci_reset(ehci)) != 0) {
559 ehci_mem_cleanup(ehci);
562 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
563 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
566 * hcc_params controls whether ehci->regs->segment must (!!!)
567 * be used; it constrains QH/ITD/SITD and QTD locations.
568 * pci_pool consistent memory always uses segment zero.
569 * streaming mappings for I/O buffers, like pci_map_single(),
570 * can return segments above 4GB, if the device allows.
572 * NOTE: the dma mask is visible through dma_supported(), so
573 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
574 * Scsi_Host.highmem_io, and so forth. It's readonly to all
575 * host side drivers though.
577 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
578 if (HCC_64BIT_ADDR(hcc_params)) {
579 ehci_writel(ehci, 0, &ehci->regs->segment);
581 // this is deeply broken on almost all architectures
582 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
583 ehci_info(ehci, "enabled 64bit DMA\n");
588 // Philips, Intel, and maybe others need CMD_RUN before the
589 // root hub will detect new devices (why?); NEC doesn't
590 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
591 ehci->command |= CMD_RUN;
592 ehci_writel(ehci, ehci->command, &ehci->regs->command);
593 dbg_cmd (ehci, "init", ehci->command);
596 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
597 * are explicitly handed to companion controller(s), so no TT is
598 * involved with the root hub. (Except where one is integrated,
599 * and there's no companion controller unless maybe for USB OTG.)
601 * Turning on the CF flag will transfer ownership of all ports
602 * from the companions to the EHCI controller. If any of the
603 * companions are in the middle of a port reset at the time, it
604 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
605 * guarantees that no resets are in progress. After we set CF,
606 * a short delay lets the hardware catch up; new resets shouldn't
607 * be started before the port switching actions could complete.
609 down_write(&ehci_cf_port_reset_rwsem);
610 hcd->state = HC_STATE_RUNNING;
611 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
612 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
614 up_write(&ehci_cf_port_reset_rwsem);
616 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
618 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
619 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
620 temp >> 8, temp & 0xff, DRIVER_VERSION,
621 ignore_oc ? ", overcurrent ignored" : "");
623 ehci_writel(ehci, INTR_MASK,
624 &ehci->regs->intr_enable); /* Turn On Interrupts */
626 /* GRR this is run-once init(), being done every time the HC starts.
627 * So long as they're part of class devices, we can't do it init()
628 * since the class device isn't created that early.
630 create_debug_files(ehci);
631 create_companion_file(ehci);
636 /*-------------------------------------------------------------------------*/
638 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
640 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
641 u32 status, pcd_status = 0, cmd;
644 spin_lock (&ehci->lock);
646 status = ehci_readl(ehci, &ehci->regs->status);
648 /* e.g. cardbus physical eject */
649 if (status == ~(u32) 0) {
650 ehci_dbg (ehci, "device removed\n");
655 if (!status) { /* irq sharing? */
656 spin_unlock(&ehci->lock);
660 /* clear (just) interrupts */
661 ehci_writel(ehci, status, &ehci->regs->status);
662 cmd = ehci_readl(ehci, &ehci->regs->command);
666 /* unrequested/ignored: Frame List Rollover */
667 dbg_status (ehci, "irq", status);
670 /* INT, ERR, and IAA interrupt rates can be throttled */
672 /* normal [4.15.1.2] or error [4.15.1.1] completion */
673 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
674 if (likely ((status & STS_ERR) == 0))
675 COUNT (ehci->stats.normal);
677 COUNT (ehci->stats.error);
681 /* complete the unlinking of some qh [4.15.2.3] */
682 if (status & STS_IAA) {
683 /* guard against (alleged) silicon errata */
684 if (cmd & CMD_IAAD) {
685 ehci_writel(ehci, cmd & ~CMD_IAAD,
686 &ehci->regs->command);
687 ehci_dbg(ehci, "IAA with IAAD still set?\n");
690 COUNT(ehci->stats.reclaim);
691 end_unlink_async(ehci);
693 ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
696 /* remote wakeup [4.3.1] */
697 if (status & STS_PCD) {
698 unsigned i = HCS_N_PORTS (ehci->hcs_params);
700 /* kick root hub later */
703 /* resume root hub? */
704 if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
705 usb_hcd_resume_root_hub(hcd);
708 int pstatus = ehci_readl(ehci,
709 &ehci->regs->port_status [i]);
711 if (pstatus & PORT_OWNER)
713 if (!(pstatus & PORT_RESUME)
714 || ehci->reset_done [i] != 0)
717 /* start 20 msec resume signaling from this port,
718 * and make khubd collect PORT_STAT_C_SUSPEND to
719 * stop that signaling.
721 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
722 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
723 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
727 /* PCI errors [4.15.2.4] */
728 if (unlikely ((status & STS_FATAL) != 0)) {
729 dbg_cmd (ehci, "fatal", ehci_readl(ehci,
730 &ehci->regs->command));
731 dbg_status (ehci, "fatal", status);
732 if (status & STS_HALT) {
733 ehci_err (ehci, "fatal error\n");
736 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
737 /* generic layer kills/unlinks all urbs, then
738 * uses ehci_stop to clean up the rest
746 spin_unlock (&ehci->lock);
748 usb_hcd_poll_rh_status(hcd);
752 /*-------------------------------------------------------------------------*/
755 * non-error returns are a promise to giveback() the urb later
756 * we drop ownership so next owner (or urb unlink) can get it
758 * urb + dev is in hcd.self.controller.urb_list
759 * we're queueing TDs onto software and hardware lists
761 * hcd-specific init for hcpriv hasn't been done yet
763 * NOTE: control, bulk, and interrupt share the same code to append TDs
764 * to a (possibly active) QH, and the same QH scanning code.
766 static int ehci_urb_enqueue (
771 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
772 struct list_head qtd_list;
774 INIT_LIST_HEAD (&qtd_list);
776 switch (usb_pipetype (urb->pipe)) {
778 /* qh_completions() code doesn't handle all the fault cases
779 * in multi-TD control transfers. Even 1KB is rare anyway.
781 if (urb->transfer_buffer_length > (16 * 1024))
784 /* case PIPE_BULK: */
786 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
788 return submit_async(ehci, urb, &qtd_list, mem_flags);
791 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
793 return intr_submit(ehci, urb, &qtd_list, mem_flags);
795 case PIPE_ISOCHRONOUS:
796 if (urb->dev->speed == USB_SPEED_HIGH)
797 return itd_submit (ehci, urb, mem_flags);
799 return sitd_submit (ehci, urb, mem_flags);
803 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
806 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
807 end_unlink_async(ehci);
809 /* if it's not linked then there's nothing to do */
810 if (qh->qh_state != QH_STATE_LINKED)
813 /* defer till later if busy */
814 else if (ehci->reclaim) {
815 struct ehci_qh *last;
817 for (last = ehci->reclaim;
819 last = last->reclaim)
821 qh->qh_state = QH_STATE_UNLINK_WAIT;
824 /* start IAA cycle */
826 start_unlink_async (ehci, qh);
829 /* remove from hardware lists
830 * completions normally happen asynchronously
833 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
835 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
840 spin_lock_irqsave (&ehci->lock, flags);
841 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
845 switch (usb_pipetype (urb->pipe)) {
846 // case PIPE_CONTROL:
849 qh = (struct ehci_qh *) urb->hcpriv;
852 switch (qh->qh_state) {
853 case QH_STATE_LINKED:
854 case QH_STATE_COMPLETING:
855 unlink_async(ehci, qh);
857 case QH_STATE_UNLINK:
858 case QH_STATE_UNLINK_WAIT:
859 /* already started */
868 qh = (struct ehci_qh *) urb->hcpriv;
871 switch (qh->qh_state) {
872 case QH_STATE_LINKED:
873 intr_deschedule (ehci, qh);
876 qh_completions (ehci, qh);
879 ehci_dbg (ehci, "bogus qh %p state %d\n",
884 /* reschedule QH iff another request is queued */
885 if (!list_empty (&qh->qtd_list)
886 && HC_IS_RUNNING (hcd->state)) {
887 rc = qh_schedule(ehci, qh);
889 /* An error here likely indicates handshake failure
890 * or no space left in the schedule. Neither fault
891 * should happen often ...
893 * FIXME kill the now-dysfunctional queued urbs
897 "can't reschedule qh %p, err %d",
902 case PIPE_ISOCHRONOUS:
905 // wait till next completion, do it then.
906 // completion irqs can wait up to 1024 msec,
910 spin_unlock_irqrestore (&ehci->lock, flags);
914 /*-------------------------------------------------------------------------*/
916 // bulk qh holds the data toggle
919 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
921 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
923 struct ehci_qh *qh, *tmp;
925 /* ASSERT: any requests/urbs are being unlinked */
926 /* ASSERT: nobody can be submitting urbs for this any more */
929 spin_lock_irqsave (&ehci->lock, flags);
934 /* endpoints can be iso streams. for now, we don't
935 * accelerate iso completions ... so spin a while.
937 if (qh->hw_info1 == 0) {
938 ehci_vdbg (ehci, "iso delay\n");
942 if (!HC_IS_RUNNING (hcd->state))
943 qh->qh_state = QH_STATE_IDLE;
944 switch (qh->qh_state) {
945 case QH_STATE_LINKED:
946 for (tmp = ehci->async->qh_next.qh;
948 tmp = tmp->qh_next.qh)
950 /* periodic qh self-unlinks on empty */
953 unlink_async (ehci, qh);
955 case QH_STATE_UNLINK: /* wait for hw to finish? */
956 case QH_STATE_UNLINK_WAIT:
958 spin_unlock_irqrestore (&ehci->lock, flags);
959 schedule_timeout_uninterruptible(1);
961 case QH_STATE_IDLE: /* fully unlinked */
962 if (list_empty (&qh->qtd_list)) {
966 /* else FALL THROUGH */
969 /* caller was supposed to have unlinked any requests;
970 * that's not our job. just leak this memory.
972 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
973 qh, ep->desc.bEndpointAddress, qh->qh_state,
974 list_empty (&qh->qtd_list) ? "" : "(has tds)");
979 spin_unlock_irqrestore (&ehci->lock, flags);
983 static int ehci_get_frame (struct usb_hcd *hcd)
985 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
986 return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
990 /*-------------------------------------------------------------------------*/
992 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
994 MODULE_DESCRIPTION (DRIVER_INFO);
995 MODULE_AUTHOR (DRIVER_AUTHOR);
996 MODULE_LICENSE ("GPL");
999 #include "ehci-pci.c"
1000 #define PCI_DRIVER ehci_pci_driver
1003 #ifdef CONFIG_USB_EHCI_FSL
1004 #include "ehci-fsl.c"
1005 #define PLATFORM_DRIVER ehci_fsl_driver
1008 #ifdef CONFIG_SOC_AU1200
1009 #include "ehci-au1xxx.c"
1010 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1013 #ifdef CONFIG_PPC_PS3
1014 #include "ehci-ps3.c"
1015 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1018 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
1019 #include "ehci-ppc-soc.c"
1020 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1023 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1024 #include "ehci-ppc-of.c"
1025 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1028 #ifdef CONFIG_PLAT_ORION
1029 #include "ehci-orion.c"
1030 #define PLATFORM_DRIVER ehci_orion_driver
1033 #ifdef CONFIG_ARCH_IXP4XX
1034 #include "ehci-ixp4xx.c"
1035 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1038 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1039 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1040 #error "missing bus glue for ehci-hcd"
1043 static int __init ehci_hcd_init(void)
1047 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1049 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1050 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1053 ehci_debug_root = debugfs_create_dir("ehci", NULL);
1054 if (!ehci_debug_root)
1058 #ifdef PLATFORM_DRIVER
1059 retval = platform_driver_register(&PLATFORM_DRIVER);
1065 retval = pci_register_driver(&PCI_DRIVER);
1070 #ifdef PS3_SYSTEM_BUS_DRIVER
1071 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1076 #ifdef OF_PLATFORM_DRIVER
1077 retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1083 #ifdef OF_PLATFORM_DRIVER
1084 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1087 #ifdef PS3_SYSTEM_BUS_DRIVER
1088 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1092 pci_unregister_driver(&PCI_DRIVER);
1095 #ifdef PLATFORM_DRIVER
1096 platform_driver_unregister(&PLATFORM_DRIVER);
1100 debugfs_remove(ehci_debug_root);
1101 ehci_debug_root = NULL;
1105 module_init(ehci_hcd_init);
1107 static void __exit ehci_hcd_cleanup(void)
1109 #ifdef OF_PLATFORM_DRIVER
1110 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1112 #ifdef PLATFORM_DRIVER
1113 platform_driver_unregister(&PLATFORM_DRIVER);
1116 pci_unregister_driver(&PCI_DRIVER);
1118 #ifdef PS3_SYSTEM_BUS_DRIVER
1119 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1122 debugfs_remove(ehci_debug_root);
1125 module_exit(ehci_hcd_cleanup);