drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47
  48 #if defined(CONFIG_PPC_PS3)
  49 #include <asm/firmware.h>
  50 #endif
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /*
  55  * EHCI hc_driver implementation ... experimental, incomplete.
  56  * Based on the final 1.0 register interface specification.
  57  *
  58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60  * Next comes "CardBay", using USB 2.0 signals.
  61  *
  62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63  * Special thanks to Intel and VIA for providing host controllers to
  64  * test this driver on, and Cypress (including In-System Design) for
  65  * providing early devices for those host controllers to talk to!
  66  */
  67
  68 #define DRIVER_AUTHOR "David Brownell"
  69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71 static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74 #undef VERBOSE_DEBUG
  75 #undef EHCI_URB_TRACE
  76
  77 /* magic numbers that can affect system performance */
  78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  80 #define EHCI_TUNE_RL_TT         0
  81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  82 #define EHCI_TUNE_MULT_TT       1
  83 /*
  84  * Some drivers think it's safe to schedule isochronous transfers more than
  85  * 256 ms into the future (partly as a result of an old bug in the scheduling
  86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  87  * length of 512 frames instead of 256.
  88  */
  89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  90
  91 /* Initial IRQ latency:  faster than hw default */
  92 static int log2_irq_thresh = 0;         // 0 to 6
  93 module_param (log2_irq_thresh, int, S_IRUGO);
  94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  95
  96 /* initial park setting:  slower than hw default */
  97 static unsigned park = 0;
  98 module_param (park, uint, S_IRUGO);
  99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 100
 101 /* for flakey hardware, ignore overcurrent indicators */
 102 static bool ignore_oc = 0;
 103 module_param (ignore_oc, bool, S_IRUGO);
 104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 105
 106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 107
 108 /*-------------------------------------------------------------------------*/
 109
 110 #include "ehci.h"
 111 #include "pci-quirks.h"
 112
 113 /*
 114  * The MosChip MCS9990 controller updates its microframe counter
 115  * a little before the frame counter, and occasionally we will read
 116  * the invalid intermediate value.  Avoid problems by checking the
 117  * microframe number (the low-order 3 bits); if they are 0 then
 118  * re-read the register to get the correct value.
 119  */
 120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 121 {
 122         unsigned uf;
 123
 124         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 125         if (unlikely((uf & 7) == 0))
 126                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127         return uf;
 128 }
 129
 130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 131 {
 132         if (ehci->frame_index_bug)
 133                 return ehci_moschip_read_frame_index(ehci);
 134         return ehci_readl(ehci, &ehci->regs->frame_index);
 135 }
 136
 137 #include "ehci-dbg.c"
 138
 139 /*-------------------------------------------------------------------------*/
 140
 141 /*
 142  * handshake - spin reading hc until handshake completes or fails
 143  * @ptr: address of hc register to be read
 144  * @mask: bits to look at in result of read
 145  * @done: value of those bits when handshake succeeds
 146  * @usec: timeout in microseconds
 147  *
 148  * Returns negative errno, or zero on success
 149  *
 150  * Success happens when the "mask" bits have the specified value (hardware
 151  * handshake done).  There are two failure modes:  "usec" have passed (major
 152  * hardware flakeout), or the register reads as all-ones (hardware removed).
 153  *
 154  * That last failure should_only happen in cases like physical cardbus eject
 155  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 156  * bridge shutdown:  shutting down the bridge before the devices using it.
 157  */
 158 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 159                       u32 mask, u32 done, int usec)
 160 {
 161         u32     result;
 162
 163         do {
 164                 result = ehci_readl(ehci, ptr);
 165                 if (result == ~(u32)0)          /* card removed */
 166                         return -ENODEV;
 167                 result &= mask;
 168                 if (result == done)
 169                         return 0;
 170                 udelay (1);
 171                 usec--;
 172         } while (usec > 0);
 173         return -ETIMEDOUT;
 174 }
 175
 176 /* check TDI/ARC silicon is in host mode */
 177 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 178 {
 179         u32             tmp;
 180
 181         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 182         return (tmp & 3) == USBMODE_CM_HC;
 183 }
 184
 185 /*
 186  * Force HC to halt state from unknown (EHCI spec section 2.3).
 187  * Must be called with interrupts enabled and the lock not held.
 188  */
 189 static int ehci_halt (struct ehci_hcd *ehci)
 190 {
 191         u32     temp;
 192
 193         spin_lock_irq(&ehci->lock);
 194
 195         /* disable any irqs left enabled by previous code */
 196         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 197
 198         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 199                 spin_unlock_irq(&ehci->lock);
 200                 return 0;
 201         }
 202
 203         /*
 204          * This routine gets called during probe before ehci->command
 205          * has been initialized, so we can't rely on its value.
 206          */
 207         ehci->command &= ~CMD_RUN;
 208         temp = ehci_readl(ehci, &ehci->regs->command);
 209         temp &= ~(CMD_RUN | CMD_IAAD);
 210         ehci_writel(ehci, temp, &ehci->regs->command);
 211
 212         spin_unlock_irq(&ehci->lock);
 213         synchronize_irq(ehci_to_hcd(ehci)->irq);
 214
 215         return handshake(ehci, &ehci->regs->status,
 216                           STS_HALT, STS_HALT, 16 * 125);
 217 }
 218
 219 /* put TDI/ARC silicon into EHCI mode */
 220 static void tdi_reset (struct ehci_hcd *ehci)
 221 {
 222         u32             tmp;
 223
 224         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 225         tmp |= USBMODE_CM_HC;
 226         /* The default byte access to MMR space is LE after
 227          * controller reset. Set the required endian mode
 228          * for transfer buffers to match the host microprocessor
 229          */
 230         if (ehci_big_endian_mmio(ehci))
 231                 tmp |= USBMODE_BE;
 232         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 233 }
 234
 235 /*
 236  * Reset a non-running (STS_HALT == 1) controller.
 237  * Must be called with interrupts enabled and the lock not held.
 238  */
 239 static int ehci_reset (struct ehci_hcd *ehci)
 240 {
 241         int     retval;
 242         u32     command = ehci_readl(ehci, &ehci->regs->command);
 243
 244         /* If the EHCI debug controller is active, special care must be
 245          * taken before and after a host controller reset */
 246         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 247                 ehci->debug = NULL;
 248
 249         command |= CMD_RESET;
 250         dbg_cmd (ehci, "reset", command);
 251         ehci_writel(ehci, command, &ehci->regs->command);
 252         ehci->rh_state = EHCI_RH_HALTED;
 253         ehci->next_statechange = jiffies;
 254         retval = handshake (ehci, &ehci->regs->command,
 255                             CMD_RESET, 0, 250 * 1000);
 256
 257         if (ehci->has_hostpc) {
 258                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 259                                 &ehci->regs->usbmode_ex);
 260                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 261         }
 262         if (retval)
 263                 return retval;
 264
 265         if (ehci_is_TDI(ehci))
 266                 tdi_reset (ehci);
 267
 268         if (ehci->debug)
 269                 dbgp_external_startup(ehci_to_hcd(ehci));
 270
 271         ehci->port_c_suspend = ehci->suspended_ports =
 272                         ehci->resuming_ports = 0;
 273         return retval;
 274 }
 275
 276 /*
 277  * Idle the controller (turn off the schedules).
 278  * Must be called with interrupts enabled and the lock not held.
 279  */
 280 static void ehci_quiesce (struct ehci_hcd *ehci)
 281 {
 282         u32     temp;
 283
 284         if (ehci->rh_state != EHCI_RH_RUNNING)
 285                 return;
 286
 287         /* wait for any schedule enables/disables to take effect */
 288         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 289         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
 290
 291         /* then disable anything that's still active */
 292         spin_lock_irq(&ehci->lock);
 293         ehci->command &= ~(CMD_ASE | CMD_PSE);
 294         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 295         spin_unlock_irq(&ehci->lock);
 296
 297         /* hardware can take 16 microframes to turn off ... */
 298         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
 299 }
 300
 301 /*-------------------------------------------------------------------------*/
 302
 303 static void end_unlink_async(struct ehci_hcd *ehci);
 304 static void unlink_empty_async(struct ehci_hcd *ehci);
 305 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
 306 static void ehci_work(struct ehci_hcd *ehci);
 307 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 308 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 309
 310 #include "ehci-timer.c"
 311 #include "ehci-hub.c"
 312 #include "ehci-mem.c"
 313 #include "ehci-q.c"
 314 #include "ehci-sched.c"
 315 #include "ehci-sysfs.c"
 316
 317 /*-------------------------------------------------------------------------*/
 318
 319 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 320  * The firmware seems to think that powering off is a wakeup event!
 321  * This routine turns off remote wakeup and everything else, on all ports.
 322  */
 323 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 324 {
 325         int     port = HCS_N_PORTS(ehci->hcs_params);
 326
 327         while (port--)
 328                 ehci_writel(ehci, PORT_RWC_BITS,
 329                                 &ehci->regs->port_status[port]);
 330 }
 331
 332 /*
 333  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 334  * Must be called with interrupts enabled and the lock not held.
 335  */
 336 static void ehci_silence_controller(struct ehci_hcd *ehci)
 337 {
 338         ehci_halt(ehci);
 339
 340         spin_lock_irq(&ehci->lock);
 341         ehci->rh_state = EHCI_RH_HALTED;
 342         ehci_turn_off_all_ports(ehci);
 343
 344         /* make BIOS/etc use companion controller during reboot */
 345         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 346
 347         /* unblock posted writes */
 348         ehci_readl(ehci, &ehci->regs->configured_flag);
 349         spin_unlock_irq(&ehci->lock);
 350 }
 351
 352 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 353  * This forcibly disables dma and IRQs, helping kexec and other cases
 354  * where the next system software may expect clean state.
 355  */
 356 static void ehci_shutdown(struct usb_hcd *hcd)
 357 {
 358         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 359
 360         spin_lock_irq(&ehci->lock);
 361         ehci->shutdown = true;
 362         ehci->rh_state = EHCI_RH_STOPPING;
 363         ehci->enabled_hrtimer_events = 0;
 364         spin_unlock_irq(&ehci->lock);
 365
 366         ehci_silence_controller(ehci);
 367
 368         hrtimer_cancel(&ehci->hrtimer);
 369 }
 370
 371 /*-------------------------------------------------------------------------*/
 372
 373 /*
 374  * ehci_work is called from some interrupts, timers, and so on.
 375  * it calls driver completion functions, after dropping ehci->lock.
 376  */
 377 static void ehci_work (struct ehci_hcd *ehci)
 378 {
 379         /* another CPU may drop ehci->lock during a schedule scan while
 380          * it reports urb completions.  this flag guards against bogus
 381          * attempts at re-entrant schedule scanning.
 382          */
 383         if (ehci->scanning) {
 384                 ehci->need_rescan = true;
 385                 return;
 386         }
 387         ehci->scanning = true;
 388
 389  rescan:
 390         ehci->need_rescan = false;
 391         if (ehci->async_count)
 392                 scan_async(ehci);
 393         if (ehci->intr_count > 0)
 394                 scan_intr(ehci);
 395         if (ehci->isoc_count > 0)
 396                 scan_isoc(ehci);
 397         if (ehci->need_rescan)
 398                 goto rescan;
 399         ehci->scanning = false;
 400
 401         /* the IO watchdog guards against hardware or driver bugs that
 402          * misplace IRQs, and should let us run completely without IRQs.
 403          * such lossage has been observed on both VT6202 and VT8235.
 404          */
 405         turn_on_io_watchdog(ehci);
 406 }
 407
 408 /*
 409  * Called when the ehci_hcd module is removed.
 410  */
 411 static void ehci_stop (struct usb_hcd *hcd)
 412 {
 413         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 414
 415         ehci_dbg (ehci, "stop\n");
 416
 417         /* no more interrupts ... */
 418
 419         spin_lock_irq(&ehci->lock);
 420         ehci->enabled_hrtimer_events = 0;
 421         spin_unlock_irq(&ehci->lock);
 422
 423         ehci_quiesce(ehci);
 424         ehci_silence_controller(ehci);
 425         ehci_reset (ehci);
 426
 427         hrtimer_cancel(&ehci->hrtimer);
 428         remove_sysfs_files(ehci);
 429         remove_debug_files (ehci);
 430
 431         /* root hub is shut down separately (first, when possible) */
 432         spin_lock_irq (&ehci->lock);
 433         end_free_itds(ehci);
 434         spin_unlock_irq (&ehci->lock);
 435         ehci_mem_cleanup (ehci);
 436
 437         if (ehci->amd_pll_fix == 1)
 438                 usb_amd_dev_put();
 439
 440 #ifdef  EHCI_STATS
 441         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
 442                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
 443                 ehci->stats.lost_iaa);
 444         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 445                 ehci->stats.complete, ehci->stats.unlink);
 446 #endif
 447
 448         dbg_status (ehci, "ehci_stop completed",
 449                     ehci_readl(ehci, &ehci->regs->status));
 450 }
 451
 452 /* one-time init, only for memory state */
 453 static int ehci_init(struct usb_hcd *hcd)
 454 {
 455         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 456         u32                     temp;
 457         int                     retval;
 458         u32                     hcc_params;
 459         struct ehci_qh_hw       *hw;
 460
 461         spin_lock_init(&ehci->lock);
 462
 463         /*
 464          * keep io watchdog by default, those good HCDs could turn off it later
 465          */
 466         ehci->need_io_watchdog = 1;
 467
 468         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 469         ehci->hrtimer.function = ehci_hrtimer_func;
 470         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 471
 472         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 473
 474         /*
 475          * by default set standard 80% (== 100 usec/uframe) max periodic
 476          * bandwidth as required by USB 2.0
 477          */
 478         ehci->uframe_periodic_max = 100;
 479
 480         /*
 481          * hw default: 1K periodic list heads, one per frame.
 482          * periodic_size can shrink by USBCMD update if hcc_params allows.
 483          */
 484         ehci->periodic_size = DEFAULT_I_TDPS;
 485         INIT_LIST_HEAD(&ehci->intr_qh_list);
 486         INIT_LIST_HEAD(&ehci->cached_itd_list);
 487         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 488
 489         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 490                 /* periodic schedule size can be smaller than default */
 491                 switch (EHCI_TUNE_FLS) {
 492                 case 0: ehci->periodic_size = 1024; break;
 493                 case 1: ehci->periodic_size = 512; break;
 494                 case 2: ehci->periodic_size = 256; break;
 495                 default:        BUG();
 496                 }
 497         }
 498         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 499                 return retval;
 500
 501         /* controllers may cache some of the periodic schedule ... */
 502         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 503                 ehci->i_thresh = 0;
 504         else                                    // N microframes cached
 505                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 506
 507         /*
 508          * dedicate a qh for the async ring head, since we couldn't unlink
 509          * a 'real' qh without stopping the async schedule [4.8].  use it
 510          * as the 'reclamation list head' too.
 511          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 512          * from automatically advancing to the next td after short reads.
 513          */
 514         ehci->async->qh_next.qh = NULL;
 515         hw = ehci->async->hw;
 516         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 517         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 518 #if defined(CONFIG_PPC_PS3)
 519         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 520 #endif
 521         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 522         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 523         ehci->async->qh_state = QH_STATE_LINKED;
 524         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 525
 526         /* clear interrupt enables, set irq latency */
 527         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 528                 log2_irq_thresh = 0;
 529         temp = 1 << (16 + log2_irq_thresh);
 530         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 531                 ehci->has_ppcd = 1;
 532                 ehci_dbg(ehci, "enable per-port change event\n");
 533                 temp |= CMD_PPCEE;
 534         }
 535         if (HCC_CANPARK(hcc_params)) {
 536                 /* HW default park == 3, on hardware that supports it (like
 537                  * NVidia and ALI silicon), maximizes throughput on the async
 538                  * schedule by avoiding QH fetches between transfers.
 539                  *
 540                  * With fast usb storage devices and NForce2, "park" seems to
 541                  * make problems:  throughput reduction (!), data errors...
 542                  */
 543                 if (park) {
 544                         park = min(park, (unsigned) 3);
 545                         temp |= CMD_PARK;
 546                         temp |= park << 8;
 547                 }
 548                 ehci_dbg(ehci, "park %d\n", park);
 549         }
 550         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 551                 /* periodic schedule size can be smaller than default */
 552                 temp &= ~(3 << 2);
 553                 temp |= (EHCI_TUNE_FLS << 2);
 554         }
 555         ehci->command = temp;
 556
 557         /* Accept arbitrarily long scatter-gather lists */
 558         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 559                 hcd->self.sg_tablesize = ~0;
 560         return 0;
 561 }
 562
 563 /* start HC running; it's halted, ehci_init() has been run (once) */
 564 static int ehci_run (struct usb_hcd *hcd)
 565 {
 566         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 567         u32                     temp;
 568         u32                     hcc_params;
 569
 570         hcd->uses_new_polling = 1;
 571
 572         /* EHCI spec section 4.1 */
 573
 574         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 575         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 576
 577         /*
 578          * hcc_params controls whether ehci->regs->segment must (!!!)
 579          * be used; it constrains QH/ITD/SITD and QTD locations.
 580          * pci_pool consistent memory always uses segment zero.
 581          * streaming mappings for I/O buffers, like pci_map_single(),
 582          * can return segments above 4GB, if the device allows.
 583          *
 584          * NOTE:  the dma mask is visible through dma_supported(), so
 585          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 586          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 587          * host side drivers though.
 588          */
 589         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 590         if (HCC_64BIT_ADDR(hcc_params)) {
 591                 ehci_writel(ehci, 0, &ehci->regs->segment);
 592 #if 0
 593 // this is deeply broken on almost all architectures
 594                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 595                         ehci_info(ehci, "enabled 64bit DMA\n");
 596 #endif
 597         }
 598
 599
 600         // Philips, Intel, and maybe others need CMD_RUN before the
 601         // root hub will detect new devices (why?); NEC doesn't
 602         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 603         ehci->command |= CMD_RUN;
 604         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 605         dbg_cmd (ehci, "init", ehci->command);
 606
 607         /*
 608          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 609          * are explicitly handed to companion controller(s), so no TT is
 610          * involved with the root hub.  (Except where one is integrated,
 611          * and there's no companion controller unless maybe for USB OTG.)
 612          *
 613          * Turning on the CF flag will transfer ownership of all ports
 614          * from the companions to the EHCI controller.  If any of the
 615          * companions are in the middle of a port reset at the time, it
 616          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 617          * guarantees that no resets are in progress.  After we set CF,
 618          * a short delay lets the hardware catch up; new resets shouldn't
 619          * be started before the port switching actions could complete.
 620          */
 621         down_write(&ehci_cf_port_reset_rwsem);
 622         ehci->rh_state = EHCI_RH_RUNNING;
 623         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 624         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 625         msleep(5);
 626         up_write(&ehci_cf_port_reset_rwsem);
 627         ehci->last_periodic_enable = ktime_get_real();
 628
 629         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 630         ehci_info (ehci,
 631                 "USB %x.%x started, EHCI %x.%02x%s\n",
 632                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 633                 temp >> 8, temp & 0xff,
 634                 ignore_oc ? ", overcurrent ignored" : "");
 635
 636         ehci_writel(ehci, INTR_MASK,
 637                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 638
 639         /* GRR this is run-once init(), being done every time the HC starts.
 640          * So long as they're part of class devices, we can't do it init()
 641          * since the class device isn't created that early.
 642          */
 643         create_debug_files(ehci);
 644         create_sysfs_files(ehci);
 645
 646         return 0;
 647 }
 648
 649 int ehci_setup(struct usb_hcd *hcd)
 650 {
 651         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 652         int retval;
 653
 654         ehci->regs = (void __iomem *)ehci->caps +
 655             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 656         dbg_hcs_params(ehci, "reset");
 657         dbg_hcc_params(ehci, "reset");
 658
 659         /* cache this readonly data; minimize chip reads */
 660         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 661
 662         ehci->sbrn = HCD_USB2;
 663
 664         /* data structure init */
 665         retval = ehci_init(hcd);
 666         if (retval)
 667                 return retval;
 668
 669         retval = ehci_halt(ehci);
 670         if (retval)
 671                 return retval;
 672
 673         if (ehci_is_TDI(ehci))
 674                 tdi_reset(ehci);
 675
 676         ehci_reset(ehci);
 677
 678         return 0;
 679 }
 680 EXPORT_SYMBOL_GPL(ehci_setup);
 681
 682 /*-------------------------------------------------------------------------*/
 683
 684 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 685 {
 686         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 687         u32                     status, masked_status, pcd_status = 0, cmd;
 688         int                     bh;
 689
 690         spin_lock (&ehci->lock);
 691
 692         status = ehci_readl(ehci, &ehci->regs->status);
 693
 694         /* e.g. cardbus physical eject */
 695         if (status == ~(u32) 0) {
 696                 ehci_dbg (ehci, "device removed\n");
 697                 goto dead;
 698         }
 699
 700         /*
 701          * We don't use STS_FLR, but some controllers don't like it to
 702          * remain on, so mask it out along with the other status bits.
 703          */
 704         masked_status = status & (INTR_MASK | STS_FLR);
 705
 706         /* Shared IRQ? */
 707         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 708                 spin_unlock(&ehci->lock);
 709                 return IRQ_NONE;
 710         }
 711
 712         /* clear (just) interrupts */
 713         ehci_writel(ehci, masked_status, &ehci->regs->status);
 714         cmd = ehci_readl(ehci, &ehci->regs->command);
 715         bh = 0;
 716
 717 #ifdef  VERBOSE_DEBUG
 718         /* unrequested/ignored: Frame List Rollover */
 719         dbg_status (ehci, "irq", status);
 720 #endif
 721
 722         /* INT, ERR, and IAA interrupt rates can be throttled */
 723
 724         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 725         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 726                 if (likely ((status & STS_ERR) == 0))
 727                         COUNT (ehci->stats.normal);
 728                 else
 729                         COUNT (ehci->stats.error);
 730                 bh = 1;
 731         }
 732
 733         /* complete the unlinking of some qh [4.15.2.3] */
 734         if (status & STS_IAA) {
 735
 736                 /* Turn off the IAA watchdog */
 737                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 738
 739                 /*
 740                  * Mild optimization: Allow another IAAD to reset the
 741                  * hrtimer, if one occurs before the next expiration.
 742                  * In theory we could always cancel the hrtimer, but
 743                  * tests show that about half the time it will be reset
 744                  * for some other event anyway.
 745                  */
 746                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 747                         ++ehci->next_hrtimer_event;
 748
 749                 /* guard against (alleged) silicon errata */
 750                 if (cmd & CMD_IAAD)
 751                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 752                 if (ehci->async_iaa)
 753                         COUNT(ehci->stats.iaa);
 754                 end_unlink_async(ehci);
 755         }
 756
 757         /* remote wakeup [4.3.1] */
 758         if (status & STS_PCD) {
 759                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 760                 u32             ppcd = ~0;
 761
 762                 /* kick root hub later */
 763                 pcd_status = status;
 764
 765                 /* resume root hub? */
 766                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 767                         usb_hcd_resume_root_hub(hcd);
 768
 769                 /* get per-port change detect bits */
 770                 if (ehci->has_ppcd)
 771                         ppcd = status >> 16;
 772
 773                 while (i--) {
 774                         int pstatus;
 775
 776                         /* leverage per-port change bits feature */
 777                         if (!(ppcd & (1 << i)))
 778                                 continue;
 779                         pstatus = ehci_readl(ehci,
 780                                          &ehci->regs->port_status[i]);
 781
 782                         if (pstatus & PORT_OWNER)
 783                                 continue;
 784                         if (!(test_bit(i, &ehci->suspended_ports) &&
 785                                         ((pstatus & PORT_RESUME) ||
 786                                                 !(pstatus & PORT_SUSPEND)) &&
 787                                         (pstatus & PORT_PE) &&
 788                                         ehci->reset_done[i] == 0))
 789                                 continue;
 790
 791                         /* start 20 msec resume signaling from this port,
 792                          * and make khubd collect PORT_STAT_C_SUSPEND to
 793                          * stop that signaling.  Use 5 ms extra for safety,
 794                          * like usb_port_resume() does.
 795                          */
 796                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 797                         set_bit(i, &ehci->resuming_ports);
 798                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 799                         usb_hcd_start_port_resume(&hcd->self, i);
 800                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 801                 }
 802         }
 803
 804         /* PCI errors [4.15.2.4] */
 805         if (unlikely ((status & STS_FATAL) != 0)) {
 806                 ehci_err(ehci, "fatal error\n");
 807                 dbg_cmd(ehci, "fatal", cmd);
 808                 dbg_status(ehci, "fatal", status);
 809 dead:
 810                 usb_hc_died(hcd);
 811
 812                 /* Don't let the controller do anything more */
 813                 ehci->shutdown = true;
 814                 ehci->rh_state = EHCI_RH_STOPPING;
 815                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 816                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 817                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 818                 ehci_handle_controller_death(ehci);
 819
 820                 /* Handle completions when the controller stops */
 821                 bh = 0;
 822         }
 823
 824         if (bh)
 825                 ehci_work (ehci);
 826         spin_unlock (&ehci->lock);
 827         if (pcd_status)
 828                 usb_hcd_poll_rh_status(hcd);
 829         return IRQ_HANDLED;
 830 }
 831
 832 /*-------------------------------------------------------------------------*/
 833
 834 /*
 835  * non-error returns are a promise to giveback() the urb later
 836  * we drop ownership so next owner (or urb unlink) can get it
 837  *
 838  * urb + dev is in hcd.self.controller.urb_list
 839  * we're queueing TDs onto software and hardware lists
 840  *
 841  * hcd-specific init for hcpriv hasn't been done yet
 842  *
 843  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 844  * to a (possibly active) QH, and the same QH scanning code.
 845  */
 846 static int ehci_urb_enqueue (
 847         struct usb_hcd  *hcd,
 848         struct urb      *urb,
 849         gfp_t           mem_flags
 850 ) {
 851         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 852         struct list_head        qtd_list;
 853
 854         INIT_LIST_HEAD (&qtd_list);
 855
 856         switch (usb_pipetype (urb->pipe)) {
 857         case PIPE_CONTROL:
 858                 /* qh_completions() code doesn't handle all the fault cases
 859                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 860                  */
 861                 if (urb->transfer_buffer_length > (16 * 1024))
 862                         return -EMSGSIZE;
 863                 /* FALLTHROUGH */
 864         /* case PIPE_BULK: */
 865         default:
 866                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 867                         return -ENOMEM;
 868                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 869
 870         case PIPE_INTERRUPT:
 871                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 872                         return -ENOMEM;
 873                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 874
 875         case PIPE_ISOCHRONOUS:
 876                 if (urb->dev->speed == USB_SPEED_HIGH)
 877                         return itd_submit (ehci, urb, mem_flags);
 878                 else
 879                         return sitd_submit (ehci, urb, mem_flags);
 880         }
 881 }
 882
 883 /* remove from hardware lists
 884  * completions normally happen asynchronously
 885  */
 886
 887 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 888 {
 889         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 890         struct ehci_qh          *qh;
 891         unsigned long           flags;
 892         int                     rc;
 893
 894         spin_lock_irqsave (&ehci->lock, flags);
 895         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 896         if (rc)
 897                 goto done;
 898
 899         switch (usb_pipetype (urb->pipe)) {
 900         // case PIPE_CONTROL:
 901         // case PIPE_BULK:
 902         default:
 903                 qh = (struct ehci_qh *) urb->hcpriv;
 904                 if (!qh)
 905                         break;
 906                 qh->exception = 1;
 907                 switch (qh->qh_state) {
 908                 case QH_STATE_LINKED:
 909                         start_unlink_async(ehci, qh);
 910                         break;
 911                 case QH_STATE_COMPLETING:
 912                         qh->dequeue_during_giveback = 1;
 913                         break;
 914                 case QH_STATE_UNLINK:
 915                 case QH_STATE_UNLINK_WAIT:
 916                         /* already started */
 917                         break;
 918                 case QH_STATE_IDLE:
 919                         /* QH might be waiting for a Clear-TT-Buffer */
 920                         qh_completions(ehci, qh);
 921                         break;
 922                 }
 923                 break;
 924
 925         case PIPE_INTERRUPT:
 926                 qh = (struct ehci_qh *) urb->hcpriv;
 927                 if (!qh)
 928                         break;
 929                 qh->exception = 1;
 930                 switch (qh->qh_state) {
 931                 case QH_STATE_LINKED:
 932                         start_unlink_intr(ehci, qh);
 933                         break;
 934                 case QH_STATE_COMPLETING:
 935                         qh->dequeue_during_giveback = 1;
 936                         break;
 937                 case QH_STATE_IDLE:
 938                         qh_completions (ehci, qh);
 939                         break;
 940                 default:
 941                         ehci_dbg (ehci, "bogus qh %p state %d\n",
 942                                         qh, qh->qh_state);
 943                         goto done;
 944                 }
 945                 break;
 946
 947         case PIPE_ISOCHRONOUS:
 948                 // itd or sitd ...
 949
 950                 // wait till next completion, do it then.
 951                 // completion irqs can wait up to 1024 msec,
 952                 break;
 953         }
 954 done:
 955         spin_unlock_irqrestore (&ehci->lock, flags);
 956         return rc;
 957 }
 958
 959 /*-------------------------------------------------------------------------*/
 960
 961 // bulk qh holds the data toggle
 962
 963 static void
 964 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 965 {
 966         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 967         unsigned long           flags;
 968         struct ehci_qh          *qh, *tmp;
 969
 970         /* ASSERT:  any requests/urbs are being unlinked */
 971         /* ASSERT:  nobody can be submitting urbs for this any more */
 972
 973 rescan:
 974         spin_lock_irqsave (&ehci->lock, flags);
 975         qh = ep->hcpriv;
 976         if (!qh)
 977                 goto done;
 978
 979         /* endpoints can be iso streams.  for now, we don't
 980          * accelerate iso completions ... so spin a while.
 981          */
 982         if (qh->hw == NULL) {
 983                 struct ehci_iso_stream  *stream = ep->hcpriv;
 984
 985                 if (!list_empty(&stream->td_list))
 986                         goto idle_timeout;
 987
 988                 /* BUG_ON(!list_empty(&stream->free_list)); */
 989                 kfree(stream);
 990                 goto done;
 991         }
 992
 993         qh->exception = 1;
 994         if (ehci->rh_state < EHCI_RH_RUNNING)
 995                 qh->qh_state = QH_STATE_IDLE;
 996         switch (qh->qh_state) {
 997         case QH_STATE_LINKED:
 998         case QH_STATE_COMPLETING:
 999                 for (tmp = ehci->async->qh_next.qh;
1000                                 tmp && tmp != qh;
1001                                 tmp = tmp->qh_next.qh)
1002                         continue;
1003                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1004                  * may already be unlinked.
1005                  */
1006                 if (tmp)
1007                         start_unlink_async(ehci, qh);
1008                 /* FALL THROUGH */
1009         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1010         case QH_STATE_UNLINK_WAIT:
1011 idle_timeout:
1012                 spin_unlock_irqrestore (&ehci->lock, flags);
1013                 schedule_timeout_uninterruptible(1);
1014                 goto rescan;
1015         case QH_STATE_IDLE:             /* fully unlinked */
1016                 if (qh->clearing_tt)
1017                         goto idle_timeout;
1018                 if (list_empty (&qh->qtd_list)) {
1019                         qh_destroy(ehci, qh);
1020                         break;
1021                 }
1022                 /* else FALL THROUGH */
1023         default:
1024                 /* caller was supposed to have unlinked any requests;
1025                  * that's not our job.  just leak this memory.
1026                  */
1027                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1028                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1029                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1030                 break;
1031         }
1032  done:
1033         ep->hcpriv = NULL;
1034         spin_unlock_irqrestore (&ehci->lock, flags);
1035 }
1036
1037 static void
1038 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1039 {
1040         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1041         struct ehci_qh          *qh;
1042         int                     eptype = usb_endpoint_type(&ep->desc);
1043         int                     epnum = usb_endpoint_num(&ep->desc);
1044         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1045         unsigned long           flags;
1046
1047         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1048                 return;
1049
1050         spin_lock_irqsave(&ehci->lock, flags);
1051         qh = ep->hcpriv;
1052
1053         /* For Bulk and Interrupt endpoints we maintain the toggle state
1054          * in the hardware; the toggle bits in udev aren't used at all.
1055          * When an endpoint is reset by usb_clear_halt() we must reset
1056          * the toggle bit in the QH.
1057          */
1058         if (qh) {
1059                 usb_settoggle(qh->dev, epnum, is_out, 0);
1060                 if (!list_empty(&qh->qtd_list)) {
1061                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1062                 } else {
1063                         /* The toggle value in the QH can't be updated
1064                          * while the QH is active.  Unlink it now;
1065                          * re-linking will call qh_refresh().
1066                          */
1067                         qh->exception = 1;
1068                         if (eptype == USB_ENDPOINT_XFER_BULK)
1069                                 start_unlink_async(ehci, qh);
1070                         else
1071                                 start_unlink_intr(ehci, qh);
1072                 }
1073         }
1074         spin_unlock_irqrestore(&ehci->lock, flags);
1075 }
1076
1077 static int ehci_get_frame (struct usb_hcd *hcd)
1078 {
1079         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1080         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1081 }
1082
1083 /*-------------------------------------------------------------------------*/
1084
1085 #ifdef  CONFIG_PM
1086
1087 /* suspend/resume, section 4.3 */
1088
1089 /* These routines handle the generic parts of controller suspend/resume */
1090
1091 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1092 {
1093         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1094
1095         if (time_before(jiffies, ehci->next_statechange))
1096                 msleep(10);
1097
1098         /*
1099          * Root hub was already suspended.  Disable IRQ emission and
1100          * mark HW unaccessible.  The PM and USB cores make sure that
1101          * the root hub is either suspended or stopped.
1102          */
1103         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1104
1105         spin_lock_irq(&ehci->lock);
1106         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1107         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1108
1109         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1110         spin_unlock_irq(&ehci->lock);
1111
1112         return 0;
1113 }
1114 EXPORT_SYMBOL_GPL(ehci_suspend);
1115
1116 /* Returns 0 if power was preserved, 1 if power was lost */
1117 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1118 {
1119         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1120
1121         if (time_before(jiffies, ehci->next_statechange))
1122                 msleep(100);
1123
1124         /* Mark hardware accessible again as we are back to full power by now */
1125         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1126
1127         if (ehci->shutdown)
1128                 return 0;               /* Controller is dead */
1129
1130         /*
1131          * If CF is still set and we aren't resuming from hibernation
1132          * then we maintained suspend power.
1133          * Just undo the effect of ehci_suspend().
1134          */
1135         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1136                         !hibernated) {
1137                 int     mask = INTR_MASK;
1138
1139                 ehci_prepare_ports_for_controller_resume(ehci);
1140
1141                 spin_lock_irq(&ehci->lock);
1142                 if (ehci->shutdown)
1143                         goto skip;
1144
1145                 if (!hcd->self.root_hub->do_remote_wakeup)
1146                         mask &= ~STS_PCD;
1147                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1148                 ehci_readl(ehci, &ehci->regs->intr_enable);
1149  skip:
1150                 spin_unlock_irq(&ehci->lock);
1151                 return 0;
1152         }
1153
1154         /*
1155          * Else reset, to cope with power loss or resume from hibernation
1156          * having let the firmware kick in during reboot.
1157          */
1158         usb_root_hub_lost_power(hcd->self.root_hub);
1159         (void) ehci_halt(ehci);
1160         (void) ehci_reset(ehci);
1161
1162         spin_lock_irq(&ehci->lock);
1163         if (ehci->shutdown)
1164                 goto skip;
1165
1166         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1167         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1168         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1169
1170         ehci->rh_state = EHCI_RH_SUSPENDED;
1171         spin_unlock_irq(&ehci->lock);
1172
1173         return 1;
1174 }
1175 EXPORT_SYMBOL_GPL(ehci_resume);
1176
1177 #endif
1178
1179 /*-------------------------------------------------------------------------*/
1180
1181 /*
1182  * Generic structure: This gets copied for platform drivers so that
1183  * individual entries can be overridden as needed.
1184  */
1185
1186 static const struct hc_driver ehci_hc_driver = {
1187         .description =          hcd_name,
1188         .product_desc =         "EHCI Host Controller",
1189         .hcd_priv_size =        sizeof(struct ehci_hcd),
1190
1191         /*
1192          * generic hardware linkage
1193          */
1194         .irq =                  ehci_irq,
1195         .flags =                HCD_MEMORY | HCD_USB2,
1196
1197         /*
1198          * basic lifecycle operations
1199          */
1200         .reset =                ehci_setup,
1201         .start =                ehci_run,
1202         .stop =                 ehci_stop,
1203         .shutdown =             ehci_shutdown,
1204
1205         /*
1206          * managing i/o requests and associated device resources
1207          */
1208         .urb_enqueue =          ehci_urb_enqueue,
1209         .urb_dequeue =          ehci_urb_dequeue,
1210         .endpoint_disable =     ehci_endpoint_disable,
1211         .endpoint_reset =       ehci_endpoint_reset,
1212         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1213
1214         /*
1215          * scheduling support
1216          */
1217         .get_frame_number =     ehci_get_frame,
1218
1219         /*
1220          * root hub support
1221          */
1222         .hub_status_data =      ehci_hub_status_data,
1223         .hub_control =          ehci_hub_control,
1224         .bus_suspend =          ehci_bus_suspend,
1225         .bus_resume =           ehci_bus_resume,
1226         .relinquish_port =      ehci_relinquish_port,
1227         .port_handed_over =     ehci_port_handed_over,
1228 };
1229
1230 void ehci_init_driver(struct hc_driver *drv,
1231                 const struct ehci_driver_overrides *over)
1232 {
1233         /* Copy the generic table to drv and then apply the overrides */
1234         *drv = ehci_hc_driver;
1235
1236         if (over) {
1237                 drv->hcd_priv_size += over->extra_priv_size;
1238                 if (over->reset)
1239                         drv->reset = over->reset;
1240         }
1241 }
1242 EXPORT_SYMBOL_GPL(ehci_init_driver);
1243
1244 /*-------------------------------------------------------------------------*/
1245
1246 MODULE_DESCRIPTION(DRIVER_DESC);
1247 MODULE_AUTHOR (DRIVER_AUTHOR);
1248 MODULE_LICENSE ("GPL");
1249
1250 #ifdef CONFIG_USB_EHCI_FSL
1251 #include "ehci-fsl.c"
1252 #define PLATFORM_DRIVER         ehci_fsl_driver
1253 #endif
1254
1255 #ifdef CONFIG_USB_EHCI_SH
1256 #include "ehci-sh.c"
1257 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1258 #endif
1259
1260 #ifdef CONFIG_PPC_PS3
1261 #include "ehci-ps3.c"
1262 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1263 #endif
1264
1265 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1266 #include "ehci-ppc-of.c"
1267 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1268 #endif
1269
1270 #ifdef CONFIG_XPS_USB_HCD_XILINX
1271 #include "ehci-xilinx-of.c"
1272 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1273 #endif
1274
1275 #ifdef CONFIG_PLAT_ORION
1276 #include "ehci-orion.c"
1277 #define PLATFORM_DRIVER         ehci_orion_driver
1278 #endif
1279
1280 #ifdef CONFIG_USB_W90X900_EHCI
1281 #include "ehci-w90x900.c"
1282 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1283 #endif
1284
1285 #ifdef CONFIG_ARCH_AT91
1286 #include "ehci-atmel.c"
1287 #define PLATFORM_DRIVER         ehci_atmel_driver
1288 #endif
1289
1290 #ifdef CONFIG_USB_OCTEON_EHCI
1291 #include "ehci-octeon.c"
1292 #define PLATFORM_DRIVER         ehci_octeon_driver
1293 #endif
1294
1295 #ifdef CONFIG_ARCH_VT8500
1296 #include "ehci-vt8500.c"
1297 #define PLATFORM_DRIVER         vt8500_ehci_driver
1298 #endif
1299
1300 #ifdef CONFIG_PLAT_SPEAR
1301 #include "ehci-spear.c"
1302 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1303 #endif
1304
1305 #ifdef CONFIG_USB_EHCI_MSM
1306 #include "ehci-msm.c"
1307 #define PLATFORM_DRIVER         ehci_msm_driver
1308 #endif
1309
1310 #ifdef CONFIG_TILE_USB
1311 #include "ehci-tilegx.c"
1312 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1313 #endif
1314
1315 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1316 #include "ehci-pmcmsp.c"
1317 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1318 #endif
1319
1320 #ifdef CONFIG_USB_EHCI_TEGRA
1321 #include "ehci-tegra.c"
1322 #define PLATFORM_DRIVER         tegra_ehci_driver
1323 #endif
1324
1325 #ifdef CONFIG_USB_EHCI_S5P
1326 #include "ehci-s5p.c"
1327 #define PLATFORM_DRIVER         s5p_ehci_driver
1328 #endif
1329
1330 #ifdef CONFIG_SPARC_LEON
1331 #include "ehci-grlib.c"
1332 #define PLATFORM_DRIVER         ehci_grlib_driver
1333 #endif
1334
1335 #ifdef CONFIG_USB_EHCI_MV
1336 #include "ehci-mv.c"
1337 #define        PLATFORM_DRIVER         ehci_mv_driver
1338 #endif
1339
1340 #ifdef CONFIG_MIPS_SEAD3
1341 #include "ehci-sead3.c"
1342 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1343 #endif
1344
1345 #if !IS_ENABLED(CONFIG_USB_EHCI_PCI) && \
1346         !IS_ENABLED(CONFIG_USB_EHCI_HCD_PLATFORM) && \
1347         !IS_ENABLED(CONFIG_USB_CHIPIDEA_HOST) && \
1348         !IS_ENABLED(CONFIG_USB_EHCI_MXC) && \
1349         !IS_ENABLED(CONFIG_USB_EHCI_HCD_OMAP) && \
1350         !defined(PLATFORM_DRIVER) && \
1351         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1352         !defined(OF_PLATFORM_DRIVER) && \
1353         !defined(XILINX_OF_PLATFORM_DRIVER)
1354 #error "missing bus glue for ehci-hcd"
1355 #endif
1356
1357 static int __init ehci_hcd_init(void)
1358 {
1359         int retval = 0;
1360
1361         if (usb_disabled())
1362                 return -ENODEV;
1363
1364         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1365         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1366         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1367                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1368                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1369                                 " before uhci_hcd and ohci_hcd, not after\n");
1370
1371         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1372                  hcd_name,
1373                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1374                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1375
1376 #ifdef DEBUG
1377         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1378         if (!ehci_debug_root) {
1379                 retval = -ENOENT;
1380                 goto err_debug;
1381         }
1382 #endif
1383
1384 #ifdef PLATFORM_DRIVER
1385         retval = platform_driver_register(&PLATFORM_DRIVER);
1386         if (retval < 0)
1387                 goto clean0;
1388 #endif
1389
1390 #ifdef PS3_SYSTEM_BUS_DRIVER
1391         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1392         if (retval < 0)
1393                 goto clean2;
1394 #endif
1395
1396 #ifdef OF_PLATFORM_DRIVER
1397         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1398         if (retval < 0)
1399                 goto clean3;
1400 #endif
1401
1402 #ifdef XILINX_OF_PLATFORM_DRIVER
1403         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1404         if (retval < 0)
1405                 goto clean4;
1406 #endif
1407         return retval;
1408
1409 #ifdef XILINX_OF_PLATFORM_DRIVER
1410         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1411 clean4:
1412 #endif
1413 #ifdef OF_PLATFORM_DRIVER
1414         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1415 clean3:
1416 #endif
1417 #ifdef PS3_SYSTEM_BUS_DRIVER
1418         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1419 clean2:
1420 #endif
1421 #ifdef PLATFORM_DRIVER
1422         platform_driver_unregister(&PLATFORM_DRIVER);
1423 clean0:
1424 #endif
1425 #ifdef DEBUG
1426         debugfs_remove(ehci_debug_root);
1427         ehci_debug_root = NULL;
1428 err_debug:
1429 #endif
1430         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1431         return retval;
1432 }
1433 module_init(ehci_hcd_init);
1434
1435 static void __exit ehci_hcd_cleanup(void)
1436 {
1437 #ifdef XILINX_OF_PLATFORM_DRIVER
1438         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1439 #endif
1440 #ifdef OF_PLATFORM_DRIVER
1441         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1442 #endif
1443 #ifdef PLATFORM_DRIVER
1444         platform_driver_unregister(&PLATFORM_DRIVER);
1445 #endif
1446 #ifdef PS3_SYSTEM_BUS_DRIVER
1447         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1448 #endif
1449 #ifdef DEBUG
1450         debugfs_remove(ehci_debug_root);
1451 #endif
1452         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1453 }
1454 module_exit(ehci_hcd_cleanup);