2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/reboot.h>
34 #include <linux/usb.h>
35 #include <linux/moduleparam.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/debugfs.h>
39 #include "../core/hcd.h"
41 #include <asm/byteorder.h>
44 #include <asm/system.h>
45 #include <asm/unaligned.h>
47 /*-------------------------------------------------------------------------*/
50 * EHCI hc_driver implementation ... experimental, incomplete.
51 * Based on the final 1.0 register interface specification.
53 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
54 * First was PCMCIA, like ISA; then CardBus, which is PCI.
55 * Next comes "CardBay", using USB 2.0 signals.
57 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
58 * Special thanks to Intel and VIA for providing host controllers to
59 * test this driver on, and Cypress (including In-System Design) for
60 * providing early devices for those host controllers to talk to!
63 #define DRIVER_VERSION "10 Dec 2004"
64 #define DRIVER_AUTHOR "David Brownell"
65 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
67 static const char hcd_name [] = "ehci_hcd";
77 /* magic numbers that can affect system performance */
78 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
79 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
80 #define EHCI_TUNE_RL_TT 0
81 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
82 #define EHCI_TUNE_MULT_TT 1
83 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
85 #define EHCI_IAA_MSECS 10 /* arbitrary */
86 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
87 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
88 #define EHCI_SHRINK_FRAMES 5 /* async qh unlink delay */
90 /* Initial IRQ latency: faster than hw default */
91 static int log2_irq_thresh = 0; // 0 to 6
92 module_param (log2_irq_thresh, int, S_IRUGO);
93 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
95 /* initial park setting: slower than hw default */
96 static unsigned park = 0;
97 module_param (park, uint, S_IRUGO);
98 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
100 /* for flakey hardware, ignore overcurrent indicators */
101 static int ignore_oc = 0;
102 module_param (ignore_oc, bool, S_IRUGO);
103 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
107 /*-------------------------------------------------------------------------*/
110 #include "ehci-dbg.c"
112 /*-------------------------------------------------------------------------*/
115 * handshake - spin reading hc until handshake completes or fails
116 * @ptr: address of hc register to be read
117 * @mask: bits to look at in result of read
118 * @done: value of those bits when handshake succeeds
119 * @usec: timeout in microseconds
121 * Returns negative errno, or zero on success
123 * Success happens when the "mask" bits have the specified value (hardware
124 * handshake done). There are two failure modes: "usec" have passed (major
125 * hardware flakeout), or the register reads as all-ones (hardware removed).
127 * That last failure should_only happen in cases like physical cardbus eject
128 * before driver shutdown. But it also seems to be caused by bugs in cardbus
129 * bridge shutdown: shutting down the bridge before the devices using it.
131 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
132 u32 mask, u32 done, int usec)
137 result = ehci_readl(ehci, ptr);
138 if (result == ~(u32)0) /* card removed */
149 /* force HC to halt state from unknown (EHCI spec section 2.3) */
150 static int ehci_halt (struct ehci_hcd *ehci)
152 u32 temp = ehci_readl(ehci, &ehci->regs->status);
154 /* disable any irqs left enabled by previous code */
155 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
157 if ((temp & STS_HALT) != 0)
160 temp = ehci_readl(ehci, &ehci->regs->command);
162 ehci_writel(ehci, temp, &ehci->regs->command);
163 return handshake (ehci, &ehci->regs->status,
164 STS_HALT, STS_HALT, 16 * 125);
167 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
168 u32 mask, u32 done, int usec)
172 error = handshake(ehci, ptr, mask, done, usec);
175 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
176 ehci_err(ehci, "force halt; handhake %p %08x %08x -> %d\n",
177 ptr, mask, done, error);
183 /* put TDI/ARC silicon into EHCI mode */
184 static void tdi_reset (struct ehci_hcd *ehci)
186 u32 __iomem *reg_ptr;
189 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
190 tmp = ehci_readl(ehci, reg_ptr);
191 tmp |= USBMODE_CM_HC;
192 /* The default byte access to MMR space is LE after
193 * controller reset. Set the required endian mode
194 * for transfer buffers to match the host microprocessor
196 if (ehci_big_endian_mmio(ehci))
198 ehci_writel(ehci, tmp, reg_ptr);
201 /* reset a non-running (STS_HALT == 1) controller */
202 static int ehci_reset (struct ehci_hcd *ehci)
205 u32 command = ehci_readl(ehci, &ehci->regs->command);
207 command |= CMD_RESET;
208 dbg_cmd (ehci, "reset", command);
209 ehci_writel(ehci, command, &ehci->regs->command);
210 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
211 ehci->next_statechange = jiffies;
212 retval = handshake (ehci, &ehci->regs->command,
213 CMD_RESET, 0, 250 * 1000);
218 if (ehci_is_TDI(ehci))
224 /* idle the controller (from running) */
225 static void ehci_quiesce (struct ehci_hcd *ehci)
230 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
234 /* wait for any schedule enables/disables to take effect */
235 temp = ehci_readl(ehci, &ehci->regs->command) << 10;
236 temp &= STS_ASS | STS_PSS;
237 if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
238 STS_ASS | STS_PSS, temp, 16 * 125))
241 /* then disable anything that's still active */
242 temp = ehci_readl(ehci, &ehci->regs->command);
243 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
244 ehci_writel(ehci, temp, &ehci->regs->command);
246 /* hardware can take 16 microframes to turn off ... */
247 handshake_on_error_set_halt(ehci, &ehci->regs->status,
248 STS_ASS | STS_PSS, 0, 16 * 125);
251 /*-------------------------------------------------------------------------*/
253 static void end_unlink_async(struct ehci_hcd *ehci);
254 static void ehci_work(struct ehci_hcd *ehci);
256 #include "ehci-hub.c"
257 #include "ehci-mem.c"
259 #include "ehci-sched.c"
261 /*-------------------------------------------------------------------------*/
263 static void ehci_iaa_watchdog(unsigned long param)
265 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
268 spin_lock_irqsave (&ehci->lock, flags);
270 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
271 * So we need this watchdog, but must protect it against both
272 * (a) SMP races against real IAA firing and retriggering, and
273 * (b) clean HC shutdown, when IAA watchdog was pending.
276 && !timer_pending(&ehci->iaa_watchdog)
277 && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
280 /* If we get here, IAA is *REALLY* late. It's barely
281 * conceivable that the system is so busy that CMD_IAAD
282 * is still legitimately set, so let's be sure it's
283 * clear before we read STS_IAA. (The HC should clear
284 * CMD_IAAD when it sets STS_IAA.)
286 cmd = ehci_readl(ehci, &ehci->regs->command);
288 ehci_writel(ehci, cmd & ~CMD_IAAD,
289 &ehci->regs->command);
291 /* If IAA is set here it either legitimately triggered
292 * before we cleared IAAD above (but _way_ late, so we'll
293 * still count it as lost) ... or a silicon erratum:
294 * - VIA seems to set IAA without triggering the IRQ;
295 * - IAAD potentially cleared without setting IAA.
297 status = ehci_readl(ehci, &ehci->regs->status);
298 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
299 COUNT (ehci->stats.lost_iaa);
300 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
303 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
305 end_unlink_async(ehci);
308 spin_unlock_irqrestore(&ehci->lock, flags);
311 static void ehci_watchdog(unsigned long param)
313 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
316 spin_lock_irqsave(&ehci->lock, flags);
318 /* stop async processing after it's idled a bit */
319 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
320 start_unlink_async (ehci, ehci->async);
322 /* ehci could run by timer, without IRQs ... */
325 spin_unlock_irqrestore (&ehci->lock, flags);
328 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
329 * The firmware seems to think that powering off is a wakeup event!
330 * This routine turns off remote wakeup and everything else, on all ports.
332 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
334 int port = HCS_N_PORTS(ehci->hcs_params);
337 ehci_writel(ehci, PORT_RWC_BITS,
338 &ehci->regs->port_status[port]);
342 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
343 * Should be called with ehci->lock held.
345 static void ehci_silence_controller(struct ehci_hcd *ehci)
348 ehci_turn_off_all_ports(ehci);
350 /* make BIOS/etc use companion controller during reboot */
351 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
353 /* unblock posted writes */
354 ehci_readl(ehci, &ehci->regs->configured_flag);
357 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
358 * This forcibly disables dma and IRQs, helping kexec and other cases
359 * where the next system software may expect clean state.
361 static void ehci_shutdown(struct usb_hcd *hcd)
363 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
365 del_timer_sync(&ehci->watchdog);
366 del_timer_sync(&ehci->iaa_watchdog);
368 spin_lock_irq(&ehci->lock);
369 ehci_silence_controller(ehci);
370 spin_unlock_irq(&ehci->lock);
373 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
377 if (!HCS_PPC (ehci->hcs_params))
380 ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
381 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
382 (void) ehci_hub_control(ehci_to_hcd(ehci),
383 is_on ? SetPortFeature : ClearPortFeature,
386 /* Flush those writes */
387 ehci_readl(ehci, &ehci->regs->command);
391 /*-------------------------------------------------------------------------*/
394 * ehci_work is called from some interrupts, timers, and so on.
395 * it calls driver completion functions, after dropping ehci->lock.
397 static void ehci_work (struct ehci_hcd *ehci)
399 timer_action_done (ehci, TIMER_IO_WATCHDOG);
401 /* another CPU may drop ehci->lock during a schedule scan while
402 * it reports urb completions. this flag guards against bogus
403 * attempts at re-entrant schedule scanning.
409 if (ehci->next_uframe != -1)
410 scan_periodic (ehci);
413 /* the IO watchdog guards against hardware or driver bugs that
414 * misplace IRQs, and should let us run completely without IRQs.
415 * such lossage has been observed on both VT6202 and VT8235.
417 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
418 (ehci->async->qh_next.ptr != NULL ||
419 ehci->periodic_sched != 0))
420 timer_action (ehci, TIMER_IO_WATCHDOG);
424 * Called when the ehci_hcd module is removed.
426 static void ehci_stop (struct usb_hcd *hcd)
428 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
430 ehci_dbg (ehci, "stop\n");
432 /* no more interrupts ... */
433 del_timer_sync (&ehci->watchdog);
434 del_timer_sync(&ehci->iaa_watchdog);
436 spin_lock_irq(&ehci->lock);
437 if (HC_IS_RUNNING (hcd->state))
440 ehci_silence_controller(ehci);
442 spin_unlock_irq(&ehci->lock);
444 remove_companion_file(ehci);
445 remove_debug_files (ehci);
447 /* root hub is shut down separately (first, when possible) */
448 spin_lock_irq (&ehci->lock);
451 spin_unlock_irq (&ehci->lock);
452 ehci_mem_cleanup (ehci);
455 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
456 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
457 ehci->stats.lost_iaa);
458 ehci_dbg (ehci, "complete %ld unlink %ld\n",
459 ehci->stats.complete, ehci->stats.unlink);
462 dbg_status (ehci, "ehci_stop completed",
463 ehci_readl(ehci, &ehci->regs->status));
466 /* one-time init, only for memory state */
467 static int ehci_init(struct usb_hcd *hcd)
469 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
474 spin_lock_init(&ehci->lock);
476 init_timer(&ehci->watchdog);
477 ehci->watchdog.function = ehci_watchdog;
478 ehci->watchdog.data = (unsigned long) ehci;
480 init_timer(&ehci->iaa_watchdog);
481 ehci->iaa_watchdog.function = ehci_iaa_watchdog;
482 ehci->iaa_watchdog.data = (unsigned long) ehci;
485 * hw default: 1K periodic list heads, one per frame.
486 * periodic_size can shrink by USBCMD update if hcc_params allows.
488 ehci->periodic_size = DEFAULT_I_TDPS;
489 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
492 /* controllers may cache some of the periodic schedule ... */
493 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
494 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
496 else // N microframes cached
497 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
499 ehci->reclaim = NULL;
500 ehci->next_uframe = -1;
503 * dedicate a qh for the async ring head, since we couldn't unlink
504 * a 'real' qh without stopping the async schedule [4.8]. use it
505 * as the 'reclamation list head' too.
506 * its dummy is used in hw_alt_next of many tds, to prevent the qh
507 * from automatically advancing to the next td after short reads.
509 ehci->async->qh_next.qh = NULL;
510 ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
511 ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
512 ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
513 ehci->async->hw_qtd_next = EHCI_LIST_END(ehci);
514 ehci->async->qh_state = QH_STATE_LINKED;
515 ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
517 /* clear interrupt enables, set irq latency */
518 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
520 temp = 1 << (16 + log2_irq_thresh);
521 if (HCC_CANPARK(hcc_params)) {
522 /* HW default park == 3, on hardware that supports it (like
523 * NVidia and ALI silicon), maximizes throughput on the async
524 * schedule by avoiding QH fetches between transfers.
526 * With fast usb storage devices and NForce2, "park" seems to
527 * make problems: throughput reduction (!), data errors...
530 park = min(park, (unsigned) 3);
534 ehci_dbg(ehci, "park %d\n", park);
536 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
537 /* periodic schedule size can be smaller than default */
539 temp |= (EHCI_TUNE_FLS << 2);
540 switch (EHCI_TUNE_FLS) {
541 case 0: ehci->periodic_size = 1024; break;
542 case 1: ehci->periodic_size = 512; break;
543 case 2: ehci->periodic_size = 256; break;
547 ehci->command = temp;
552 /* start HC running; it's halted, ehci_init() has been run (once) */
553 static int ehci_run (struct usb_hcd *hcd)
555 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
560 hcd->uses_new_polling = 1;
563 /* EHCI spec section 4.1 */
564 if ((retval = ehci_reset(ehci)) != 0) {
565 ehci_mem_cleanup(ehci);
568 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
569 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
572 * hcc_params controls whether ehci->regs->segment must (!!!)
573 * be used; it constrains QH/ITD/SITD and QTD locations.
574 * pci_pool consistent memory always uses segment zero.
575 * streaming mappings for I/O buffers, like pci_map_single(),
576 * can return segments above 4GB, if the device allows.
578 * NOTE: the dma mask is visible through dma_supported(), so
579 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
580 * Scsi_Host.highmem_io, and so forth. It's readonly to all
581 * host side drivers though.
583 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
584 if (HCC_64BIT_ADDR(hcc_params)) {
585 ehci_writel(ehci, 0, &ehci->regs->segment);
587 // this is deeply broken on almost all architectures
588 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
589 ehci_info(ehci, "enabled 64bit DMA\n");
594 // Philips, Intel, and maybe others need CMD_RUN before the
595 // root hub will detect new devices (why?); NEC doesn't
596 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
597 ehci->command |= CMD_RUN;
598 ehci_writel(ehci, ehci->command, &ehci->regs->command);
599 dbg_cmd (ehci, "init", ehci->command);
602 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
603 * are explicitly handed to companion controller(s), so no TT is
604 * involved with the root hub. (Except where one is integrated,
605 * and there's no companion controller unless maybe for USB OTG.)
607 * Turning on the CF flag will transfer ownership of all ports
608 * from the companions to the EHCI controller. If any of the
609 * companions are in the middle of a port reset at the time, it
610 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
611 * guarantees that no resets are in progress. After we set CF,
612 * a short delay lets the hardware catch up; new resets shouldn't
613 * be started before the port switching actions could complete.
615 down_write(&ehci_cf_port_reset_rwsem);
616 hcd->state = HC_STATE_RUNNING;
617 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
618 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
620 up_write(&ehci_cf_port_reset_rwsem);
622 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
624 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
625 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
626 temp >> 8, temp & 0xff, DRIVER_VERSION,
627 ignore_oc ? ", overcurrent ignored" : "");
629 ehci_writel(ehci, INTR_MASK,
630 &ehci->regs->intr_enable); /* Turn On Interrupts */
632 /* GRR this is run-once init(), being done every time the HC starts.
633 * So long as they're part of class devices, we can't do it init()
634 * since the class device isn't created that early.
636 create_debug_files(ehci);
637 create_companion_file(ehci);
642 /*-------------------------------------------------------------------------*/
644 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
646 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
647 u32 status, pcd_status = 0, cmd;
650 spin_lock (&ehci->lock);
652 status = ehci_readl(ehci, &ehci->regs->status);
654 /* e.g. cardbus physical eject */
655 if (status == ~(u32) 0) {
656 ehci_dbg (ehci, "device removed\n");
661 if (!status) { /* irq sharing? */
662 spin_unlock(&ehci->lock);
666 /* clear (just) interrupts */
667 ehci_writel(ehci, status, &ehci->regs->status);
668 cmd = ehci_readl(ehci, &ehci->regs->command);
672 /* unrequested/ignored: Frame List Rollover */
673 dbg_status (ehci, "irq", status);
676 /* INT, ERR, and IAA interrupt rates can be throttled */
678 /* normal [4.15.1.2] or error [4.15.1.1] completion */
679 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
680 if (likely ((status & STS_ERR) == 0))
681 COUNT (ehci->stats.normal);
683 COUNT (ehci->stats.error);
687 /* complete the unlinking of some qh [4.15.2.3] */
688 if (status & STS_IAA) {
689 /* guard against (alleged) silicon errata */
690 if (cmd & CMD_IAAD) {
691 ehci_writel(ehci, cmd & ~CMD_IAAD,
692 &ehci->regs->command);
693 ehci_dbg(ehci, "IAA with IAAD still set?\n");
696 COUNT(ehci->stats.reclaim);
697 end_unlink_async(ehci);
699 ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
702 /* remote wakeup [4.3.1] */
703 if (status & STS_PCD) {
704 unsigned i = HCS_N_PORTS (ehci->hcs_params);
706 /* kick root hub later */
709 /* resume root hub? */
710 if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
711 usb_hcd_resume_root_hub(hcd);
714 int pstatus = ehci_readl(ehci,
715 &ehci->regs->port_status [i]);
717 if (pstatus & PORT_OWNER)
719 if (!(pstatus & PORT_RESUME)
720 || ehci->reset_done [i] != 0)
723 /* start 20 msec resume signaling from this port,
724 * and make khubd collect PORT_STAT_C_SUSPEND to
725 * stop that signaling.
727 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
728 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
729 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
733 /* PCI errors [4.15.2.4] */
734 if (unlikely ((status & STS_FATAL) != 0)) {
735 dbg_cmd (ehci, "fatal", ehci_readl(ehci,
736 &ehci->regs->command));
737 dbg_status (ehci, "fatal", status);
738 if (status & STS_HALT) {
739 ehci_err (ehci, "fatal error\n");
742 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
743 /* generic layer kills/unlinks all urbs, then
744 * uses ehci_stop to clean up the rest
752 spin_unlock (&ehci->lock);
754 usb_hcd_poll_rh_status(hcd);
758 /*-------------------------------------------------------------------------*/
761 * non-error returns are a promise to giveback() the urb later
762 * we drop ownership so next owner (or urb unlink) can get it
764 * urb + dev is in hcd.self.controller.urb_list
765 * we're queueing TDs onto software and hardware lists
767 * hcd-specific init for hcpriv hasn't been done yet
769 * NOTE: control, bulk, and interrupt share the same code to append TDs
770 * to a (possibly active) QH, and the same QH scanning code.
772 static int ehci_urb_enqueue (
777 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
778 struct list_head qtd_list;
780 INIT_LIST_HEAD (&qtd_list);
782 switch (usb_pipetype (urb->pipe)) {
784 /* qh_completions() code doesn't handle all the fault cases
785 * in multi-TD control transfers. Even 1KB is rare anyway.
787 if (urb->transfer_buffer_length > (16 * 1024))
790 /* case PIPE_BULK: */
792 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
794 return submit_async(ehci, urb, &qtd_list, mem_flags);
797 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
799 return intr_submit(ehci, urb, &qtd_list, mem_flags);
801 case PIPE_ISOCHRONOUS:
802 if (urb->dev->speed == USB_SPEED_HIGH)
803 return itd_submit (ehci, urb, mem_flags);
805 return sitd_submit (ehci, urb, mem_flags);
809 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
812 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
813 end_unlink_async(ehci);
815 /* if it's not linked then there's nothing to do */
816 if (qh->qh_state != QH_STATE_LINKED)
819 /* defer till later if busy */
820 else if (ehci->reclaim) {
821 struct ehci_qh *last;
823 for (last = ehci->reclaim;
825 last = last->reclaim)
827 qh->qh_state = QH_STATE_UNLINK_WAIT;
830 /* start IAA cycle */
832 start_unlink_async (ehci, qh);
835 /* remove from hardware lists
836 * completions normally happen asynchronously
839 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
841 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
846 spin_lock_irqsave (&ehci->lock, flags);
847 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
851 switch (usb_pipetype (urb->pipe)) {
852 // case PIPE_CONTROL:
855 qh = (struct ehci_qh *) urb->hcpriv;
858 switch (qh->qh_state) {
859 case QH_STATE_LINKED:
860 case QH_STATE_COMPLETING:
861 unlink_async(ehci, qh);
863 case QH_STATE_UNLINK:
864 case QH_STATE_UNLINK_WAIT:
865 /* already started */
874 qh = (struct ehci_qh *) urb->hcpriv;
877 switch (qh->qh_state) {
878 case QH_STATE_LINKED:
879 intr_deschedule (ehci, qh);
882 qh_completions (ehci, qh);
885 ehci_dbg (ehci, "bogus qh %p state %d\n",
890 /* reschedule QH iff another request is queued */
891 if (!list_empty (&qh->qtd_list)
892 && HC_IS_RUNNING (hcd->state)) {
893 rc = qh_schedule(ehci, qh);
895 /* An error here likely indicates handshake failure
896 * or no space left in the schedule. Neither fault
897 * should happen often ...
899 * FIXME kill the now-dysfunctional queued urbs
903 "can't reschedule qh %p, err %d",
908 case PIPE_ISOCHRONOUS:
911 // wait till next completion, do it then.
912 // completion irqs can wait up to 1024 msec,
916 spin_unlock_irqrestore (&ehci->lock, flags);
920 /*-------------------------------------------------------------------------*/
922 // bulk qh holds the data toggle
925 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
927 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
929 struct ehci_qh *qh, *tmp;
931 /* ASSERT: any requests/urbs are being unlinked */
932 /* ASSERT: nobody can be submitting urbs for this any more */
935 spin_lock_irqsave (&ehci->lock, flags);
940 /* endpoints can be iso streams. for now, we don't
941 * accelerate iso completions ... so spin a while.
943 if (qh->hw_info1 == 0) {
944 ehci_vdbg (ehci, "iso delay\n");
948 if (!HC_IS_RUNNING (hcd->state))
949 qh->qh_state = QH_STATE_IDLE;
950 switch (qh->qh_state) {
951 case QH_STATE_LINKED:
952 for (tmp = ehci->async->qh_next.qh;
954 tmp = tmp->qh_next.qh)
956 /* periodic qh self-unlinks on empty */
959 unlink_async (ehci, qh);
961 case QH_STATE_UNLINK: /* wait for hw to finish? */
962 case QH_STATE_UNLINK_WAIT:
964 spin_unlock_irqrestore (&ehci->lock, flags);
965 schedule_timeout_uninterruptible(1);
967 case QH_STATE_IDLE: /* fully unlinked */
968 if (list_empty (&qh->qtd_list)) {
972 /* else FALL THROUGH */
975 /* caller was supposed to have unlinked any requests;
976 * that's not our job. just leak this memory.
978 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
979 qh, ep->desc.bEndpointAddress, qh->qh_state,
980 list_empty (&qh->qtd_list) ? "" : "(has tds)");
985 spin_unlock_irqrestore (&ehci->lock, flags);
989 static int ehci_get_frame (struct usb_hcd *hcd)
991 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
992 return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
996 /*-------------------------------------------------------------------------*/
998 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1000 MODULE_DESCRIPTION (DRIVER_INFO);
1001 MODULE_AUTHOR (DRIVER_AUTHOR);
1002 MODULE_LICENSE ("GPL");
1005 #include "ehci-pci.c"
1006 #define PCI_DRIVER ehci_pci_driver
1009 #ifdef CONFIG_USB_EHCI_FSL
1010 #include "ehci-fsl.c"
1011 #define PLATFORM_DRIVER ehci_fsl_driver
1014 #ifdef CONFIG_SOC_AU1200
1015 #include "ehci-au1xxx.c"
1016 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1019 #ifdef CONFIG_PPC_PS3
1020 #include "ehci-ps3.c"
1021 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1024 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
1025 #include "ehci-ppc-soc.c"
1026 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1029 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1030 #include "ehci-ppc-of.c"
1031 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1034 #ifdef CONFIG_PLAT_ORION
1035 #include "ehci-orion.c"
1036 #define PLATFORM_DRIVER ehci_orion_driver
1039 #ifdef CONFIG_ARCH_IXP4XX
1040 #include "ehci-ixp4xx.c"
1041 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1044 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1045 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1046 #error "missing bus glue for ehci-hcd"
1049 static int __init ehci_hcd_init(void)
1053 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1055 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1056 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1059 ehci_debug_root = debugfs_create_dir("ehci", NULL);
1060 if (!ehci_debug_root)
1064 #ifdef PLATFORM_DRIVER
1065 retval = platform_driver_register(&PLATFORM_DRIVER);
1071 retval = pci_register_driver(&PCI_DRIVER);
1076 #ifdef PS3_SYSTEM_BUS_DRIVER
1077 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1082 #ifdef OF_PLATFORM_DRIVER
1083 retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1089 #ifdef OF_PLATFORM_DRIVER
1090 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1093 #ifdef PS3_SYSTEM_BUS_DRIVER
1094 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1098 pci_unregister_driver(&PCI_DRIVER);
1101 #ifdef PLATFORM_DRIVER
1102 platform_driver_unregister(&PLATFORM_DRIVER);
1106 debugfs_remove(ehci_debug_root);
1107 ehci_debug_root = NULL;
1111 module_init(ehci_hcd_init);
1113 static void __exit ehci_hcd_cleanup(void)
1115 #ifdef OF_PLATFORM_DRIVER
1116 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1118 #ifdef PLATFORM_DRIVER
1119 platform_driver_unregister(&PLATFORM_DRIVER);
1122 pci_unregister_driver(&PCI_DRIVER);
1124 #ifdef PS3_SYSTEM_BUS_DRIVER
1125 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1128 debugfs_remove(ehci_debug_root);
1131 module_exit(ehci_hcd_cleanup);