Merge branch 'writeback' of git://git.kernel.dk/linux-2.6-block
[pandora-kernel.git] / drivers / usb / gadget / pxa25x_udc.c
1 /*
2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3  *
4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7  * Copyright (C) 2003 David Brownell
8  * Copyright (C) 2003 Joshua Wise
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
23  *
24  */
25
26 /* #define VERBOSE_DEBUG */
27
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/delay.h>
35 #include <linux/slab.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/mm.h>
41 #include <linux/platform_device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/irq.h>
44 #include <linux/clk.h>
45 #include <linux/err.h>
46 #include <linux/seq_file.h>
47 #include <linux/debugfs.h>
48 #include <linux/io.h>
49
50 #include <asm/byteorder.h>
51 #include <asm/dma.h>
52 #include <asm/gpio.h>
53 #include <asm/system.h>
54 #include <asm/mach-types.h>
55 #include <asm/unaligned.h>
56
57 #include <linux/usb/ch9.h>
58 #include <linux/usb/gadget.h>
59 #include <linux/usb/otg.h>
60
61 /*
62  * This driver is PXA25x only.  Grab the right register definitions.
63  */
64 #ifdef CONFIG_ARCH_PXA
65 #include <mach/pxa25x-udc.h>
66 #endif
67
68 #include <asm/mach/udc_pxa2xx.h>
69
70
71 /*
72  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
73  * series processors.  The UDC for the IXP 4xx series is very similar.
74  * There are fifteen endpoints, in addition to ep0.
75  *
76  * Such controller drivers work with a gadget driver.  The gadget driver
77  * returns descriptors, implements configuration and data protocols used
78  * by the host to interact with this device, and allocates endpoints to
79  * the different protocol interfaces.  The controller driver virtualizes
80  * usb hardware so that the gadget drivers will be more portable.
81  *
82  * This UDC hardware wants to implement a bit too much USB protocol, so
83  * it constrains the sorts of USB configuration change events that work.
84  * The errata for these chips are misleading; some "fixed" bugs from
85  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
86  *
87  * Note that the UDC hardware supports DMA (except on IXP) but that's
88  * not used here.  IN-DMA (to host) is simple enough, when the data is
89  * suitably aligned (16 bytes) ... the network stack doesn't do that,
90  * other software can.  OUT-DMA is buggy in most chip versions, as well
91  * as poorly designed (data toggle not automatic).  So this driver won't
92  * bother using DMA.  (Mostly-working IN-DMA support was available in
93  * kernels before 2.6.23, but was never enabled or well tested.)
94  */
95
96 #define DRIVER_VERSION  "30-June-2007"
97 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
98
99
100 static const char driver_name [] = "pxa25x_udc";
101
102 static const char ep0name [] = "ep0";
103
104
105 #ifdef CONFIG_ARCH_IXP4XX
106
107 /* cpu-specific register addresses are compiled in to this code */
108 #ifdef CONFIG_ARCH_PXA
109 #error "Can't configure both IXP and PXA"
110 #endif
111
112 /* IXP doesn't yet support <linux/clk.h> */
113 #define clk_get(dev,name)       NULL
114 #define clk_enable(clk)         do { } while (0)
115 #define clk_disable(clk)        do { } while (0)
116 #define clk_put(clk)            do { } while (0)
117
118 #endif
119
120 #include "pxa25x_udc.h"
121
122
123 #ifdef  CONFIG_USB_PXA25X_SMALL
124 #define SIZE_STR        " (small)"
125 #else
126 #define SIZE_STR        ""
127 #endif
128
129 /* ---------------------------------------------------------------------------
130  *      endpoint related parts of the api to the usb controller hardware,
131  *      used by gadget driver; and the inner talker-to-hardware core.
132  * ---------------------------------------------------------------------------
133  */
134
135 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
136 static void nuke (struct pxa25x_ep *, int status);
137
138 /* one GPIO should be used to detect VBUS from the host */
139 static int is_vbus_present(void)
140 {
141         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
142
143         if (gpio_is_valid(mach->gpio_vbus)) {
144                 int value = gpio_get_value(mach->gpio_vbus);
145
146                 if (mach->gpio_vbus_inverted)
147                         return !value;
148                 else
149                         return !!value;
150         }
151         if (mach->udc_is_connected)
152                 return mach->udc_is_connected();
153         return 1;
154 }
155
156 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
157 static void pullup_off(void)
158 {
159         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
160         int off_level = mach->gpio_pullup_inverted;
161
162         if (gpio_is_valid(mach->gpio_pullup))
163                 gpio_set_value(mach->gpio_pullup, off_level);
164         else if (mach->udc_command)
165                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
166 }
167
168 static void pullup_on(void)
169 {
170         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
171         int on_level = !mach->gpio_pullup_inverted;
172
173         if (gpio_is_valid(mach->gpio_pullup))
174                 gpio_set_value(mach->gpio_pullup, on_level);
175         else if (mach->udc_command)
176                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
177 }
178
179 static void pio_irq_enable(int bEndpointAddress)
180 {
181         bEndpointAddress &= 0xf;
182         if (bEndpointAddress < 8)
183                 UICR0 &= ~(1 << bEndpointAddress);
184         else {
185                 bEndpointAddress -= 8;
186                 UICR1 &= ~(1 << bEndpointAddress);
187         }
188 }
189
190 static void pio_irq_disable(int bEndpointAddress)
191 {
192         bEndpointAddress &= 0xf;
193         if (bEndpointAddress < 8)
194                 UICR0 |= 1 << bEndpointAddress;
195         else {
196                 bEndpointAddress -= 8;
197                 UICR1 |= 1 << bEndpointAddress;
198         }
199 }
200
201 /* The UDCCR reg contains mask and interrupt status bits,
202  * so using '|=' isn't safe as it may ack an interrupt.
203  */
204 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
205
206 static inline void udc_set_mask_UDCCR(int mask)
207 {
208         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
209 }
210
211 static inline void udc_clear_mask_UDCCR(int mask)
212 {
213         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
214 }
215
216 static inline void udc_ack_int_UDCCR(int mask)
217 {
218         /* udccr contains the bits we dont want to change */
219         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
220
221         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
222 }
223
224 /*
225  * endpoint enable/disable
226  *
227  * we need to verify the descriptors used to enable endpoints.  since pxa25x
228  * endpoint configurations are fixed, and are pretty much always enabled,
229  * there's not a lot to manage here.
230  *
231  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
232  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
233  * for a single interface (with only the default altsetting) and for gadget
234  * drivers that don't halt endpoints (not reset by set_interface).  that also
235  * means that if you use ISO, you must violate the USB spec rule that all
236  * iso endpoints must be in non-default altsettings.
237  */
238 static int pxa25x_ep_enable (struct usb_ep *_ep,
239                 const struct usb_endpoint_descriptor *desc)
240 {
241         struct pxa25x_ep        *ep;
242         struct pxa25x_udc       *dev;
243
244         ep = container_of (_ep, struct pxa25x_ep, ep);
245         if (!_ep || !desc || ep->desc || _ep->name == ep0name
246                         || desc->bDescriptorType != USB_DT_ENDPOINT
247                         || ep->bEndpointAddress != desc->bEndpointAddress
248                         || ep->fifo_size < le16_to_cpu
249                                                 (desc->wMaxPacketSize)) {
250                 DMSG("%s, bad ep or descriptor\n", __func__);
251                 return -EINVAL;
252         }
253
254         /* xfer types must match, except that interrupt ~= bulk */
255         if (ep->bmAttributes != desc->bmAttributes
256                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
257                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
258                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
259                 return -EINVAL;
260         }
261
262         /* hardware _could_ do smaller, but driver doesn't */
263         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
264                                 && le16_to_cpu (desc->wMaxPacketSize)
265                                                 != BULK_FIFO_SIZE)
266                         || !desc->wMaxPacketSize) {
267                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
268                 return -ERANGE;
269         }
270
271         dev = ep->dev;
272         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
273                 DMSG("%s, bogus device state\n", __func__);
274                 return -ESHUTDOWN;
275         }
276
277         ep->desc = desc;
278         ep->stopped = 0;
279         ep->pio_irqs = 0;
280         ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
281
282         /* flush fifo (mostly for OUT buffers) */
283         pxa25x_ep_fifo_flush (_ep);
284
285         /* ... reset halt state too, if we could ... */
286
287         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
288         return 0;
289 }
290
291 static int pxa25x_ep_disable (struct usb_ep *_ep)
292 {
293         struct pxa25x_ep        *ep;
294         unsigned long           flags;
295
296         ep = container_of (_ep, struct pxa25x_ep, ep);
297         if (!_ep || !ep->desc) {
298                 DMSG("%s, %s not enabled\n", __func__,
299                         _ep ? ep->ep.name : NULL);
300                 return -EINVAL;
301         }
302         local_irq_save(flags);
303
304         nuke (ep, -ESHUTDOWN);
305
306         /* flush fifo (mostly for IN buffers) */
307         pxa25x_ep_fifo_flush (_ep);
308
309         ep->desc = NULL;
310         ep->stopped = 1;
311
312         local_irq_restore(flags);
313         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
314         return 0;
315 }
316
317 /*-------------------------------------------------------------------------*/
318
319 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
320  * must still pass correctly initialized endpoints, since other controller
321  * drivers may care about how it's currently set up (dma issues etc).
322  */
323
324 /*
325  *      pxa25x_ep_alloc_request - allocate a request data structure
326  */
327 static struct usb_request *
328 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
329 {
330         struct pxa25x_request *req;
331
332         req = kzalloc(sizeof(*req), gfp_flags);
333         if (!req)
334                 return NULL;
335
336         INIT_LIST_HEAD (&req->queue);
337         return &req->req;
338 }
339
340
341 /*
342  *      pxa25x_ep_free_request - deallocate a request data structure
343  */
344 static void
345 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
346 {
347         struct pxa25x_request   *req;
348
349         req = container_of (_req, struct pxa25x_request, req);
350         WARN_ON(!list_empty (&req->queue));
351         kfree(req);
352 }
353
354 /*-------------------------------------------------------------------------*/
355
356 /*
357  *      done - retire a request; caller blocked irqs
358  */
359 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
360 {
361         unsigned                stopped = ep->stopped;
362
363         list_del_init(&req->queue);
364
365         if (likely (req->req.status == -EINPROGRESS))
366                 req->req.status = status;
367         else
368                 status = req->req.status;
369
370         if (status && status != -ESHUTDOWN)
371                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
372                         ep->ep.name, &req->req, status,
373                         req->req.actual, req->req.length);
374
375         /* don't modify queue heads during completion callback */
376         ep->stopped = 1;
377         req->req.complete(&ep->ep, &req->req);
378         ep->stopped = stopped;
379 }
380
381
382 static inline void ep0_idle (struct pxa25x_udc *dev)
383 {
384         dev->ep0state = EP0_IDLE;
385 }
386
387 static int
388 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
389 {
390         u8              *buf;
391         unsigned        length, count;
392
393         buf = req->req.buf + req->req.actual;
394         prefetch(buf);
395
396         /* how big will this packet be? */
397         length = min(req->req.length - req->req.actual, max);
398         req->req.actual += length;
399
400         count = length;
401         while (likely(count--))
402                 *uddr = *buf++;
403
404         return length;
405 }
406
407 /*
408  * write to an IN endpoint fifo, as many packets as possible.
409  * irqs will use this to write the rest later.
410  * caller guarantees at least one packet buffer is ready (or a zlp).
411  */
412 static int
413 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
414 {
415         unsigned                max;
416
417         max = le16_to_cpu(ep->desc->wMaxPacketSize);
418         do {
419                 unsigned        count;
420                 int             is_last, is_short;
421
422                 count = write_packet(ep->reg_uddr, req, max);
423
424                 /* last packet is usually short (or a zlp) */
425                 if (unlikely (count != max))
426                         is_last = is_short = 1;
427                 else {
428                         if (likely(req->req.length != req->req.actual)
429                                         || req->req.zero)
430                                 is_last = 0;
431                         else
432                                 is_last = 1;
433                         /* interrupt/iso maxpacket may not fill the fifo */
434                         is_short = unlikely (max < ep->fifo_size);
435                 }
436
437                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
438                         ep->ep.name, count,
439                         is_last ? "/L" : "", is_short ? "/S" : "",
440                         req->req.length - req->req.actual, req);
441
442                 /* let loose that packet. maybe try writing another one,
443                  * double buffering might work.  TSP, TPC, and TFS
444                  * bit values are the same for all normal IN endpoints.
445                  */
446                 *ep->reg_udccs = UDCCS_BI_TPC;
447                 if (is_short)
448                         *ep->reg_udccs = UDCCS_BI_TSP;
449
450                 /* requests complete when all IN data is in the FIFO */
451                 if (is_last) {
452                         done (ep, req, 0);
453                         if (list_empty(&ep->queue))
454                                 pio_irq_disable (ep->bEndpointAddress);
455                         return 1;
456                 }
457
458                 // TODO experiment: how robust can fifo mode tweaking be?
459                 // double buffering is off in the default fifo mode, which
460                 // prevents TFS from being set here.
461
462         } while (*ep->reg_udccs & UDCCS_BI_TFS);
463         return 0;
464 }
465
466 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
467  * ep0 data stage.  these chips want very simple state transitions.
468  */
469 static inline
470 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
471 {
472         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
473         USIR0 = USIR0_IR0;
474         dev->req_pending = 0;
475         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
476                 __func__, tag, UDCCS0, flags);
477 }
478
479 static int
480 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
481 {
482         unsigned        count;
483         int             is_short;
484
485         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
486         ep->dev->stats.write.bytes += count;
487
488         /* last packet "must be" short (or a zlp) */
489         is_short = (count != EP0_FIFO_SIZE);
490
491         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
492                 req->req.length - req->req.actual, req);
493
494         if (unlikely (is_short)) {
495                 if (ep->dev->req_pending)
496                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
497                 else
498                         UDCCS0 = UDCCS0_IPR;
499
500                 count = req->req.length;
501                 done (ep, req, 0);
502                 ep0_idle(ep->dev);
503 #ifndef CONFIG_ARCH_IXP4XX
504 #if 1
505                 /* This seems to get rid of lost status irqs in some cases:
506                  * host responds quickly, or next request involves config
507                  * change automagic, or should have been hidden, or ...
508                  *
509                  * FIXME get rid of all udelays possible...
510                  */
511                 if (count >= EP0_FIFO_SIZE) {
512                         count = 100;
513                         do {
514                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
515                                         /* clear OPR, generate ack */
516                                         UDCCS0 = UDCCS0_OPR;
517                                         break;
518                                 }
519                                 count--;
520                                 udelay(1);
521                         } while (count);
522                 }
523 #endif
524 #endif
525         } else if (ep->dev->req_pending)
526                 ep0start(ep->dev, 0, "IN");
527         return is_short;
528 }
529
530
531 /*
532  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
533  * transfers and put them into the request.  caller should have made
534  * sure there's at least one packet ready.
535  *
536  * returns true if the request completed because of short packet or the
537  * request buffer having filled (and maybe overran till end-of-packet).
538  */
539 static int
540 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
541 {
542         for (;;) {
543                 u32             udccs;
544                 u8              *buf;
545                 unsigned        bufferspace, count, is_short;
546
547                 /* make sure there's a packet in the FIFO.
548                  * UDCCS_{BO,IO}_RPC are all the same bit value.
549                  * UDCCS_{BO,IO}_RNE are all the same bit value.
550                  */
551                 udccs = *ep->reg_udccs;
552                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
553                         break;
554                 buf = req->req.buf + req->req.actual;
555                 prefetchw(buf);
556                 bufferspace = req->req.length - req->req.actual;
557
558                 /* read all bytes from this packet */
559                 if (likely (udccs & UDCCS_BO_RNE)) {
560                         count = 1 + (0x0ff & *ep->reg_ubcr);
561                         req->req.actual += min (count, bufferspace);
562                 } else /* zlp */
563                         count = 0;
564                 is_short = (count < ep->ep.maxpacket);
565                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
566                         ep->ep.name, udccs, count,
567                         is_short ? "/S" : "",
568                         req, req->req.actual, req->req.length);
569                 while (likely (count-- != 0)) {
570                         u8      byte = (u8) *ep->reg_uddr;
571
572                         if (unlikely (bufferspace == 0)) {
573                                 /* this happens when the driver's buffer
574                                  * is smaller than what the host sent.
575                                  * discard the extra data.
576                                  */
577                                 if (req->req.status != -EOVERFLOW)
578                                         DMSG("%s overflow %d\n",
579                                                 ep->ep.name, count);
580                                 req->req.status = -EOVERFLOW;
581                         } else {
582                                 *buf++ = byte;
583                                 bufferspace--;
584                         }
585                 }
586                 *ep->reg_udccs =  UDCCS_BO_RPC;
587                 /* RPC/RSP/RNE could now reflect the other packet buffer */
588
589                 /* iso is one request per packet */
590                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
591                         if (udccs & UDCCS_IO_ROF)
592                                 req->req.status = -EHOSTUNREACH;
593                         /* more like "is_done" */
594                         is_short = 1;
595                 }
596
597                 /* completion */
598                 if (is_short || req->req.actual == req->req.length) {
599                         done (ep, req, 0);
600                         if (list_empty(&ep->queue))
601                                 pio_irq_disable (ep->bEndpointAddress);
602                         return 1;
603                 }
604
605                 /* finished that packet.  the next one may be waiting... */
606         }
607         return 0;
608 }
609
610 /*
611  * special ep0 version of the above.  no UBCR0 or double buffering; status
612  * handshaking is magic.  most device protocols don't need control-OUT.
613  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
614  * protocols do use them.
615  */
616 static int
617 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
618 {
619         u8              *buf, byte;
620         unsigned        bufferspace;
621
622         buf = req->req.buf + req->req.actual;
623         bufferspace = req->req.length - req->req.actual;
624
625         while (UDCCS0 & UDCCS0_RNE) {
626                 byte = (u8) UDDR0;
627
628                 if (unlikely (bufferspace == 0)) {
629                         /* this happens when the driver's buffer
630                          * is smaller than what the host sent.
631                          * discard the extra data.
632                          */
633                         if (req->req.status != -EOVERFLOW)
634                                 DMSG("%s overflow\n", ep->ep.name);
635                         req->req.status = -EOVERFLOW;
636                 } else {
637                         *buf++ = byte;
638                         req->req.actual++;
639                         bufferspace--;
640                 }
641         }
642
643         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
644
645         /* completion */
646         if (req->req.actual >= req->req.length)
647                 return 1;
648
649         /* finished that packet.  the next one may be waiting... */
650         return 0;
651 }
652
653 /*-------------------------------------------------------------------------*/
654
655 static int
656 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
657 {
658         struct pxa25x_request   *req;
659         struct pxa25x_ep        *ep;
660         struct pxa25x_udc       *dev;
661         unsigned long           flags;
662
663         req = container_of(_req, struct pxa25x_request, req);
664         if (unlikely (!_req || !_req->complete || !_req->buf
665                         || !list_empty(&req->queue))) {
666                 DMSG("%s, bad params\n", __func__);
667                 return -EINVAL;
668         }
669
670         ep = container_of(_ep, struct pxa25x_ep, ep);
671         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
672                 DMSG("%s, bad ep\n", __func__);
673                 return -EINVAL;
674         }
675
676         dev = ep->dev;
677         if (unlikely (!dev->driver
678                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
679                 DMSG("%s, bogus device state\n", __func__);
680                 return -ESHUTDOWN;
681         }
682
683         /* iso is always one packet per request, that's the only way
684          * we can report per-packet status.  that also helps with dma.
685          */
686         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
687                         && req->req.length > le16_to_cpu
688                                                 (ep->desc->wMaxPacketSize)))
689                 return -EMSGSIZE;
690
691         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
692                 _ep->name, _req, _req->length, _req->buf);
693
694         local_irq_save(flags);
695
696         _req->status = -EINPROGRESS;
697         _req->actual = 0;
698
699         /* kickstart this i/o queue? */
700         if (list_empty(&ep->queue) && !ep->stopped) {
701                 if (ep->desc == NULL/* ep0 */) {
702                         unsigned        length = _req->length;
703
704                         switch (dev->ep0state) {
705                         case EP0_IN_DATA_PHASE:
706                                 dev->stats.write.ops++;
707                                 if (write_ep0_fifo(ep, req))
708                                         req = NULL;
709                                 break;
710
711                         case EP0_OUT_DATA_PHASE:
712                                 dev->stats.read.ops++;
713                                 /* messy ... */
714                                 if (dev->req_config) {
715                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
716                                                 dev->has_cfr ?  "" : " raced");
717                                         if (dev->has_cfr)
718                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
719                                                         |UDCCFR_MB1;
720                                         done(ep, req, 0);
721                                         dev->ep0state = EP0_END_XFER;
722                                         local_irq_restore (flags);
723                                         return 0;
724                                 }
725                                 if (dev->req_pending)
726                                         ep0start(dev, UDCCS0_IPR, "OUT");
727                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
728                                                 && read_ep0_fifo(ep, req))) {
729                                         ep0_idle(dev);
730                                         done(ep, req, 0);
731                                         req = NULL;
732                                 }
733                                 break;
734
735                         default:
736                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
737                                 local_irq_restore (flags);
738                                 return -EL2HLT;
739                         }
740                 /* can the FIFO can satisfy the request immediately? */
741                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
742                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
743                                         && write_fifo(ep, req))
744                                 req = NULL;
745                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
746                                 && read_fifo(ep, req)) {
747                         req = NULL;
748                 }
749
750                 if (likely (req && ep->desc))
751                         pio_irq_enable(ep->bEndpointAddress);
752         }
753
754         /* pio or dma irq handler advances the queue. */
755         if (likely(req != NULL))
756                 list_add_tail(&req->queue, &ep->queue);
757         local_irq_restore(flags);
758
759         return 0;
760 }
761
762
763 /*
764  *      nuke - dequeue ALL requests
765  */
766 static void nuke(struct pxa25x_ep *ep, int status)
767 {
768         struct pxa25x_request *req;
769
770         /* called with irqs blocked */
771         while (!list_empty(&ep->queue)) {
772                 req = list_entry(ep->queue.next,
773                                 struct pxa25x_request,
774                                 queue);
775                 done(ep, req, status);
776         }
777         if (ep->desc)
778                 pio_irq_disable (ep->bEndpointAddress);
779 }
780
781
782 /* dequeue JUST ONE request */
783 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
784 {
785         struct pxa25x_ep        *ep;
786         struct pxa25x_request   *req;
787         unsigned long           flags;
788
789         ep = container_of(_ep, struct pxa25x_ep, ep);
790         if (!_ep || ep->ep.name == ep0name)
791                 return -EINVAL;
792
793         local_irq_save(flags);
794
795         /* make sure it's actually queued on this endpoint */
796         list_for_each_entry (req, &ep->queue, queue) {
797                 if (&req->req == _req)
798                         break;
799         }
800         if (&req->req != _req) {
801                 local_irq_restore(flags);
802                 return -EINVAL;
803         }
804
805         done(ep, req, -ECONNRESET);
806
807         local_irq_restore(flags);
808         return 0;
809 }
810
811 /*-------------------------------------------------------------------------*/
812
813 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
814 {
815         struct pxa25x_ep        *ep;
816         unsigned long           flags;
817
818         ep = container_of(_ep, struct pxa25x_ep, ep);
819         if (unlikely (!_ep
820                         || (!ep->desc && ep->ep.name != ep0name))
821                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
822                 DMSG("%s, bad ep\n", __func__);
823                 return -EINVAL;
824         }
825         if (value == 0) {
826                 /* this path (reset toggle+halt) is needed to implement
827                  * SET_INTERFACE on normal hardware.  but it can't be
828                  * done from software on the PXA UDC, and the hardware
829                  * forgets to do it as part of SET_INTERFACE automagic.
830                  */
831                 DMSG("only host can clear %s halt\n", _ep->name);
832                 return -EROFS;
833         }
834
835         local_irq_save(flags);
836
837         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
838                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
839                            || !list_empty(&ep->queue))) {
840                 local_irq_restore(flags);
841                 return -EAGAIN;
842         }
843
844         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
845         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
846
847         /* ep0 needs special care */
848         if (!ep->desc) {
849                 start_watchdog(ep->dev);
850                 ep->dev->req_pending = 0;
851                 ep->dev->ep0state = EP0_STALL;
852
853         /* and bulk/intr endpoints like dropping stalls too */
854         } else {
855                 unsigned i;
856                 for (i = 0; i < 1000; i += 20) {
857                         if (*ep->reg_udccs & UDCCS_BI_SST)
858                                 break;
859                         udelay(20);
860                 }
861         }
862         local_irq_restore(flags);
863
864         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
865         return 0;
866 }
867
868 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
869 {
870         struct pxa25x_ep        *ep;
871
872         ep = container_of(_ep, struct pxa25x_ep, ep);
873         if (!_ep) {
874                 DMSG("%s, bad ep\n", __func__);
875                 return -ENODEV;
876         }
877         /* pxa can't report unclaimed bytes from IN fifos */
878         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
879                 return -EOPNOTSUPP;
880         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
881                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
882                 return 0;
883         else
884                 return (*ep->reg_ubcr & 0xfff) + 1;
885 }
886
887 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
888 {
889         struct pxa25x_ep        *ep;
890
891         ep = container_of(_ep, struct pxa25x_ep, ep);
892         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
893                 DMSG("%s, bad ep\n", __func__);
894                 return;
895         }
896
897         /* toggle and halt bits stay unchanged */
898
899         /* for OUT, just read and discard the FIFO contents. */
900         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
901                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
902                         (void) *ep->reg_uddr;
903                 return;
904         }
905
906         /* most IN status is the same, but ISO can't stall */
907         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
908                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
909                         ? 0 : UDCCS_BI_SST);
910 }
911
912
913 static struct usb_ep_ops pxa25x_ep_ops = {
914         .enable         = pxa25x_ep_enable,
915         .disable        = pxa25x_ep_disable,
916
917         .alloc_request  = pxa25x_ep_alloc_request,
918         .free_request   = pxa25x_ep_free_request,
919
920         .queue          = pxa25x_ep_queue,
921         .dequeue        = pxa25x_ep_dequeue,
922
923         .set_halt       = pxa25x_ep_set_halt,
924         .fifo_status    = pxa25x_ep_fifo_status,
925         .fifo_flush     = pxa25x_ep_fifo_flush,
926 };
927
928
929 /* ---------------------------------------------------------------------------
930  *      device-scoped parts of the api to the usb controller hardware
931  * ---------------------------------------------------------------------------
932  */
933
934 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
935 {
936         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
937 }
938
939 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
940 {
941         /* host may not have enabled remote wakeup */
942         if ((UDCCS0 & UDCCS0_DRWF) == 0)
943                 return -EHOSTUNREACH;
944         udc_set_mask_UDCCR(UDCCR_RSM);
945         return 0;
946 }
947
948 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
949 static void udc_enable (struct pxa25x_udc *);
950 static void udc_disable(struct pxa25x_udc *);
951
952 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
953  * in active use.
954  */
955 static int pullup(struct pxa25x_udc *udc)
956 {
957         int is_active = udc->vbus && udc->pullup && !udc->suspended;
958         DMSG("%s\n", is_active ? "active" : "inactive");
959         if (is_active) {
960                 if (!udc->active) {
961                         udc->active = 1;
962                         /* Enable clock for USB device */
963                         clk_enable(udc->clk);
964                         udc_enable(udc);
965                 }
966         } else {
967                 if (udc->active) {
968                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
969                                 DMSG("disconnect %s\n", udc->driver
970                                         ? udc->driver->driver.name
971                                         : "(no driver)");
972                                 stop_activity(udc, udc->driver);
973                         }
974                         udc_disable(udc);
975                         /* Disable clock for USB device */
976                         clk_disable(udc->clk);
977                         udc->active = 0;
978                 }
979
980         }
981         return 0;
982 }
983
984 /* VBUS reporting logically comes from a transceiver */
985 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
986 {
987         struct pxa25x_udc       *udc;
988
989         udc = container_of(_gadget, struct pxa25x_udc, gadget);
990         udc->vbus = is_active;
991         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
992         pullup(udc);
993         return 0;
994 }
995
996 /* drivers may have software control over D+ pullup */
997 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
998 {
999         struct pxa25x_udc       *udc;
1000
1001         udc = container_of(_gadget, struct pxa25x_udc, gadget);
1002
1003         /* not all boards support pullup control */
1004         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1005                 return -EOPNOTSUPP;
1006
1007         udc->pullup = (is_active != 0);
1008         pullup(udc);
1009         return 0;
1010 }
1011
1012 /* boards may consume current from VBUS, up to 100-500mA based on config.
1013  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
1014  * violate USB specs.
1015  */
1016 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1017 {
1018         struct pxa25x_udc       *udc;
1019
1020         udc = container_of(_gadget, struct pxa25x_udc, gadget);
1021
1022         if (udc->transceiver)
1023                 return otg_set_power(udc->transceiver, mA);
1024         return -EOPNOTSUPP;
1025 }
1026
1027 static const struct usb_gadget_ops pxa25x_udc_ops = {
1028         .get_frame      = pxa25x_udc_get_frame,
1029         .wakeup         = pxa25x_udc_wakeup,
1030         .vbus_session   = pxa25x_udc_vbus_session,
1031         .pullup         = pxa25x_udc_pullup,
1032         .vbus_draw      = pxa25x_udc_vbus_draw,
1033 };
1034
1035 /*-------------------------------------------------------------------------*/
1036
1037 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1038
1039 static int
1040 udc_seq_show(struct seq_file *m, void *_d)
1041 {
1042         struct pxa25x_udc       *dev = m->private;
1043         unsigned long           flags;
1044         int                     i;
1045         u32                     tmp;
1046
1047         local_irq_save(flags);
1048
1049         /* basic device status */
1050         seq_printf(m, DRIVER_DESC "\n"
1051                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1052                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1053                 dev->driver ? dev->driver->driver.name : "(none)",
1054                 is_vbus_present() ? "full speed" : "disconnected");
1055
1056         /* registers for device and ep0 */
1057         seq_printf(m,
1058                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1059                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1060
1061         tmp = UDCCR;
1062         seq_printf(m,
1063                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1064                 (tmp & UDCCR_REM) ? " rem" : "",
1065                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1066                 (tmp & UDCCR_SRM) ? " srm" : "",
1067                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1068                 (tmp & UDCCR_RESIR) ? " resir" : "",
1069                 (tmp & UDCCR_RSM) ? " rsm" : "",
1070                 (tmp & UDCCR_UDA) ? " uda" : "",
1071                 (tmp & UDCCR_UDE) ? " ude" : "");
1072
1073         tmp = UDCCS0;
1074         seq_printf(m,
1075                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1076                 (tmp & UDCCS0_SA) ? " sa" : "",
1077                 (tmp & UDCCS0_RNE) ? " rne" : "",
1078                 (tmp & UDCCS0_FST) ? " fst" : "",
1079                 (tmp & UDCCS0_SST) ? " sst" : "",
1080                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1081                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1082                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1083                 (tmp & UDCCS0_OPR) ? " opr" : "");
1084
1085         if (dev->has_cfr) {
1086                 tmp = UDCCFR;
1087                 seq_printf(m,
1088                         "udccfr %02X =%s%s\n", tmp,
1089                         (tmp & UDCCFR_AREN) ? " aren" : "",
1090                         (tmp & UDCCFR_ACM) ? " acm" : "");
1091         }
1092
1093         if (!is_vbus_present() || !dev->driver)
1094                 goto done;
1095
1096         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1097                 dev->stats.write.bytes, dev->stats.write.ops,
1098                 dev->stats.read.bytes, dev->stats.read.ops,
1099                 dev->stats.irqs);
1100
1101         /* dump endpoint queues */
1102         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1103                 struct pxa25x_ep        *ep = &dev->ep [i];
1104                 struct pxa25x_request   *req;
1105
1106                 if (i != 0) {
1107                         const struct usb_endpoint_descriptor    *desc;
1108
1109                         desc = ep->desc;
1110                         if (!desc)
1111                                 continue;
1112                         tmp = *dev->ep [i].reg_udccs;
1113                         seq_printf(m,
1114                                 "%s max %d %s udccs %02x irqs %lu\n",
1115                                 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1116                                 "pio", tmp, ep->pio_irqs);
1117                         /* TODO translate all five groups of udccs bits! */
1118
1119                 } else /* ep0 should only have one transfer queued */
1120                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1121                                 ep->pio_irqs);
1122
1123                 if (list_empty(&ep->queue)) {
1124                         seq_printf(m, "\t(nothing queued)\n");
1125                         continue;
1126                 }
1127                 list_for_each_entry(req, &ep->queue, queue) {
1128                         seq_printf(m,
1129                                         "\treq %p len %d/%d buf %p\n",
1130                                         &req->req, req->req.actual,
1131                                         req->req.length, req->req.buf);
1132                 }
1133         }
1134
1135 done:
1136         local_irq_restore(flags);
1137         return 0;
1138 }
1139
1140 static int
1141 udc_debugfs_open(struct inode *inode, struct file *file)
1142 {
1143         return single_open(file, udc_seq_show, inode->i_private);
1144 }
1145
1146 static const struct file_operations debug_fops = {
1147         .open           = udc_debugfs_open,
1148         .read           = seq_read,
1149         .llseek         = seq_lseek,
1150         .release        = single_release,
1151         .owner          = THIS_MODULE,
1152 };
1153
1154 #define create_debug_files(dev) \
1155         do { \
1156                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1157                         S_IRUGO, NULL, dev, &debug_fops); \
1158         } while (0)
1159 #define remove_debug_files(dev) \
1160         do { \
1161                 if (dev->debugfs_udc) \
1162                         debugfs_remove(dev->debugfs_udc); \
1163         } while (0)
1164
1165 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1166
1167 #define create_debug_files(dev) do {} while (0)
1168 #define remove_debug_files(dev) do {} while (0)
1169
1170 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1171
1172 /*-------------------------------------------------------------------------*/
1173
1174 /*
1175  *      udc_disable - disable USB device controller
1176  */
1177 static void udc_disable(struct pxa25x_udc *dev)
1178 {
1179         /* block all irqs */
1180         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1181         UICR0 = UICR1 = 0xff;
1182         UFNRH = UFNRH_SIM;
1183
1184         /* if hardware supports it, disconnect from usb */
1185         pullup_off();
1186
1187         udc_clear_mask_UDCCR(UDCCR_UDE);
1188
1189         ep0_idle (dev);
1190         dev->gadget.speed = USB_SPEED_UNKNOWN;
1191 }
1192
1193
1194 /*
1195  *      udc_reinit - initialize software state
1196  */
1197 static void udc_reinit(struct pxa25x_udc *dev)
1198 {
1199         u32     i;
1200
1201         /* device/ep0 records init */
1202         INIT_LIST_HEAD (&dev->gadget.ep_list);
1203         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1204         dev->ep0state = EP0_IDLE;
1205
1206         /* basic endpoint records init */
1207         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1208                 struct pxa25x_ep *ep = &dev->ep[i];
1209
1210                 if (i != 0)
1211                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1212
1213                 ep->desc = NULL;
1214                 ep->stopped = 0;
1215                 INIT_LIST_HEAD (&ep->queue);
1216                 ep->pio_irqs = 0;
1217         }
1218
1219         /* the rest was statically initialized, and is read-only */
1220 }
1221
1222 /* until it's enabled, this UDC should be completely invisible
1223  * to any USB host.
1224  */
1225 static void udc_enable (struct pxa25x_udc *dev)
1226 {
1227         udc_clear_mask_UDCCR(UDCCR_UDE);
1228
1229         /* try to clear these bits before we enable the udc */
1230         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1231
1232         ep0_idle(dev);
1233         dev->gadget.speed = USB_SPEED_UNKNOWN;
1234         dev->stats.irqs = 0;
1235
1236         /*
1237          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1238          * - enable UDC
1239          * - if RESET is already in progress, ack interrupt
1240          * - unmask reset interrupt
1241          */
1242         udc_set_mask_UDCCR(UDCCR_UDE);
1243         if (!(UDCCR & UDCCR_UDA))
1244                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1245
1246         if (dev->has_cfr /* UDC_RES2 is defined */) {
1247                 /* pxa255 (a0+) can avoid a set_config race that could
1248                  * prevent gadget drivers from configuring correctly
1249                  */
1250                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1251         } else {
1252                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1253                  * which could result in missing packets and interrupts.
1254                  * supposedly one bit per endpoint, controlling whether it
1255                  * double buffers or not; ACM/AREN bits fit into the holes.
1256                  * zero bits (like USIR0_IRx) disable double buffering.
1257                  */
1258                 UDC_RES1 = 0x00;
1259                 UDC_RES2 = 0x00;
1260         }
1261
1262         /* enable suspend/resume and reset irqs */
1263         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1264
1265         /* enable ep0 irqs */
1266         UICR0 &= ~UICR0_IM0;
1267
1268         /* if hardware supports it, pullup D+ and wait for reset */
1269         pullup_on();
1270 }
1271
1272
1273 /* when a driver is successfully registered, it will receive
1274  * control requests including set_configuration(), which enables
1275  * non-control requests.  then usb traffic follows until a
1276  * disconnect is reported.  then a host may connect again, or
1277  * the driver might get unbound.
1278  */
1279 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1280 {
1281         struct pxa25x_udc       *dev = the_controller;
1282         int                     retval;
1283
1284         if (!driver
1285                         || driver->speed < USB_SPEED_FULL
1286                         || !driver->bind
1287                         || !driver->disconnect
1288                         || !driver->setup)
1289                 return -EINVAL;
1290         if (!dev)
1291                 return -ENODEV;
1292         if (dev->driver)
1293                 return -EBUSY;
1294
1295         /* first hook up the driver ... */
1296         dev->driver = driver;
1297         dev->gadget.dev.driver = &driver->driver;
1298         dev->pullup = 1;
1299
1300         retval = device_add (&dev->gadget.dev);
1301         if (retval) {
1302 fail:
1303                 dev->driver = NULL;
1304                 dev->gadget.dev.driver = NULL;
1305                 return retval;
1306         }
1307         retval = driver->bind(&dev->gadget);
1308         if (retval) {
1309                 DMSG("bind to driver %s --> error %d\n",
1310                                 driver->driver.name, retval);
1311                 device_del (&dev->gadget.dev);
1312                 goto fail;
1313         }
1314
1315         /* ... then enable host detection and ep0; and we're ready
1316          * for set_configuration as well as eventual disconnect.
1317          */
1318         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1319
1320         /* connect to bus through transceiver */
1321         if (dev->transceiver) {
1322                 retval = otg_set_peripheral(dev->transceiver, &dev->gadget);
1323                 if (retval) {
1324                         DMSG("can't bind to transceiver\n");
1325                         if (driver->unbind)
1326                                 driver->unbind(&dev->gadget);
1327                         goto bind_fail;
1328                 }
1329         }
1330
1331         pullup(dev);
1332         dump_state(dev);
1333         return 0;
1334 bind_fail:
1335         return retval;
1336 }
1337 EXPORT_SYMBOL(usb_gadget_register_driver);
1338
1339 static void
1340 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1341 {
1342         int i;
1343
1344         /* don't disconnect drivers more than once */
1345         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1346                 driver = NULL;
1347         dev->gadget.speed = USB_SPEED_UNKNOWN;
1348
1349         /* prevent new request submissions, kill any outstanding requests  */
1350         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1351                 struct pxa25x_ep *ep = &dev->ep[i];
1352
1353                 ep->stopped = 1;
1354                 nuke(ep, -ESHUTDOWN);
1355         }
1356         del_timer_sync(&dev->timer);
1357
1358         /* report disconnect; the driver is already quiesced */
1359         if (driver)
1360                 driver->disconnect(&dev->gadget);
1361
1362         /* re-init driver-visible data structures */
1363         udc_reinit(dev);
1364 }
1365
1366 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1367 {
1368         struct pxa25x_udc       *dev = the_controller;
1369
1370         if (!dev)
1371                 return -ENODEV;
1372         if (!driver || driver != dev->driver || !driver->unbind)
1373                 return -EINVAL;
1374
1375         local_irq_disable();
1376         dev->pullup = 0;
1377         pullup(dev);
1378         stop_activity(dev, driver);
1379         local_irq_enable();
1380
1381         if (dev->transceiver)
1382                 (void) otg_set_peripheral(dev->transceiver, NULL);
1383
1384         driver->unbind(&dev->gadget);
1385         dev->gadget.dev.driver = NULL;
1386         dev->driver = NULL;
1387
1388         device_del (&dev->gadget.dev);
1389
1390         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1391         dump_state(dev);
1392         return 0;
1393 }
1394 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1395
1396
1397 /*-------------------------------------------------------------------------*/
1398
1399 #ifdef CONFIG_ARCH_LUBBOCK
1400
1401 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1402  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1403  */
1404
1405 static irqreturn_t
1406 lubbock_vbus_irq(int irq, void *_dev)
1407 {
1408         struct pxa25x_udc       *dev = _dev;
1409         int                     vbus;
1410
1411         dev->stats.irqs++;
1412         switch (irq) {
1413         case LUBBOCK_USB_IRQ:
1414                 vbus = 1;
1415                 disable_irq(LUBBOCK_USB_IRQ);
1416                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1417                 break;
1418         case LUBBOCK_USB_DISC_IRQ:
1419                 vbus = 0;
1420                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1421                 enable_irq(LUBBOCK_USB_IRQ);
1422                 break;
1423         default:
1424                 return IRQ_NONE;
1425         }
1426
1427         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1428         return IRQ_HANDLED;
1429 }
1430
1431 #endif
1432
1433 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1434 {
1435         struct pxa25x_udc       *dev = _dev;
1436
1437         pxa25x_udc_vbus_session(&dev->gadget, is_vbus_present());
1438         return IRQ_HANDLED;
1439 }
1440
1441
1442 /*-------------------------------------------------------------------------*/
1443
1444 static inline void clear_ep_state (struct pxa25x_udc *dev)
1445 {
1446         unsigned i;
1447
1448         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1449          * fifos, and pending transactions mustn't be continued in any case.
1450          */
1451         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1452                 nuke(&dev->ep[i], -ECONNABORTED);
1453 }
1454
1455 static void udc_watchdog(unsigned long _dev)
1456 {
1457         struct pxa25x_udc       *dev = (void *)_dev;
1458
1459         local_irq_disable();
1460         if (dev->ep0state == EP0_STALL
1461                         && (UDCCS0 & UDCCS0_FST) == 0
1462                         && (UDCCS0 & UDCCS0_SST) == 0) {
1463                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1464                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1465                 start_watchdog(dev);
1466         }
1467         local_irq_enable();
1468 }
1469
1470 static void handle_ep0 (struct pxa25x_udc *dev)
1471 {
1472         u32                     udccs0 = UDCCS0;
1473         struct pxa25x_ep        *ep = &dev->ep [0];
1474         struct pxa25x_request   *req;
1475         union {
1476                 struct usb_ctrlrequest  r;
1477                 u8                      raw [8];
1478                 u32                     word [2];
1479         } u;
1480
1481         if (list_empty(&ep->queue))
1482                 req = NULL;
1483         else
1484                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1485
1486         /* clear stall status */
1487         if (udccs0 & UDCCS0_SST) {
1488                 nuke(ep, -EPIPE);
1489                 UDCCS0 = UDCCS0_SST;
1490                 del_timer(&dev->timer);
1491                 ep0_idle(dev);
1492         }
1493
1494         /* previous request unfinished?  non-error iff back-to-back ... */
1495         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1496                 nuke(ep, 0);
1497                 del_timer(&dev->timer);
1498                 ep0_idle(dev);
1499         }
1500
1501         switch (dev->ep0state) {
1502         case EP0_IDLE:
1503                 /* late-breaking status? */
1504                 udccs0 = UDCCS0;
1505
1506                 /* start control request? */
1507                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1508                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1509                         int i;
1510
1511                         nuke (ep, -EPROTO);
1512
1513                         /* read SETUP packet */
1514                         for (i = 0; i < 8; i++) {
1515                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1516 bad_setup:
1517                                         DMSG("SETUP %d!\n", i);
1518                                         goto stall;
1519                                 }
1520                                 u.raw [i] = (u8) UDDR0;
1521                         }
1522                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1523                                 goto bad_setup;
1524
1525 got_setup:
1526                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1527                                 u.r.bRequestType, u.r.bRequest,
1528                                 le16_to_cpu(u.r.wValue),
1529                                 le16_to_cpu(u.r.wIndex),
1530                                 le16_to_cpu(u.r.wLength));
1531
1532                         /* cope with automagic for some standard requests. */
1533                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1534                                                 == USB_TYPE_STANDARD;
1535                         dev->req_config = 0;
1536                         dev->req_pending = 1;
1537                         switch (u.r.bRequest) {
1538                         /* hardware restricts gadget drivers here! */
1539                         case USB_REQ_SET_CONFIGURATION:
1540                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1541                                         /* reflect hardware's automagic
1542                                          * up to the gadget driver.
1543                                          */
1544 config_change:
1545                                         dev->req_config = 1;
1546                                         clear_ep_state(dev);
1547                                         /* if !has_cfr, there's no synch
1548                                          * else use AREN (later) not SA|OPR
1549                                          * USIR0_IR0 acts edge sensitive
1550                                          */
1551                                 }
1552                                 break;
1553                         /* ... and here, even more ... */
1554                         case USB_REQ_SET_INTERFACE:
1555                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1556                                         /* udc hardware is broken by design:
1557                                          *  - altsetting may only be zero;
1558                                          *  - hw resets all interfaces' eps;
1559                                          *  - ep reset doesn't include halt(?).
1560                                          */
1561                                         DMSG("broken set_interface (%d/%d)\n",
1562                                                 le16_to_cpu(u.r.wIndex),
1563                                                 le16_to_cpu(u.r.wValue));
1564                                         goto config_change;
1565                                 }
1566                                 break;
1567                         /* hardware was supposed to hide this */
1568                         case USB_REQ_SET_ADDRESS:
1569                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1570                                         ep0start(dev, 0, "address");
1571                                         return;
1572                                 }
1573                                 break;
1574                         }
1575
1576                         if (u.r.bRequestType & USB_DIR_IN)
1577                                 dev->ep0state = EP0_IN_DATA_PHASE;
1578                         else
1579                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1580
1581                         i = dev->driver->setup(&dev->gadget, &u.r);
1582                         if (i < 0) {
1583                                 /* hardware automagic preventing STALL... */
1584                                 if (dev->req_config) {
1585                                         /* hardware sometimes neglects to tell
1586                                          * tell us about config change events,
1587                                          * so later ones may fail...
1588                                          */
1589                                         WARNING("config change %02x fail %d?\n",
1590                                                 u.r.bRequest, i);
1591                                         return;
1592                                         /* TODO experiment:  if has_cfr,
1593                                          * hardware didn't ACK; maybe we
1594                                          * could actually STALL!
1595                                          */
1596                                 }
1597                                 DBG(DBG_VERBOSE, "protocol STALL, "
1598                                         "%02x err %d\n", UDCCS0, i);
1599 stall:
1600                                 /* the watchdog timer helps deal with cases
1601                                  * where udc seems to clear FST wrongly, and
1602                                  * then NAKs instead of STALLing.
1603                                  */
1604                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1605                                 start_watchdog(dev);
1606                                 dev->ep0state = EP0_STALL;
1607
1608                         /* deferred i/o == no response yet */
1609                         } else if (dev->req_pending) {
1610                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1611                                                 || dev->req_std || u.r.wLength))
1612                                         ep0start(dev, 0, "defer");
1613                                 else
1614                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1615                         }
1616
1617                         /* expect at least one data or status stage irq */
1618                         return;
1619
1620                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1621                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1622                         unsigned i;
1623
1624                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1625                          * still observed on a pxa255 a0.
1626                          */
1627                         DBG(DBG_VERBOSE, "e131\n");
1628                         nuke(ep, -EPROTO);
1629
1630                         /* read SETUP data, but don't trust it too much */
1631                         for (i = 0; i < 8; i++)
1632                                 u.raw [i] = (u8) UDDR0;
1633                         if ((u.r.bRequestType & USB_RECIP_MASK)
1634                                         > USB_RECIP_OTHER)
1635                                 goto stall;
1636                         if (u.word [0] == 0 && u.word [1] == 0)
1637                                 goto stall;
1638                         goto got_setup;
1639                 } else {
1640                         /* some random early IRQ:
1641                          * - we acked FST
1642                          * - IPR cleared
1643                          * - OPR got set, without SA (likely status stage)
1644                          */
1645                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1646                 }
1647                 break;
1648         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1649                 if (udccs0 & UDCCS0_OPR) {
1650                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1651                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1652                         if (req)
1653                                 done(ep, req, 0);
1654                         ep0_idle(dev);
1655                 } else /* irq was IPR clearing */ {
1656                         if (req) {
1657                                 /* this IN packet might finish the request */
1658                                 (void) write_ep0_fifo(ep, req);
1659                         } /* else IN token before response was written */
1660                 }
1661                 break;
1662         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1663                 if (udccs0 & UDCCS0_OPR) {
1664                         if (req) {
1665                                 /* this OUT packet might finish the request */
1666                                 if (read_ep0_fifo(ep, req))
1667                                         done(ep, req, 0);
1668                                 /* else more OUT packets expected */
1669                         } /* else OUT token before read was issued */
1670                 } else /* irq was IPR clearing */ {
1671                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1672                         if (req)
1673                                 done(ep, req, 0);
1674                         ep0_idle(dev);
1675                 }
1676                 break;
1677         case EP0_END_XFER:
1678                 if (req)
1679                         done(ep, req, 0);
1680                 /* ack control-IN status (maybe in-zlp was skipped)
1681                  * also appears after some config change events.
1682                  */
1683                 if (udccs0 & UDCCS0_OPR)
1684                         UDCCS0 = UDCCS0_OPR;
1685                 ep0_idle(dev);
1686                 break;
1687         case EP0_STALL:
1688                 UDCCS0 = UDCCS0_FST;
1689                 break;
1690         }
1691         USIR0 = USIR0_IR0;
1692 }
1693
1694 static void handle_ep(struct pxa25x_ep *ep)
1695 {
1696         struct pxa25x_request   *req;
1697         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1698         int                     completed;
1699         u32                     udccs, tmp;
1700
1701         do {
1702                 completed = 0;
1703                 if (likely (!list_empty(&ep->queue)))
1704                         req = list_entry(ep->queue.next,
1705                                         struct pxa25x_request, queue);
1706                 else
1707                         req = NULL;
1708
1709                 // TODO check FST handling
1710
1711                 udccs = *ep->reg_udccs;
1712                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1713                         tmp = UDCCS_BI_TUR;
1714                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1715                                 tmp |= UDCCS_BI_SST;
1716                         tmp &= udccs;
1717                         if (likely (tmp))
1718                                 *ep->reg_udccs = tmp;
1719                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1720                                 completed = write_fifo(ep, req);
1721
1722                 } else {        /* irq from RPC (or for ISO, ROF) */
1723                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1724                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1725                         else
1726                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1727                         tmp &= udccs;
1728                         if (likely(tmp))
1729                                 *ep->reg_udccs = tmp;
1730
1731                         /* fifos can hold packets, ready for reading... */
1732                         if (likely(req)) {
1733                                 completed = read_fifo(ep, req);
1734                         } else
1735                                 pio_irq_disable (ep->bEndpointAddress);
1736                 }
1737                 ep->pio_irqs++;
1738         } while (completed);
1739 }
1740
1741 /*
1742  *      pxa25x_udc_irq - interrupt handler
1743  *
1744  * avoid delays in ep0 processing. the control handshaking isn't always
1745  * under software control (pxa250c0 and the pxa255 are better), and delays
1746  * could cause usb protocol errors.
1747  */
1748 static irqreturn_t
1749 pxa25x_udc_irq(int irq, void *_dev)
1750 {
1751         struct pxa25x_udc       *dev = _dev;
1752         int                     handled;
1753
1754         dev->stats.irqs++;
1755         do {
1756                 u32             udccr = UDCCR;
1757
1758                 handled = 0;
1759
1760                 /* SUSpend Interrupt Request */
1761                 if (unlikely(udccr & UDCCR_SUSIR)) {
1762                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1763                         handled = 1;
1764                         DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1765                                 ? "" : "+disconnect");
1766
1767                         if (!is_vbus_present())
1768                                 stop_activity(dev, dev->driver);
1769                         else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1770                                         && dev->driver
1771                                         && dev->driver->suspend)
1772                                 dev->driver->suspend(&dev->gadget);
1773                         ep0_idle (dev);
1774                 }
1775
1776                 /* RESume Interrupt Request */
1777                 if (unlikely(udccr & UDCCR_RESIR)) {
1778                         udc_ack_int_UDCCR(UDCCR_RESIR);
1779                         handled = 1;
1780                         DBG(DBG_VERBOSE, "USB resume\n");
1781
1782                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1783                                         && dev->driver
1784                                         && dev->driver->resume
1785                                         && is_vbus_present())
1786                                 dev->driver->resume(&dev->gadget);
1787                 }
1788
1789                 /* ReSeT Interrupt Request - USB reset */
1790                 if (unlikely(udccr & UDCCR_RSTIR)) {
1791                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1792                         handled = 1;
1793
1794                         if ((UDCCR & UDCCR_UDA) == 0) {
1795                                 DBG(DBG_VERBOSE, "USB reset start\n");
1796
1797                                 /* reset driver and endpoints,
1798                                  * in case that's not yet done
1799                                  */
1800                                 stop_activity (dev, dev->driver);
1801
1802                         } else {
1803                                 DBG(DBG_VERBOSE, "USB reset end\n");
1804                                 dev->gadget.speed = USB_SPEED_FULL;
1805                                 memset(&dev->stats, 0, sizeof dev->stats);
1806                                 /* driver and endpoints are still reset */
1807                         }
1808
1809                 } else {
1810                         u32     usir0 = USIR0 & ~UICR0;
1811                         u32     usir1 = USIR1 & ~UICR1;
1812                         int     i;
1813
1814                         if (unlikely (!usir0 && !usir1))
1815                                 continue;
1816
1817                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1818
1819                         /* control traffic */
1820                         if (usir0 & USIR0_IR0) {
1821                                 dev->ep[0].pio_irqs++;
1822                                 handle_ep0(dev);
1823                                 handled = 1;
1824                         }
1825
1826                         /* endpoint data transfers */
1827                         for (i = 0; i < 8; i++) {
1828                                 u32     tmp = 1 << i;
1829
1830                                 if (i && (usir0 & tmp)) {
1831                                         handle_ep(&dev->ep[i]);
1832                                         USIR0 |= tmp;
1833                                         handled = 1;
1834                                 }
1835 #ifndef CONFIG_USB_PXA25X_SMALL
1836                                 if (usir1 & tmp) {
1837                                         handle_ep(&dev->ep[i+8]);
1838                                         USIR1 |= tmp;
1839                                         handled = 1;
1840                                 }
1841 #endif
1842                         }
1843                 }
1844
1845                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1846
1847         } while (handled);
1848         return IRQ_HANDLED;
1849 }
1850
1851 /*-------------------------------------------------------------------------*/
1852
1853 static void nop_release (struct device *dev)
1854 {
1855         DMSG("%s %s\n", __func__, dev_name(dev));
1856 }
1857
1858 /* this uses load-time allocation and initialization (instead of
1859  * doing it at run-time) to save code, eliminate fault paths, and
1860  * be more obviously correct.
1861  */
1862 static struct pxa25x_udc memory = {
1863         .gadget = {
1864                 .ops            = &pxa25x_udc_ops,
1865                 .ep0            = &memory.ep[0].ep,
1866                 .name           = driver_name,
1867                 .dev = {
1868                         .init_name      = "gadget",
1869                         .release        = nop_release,
1870                 },
1871         },
1872
1873         /* control endpoint */
1874         .ep[0] = {
1875                 .ep = {
1876                         .name           = ep0name,
1877                         .ops            = &pxa25x_ep_ops,
1878                         .maxpacket      = EP0_FIFO_SIZE,
1879                 },
1880                 .dev            = &memory,
1881                 .reg_udccs      = &UDCCS0,
1882                 .reg_uddr       = &UDDR0,
1883         },
1884
1885         /* first group of endpoints */
1886         .ep[1] = {
1887                 .ep = {
1888                         .name           = "ep1in-bulk",
1889                         .ops            = &pxa25x_ep_ops,
1890                         .maxpacket      = BULK_FIFO_SIZE,
1891                 },
1892                 .dev            = &memory,
1893                 .fifo_size      = BULK_FIFO_SIZE,
1894                 .bEndpointAddress = USB_DIR_IN | 1,
1895                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1896                 .reg_udccs      = &UDCCS1,
1897                 .reg_uddr       = &UDDR1,
1898         },
1899         .ep[2] = {
1900                 .ep = {
1901                         .name           = "ep2out-bulk",
1902                         .ops            = &pxa25x_ep_ops,
1903                         .maxpacket      = BULK_FIFO_SIZE,
1904                 },
1905                 .dev            = &memory,
1906                 .fifo_size      = BULK_FIFO_SIZE,
1907                 .bEndpointAddress = 2,
1908                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1909                 .reg_udccs      = &UDCCS2,
1910                 .reg_ubcr       = &UBCR2,
1911                 .reg_uddr       = &UDDR2,
1912         },
1913 #ifndef CONFIG_USB_PXA25X_SMALL
1914         .ep[3] = {
1915                 .ep = {
1916                         .name           = "ep3in-iso",
1917                         .ops            = &pxa25x_ep_ops,
1918                         .maxpacket      = ISO_FIFO_SIZE,
1919                 },
1920                 .dev            = &memory,
1921                 .fifo_size      = ISO_FIFO_SIZE,
1922                 .bEndpointAddress = USB_DIR_IN | 3,
1923                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1924                 .reg_udccs      = &UDCCS3,
1925                 .reg_uddr       = &UDDR3,
1926         },
1927         .ep[4] = {
1928                 .ep = {
1929                         .name           = "ep4out-iso",
1930                         .ops            = &pxa25x_ep_ops,
1931                         .maxpacket      = ISO_FIFO_SIZE,
1932                 },
1933                 .dev            = &memory,
1934                 .fifo_size      = ISO_FIFO_SIZE,
1935                 .bEndpointAddress = 4,
1936                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1937                 .reg_udccs      = &UDCCS4,
1938                 .reg_ubcr       = &UBCR4,
1939                 .reg_uddr       = &UDDR4,
1940         },
1941         .ep[5] = {
1942                 .ep = {
1943                         .name           = "ep5in-int",
1944                         .ops            = &pxa25x_ep_ops,
1945                         .maxpacket      = INT_FIFO_SIZE,
1946                 },
1947                 .dev            = &memory,
1948                 .fifo_size      = INT_FIFO_SIZE,
1949                 .bEndpointAddress = USB_DIR_IN | 5,
1950                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1951                 .reg_udccs      = &UDCCS5,
1952                 .reg_uddr       = &UDDR5,
1953         },
1954
1955         /* second group of endpoints */
1956         .ep[6] = {
1957                 .ep = {
1958                         .name           = "ep6in-bulk",
1959                         .ops            = &pxa25x_ep_ops,
1960                         .maxpacket      = BULK_FIFO_SIZE,
1961                 },
1962                 .dev            = &memory,
1963                 .fifo_size      = BULK_FIFO_SIZE,
1964                 .bEndpointAddress = USB_DIR_IN | 6,
1965                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1966                 .reg_udccs      = &UDCCS6,
1967                 .reg_uddr       = &UDDR6,
1968         },
1969         .ep[7] = {
1970                 .ep = {
1971                         .name           = "ep7out-bulk",
1972                         .ops            = &pxa25x_ep_ops,
1973                         .maxpacket      = BULK_FIFO_SIZE,
1974                 },
1975                 .dev            = &memory,
1976                 .fifo_size      = BULK_FIFO_SIZE,
1977                 .bEndpointAddress = 7,
1978                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1979                 .reg_udccs      = &UDCCS7,
1980                 .reg_ubcr       = &UBCR7,
1981                 .reg_uddr       = &UDDR7,
1982         },
1983         .ep[8] = {
1984                 .ep = {
1985                         .name           = "ep8in-iso",
1986                         .ops            = &pxa25x_ep_ops,
1987                         .maxpacket      = ISO_FIFO_SIZE,
1988                 },
1989                 .dev            = &memory,
1990                 .fifo_size      = ISO_FIFO_SIZE,
1991                 .bEndpointAddress = USB_DIR_IN | 8,
1992                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1993                 .reg_udccs      = &UDCCS8,
1994                 .reg_uddr       = &UDDR8,
1995         },
1996         .ep[9] = {
1997                 .ep = {
1998                         .name           = "ep9out-iso",
1999                         .ops            = &pxa25x_ep_ops,
2000                         .maxpacket      = ISO_FIFO_SIZE,
2001                 },
2002                 .dev            = &memory,
2003                 .fifo_size      = ISO_FIFO_SIZE,
2004                 .bEndpointAddress = 9,
2005                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2006                 .reg_udccs      = &UDCCS9,
2007                 .reg_ubcr       = &UBCR9,
2008                 .reg_uddr       = &UDDR9,
2009         },
2010         .ep[10] = {
2011                 .ep = {
2012                         .name           = "ep10in-int",
2013                         .ops            = &pxa25x_ep_ops,
2014                         .maxpacket      = INT_FIFO_SIZE,
2015                 },
2016                 .dev            = &memory,
2017                 .fifo_size      = INT_FIFO_SIZE,
2018                 .bEndpointAddress = USB_DIR_IN | 10,
2019                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2020                 .reg_udccs      = &UDCCS10,
2021                 .reg_uddr       = &UDDR10,
2022         },
2023
2024         /* third group of endpoints */
2025         .ep[11] = {
2026                 .ep = {
2027                         .name           = "ep11in-bulk",
2028                         .ops            = &pxa25x_ep_ops,
2029                         .maxpacket      = BULK_FIFO_SIZE,
2030                 },
2031                 .dev            = &memory,
2032                 .fifo_size      = BULK_FIFO_SIZE,
2033                 .bEndpointAddress = USB_DIR_IN | 11,
2034                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2035                 .reg_udccs      = &UDCCS11,
2036                 .reg_uddr       = &UDDR11,
2037         },
2038         .ep[12] = {
2039                 .ep = {
2040                         .name           = "ep12out-bulk",
2041                         .ops            = &pxa25x_ep_ops,
2042                         .maxpacket      = BULK_FIFO_SIZE,
2043                 },
2044                 .dev            = &memory,
2045                 .fifo_size      = BULK_FIFO_SIZE,
2046                 .bEndpointAddress = 12,
2047                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2048                 .reg_udccs      = &UDCCS12,
2049                 .reg_ubcr       = &UBCR12,
2050                 .reg_uddr       = &UDDR12,
2051         },
2052         .ep[13] = {
2053                 .ep = {
2054                         .name           = "ep13in-iso",
2055                         .ops            = &pxa25x_ep_ops,
2056                         .maxpacket      = ISO_FIFO_SIZE,
2057                 },
2058                 .dev            = &memory,
2059                 .fifo_size      = ISO_FIFO_SIZE,
2060                 .bEndpointAddress = USB_DIR_IN | 13,
2061                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2062                 .reg_udccs      = &UDCCS13,
2063                 .reg_uddr       = &UDDR13,
2064         },
2065         .ep[14] = {
2066                 .ep = {
2067                         .name           = "ep14out-iso",
2068                         .ops            = &pxa25x_ep_ops,
2069                         .maxpacket      = ISO_FIFO_SIZE,
2070                 },
2071                 .dev            = &memory,
2072                 .fifo_size      = ISO_FIFO_SIZE,
2073                 .bEndpointAddress = 14,
2074                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2075                 .reg_udccs      = &UDCCS14,
2076                 .reg_ubcr       = &UBCR14,
2077                 .reg_uddr       = &UDDR14,
2078         },
2079         .ep[15] = {
2080                 .ep = {
2081                         .name           = "ep15in-int",
2082                         .ops            = &pxa25x_ep_ops,
2083                         .maxpacket      = INT_FIFO_SIZE,
2084                 },
2085                 .dev            = &memory,
2086                 .fifo_size      = INT_FIFO_SIZE,
2087                 .bEndpointAddress = USB_DIR_IN | 15,
2088                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2089                 .reg_udccs      = &UDCCS15,
2090                 .reg_uddr       = &UDDR15,
2091         },
2092 #endif /* !CONFIG_USB_PXA25X_SMALL */
2093 };
2094
2095 #define CP15R0_VENDOR_MASK      0xffffe000
2096
2097 #if     defined(CONFIG_ARCH_PXA)
2098 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2099
2100 #elif   defined(CONFIG_ARCH_IXP4XX)
2101 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2102
2103 #endif
2104
2105 #define CP15R0_PROD_MASK        0x000003f0
2106 #define PXA25x                  0x00000100      /* and PXA26x */
2107 #define PXA210                  0x00000120
2108
2109 #define CP15R0_REV_MASK         0x0000000f
2110
2111 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2112
2113 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2114 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2115 #define PXA250_B2               0x00000104
2116 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2117 #define PXA250_B0               0x00000102
2118 #define PXA250_A1               0x00000101
2119 #define PXA250_A0               0x00000100
2120
2121 #define PXA210_C0               0x00000125
2122 #define PXA210_B2               0x00000124
2123 #define PXA210_B1               0x00000123
2124 #define PXA210_B0               0x00000122
2125 #define IXP425_A0               0x000001c1
2126 #define IXP425_B0               0x000001f1
2127 #define IXP465_AD               0x00000200
2128
2129 /*
2130  *      probe - binds to the platform device
2131  */
2132 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2133 {
2134         struct pxa25x_udc *dev = &memory;
2135         int retval, vbus_irq, irq;
2136         u32 chiprev;
2137
2138         /* insist on Intel/ARM/XScale */
2139         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2140         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2141                 pr_err("%s: not XScale!\n", driver_name);
2142                 return -ENODEV;
2143         }
2144
2145         /* trigger chiprev-specific logic */
2146         switch (chiprev & CP15R0_PRODREV_MASK) {
2147 #if     defined(CONFIG_ARCH_PXA)
2148         case PXA255_A0:
2149                 dev->has_cfr = 1;
2150                 break;
2151         case PXA250_A0:
2152         case PXA250_A1:
2153                 /* A0/A1 "not released"; ep 13, 15 unusable */
2154                 /* fall through */
2155         case PXA250_B2: case PXA210_B2:
2156         case PXA250_B1: case PXA210_B1:
2157         case PXA250_B0: case PXA210_B0:
2158                 /* OUT-DMA is broken ... */
2159                 /* fall through */
2160         case PXA250_C0: case PXA210_C0:
2161                 break;
2162 #elif   defined(CONFIG_ARCH_IXP4XX)
2163         case IXP425_A0:
2164         case IXP425_B0:
2165         case IXP465_AD:
2166                 dev->has_cfr = 1;
2167                 break;
2168 #endif
2169         default:
2170                 pr_err("%s: unrecognized processor: %08x\n",
2171                         driver_name, chiprev);
2172                 /* iop3xx, ixp4xx, ... */
2173                 return -ENODEV;
2174         }
2175
2176         irq = platform_get_irq(pdev, 0);
2177         if (irq < 0)
2178                 return -ENODEV;
2179
2180         dev->clk = clk_get(&pdev->dev, NULL);
2181         if (IS_ERR(dev->clk)) {
2182                 retval = PTR_ERR(dev->clk);
2183                 goto err_clk;
2184         }
2185
2186         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2187                 dev->has_cfr ? "" : " (!cfr)",
2188                 SIZE_STR "(pio)"
2189                 );
2190
2191         /* other non-static parts of init */
2192         dev->dev = &pdev->dev;
2193         dev->mach = pdev->dev.platform_data;
2194
2195         dev->transceiver = otg_get_transceiver();
2196
2197         if (gpio_is_valid(dev->mach->gpio_vbus)) {
2198                 if ((retval = gpio_request(dev->mach->gpio_vbus,
2199                                 "pxa25x_udc GPIO VBUS"))) {
2200                         dev_dbg(&pdev->dev,
2201                                 "can't get vbus gpio %d, err: %d\n",
2202                                 dev->mach->gpio_vbus, retval);
2203                         goto err_gpio_vbus;
2204                 }
2205                 gpio_direction_input(dev->mach->gpio_vbus);
2206                 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2207         } else
2208                 vbus_irq = 0;
2209
2210         if (gpio_is_valid(dev->mach->gpio_pullup)) {
2211                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2212                                 "pca25x_udc GPIO PULLUP"))) {
2213                         dev_dbg(&pdev->dev,
2214                                 "can't get pullup gpio %d, err: %d\n",
2215                                 dev->mach->gpio_pullup, retval);
2216                         goto err_gpio_pullup;
2217                 }
2218                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2219         }
2220
2221         init_timer(&dev->timer);
2222         dev->timer.function = udc_watchdog;
2223         dev->timer.data = (unsigned long) dev;
2224
2225         device_initialize(&dev->gadget.dev);
2226         dev->gadget.dev.parent = &pdev->dev;
2227         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2228
2229         the_controller = dev;
2230         platform_set_drvdata(pdev, dev);
2231
2232         udc_disable(dev);
2233         udc_reinit(dev);
2234
2235         dev->vbus = !!is_vbus_present();
2236
2237         /* irq setup after old hardware state is cleaned up */
2238         retval = request_irq(irq, pxa25x_udc_irq,
2239                         IRQF_DISABLED, driver_name, dev);
2240         if (retval != 0) {
2241                 pr_err("%s: can't get irq %d, err %d\n",
2242                         driver_name, irq, retval);
2243                 goto err_irq1;
2244         }
2245         dev->got_irq = 1;
2246
2247 #ifdef CONFIG_ARCH_LUBBOCK
2248         if (machine_is_lubbock()) {
2249                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2250                                 lubbock_vbus_irq,
2251                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2252                                 driver_name, dev);
2253                 if (retval != 0) {
2254                         pr_err("%s: can't get irq %i, err %d\n",
2255                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2256 lubbock_fail0:
2257                         goto err_irq_lub;
2258                 }
2259                 retval = request_irq(LUBBOCK_USB_IRQ,
2260                                 lubbock_vbus_irq,
2261                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2262                                 driver_name, dev);
2263                 if (retval != 0) {
2264                         pr_err("%s: can't get irq %i, err %d\n",
2265                                 driver_name, LUBBOCK_USB_IRQ, retval);
2266                         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2267                         goto lubbock_fail0;
2268                 }
2269         } else
2270 #endif
2271         if (vbus_irq) {
2272                 retval = request_irq(vbus_irq, udc_vbus_irq,
2273                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2274                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2275                                 driver_name, dev);
2276                 if (retval != 0) {
2277                         pr_err("%s: can't get irq %i, err %d\n",
2278                                 driver_name, vbus_irq, retval);
2279                         goto err_vbus_irq;
2280                 }
2281         }
2282         create_debug_files(dev);
2283
2284         return 0;
2285
2286  err_vbus_irq:
2287 #ifdef  CONFIG_ARCH_LUBBOCK
2288         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2289  err_irq_lub:
2290 #endif
2291         free_irq(irq, dev);
2292  err_irq1:
2293         if (gpio_is_valid(dev->mach->gpio_pullup))
2294                 gpio_free(dev->mach->gpio_pullup);
2295  err_gpio_pullup:
2296         if (gpio_is_valid(dev->mach->gpio_vbus))
2297                 gpio_free(dev->mach->gpio_vbus);
2298  err_gpio_vbus:
2299         if (dev->transceiver) {
2300                 otg_put_transceiver(dev->transceiver);
2301                 dev->transceiver = NULL;
2302         }
2303         clk_put(dev->clk);
2304  err_clk:
2305         return retval;
2306 }
2307
2308 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2309 {
2310         pullup_off();
2311 }
2312
2313 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2314 {
2315         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2316
2317         if (dev->driver)
2318                 return -EBUSY;
2319
2320         dev->pullup = 0;
2321         pullup(dev);
2322
2323         remove_debug_files(dev);
2324
2325         if (dev->got_irq) {
2326                 free_irq(platform_get_irq(pdev, 0), dev);
2327                 dev->got_irq = 0;
2328         }
2329 #ifdef CONFIG_ARCH_LUBBOCK
2330         if (machine_is_lubbock()) {
2331                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2332                 free_irq(LUBBOCK_USB_IRQ, dev);
2333         }
2334 #endif
2335         if (gpio_is_valid(dev->mach->gpio_vbus)) {
2336                 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2337                 gpio_free(dev->mach->gpio_vbus);
2338         }
2339         if (gpio_is_valid(dev->mach->gpio_pullup))
2340                 gpio_free(dev->mach->gpio_pullup);
2341
2342         clk_put(dev->clk);
2343
2344         if (dev->transceiver) {
2345                 otg_put_transceiver(dev->transceiver);
2346                 dev->transceiver = NULL;
2347         }
2348
2349         platform_set_drvdata(pdev, NULL);
2350         the_controller = NULL;
2351         return 0;
2352 }
2353
2354 /*-------------------------------------------------------------------------*/
2355
2356 #ifdef  CONFIG_PM
2357
2358 /* USB suspend (controlled by the host) and system suspend (controlled
2359  * by the PXA) don't necessarily work well together.  If USB is active,
2360  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2361  * mode, or any deeper PM saving state.
2362  *
2363  * For now, we punt and forcibly disconnect from the USB host when PXA
2364  * enters any suspend state.  While we're disconnected, we always disable
2365  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2366  * Boards without software pullup control shouldn't use those states.
2367  * VBUS IRQs should probably be ignored so that the PXA device just acts
2368  * "dead" to USB hosts until system resume.
2369  */
2370 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2371 {
2372         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2373         unsigned long flags;
2374
2375         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2376                 WARNING("USB host won't detect disconnect!\n");
2377         udc->suspended = 1;
2378
2379         local_irq_save(flags);
2380         pullup(udc);
2381         local_irq_restore(flags);
2382
2383         return 0;
2384 }
2385
2386 static int pxa25x_udc_resume(struct platform_device *dev)
2387 {
2388         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2389         unsigned long flags;
2390
2391         udc->suspended = 0;
2392         local_irq_save(flags);
2393         pullup(udc);
2394         local_irq_restore(flags);
2395
2396         return 0;
2397 }
2398
2399 #else
2400 #define pxa25x_udc_suspend      NULL
2401 #define pxa25x_udc_resume       NULL
2402 #endif
2403
2404 /*-------------------------------------------------------------------------*/
2405
2406 static struct platform_driver udc_driver = {
2407         .shutdown       = pxa25x_udc_shutdown,
2408         .remove         = __exit_p(pxa25x_udc_remove),
2409         .suspend        = pxa25x_udc_suspend,
2410         .resume         = pxa25x_udc_resume,
2411         .driver         = {
2412                 .owner  = THIS_MODULE,
2413                 .name   = "pxa25x-udc",
2414         },
2415 };
2416
2417 static int __init udc_init(void)
2418 {
2419         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2420         return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2421 }
2422 module_init(udc_init);
2423
2424 static void __exit udc_exit(void)
2425 {
2426         platform_driver_unregister(&udc_driver);
2427 }
2428 module_exit(udc_exit);
2429
2430 MODULE_DESCRIPTION(DRIVER_DESC);
2431 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2432 MODULE_LICENSE("GPL");
2433 MODULE_ALIAS("platform:pxa25x-udc");