2 * M66592 UDC (USB gadget)
4 * Copyright (C) 2006-2007 Renesas Solutions Corp.
6 * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/slab.h>
29 #include <linux/err.h>
30 #include <linux/usb/ch9.h>
31 #include <linux/usb/gadget.h>
33 #include "m66592-udc.h"
35 MODULE_DESCRIPTION("M66592 USB gadget driver");
36 MODULE_LICENSE("GPL");
37 MODULE_AUTHOR("Yoshihiro Shimoda");
38 MODULE_ALIAS("platform:m66592_udc");
40 #define DRIVER_VERSION "21 July 2009"
42 static const char udc_name[] = "m66592_udc";
43 static const char *m66592_ep_name[] = {
44 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7"
47 static void disable_controller(struct m66592 *m66592);
48 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req);
49 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req);
50 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
53 static void transfer_complete(struct m66592_ep *ep,
54 struct m66592_request *req, int status);
56 /*-------------------------------------------------------------------------*/
57 static inline u16 get_usb_speed(struct m66592 *m66592)
59 return (m66592_read(m66592, M66592_DVSTCTR) & M66592_RHST);
62 static void enable_pipe_irq(struct m66592 *m66592, u16 pipenum,
67 tmp = m66592_read(m66592, M66592_INTENB0);
68 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
70 m66592_bset(m66592, (1 << pipenum), reg);
71 m66592_write(m66592, tmp, M66592_INTENB0);
74 static void disable_pipe_irq(struct m66592 *m66592, u16 pipenum,
79 tmp = m66592_read(m66592, M66592_INTENB0);
80 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
82 m66592_bclr(m66592, (1 << pipenum), reg);
83 m66592_write(m66592, tmp, M66592_INTENB0);
86 static void m66592_usb_connect(struct m66592 *m66592)
88 m66592_bset(m66592, M66592_CTRE, M66592_INTENB0);
89 m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
91 m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
93 m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);
96 static void m66592_usb_disconnect(struct m66592 *m66592)
97 __releases(m66592->lock)
98 __acquires(m66592->lock)
100 m66592_bclr(m66592, M66592_CTRE, M66592_INTENB0);
101 m66592_bclr(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
103 m66592_bclr(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
104 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
106 m66592->gadget.speed = USB_SPEED_UNKNOWN;
107 spin_unlock(&m66592->lock);
108 m66592->driver->disconnect(&m66592->gadget);
109 spin_lock(&m66592->lock);
111 disable_controller(m66592);
112 INIT_LIST_HEAD(&m66592->ep[0].queue);
115 static inline u16 control_reg_get_pid(struct m66592 *m66592, u16 pipenum)
118 unsigned long offset;
121 pid = m66592_read(m66592, M66592_DCPCTR) & M66592_PID;
122 else if (pipenum < M66592_MAX_NUM_PIPE) {
123 offset = get_pipectr_addr(pipenum);
124 pid = m66592_read(m66592, offset) & M66592_PID;
126 pr_err("unexpect pipe num (%d)\n", pipenum);
131 static inline void control_reg_set_pid(struct m66592 *m66592, u16 pipenum,
134 unsigned long offset;
137 m66592_mdfy(m66592, pid, M66592_PID, M66592_DCPCTR);
138 else if (pipenum < M66592_MAX_NUM_PIPE) {
139 offset = get_pipectr_addr(pipenum);
140 m66592_mdfy(m66592, pid, M66592_PID, offset);
142 pr_err("unexpect pipe num (%d)\n", pipenum);
145 static inline void pipe_start(struct m66592 *m66592, u16 pipenum)
147 control_reg_set_pid(m66592, pipenum, M66592_PID_BUF);
150 static inline void pipe_stop(struct m66592 *m66592, u16 pipenum)
152 control_reg_set_pid(m66592, pipenum, M66592_PID_NAK);
155 static inline void pipe_stall(struct m66592 *m66592, u16 pipenum)
157 control_reg_set_pid(m66592, pipenum, M66592_PID_STALL);
160 static inline u16 control_reg_get(struct m66592 *m66592, u16 pipenum)
163 unsigned long offset;
166 ret = m66592_read(m66592, M66592_DCPCTR);
167 else if (pipenum < M66592_MAX_NUM_PIPE) {
168 offset = get_pipectr_addr(pipenum);
169 ret = m66592_read(m66592, offset);
171 pr_err("unexpect pipe num (%d)\n", pipenum);
176 static inline void control_reg_sqclr(struct m66592 *m66592, u16 pipenum)
178 unsigned long offset;
180 pipe_stop(m66592, pipenum);
183 m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR);
184 else if (pipenum < M66592_MAX_NUM_PIPE) {
185 offset = get_pipectr_addr(pipenum);
186 m66592_bset(m66592, M66592_SQCLR, offset);
188 pr_err("unexpect pipe num(%d)\n", pipenum);
191 static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
197 tmp = m66592_read(m66592, M66592_DCPCFG);
198 if ((tmp & M66592_CNTMD) != 0)
201 tmp = m66592_read(m66592, M66592_DCPMAXP);
202 size = tmp & M66592_MAXP;
205 m66592_write(m66592, pipenum, M66592_PIPESEL);
206 tmp = m66592_read(m66592, M66592_PIPECFG);
207 if ((tmp & M66592_CNTMD) != 0) {
208 tmp = m66592_read(m66592, M66592_PIPEBUF);
209 size = ((tmp >> 10) + 1) * 64;
211 tmp = m66592_read(m66592, M66592_PIPEMAXP);
212 size = tmp & M66592_MXPS;
219 static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
221 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
227 m66592_mdfy(m66592, pipenum, M66592_CURPIPE, ep->fifosel);
231 if (m66592->pdata->on_chip)
236 m66592_bset(m66592, mbw, ep->fifosel);
239 static int pipe_buffer_setting(struct m66592 *m66592,
240 struct m66592_pipe_info *info)
242 u16 bufnum = 0, buf_bsize = 0;
248 m66592_write(m66592, info->pipe, M66592_PIPESEL);
251 pipecfg |= M66592_DIR;
252 pipecfg |= info->type;
253 pipecfg |= info->epnum;
254 switch (info->type) {
256 bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT);
260 /* isochronous pipes may be used as bulk pipes */
261 if (info->pipe >= M66592_BASE_PIPENUM_BULK)
262 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
264 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
266 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
268 pipecfg |= M66592_DBLB;
270 pipecfg |= M66592_SHTNAK;
273 bufnum = M66592_BASE_BUFNUM +
274 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
279 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
280 pr_err("m66592 pipe memory is insufficient\n");
284 m66592_write(m66592, pipecfg, M66592_PIPECFG);
285 m66592_write(m66592, (buf_bsize << 10) | (bufnum), M66592_PIPEBUF);
286 m66592_write(m66592, info->maxpacket, M66592_PIPEMAXP);
289 m66592_write(m66592, info->interval, M66592_PIPEPERI);
294 static void pipe_buffer_release(struct m66592 *m66592,
295 struct m66592_pipe_info *info)
300 if (is_bulk_pipe(info->pipe)) {
302 } else if (is_interrupt_pipe(info->pipe))
304 else if (is_isoc_pipe(info->pipe)) {
305 m66592->isochronous--;
306 if (info->type == M66592_BULK)
309 pr_err("ep_release: unexpect pipenum (%d)\n",
313 static void pipe_initialize(struct m66592_ep *ep)
315 struct m66592 *m66592 = ep->m66592;
318 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
320 m66592_write(m66592, M66592_ACLRM, ep->pipectr);
321 m66592_write(m66592, 0, ep->pipectr);
322 m66592_write(m66592, M66592_SQCLR, ep->pipectr);
324 m66592_mdfy(m66592, ep->pipenum, M66592_CURPIPE, ep->fifosel);
328 if (m66592->pdata->on_chip)
333 m66592_bset(m66592, mbw, ep->fifosel);
337 static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
338 const struct usb_endpoint_descriptor *desc,
339 u16 pipenum, int dma)
341 if ((pipenum != 0) && dma) {
342 if (m66592->num_dma == 0) {
345 ep->fifoaddr = M66592_D0FIFO;
346 ep->fifosel = M66592_D0FIFOSEL;
347 ep->fifoctr = M66592_D0FIFOCTR;
348 ep->fifotrn = M66592_D0FIFOTRN;
349 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
352 ep->fifoaddr = M66592_D1FIFO;
353 ep->fifosel = M66592_D1FIFOSEL;
354 ep->fifoctr = M66592_D1FIFOCTR;
355 ep->fifotrn = M66592_D1FIFOTRN;
358 ep->fifoaddr = M66592_CFIFO;
359 ep->fifosel = M66592_CFIFOSEL;
360 ep->fifoctr = M66592_CFIFOCTR;
365 ep->fifoaddr = M66592_CFIFO;
366 ep->fifosel = M66592_CFIFOSEL;
367 ep->fifoctr = M66592_CFIFOCTR;
371 ep->pipectr = get_pipectr_addr(pipenum);
372 ep->pipenum = pipenum;
373 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
374 m66592->pipenum2ep[pipenum] = ep;
375 m66592->epaddr2ep[desc->bEndpointAddress&USB_ENDPOINT_NUMBER_MASK] = ep;
376 INIT_LIST_HEAD(&ep->queue);
379 static void m66592_ep_release(struct m66592_ep *ep)
381 struct m66592 *m66592 = ep->m66592;
382 u16 pipenum = ep->pipenum;
394 static int alloc_pipe_config(struct m66592_ep *ep,
395 const struct usb_endpoint_descriptor *desc)
397 struct m66592 *m66592 = ep->m66592;
398 struct m66592_pipe_info info;
407 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
408 case USB_ENDPOINT_XFER_BULK:
409 if (m66592->bulk >= M66592_MAX_NUM_BULK) {
410 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
411 pr_err("bulk pipe is insufficient\n");
414 info.pipe = M66592_BASE_PIPENUM_ISOC
415 + m66592->isochronous;
416 counter = &m66592->isochronous;
419 info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk;
420 counter = &m66592->bulk;
422 info.type = M66592_BULK;
425 case USB_ENDPOINT_XFER_INT:
426 if (m66592->interrupt >= M66592_MAX_NUM_INT) {
427 pr_err("interrupt pipe is insufficient\n");
430 info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt;
431 info.type = M66592_INT;
432 counter = &m66592->interrupt;
434 case USB_ENDPOINT_XFER_ISOC:
435 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
436 pr_err("isochronous pipe is insufficient\n");
439 info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous;
440 info.type = M66592_ISO;
441 counter = &m66592->isochronous;
444 pr_err("unexpect xfer type\n");
447 ep->type = info.type;
449 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
450 info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
451 info.interval = desc->bInterval;
452 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
457 ret = pipe_buffer_setting(m66592, &info);
459 pr_err("pipe_buffer_setting fail\n");
464 if ((counter == &m66592->isochronous) && info.type == M66592_BULK)
467 m66592_ep_setting(m66592, ep, desc, info.pipe, dma);
473 static int free_pipe_config(struct m66592_ep *ep)
475 struct m66592 *m66592 = ep->m66592;
476 struct m66592_pipe_info info;
478 info.pipe = ep->pipenum;
479 info.type = ep->type;
480 pipe_buffer_release(m66592, &info);
481 m66592_ep_release(ep);
486 /*-------------------------------------------------------------------------*/
487 static void pipe_irq_enable(struct m66592 *m66592, u16 pipenum)
489 enable_irq_ready(m66592, pipenum);
490 enable_irq_nrdy(m66592, pipenum);
493 static void pipe_irq_disable(struct m66592 *m66592, u16 pipenum)
495 disable_irq_ready(m66592, pipenum);
496 disable_irq_nrdy(m66592, pipenum);
499 /* if complete is true, gadget driver complete function is not call */
500 static void control_end(struct m66592 *m66592, unsigned ccpl)
502 m66592->ep[0].internal_ccpl = ccpl;
503 pipe_start(m66592, 0);
504 m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR);
507 static void start_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
509 struct m66592 *m66592 = ep->m66592;
511 pipe_change(m66592, ep->pipenum);
512 m66592_mdfy(m66592, M66592_ISEL | M66592_PIPE0,
513 (M66592_ISEL | M66592_CURPIPE),
515 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
516 if (req->req.length == 0) {
517 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
518 pipe_start(m66592, 0);
519 transfer_complete(ep, req, 0);
521 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
522 irq_ep0_write(ep, req);
526 static void start_packet_write(struct m66592_ep *ep, struct m66592_request *req)
528 struct m66592 *m66592 = ep->m66592;
531 pipe_change(m66592, ep->pipenum);
532 disable_irq_empty(m66592, ep->pipenum);
533 pipe_start(m66592, ep->pipenum);
535 tmp = m66592_read(m66592, ep->fifoctr);
536 if (unlikely((tmp & M66592_FRDY) == 0))
537 pipe_irq_enable(m66592, ep->pipenum);
539 irq_packet_write(ep, req);
542 static void start_packet_read(struct m66592_ep *ep, struct m66592_request *req)
544 struct m66592 *m66592 = ep->m66592;
545 u16 pipenum = ep->pipenum;
547 if (ep->pipenum == 0) {
548 m66592_mdfy(m66592, M66592_PIPE0,
549 (M66592_ISEL | M66592_CURPIPE),
551 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
552 pipe_start(m66592, pipenum);
553 pipe_irq_enable(m66592, pipenum);
556 m66592_bset(m66592, M66592_TRCLR, ep->fifosel);
557 pipe_change(m66592, pipenum);
558 m66592_bset(m66592, M66592_TRENB, ep->fifosel);
560 (req->req.length + ep->ep.maxpacket - 1)
564 pipe_start(m66592, pipenum); /* trigger once */
565 pipe_irq_enable(m66592, pipenum);
569 static void start_packet(struct m66592_ep *ep, struct m66592_request *req)
571 if (ep->desc->bEndpointAddress & USB_DIR_IN)
572 start_packet_write(ep, req);
574 start_packet_read(ep, req);
577 static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
581 ctsq = m66592_read(ep->m66592, M66592_INTSTS0) & M66592_CTSQ;
585 start_ep0_write(ep, req);
588 start_packet_read(ep, req);
592 control_end(ep->m66592, 0);
595 pr_err("start_ep0: unexpect ctsq(%x)\n", ctsq);
600 static void init_controller(struct m66592 *m66592)
604 if (m66592->pdata->on_chip) {
605 if (m66592->pdata->endian)
606 endian = 0; /* big endian */
608 endian = M66592_LITTLE; /* little endian */
610 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
611 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
612 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
613 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
615 /* This is a workaound for SH7722 2nd cut */
616 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
617 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
618 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
620 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
622 m66592_write(m66592, 0, M66592_CFBCFG);
623 m66592_write(m66592, 0, M66592_D0FBCFG);
624 m66592_bset(m66592, endian, M66592_CFBCFG);
625 m66592_bset(m66592, endian, M66592_D0FBCFG);
627 unsigned int clock, vif, irq_sense;
629 if (m66592->pdata->endian)
630 endian = M66592_BIGEND; /* big endian */
632 endian = 0; /* little endian */
634 if (m66592->pdata->vif)
635 vif = M66592_LDRV; /* 3.3v */
639 switch (m66592->pdata->xtal) {
640 case M66592_PLATDATA_XTAL_12MHZ:
641 clock = M66592_XTAL12;
643 case M66592_PLATDATA_XTAL_24MHZ:
644 clock = M66592_XTAL24;
646 case M66592_PLATDATA_XTAL_48MHZ:
647 clock = M66592_XTAL48;
650 pr_warning("m66592-udc: xtal configuration error\n");
654 switch (m66592->irq_trigger) {
655 case IRQF_TRIGGER_LOW:
656 irq_sense = M66592_INTL;
658 case IRQF_TRIGGER_FALLING:
662 pr_warning("m66592-udc: irq trigger config error\n");
667 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
669 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
670 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
672 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
673 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
674 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
676 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
680 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
684 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
686 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
687 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
692 static void disable_controller(struct m66592 *m66592)
694 m66592_bclr(m66592, M66592_UTST, M66592_TESTMODE);
695 if (!m66592->pdata->on_chip) {
696 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
698 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
700 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
702 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
706 static void m66592_start_xclock(struct m66592 *m66592)
710 if (!m66592->pdata->on_chip) {
711 tmp = m66592_read(m66592, M66592_SYSCFG);
712 if (!(tmp & M66592_XCKE))
713 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
717 /*-------------------------------------------------------------------------*/
718 static void transfer_complete(struct m66592_ep *ep,
719 struct m66592_request *req, int status)
720 __releases(m66592->lock)
721 __acquires(m66592->lock)
725 if (unlikely(ep->pipenum == 0)) {
726 if (ep->internal_ccpl) {
727 ep->internal_ccpl = 0;
732 list_del_init(&req->queue);
733 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
734 req->req.status = -ESHUTDOWN;
736 req->req.status = status;
738 if (!list_empty(&ep->queue))
741 spin_unlock(&ep->m66592->lock);
742 req->req.complete(&ep->ep, &req->req);
743 spin_lock(&ep->m66592->lock);
746 req = list_entry(ep->queue.next, struct m66592_request, queue);
748 start_packet(ep, req);
752 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
759 u16 pipenum = ep->pipenum;
760 struct m66592 *m66592 = ep->m66592;
762 pipe_change(m66592, pipenum);
763 m66592_bset(m66592, M66592_ISEL, ep->fifosel);
767 tmp = m66592_read(m66592, ep->fifoctr);
769 pr_err("pipe0 is busy. maybe cpu i/o bus "
770 "conflict. please power off this controller.");
774 } while ((tmp & M66592_FRDY) == 0);
776 /* prepare parameters */
777 bufsize = get_buffer_size(m66592, pipenum);
778 buf = req->req.buf + req->req.actual;
779 size = min(bufsize, req->req.length - req->req.actual);
784 m66592_write_fifo(m66592, ep, buf, size);
785 if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
786 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
789 /* update parameters */
790 req->req.actual += size;
792 /* check transfer finish */
793 if ((!req->req.zero && (req->req.actual == req->req.length))
794 || (size % ep->ep.maxpacket)
796 disable_irq_ready(m66592, pipenum);
797 disable_irq_empty(m66592, pipenum);
799 disable_irq_ready(m66592, pipenum);
800 enable_irq_empty(m66592, pipenum);
802 pipe_start(m66592, pipenum);
805 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req)
811 u16 pipenum = ep->pipenum;
812 struct m66592 *m66592 = ep->m66592;
814 pipe_change(m66592, pipenum);
815 tmp = m66592_read(m66592, ep->fifoctr);
816 if (unlikely((tmp & M66592_FRDY) == 0)) {
817 pipe_stop(m66592, pipenum);
818 pipe_irq_disable(m66592, pipenum);
819 pr_err("write fifo not ready. pipnum=%d\n", pipenum);
823 /* prepare parameters */
824 bufsize = get_buffer_size(m66592, pipenum);
825 buf = req->req.buf + req->req.actual;
826 size = min(bufsize, req->req.length - req->req.actual);
830 m66592_write_fifo(m66592, ep, buf, size);
832 || ((size % ep->ep.maxpacket) != 0)
833 || ((bufsize != ep->ep.maxpacket)
834 && (bufsize > size)))
835 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
838 /* update parameters */
839 req->req.actual += size;
840 /* check transfer finish */
841 if ((!req->req.zero && (req->req.actual == req->req.length))
842 || (size % ep->ep.maxpacket)
844 disable_irq_ready(m66592, pipenum);
845 enable_irq_empty(m66592, pipenum);
847 disable_irq_empty(m66592, pipenum);
848 pipe_irq_enable(m66592, pipenum);
852 static void irq_packet_read(struct m66592_ep *ep, struct m66592_request *req)
855 int rcv_len, bufsize, req_len;
858 u16 pipenum = ep->pipenum;
859 struct m66592 *m66592 = ep->m66592;
862 pipe_change(m66592, pipenum);
863 tmp = m66592_read(m66592, ep->fifoctr);
864 if (unlikely((tmp & M66592_FRDY) == 0)) {
865 req->req.status = -EPIPE;
866 pipe_stop(m66592, pipenum);
867 pipe_irq_disable(m66592, pipenum);
868 pr_err("read fifo not ready");
872 /* prepare parameters */
873 rcv_len = tmp & M66592_DTLN;
874 bufsize = get_buffer_size(m66592, pipenum);
876 buf = req->req.buf + req->req.actual;
877 req_len = req->req.length - req->req.actual;
878 if (rcv_len < bufsize)
879 size = min(rcv_len, req_len);
881 size = min(bufsize, req_len);
883 /* update parameters */
884 req->req.actual += size;
886 /* check transfer finish */
887 if ((!req->req.zero && (req->req.actual == req->req.length))
888 || (size % ep->ep.maxpacket)
890 pipe_stop(m66592, pipenum);
891 pipe_irq_disable(m66592, pipenum);
898 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
900 m66592_read_fifo(m66592, ep->fifoaddr, buf, size);
903 if ((ep->pipenum != 0) && finish)
904 transfer_complete(ep, req, 0);
907 static void irq_pipe_ready(struct m66592 *m66592, u16 status, u16 enb)
911 struct m66592_ep *ep;
912 struct m66592_request *req;
914 if ((status & M66592_BRDY0) && (enb & M66592_BRDY0)) {
915 m66592_write(m66592, ~M66592_BRDY0, M66592_BRDYSTS);
916 m66592_mdfy(m66592, M66592_PIPE0, M66592_CURPIPE,
920 req = list_entry(ep->queue.next, struct m66592_request, queue);
921 irq_packet_read(ep, req);
923 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
924 check = 1 << pipenum;
925 if ((status & check) && (enb & check)) {
926 m66592_write(m66592, ~check, M66592_BRDYSTS);
927 ep = m66592->pipenum2ep[pipenum];
928 req = list_entry(ep->queue.next,
929 struct m66592_request, queue);
930 if (ep->desc->bEndpointAddress & USB_DIR_IN)
931 irq_packet_write(ep, req);
933 irq_packet_read(ep, req);
939 static void irq_pipe_empty(struct m66592 *m66592, u16 status, u16 enb)
944 struct m66592_ep *ep;
945 struct m66592_request *req;
947 if ((status & M66592_BEMP0) && (enb & M66592_BEMP0)) {
948 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
951 req = list_entry(ep->queue.next, struct m66592_request, queue);
952 irq_ep0_write(ep, req);
954 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
955 check = 1 << pipenum;
956 if ((status & check) && (enb & check)) {
957 m66592_write(m66592, ~check, M66592_BEMPSTS);
958 tmp = control_reg_get(m66592, pipenum);
959 if ((tmp & M66592_INBUFM) == 0) {
960 disable_irq_empty(m66592, pipenum);
961 pipe_irq_disable(m66592, pipenum);
962 pipe_stop(m66592, pipenum);
963 ep = m66592->pipenum2ep[pipenum];
964 req = list_entry(ep->queue.next,
965 struct m66592_request,
967 if (!list_empty(&ep->queue))
968 transfer_complete(ep, req, 0);
975 static void get_status(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
976 __releases(m66592->lock)
977 __acquires(m66592->lock)
979 struct m66592_ep *ep;
982 u16 w_index = le16_to_cpu(ctrl->wIndex);
984 switch (ctrl->bRequestType & USB_RECIP_MASK) {
985 case USB_RECIP_DEVICE:
986 status = 1 << USB_DEVICE_SELF_POWERED;
988 case USB_RECIP_INTERFACE:
991 case USB_RECIP_ENDPOINT:
992 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
993 pid = control_reg_get_pid(m66592, ep->pipenum);
994 if (pid == M66592_PID_STALL)
995 status = 1 << USB_ENDPOINT_HALT;
1000 pipe_stall(m66592, 0);
1004 m66592->ep0_data = cpu_to_le16(status);
1005 m66592->ep0_req->buf = &m66592->ep0_data;
1006 m66592->ep0_req->length = 2;
1007 /* AV: what happens if we get called again before that gets through? */
1008 spin_unlock(&m66592->lock);
1009 m66592_queue(m66592->gadget.ep0, m66592->ep0_req, GFP_KERNEL);
1010 spin_lock(&m66592->lock);
1013 static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1015 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1016 case USB_RECIP_DEVICE:
1017 control_end(m66592, 1);
1019 case USB_RECIP_INTERFACE:
1020 control_end(m66592, 1);
1022 case USB_RECIP_ENDPOINT: {
1023 struct m66592_ep *ep;
1024 struct m66592_request *req;
1025 u16 w_index = le16_to_cpu(ctrl->wIndex);
1027 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1028 pipe_stop(m66592, ep->pipenum);
1029 control_reg_sqclr(m66592, ep->pipenum);
1031 control_end(m66592, 1);
1033 req = list_entry(ep->queue.next,
1034 struct m66592_request, queue);
1037 if (list_empty(&ep->queue))
1039 start_packet(ep, req);
1040 } else if (!list_empty(&ep->queue))
1041 pipe_start(m66592, ep->pipenum);
1045 pipe_stall(m66592, 0);
1050 static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1055 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1056 case USB_RECIP_DEVICE:
1057 switch (le16_to_cpu(ctrl->wValue)) {
1058 case USB_DEVICE_TEST_MODE:
1059 control_end(m66592, 1);
1060 /* Wait for the completion of status stage */
1062 tmp = m66592_read(m66592, M66592_INTSTS0) &
1065 } while (tmp != M66592_CS_IDST || timeout-- > 0);
1067 if (tmp == M66592_CS_IDST)
1069 le16_to_cpu(ctrl->wIndex >> 8),
1073 pipe_stall(m66592, 0);
1077 case USB_RECIP_INTERFACE:
1078 control_end(m66592, 1);
1080 case USB_RECIP_ENDPOINT: {
1081 struct m66592_ep *ep;
1082 u16 w_index = le16_to_cpu(ctrl->wIndex);
1084 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1085 pipe_stall(m66592, ep->pipenum);
1087 control_end(m66592, 1);
1091 pipe_stall(m66592, 0);
1096 /* if return value is true, call class driver's setup() */
1097 static int setup_packet(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1099 u16 *p = (u16 *)ctrl;
1100 unsigned long offset = M66592_USBREQ;
1104 m66592_write(m66592, ~M66592_VALID, M66592_INTSTS0);
1106 for (i = 0; i < 4; i++)
1107 p[i] = m66592_read(m66592, offset + i*2);
1110 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1111 switch (ctrl->bRequest) {
1112 case USB_REQ_GET_STATUS:
1113 get_status(m66592, ctrl);
1115 case USB_REQ_CLEAR_FEATURE:
1116 clear_feature(m66592, ctrl);
1118 case USB_REQ_SET_FEATURE:
1119 set_feature(m66592, ctrl);
1130 static void m66592_update_usb_speed(struct m66592 *m66592)
1132 u16 speed = get_usb_speed(m66592);
1136 m66592->gadget.speed = USB_SPEED_HIGH;
1139 m66592->gadget.speed = USB_SPEED_FULL;
1142 m66592->gadget.speed = USB_SPEED_UNKNOWN;
1143 pr_err("USB speed unknown\n");
1147 static void irq_device_state(struct m66592 *m66592)
1151 dvsq = m66592_read(m66592, M66592_INTSTS0) & M66592_DVSQ;
1152 m66592_write(m66592, ~M66592_DVST, M66592_INTSTS0);
1154 if (dvsq == M66592_DS_DFLT) { /* bus reset */
1155 m66592->driver->disconnect(&m66592->gadget);
1156 m66592_update_usb_speed(m66592);
1158 if (m66592->old_dvsq == M66592_DS_CNFG && dvsq != M66592_DS_CNFG)
1159 m66592_update_usb_speed(m66592);
1160 if ((dvsq == M66592_DS_CNFG || dvsq == M66592_DS_ADDS)
1161 && m66592->gadget.speed == USB_SPEED_UNKNOWN)
1162 m66592_update_usb_speed(m66592);
1164 m66592->old_dvsq = dvsq;
1167 static void irq_control_stage(struct m66592 *m66592)
1168 __releases(m66592->lock)
1169 __acquires(m66592->lock)
1171 struct usb_ctrlrequest ctrl;
1174 ctsq = m66592_read(m66592, M66592_INTSTS0) & M66592_CTSQ;
1175 m66592_write(m66592, ~M66592_CTRT, M66592_INTSTS0);
1178 case M66592_CS_IDST: {
1179 struct m66592_ep *ep;
1180 struct m66592_request *req;
1181 ep = &m66592->ep[0];
1182 req = list_entry(ep->queue.next, struct m66592_request, queue);
1183 transfer_complete(ep, req, 0);
1187 case M66592_CS_RDDS:
1188 case M66592_CS_WRDS:
1189 case M66592_CS_WRND:
1190 if (setup_packet(m66592, &ctrl)) {
1191 spin_unlock(&m66592->lock);
1192 if (m66592->driver->setup(&m66592->gadget, &ctrl) < 0)
1193 pipe_stall(m66592, 0);
1194 spin_lock(&m66592->lock);
1197 case M66592_CS_RDSS:
1198 case M66592_CS_WRSS:
1199 control_end(m66592, 0);
1202 pr_err("ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1207 static irqreturn_t m66592_irq(int irq, void *_m66592)
1209 struct m66592 *m66592 = _m66592;
1212 u16 brdysts, nrdysts, bempsts;
1213 u16 brdyenb, nrdyenb, bempenb;
1217 spin_lock(&m66592->lock);
1219 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1220 intenb0 = m66592_read(m66592, M66592_INTENB0);
1222 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1224 * When USB clock stops, it cannot read register. Even if a
1225 * clock stops, the interrupt occurs. So this driver turn on
1226 * a clock by this timing and do re-reading of register.
1228 m66592_start_xclock(m66592);
1229 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1230 intenb0 = m66592_read(m66592, M66592_INTENB0);
1233 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1235 mask0 = intsts0 & intenb0;
1237 brdysts = m66592_read(m66592, M66592_BRDYSTS);
1238 nrdysts = m66592_read(m66592, M66592_NRDYSTS);
1239 bempsts = m66592_read(m66592, M66592_BEMPSTS);
1240 brdyenb = m66592_read(m66592, M66592_BRDYENB);
1241 nrdyenb = m66592_read(m66592, M66592_NRDYENB);
1242 bempenb = m66592_read(m66592, M66592_BEMPENB);
1244 if (mask0 & M66592_VBINT) {
1245 m66592_write(m66592, 0xffff & ~M66592_VBINT,
1247 m66592_start_xclock(m66592);
1249 /* start vbus sampling */
1250 m66592->old_vbus = m66592_read(m66592, M66592_INTSTS0)
1252 m66592->scount = M66592_MAX_SAMPLING;
1254 mod_timer(&m66592->timer,
1255 jiffies + msecs_to_jiffies(50));
1257 if (intsts0 & M66592_DVSQ)
1258 irq_device_state(m66592);
1260 if ((intsts0 & M66592_BRDY) && (intenb0 & M66592_BRDYE)
1261 && (brdysts & brdyenb)) {
1262 irq_pipe_ready(m66592, brdysts, brdyenb);
1264 if ((intsts0 & M66592_BEMP) && (intenb0 & M66592_BEMPE)
1265 && (bempsts & bempenb)) {
1266 irq_pipe_empty(m66592, bempsts, bempenb);
1269 if (intsts0 & M66592_CTRT)
1270 irq_control_stage(m66592);
1273 m66592_write(m66592, savepipe, M66592_CFIFOSEL);
1275 spin_unlock(&m66592->lock);
1279 static void m66592_timer(unsigned long _m66592)
1281 struct m66592 *m66592 = (struct m66592 *)_m66592;
1282 unsigned long flags;
1285 spin_lock_irqsave(&m66592->lock, flags);
1286 tmp = m66592_read(m66592, M66592_SYSCFG);
1287 if (!(tmp & M66592_RCKE)) {
1288 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
1290 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
1292 if (m66592->scount > 0) {
1293 tmp = m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS;
1294 if (tmp == m66592->old_vbus) {
1296 if (m66592->scount == 0) {
1297 if (tmp == M66592_VBSTS)
1298 m66592_usb_connect(m66592);
1300 m66592_usb_disconnect(m66592);
1302 mod_timer(&m66592->timer,
1303 jiffies + msecs_to_jiffies(50));
1306 m66592->scount = M66592_MAX_SAMPLING;
1307 m66592->old_vbus = tmp;
1308 mod_timer(&m66592->timer,
1309 jiffies + msecs_to_jiffies(50));
1312 spin_unlock_irqrestore(&m66592->lock, flags);
1315 /*-------------------------------------------------------------------------*/
1316 static int m66592_enable(struct usb_ep *_ep,
1317 const struct usb_endpoint_descriptor *desc)
1319 struct m66592_ep *ep;
1321 ep = container_of(_ep, struct m66592_ep, ep);
1322 return alloc_pipe_config(ep, desc);
1325 static int m66592_disable(struct usb_ep *_ep)
1327 struct m66592_ep *ep;
1328 struct m66592_request *req;
1329 unsigned long flags;
1331 ep = container_of(_ep, struct m66592_ep, ep);
1334 while (!list_empty(&ep->queue)) {
1335 req = list_entry(ep->queue.next, struct m66592_request, queue);
1336 spin_lock_irqsave(&ep->m66592->lock, flags);
1337 transfer_complete(ep, req, -ECONNRESET);
1338 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1341 pipe_irq_disable(ep->m66592, ep->pipenum);
1342 return free_pipe_config(ep);
1345 static struct usb_request *m66592_alloc_request(struct usb_ep *_ep,
1348 struct m66592_request *req;
1350 req = kzalloc(sizeof(struct m66592_request), gfp_flags);
1354 INIT_LIST_HEAD(&req->queue);
1359 static void m66592_free_request(struct usb_ep *_ep, struct usb_request *_req)
1361 struct m66592_request *req;
1363 req = container_of(_req, struct m66592_request, req);
1367 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
1370 struct m66592_ep *ep;
1371 struct m66592_request *req;
1372 unsigned long flags;
1375 ep = container_of(_ep, struct m66592_ep, ep);
1376 req = container_of(_req, struct m66592_request, req);
1378 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
1381 spin_lock_irqsave(&ep->m66592->lock, flags);
1383 if (list_empty(&ep->queue))
1386 list_add_tail(&req->queue, &ep->queue);
1387 req->req.actual = 0;
1388 req->req.status = -EINPROGRESS;
1390 if (ep->desc == NULL) /* control */
1393 if (request && !ep->busy)
1394 start_packet(ep, req);
1397 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1402 static int m66592_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1404 struct m66592_ep *ep;
1405 struct m66592_request *req;
1406 unsigned long flags;
1408 ep = container_of(_ep, struct m66592_ep, ep);
1409 req = container_of(_req, struct m66592_request, req);
1411 spin_lock_irqsave(&ep->m66592->lock, flags);
1412 if (!list_empty(&ep->queue))
1413 transfer_complete(ep, req, -ECONNRESET);
1414 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1419 static int m66592_set_halt(struct usb_ep *_ep, int value)
1421 struct m66592_ep *ep;
1422 struct m66592_request *req;
1423 unsigned long flags;
1426 ep = container_of(_ep, struct m66592_ep, ep);
1427 req = list_entry(ep->queue.next, struct m66592_request, queue);
1429 spin_lock_irqsave(&ep->m66592->lock, flags);
1430 if (!list_empty(&ep->queue)) {
1436 pipe_stall(ep->m66592, ep->pipenum);
1439 pipe_stop(ep->m66592, ep->pipenum);
1443 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1447 static void m66592_fifo_flush(struct usb_ep *_ep)
1449 struct m66592_ep *ep;
1450 unsigned long flags;
1452 ep = container_of(_ep, struct m66592_ep, ep);
1453 spin_lock_irqsave(&ep->m66592->lock, flags);
1454 if (list_empty(&ep->queue) && !ep->busy) {
1455 pipe_stop(ep->m66592, ep->pipenum);
1456 m66592_bclr(ep->m66592, M66592_BCLR, ep->fifoctr);
1458 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1461 static struct usb_ep_ops m66592_ep_ops = {
1462 .enable = m66592_enable,
1463 .disable = m66592_disable,
1465 .alloc_request = m66592_alloc_request,
1466 .free_request = m66592_free_request,
1468 .queue = m66592_queue,
1469 .dequeue = m66592_dequeue,
1471 .set_halt = m66592_set_halt,
1472 .fifo_flush = m66592_fifo_flush,
1475 /*-------------------------------------------------------------------------*/
1476 static struct m66592 *the_controller;
1478 static int m66592_start(struct usb_gadget_driver *driver,
1479 int (*bind)(struct usb_gadget *))
1481 struct m66592 *m66592 = the_controller;
1485 || driver->speed != USB_SPEED_HIGH
1494 /* hook up the driver */
1495 driver->driver.bus = NULL;
1496 m66592->driver = driver;
1497 m66592->gadget.dev.driver = &driver->driver;
1499 retval = device_add(&m66592->gadget.dev);
1501 pr_err("device_add error (%d)\n", retval);
1505 retval = bind(&m66592->gadget);
1507 pr_err("bind to driver error (%d)\n", retval);
1508 device_del(&m66592->gadget.dev);
1512 m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1513 if (m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS) {
1514 m66592_start_xclock(m66592);
1515 /* start vbus sampling */
1516 m66592->old_vbus = m66592_read(m66592,
1517 M66592_INTSTS0) & M66592_VBSTS;
1518 m66592->scount = M66592_MAX_SAMPLING;
1519 mod_timer(&m66592->timer, jiffies + msecs_to_jiffies(50));
1525 m66592->driver = NULL;
1526 m66592->gadget.dev.driver = NULL;
1531 static int m66592_stop(struct usb_gadget_driver *driver)
1533 struct m66592 *m66592 = the_controller;
1534 unsigned long flags;
1536 if (driver != m66592->driver || !driver->unbind)
1539 spin_lock_irqsave(&m66592->lock, flags);
1540 if (m66592->gadget.speed != USB_SPEED_UNKNOWN)
1541 m66592_usb_disconnect(m66592);
1542 spin_unlock_irqrestore(&m66592->lock, flags);
1544 m66592_bclr(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1546 driver->unbind(&m66592->gadget);
1547 m66592->gadget.dev.driver = NULL;
1549 init_controller(m66592);
1550 disable_controller(m66592);
1552 device_del(&m66592->gadget.dev);
1553 m66592->driver = NULL;
1557 /*-------------------------------------------------------------------------*/
1558 static int m66592_get_frame(struct usb_gadget *_gadget)
1560 struct m66592 *m66592 = gadget_to_m66592(_gadget);
1561 return m66592_read(m66592, M66592_FRMNUM) & 0x03FF;
1564 static struct usb_gadget_ops m66592_gadget_ops = {
1565 .get_frame = m66592_get_frame,
1566 .start = m66592_start,
1567 .stop = m66592_stop,
1570 static int __exit m66592_remove(struct platform_device *pdev)
1572 struct m66592 *m66592 = dev_get_drvdata(&pdev->dev);
1574 usb_del_gadget_udc(&m66592->gadget);
1576 del_timer_sync(&m66592->timer);
1577 iounmap(m66592->reg);
1578 free_irq(platform_get_irq(pdev, 0), m66592);
1579 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1580 #ifdef CONFIG_HAVE_CLK
1581 if (m66592->pdata->on_chip) {
1582 clk_disable(m66592->clk);
1583 clk_put(m66592->clk);
1590 static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1594 static int __init m66592_probe(struct platform_device *pdev)
1596 struct resource *res, *ires;
1597 void __iomem *reg = NULL;
1598 struct m66592 *m66592 = NULL;
1599 #ifdef CONFIG_HAVE_CLK
1605 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1608 pr_err("platform_get_resource error.\n");
1612 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1616 "platform_get_resource IORESOURCE_IRQ error.\n");
1620 reg = ioremap(res->start, resource_size(res));
1623 pr_err("ioremap error.\n");
1627 if (pdev->dev.platform_data == NULL) {
1628 dev_err(&pdev->dev, "no platform data\n");
1633 /* initialize ucd */
1634 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1635 if (m66592 == NULL) {
1637 pr_err("kzalloc error\n");
1641 m66592->pdata = pdev->dev.platform_data;
1642 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1644 spin_lock_init(&m66592->lock);
1645 dev_set_drvdata(&pdev->dev, m66592);
1647 m66592->gadget.ops = &m66592_gadget_ops;
1648 device_initialize(&m66592->gadget.dev);
1649 dev_set_name(&m66592->gadget.dev, "gadget");
1650 m66592->gadget.is_dualspeed = 1;
1651 m66592->gadget.dev.parent = &pdev->dev;
1652 m66592->gadget.dev.dma_mask = pdev->dev.dma_mask;
1653 m66592->gadget.dev.release = pdev->dev.release;
1654 m66592->gadget.name = udc_name;
1656 init_timer(&m66592->timer);
1657 m66592->timer.function = m66592_timer;
1658 m66592->timer.data = (unsigned long)m66592;
1661 ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1664 pr_err("request_irq error (%d)\n", ret);
1668 #ifdef CONFIG_HAVE_CLK
1669 if (m66592->pdata->on_chip) {
1670 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1671 m66592->clk = clk_get(&pdev->dev, clk_name);
1672 if (IS_ERR(m66592->clk)) {
1673 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1675 ret = PTR_ERR(m66592->clk);
1678 clk_enable(m66592->clk);
1681 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1682 m66592->gadget.ep0 = &m66592->ep[0].ep;
1683 INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list);
1684 for (i = 0; i < M66592_MAX_NUM_PIPE; i++) {
1685 struct m66592_ep *ep = &m66592->ep[i];
1688 INIT_LIST_HEAD(&m66592->ep[i].ep.ep_list);
1689 list_add_tail(&m66592->ep[i].ep.ep_list,
1690 &m66592->gadget.ep_list);
1692 ep->m66592 = m66592;
1693 INIT_LIST_HEAD(&ep->queue);
1694 ep->ep.name = m66592_ep_name[i];
1695 ep->ep.ops = &m66592_ep_ops;
1696 ep->ep.maxpacket = 512;
1698 m66592->ep[0].ep.maxpacket = 64;
1699 m66592->ep[0].pipenum = 0;
1700 m66592->ep[0].fifoaddr = M66592_CFIFO;
1701 m66592->ep[0].fifosel = M66592_CFIFOSEL;
1702 m66592->ep[0].fifoctr = M66592_CFIFOCTR;
1703 m66592->ep[0].fifotrn = 0;
1704 m66592->ep[0].pipectr = get_pipectr_addr(0);
1705 m66592->pipenum2ep[0] = &m66592->ep[0];
1706 m66592->epaddr2ep[0] = &m66592->ep[0];
1708 the_controller = m66592;
1710 m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL);
1711 if (m66592->ep0_req == NULL)
1713 m66592->ep0_req->complete = nop_completion;
1715 init_controller(m66592);
1717 ret = usb_add_gadget_udc(&pdev->dev, &m66592->gadget);
1721 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1725 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1728 #ifdef CONFIG_HAVE_CLK
1729 if (m66592->pdata->on_chip) {
1730 clk_disable(m66592->clk);
1731 clk_put(m66592->clk);
1735 free_irq(ires->start, m66592);
1738 if (m66592->ep0_req)
1739 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1748 /*-------------------------------------------------------------------------*/
1749 static struct platform_driver m66592_driver = {
1750 .remove = __exit_p(m66592_remove),
1752 .name = (char *) udc_name,
1753 .owner = THIS_MODULE,
1757 static int __init m66592_udc_init(void)
1759 return platform_driver_probe(&m66592_driver, m66592_probe);
1761 module_init(m66592_udc_init);
1763 static void __exit m66592_udc_cleanup(void)
1765 platform_driver_unregister(&m66592_driver);
1767 module_exit(m66592_udc_cleanup);