usb: gadget: langwell: don't call gadget's disconnect()
[pandora-kernel.git] / drivers / usb / gadget / langwell_udc.c
1 /*
2  * Intel Langwell USB Device Controller driver
3  * Copyright (C) 2008-2009, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  */
9
10
11 /* #undef       DEBUG */
12 /* #undef       VERBOSE_DEBUG */
13
14 #if defined(CONFIG_USB_LANGWELL_OTG)
15 #define OTG_TRANSCEIVER
16 #endif
17
18
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/moduleparam.h>
33 #include <linux/device.h>
34 #include <linux/usb/ch9.h>
35 #include <linux/usb/gadget.h>
36 #include <linux/usb/otg.h>
37 #include <linux/pm.h>
38 #include <linux/io.h>
39 #include <linux/irq.h>
40 #include <asm/system.h>
41 #include <asm/unaligned.h>
42
43 #include "langwell_udc.h"
44
45
46 #define DRIVER_DESC             "Intel Langwell USB Device Controller driver"
47 #define DRIVER_VERSION          "16 May 2009"
48
49 static const char driver_name[] = "langwell_udc";
50 static const char driver_desc[] = DRIVER_DESC;
51
52
53 /* for endpoint 0 operations */
54 static const struct usb_endpoint_descriptor
55 langwell_ep0_desc = {
56         .bLength =              USB_DT_ENDPOINT_SIZE,
57         .bDescriptorType =      USB_DT_ENDPOINT,
58         .bEndpointAddress =     0,
59         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
60         .wMaxPacketSize =       EP0_MAX_PKT_SIZE,
61 };
62
63
64 /*-------------------------------------------------------------------------*/
65 /* debugging */
66
67 #ifdef  VERBOSE_DEBUG
68 static inline void print_all_registers(struct langwell_udc *dev)
69 {
70         int     i;
71
72         /* Capability Registers */
73         dev_dbg(&dev->pdev->dev,
74                 "Capability Registers (offset: 0x%04x, length: 0x%08x)\n",
75                 CAP_REG_OFFSET, (u32)sizeof(struct langwell_cap_regs));
76         dev_dbg(&dev->pdev->dev, "caplength=0x%02x\n",
77                         readb(&dev->cap_regs->caplength));
78         dev_dbg(&dev->pdev->dev, "hciversion=0x%04x\n",
79                         readw(&dev->cap_regs->hciversion));
80         dev_dbg(&dev->pdev->dev, "hcsparams=0x%08x\n",
81                         readl(&dev->cap_regs->hcsparams));
82         dev_dbg(&dev->pdev->dev, "hccparams=0x%08x\n",
83                         readl(&dev->cap_regs->hccparams));
84         dev_dbg(&dev->pdev->dev, "dciversion=0x%04x\n",
85                         readw(&dev->cap_regs->dciversion));
86         dev_dbg(&dev->pdev->dev, "dccparams=0x%08x\n",
87                         readl(&dev->cap_regs->dccparams));
88
89         /* Operational Registers */
90         dev_dbg(&dev->pdev->dev,
91                 "Operational Registers (offset: 0x%04x, length: 0x%08x)\n",
92                 OP_REG_OFFSET, (u32)sizeof(struct langwell_op_regs));
93         dev_dbg(&dev->pdev->dev, "extsts=0x%08x\n",
94                         readl(&dev->op_regs->extsts));
95         dev_dbg(&dev->pdev->dev, "extintr=0x%08x\n",
96                         readl(&dev->op_regs->extintr));
97         dev_dbg(&dev->pdev->dev, "usbcmd=0x%08x\n",
98                         readl(&dev->op_regs->usbcmd));
99         dev_dbg(&dev->pdev->dev, "usbsts=0x%08x\n",
100                         readl(&dev->op_regs->usbsts));
101         dev_dbg(&dev->pdev->dev, "usbintr=0x%08x\n",
102                         readl(&dev->op_regs->usbintr));
103         dev_dbg(&dev->pdev->dev, "frindex=0x%08x\n",
104                         readl(&dev->op_regs->frindex));
105         dev_dbg(&dev->pdev->dev, "ctrldssegment=0x%08x\n",
106                         readl(&dev->op_regs->ctrldssegment));
107         dev_dbg(&dev->pdev->dev, "deviceaddr=0x%08x\n",
108                         readl(&dev->op_regs->deviceaddr));
109         dev_dbg(&dev->pdev->dev, "endpointlistaddr=0x%08x\n",
110                         readl(&dev->op_regs->endpointlistaddr));
111         dev_dbg(&dev->pdev->dev, "ttctrl=0x%08x\n",
112                         readl(&dev->op_regs->ttctrl));
113         dev_dbg(&dev->pdev->dev, "burstsize=0x%08x\n",
114                         readl(&dev->op_regs->burstsize));
115         dev_dbg(&dev->pdev->dev, "txfilltuning=0x%08x\n",
116                         readl(&dev->op_regs->txfilltuning));
117         dev_dbg(&dev->pdev->dev, "txttfilltuning=0x%08x\n",
118                         readl(&dev->op_regs->txttfilltuning));
119         dev_dbg(&dev->pdev->dev, "ic_usb=0x%08x\n",
120                         readl(&dev->op_regs->ic_usb));
121         dev_dbg(&dev->pdev->dev, "ulpi_viewport=0x%08x\n",
122                         readl(&dev->op_regs->ulpi_viewport));
123         dev_dbg(&dev->pdev->dev, "configflag=0x%08x\n",
124                         readl(&dev->op_regs->configflag));
125         dev_dbg(&dev->pdev->dev, "portsc1=0x%08x\n",
126                         readl(&dev->op_regs->portsc1));
127         dev_dbg(&dev->pdev->dev, "devlc=0x%08x\n",
128                         readl(&dev->op_regs->devlc));
129         dev_dbg(&dev->pdev->dev, "otgsc=0x%08x\n",
130                         readl(&dev->op_regs->otgsc));
131         dev_dbg(&dev->pdev->dev, "usbmode=0x%08x\n",
132                         readl(&dev->op_regs->usbmode));
133         dev_dbg(&dev->pdev->dev, "endptnak=0x%08x\n",
134                         readl(&dev->op_regs->endptnak));
135         dev_dbg(&dev->pdev->dev, "endptnaken=0x%08x\n",
136                         readl(&dev->op_regs->endptnaken));
137         dev_dbg(&dev->pdev->dev, "endptsetupstat=0x%08x\n",
138                         readl(&dev->op_regs->endptsetupstat));
139         dev_dbg(&dev->pdev->dev, "endptprime=0x%08x\n",
140                         readl(&dev->op_regs->endptprime));
141         dev_dbg(&dev->pdev->dev, "endptflush=0x%08x\n",
142                         readl(&dev->op_regs->endptflush));
143         dev_dbg(&dev->pdev->dev, "endptstat=0x%08x\n",
144                         readl(&dev->op_regs->endptstat));
145         dev_dbg(&dev->pdev->dev, "endptcomplete=0x%08x\n",
146                         readl(&dev->op_regs->endptcomplete));
147
148         for (i = 0; i < dev->ep_max / 2; i++) {
149                 dev_dbg(&dev->pdev->dev, "endptctrl[%d]=0x%08x\n",
150                                 i, readl(&dev->op_regs->endptctrl[i]));
151         }
152 }
153 #else
154
155 #define print_all_registers(dev)        do { } while (0)
156
157 #endif /* VERBOSE_DEBUG */
158
159
160 /*-------------------------------------------------------------------------*/
161
162 #define is_in(ep)       (((ep)->ep_num == 0) ? ((ep)->dev->ep0_dir ==   \
163                         USB_DIR_IN) : (usb_endpoint_dir_in((ep)->desc)))
164
165 #define DIR_STRING(ep)  (is_in(ep) ? "in" : "out")
166
167
168 static char *type_string(const struct usb_endpoint_descriptor *desc)
169 {
170         switch (usb_endpoint_type(desc)) {
171         case USB_ENDPOINT_XFER_BULK:
172                 return "bulk";
173         case USB_ENDPOINT_XFER_ISOC:
174                 return "iso";
175         case USB_ENDPOINT_XFER_INT:
176                 return "int";
177         };
178
179         return "control";
180 }
181
182
183 /* configure endpoint control registers */
184 static void ep_reset(struct langwell_ep *ep, unsigned char ep_num,
185                 unsigned char is_in, unsigned char ep_type)
186 {
187         struct langwell_udc     *dev;
188         u32                     endptctrl;
189
190         dev = ep->dev;
191         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
192
193         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
194         if (is_in) {    /* TX */
195                 if (ep_num)
196                         endptctrl |= EPCTRL_TXR;
197                 endptctrl |= EPCTRL_TXE;
198                 endptctrl |= ep_type << EPCTRL_TXT_SHIFT;
199         } else {        /* RX */
200                 if (ep_num)
201                         endptctrl |= EPCTRL_RXR;
202                 endptctrl |= EPCTRL_RXE;
203                 endptctrl |= ep_type << EPCTRL_RXT_SHIFT;
204         }
205
206         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
207
208         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
209 }
210
211
212 /* reset ep0 dQH and endptctrl */
213 static void ep0_reset(struct langwell_udc *dev)
214 {
215         struct langwell_ep      *ep;
216         int                     i;
217
218         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
219
220         /* ep0 in and out */
221         for (i = 0; i < 2; i++) {
222                 ep = &dev->ep[i];
223                 ep->dev = dev;
224
225                 /* ep0 dQH */
226                 ep->dqh = &dev->ep_dqh[i];
227
228                 /* configure ep0 endpoint capabilities in dQH */
229                 ep->dqh->dqh_ios = 1;
230                 ep->dqh->dqh_mpl = EP0_MAX_PKT_SIZE;
231
232                 /* enable ep0-in HW zero length termination select */
233                 if (is_in(ep))
234                         ep->dqh->dqh_zlt = 0;
235                 ep->dqh->dqh_mult = 0;
236
237                 ep->dqh->dtd_next = DTD_TERM;
238
239                 /* configure ep0 control registers */
240                 ep_reset(&dev->ep[0], 0, i, USB_ENDPOINT_XFER_CONTROL);
241         }
242
243         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
244 }
245
246
247 /*-------------------------------------------------------------------------*/
248
249 /* endpoints operations */
250
251 /* configure endpoint, making it usable */
252 static int langwell_ep_enable(struct usb_ep *_ep,
253                 const struct usb_endpoint_descriptor *desc)
254 {
255         struct langwell_udc     *dev;
256         struct langwell_ep      *ep;
257         u16                     max = 0;
258         unsigned long           flags;
259         int                     i, retval = 0;
260         unsigned char           zlt, ios = 0, mult = 0;
261
262         ep = container_of(_ep, struct langwell_ep, ep);
263         dev = ep->dev;
264         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
265
266         if (!_ep || !desc || ep->desc
267                         || desc->bDescriptorType != USB_DT_ENDPOINT)
268                 return -EINVAL;
269
270         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
271                 return -ESHUTDOWN;
272
273         max = usb_endpoint_maxp(desc);
274
275         /*
276          * disable HW zero length termination select
277          * driver handles zero length packet through req->req.zero
278          */
279         zlt = 1;
280
281         /*
282          * sanity check type, direction, address, and then
283          * initialize the endpoint capabilities fields in dQH
284          */
285         switch (usb_endpoint_type(desc)) {
286         case USB_ENDPOINT_XFER_CONTROL:
287                 ios = 1;
288                 break;
289         case USB_ENDPOINT_XFER_BULK:
290                 if ((dev->gadget.speed == USB_SPEED_HIGH
291                                         && max != 512)
292                                 || (dev->gadget.speed == USB_SPEED_FULL
293                                         && max > 64)) {
294                         goto done;
295                 }
296                 break;
297         case USB_ENDPOINT_XFER_INT:
298                 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
299                         goto done;
300
301                 switch (dev->gadget.speed) {
302                 case USB_SPEED_HIGH:
303                         if (max <= 1024)
304                                 break;
305                 case USB_SPEED_FULL:
306                         if (max <= 64)
307                                 break;
308                 default:
309                         if (max <= 8)
310                                 break;
311                         goto done;
312                 }
313                 break;
314         case USB_ENDPOINT_XFER_ISOC:
315                 if (strstr(ep->ep.name, "-bulk")
316                                 || strstr(ep->ep.name, "-int"))
317                         goto done;
318
319                 switch (dev->gadget.speed) {
320                 case USB_SPEED_HIGH:
321                         if (max <= 1024)
322                                 break;
323                 case USB_SPEED_FULL:
324                         if (max <= 1023)
325                                 break;
326                 default:
327                         goto done;
328                 }
329                 /*
330                  * FIXME:
331                  * calculate transactions needed for high bandwidth iso
332                  */
333                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
334                 max = max & 0x8ff;      /* bit 0~10 */
335                 /* 3 transactions at most */
336                 if (mult > 3)
337                         goto done;
338                 break;
339         default:
340                 goto done;
341         }
342
343         spin_lock_irqsave(&dev->lock, flags);
344
345         ep->ep.maxpacket = max;
346         ep->desc = desc;
347         ep->stopped = 0;
348         ep->ep_num = usb_endpoint_num(desc);
349
350         /* ep_type */
351         ep->ep_type = usb_endpoint_type(desc);
352
353         /* configure endpoint control registers */
354         ep_reset(ep, ep->ep_num, is_in(ep), ep->ep_type);
355
356         /* configure endpoint capabilities in dQH */
357         i = ep->ep_num * 2 + is_in(ep);
358         ep->dqh = &dev->ep_dqh[i];
359         ep->dqh->dqh_ios = ios;
360         ep->dqh->dqh_mpl = cpu_to_le16(max);
361         ep->dqh->dqh_zlt = zlt;
362         ep->dqh->dqh_mult = mult;
363         ep->dqh->dtd_next = DTD_TERM;
364
365         dev_dbg(&dev->pdev->dev, "enabled %s (ep%d%s-%s), max %04x\n",
366                         _ep->name,
367                         ep->ep_num,
368                         DIR_STRING(ep),
369                         type_string(desc),
370                         max);
371
372         spin_unlock_irqrestore(&dev->lock, flags);
373 done:
374         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
375         return retval;
376 }
377
378
379 /*-------------------------------------------------------------------------*/
380
381 /* retire a request */
382 static void done(struct langwell_ep *ep, struct langwell_request *req,
383                 int status)
384 {
385         struct langwell_udc     *dev = ep->dev;
386         unsigned                stopped = ep->stopped;
387         struct langwell_dtd     *curr_dtd, *next_dtd;
388         int                     i;
389
390         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
391
392         /* remove the req from ep->queue */
393         list_del_init(&req->queue);
394
395         if (req->req.status == -EINPROGRESS)
396                 req->req.status = status;
397         else
398                 status = req->req.status;
399
400         /* free dTD for the request */
401         next_dtd = req->head;
402         for (i = 0; i < req->dtd_count; i++) {
403                 curr_dtd = next_dtd;
404                 if (i != req->dtd_count - 1)
405                         next_dtd = curr_dtd->next_dtd_virt;
406                 dma_pool_free(dev->dtd_pool, curr_dtd, curr_dtd->dtd_dma);
407         }
408
409         if (req->mapped) {
410                 dma_unmap_single(&dev->pdev->dev,
411                         req->req.dma, req->req.length,
412                         is_in(ep) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
413                 req->req.dma = DMA_ADDR_INVALID;
414                 req->mapped = 0;
415         } else
416                 dma_sync_single_for_cpu(&dev->pdev->dev, req->req.dma,
417                                 req->req.length,
418                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
419
420         if (status != -ESHUTDOWN)
421                 dev_dbg(&dev->pdev->dev,
422                                 "complete %s, req %p, stat %d, len %u/%u\n",
423                                 ep->ep.name, &req->req, status,
424                                 req->req.actual, req->req.length);
425
426         /* don't modify queue heads during completion callback */
427         ep->stopped = 1;
428
429         spin_unlock(&dev->lock);
430         /* complete routine from gadget driver */
431         if (req->req.complete)
432                 req->req.complete(&ep->ep, &req->req);
433
434         spin_lock(&dev->lock);
435         ep->stopped = stopped;
436
437         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
438 }
439
440
441 static void langwell_ep_fifo_flush(struct usb_ep *_ep);
442
443 /* delete all endpoint requests, called with spinlock held */
444 static void nuke(struct langwell_ep *ep, int status)
445 {
446         /* called with spinlock held */
447         ep->stopped = 1;
448
449         /* endpoint fifo flush */
450         if (&ep->ep && ep->desc)
451                 langwell_ep_fifo_flush(&ep->ep);
452
453         while (!list_empty(&ep->queue)) {
454                 struct langwell_request *req = NULL;
455                 req = list_entry(ep->queue.next, struct langwell_request,
456                                 queue);
457                 done(ep, req, status);
458         }
459 }
460
461
462 /*-------------------------------------------------------------------------*/
463
464 /* endpoint is no longer usable */
465 static int langwell_ep_disable(struct usb_ep *_ep)
466 {
467         struct langwell_ep      *ep;
468         unsigned long           flags;
469         struct langwell_udc     *dev;
470         int                     ep_num;
471         u32                     endptctrl;
472
473         ep = container_of(_ep, struct langwell_ep, ep);
474         dev = ep->dev;
475         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
476
477         if (!_ep || !ep->desc)
478                 return -EINVAL;
479
480         spin_lock_irqsave(&dev->lock, flags);
481
482         /* disable endpoint control register */
483         ep_num = ep->ep_num;
484         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
485         if (is_in(ep))
486                 endptctrl &= ~EPCTRL_TXE;
487         else
488                 endptctrl &= ~EPCTRL_RXE;
489         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
490
491         /* nuke all pending requests (does flush) */
492         nuke(ep, -ESHUTDOWN);
493
494         ep->desc = NULL;
495         ep->stopped = 1;
496
497         spin_unlock_irqrestore(&dev->lock, flags);
498
499         dev_dbg(&dev->pdev->dev, "disabled %s\n", _ep->name);
500         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
501
502         return 0;
503 }
504
505
506 /* allocate a request object to use with this endpoint */
507 static struct usb_request *langwell_alloc_request(struct usb_ep *_ep,
508                 gfp_t gfp_flags)
509 {
510         struct langwell_ep      *ep;
511         struct langwell_udc     *dev;
512         struct langwell_request *req = NULL;
513
514         if (!_ep)
515                 return NULL;
516
517         ep = container_of(_ep, struct langwell_ep, ep);
518         dev = ep->dev;
519         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
520
521         req = kzalloc(sizeof(*req), gfp_flags);
522         if (!req)
523                 return NULL;
524
525         req->req.dma = DMA_ADDR_INVALID;
526         INIT_LIST_HEAD(&req->queue);
527
528         dev_vdbg(&dev->pdev->dev, "alloc request for %s\n", _ep->name);
529         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
530         return &req->req;
531 }
532
533
534 /* free a request object */
535 static void langwell_free_request(struct usb_ep *_ep,
536                 struct usb_request *_req)
537 {
538         struct langwell_ep      *ep;
539         struct langwell_udc     *dev;
540         struct langwell_request *req = NULL;
541
542         ep = container_of(_ep, struct langwell_ep, ep);
543         dev = ep->dev;
544         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
545
546         if (!_ep || !_req)
547                 return;
548
549         req = container_of(_req, struct langwell_request, req);
550         WARN_ON(!list_empty(&req->queue));
551
552         if (_req)
553                 kfree(req);
554
555         dev_vdbg(&dev->pdev->dev, "free request for %s\n", _ep->name);
556         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
557 }
558
559
560 /*-------------------------------------------------------------------------*/
561
562 /* queue dTD and PRIME endpoint */
563 static int queue_dtd(struct langwell_ep *ep, struct langwell_request *req)
564 {
565         u32                     bit_mask, usbcmd, endptstat, dtd_dma;
566         u8                      dtd_status;
567         int                     i;
568         struct langwell_dqh     *dqh;
569         struct langwell_udc     *dev;
570
571         dev = ep->dev;
572         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
573
574         i = ep->ep_num * 2 + is_in(ep);
575         dqh = &dev->ep_dqh[i];
576
577         if (ep->ep_num)
578                 dev_vdbg(&dev->pdev->dev, "%s\n", ep->name);
579         else
580                 /* ep0 */
581                 dev_vdbg(&dev->pdev->dev, "%s-%s\n", ep->name, DIR_STRING(ep));
582
583         dev_vdbg(&dev->pdev->dev, "ep_dqh[%d] addr: 0x%p\n",
584                         i, &(dev->ep_dqh[i]));
585
586         bit_mask = is_in(ep) ?
587                 (1 << (ep->ep_num + 16)) : (1 << (ep->ep_num));
588
589         dev_vdbg(&dev->pdev->dev, "bit_mask = 0x%08x\n", bit_mask);
590
591         /* check if the pipe is empty */
592         if (!(list_empty(&ep->queue))) {
593                 /* add dTD to the end of linked list */
594                 struct langwell_request *lastreq;
595                 lastreq = list_entry(ep->queue.prev,
596                                 struct langwell_request, queue);
597
598                 lastreq->tail->dtd_next =
599                         cpu_to_le32(req->head->dtd_dma & DTD_NEXT_MASK);
600
601                 /* read prime bit, if 1 goto out */
602                 if (readl(&dev->op_regs->endptprime) & bit_mask)
603                         goto out;
604
605                 do {
606                         /* set ATDTW bit in USBCMD */
607                         usbcmd = readl(&dev->op_regs->usbcmd);
608                         writel(usbcmd | CMD_ATDTW, &dev->op_regs->usbcmd);
609
610                         /* read correct status bit */
611                         endptstat = readl(&dev->op_regs->endptstat) & bit_mask;
612
613                 } while (!(readl(&dev->op_regs->usbcmd) & CMD_ATDTW));
614
615                 /* write ATDTW bit to 0 */
616                 usbcmd = readl(&dev->op_regs->usbcmd);
617                 writel(usbcmd & ~CMD_ATDTW, &dev->op_regs->usbcmd);
618
619                 if (endptstat)
620                         goto out;
621         }
622
623         /* write dQH next pointer and terminate bit to 0 */
624         dtd_dma = req->head->dtd_dma & DTD_NEXT_MASK;
625         dqh->dtd_next = cpu_to_le32(dtd_dma);
626
627         /* clear active and halt bit */
628         dtd_status = (u8) ~(DTD_STS_ACTIVE | DTD_STS_HALTED);
629         dqh->dtd_status &= dtd_status;
630         dev_vdbg(&dev->pdev->dev, "dqh->dtd_status = 0x%x\n", dqh->dtd_status);
631
632         /* ensure that updates to the dQH will occur before priming */
633         wmb();
634
635         /* write 1 to endptprime register to PRIME endpoint */
636         bit_mask = is_in(ep) ? (1 << (ep->ep_num + 16)) : (1 << ep->ep_num);
637         dev_vdbg(&dev->pdev->dev, "endprime bit_mask = 0x%08x\n", bit_mask);
638         writel(bit_mask, &dev->op_regs->endptprime);
639 out:
640         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
641         return 0;
642 }
643
644
645 /* fill in the dTD structure to build a transfer descriptor */
646 static struct langwell_dtd *build_dtd(struct langwell_request *req,
647                 unsigned *length, dma_addr_t *dma, int *is_last)
648 {
649         u32                      buf_ptr;
650         struct langwell_dtd     *dtd;
651         struct langwell_udc     *dev;
652         int                     i;
653
654         dev = req->ep->dev;
655         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
656
657         /* the maximum transfer length, up to 16k bytes */
658         *length = min(req->req.length - req->req.actual,
659                         (unsigned)DTD_MAX_TRANSFER_LENGTH);
660
661         /* create dTD dma_pool resource */
662         dtd = dma_pool_alloc(dev->dtd_pool, GFP_KERNEL, dma);
663         if (dtd == NULL)
664                 return dtd;
665         dtd->dtd_dma = *dma;
666
667         /* initialize buffer page pointers */
668         buf_ptr = (u32)(req->req.dma + req->req.actual);
669         for (i = 0; i < 5; i++)
670                 dtd->dtd_buf[i] = cpu_to_le32(buf_ptr + i * PAGE_SIZE);
671
672         req->req.actual += *length;
673
674         /* fill in total bytes with transfer size */
675         dtd->dtd_total = cpu_to_le16(*length);
676         dev_vdbg(&dev->pdev->dev, "dtd->dtd_total = %d\n", dtd->dtd_total);
677
678         /* set is_last flag if req->req.zero is set or not */
679         if (req->req.zero) {
680                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
681                         *is_last = 1;
682                 else
683                         *is_last = 0;
684         } else if (req->req.length == req->req.actual) {
685                 *is_last = 1;
686         } else
687                 *is_last = 0;
688
689         if (*is_last == 0)
690                 dev_vdbg(&dev->pdev->dev, "multi-dtd request!\n");
691
692         /* set interrupt on complete bit for the last dTD */
693         if (*is_last && !req->req.no_interrupt)
694                 dtd->dtd_ioc = 1;
695
696         /* set multiplier override 0 for non-ISO and non-TX endpoint */
697         dtd->dtd_multo = 0;
698
699         /* set the active bit of status field to 1 */
700         dtd->dtd_status = DTD_STS_ACTIVE;
701         dev_vdbg(&dev->pdev->dev, "dtd->dtd_status = 0x%02x\n",
702                         dtd->dtd_status);
703
704         dev_vdbg(&dev->pdev->dev, "length = %d, dma addr= 0x%08x\n",
705                         *length, (int)*dma);
706         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
707         return dtd;
708 }
709
710
711 /* generate dTD linked list for a request */
712 static int req_to_dtd(struct langwell_request *req)
713 {
714         unsigned                count;
715         int                     is_last, is_first = 1;
716         struct langwell_dtd     *dtd, *last_dtd = NULL;
717         struct langwell_udc     *dev;
718         dma_addr_t              dma;
719
720         dev = req->ep->dev;
721         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
722         do {
723                 dtd = build_dtd(req, &count, &dma, &is_last);
724                 if (dtd == NULL)
725                         return -ENOMEM;
726
727                 if (is_first) {
728                         is_first = 0;
729                         req->head = dtd;
730                 } else {
731                         last_dtd->dtd_next = cpu_to_le32(dma);
732                         last_dtd->next_dtd_virt = dtd;
733                 }
734                 last_dtd = dtd;
735                 req->dtd_count++;
736         } while (!is_last);
737
738         /* set terminate bit to 1 for the last dTD */
739         dtd->dtd_next = DTD_TERM;
740
741         req->tail = dtd;
742
743         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
744         return 0;
745 }
746
747 /*-------------------------------------------------------------------------*/
748
749 /* queue (submits) an I/O requests to an endpoint */
750 static int langwell_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
751                 gfp_t gfp_flags)
752 {
753         struct langwell_request *req;
754         struct langwell_ep      *ep;
755         struct langwell_udc     *dev;
756         unsigned long           flags;
757         int                     is_iso = 0, zlflag = 0;
758
759         /* always require a cpu-view buffer */
760         req = container_of(_req, struct langwell_request, req);
761         ep = container_of(_ep, struct langwell_ep, ep);
762
763         if (!_req || !_req->complete || !_req->buf
764                         || !list_empty(&req->queue)) {
765                 return -EINVAL;
766         }
767
768         if (unlikely(!_ep || !ep->desc))
769                 return -EINVAL;
770
771         dev = ep->dev;
772         req->ep = ep;
773         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
774
775         if (usb_endpoint_xfer_isoc(ep->desc)) {
776                 if (req->req.length > ep->ep.maxpacket)
777                         return -EMSGSIZE;
778                 is_iso = 1;
779         }
780
781         if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
782                 return -ESHUTDOWN;
783
784         /* set up dma mapping in case the caller didn't */
785         if (_req->dma == DMA_ADDR_INVALID) {
786                 /* WORKAROUND: WARN_ON(size == 0) */
787                 if (_req->length == 0) {
788                         dev_vdbg(&dev->pdev->dev, "req->length: 0->1\n");
789                         zlflag = 1;
790                         _req->length++;
791                 }
792
793                 _req->dma = dma_map_single(&dev->pdev->dev,
794                                 _req->buf, _req->length,
795                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
796                 if (zlflag && (_req->length == 1)) {
797                         dev_vdbg(&dev->pdev->dev, "req->length: 1->0\n");
798                         zlflag = 0;
799                         _req->length = 0;
800                 }
801
802                 req->mapped = 1;
803                 dev_vdbg(&dev->pdev->dev, "req->mapped = 1\n");
804         } else {
805                 dma_sync_single_for_device(&dev->pdev->dev,
806                                 _req->dma, _req->length,
807                                 is_in(ep) ?  DMA_TO_DEVICE : DMA_FROM_DEVICE);
808                 req->mapped = 0;
809                 dev_vdbg(&dev->pdev->dev, "req->mapped = 0\n");
810         }
811
812         dev_dbg(&dev->pdev->dev,
813                         "%s queue req %p, len %u, buf %p, dma 0x%08x\n",
814                         _ep->name,
815                         _req, _req->length, _req->buf, (int)_req->dma);
816
817         _req->status = -EINPROGRESS;
818         _req->actual = 0;
819         req->dtd_count = 0;
820
821         spin_lock_irqsave(&dev->lock, flags);
822
823         /* build and put dTDs to endpoint queue */
824         if (!req_to_dtd(req)) {
825                 queue_dtd(ep, req);
826         } else {
827                 spin_unlock_irqrestore(&dev->lock, flags);
828                 return -ENOMEM;
829         }
830
831         /* update ep0 state */
832         if (ep->ep_num == 0)
833                 dev->ep0_state = DATA_STATE_XMIT;
834
835         if (likely(req != NULL)) {
836                 list_add_tail(&req->queue, &ep->queue);
837                 dev_vdbg(&dev->pdev->dev, "list_add_tail()\n");
838         }
839
840         spin_unlock_irqrestore(&dev->lock, flags);
841
842         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
843         return 0;
844 }
845
846
847 /* dequeue (cancels, unlinks) an I/O request from an endpoint */
848 static int langwell_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
849 {
850         struct langwell_ep      *ep;
851         struct langwell_udc     *dev;
852         struct langwell_request *req;
853         unsigned long           flags;
854         int                     stopped, ep_num, retval = 0;
855         u32                     endptctrl;
856
857         ep = container_of(_ep, struct langwell_ep, ep);
858         dev = ep->dev;
859         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
860
861         if (!_ep || !ep->desc || !_req)
862                 return -EINVAL;
863
864         if (!dev->driver)
865                 return -ESHUTDOWN;
866
867         spin_lock_irqsave(&dev->lock, flags);
868         stopped = ep->stopped;
869
870         /* quiesce dma while we patch the queue */
871         ep->stopped = 1;
872         ep_num = ep->ep_num;
873
874         /* disable endpoint control register */
875         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
876         if (is_in(ep))
877                 endptctrl &= ~EPCTRL_TXE;
878         else
879                 endptctrl &= ~EPCTRL_RXE;
880         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
881
882         /* make sure it's still queued on this endpoint */
883         list_for_each_entry(req, &ep->queue, queue) {
884                 if (&req->req == _req)
885                         break;
886         }
887
888         if (&req->req != _req) {
889                 retval = -EINVAL;
890                 goto done;
891         }
892
893         /* queue head may be partially complete. */
894         if (ep->queue.next == &req->queue) {
895                 dev_dbg(&dev->pdev->dev, "unlink (%s) dma\n", _ep->name);
896                 _req->status = -ECONNRESET;
897                 langwell_ep_fifo_flush(&ep->ep);
898
899                 /* not the last request in endpoint queue */
900                 if (likely(ep->queue.next == &req->queue)) {
901                         struct langwell_dqh     *dqh;
902                         struct langwell_request *next_req;
903
904                         dqh = ep->dqh;
905                         next_req = list_entry(req->queue.next,
906                                         struct langwell_request, queue);
907
908                         /* point the dQH to the first dTD of next request */
909                         writel((u32) next_req->head, &dqh->dqh_current);
910                 }
911         } else {
912                 struct langwell_request *prev_req;
913
914                 prev_req = list_entry(req->queue.prev,
915                                 struct langwell_request, queue);
916                 writel(readl(&req->tail->dtd_next),
917                                 &prev_req->tail->dtd_next);
918         }
919
920         done(ep, req, -ECONNRESET);
921
922 done:
923         /* enable endpoint again */
924         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
925         if (is_in(ep))
926                 endptctrl |= EPCTRL_TXE;
927         else
928                 endptctrl |= EPCTRL_RXE;
929         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
930
931         ep->stopped = stopped;
932         spin_unlock_irqrestore(&dev->lock, flags);
933
934         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
935         return retval;
936 }
937
938
939 /*-------------------------------------------------------------------------*/
940
941 /* endpoint set/clear halt */
942 static void ep_set_halt(struct langwell_ep *ep, int value)
943 {
944         u32                     endptctrl = 0;
945         int                     ep_num;
946         struct langwell_udc     *dev = ep->dev;
947         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
948
949         ep_num = ep->ep_num;
950         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
951
952         /* value: 1 - set halt, 0 - clear halt */
953         if (value) {
954                 /* set the stall bit */
955                 if (is_in(ep))
956                         endptctrl |= EPCTRL_TXS;
957                 else
958                         endptctrl |= EPCTRL_RXS;
959         } else {
960                 /* clear the stall bit and reset data toggle */
961                 if (is_in(ep)) {
962                         endptctrl &= ~EPCTRL_TXS;
963                         endptctrl |= EPCTRL_TXR;
964                 } else {
965                         endptctrl &= ~EPCTRL_RXS;
966                         endptctrl |= EPCTRL_RXR;
967                 }
968         }
969
970         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
971
972         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
973 }
974
975
976 /* set the endpoint halt feature */
977 static int langwell_ep_set_halt(struct usb_ep *_ep, int value)
978 {
979         struct langwell_ep      *ep;
980         struct langwell_udc     *dev;
981         unsigned long           flags;
982         int                     retval = 0;
983
984         ep = container_of(_ep, struct langwell_ep, ep);
985         dev = ep->dev;
986
987         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
988
989         if (!_ep || !ep->desc)
990                 return -EINVAL;
991
992         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
993                 return -ESHUTDOWN;
994
995         if (usb_endpoint_xfer_isoc(ep->desc))
996                 return  -EOPNOTSUPP;
997
998         spin_lock_irqsave(&dev->lock, flags);
999
1000         /*
1001          * attempt to halt IN ep will fail if any transfer requests
1002          * are still queue
1003          */
1004         if (!list_empty(&ep->queue) && is_in(ep) && value) {
1005                 /* IN endpoint FIFO holds bytes */
1006                 dev_dbg(&dev->pdev->dev, "%s FIFO holds bytes\n", _ep->name);
1007                 retval = -EAGAIN;
1008                 goto done;
1009         }
1010
1011         /* endpoint set/clear halt */
1012         if (ep->ep_num) {
1013                 ep_set_halt(ep, value);
1014         } else { /* endpoint 0 */
1015                 dev->ep0_state = WAIT_FOR_SETUP;
1016                 dev->ep0_dir = USB_DIR_OUT;
1017         }
1018 done:
1019         spin_unlock_irqrestore(&dev->lock, flags);
1020         dev_dbg(&dev->pdev->dev, "%s %s halt\n",
1021                         _ep->name, value ? "set" : "clear");
1022         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1023         return retval;
1024 }
1025
1026
1027 /* set the halt feature and ignores clear requests */
1028 static int langwell_ep_set_wedge(struct usb_ep *_ep)
1029 {
1030         struct langwell_ep      *ep;
1031         struct langwell_udc     *dev;
1032
1033         ep = container_of(_ep, struct langwell_ep, ep);
1034         dev = ep->dev;
1035
1036         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1037
1038         if (!_ep || !ep->desc)
1039                 return -EINVAL;
1040
1041         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1042         return usb_ep_set_halt(_ep);
1043 }
1044
1045
1046 /* flush contents of a fifo */
1047 static void langwell_ep_fifo_flush(struct usb_ep *_ep)
1048 {
1049         struct langwell_ep      *ep;
1050         struct langwell_udc     *dev;
1051         u32                     flush_bit;
1052         unsigned long           timeout;
1053
1054         ep = container_of(_ep, struct langwell_ep, ep);
1055         dev = ep->dev;
1056
1057         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1058
1059         if (!_ep || !ep->desc) {
1060                 dev_vdbg(&dev->pdev->dev, "ep or ep->desc is NULL\n");
1061                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1062                 return;
1063         }
1064
1065         dev_vdbg(&dev->pdev->dev, "%s-%s fifo flush\n",
1066                         _ep->name, DIR_STRING(ep));
1067
1068         /* flush endpoint buffer */
1069         if (ep->ep_num == 0)
1070                 flush_bit = (1 << 16) | 1;
1071         else if (is_in(ep))
1072                 flush_bit = 1 << (ep->ep_num + 16);     /* TX */
1073         else
1074                 flush_bit = 1 << ep->ep_num;            /* RX */
1075
1076         /* wait until flush complete */
1077         timeout = jiffies + FLUSH_TIMEOUT;
1078         do {
1079                 writel(flush_bit, &dev->op_regs->endptflush);
1080                 while (readl(&dev->op_regs->endptflush)) {
1081                         if (time_after(jiffies, timeout)) {
1082                                 dev_err(&dev->pdev->dev, "ep flush timeout\n");
1083                                 goto done;
1084                         }
1085                         cpu_relax();
1086                 }
1087         } while (readl(&dev->op_regs->endptstat) & flush_bit);
1088 done:
1089         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1090 }
1091
1092
1093 /* endpoints operations structure */
1094 static const struct usb_ep_ops langwell_ep_ops = {
1095
1096         /* configure endpoint, making it usable */
1097         .enable         = langwell_ep_enable,
1098
1099         /* endpoint is no longer usable */
1100         .disable        = langwell_ep_disable,
1101
1102         /* allocate a request object to use with this endpoint */
1103         .alloc_request  = langwell_alloc_request,
1104
1105         /* free a request object */
1106         .free_request   = langwell_free_request,
1107
1108         /* queue (submits) an I/O requests to an endpoint */
1109         .queue          = langwell_ep_queue,
1110
1111         /* dequeue (cancels, unlinks) an I/O request from an endpoint */
1112         .dequeue        = langwell_ep_dequeue,
1113
1114         /* set the endpoint halt feature */
1115         .set_halt       = langwell_ep_set_halt,
1116
1117         /* set the halt feature and ignores clear requests */
1118         .set_wedge      = langwell_ep_set_wedge,
1119
1120         /* flush contents of a fifo */
1121         .fifo_flush     = langwell_ep_fifo_flush,
1122 };
1123
1124
1125 /*-------------------------------------------------------------------------*/
1126
1127 /* device controller usb_gadget_ops structure */
1128
1129 /* returns the current frame number */
1130 static int langwell_get_frame(struct usb_gadget *_gadget)
1131 {
1132         struct langwell_udc     *dev;
1133         u16                     retval;
1134
1135         if (!_gadget)
1136                 return -ENODEV;
1137
1138         dev = container_of(_gadget, struct langwell_udc, gadget);
1139         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1140
1141         retval = readl(&dev->op_regs->frindex) & FRINDEX_MASK;
1142
1143         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1144         return retval;
1145 }
1146
1147
1148 /* enter or exit PHY low power state */
1149 static void langwell_phy_low_power(struct langwell_udc *dev, bool flag)
1150 {
1151         u32             devlc;
1152         u8              devlc_byte2;
1153         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1154
1155         devlc = readl(&dev->op_regs->devlc);
1156         dev_vdbg(&dev->pdev->dev, "devlc = 0x%08x\n", devlc);
1157
1158         if (flag)
1159                 devlc |= LPM_PHCD;
1160         else
1161                 devlc &= ~LPM_PHCD;
1162
1163         /* FIXME: workaround for Langwell A1/A2/A3 sighting */
1164         devlc_byte2 = (devlc >> 16) & 0xff;
1165         writeb(devlc_byte2, (u8 *)&dev->op_regs->devlc + 2);
1166
1167         devlc = readl(&dev->op_regs->devlc);
1168         dev_vdbg(&dev->pdev->dev,
1169                         "%s PHY low power suspend, devlc = 0x%08x\n",
1170                         flag ? "enter" : "exit", devlc);
1171 }
1172
1173
1174 /* tries to wake up the host connected to this gadget */
1175 static int langwell_wakeup(struct usb_gadget *_gadget)
1176 {
1177         struct langwell_udc     *dev;
1178         u32                     portsc1;
1179         unsigned long           flags;
1180
1181         if (!_gadget)
1182                 return 0;
1183
1184         dev = container_of(_gadget, struct langwell_udc, gadget);
1185         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1186
1187         /* remote wakeup feature not enabled by host */
1188         if (!dev->remote_wakeup) {
1189                 dev_info(&dev->pdev->dev, "remote wakeup is disabled\n");
1190                 return -ENOTSUPP;
1191         }
1192
1193         spin_lock_irqsave(&dev->lock, flags);
1194
1195         portsc1 = readl(&dev->op_regs->portsc1);
1196         if (!(portsc1 & PORTS_SUSP)) {
1197                 spin_unlock_irqrestore(&dev->lock, flags);
1198                 return 0;
1199         }
1200
1201         /* LPM L1 to L0 or legacy remote wakeup */
1202         if (dev->lpm && dev->lpm_state == LPM_L1)
1203                 dev_info(&dev->pdev->dev, "LPM L1 to L0 remote wakeup\n");
1204         else
1205                 dev_info(&dev->pdev->dev, "device remote wakeup\n");
1206
1207         /* exit PHY low power suspend */
1208         if (dev->pdev->device != 0x0829)
1209                 langwell_phy_low_power(dev, 0);
1210
1211         /* force port resume */
1212         portsc1 |= PORTS_FPR;
1213         writel(portsc1, &dev->op_regs->portsc1);
1214
1215         spin_unlock_irqrestore(&dev->lock, flags);
1216
1217         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1218         return 0;
1219 }
1220
1221
1222 /* notify controller that VBUS is powered or not */
1223 static int langwell_vbus_session(struct usb_gadget *_gadget, int is_active)
1224 {
1225         struct langwell_udc     *dev;
1226         unsigned long           flags;
1227         u32                     usbcmd;
1228
1229         if (!_gadget)
1230                 return -ENODEV;
1231
1232         dev = container_of(_gadget, struct langwell_udc, gadget);
1233         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1234
1235         spin_lock_irqsave(&dev->lock, flags);
1236         dev_vdbg(&dev->pdev->dev, "VBUS status: %s\n",
1237                         is_active ? "on" : "off");
1238
1239         dev->vbus_active = (is_active != 0);
1240         if (dev->driver && dev->softconnected && dev->vbus_active) {
1241                 usbcmd = readl(&dev->op_regs->usbcmd);
1242                 usbcmd |= CMD_RUNSTOP;
1243                 writel(usbcmd, &dev->op_regs->usbcmd);
1244         } else {
1245                 usbcmd = readl(&dev->op_regs->usbcmd);
1246                 usbcmd &= ~CMD_RUNSTOP;
1247                 writel(usbcmd, &dev->op_regs->usbcmd);
1248         }
1249
1250         spin_unlock_irqrestore(&dev->lock, flags);
1251
1252         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1253         return 0;
1254 }
1255
1256
1257 /* constrain controller's VBUS power usage */
1258 static int langwell_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1259 {
1260         struct langwell_udc     *dev;
1261
1262         if (!_gadget)
1263                 return -ENODEV;
1264
1265         dev = container_of(_gadget, struct langwell_udc, gadget);
1266         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1267
1268         if (dev->transceiver) {
1269                 dev_vdbg(&dev->pdev->dev, "otg_set_power\n");
1270                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1271                 return otg_set_power(dev->transceiver, mA);
1272         }
1273
1274         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1275         return -ENOTSUPP;
1276 }
1277
1278
1279 /* D+ pullup, software-controlled connect/disconnect to USB host */
1280 static int langwell_pullup(struct usb_gadget *_gadget, int is_on)
1281 {
1282         struct langwell_udc     *dev;
1283         u32                     usbcmd;
1284         unsigned long           flags;
1285
1286         if (!_gadget)
1287                 return -ENODEV;
1288
1289         dev = container_of(_gadget, struct langwell_udc, gadget);
1290
1291         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1292
1293         spin_lock_irqsave(&dev->lock, flags);
1294         dev->softconnected = (is_on != 0);
1295
1296         if (dev->driver && dev->softconnected && dev->vbus_active) {
1297                 usbcmd = readl(&dev->op_regs->usbcmd);
1298                 usbcmd |= CMD_RUNSTOP;
1299                 writel(usbcmd, &dev->op_regs->usbcmd);
1300         } else {
1301                 usbcmd = readl(&dev->op_regs->usbcmd);
1302                 usbcmd &= ~CMD_RUNSTOP;
1303                 writel(usbcmd, &dev->op_regs->usbcmd);
1304         }
1305         spin_unlock_irqrestore(&dev->lock, flags);
1306
1307         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1308         return 0;
1309 }
1310
1311 static int langwell_start(struct usb_gadget *g,
1312                 struct usb_gadget_driver *driver);
1313
1314 static int langwell_stop(struct usb_gadget *g,
1315                 struct usb_gadget_driver *driver);
1316
1317 /* device controller usb_gadget_ops structure */
1318 static const struct usb_gadget_ops langwell_ops = {
1319
1320         /* returns the current frame number */
1321         .get_frame      = langwell_get_frame,
1322
1323         /* tries to wake up the host connected to this gadget */
1324         .wakeup         = langwell_wakeup,
1325
1326         /* set the device selfpowered feature, always selfpowered */
1327         /* .set_selfpowered = langwell_set_selfpowered, */
1328
1329         /* notify controller that VBUS is powered or not */
1330         .vbus_session   = langwell_vbus_session,
1331
1332         /* constrain controller's VBUS power usage */
1333         .vbus_draw      = langwell_vbus_draw,
1334
1335         /* D+ pullup, software-controlled connect/disconnect to USB host */
1336         .pullup         = langwell_pullup,
1337
1338         .udc_start      = langwell_start,
1339         .udc_stop       = langwell_stop,
1340 };
1341
1342
1343 /*-------------------------------------------------------------------------*/
1344
1345 /* device controller operations */
1346
1347 /* reset device controller */
1348 static int langwell_udc_reset(struct langwell_udc *dev)
1349 {
1350         u32             usbcmd, usbmode, devlc, endpointlistaddr;
1351         u8              devlc_byte0, devlc_byte2;
1352         unsigned long   timeout;
1353
1354         if (!dev)
1355                 return -EINVAL;
1356
1357         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1358
1359         /* set controller to stop state */
1360         usbcmd = readl(&dev->op_regs->usbcmd);
1361         usbcmd &= ~CMD_RUNSTOP;
1362         writel(usbcmd, &dev->op_regs->usbcmd);
1363
1364         /* reset device controller */
1365         usbcmd = readl(&dev->op_regs->usbcmd);
1366         usbcmd |= CMD_RST;
1367         writel(usbcmd, &dev->op_regs->usbcmd);
1368
1369         /* wait for reset to complete */
1370         timeout = jiffies + RESET_TIMEOUT;
1371         while (readl(&dev->op_regs->usbcmd) & CMD_RST) {
1372                 if (time_after(jiffies, timeout)) {
1373                         dev_err(&dev->pdev->dev, "device reset timeout\n");
1374                         return -ETIMEDOUT;
1375                 }
1376                 cpu_relax();
1377         }
1378
1379         /* set controller to device mode */
1380         usbmode = readl(&dev->op_regs->usbmode);
1381         usbmode |= MODE_DEVICE;
1382
1383         /* turn setup lockout off, require setup tripwire in usbcmd */
1384         usbmode |= MODE_SLOM;
1385
1386         writel(usbmode, &dev->op_regs->usbmode);
1387         usbmode = readl(&dev->op_regs->usbmode);
1388         dev_vdbg(&dev->pdev->dev, "usbmode=0x%08x\n", usbmode);
1389
1390         /* Write-Clear setup status */
1391         writel(0, &dev->op_regs->usbsts);
1392
1393         /* if support USB LPM, ACK all LPM token */
1394         if (dev->lpm) {
1395                 devlc = readl(&dev->op_regs->devlc);
1396                 dev_vdbg(&dev->pdev->dev, "devlc = 0x%08x\n", devlc);
1397                 /* FIXME: workaround for Langwell A1/A2/A3 sighting */
1398                 devlc &= ~LPM_STL;      /* don't STALL LPM token */
1399                 devlc &= ~LPM_NYT_ACK;  /* ACK LPM token */
1400                 devlc_byte0 = devlc & 0xff;
1401                 devlc_byte2 = (devlc >> 16) & 0xff;
1402                 writeb(devlc_byte0, (u8 *)&dev->op_regs->devlc);
1403                 writeb(devlc_byte2, (u8 *)&dev->op_regs->devlc + 2);
1404                 devlc = readl(&dev->op_regs->devlc);
1405                 dev_vdbg(&dev->pdev->dev,
1406                                 "ACK LPM token, devlc = 0x%08x\n", devlc);
1407         }
1408
1409         /* fill endpointlistaddr register */
1410         endpointlistaddr = dev->ep_dqh_dma;
1411         endpointlistaddr &= ENDPOINTLISTADDR_MASK;
1412         writel(endpointlistaddr, &dev->op_regs->endpointlistaddr);
1413
1414         dev_vdbg(&dev->pdev->dev,
1415                 "dQH base (vir: %p, phy: 0x%08x), endpointlistaddr=0x%08x\n",
1416                 dev->ep_dqh, endpointlistaddr,
1417                 readl(&dev->op_regs->endpointlistaddr));
1418         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1419         return 0;
1420 }
1421
1422
1423 /* reinitialize device controller endpoints */
1424 static int eps_reinit(struct langwell_udc *dev)
1425 {
1426         struct langwell_ep      *ep;
1427         char                    name[14];
1428         int                     i;
1429
1430         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1431
1432         /* initialize ep0 */
1433         ep = &dev->ep[0];
1434         ep->dev = dev;
1435         strncpy(ep->name, "ep0", sizeof(ep->name));
1436         ep->ep.name = ep->name;
1437         ep->ep.ops = &langwell_ep_ops;
1438         ep->stopped = 0;
1439         ep->ep.maxpacket = EP0_MAX_PKT_SIZE;
1440         ep->ep_num = 0;
1441         ep->desc = &langwell_ep0_desc;
1442         INIT_LIST_HEAD(&ep->queue);
1443
1444         ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
1445
1446         /* initialize other endpoints */
1447         for (i = 2; i < dev->ep_max; i++) {
1448                 ep = &dev->ep[i];
1449                 if (i % 2)
1450                         snprintf(name, sizeof(name), "ep%din", i / 2);
1451                 else
1452                         snprintf(name, sizeof(name), "ep%dout", i / 2);
1453                 ep->dev = dev;
1454                 strncpy(ep->name, name, sizeof(ep->name));
1455                 ep->ep.name = ep->name;
1456
1457                 ep->ep.ops = &langwell_ep_ops;
1458                 ep->stopped = 0;
1459                 ep->ep.maxpacket = (unsigned short) ~0;
1460                 ep->ep_num = i / 2;
1461
1462                 INIT_LIST_HEAD(&ep->queue);
1463                 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1464         }
1465
1466         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1467         return 0;
1468 }
1469
1470
1471 /* enable interrupt and set controller to run state */
1472 static void langwell_udc_start(struct langwell_udc *dev)
1473 {
1474         u32     usbintr, usbcmd;
1475         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1476
1477         /* enable interrupts */
1478         usbintr = INTR_ULPIE    /* ULPI */
1479                 | INTR_SLE      /* suspend */
1480                 /* | INTR_SRE   SOF received */
1481                 | INTR_URE      /* USB reset */
1482                 | INTR_AAE      /* async advance */
1483                 | INTR_SEE      /* system error */
1484                 | INTR_FRE      /* frame list rollover */
1485                 | INTR_PCE      /* port change detect */
1486                 | INTR_UEE      /* USB error interrupt */
1487                 | INTR_UE;      /* USB interrupt */
1488         writel(usbintr, &dev->op_regs->usbintr);
1489
1490         /* clear stopped bit */
1491         dev->stopped = 0;
1492
1493         /* set controller to run */
1494         usbcmd = readl(&dev->op_regs->usbcmd);
1495         usbcmd |= CMD_RUNSTOP;
1496         writel(usbcmd, &dev->op_regs->usbcmd);
1497
1498         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1499 }
1500
1501
1502 /* disable interrupt and set controller to stop state */
1503 static void langwell_udc_stop(struct langwell_udc *dev)
1504 {
1505         u32     usbcmd;
1506
1507         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1508
1509         /* disable all interrupts */
1510         writel(0, &dev->op_regs->usbintr);
1511
1512         /* set stopped bit */
1513         dev->stopped = 1;
1514
1515         /* set controller to stop state */
1516         usbcmd = readl(&dev->op_regs->usbcmd);
1517         usbcmd &= ~CMD_RUNSTOP;
1518         writel(usbcmd, &dev->op_regs->usbcmd);
1519
1520         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1521 }
1522
1523
1524 /* stop all USB activities */
1525 static void stop_activity(struct langwell_udc *dev)
1526 {
1527         struct langwell_ep      *ep;
1528         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1529
1530         nuke(&dev->ep[0], -ESHUTDOWN);
1531
1532         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1533                 nuke(ep, -ESHUTDOWN);
1534         }
1535
1536         /* report disconnect; the driver is already quiesced */
1537         if (dev->driver) {
1538                 spin_unlock(&dev->lock);
1539                 dev->driver->disconnect(&dev->gadget);
1540                 spin_lock(&dev->lock);
1541         }
1542
1543         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1544 }
1545
1546
1547 /*-------------------------------------------------------------------------*/
1548
1549 /* device "function" sysfs attribute file */
1550 static ssize_t show_function(struct device *_dev,
1551                 struct device_attribute *attr, char *buf)
1552 {
1553         struct langwell_udc     *dev = dev_get_drvdata(_dev);
1554
1555         if (!dev->driver || !dev->driver->function
1556                         || strlen(dev->driver->function) > PAGE_SIZE)
1557                 return 0;
1558
1559         return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1560 }
1561 static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
1562
1563
1564 static inline enum usb_device_speed lpm_device_speed(u32 reg)
1565 {
1566         switch (LPM_PSPD(reg)) {
1567         case LPM_SPEED_HIGH:
1568                 return USB_SPEED_HIGH;
1569         case LPM_SPEED_FULL:
1570                 return USB_SPEED_FULL;
1571         case LPM_SPEED_LOW:
1572                 return USB_SPEED_LOW;
1573         default:
1574                 return USB_SPEED_UNKNOWN;
1575         }
1576 }
1577
1578 /* device "langwell_udc" sysfs attribute file */
1579 static ssize_t show_langwell_udc(struct device *_dev,
1580                 struct device_attribute *attr, char *buf)
1581 {
1582         struct langwell_udc     *dev = dev_get_drvdata(_dev);
1583         struct langwell_request *req;
1584         struct langwell_ep      *ep = NULL;
1585         char                    *next;
1586         unsigned                size;
1587         unsigned                t;
1588         unsigned                i;
1589         unsigned long           flags;
1590         u32                     tmp_reg;
1591
1592         next = buf;
1593         size = PAGE_SIZE;
1594         spin_lock_irqsave(&dev->lock, flags);
1595
1596         /* driver basic information */
1597         t = scnprintf(next, size,
1598                         DRIVER_DESC "\n"
1599                         "%s version: %s\n"
1600                         "Gadget driver: %s\n\n",
1601                         driver_name, DRIVER_VERSION,
1602                         dev->driver ? dev->driver->driver.name : "(none)");
1603         size -= t;
1604         next += t;
1605
1606         /* device registers */
1607         tmp_reg = readl(&dev->op_regs->usbcmd);
1608         t = scnprintf(next, size,
1609                         "USBCMD reg:\n"
1610                         "SetupTW: %d\n"
1611                         "Run/Stop: %s\n\n",
1612                         (tmp_reg & CMD_SUTW) ? 1 : 0,
1613                         (tmp_reg & CMD_RUNSTOP) ? "Run" : "Stop");
1614         size -= t;
1615         next += t;
1616
1617         tmp_reg = readl(&dev->op_regs->usbsts);
1618         t = scnprintf(next, size,
1619                         "USB Status Reg:\n"
1620                         "Device Suspend: %d\n"
1621                         "Reset Received: %d\n"
1622                         "System Error: %s\n"
1623                         "USB Error Interrupt: %s\n\n",
1624                         (tmp_reg & STS_SLI) ? 1 : 0,
1625                         (tmp_reg & STS_URI) ? 1 : 0,
1626                         (tmp_reg & STS_SEI) ? "Error" : "No error",
1627                         (tmp_reg & STS_UEI) ? "Error detected" : "No error");
1628         size -= t;
1629         next += t;
1630
1631         tmp_reg = readl(&dev->op_regs->usbintr);
1632         t = scnprintf(next, size,
1633                         "USB Intrrupt Enable Reg:\n"
1634                         "Sleep Enable: %d\n"
1635                         "SOF Received Enable: %d\n"
1636                         "Reset Enable: %d\n"
1637                         "System Error Enable: %d\n"
1638                         "Port Change Dectected Enable: %d\n"
1639                         "USB Error Intr Enable: %d\n"
1640                         "USB Intr Enable: %d\n\n",
1641                         (tmp_reg & INTR_SLE) ? 1 : 0,
1642                         (tmp_reg & INTR_SRE) ? 1 : 0,
1643                         (tmp_reg & INTR_URE) ? 1 : 0,
1644                         (tmp_reg & INTR_SEE) ? 1 : 0,
1645                         (tmp_reg & INTR_PCE) ? 1 : 0,
1646                         (tmp_reg & INTR_UEE) ? 1 : 0,
1647                         (tmp_reg & INTR_UE) ? 1 : 0);
1648         size -= t;
1649         next += t;
1650
1651         tmp_reg = readl(&dev->op_regs->frindex);
1652         t = scnprintf(next, size,
1653                         "USB Frame Index Reg:\n"
1654                         "Frame Number is 0x%08x\n\n",
1655                         (tmp_reg & FRINDEX_MASK));
1656         size -= t;
1657         next += t;
1658
1659         tmp_reg = readl(&dev->op_regs->deviceaddr);
1660         t = scnprintf(next, size,
1661                         "USB Device Address Reg:\n"
1662                         "Device Addr is 0x%x\n\n",
1663                         USBADR(tmp_reg));
1664         size -= t;
1665         next += t;
1666
1667         tmp_reg = readl(&dev->op_regs->endpointlistaddr);
1668         t = scnprintf(next, size,
1669                         "USB Endpoint List Address Reg:\n"
1670                         "Endpoint List Pointer is 0x%x\n\n",
1671                         EPBASE(tmp_reg));
1672         size -= t;
1673         next += t;
1674
1675         tmp_reg = readl(&dev->op_regs->portsc1);
1676         t = scnprintf(next, size,
1677                 "USB Port Status & Control Reg:\n"
1678                 "Port Reset: %s\n"
1679                 "Port Suspend Mode: %s\n"
1680                 "Over-current Change: %s\n"
1681                 "Port Enable/Disable Change: %s\n"
1682                 "Port Enabled/Disabled: %s\n"
1683                 "Current Connect Status: %s\n"
1684                 "LPM Suspend Status: %s\n\n",
1685                 (tmp_reg & PORTS_PR) ? "Reset" : "Not Reset",
1686                 (tmp_reg & PORTS_SUSP) ? "Suspend " : "Not Suspend",
1687                 (tmp_reg & PORTS_OCC) ? "Detected" : "No",
1688                 (tmp_reg & PORTS_PEC) ? "Changed" : "Not Changed",
1689                 (tmp_reg & PORTS_PE) ? "Enable" : "Not Correct",
1690                 (tmp_reg & PORTS_CCS) ?  "Attached" : "Not Attached",
1691                 (tmp_reg & PORTS_SLP) ? "LPM L1" : "LPM L0");
1692         size -= t;
1693         next += t;
1694
1695         tmp_reg = readl(&dev->op_regs->devlc);
1696         t = scnprintf(next, size,
1697                 "Device LPM Control Reg:\n"
1698                 "Parallel Transceiver : %d\n"
1699                 "Serial Transceiver : %d\n"
1700                 "Port Speed: %s\n"
1701                 "Port Force Full Speed Connenct: %s\n"
1702                 "PHY Low Power Suspend Clock: %s\n"
1703                 "BmAttributes: %d\n\n",
1704                 LPM_PTS(tmp_reg),
1705                 (tmp_reg & LPM_STS) ? 1 : 0,
1706                 usb_speed_string(lpm_device_speed(tmp_reg)),
1707                 (tmp_reg & LPM_PFSC) ? "Force Full Speed" : "Not Force",
1708                 (tmp_reg & LPM_PHCD) ? "Disabled" : "Enabled",
1709                 LPM_BA(tmp_reg));
1710         size -= t;
1711         next += t;
1712
1713         tmp_reg = readl(&dev->op_regs->usbmode);
1714         t = scnprintf(next, size,
1715                         "USB Mode Reg:\n"
1716                         "Controller Mode is : %s\n\n", ({
1717                                 char *s;
1718                                 switch (MODE_CM(tmp_reg)) {
1719                                 case MODE_IDLE:
1720                                         s = "Idle"; break;
1721                                 case MODE_DEVICE:
1722                                         s = "Device Controller"; break;
1723                                 case MODE_HOST:
1724                                         s = "Host Controller"; break;
1725                                 default:
1726                                         s = "None"; break;
1727                                 }
1728                                 s;
1729                         }));
1730         size -= t;
1731         next += t;
1732
1733         tmp_reg = readl(&dev->op_regs->endptsetupstat);
1734         t = scnprintf(next, size,
1735                         "Endpoint Setup Status Reg:\n"
1736                         "SETUP on ep 0x%04x\n\n",
1737                         tmp_reg & SETUPSTAT_MASK);
1738         size -= t;
1739         next += t;
1740
1741         for (i = 0; i < dev->ep_max / 2; i++) {
1742                 tmp_reg = readl(&dev->op_regs->endptctrl[i]);
1743                 t = scnprintf(next, size, "EP Ctrl Reg [%d]: 0x%08x\n",
1744                                 i, tmp_reg);
1745                 size -= t;
1746                 next += t;
1747         }
1748         tmp_reg = readl(&dev->op_regs->endptprime);
1749         t = scnprintf(next, size, "EP Prime Reg: 0x%08x\n\n", tmp_reg);
1750         size -= t;
1751         next += t;
1752
1753         /* langwell_udc, langwell_ep, langwell_request structure information */
1754         ep = &dev->ep[0];
1755         t = scnprintf(next, size, "%s MaxPacketSize: 0x%x, ep_num: %d\n",
1756                         ep->ep.name, ep->ep.maxpacket, ep->ep_num);
1757         size -= t;
1758         next += t;
1759
1760         if (list_empty(&ep->queue)) {
1761                 t = scnprintf(next, size, "its req queue is empty\n\n");
1762                 size -= t;
1763                 next += t;
1764         } else {
1765                 list_for_each_entry(req, &ep->queue, queue) {
1766                         t = scnprintf(next, size,
1767                                 "req %p actual 0x%x length 0x%x  buf %p\n",
1768                                 &req->req, req->req.actual,
1769                                 req->req.length, req->req.buf);
1770                         size -= t;
1771                         next += t;
1772                 }
1773         }
1774         /* other gadget->eplist ep */
1775         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1776                 if (ep->desc) {
1777                         t = scnprintf(next, size,
1778                                         "\n%s MaxPacketSize: 0x%x, "
1779                                         "ep_num: %d\n",
1780                                         ep->ep.name, ep->ep.maxpacket,
1781                                         ep->ep_num);
1782                         size -= t;
1783                         next += t;
1784
1785                         if (list_empty(&ep->queue)) {
1786                                 t = scnprintf(next, size,
1787                                                 "its req queue is empty\n\n");
1788                                 size -= t;
1789                                 next += t;
1790                         } else {
1791                                 list_for_each_entry(req, &ep->queue, queue) {
1792                                         t = scnprintf(next, size,
1793                                                 "req %p actual 0x%x length "
1794                                                 "0x%x  buf %p\n",
1795                                                 &req->req, req->req.actual,
1796                                                 req->req.length, req->req.buf);
1797                                         size -= t;
1798                                         next += t;
1799                                 }
1800                         }
1801                 }
1802         }
1803
1804         spin_unlock_irqrestore(&dev->lock, flags);
1805         return PAGE_SIZE - size;
1806 }
1807 static DEVICE_ATTR(langwell_udc, S_IRUGO, show_langwell_udc, NULL);
1808
1809
1810 /* device "remote_wakeup" sysfs attribute file */
1811 static ssize_t store_remote_wakeup(struct device *_dev,
1812                 struct device_attribute *attr, const char *buf, size_t count)
1813 {
1814         struct langwell_udc     *dev = dev_get_drvdata(_dev);
1815         unsigned long           flags;
1816         ssize_t                 rc = count;
1817
1818         if (count > 2)
1819                 return -EINVAL;
1820
1821         if (count > 0 && buf[count-1] == '\n')
1822                 ((char *) buf)[count-1] = 0;
1823
1824         if (buf[0] != '1')
1825                 return -EINVAL;
1826
1827         /* force remote wakeup enabled in case gadget driver doesn't support */
1828         spin_lock_irqsave(&dev->lock, flags);
1829         dev->remote_wakeup = 1;
1830         dev->dev_status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1831         spin_unlock_irqrestore(&dev->lock, flags);
1832
1833         langwell_wakeup(&dev->gadget);
1834
1835         return rc;
1836 }
1837 static DEVICE_ATTR(remote_wakeup, S_IWUSR, NULL, store_remote_wakeup);
1838
1839
1840 /*-------------------------------------------------------------------------*/
1841
1842 /*
1843  * when a driver is successfully registered, it will receive
1844  * control requests including set_configuration(), which enables
1845  * non-control requests.  then usb traffic follows until a
1846  * disconnect is reported.  then a host may connect again, or
1847  * the driver might get unbound.
1848  */
1849
1850 static int langwell_start(struct usb_gadget *g,
1851                 struct usb_gadget_driver *driver)
1852 {
1853         struct langwell_udc     *dev = gadget_to_langwell(g);
1854         unsigned long           flags;
1855         int                     retval;
1856
1857         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1858
1859         spin_lock_irqsave(&dev->lock, flags);
1860
1861         /* hook up the driver ... */
1862         driver->driver.bus = NULL;
1863         dev->driver = driver;
1864         dev->gadget.dev.driver = &driver->driver;
1865
1866         spin_unlock_irqrestore(&dev->lock, flags);
1867
1868         retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
1869         if (retval)
1870                 goto err;
1871
1872         dev->usb_state = USB_STATE_ATTACHED;
1873         dev->ep0_state = WAIT_FOR_SETUP;
1874         dev->ep0_dir = USB_DIR_OUT;
1875
1876         /* enable interrupt and set controller to run state */
1877         if (dev->got_irq)
1878                 langwell_udc_start(dev);
1879
1880         dev_vdbg(&dev->pdev->dev,
1881                         "After langwell_udc_start(), print all registers:\n");
1882         print_all_registers(dev);
1883
1884         dev_info(&dev->pdev->dev, "register driver: %s\n",
1885                         driver->driver.name);
1886         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1887
1888         return 0;
1889
1890 err:
1891         dev->gadget.dev.driver = NULL;
1892         dev->driver = NULL;
1893
1894         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1895
1896         return retval;
1897 }
1898
1899 /* unregister gadget driver */
1900 static int langwell_stop(struct usb_gadget *g,
1901                 struct usb_gadget_driver *driver)
1902 {
1903         struct langwell_udc     *dev = gadget_to_langwell(g);
1904         unsigned long           flags;
1905
1906         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1907
1908         /* exit PHY low power suspend */
1909         if (dev->pdev->device != 0x0829)
1910                 langwell_phy_low_power(dev, 0);
1911
1912         /* unbind OTG transceiver */
1913         if (dev->transceiver)
1914                 (void)otg_set_peripheral(dev->transceiver, 0);
1915
1916         /* disable interrupt and set controller to stop state */
1917         langwell_udc_stop(dev);
1918
1919         dev->usb_state = USB_STATE_ATTACHED;
1920         dev->ep0_state = WAIT_FOR_SETUP;
1921         dev->ep0_dir = USB_DIR_OUT;
1922
1923         spin_lock_irqsave(&dev->lock, flags);
1924
1925         /* stop all usb activities */
1926         dev->gadget.speed = USB_SPEED_UNKNOWN;
1927         dev->gadget.dev.driver = NULL;
1928         dev->driver = NULL;
1929         stop_activity(dev);
1930         spin_unlock_irqrestore(&dev->lock, flags);
1931
1932         device_remove_file(&dev->pdev->dev, &dev_attr_function);
1933
1934         dev_info(&dev->pdev->dev, "unregistered driver '%s'\n",
1935                         driver->driver.name);
1936         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1937
1938         return 0;
1939 }
1940
1941 /*-------------------------------------------------------------------------*/
1942
1943 /*
1944  * setup tripwire is used as a semaphore to ensure that the setup data
1945  * payload is extracted from a dQH without being corrupted
1946  */
1947 static void setup_tripwire(struct langwell_udc *dev)
1948 {
1949         u32                     usbcmd,
1950                                 endptsetupstat;
1951         unsigned long           timeout;
1952         struct langwell_dqh     *dqh;
1953
1954         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1955
1956         /* ep0 OUT dQH */
1957         dqh = &dev->ep_dqh[EP_DIR_OUT];
1958
1959         /* Write-Clear endptsetupstat */
1960         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
1961         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
1962
1963         /* wait until endptsetupstat is cleared */
1964         timeout = jiffies + SETUPSTAT_TIMEOUT;
1965         while (readl(&dev->op_regs->endptsetupstat)) {
1966                 if (time_after(jiffies, timeout)) {
1967                         dev_err(&dev->pdev->dev, "setup_tripwire timeout\n");
1968                         break;
1969                 }
1970                 cpu_relax();
1971         }
1972
1973         /* while a hazard exists when setup packet arrives */
1974         do {
1975                 /* set setup tripwire bit */
1976                 usbcmd = readl(&dev->op_regs->usbcmd);
1977                 writel(usbcmd | CMD_SUTW, &dev->op_regs->usbcmd);
1978
1979                 /* copy the setup packet to local buffer */
1980                 memcpy(&dev->local_setup_buff, &dqh->dqh_setup, 8);
1981         } while (!(readl(&dev->op_regs->usbcmd) & CMD_SUTW));
1982
1983         /* Write-Clear setup tripwire bit */
1984         usbcmd = readl(&dev->op_regs->usbcmd);
1985         writel(usbcmd & ~CMD_SUTW, &dev->op_regs->usbcmd);
1986
1987         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1988 }
1989
1990
1991 /* protocol ep0 stall, will automatically be cleared on new transaction */
1992 static void ep0_stall(struct langwell_udc *dev)
1993 {
1994         u32     endptctrl;
1995
1996         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1997
1998         /* set TX and RX to stall */
1999         endptctrl = readl(&dev->op_regs->endptctrl[0]);
2000         endptctrl |= EPCTRL_TXS | EPCTRL_RXS;
2001         writel(endptctrl, &dev->op_regs->endptctrl[0]);
2002
2003         /* update ep0 state */
2004         dev->ep0_state = WAIT_FOR_SETUP;
2005         dev->ep0_dir = USB_DIR_OUT;
2006
2007         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2008 }
2009
2010
2011 /* PRIME a status phase for ep0 */
2012 static int prime_status_phase(struct langwell_udc *dev, int dir)
2013 {
2014         struct langwell_request *req;
2015         struct langwell_ep      *ep;
2016         int                     status = 0;
2017
2018         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2019
2020         if (dir == EP_DIR_IN)
2021                 dev->ep0_dir = USB_DIR_IN;
2022         else
2023                 dev->ep0_dir = USB_DIR_OUT;
2024
2025         ep = &dev->ep[0];
2026         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2027
2028         req = dev->status_req;
2029
2030         req->ep = ep;
2031         req->req.length = 0;
2032         req->req.status = -EINPROGRESS;
2033         req->req.actual = 0;
2034         req->req.complete = NULL;
2035         req->dtd_count = 0;
2036
2037         if (!req_to_dtd(req))
2038                 status = queue_dtd(ep, req);
2039         else
2040                 return -ENOMEM;
2041
2042         if (status)
2043                 dev_err(&dev->pdev->dev, "can't queue ep0 status request\n");
2044
2045         list_add_tail(&req->queue, &ep->queue);
2046
2047         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2048         return status;
2049 }
2050
2051
2052 /* SET_ADDRESS request routine */
2053 static void set_address(struct langwell_udc *dev, u16 value,
2054                 u16 index, u16 length)
2055 {
2056         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2057
2058         /* save the new address to device struct */
2059         dev->dev_addr = (u8) value;
2060         dev_vdbg(&dev->pdev->dev, "dev->dev_addr = %d\n", dev->dev_addr);
2061
2062         /* update usb state */
2063         dev->usb_state = USB_STATE_ADDRESS;
2064
2065         /* STATUS phase */
2066         if (prime_status_phase(dev, EP_DIR_IN))
2067                 ep0_stall(dev);
2068
2069         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2070 }
2071
2072
2073 /* return endpoint by windex */
2074 static struct langwell_ep *get_ep_by_windex(struct langwell_udc *dev,
2075                 u16 wIndex)
2076 {
2077         struct langwell_ep              *ep;
2078         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2079
2080         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
2081                 return &dev->ep[0];
2082
2083         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
2084                 u8      bEndpointAddress;
2085                 if (!ep->desc)
2086                         continue;
2087
2088                 bEndpointAddress = ep->desc->bEndpointAddress;
2089                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2090                         continue;
2091
2092                 if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
2093                         == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
2094                         return ep;
2095         }
2096
2097         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2098         return NULL;
2099 }
2100
2101
2102 /* return whether endpoint is stalled, 0: not stalled; 1: stalled */
2103 static int ep_is_stall(struct langwell_ep *ep)
2104 {
2105         struct langwell_udc     *dev = ep->dev;
2106         u32                     endptctrl;
2107         int                     retval;
2108
2109         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2110
2111         endptctrl = readl(&dev->op_regs->endptctrl[ep->ep_num]);
2112         if (is_in(ep))
2113                 retval = endptctrl & EPCTRL_TXS ? 1 : 0;
2114         else
2115                 retval = endptctrl & EPCTRL_RXS ? 1 : 0;
2116
2117         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2118         return retval;
2119 }
2120
2121
2122 /* GET_STATUS request routine */
2123 static void get_status(struct langwell_udc *dev, u8 request_type, u16 value,
2124                 u16 index, u16 length)
2125 {
2126         struct langwell_request *req;
2127         struct langwell_ep      *ep;
2128         u16     status_data = 0;        /* 16 bits cpu view status data */
2129         int     status = 0;
2130
2131         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2132
2133         ep = &dev->ep[0];
2134
2135         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2136                 /* get device status */
2137                 status_data = dev->dev_status;
2138         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2139                 /* get interface status */
2140                 status_data = 0;
2141         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2142                 /* get endpoint status */
2143                 struct langwell_ep      *epn;
2144                 epn = get_ep_by_windex(dev, index);
2145                 /* stall if endpoint doesn't exist */
2146                 if (!epn)
2147                         goto stall;
2148
2149                 status_data = ep_is_stall(epn) << USB_ENDPOINT_HALT;
2150         }
2151
2152         dev_dbg(&dev->pdev->dev, "get status data: 0x%04x\n", status_data);
2153
2154         dev->ep0_dir = USB_DIR_IN;
2155
2156         /* borrow the per device status_req */
2157         req = dev->status_req;
2158
2159         /* fill in the reqest structure */
2160         *((u16 *) req->req.buf) = cpu_to_le16(status_data);
2161         req->ep = ep;
2162         req->req.length = 2;
2163         req->req.status = -EINPROGRESS;
2164         req->req.actual = 0;
2165         req->req.complete = NULL;
2166         req->dtd_count = 0;
2167
2168         /* prime the data phase */
2169         if (!req_to_dtd(req))
2170                 status = queue_dtd(ep, req);
2171         else                    /* no mem */
2172                 goto stall;
2173
2174         if (status) {
2175                 dev_err(&dev->pdev->dev,
2176                                 "response error on GET_STATUS request\n");
2177                 goto stall;
2178         }
2179
2180         list_add_tail(&req->queue, &ep->queue);
2181         dev->ep0_state = DATA_STATE_XMIT;
2182
2183         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2184         return;
2185 stall:
2186         ep0_stall(dev);
2187         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2188 }
2189
2190
2191 /* setup packet interrupt handler */
2192 static void handle_setup_packet(struct langwell_udc *dev,
2193                 struct usb_ctrlrequest *setup)
2194 {
2195         u16     wValue = le16_to_cpu(setup->wValue);
2196         u16     wIndex = le16_to_cpu(setup->wIndex);
2197         u16     wLength = le16_to_cpu(setup->wLength);
2198         u32     portsc1;
2199
2200         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2201
2202         /* ep0 fifo flush */
2203         nuke(&dev->ep[0], -ESHUTDOWN);
2204
2205         dev_dbg(&dev->pdev->dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
2206                         setup->bRequestType, setup->bRequest,
2207                         wValue, wIndex, wLength);
2208
2209         /* RNDIS gadget delegate */
2210         if ((setup->bRequestType == 0x21) && (setup->bRequest == 0x00)) {
2211                 /* USB_CDC_SEND_ENCAPSULATED_COMMAND */
2212                 goto delegate;
2213         }
2214
2215         /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2216         if ((setup->bRequestType == 0xa1) && (setup->bRequest == 0x01)) {
2217                 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2218                 goto delegate;
2219         }
2220
2221         /* We process some stardard setup requests here */
2222         switch (setup->bRequest) {
2223         case USB_REQ_GET_STATUS:
2224                 dev_dbg(&dev->pdev->dev, "SETUP: USB_REQ_GET_STATUS\n");
2225                 /* get status, DATA and STATUS phase */
2226                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2227                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
2228                         break;
2229                 get_status(dev, setup->bRequestType, wValue, wIndex, wLength);
2230                 goto end;
2231
2232         case USB_REQ_SET_ADDRESS:
2233                 dev_dbg(&dev->pdev->dev, "SETUP: USB_REQ_SET_ADDRESS\n");
2234                 /* STATUS phase */
2235                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
2236                                                 | USB_RECIP_DEVICE))
2237                         break;
2238                 set_address(dev, wValue, wIndex, wLength);
2239                 goto end;
2240
2241         case USB_REQ_CLEAR_FEATURE:
2242         case USB_REQ_SET_FEATURE:
2243                 /* STATUS phase */
2244         {
2245                 int rc = -EOPNOTSUPP;
2246                 if (setup->bRequest == USB_REQ_SET_FEATURE)
2247                         dev_dbg(&dev->pdev->dev,
2248                                         "SETUP: USB_REQ_SET_FEATURE\n");
2249                 else if (setup->bRequest == USB_REQ_CLEAR_FEATURE)
2250                         dev_dbg(&dev->pdev->dev,
2251                                         "SETUP: USB_REQ_CLEAR_FEATURE\n");
2252
2253                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
2254                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
2255                         struct langwell_ep      *epn;
2256                         epn = get_ep_by_windex(dev, wIndex);
2257                         /* stall if endpoint doesn't exist */
2258                         if (!epn) {
2259                                 ep0_stall(dev);
2260                                 goto end;
2261                         }
2262
2263                         if (wValue != 0 || wLength != 0
2264                                         || epn->ep_num > dev->ep_max)
2265                                 break;
2266
2267                         spin_unlock(&dev->lock);
2268                         rc = langwell_ep_set_halt(&epn->ep,
2269                                 (setup->bRequest == USB_REQ_SET_FEATURE)
2270                                 ? 1 : 0);
2271                         spin_lock(&dev->lock);
2272
2273                 } else if ((setup->bRequestType & (USB_RECIP_MASK
2274                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
2275                                 | USB_TYPE_STANDARD)) {
2276                         rc = 0;
2277                         switch (wValue) {
2278                         case USB_DEVICE_REMOTE_WAKEUP:
2279                                 if (setup->bRequest == USB_REQ_SET_FEATURE) {
2280                                         dev->remote_wakeup = 1;
2281                                         dev->dev_status |= (1 << wValue);
2282                                 } else {
2283                                         dev->remote_wakeup = 0;
2284                                         dev->dev_status &= ~(1 << wValue);
2285                                 }
2286                                 break;
2287                         case USB_DEVICE_TEST_MODE:
2288                                 dev_dbg(&dev->pdev->dev, "SETUP: TEST MODE\n");
2289                                 if ((wIndex & 0xff) ||
2290                                         (dev->gadget.speed != USB_SPEED_HIGH))
2291                                         ep0_stall(dev);
2292
2293                                 switch (wIndex >> 8) {
2294                                 case TEST_J:
2295                                 case TEST_K:
2296                                 case TEST_SE0_NAK:
2297                                 case TEST_PACKET:
2298                                 case TEST_FORCE_EN:
2299                                         if (prime_status_phase(dev, EP_DIR_IN))
2300                                                 ep0_stall(dev);
2301                                         portsc1 = readl(&dev->op_regs->portsc1);
2302                                         portsc1 |= (wIndex & 0xf00) << 8;
2303                                         writel(portsc1, &dev->op_regs->portsc1);
2304                                         goto end;
2305                                 default:
2306                                         rc = -EOPNOTSUPP;
2307                                 }
2308                                 break;
2309                         default:
2310                                 rc = -EOPNOTSUPP;
2311                                 break;
2312                         }
2313
2314                         if (!gadget_is_otg(&dev->gadget))
2315                                 break;
2316                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) {
2317                                 dev->gadget.b_hnp_enable = 1;
2318 #ifdef  OTG_TRANSCEIVER
2319                                 if (!dev->lotg->otg.default_a)
2320                                         dev->lotg->hsm.b_hnp_enable = 1;
2321 #endif
2322                         } else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
2323                                 dev->gadget.a_hnp_support = 1;
2324                         else if (setup->bRequest ==
2325                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
2326                                 dev->gadget.a_alt_hnp_support = 1;
2327                         else
2328                                 break;
2329                 } else
2330                         break;
2331
2332                 if (rc == 0) {
2333                         if (prime_status_phase(dev, EP_DIR_IN))
2334                                 ep0_stall(dev);
2335                 }
2336                 goto end;
2337         }
2338
2339         case USB_REQ_GET_DESCRIPTOR:
2340                 dev_dbg(&dev->pdev->dev,
2341                                 "SETUP: USB_REQ_GET_DESCRIPTOR\n");
2342                 goto delegate;
2343
2344         case USB_REQ_SET_DESCRIPTOR:
2345                 dev_dbg(&dev->pdev->dev,
2346                                 "SETUP: USB_REQ_SET_DESCRIPTOR unsupported\n");
2347                 goto delegate;
2348
2349         case USB_REQ_GET_CONFIGURATION:
2350                 dev_dbg(&dev->pdev->dev,
2351                                 "SETUP: USB_REQ_GET_CONFIGURATION\n");
2352                 goto delegate;
2353
2354         case USB_REQ_SET_CONFIGURATION:
2355                 dev_dbg(&dev->pdev->dev,
2356                                 "SETUP: USB_REQ_SET_CONFIGURATION\n");
2357                 goto delegate;
2358
2359         case USB_REQ_GET_INTERFACE:
2360                 dev_dbg(&dev->pdev->dev,
2361                                 "SETUP: USB_REQ_GET_INTERFACE\n");
2362                 goto delegate;
2363
2364         case USB_REQ_SET_INTERFACE:
2365                 dev_dbg(&dev->pdev->dev,
2366                                 "SETUP: USB_REQ_SET_INTERFACE\n");
2367                 goto delegate;
2368
2369         case USB_REQ_SYNCH_FRAME:
2370                 dev_dbg(&dev->pdev->dev,
2371                                 "SETUP: USB_REQ_SYNCH_FRAME unsupported\n");
2372                 goto delegate;
2373
2374         default:
2375                 /* delegate USB standard requests to the gadget driver */
2376                 goto delegate;
2377 delegate:
2378                 /* USB requests handled by gadget */
2379                 if (wLength) {
2380                         /* DATA phase from gadget, STATUS phase from udc */
2381                         dev->ep0_dir = (setup->bRequestType & USB_DIR_IN)
2382                                         ?  USB_DIR_IN : USB_DIR_OUT;
2383                         dev_vdbg(&dev->pdev->dev,
2384                                         "dev->ep0_dir = 0x%x, wLength = %d\n",
2385                                         dev->ep0_dir, wLength);
2386                         spin_unlock(&dev->lock);
2387                         if (dev->driver->setup(&dev->gadget,
2388                                         &dev->local_setup_buff) < 0)
2389                                 ep0_stall(dev);
2390                         spin_lock(&dev->lock);
2391                         dev->ep0_state = (setup->bRequestType & USB_DIR_IN)
2392                                         ?  DATA_STATE_XMIT : DATA_STATE_RECV;
2393                 } else {
2394                         /* no DATA phase, IN STATUS phase from gadget */
2395                         dev->ep0_dir = USB_DIR_IN;
2396                         dev_vdbg(&dev->pdev->dev,
2397                                         "dev->ep0_dir = 0x%x, wLength = %d\n",
2398                                         dev->ep0_dir, wLength);
2399                         spin_unlock(&dev->lock);
2400                         if (dev->driver->setup(&dev->gadget,
2401                                         &dev->local_setup_buff) < 0)
2402                                 ep0_stall(dev);
2403                         spin_lock(&dev->lock);
2404                         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2405                 }
2406                 break;
2407         }
2408 end:
2409         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2410 }
2411
2412
2413 /* transfer completion, process endpoint request and free the completed dTDs
2414  * for this request
2415  */
2416 static int process_ep_req(struct langwell_udc *dev, int index,
2417                 struct langwell_request *curr_req)
2418 {
2419         struct langwell_dtd     *curr_dtd;
2420         struct langwell_dqh     *curr_dqh;
2421         int                     td_complete, actual, remaining_length;
2422         int                     i, dir;
2423         u8                      dtd_status = 0;
2424         int                     retval = 0;
2425
2426         curr_dqh = &dev->ep_dqh[index];
2427         dir = index % 2;
2428
2429         curr_dtd = curr_req->head;
2430         td_complete = 0;
2431         actual = curr_req->req.length;
2432
2433         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2434
2435         for (i = 0; i < curr_req->dtd_count; i++) {
2436
2437                 /* command execution states by dTD */
2438                 dtd_status = curr_dtd->dtd_status;
2439
2440                 barrier();
2441                 remaining_length = le16_to_cpu(curr_dtd->dtd_total);
2442                 actual -= remaining_length;
2443
2444                 if (!dtd_status) {
2445                         /* transfers completed successfully */
2446                         if (!remaining_length) {
2447                                 td_complete++;
2448                                 dev_vdbg(&dev->pdev->dev,
2449                                         "dTD transmitted successfully\n");
2450                         } else {
2451                                 if (dir) {
2452                                         dev_vdbg(&dev->pdev->dev,
2453                                                 "TX dTD remains data\n");
2454                                         retval = -EPROTO;
2455                                         break;
2456
2457                                 } else {
2458                                         td_complete++;
2459                                         break;
2460                                 }
2461                         }
2462                 } else {
2463                         /* transfers completed with errors */
2464                         if (dtd_status & DTD_STS_ACTIVE) {
2465                                 dev_dbg(&dev->pdev->dev,
2466                                         "dTD status ACTIVE dQH[%d]\n", index);
2467                                 retval = 1;
2468                                 return retval;
2469                         } else if (dtd_status & DTD_STS_HALTED) {
2470                                 dev_err(&dev->pdev->dev,
2471                                         "dTD error %08x dQH[%d]\n",
2472                                         dtd_status, index);
2473                                 /* clear the errors and halt condition */
2474                                 curr_dqh->dtd_status = 0;
2475                                 retval = -EPIPE;
2476                                 break;
2477                         } else if (dtd_status & DTD_STS_DBE) {
2478                                 dev_dbg(&dev->pdev->dev,
2479                                         "data buffer (overflow) error\n");
2480                                 retval = -EPROTO;
2481                                 break;
2482                         } else if (dtd_status & DTD_STS_TRE) {
2483                                 dev_dbg(&dev->pdev->dev,
2484                                         "transaction(ISO) error\n");
2485                                 retval = -EILSEQ;
2486                                 break;
2487                         } else
2488                                 dev_err(&dev->pdev->dev,
2489                                         "unknown error (0x%x)!\n",
2490                                         dtd_status);
2491                 }
2492
2493                 if (i != curr_req->dtd_count - 1)
2494                         curr_dtd = (struct langwell_dtd *)
2495                                 curr_dtd->next_dtd_virt;
2496         }
2497
2498         if (retval)
2499                 return retval;
2500
2501         curr_req->req.actual = actual;
2502
2503         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2504         return 0;
2505 }
2506
2507
2508 /* complete DATA or STATUS phase of ep0 prime status phase if needed */
2509 static void ep0_req_complete(struct langwell_udc *dev,
2510                 struct langwell_ep *ep0, struct langwell_request *req)
2511 {
2512         u32     new_addr;
2513         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2514
2515         if (dev->usb_state == USB_STATE_ADDRESS) {
2516                 /* set the new address */
2517                 new_addr = (u32)dev->dev_addr;
2518                 writel(new_addr << USBADR_SHIFT, &dev->op_regs->deviceaddr);
2519
2520                 new_addr = USBADR(readl(&dev->op_regs->deviceaddr));
2521                 dev_vdbg(&dev->pdev->dev, "new_addr = %d\n", new_addr);
2522         }
2523
2524         done(ep0, req, 0);
2525
2526         switch (dev->ep0_state) {
2527         case DATA_STATE_XMIT:
2528                 /* receive status phase */
2529                 if (prime_status_phase(dev, EP_DIR_OUT))
2530                         ep0_stall(dev);
2531                 break;
2532         case DATA_STATE_RECV:
2533                 /* send status phase */
2534                 if (prime_status_phase(dev, EP_DIR_IN))
2535                         ep0_stall(dev);
2536                 break;
2537         case WAIT_FOR_OUT_STATUS:
2538                 dev->ep0_state = WAIT_FOR_SETUP;
2539                 break;
2540         case WAIT_FOR_SETUP:
2541                 dev_err(&dev->pdev->dev, "unexpect ep0 packets\n");
2542                 break;
2543         default:
2544                 ep0_stall(dev);
2545                 break;
2546         }
2547
2548         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2549 }
2550
2551
2552 /* USB transfer completion interrupt */
2553 static void handle_trans_complete(struct langwell_udc *dev)
2554 {
2555         u32                     complete_bits;
2556         int                     i, ep_num, dir, bit_mask, status;
2557         struct langwell_ep      *epn;
2558         struct langwell_request *curr_req, *temp_req;
2559
2560         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2561
2562         complete_bits = readl(&dev->op_regs->endptcomplete);
2563         dev_vdbg(&dev->pdev->dev, "endptcomplete register: 0x%08x\n",
2564                         complete_bits);
2565
2566         /* Write-Clear the bits in endptcomplete register */
2567         writel(complete_bits, &dev->op_regs->endptcomplete);
2568
2569         if (!complete_bits) {
2570                 dev_dbg(&dev->pdev->dev, "complete_bits = 0\n");
2571                 goto done;
2572         }
2573
2574         for (i = 0; i < dev->ep_max; i++) {
2575                 ep_num = i / 2;
2576                 dir = i % 2;
2577
2578                 bit_mask = 1 << (ep_num + 16 * dir);
2579
2580                 if (!(complete_bits & bit_mask))
2581                         continue;
2582
2583                 /* ep0 */
2584                 if (i == 1)
2585                         epn = &dev->ep[0];
2586                 else
2587                         epn = &dev->ep[i];
2588
2589                 if (epn->name == NULL) {
2590                         dev_warn(&dev->pdev->dev, "invalid endpoint\n");
2591                         continue;
2592                 }
2593
2594                 if (i < 2)
2595                         /* ep0 in and out */
2596                         dev_dbg(&dev->pdev->dev, "%s-%s transfer completed\n",
2597                                         epn->name,
2598                                         is_in(epn) ? "in" : "out");
2599                 else
2600                         dev_dbg(&dev->pdev->dev, "%s transfer completed\n",
2601                                         epn->name);
2602
2603                 /* process the req queue until an uncomplete request */
2604                 list_for_each_entry_safe(curr_req, temp_req,
2605                                 &epn->queue, queue) {
2606                         status = process_ep_req(dev, i, curr_req);
2607                         dev_vdbg(&dev->pdev->dev, "%s req status: %d\n",
2608                                         epn->name, status);
2609
2610                         if (status)
2611                                 break;
2612
2613                         /* write back status to req */
2614                         curr_req->req.status = status;
2615
2616                         /* ep0 request completion */
2617                         if (ep_num == 0) {
2618                                 ep0_req_complete(dev, epn, curr_req);
2619                                 break;
2620                         } else {
2621                                 done(epn, curr_req, status);
2622                         }
2623                 }
2624         }
2625 done:
2626         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2627 }
2628
2629 /* port change detect interrupt handler */
2630 static void handle_port_change(struct langwell_udc *dev)
2631 {
2632         u32     portsc1, devlc;
2633
2634         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2635
2636         if (dev->bus_reset)
2637                 dev->bus_reset = 0;
2638
2639         portsc1 = readl(&dev->op_regs->portsc1);
2640         devlc = readl(&dev->op_regs->devlc);
2641         dev_vdbg(&dev->pdev->dev, "portsc1 = 0x%08x, devlc = 0x%08x\n",
2642                         portsc1, devlc);
2643
2644         /* bus reset is finished */
2645         if (!(portsc1 & PORTS_PR)) {
2646                 /* get the speed */
2647                 dev->gadget.speed = lpm_device_speed(devlc);
2648                 dev_vdbg(&dev->pdev->dev, "dev->gadget.speed = %d\n",
2649                         dev->gadget.speed);
2650         }
2651
2652         /* LPM L0 to L1 */
2653         if (dev->lpm && dev->lpm_state == LPM_L0)
2654                 if (portsc1 & PORTS_SUSP && portsc1 & PORTS_SLP) {
2655                         dev_info(&dev->pdev->dev, "LPM L0 to L1\n");
2656                         dev->lpm_state = LPM_L1;
2657                 }
2658
2659         /* LPM L1 to L0, force resume or remote wakeup finished */
2660         if (dev->lpm && dev->lpm_state == LPM_L1)
2661                 if (!(portsc1 & PORTS_SUSP)) {
2662                         dev_info(&dev->pdev->dev, "LPM L1 to L0\n");
2663                         dev->lpm_state = LPM_L0;
2664                 }
2665
2666         /* update USB state */
2667         if (!dev->resume_state)
2668                 dev->usb_state = USB_STATE_DEFAULT;
2669
2670         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2671 }
2672
2673
2674 /* USB reset interrupt handler */
2675 static void handle_usb_reset(struct langwell_udc *dev)
2676 {
2677         u32             deviceaddr,
2678                         endptsetupstat,
2679                         endptcomplete;
2680         unsigned long   timeout;
2681
2682         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2683
2684         /* Write-Clear the device address */
2685         deviceaddr = readl(&dev->op_regs->deviceaddr);
2686         writel(deviceaddr & ~USBADR_MASK, &dev->op_regs->deviceaddr);
2687
2688         dev->dev_addr = 0;
2689
2690         /* clear usb state */
2691         dev->resume_state = 0;
2692
2693         /* LPM L1 to L0, reset */
2694         if (dev->lpm)
2695                 dev->lpm_state = LPM_L0;
2696
2697         dev->ep0_dir = USB_DIR_OUT;
2698         dev->ep0_state = WAIT_FOR_SETUP;
2699
2700         /* remote wakeup reset to 0 when the device is reset */
2701         dev->remote_wakeup = 0;
2702         dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
2703         dev->gadget.b_hnp_enable = 0;
2704         dev->gadget.a_hnp_support = 0;
2705         dev->gadget.a_alt_hnp_support = 0;
2706
2707         /* Write-Clear all the setup token semaphores */
2708         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
2709         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
2710
2711         /* Write-Clear all the endpoint complete status bits */
2712         endptcomplete = readl(&dev->op_regs->endptcomplete);
2713         writel(endptcomplete, &dev->op_regs->endptcomplete);
2714
2715         /* wait until all endptprime bits cleared */
2716         timeout = jiffies + PRIME_TIMEOUT;
2717         while (readl(&dev->op_regs->endptprime)) {
2718                 if (time_after(jiffies, timeout)) {
2719                         dev_err(&dev->pdev->dev, "USB reset timeout\n");
2720                         break;
2721                 }
2722                 cpu_relax();
2723         }
2724
2725         /* write 1s to endptflush register to clear any primed buffers */
2726         writel((u32) ~0, &dev->op_regs->endptflush);
2727
2728         if (readl(&dev->op_regs->portsc1) & PORTS_PR) {
2729                 dev_vdbg(&dev->pdev->dev, "USB bus reset\n");
2730                 /* bus is reseting */
2731                 dev->bus_reset = 1;
2732
2733                 /* reset all the queues, stop all USB activities */
2734                 stop_activity(dev);
2735                 dev->usb_state = USB_STATE_DEFAULT;
2736         } else {
2737                 dev_vdbg(&dev->pdev->dev, "device controller reset\n");
2738                 /* controller reset */
2739                 langwell_udc_reset(dev);
2740
2741                 /* reset all the queues, stop all USB activities */
2742                 stop_activity(dev);
2743
2744                 /* reset ep0 dQH and endptctrl */
2745                 ep0_reset(dev);
2746
2747                 /* enable interrupt and set controller to run state */
2748                 langwell_udc_start(dev);
2749
2750                 dev->usb_state = USB_STATE_ATTACHED;
2751         }
2752
2753 #ifdef  OTG_TRANSCEIVER
2754         /* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */
2755         if (!dev->lotg->otg.default_a)
2756                 dev->lotg->hsm.b_hnp_enable = 0;
2757 #endif
2758
2759         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2760 }
2761
2762
2763 /* USB bus suspend/resume interrupt */
2764 static void handle_bus_suspend(struct langwell_udc *dev)
2765 {
2766         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2767
2768         dev->resume_state = dev->usb_state;
2769         dev->usb_state = USB_STATE_SUSPENDED;
2770
2771 #ifdef  OTG_TRANSCEIVER
2772         if (dev->lotg->otg.default_a) {
2773                 if (dev->lotg->hsm.b_bus_suspend_vld == 1) {
2774                         dev->lotg->hsm.b_bus_suspend = 1;
2775                         /* notify transceiver the state changes */
2776                         if (spin_trylock(&dev->lotg->wq_lock)) {
2777                                 langwell_update_transceiver();
2778                                 spin_unlock(&dev->lotg->wq_lock);
2779                         }
2780                 }
2781                 dev->lotg->hsm.b_bus_suspend_vld++;
2782         } else {
2783                 if (!dev->lotg->hsm.a_bus_suspend) {
2784                         dev->lotg->hsm.a_bus_suspend = 1;
2785                         /* notify transceiver the state changes */
2786                         if (spin_trylock(&dev->lotg->wq_lock)) {
2787                                 langwell_update_transceiver();
2788                                 spin_unlock(&dev->lotg->wq_lock);
2789                         }
2790                 }
2791         }
2792 #endif
2793
2794         /* report suspend to the driver */
2795         if (dev->driver) {
2796                 if (dev->driver->suspend) {
2797                         spin_unlock(&dev->lock);
2798                         dev->driver->suspend(&dev->gadget);
2799                         spin_lock(&dev->lock);
2800                         dev_dbg(&dev->pdev->dev, "suspend %s\n",
2801                                         dev->driver->driver.name);
2802                 }
2803         }
2804
2805         /* enter PHY low power suspend */
2806         if (dev->pdev->device != 0x0829)
2807                 langwell_phy_low_power(dev, 0);
2808
2809         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2810 }
2811
2812
2813 static void handle_bus_resume(struct langwell_udc *dev)
2814 {
2815         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2816
2817         dev->usb_state = dev->resume_state;
2818         dev->resume_state = 0;
2819
2820         /* exit PHY low power suspend */
2821         if (dev->pdev->device != 0x0829)
2822                 langwell_phy_low_power(dev, 0);
2823
2824 #ifdef  OTG_TRANSCEIVER
2825         if (dev->lotg->otg.default_a == 0)
2826                 dev->lotg->hsm.a_bus_suspend = 0;
2827 #endif
2828
2829         /* report resume to the driver */
2830         if (dev->driver) {
2831                 if (dev->driver->resume) {
2832                         spin_unlock(&dev->lock);
2833                         dev->driver->resume(&dev->gadget);
2834                         spin_lock(&dev->lock);
2835                         dev_dbg(&dev->pdev->dev, "resume %s\n",
2836                                         dev->driver->driver.name);
2837                 }
2838         }
2839
2840         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2841 }
2842
2843
2844 /* USB device controller interrupt handler */
2845 static irqreturn_t langwell_irq(int irq, void *_dev)
2846 {
2847         struct langwell_udc     *dev = _dev;
2848         u32                     usbsts,
2849                                 usbintr,
2850                                 irq_sts,
2851                                 portsc1;
2852
2853         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2854
2855         if (dev->stopped) {
2856                 dev_vdbg(&dev->pdev->dev, "handle IRQ_NONE\n");
2857                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2858                 return IRQ_NONE;
2859         }
2860
2861         spin_lock(&dev->lock);
2862
2863         /* USB status */
2864         usbsts = readl(&dev->op_regs->usbsts);
2865
2866         /* USB interrupt enable */
2867         usbintr = readl(&dev->op_regs->usbintr);
2868
2869         irq_sts = usbsts & usbintr;
2870         dev_vdbg(&dev->pdev->dev,
2871                         "usbsts = 0x%08x, usbintr = 0x%08x, irq_sts = 0x%08x\n",
2872                         usbsts, usbintr, irq_sts);
2873
2874         if (!irq_sts) {
2875                 dev_vdbg(&dev->pdev->dev, "handle IRQ_NONE\n");
2876                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2877                 spin_unlock(&dev->lock);
2878                 return IRQ_NONE;
2879         }
2880
2881         /* Write-Clear interrupt status bits */
2882         writel(irq_sts, &dev->op_regs->usbsts);
2883
2884         /* resume from suspend */
2885         portsc1 = readl(&dev->op_regs->portsc1);
2886         if (dev->usb_state == USB_STATE_SUSPENDED)
2887                 if (!(portsc1 & PORTS_SUSP))
2888                         handle_bus_resume(dev);
2889
2890         /* USB interrupt */
2891         if (irq_sts & STS_UI) {
2892                 dev_vdbg(&dev->pdev->dev, "USB interrupt\n");
2893
2894                 /* setup packet received from ep0 */
2895                 if (readl(&dev->op_regs->endptsetupstat)
2896                                 & EP0SETUPSTAT_MASK) {
2897                         dev_vdbg(&dev->pdev->dev,
2898                                 "USB SETUP packet received interrupt\n");
2899                         /* setup tripwire semaphone */
2900                         setup_tripwire(dev);
2901                         handle_setup_packet(dev, &dev->local_setup_buff);
2902                 }
2903
2904                 /* USB transfer completion */
2905                 if (readl(&dev->op_regs->endptcomplete)) {
2906                         dev_vdbg(&dev->pdev->dev,
2907                                 "USB transfer completion interrupt\n");
2908                         handle_trans_complete(dev);
2909                 }
2910         }
2911
2912         /* SOF received interrupt (for ISO transfer) */
2913         if (irq_sts & STS_SRI) {
2914                 /* FIXME */
2915                 /* dev_vdbg(&dev->pdev->dev, "SOF received interrupt\n"); */
2916         }
2917
2918         /* port change detect interrupt */
2919         if (irq_sts & STS_PCI) {
2920                 dev_vdbg(&dev->pdev->dev, "port change detect interrupt\n");
2921                 handle_port_change(dev);
2922         }
2923
2924         /* suspend interrupt */
2925         if (irq_sts & STS_SLI) {
2926                 dev_vdbg(&dev->pdev->dev, "suspend interrupt\n");
2927                 handle_bus_suspend(dev);
2928         }
2929
2930         /* USB reset interrupt */
2931         if (irq_sts & STS_URI) {
2932                 dev_vdbg(&dev->pdev->dev, "USB reset interrupt\n");
2933                 handle_usb_reset(dev);
2934         }
2935
2936         /* USB error or system error interrupt */
2937         if (irq_sts & (STS_UEI | STS_SEI)) {
2938                 /* FIXME */
2939                 dev_warn(&dev->pdev->dev, "error IRQ, irq_sts: %x\n", irq_sts);
2940         }
2941
2942         spin_unlock(&dev->lock);
2943
2944         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2945         return IRQ_HANDLED;
2946 }
2947
2948
2949 /*-------------------------------------------------------------------------*/
2950
2951 /* release device structure */
2952 static void gadget_release(struct device *_dev)
2953 {
2954         struct langwell_udc     *dev = dev_get_drvdata(_dev);
2955
2956         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2957
2958         complete(dev->done);
2959
2960         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2961         kfree(dev);
2962 }
2963
2964
2965 /* enable SRAM caching if SRAM detected */
2966 static void sram_init(struct langwell_udc *dev)
2967 {
2968         struct pci_dev          *pdev = dev->pdev;
2969
2970         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2971
2972         dev->sram_addr = pci_resource_start(pdev, 1);
2973         dev->sram_size = pci_resource_len(pdev, 1);
2974         dev_info(&dev->pdev->dev, "Found private SRAM at %x size:%x\n",
2975                         dev->sram_addr, dev->sram_size);
2976         dev->got_sram = 1;
2977
2978         if (pci_request_region(pdev, 1, kobject_name(&pdev->dev.kobj))) {
2979                 dev_warn(&dev->pdev->dev, "SRAM request failed\n");
2980                 dev->got_sram = 0;
2981         } else if (!dma_declare_coherent_memory(&pdev->dev, dev->sram_addr,
2982                         dev->sram_addr, dev->sram_size, DMA_MEMORY_MAP)) {
2983                 dev_warn(&dev->pdev->dev, "SRAM DMA declare failed\n");
2984                 pci_release_region(pdev, 1);
2985                 dev->got_sram = 0;
2986         }
2987
2988         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2989 }
2990
2991
2992 /* release SRAM caching */
2993 static void sram_deinit(struct langwell_udc *dev)
2994 {
2995         struct pci_dev *pdev = dev->pdev;
2996
2997         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2998
2999         dma_release_declared_memory(&pdev->dev);
3000         pci_release_region(pdev, 1);
3001
3002         dev->got_sram = 0;
3003
3004         dev_info(&dev->pdev->dev, "release SRAM caching\n");
3005         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3006 }
3007
3008
3009 /* tear down the binding between this driver and the pci device */
3010 static void langwell_udc_remove(struct pci_dev *pdev)
3011 {
3012         struct langwell_udc     *dev = pci_get_drvdata(pdev);
3013
3014         DECLARE_COMPLETION(done);
3015
3016         BUG_ON(dev->driver);
3017         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3018
3019         dev->done = &done;
3020
3021 #ifndef OTG_TRANSCEIVER
3022         /* free dTD dma_pool and dQH */
3023         if (dev->dtd_pool)
3024                 dma_pool_destroy(dev->dtd_pool);
3025
3026         if (dev->ep_dqh)
3027                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
3028                         dev->ep_dqh, dev->ep_dqh_dma);
3029
3030         /* release SRAM caching */
3031         if (dev->has_sram && dev->got_sram)
3032                 sram_deinit(dev);
3033 #endif
3034
3035         if (dev->status_req) {
3036                 kfree(dev->status_req->req.buf);
3037                 kfree(dev->status_req);
3038         }
3039
3040         kfree(dev->ep);
3041
3042         /* disable IRQ handler */
3043         if (dev->got_irq)
3044                 free_irq(pdev->irq, dev);
3045
3046 #ifndef OTG_TRANSCEIVER
3047         if (dev->cap_regs)
3048                 iounmap(dev->cap_regs);
3049
3050         if (dev->region)
3051                 release_mem_region(pci_resource_start(pdev, 0),
3052                                 pci_resource_len(pdev, 0));
3053
3054         if (dev->enabled)
3055                 pci_disable_device(pdev);
3056 #else
3057         if (dev->transceiver) {
3058                 otg_put_transceiver(dev->transceiver);
3059                 dev->transceiver = NULL;
3060                 dev->lotg = NULL;
3061         }
3062 #endif
3063
3064         dev->cap_regs = NULL;
3065
3066         dev_info(&dev->pdev->dev, "unbind\n");
3067         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3068
3069         device_unregister(&dev->gadget.dev);
3070         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
3071         device_remove_file(&pdev->dev, &dev_attr_remote_wakeup);
3072
3073 #ifndef OTG_TRANSCEIVER
3074         pci_set_drvdata(pdev, NULL);
3075 #endif
3076
3077         /* free dev, wait for the release() finished */
3078         wait_for_completion(&done);
3079 }
3080
3081
3082 /*
3083  * wrap this driver around the specified device, but
3084  * don't respond over USB until a gadget driver binds to us.
3085  */
3086 static int langwell_udc_probe(struct pci_dev *pdev,
3087                 const struct pci_device_id *id)
3088 {
3089         struct langwell_udc     *dev;
3090 #ifndef OTG_TRANSCEIVER
3091         unsigned long           resource, len;
3092 #endif
3093         void                    __iomem *base = NULL;
3094         size_t                  size;
3095         int                     retval;
3096
3097         /* alloc, and start init */
3098         dev = kzalloc(sizeof *dev, GFP_KERNEL);
3099         if (dev == NULL) {
3100                 retval = -ENOMEM;
3101                 goto error;
3102         }
3103
3104         /* initialize device spinlock */
3105         spin_lock_init(&dev->lock);
3106
3107         dev->pdev = pdev;
3108         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3109
3110 #ifdef  OTG_TRANSCEIVER
3111         /* PCI device is already enabled by otg_transceiver driver */
3112         dev->enabled = 1;
3113
3114         /* mem region and register base */
3115         dev->region = 1;
3116         dev->transceiver = otg_get_transceiver();
3117         dev->lotg = otg_to_langwell(dev->transceiver);
3118         base = dev->lotg->regs;
3119 #else
3120         pci_set_drvdata(pdev, dev);
3121
3122         /* now all the pci goodies ... */
3123         if (pci_enable_device(pdev) < 0) {
3124                 retval = -ENODEV;
3125                 goto error;
3126         }
3127         dev->enabled = 1;
3128
3129         /* control register: BAR 0 */
3130         resource = pci_resource_start(pdev, 0);
3131         len = pci_resource_len(pdev, 0);
3132         if (!request_mem_region(resource, len, driver_name)) {
3133                 dev_err(&dev->pdev->dev, "controller already in use\n");
3134                 retval = -EBUSY;
3135                 goto error;
3136         }
3137         dev->region = 1;
3138
3139         base = ioremap_nocache(resource, len);
3140 #endif
3141         if (base == NULL) {
3142                 dev_err(&dev->pdev->dev, "can't map memory\n");
3143                 retval = -EFAULT;
3144                 goto error;
3145         }
3146
3147         dev->cap_regs = (struct langwell_cap_regs __iomem *) base;
3148         dev_vdbg(&dev->pdev->dev, "dev->cap_regs: %p\n", dev->cap_regs);
3149         dev->op_regs = (struct langwell_op_regs __iomem *)
3150                 (base + OP_REG_OFFSET);
3151         dev_vdbg(&dev->pdev->dev, "dev->op_regs: %p\n", dev->op_regs);
3152
3153         /* irq setup after old hardware is cleaned up */
3154         if (!pdev->irq) {
3155                 dev_err(&dev->pdev->dev, "No IRQ. Check PCI setup!\n");
3156                 retval = -ENODEV;
3157                 goto error;
3158         }
3159
3160         dev->has_sram = 1;
3161         dev->got_sram = 0;
3162         dev_vdbg(&dev->pdev->dev, "dev->has_sram: %d\n", dev->has_sram);
3163
3164 #ifndef OTG_TRANSCEIVER
3165         /* enable SRAM caching if detected */
3166         if (dev->has_sram && !dev->got_sram)
3167                 sram_init(dev);
3168
3169         dev_info(&dev->pdev->dev,
3170                         "irq %d, io mem: 0x%08lx, len: 0x%08lx, pci mem 0x%p\n",
3171                         pdev->irq, resource, len, base);
3172         /* enables bus-mastering for device dev */
3173         pci_set_master(pdev);
3174
3175         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3176                                 driver_name, dev) != 0) {
3177                 dev_err(&dev->pdev->dev,
3178                                 "request interrupt %d failed\n", pdev->irq);
3179                 retval = -EBUSY;
3180                 goto error;
3181         }
3182         dev->got_irq = 1;
3183 #endif
3184
3185         /* set stopped bit */
3186         dev->stopped = 1;
3187
3188         /* capabilities and endpoint number */
3189         dev->lpm = (readl(&dev->cap_regs->hccparams) & HCC_LEN) ? 1 : 0;
3190         dev->dciversion = readw(&dev->cap_regs->dciversion);
3191         dev->devcap = (readl(&dev->cap_regs->dccparams) & DEVCAP) ? 1 : 0;
3192         dev_vdbg(&dev->pdev->dev, "dev->lpm: %d\n", dev->lpm);
3193         dev_vdbg(&dev->pdev->dev, "dev->dciversion: 0x%04x\n",
3194                         dev->dciversion);
3195         dev_vdbg(&dev->pdev->dev, "dccparams: 0x%08x\n",
3196                         readl(&dev->cap_regs->dccparams));
3197         dev_vdbg(&dev->pdev->dev, "dev->devcap: %d\n", dev->devcap);
3198         if (!dev->devcap) {
3199                 dev_err(&dev->pdev->dev, "can't support device mode\n");
3200                 retval = -ENODEV;
3201                 goto error;
3202         }
3203
3204         /* a pair of endpoints (out/in) for each address */
3205         dev->ep_max = DEN(readl(&dev->cap_regs->dccparams)) * 2;
3206         dev_vdbg(&dev->pdev->dev, "dev->ep_max: %d\n", dev->ep_max);
3207
3208         /* allocate endpoints memory */
3209         dev->ep = kzalloc(sizeof(struct langwell_ep) * dev->ep_max,
3210                         GFP_KERNEL);
3211         if (!dev->ep) {
3212                 dev_err(&dev->pdev->dev, "allocate endpoints memory failed\n");
3213                 retval = -ENOMEM;
3214                 goto error;
3215         }
3216
3217         /* allocate device dQH memory */
3218         size = dev->ep_max * sizeof(struct langwell_dqh);
3219         dev_vdbg(&dev->pdev->dev, "orig size = %zd\n", size);
3220         if (size < DQH_ALIGNMENT)
3221                 size = DQH_ALIGNMENT;
3222         else if ((size % DQH_ALIGNMENT) != 0) {
3223                 size += DQH_ALIGNMENT + 1;
3224                 size &= ~(DQH_ALIGNMENT - 1);
3225         }
3226         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3227                                         &dev->ep_dqh_dma, GFP_KERNEL);
3228         if (!dev->ep_dqh) {
3229                 dev_err(&dev->pdev->dev, "allocate dQH memory failed\n");
3230                 retval = -ENOMEM;
3231                 goto error;
3232         }
3233         dev->ep_dqh_size = size;
3234         dev_vdbg(&dev->pdev->dev, "ep_dqh_size = %zd\n", dev->ep_dqh_size);
3235
3236         /* initialize ep0 status request structure */
3237         dev->status_req = kzalloc(sizeof(struct langwell_request), GFP_KERNEL);
3238         if (!dev->status_req) {
3239                 dev_err(&dev->pdev->dev,
3240                                 "allocate status_req memory failed\n");
3241                 retval = -ENOMEM;
3242                 goto error;
3243         }
3244         INIT_LIST_HEAD(&dev->status_req->queue);
3245
3246         /* allocate a small amount of memory to get valid address */
3247         dev->status_req->req.buf = kmalloc(8, GFP_KERNEL);
3248         dev->status_req->req.dma = virt_to_phys(dev->status_req->req.buf);
3249
3250         dev->resume_state = USB_STATE_NOTATTACHED;
3251         dev->usb_state = USB_STATE_POWERED;
3252         dev->ep0_dir = USB_DIR_OUT;
3253
3254         /* remote wakeup reset to 0 when the device is reset */
3255         dev->remote_wakeup = 0;
3256         dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
3257
3258 #ifndef OTG_TRANSCEIVER
3259         /* reset device controller */
3260         langwell_udc_reset(dev);
3261 #endif
3262
3263         /* initialize gadget structure */
3264         dev->gadget.ops = &langwell_ops;        /* usb_gadget_ops */
3265         dev->gadget.ep0 = &dev->ep[0].ep;       /* gadget ep0 */
3266         INIT_LIST_HEAD(&dev->gadget.ep_list);   /* ep_list */
3267         dev->gadget.speed = USB_SPEED_UNKNOWN;  /* speed */
3268         dev->gadget.is_dualspeed = 1;           /* support dual speed */
3269 #ifdef  OTG_TRANSCEIVER
3270         dev->gadget.is_otg = 1;                 /* support otg mode */
3271 #endif
3272
3273         /* the "gadget" abstracts/virtualizes the controller */
3274         dev_set_name(&dev->gadget.dev, "gadget");
3275         dev->gadget.dev.parent = &pdev->dev;
3276         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
3277         dev->gadget.dev.release = gadget_release;
3278         dev->gadget.name = driver_name;         /* gadget name */
3279
3280         /* controller endpoints reinit */
3281         eps_reinit(dev);
3282
3283 #ifndef OTG_TRANSCEIVER
3284         /* reset ep0 dQH and endptctrl */
3285         ep0_reset(dev);
3286 #endif
3287
3288         /* create dTD dma_pool resource */
3289         dev->dtd_pool = dma_pool_create("langwell_dtd",
3290                         &dev->pdev->dev,
3291                         sizeof(struct langwell_dtd),
3292                         DTD_ALIGNMENT,
3293                         DMA_BOUNDARY);
3294
3295         if (!dev->dtd_pool) {
3296                 retval = -ENOMEM;
3297                 goto error;
3298         }
3299
3300         /* done */
3301         dev_info(&dev->pdev->dev, "%s\n", driver_desc);
3302         dev_info(&dev->pdev->dev, "irq %d, pci mem %p\n", pdev->irq, base);
3303         dev_info(&dev->pdev->dev, "Driver version: " DRIVER_VERSION "\n");
3304         dev_info(&dev->pdev->dev, "Support (max) %d endpoints\n", dev->ep_max);
3305         dev_info(&dev->pdev->dev, "Device interface version: 0x%04x\n",
3306                         dev->dciversion);
3307         dev_info(&dev->pdev->dev, "Controller mode: %s\n",
3308                         dev->devcap ? "Device" : "Host");
3309         dev_info(&dev->pdev->dev, "Support USB LPM: %s\n",
3310                         dev->lpm ? "Yes" : "No");
3311
3312         dev_vdbg(&dev->pdev->dev,
3313                         "After langwell_udc_probe(), print all registers:\n");
3314         print_all_registers(dev);
3315
3316         retval = device_register(&dev->gadget.dev);
3317         if (retval)
3318                 goto error;
3319
3320         retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
3321         if (retval)
3322                 goto error;
3323
3324         retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
3325         if (retval)
3326                 goto error;
3327
3328         retval = device_create_file(&pdev->dev, &dev_attr_remote_wakeup);
3329         if (retval)
3330                 goto error_attr1;
3331
3332         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3333         return 0;
3334
3335 error_attr1:
3336         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
3337 error:
3338         if (dev) {
3339                 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3340                 langwell_udc_remove(pdev);
3341         }
3342
3343         return retval;
3344 }
3345
3346
3347 /* device controller suspend */
3348 static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
3349 {
3350         struct langwell_udc     *dev = pci_get_drvdata(pdev);
3351
3352         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3353
3354         usb_del_gadget_udc(&dev->gadget);
3355         /* disable interrupt and set controller to stop state */
3356         langwell_udc_stop(dev);
3357
3358         /* disable IRQ handler */
3359         if (dev->got_irq)
3360                 free_irq(pdev->irq, dev);
3361         dev->got_irq = 0;
3362
3363         /* save PCI state */
3364         pci_save_state(pdev);
3365
3366         spin_lock_irq(&dev->lock);
3367         /* stop all usb activities */
3368         stop_activity(dev);
3369         spin_unlock_irq(&dev->lock);
3370
3371         /* free dTD dma_pool and dQH */
3372         if (dev->dtd_pool)
3373                 dma_pool_destroy(dev->dtd_pool);
3374
3375         if (dev->ep_dqh)
3376                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
3377                         dev->ep_dqh, dev->ep_dqh_dma);
3378
3379         /* release SRAM caching */
3380         if (dev->has_sram && dev->got_sram)
3381                 sram_deinit(dev);
3382
3383         /* set device power state */
3384         pci_set_power_state(pdev, PCI_D3hot);
3385
3386         /* enter PHY low power suspend */
3387         if (dev->pdev->device != 0x0829)
3388                 langwell_phy_low_power(dev, 1);
3389
3390         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3391         return 0;
3392 }
3393
3394
3395 /* device controller resume */
3396 static int langwell_udc_resume(struct pci_dev *pdev)
3397 {
3398         struct langwell_udc     *dev = pci_get_drvdata(pdev);
3399         size_t                  size;
3400
3401         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3402
3403         /* exit PHY low power suspend */
3404         if (dev->pdev->device != 0x0829)
3405                 langwell_phy_low_power(dev, 0);
3406
3407         /* set device D0 power state */
3408         pci_set_power_state(pdev, PCI_D0);
3409
3410         /* enable SRAM caching if detected */
3411         if (dev->has_sram && !dev->got_sram)
3412                 sram_init(dev);
3413
3414         /* allocate device dQH memory */
3415         size = dev->ep_max * sizeof(struct langwell_dqh);
3416         dev_vdbg(&dev->pdev->dev, "orig size = %zd\n", size);
3417         if (size < DQH_ALIGNMENT)
3418                 size = DQH_ALIGNMENT;
3419         else if ((size % DQH_ALIGNMENT) != 0) {
3420                 size += DQH_ALIGNMENT + 1;
3421                 size &= ~(DQH_ALIGNMENT - 1);
3422         }
3423         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3424                                         &dev->ep_dqh_dma, GFP_KERNEL);
3425         if (!dev->ep_dqh) {
3426                 dev_err(&dev->pdev->dev, "allocate dQH memory failed\n");
3427                 return -ENOMEM;
3428         }
3429         dev->ep_dqh_size = size;
3430         dev_vdbg(&dev->pdev->dev, "ep_dqh_size = %zd\n", dev->ep_dqh_size);
3431
3432         /* create dTD dma_pool resource */
3433         dev->dtd_pool = dma_pool_create("langwell_dtd",
3434                         &dev->pdev->dev,
3435                         sizeof(struct langwell_dtd),
3436                         DTD_ALIGNMENT,
3437                         DMA_BOUNDARY);
3438
3439         if (!dev->dtd_pool)
3440                 return -ENOMEM;
3441
3442         /* restore PCI state */
3443         pci_restore_state(pdev);
3444
3445         /* enable IRQ handler */
3446         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3447                                 driver_name, dev) != 0) {
3448                 dev_err(&dev->pdev->dev, "request interrupt %d failed\n",
3449                                 pdev->irq);
3450                 return -EBUSY;
3451         }
3452         dev->got_irq = 1;
3453
3454         /* reset and start controller to run state */
3455         if (dev->stopped) {
3456                 /* reset device controller */
3457                 langwell_udc_reset(dev);
3458
3459                 /* reset ep0 dQH and endptctrl */
3460                 ep0_reset(dev);
3461
3462                 /* start device if gadget is loaded */
3463                 if (dev->driver)
3464                         langwell_udc_start(dev);
3465         }
3466
3467         /* reset USB status */
3468         dev->usb_state = USB_STATE_ATTACHED;
3469         dev->ep0_state = WAIT_FOR_SETUP;
3470         dev->ep0_dir = USB_DIR_OUT;
3471
3472         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3473         return 0;
3474 }
3475
3476
3477 /* pci driver shutdown */
3478 static void langwell_udc_shutdown(struct pci_dev *pdev)
3479 {
3480         struct langwell_udc     *dev = pci_get_drvdata(pdev);
3481         u32                     usbmode;
3482
3483         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3484
3485         /* reset controller mode to IDLE */
3486         usbmode = readl(&dev->op_regs->usbmode);
3487         dev_dbg(&dev->pdev->dev, "usbmode = 0x%08x\n", usbmode);
3488         usbmode &= (~3 | MODE_IDLE);
3489         writel(usbmode, &dev->op_regs->usbmode);
3490
3491         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3492 }
3493
3494 /*-------------------------------------------------------------------------*/
3495
3496 static const struct pci_device_id pci_ids[] = { {
3497         .class =        ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3498         .class_mask =   ~0,
3499         .vendor =       0x8086,
3500         .device =       0x0811,
3501         .subvendor =    PCI_ANY_ID,
3502         .subdevice =    PCI_ANY_ID,
3503 }, { /* end: all zeroes */ }
3504 };
3505
3506 MODULE_DEVICE_TABLE(pci, pci_ids);
3507
3508
3509 static struct pci_driver langwell_pci_driver = {
3510         .name =         (char *) driver_name,
3511         .id_table =     pci_ids,
3512
3513         .probe =        langwell_udc_probe,
3514         .remove =       langwell_udc_remove,
3515
3516         /* device controller suspend/resume */
3517         .suspend =      langwell_udc_suspend,
3518         .resume =       langwell_udc_resume,
3519
3520         .shutdown =     langwell_udc_shutdown,
3521 };
3522
3523
3524 static int __init init(void)
3525 {
3526 #ifdef  OTG_TRANSCEIVER
3527         return langwell_register_peripheral(&langwell_pci_driver);
3528 #else
3529         return pci_register_driver(&langwell_pci_driver);
3530 #endif
3531 }
3532 module_init(init);
3533
3534
3535 static void __exit cleanup(void)
3536 {
3537 #ifdef  OTG_TRANSCEIVER
3538         return langwell_unregister_peripheral(&langwell_pci_driver);
3539 #else
3540         pci_unregister_driver(&langwell_pci_driver);
3541 #endif
3542 }
3543 module_exit(cleanup);
3544
3545
3546 MODULE_DESCRIPTION(DRIVER_DESC);
3547 MODULE_AUTHOR("Xiaochen Shen <xiaochen.shen@intel.com>");
3548 MODULE_VERSION(DRIVER_VERSION);
3549 MODULE_LICENSE("GPL");
3550