drivers/usb/gadget/fusb300_udc.c

   1 /*
   2  * Fusb300 UDC (USB gadget)
   3  *
   4  * Copyright (C) 2010 Faraday Technology Corp.
   5  *
   6  * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  20  *
  21  */
  22 #include <linux/dma-mapping.h>
  23 #include <linux/err.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/io.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/usb/ch9.h>
  28 #include <linux/usb/gadget.h>
  29
  30 #include "fusb300_udc.h"
  31
  32 MODULE_DESCRIPTION("FUSB300  USB gadget driver");
  33 MODULE_LICENSE("GPL");
  34 MODULE_AUTHOR("Yuan Hsin Chen <yhchen@faraday-tech.com>");
  35 MODULE_ALIAS("platform:fusb300_udc");
  36
  37 #define DRIVER_VERSION  "20 October 2010"
  38
  39 static const char udc_name[] = "fusb300_udc";
  40 static const char * const fusb300_ep_name[] = {
  41         "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", "ep8", "ep9",
  42         "ep10", "ep11", "ep12", "ep13", "ep14", "ep15"
  43 };
  44
  45 static void done(struct fusb300_ep *ep, struct fusb300_request *req,
  46                  int status);
  47
  48 static void fusb300_enable_bit(struct fusb300 *fusb300, u32 offset,
  49                                u32 value)
  50 {
  51         u32 reg = ioread32(fusb300->reg + offset);
  52
  53         reg |= value;
  54         iowrite32(reg, fusb300->reg + offset);
  55 }
  56
  57 static void fusb300_disable_bit(struct fusb300 *fusb300, u32 offset,
  58                                 u32 value)
  59 {
  60         u32 reg = ioread32(fusb300->reg + offset);
  61
  62         reg &= ~value;
  63         iowrite32(reg, fusb300->reg + offset);
  64 }
  65
  66
  67 static void fusb300_ep_setting(struct fusb300_ep *ep,
  68                                struct fusb300_ep_info info)
  69 {
  70         ep->epnum = info.epnum;
  71         ep->type = info.type;
  72 }
  73
  74 static int fusb300_ep_release(struct fusb300_ep *ep)
  75 {
  76         if (!ep->epnum)
  77                 return 0;
  78         ep->epnum = 0;
  79         ep->stall = 0;
  80         ep->wedged = 0;
  81         return 0;
  82 }
  83
  84 static void fusb300_set_fifo_entry(struct fusb300 *fusb300,
  85                                    u32 ep)
  86 {
  87         u32 val = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
  88
  89         val &= ~FUSB300_EPSET1_FIFOENTRY_MSK;
  90         val |= FUSB300_EPSET1_FIFOENTRY(FUSB300_FIFO_ENTRY_NUM);
  91         iowrite32(val, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
  92 }
  93
  94 static void fusb300_set_start_entry(struct fusb300 *fusb300,
  95                                     u8 ep)
  96 {
  97         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
  98         u32 start_entry = fusb300->fifo_entry_num * FUSB300_FIFO_ENTRY_NUM;
  99
 100         reg &= ~FUSB300_EPSET1_START_ENTRY_MSK  ;
 101         reg |= FUSB300_EPSET1_START_ENTRY(start_entry);
 102         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
 103         if (fusb300->fifo_entry_num == FUSB300_MAX_FIFO_ENTRY) {
 104                 fusb300->fifo_entry_num = 0;
 105                 fusb300->addrofs = 0;
 106                 pr_err("fifo entry is over the maximum number!\n");
 107         } else
 108                 fusb300->fifo_entry_num++;
 109 }
 110
 111 /* set fusb300_set_start_entry first before fusb300_set_epaddrofs */
 112 static void fusb300_set_epaddrofs(struct fusb300 *fusb300,
 113                                   struct fusb300_ep_info info)
 114 {
 115         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
 116
 117         reg &= ~FUSB300_EPSET2_ADDROFS_MSK;
 118         reg |= FUSB300_EPSET2_ADDROFS(fusb300->addrofs);
 119         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
 120         fusb300->addrofs += (info.maxpacket + 7) / 8 * FUSB300_FIFO_ENTRY_NUM;
 121 }
 122
 123 static void ep_fifo_setting(struct fusb300 *fusb300,
 124                             struct fusb300_ep_info info)
 125 {
 126         fusb300_set_fifo_entry(fusb300, info.epnum);
 127         fusb300_set_start_entry(fusb300, info.epnum);
 128         fusb300_set_epaddrofs(fusb300, info);
 129 }
 130
 131 static void fusb300_set_eptype(struct fusb300 *fusb300,
 132                                struct fusb300_ep_info info)
 133 {
 134         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 135
 136         reg &= ~FUSB300_EPSET1_TYPE_MSK;
 137         reg |= FUSB300_EPSET1_TYPE(info.type);
 138         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 139 }
 140
 141 static void fusb300_set_epdir(struct fusb300 *fusb300,
 142                               struct fusb300_ep_info info)
 143 {
 144         u32 reg;
 145
 146         if (!info.dir_in)
 147                 return;
 148         reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 149         reg &= ~FUSB300_EPSET1_DIR_MSK;
 150         reg |= FUSB300_EPSET1_DIRIN;
 151         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 152 }
 153
 154 static void fusb300_set_ep_active(struct fusb300 *fusb300,
 155                           u8 ep)
 156 {
 157         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
 158
 159         reg |= FUSB300_EPSET1_ACTEN;
 160         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
 161 }
 162
 163 static void fusb300_set_epmps(struct fusb300 *fusb300,
 164                               struct fusb300_ep_info info)
 165 {
 166         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
 167
 168         reg &= ~FUSB300_EPSET2_MPS_MSK;
 169         reg |= FUSB300_EPSET2_MPS(info.maxpacket);
 170         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
 171 }
 172
 173 static void fusb300_set_interval(struct fusb300 *fusb300,
 174                                  struct fusb300_ep_info info)
 175 {
 176         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 177
 178         reg &= ~FUSB300_EPSET1_INTERVAL(0x7);
 179         reg |= FUSB300_EPSET1_INTERVAL(info.interval);
 180         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 181 }
 182
 183 static void fusb300_set_bwnum(struct fusb300 *fusb300,
 184                               struct fusb300_ep_info info)
 185 {
 186         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 187
 188         reg &= ~FUSB300_EPSET1_BWNUM(0x3);
 189         reg |= FUSB300_EPSET1_BWNUM(info.bw_num);
 190         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
 191 }
 192
 193 static void set_ep_reg(struct fusb300 *fusb300,
 194                       struct fusb300_ep_info info)
 195 {
 196         fusb300_set_eptype(fusb300, info);
 197         fusb300_set_epdir(fusb300, info);
 198         fusb300_set_epmps(fusb300, info);
 199
 200         if (info.interval)
 201                 fusb300_set_interval(fusb300, info);
 202
 203         if (info.bw_num)
 204                 fusb300_set_bwnum(fusb300, info);
 205
 206         fusb300_set_ep_active(fusb300, info.epnum);
 207 }
 208
 209 static int config_ep(struct fusb300_ep *ep,
 210                      const struct usb_endpoint_descriptor *desc)
 211 {
 212         struct fusb300 *fusb300 = ep->fusb300;
 213         struct fusb300_ep_info info;
 214
 215         ep->desc = desc;
 216
 217         info.interval = 0;
 218         info.addrofs = 0;
 219         info.bw_num = 0;
 220
 221         info.type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
 222         info.dir_in = (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ? 1 : 0;
 223         info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
 224         info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 225
 226         if ((info.type == USB_ENDPOINT_XFER_INT) ||
 227            (info.type == USB_ENDPOINT_XFER_ISOC)) {
 228                 info.interval = desc->bInterval;
 229                 if (info.type == USB_ENDPOINT_XFER_ISOC)
 230                         info.bw_num = ((desc->wMaxPacketSize & 0x1800) >> 11);
 231         }
 232
 233         ep_fifo_setting(fusb300, info);
 234
 235         set_ep_reg(fusb300, info);
 236
 237         fusb300_ep_setting(ep, info);
 238
 239         fusb300->ep[info.epnum] = ep;
 240
 241         return 0;
 242 }
 243
 244 static int fusb300_enable(struct usb_ep *_ep,
 245                           const struct usb_endpoint_descriptor *desc)
 246 {
 247         struct fusb300_ep *ep;
 248
 249         ep = container_of(_ep, struct fusb300_ep, ep);
 250
 251         if (ep->fusb300->reenum) {
 252                 ep->fusb300->fifo_entry_num = 0;
 253                 ep->fusb300->addrofs = 0;
 254                 ep->fusb300->reenum = 0;
 255         }
 256
 257         return config_ep(ep, desc);
 258 }
 259
 260 static int fusb300_disable(struct usb_ep *_ep)
 261 {
 262         struct fusb300_ep *ep;
 263         struct fusb300_request *req;
 264         unsigned long flags;
 265
 266         ep = container_of(_ep, struct fusb300_ep, ep);
 267
 268         BUG_ON(!ep);
 269
 270         while (!list_empty(&ep->queue)) {
 271                 req = list_entry(ep->queue.next, struct fusb300_request, queue);
 272                 spin_lock_irqsave(&ep->fusb300->lock, flags);
 273                 done(ep, req, -ECONNRESET);
 274                 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
 275         }
 276
 277         return fusb300_ep_release(ep);
 278 }
 279
 280 static struct usb_request *fusb300_alloc_request(struct usb_ep *_ep,
 281                                                 gfp_t gfp_flags)
 282 {
 283         struct fusb300_request *req;
 284
 285         req = kzalloc(sizeof(struct fusb300_request), gfp_flags);
 286         if (!req)
 287                 return NULL;
 288         INIT_LIST_HEAD(&req->queue);
 289
 290         return &req->req;
 291 }
 292
 293 static void fusb300_free_request(struct usb_ep *_ep, struct usb_request *_req)
 294 {
 295         struct fusb300_request *req;
 296
 297         req = container_of(_req, struct fusb300_request, req);
 298         kfree(req);
 299 }
 300
 301 static int enable_fifo_int(struct fusb300_ep *ep)
 302 {
 303         struct fusb300 *fusb300 = ep->fusb300;
 304
 305         if (ep->epnum) {
 306                 fusb300_enable_bit(fusb300, FUSB300_OFFSET_IGER0,
 307                         FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
 308         } else {
 309                 pr_err("can't enable_fifo_int ep0\n");
 310                 return -EINVAL;
 311         }
 312
 313         return 0;
 314 }
 315
 316 static int disable_fifo_int(struct fusb300_ep *ep)
 317 {
 318         struct fusb300 *fusb300 = ep->fusb300;
 319
 320         if (ep->epnum) {
 321                 fusb300_disable_bit(fusb300, FUSB300_OFFSET_IGER0,
 322                         FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
 323         } else {
 324                 pr_err("can't disable_fifo_int ep0\n");
 325                 return -EINVAL;
 326         }
 327
 328         return 0;
 329 }
 330
 331 static void fusb300_set_cxlen(struct fusb300 *fusb300, u32 length)
 332 {
 333         u32 reg;
 334
 335         reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
 336         reg &= ~FUSB300_CSR_LEN_MSK;
 337         reg |= FUSB300_CSR_LEN(length);
 338         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_CSR);
 339 }
 340
 341 /* write data to cx fifo */
 342 static void fusb300_wrcxf(struct fusb300_ep *ep,
 343                    struct fusb300_request *req)
 344 {
 345         int i = 0;
 346         u8 *tmp;
 347         u32 data;
 348         struct fusb300 *fusb300 = ep->fusb300;
 349         u32 length = req->req.length - req->req.actual;
 350
 351         tmp = req->req.buf + req->req.actual;
 352
 353         if (length > SS_CTL_MAX_PACKET_SIZE) {
 354                 fusb300_set_cxlen(fusb300, SS_CTL_MAX_PACKET_SIZE);
 355                 for (i = (SS_CTL_MAX_PACKET_SIZE >> 2); i > 0; i--) {
 356                         data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
 357                                 *(tmp + 3) << 24;
 358                         iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
 359                         tmp += 4;
 360                 }
 361                 req->req.actual += SS_CTL_MAX_PACKET_SIZE;
 362         } else { /* length is less than max packet size */
 363                 fusb300_set_cxlen(fusb300, length);
 364                 for (i = length >> 2; i > 0; i--) {
 365                         data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
 366                                 *(tmp + 3) << 24;
 367                         printk(KERN_DEBUG "    0x%x\n", data);
 368                         iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
 369                         tmp = tmp + 4;
 370                 }
 371                 switch (length % 4) {
 372                 case 1:
 373                         data = *tmp;
 374                         printk(KERN_DEBUG "    0x%x\n", data);
 375                         iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
 376                         break;
 377                 case 2:
 378                         data = *tmp | *(tmp + 1) << 8;
 379                         printk(KERN_DEBUG "    0x%x\n", data);
 380                         iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
 381                         break;
 382                 case 3:
 383                         data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
 384                         printk(KERN_DEBUG "    0x%x\n", data);
 385                         iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
 386                         break;
 387                 default:
 388                         break;
 389                 }
 390                 req->req.actual += length;
 391         }
 392 }
 393
 394 static void fusb300_set_epnstall(struct fusb300 *fusb300, u8 ep)
 395 {
 396         fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
 397                 FUSB300_EPSET0_STL);
 398 }
 399
 400 static void fusb300_clear_epnstall(struct fusb300 *fusb300, u8 ep)
 401 {
 402         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
 403
 404         if (reg & FUSB300_EPSET0_STL) {
 405                 printk(KERN_DEBUG "EP%d stall... Clear!!\n", ep);
 406                 reg &= ~FUSB300_EPSET0_STL;
 407                 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
 408         }
 409 }
 410
 411 static void ep0_queue(struct fusb300_ep *ep, struct fusb300_request *req)
 412 {
 413         if (ep->fusb300->ep0_dir) { /* if IN */
 414                 if (req->req.length) {
 415                         fusb300_wrcxf(ep, req);
 416                 } else
 417                         printk(KERN_DEBUG "%s : req->req.length = 0x%x\n",
 418                                 __func__, req->req.length);
 419                 if ((req->req.length == req->req.actual) ||
 420                     (req->req.actual < ep->ep.maxpacket))
 421                         done(ep, req, 0);
 422         } else { /* OUT */
 423                 if (!req->req.length)
 424                         done(ep, req, 0);
 425                 else
 426                         fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER1,
 427                                 FUSB300_IGER1_CX_OUT_INT);
 428         }
 429 }
 430
 431 static int fusb300_queue(struct usb_ep *_ep, struct usb_request *_req,
 432                          gfp_t gfp_flags)
 433 {
 434         struct fusb300_ep *ep;
 435         struct fusb300_request *req;
 436         unsigned long flags;
 437         int request  = 0;
 438
 439         ep = container_of(_ep, struct fusb300_ep, ep);
 440         req = container_of(_req, struct fusb300_request, req);
 441
 442         if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
 443                 return -ESHUTDOWN;
 444
 445         spin_lock_irqsave(&ep->fusb300->lock, flags);
 446
 447         if (list_empty(&ep->queue))
 448                 request = 1;
 449
 450         list_add_tail(&req->queue, &ep->queue);
 451
 452         req->req.actual = 0;
 453         req->req.status = -EINPROGRESS;
 454
 455         if (ep->desc == NULL) /* ep0 */
 456                 ep0_queue(ep, req);
 457         else if (request && !ep->stall)
 458                 enable_fifo_int(ep);
 459
 460         spin_unlock_irqrestore(&ep->fusb300->lock, flags);
 461
 462         return 0;
 463 }
 464
 465 static int fusb300_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 466 {
 467         struct fusb300_ep *ep;
 468         struct fusb300_request *req;
 469         unsigned long flags;
 470
 471         ep = container_of(_ep, struct fusb300_ep, ep);
 472         req = container_of(_req, struct fusb300_request, req);
 473
 474         spin_lock_irqsave(&ep->fusb300->lock, flags);
 475         if (!list_empty(&ep->queue))
 476                 done(ep, req, -ECONNRESET);
 477         spin_unlock_irqrestore(&ep->fusb300->lock, flags);
 478
 479         return 0;
 480 }
 481
 482 static int fusb300_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
 483 {
 484         struct fusb300_ep *ep;
 485         struct fusb300 *fusb300;
 486         unsigned long flags;
 487         int ret = 0;
 488
 489         ep = container_of(_ep, struct fusb300_ep, ep);
 490
 491         fusb300 = ep->fusb300;
 492
 493         spin_lock_irqsave(&ep->fusb300->lock, flags);
 494
 495         if (!list_empty(&ep->queue)) {
 496                 ret = -EAGAIN;
 497                 goto out;
 498         }
 499
 500         if (value) {
 501                 fusb300_set_epnstall(fusb300, ep->epnum);
 502                 ep->stall = 1;
 503                 if (wedge)
 504                         ep->wedged = 1;
 505         } else {
 506                 fusb300_clear_epnstall(fusb300, ep->epnum);
 507                 ep->stall = 0;
 508                 ep->wedged = 0;
 509         }
 510
 511 out:
 512         spin_unlock_irqrestore(&ep->fusb300->lock, flags);
 513         return ret;
 514 }
 515
 516 static int fusb300_set_halt(struct usb_ep *_ep, int value)
 517 {
 518         return fusb300_set_halt_and_wedge(_ep, value, 0);
 519 }
 520
 521 static int fusb300_set_wedge(struct usb_ep *_ep)
 522 {
 523         return fusb300_set_halt_and_wedge(_ep, 1, 1);
 524 }
 525
 526 static void fusb300_fifo_flush(struct usb_ep *_ep)
 527 {
 528 }
 529
 530 static struct usb_ep_ops fusb300_ep_ops = {
 531         .enable         = fusb300_enable,
 532         .disable        = fusb300_disable,
 533
 534         .alloc_request  = fusb300_alloc_request,
 535         .free_request   = fusb300_free_request,
 536
 537         .queue          = fusb300_queue,
 538         .dequeue        = fusb300_dequeue,
 539
 540         .set_halt       = fusb300_set_halt,
 541         .fifo_flush     = fusb300_fifo_flush,
 542         .set_wedge      = fusb300_set_wedge,
 543 };
 544
 545 /*****************************************************************************/
 546 static void fusb300_clear_int(struct fusb300 *fusb300, u32 offset,
 547                        u32 value)
 548 {
 549         iowrite32(value, fusb300->reg + offset);
 550 }
 551
 552 static void fusb300_reset(void)
 553 {
 554 }
 555
 556 static void fusb300_set_cxstall(struct fusb300 *fusb300)
 557 {
 558         fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
 559                            FUSB300_CSR_STL);
 560 }
 561
 562 static void fusb300_set_cxdone(struct fusb300 *fusb300)
 563 {
 564         fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
 565                            FUSB300_CSR_DONE);
 566 }
 567
 568 /* read data from cx fifo */
 569 void fusb300_rdcxf(struct fusb300 *fusb300,
 570                    u8 *buffer, u32 length)
 571 {
 572         int i = 0;
 573         u8 *tmp;
 574         u32 data;
 575
 576         tmp = buffer;
 577
 578         for (i = (length >> 2); i > 0; i--) {
 579                 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
 580                 printk(KERN_DEBUG "    0x%x\n", data);
 581                 *tmp = data & 0xFF;
 582                 *(tmp + 1) = (data >> 8) & 0xFF;
 583                 *(tmp + 2) = (data >> 16) & 0xFF;
 584                 *(tmp + 3) = (data >> 24) & 0xFF;
 585                 tmp = tmp + 4;
 586         }
 587
 588         switch (length % 4) {
 589         case 1:
 590                 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
 591                 printk(KERN_DEBUG "    0x%x\n", data);
 592                 *tmp = data & 0xFF;
 593                 break;
 594         case 2:
 595                 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
 596                 printk(KERN_DEBUG "    0x%x\n", data);
 597                 *tmp = data & 0xFF;
 598                 *(tmp + 1) = (data >> 8) & 0xFF;
 599                 break;
 600         case 3:
 601                 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
 602                 printk(KERN_DEBUG "    0x%x\n", data);
 603                 *tmp = data & 0xFF;
 604                 *(tmp + 1) = (data >> 8) & 0xFF;
 605                 *(tmp + 2) = (data >> 16) & 0xFF;
 606                 break;
 607         default:
 608                 break;
 609         }
 610 }
 611
 612 #if 0
 613 static void fusb300_dbg_fifo(struct fusb300_ep *ep,
 614                                 u8 entry, u16 length)
 615 {
 616         u32 reg;
 617         u32 i = 0;
 618         u32 j = 0;
 619
 620         reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_GTM);
 621         reg &= ~(FUSB300_GTM_TST_EP_ENTRY(0xF) |
 622                 FUSB300_GTM_TST_EP_NUM(0xF) | FUSB300_GTM_TST_FIFO_DEG);
 623         reg |= (FUSB300_GTM_TST_EP_ENTRY(entry) |
 624                 FUSB300_GTM_TST_EP_NUM(ep->epnum) | FUSB300_GTM_TST_FIFO_DEG);
 625         iowrite32(reg, ep->fusb300->reg + FUSB300_OFFSET_GTM);
 626
 627         for (i = 0; i < (length >> 2); i++) {
 628                 if (i * 4 == 1024)
 629                         break;
 630                 reg = ioread32(ep->fusb300->reg +
 631                         FUSB300_OFFSET_BUFDBG_START + i * 4);
 632                 printk(KERN_DEBUG"  0x%-8x", reg);
 633                 j++;
 634                 if ((j % 4)  == 0)
 635                         printk(KERN_DEBUG "\n");
 636         }
 637
 638         if (length % 4) {
 639                 reg = ioread32(ep->fusb300->reg +
 640                         FUSB300_OFFSET_BUFDBG_START + i * 4);
 641                 printk(KERN_DEBUG "  0x%x\n", reg);
 642         }
 643
 644         if ((j % 4)  != 0)
 645                 printk(KERN_DEBUG "\n");
 646
 647         fusb300_disable_bit(ep->fusb300, FUSB300_OFFSET_GTM,
 648                 FUSB300_GTM_TST_FIFO_DEG);
 649 }
 650
 651 static void fusb300_cmp_dbg_fifo(struct fusb300_ep *ep,
 652                                 u8 entry, u16 length, u8 *golden)
 653 {
 654         u32 reg;
 655         u32 i = 0;
 656         u32 golden_value;
 657         u8 *tmp;
 658
 659         tmp = golden;
 660
 661         printk(KERN_DEBUG "fusb300_cmp_dbg_fifo (entry %d) : start\n", entry);
 662
 663         reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_GTM);
 664         reg &= ~(FUSB300_GTM_TST_EP_ENTRY(0xF) |
 665                 FUSB300_GTM_TST_EP_NUM(0xF) | FUSB300_GTM_TST_FIFO_DEG);
 666         reg |= (FUSB300_GTM_TST_EP_ENTRY(entry) |
 667                 FUSB300_GTM_TST_EP_NUM(ep->epnum) | FUSB300_GTM_TST_FIFO_DEG);
 668         iowrite32(reg, ep->fusb300->reg + FUSB300_OFFSET_GTM);
 669
 670         for (i = 0; i < (length >> 2); i++) {
 671                 if (i * 4 == 1024)
 672                         break;
 673                 golden_value = *tmp | *(tmp + 1) << 8 |
 674                                 *(tmp + 2) << 16 | *(tmp + 3) << 24;
 675
 676                 reg = ioread32(ep->fusb300->reg +
 677                         FUSB300_OFFSET_BUFDBG_START + i*4);
 678
 679                 if (reg != golden_value) {
 680                         printk(KERN_DEBUG "0x%x  :  ", (u32)(ep->fusb300->reg +
 681                                 FUSB300_OFFSET_BUFDBG_START + i*4));
 682                         printk(KERN_DEBUG "    golden = 0x%x, reg = 0x%x\n",
 683                                 golden_value, reg);
 684                 }
 685                 tmp += 4;
 686         }
 687
 688         switch (length % 4) {
 689         case 1:
 690                 golden_value = *tmp;
 691         case 2:
 692                 golden_value = *tmp | *(tmp + 1) << 8;
 693         case 3:
 694                 golden_value = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
 695         default:
 696                 break;
 697
 698         reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_BUFDBG_START + i*4);
 699         if (reg != golden_value) {
 700                 printk(KERN_DEBUG "0x%x:", (u32)(ep->fusb300->reg +
 701                         FUSB300_OFFSET_BUFDBG_START + i*4));
 702                 printk(KERN_DEBUG "  golden = 0x%x, reg = 0x%x\n",
 703                         golden_value, reg);
 704         }
 705         }
 706
 707         printk(KERN_DEBUG "fusb300_cmp_dbg_fifo : end\n");
 708         fusb300_disable_bit(ep->fusb300, FUSB300_OFFSET_GTM,
 709                 FUSB300_GTM_TST_FIFO_DEG);
 710 }
 711 #endif
 712
 713 static void fusb300_rdfifo(struct fusb300_ep *ep,
 714                           struct fusb300_request *req,
 715                           u32 length)
 716 {
 717         int i = 0;
 718         u8 *tmp;
 719         u32 data, reg;
 720         struct fusb300 *fusb300 = ep->fusb300;
 721
 722         tmp = req->req.buf + req->req.actual;
 723         req->req.actual += length;
 724
 725         if (req->req.actual > req->req.length)
 726                 printk(KERN_DEBUG "req->req.actual > req->req.length\n");
 727
 728         for (i = (length >> 2); i > 0; i--) {
 729                 data = ioread32(fusb300->reg +
 730                         FUSB300_OFFSET_EPPORT(ep->epnum));
 731                 *tmp = data & 0xFF;
 732                 *(tmp + 1) = (data >> 8) & 0xFF;
 733                 *(tmp + 2) = (data >> 16) & 0xFF;
 734                 *(tmp + 3) = (data >> 24) & 0xFF;
 735                 tmp = tmp + 4;
 736         }
 737
 738         switch (length % 4) {
 739         case 1:
 740                 data = ioread32(fusb300->reg +
 741                         FUSB300_OFFSET_EPPORT(ep->epnum));
 742                 *tmp = data & 0xFF;
 743                 break;
 744         case 2:
 745                 data = ioread32(fusb300->reg +
 746                         FUSB300_OFFSET_EPPORT(ep->epnum));
 747                 *tmp = data & 0xFF;
 748                 *(tmp + 1) = (data >> 8) & 0xFF;
 749                 break;
 750         case 3:
 751                 data = ioread32(fusb300->reg +
 752                         FUSB300_OFFSET_EPPORT(ep->epnum));
 753                 *tmp = data & 0xFF;
 754                 *(tmp + 1) = (data >> 8) & 0xFF;
 755                 *(tmp + 2) = (data >> 16) & 0xFF;
 756                 break;
 757         default:
 758                 break;
 759         }
 760
 761         do {
 762                 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
 763                 reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
 764                 if (i)
 765                         printk(KERN_INFO "sync fifo is not empty!\n");
 766                 i++;
 767         } while (!reg);
 768 }
 769
 770 /* write data to fifo */
 771 static void fusb300_wrfifo(struct fusb300_ep *ep,
 772                            struct fusb300_request *req)
 773 {
 774         int i = 0;
 775         u8 *tmp;
 776         u32 data, reg;
 777         struct fusb300 *fusb300 = ep->fusb300;
 778
 779         tmp = req->req.buf;
 780         req->req.actual = req->req.length;
 781
 782         for (i = (req->req.length >> 2); i > 0; i--) {
 783                 data = *tmp | *(tmp + 1) << 8 |
 784                         *(tmp + 2) << 16 | *(tmp + 3) << 24;
 785
 786                 iowrite32(data, fusb300->reg +
 787                         FUSB300_OFFSET_EPPORT(ep->epnum));
 788                 tmp += 4;
 789         }
 790
 791         switch (req->req.length % 4) {
 792         case 1:
 793                 data = *tmp;
 794                 iowrite32(data, fusb300->reg +
 795                         FUSB300_OFFSET_EPPORT(ep->epnum));
 796                 break;
 797         case 2:
 798                 data = *tmp | *(tmp + 1) << 8;
 799                 iowrite32(data, fusb300->reg +
 800                         FUSB300_OFFSET_EPPORT(ep->epnum));
 801                 break;
 802         case 3:
 803                 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
 804                 iowrite32(data, fusb300->reg +
 805                         FUSB300_OFFSET_EPPORT(ep->epnum));
 806                 break;
 807         default:
 808                 break;
 809         }
 810
 811         do {
 812                 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
 813                 reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
 814                 if (i)
 815                         printk(KERN_INFO"sync fifo is not empty!\n");
 816                 i++;
 817         } while (!reg);
 818 }
 819
 820 static u8 fusb300_get_epnstall(struct fusb300 *fusb300, u8 ep)
 821 {
 822         u8 value;
 823         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
 824
 825         value = reg & FUSB300_EPSET0_STL;
 826
 827         return value;
 828 }
 829
 830 static u8 fusb300_get_cxstall(struct fusb300 *fusb300)
 831 {
 832         u8 value;
 833         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
 834
 835         value = (reg & FUSB300_CSR_STL) >> 1;
 836
 837         return value;
 838 }
 839
 840 static void request_error(struct fusb300 *fusb300)
 841 {
 842         fusb300_set_cxstall(fusb300);
 843         printk(KERN_DEBUG "request error!!\n");
 844 }
 845
 846 static void get_status(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
 847 __releases(fusb300->lock)
 848 __acquires(fusb300->lock)
 849 {
 850         u8 ep;
 851         u16 status = 0;
 852         u16 w_index = ctrl->wIndex;
 853
 854         switch (ctrl->bRequestType & USB_RECIP_MASK) {
 855         case USB_RECIP_DEVICE:
 856                 status = 1 << USB_DEVICE_SELF_POWERED;
 857                 break;
 858         case USB_RECIP_INTERFACE:
 859                 status = 0;
 860                 break;
 861         case USB_RECIP_ENDPOINT:
 862                 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
 863                 if (ep) {
 864                         if (fusb300_get_epnstall(fusb300, ep))
 865                                 status = 1 << USB_ENDPOINT_HALT;
 866                 } else {
 867                         if (fusb300_get_cxstall(fusb300))
 868                                 status = 0;
 869                 }
 870                 break;
 871
 872         default:
 873                 request_error(fusb300);
 874                 return;         /* exit */
 875         }
 876
 877         fusb300->ep0_data = cpu_to_le16(status);
 878         fusb300->ep0_req->buf = &fusb300->ep0_data;
 879         fusb300->ep0_req->length = 2;
 880
 881         spin_unlock(&fusb300->lock);
 882         fusb300_queue(fusb300->gadget.ep0, fusb300->ep0_req, GFP_KERNEL);
 883         spin_lock(&fusb300->lock);
 884 }
 885
 886 static void set_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
 887 {
 888         u8 ep;
 889
 890         switch (ctrl->bRequestType & USB_RECIP_MASK) {
 891         case USB_RECIP_DEVICE:
 892                 fusb300_set_cxdone(fusb300);
 893                 break;
 894         case USB_RECIP_INTERFACE:
 895                 fusb300_set_cxdone(fusb300);
 896                 break;
 897         case USB_RECIP_ENDPOINT: {
 898                 u16 w_index = le16_to_cpu(ctrl->wIndex);
 899
 900                 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
 901                 if (ep)
 902                         fusb300_set_epnstall(fusb300, ep);
 903                 else
 904                         fusb300_set_cxstall(fusb300);
 905                 fusb300_set_cxdone(fusb300);
 906                 }
 907                 break;
 908         default:
 909                 request_error(fusb300);
 910                 break;
 911         }
 912 }
 913
 914 static void fusb300_clear_seqnum(struct fusb300 *fusb300, u8 ep)
 915 {
 916         fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
 917                             FUSB300_EPSET0_CLRSEQNUM);
 918 }
 919
 920 static void clear_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
 921 {
 922         struct fusb300_ep *ep =
 923                 fusb300->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
 924
 925         switch (ctrl->bRequestType & USB_RECIP_MASK) {
 926         case USB_RECIP_DEVICE:
 927                 fusb300_set_cxdone(fusb300);
 928                 break;
 929         case USB_RECIP_INTERFACE:
 930                 fusb300_set_cxdone(fusb300);
 931                 break;
 932         case USB_RECIP_ENDPOINT:
 933                 if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
 934                         if (ep->wedged) {
 935                                 fusb300_set_cxdone(fusb300);
 936                                 break;
 937                         }
 938                         if (ep->stall) {
 939                                 ep->stall = 0;
 940                                 fusb300_clear_seqnum(fusb300, ep->epnum);
 941                                 fusb300_clear_epnstall(fusb300, ep->epnum);
 942                                 if (!list_empty(&ep->queue))
 943                                         enable_fifo_int(ep);
 944                         }
 945                 }
 946                 fusb300_set_cxdone(fusb300);
 947                 break;
 948         default:
 949                 request_error(fusb300);
 950                 break;
 951         }
 952 }
 953
 954 static void fusb300_set_dev_addr(struct fusb300 *fusb300, u16 addr)
 955 {
 956         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_DAR);
 957
 958         reg &= ~FUSB300_DAR_DRVADDR_MSK;
 959         reg |= FUSB300_DAR_DRVADDR(addr);
 960
 961         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_DAR);
 962 }
 963
 964 static void set_address(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
 965 {
 966         if (ctrl->wValue >= 0x0100)
 967                 request_error(fusb300);
 968         else {
 969                 fusb300_set_dev_addr(fusb300, ctrl->wValue);
 970                 fusb300_set_cxdone(fusb300);
 971         }
 972 }
 973
 974 #define UVC_COPY_DESCRIPTORS(mem, src) \
 975         do { \
 976                 const struct usb_descriptor_header * const *__src; \
 977                 for (__src = src; *__src; ++__src) { \
 978                         memcpy(mem, *__src, (*__src)->bLength); \
 979                         mem += (*__src)->bLength; \
 980                 } \
 981         } while (0)
 982
 983 static int setup_packet(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
 984 {
 985         u8 *p = (u8 *)ctrl;
 986         u8 ret = 0;
 987         u8 i = 0;
 988
 989         fusb300_rdcxf(fusb300, p, 8);
 990         fusb300->ep0_dir = ctrl->bRequestType & USB_DIR_IN;
 991         fusb300->ep0_length = ctrl->wLength;
 992
 993         /* check request */
 994         if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 995                 switch (ctrl->bRequest) {
 996                 case USB_REQ_GET_STATUS:
 997                         get_status(fusb300, ctrl);
 998                         break;
 999                 case USB_REQ_CLEAR_FEATURE:
1000                         clear_feature(fusb300, ctrl);
1001                         break;
1002                 case USB_REQ_SET_FEATURE:
1003                         set_feature(fusb300, ctrl);
1004                         break;
1005                 case USB_REQ_SET_ADDRESS:
1006                         set_address(fusb300, ctrl);
1007                         break;
1008                 case USB_REQ_SET_CONFIGURATION:
1009                         fusb300_enable_bit(fusb300, FUSB300_OFFSET_DAR,
1010                                            FUSB300_DAR_SETCONFG);
1011                         /* clear sequence number */
1012                         for (i = 1; i <= FUSB300_MAX_NUM_EP; i++)
1013                                 fusb300_clear_seqnum(fusb300, i);
1014                         fusb300->reenum = 1;
1015                         ret = 1;
1016                         break;
1017                 default:
1018                         ret = 1;
1019                         break;
1020                 }
1021         } else
1022                 ret = 1;
1023
1024         return ret;
1025 }
1026
1027 static void fusb300_set_ep_bycnt(struct fusb300_ep *ep, u32 bycnt)
1028 {
1029         struct fusb300 *fusb300 = ep->fusb300;
1030         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
1031
1032         reg &= ~FUSB300_FFR_BYCNT;
1033         reg |= bycnt & FUSB300_FFR_BYCNT;
1034
1035         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
1036 }
1037
1038 static void done(struct fusb300_ep *ep, struct fusb300_request *req,
1039                  int status)
1040 {
1041         list_del_init(&req->queue);
1042
1043         /* don't modify queue heads during completion callback */
1044         if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
1045                 req->req.status = -ESHUTDOWN;
1046         else
1047                 req->req.status = status;
1048
1049         spin_unlock(&ep->fusb300->lock);
1050         req->req.complete(&ep->ep, &req->req);
1051         spin_lock(&ep->fusb300->lock);
1052
1053         if (ep->epnum) {
1054                 disable_fifo_int(ep);
1055                 if (!list_empty(&ep->queue))
1056                         enable_fifo_int(ep);
1057         } else
1058                 fusb300_set_cxdone(ep->fusb300);
1059 }
1060
1061 void fusb300_fill_idma_prdtbl(struct fusb300_ep *ep,
1062                         struct fusb300_request *req)
1063 {
1064         u32 value;
1065         u32 reg;
1066
1067         /* wait SW owner */
1068         do {
1069                 reg = ioread32(ep->fusb300->reg +
1070                         FUSB300_OFFSET_EPPRD_W0(ep->epnum));
1071                 reg &= FUSB300_EPPRD0_H;
1072         } while (reg);
1073
1074         iowrite32((u32) req->req.buf, ep->fusb300->reg +
1075                 FUSB300_OFFSET_EPPRD_W1(ep->epnum));
1076
1077         value = FUSB300_EPPRD0_BTC(req->req.length) | FUSB300_EPPRD0_H |
1078                 FUSB300_EPPRD0_F | FUSB300_EPPRD0_L | FUSB300_EPPRD0_I;
1079         iowrite32(value, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W0(ep->epnum));
1080
1081         iowrite32(0x0, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W2(ep->epnum));
1082
1083         fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_EPPRDRDY,
1084                 FUSB300_EPPRDR_EP_PRD_RDY(ep->epnum));
1085 }
1086
1087 static void fusb300_wait_idma_finished(struct fusb300_ep *ep)
1088 {
1089         u32 reg;
1090
1091         do {
1092                 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR1);
1093                 if ((reg & FUSB300_IGR1_VBUS_CHG_INT) ||
1094                     (reg & FUSB300_IGR1_WARM_RST_INT) ||
1095                     (reg & FUSB300_IGR1_HOT_RST_INT) ||
1096                     (reg & FUSB300_IGR1_USBRST_INT)
1097                 )
1098                         goto IDMA_RESET;
1099                 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR0);
1100                 reg &= FUSB300_IGR0_EPn_PRD_INT(ep->epnum);
1101         } while (!reg);
1102
1103         fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGR0,
1104                 FUSB300_IGR0_EPn_PRD_INT(ep->epnum));
1105 IDMA_RESET:
1106         fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGER0,
1107                 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
1108 }
1109
1110 static void  fusb300_set_idma(struct fusb300_ep *ep,
1111                         struct fusb300_request *req)
1112 {
1113         dma_addr_t d;
1114         u8 *tmp = NULL;
1115
1116         d = dma_map_single(NULL, req->req.buf, req->req.length, DMA_TO_DEVICE);
1117
1118         if (dma_mapping_error(NULL, d)) {
1119                 kfree(req->req.buf);
1120                 printk(KERN_DEBUG "dma_mapping_error\n");
1121         }
1122
1123         dma_sync_single_for_device(NULL, d, req->req.length, DMA_TO_DEVICE);
1124
1125         fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER0,
1126                 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
1127
1128         tmp = req->req.buf;
1129         req->req.buf = (u8 *)d;
1130
1131         fusb300_fill_idma_prdtbl(ep, req);
1132         /* check idma is done */
1133         fusb300_wait_idma_finished(ep);
1134
1135         req->req.buf = tmp;
1136
1137         if (d)
1138                 dma_unmap_single(NULL, d, req->req.length, DMA_TO_DEVICE);
1139 }
1140
1141 static void in_ep_fifo_handler(struct fusb300_ep *ep)
1142 {
1143         struct fusb300_request *req = list_entry(ep->queue.next,
1144                                         struct fusb300_request, queue);
1145
1146         if (req->req.length) {
1147 #if 0
1148                 fusb300_set_ep_bycnt(ep, req->req.length);
1149                 fusb300_wrfifo(ep, req);
1150 #else
1151                 fusb300_set_idma(ep, req);
1152 #endif
1153         }
1154         done(ep, req, 0);
1155 }
1156
1157 static void out_ep_fifo_handler(struct fusb300_ep *ep)
1158 {
1159         struct fusb300 *fusb300 = ep->fusb300;
1160         struct fusb300_request *req = list_entry(ep->queue.next,
1161                                                  struct fusb300_request, queue);
1162         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
1163         u32 length = reg & FUSB300_FFR_BYCNT;
1164
1165         fusb300_rdfifo(ep, req, length);
1166
1167         /* finish out transfer */
1168         if ((req->req.length == req->req.actual) || (length < ep->ep.maxpacket))
1169                 done(ep, req, 0);
1170 }
1171
1172 static void check_device_mode(struct fusb300 *fusb300)
1173 {
1174         u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_GCR);
1175
1176         switch (reg & FUSB300_GCR_DEVEN_MSK) {
1177         case FUSB300_GCR_DEVEN_SS:
1178                 fusb300->gadget.speed = USB_SPEED_SUPER;
1179                 break;
1180         case FUSB300_GCR_DEVEN_HS:
1181                 fusb300->gadget.speed = USB_SPEED_HIGH;
1182                 break;
1183         case FUSB300_GCR_DEVEN_FS:
1184                 fusb300->gadget.speed = USB_SPEED_FULL;
1185                 break;
1186         default:
1187                 fusb300->gadget.speed = USB_SPEED_UNKNOWN;
1188                 break;
1189         }
1190         printk(KERN_INFO "dev_mode = %d\n", (reg & FUSB300_GCR_DEVEN_MSK));
1191 }
1192
1193
1194 static void fusb300_ep0out(struct fusb300 *fusb300)
1195 {
1196         struct fusb300_ep *ep = fusb300->ep[0];
1197         u32 reg;
1198
1199         if (!list_empty(&ep->queue)) {
1200                 struct fusb300_request *req;
1201
1202                 req = list_first_entry(&ep->queue,
1203                         struct fusb300_request, queue);
1204                 if (req->req.length)
1205                         fusb300_rdcxf(ep->fusb300, req->req.buf,
1206                                 req->req.length);
1207                 done(ep, req, 0);
1208                 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1209                 reg &= ~FUSB300_IGER1_CX_OUT_INT;
1210                 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_IGER1);
1211         } else
1212                 pr_err("%s : empty queue\n", __func__);
1213 }
1214
1215 static void fusb300_ep0in(struct fusb300 *fusb300)
1216 {
1217         struct fusb300_request *req;
1218         struct fusb300_ep *ep = fusb300->ep[0];
1219
1220         if ((!list_empty(&ep->queue)) && (fusb300->ep0_dir)) {
1221                 req = list_entry(ep->queue.next,
1222                                 struct fusb300_request, queue);
1223                 if (req->req.length)
1224                         fusb300_wrcxf(ep, req);
1225                 if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
1226                         done(ep, req, 0);
1227         } else
1228                 fusb300_set_cxdone(fusb300);
1229 }
1230
1231 static void fusb300_grp2_handler(void)
1232 {
1233 }
1234
1235 static void fusb300_grp3_handler(void)
1236 {
1237 }
1238
1239 static void fusb300_grp4_handler(void)
1240 {
1241 }
1242
1243 static void fusb300_grp5_handler(void)
1244 {
1245 }
1246
1247 static irqreturn_t fusb300_irq(int irq, void *_fusb300)
1248 {
1249         struct fusb300 *fusb300 = _fusb300;
1250         u32 int_grp1 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
1251         u32 int_grp1_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1252         u32 int_grp0 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR0);
1253         u32 int_grp0_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER0);
1254         struct usb_ctrlrequest ctrl;
1255         u8 in;
1256         u32 reg;
1257         int i;
1258
1259         spin_lock(&fusb300->lock);
1260
1261         int_grp1 &= int_grp1_en;
1262         int_grp0 &= int_grp0_en;
1263
1264         if (int_grp1 & FUSB300_IGR1_WARM_RST_INT) {
1265                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1266                                   FUSB300_IGR1_WARM_RST_INT);
1267                 printk(KERN_INFO"fusb300_warmreset\n");
1268                 fusb300_reset();
1269         }
1270
1271         if (int_grp1 & FUSB300_IGR1_HOT_RST_INT) {
1272                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1273                                   FUSB300_IGR1_HOT_RST_INT);
1274                 printk(KERN_INFO"fusb300_hotreset\n");
1275                 fusb300_reset();
1276         }
1277
1278         if (int_grp1 & FUSB300_IGR1_USBRST_INT) {
1279                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1280                                   FUSB300_IGR1_USBRST_INT);
1281                 fusb300_reset();
1282         }
1283         /* COMABT_INT has a highest priority */
1284
1285         if (int_grp1 & FUSB300_IGR1_CX_COMABT_INT) {
1286                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1287                                   FUSB300_IGR1_CX_COMABT_INT);
1288                 printk(KERN_INFO"fusb300_ep0abt\n");
1289         }
1290
1291         if (int_grp1 & FUSB300_IGR1_VBUS_CHG_INT) {
1292                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1293                                   FUSB300_IGR1_VBUS_CHG_INT);
1294                 printk(KERN_INFO"fusb300_vbus_change\n");
1295         }
1296
1297         if (int_grp1 & FUSB300_IGR1_U3_EXIT_FAIL_INT) {
1298                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1299                                   FUSB300_IGR1_U3_EXIT_FAIL_INT);
1300         }
1301
1302         if (int_grp1 & FUSB300_IGR1_U2_EXIT_FAIL_INT) {
1303                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1304                                   FUSB300_IGR1_U2_EXIT_FAIL_INT);
1305         }
1306
1307         if (int_grp1 & FUSB300_IGR1_U1_EXIT_FAIL_INT) {
1308                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1309                                   FUSB300_IGR1_U1_EXIT_FAIL_INT);
1310         }
1311
1312         if (int_grp1 & FUSB300_IGR1_U2_ENTRY_FAIL_INT) {
1313                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1314                                   FUSB300_IGR1_U2_ENTRY_FAIL_INT);
1315         }
1316
1317         if (int_grp1 & FUSB300_IGR1_U1_ENTRY_FAIL_INT) {
1318                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1319                                   FUSB300_IGR1_U1_ENTRY_FAIL_INT);
1320         }
1321
1322         if (int_grp1 & FUSB300_IGR1_U3_EXIT_INT) {
1323                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1324                                   FUSB300_IGR1_U3_EXIT_INT);
1325                 printk(KERN_INFO "FUSB300_IGR1_U3_EXIT_INT\n");
1326         }
1327
1328         if (int_grp1 & FUSB300_IGR1_U2_EXIT_INT) {
1329                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1330                                   FUSB300_IGR1_U2_EXIT_INT);
1331                 printk(KERN_INFO "FUSB300_IGR1_U2_EXIT_INT\n");
1332         }
1333
1334         if (int_grp1 & FUSB300_IGR1_U1_EXIT_INT) {
1335                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1336                                   FUSB300_IGR1_U1_EXIT_INT);
1337                 printk(KERN_INFO "FUSB300_IGR1_U1_EXIT_INT\n");
1338         }
1339
1340         if (int_grp1 & FUSB300_IGR1_U3_ENTRY_INT) {
1341                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1342                                   FUSB300_IGR1_U3_ENTRY_INT);
1343                 printk(KERN_INFO "FUSB300_IGR1_U3_ENTRY_INT\n");
1344                 fusb300_enable_bit(fusb300, FUSB300_OFFSET_SSCR1,
1345                                    FUSB300_SSCR1_GO_U3_DONE);
1346         }
1347
1348         if (int_grp1 & FUSB300_IGR1_U2_ENTRY_INT) {
1349                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1350                                   FUSB300_IGR1_U2_ENTRY_INT);
1351                 printk(KERN_INFO "FUSB300_IGR1_U2_ENTRY_INT\n");
1352         }
1353
1354         if (int_grp1 & FUSB300_IGR1_U1_ENTRY_INT) {
1355                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1356                                   FUSB300_IGR1_U1_ENTRY_INT);
1357                 printk(KERN_INFO "FUSB300_IGR1_U1_ENTRY_INT\n");
1358         }
1359
1360         if (int_grp1 & FUSB300_IGR1_RESM_INT) {
1361                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1362                                   FUSB300_IGR1_RESM_INT);
1363                 printk(KERN_INFO "fusb300_resume\n");
1364         }
1365
1366         if (int_grp1 & FUSB300_IGR1_SUSP_INT) {
1367                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1368                                   FUSB300_IGR1_SUSP_INT);
1369                 printk(KERN_INFO "fusb300_suspend\n");
1370         }
1371
1372         if (int_grp1 & FUSB300_IGR1_HS_LPM_INT) {
1373                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1374                                   FUSB300_IGR1_HS_LPM_INT);
1375                 printk(KERN_INFO "fusb300_HS_LPM_INT\n");
1376         }
1377
1378         if (int_grp1 & FUSB300_IGR1_DEV_MODE_CHG_INT) {
1379                 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1380                                   FUSB300_IGR1_DEV_MODE_CHG_INT);
1381                 check_device_mode(fusb300);
1382         }
1383
1384         if (int_grp1 & FUSB300_IGR1_CX_COMFAIL_INT) {
1385                 fusb300_set_cxstall(fusb300);
1386                 printk(KERN_INFO "fusb300_ep0fail\n");
1387         }
1388
1389         if (int_grp1 & FUSB300_IGR1_CX_SETUP_INT) {
1390                 printk(KERN_INFO "fusb300_ep0setup\n");
1391                 if (setup_packet(fusb300, &ctrl)) {
1392                         spin_unlock(&fusb300->lock);
1393                         if (fusb300->driver->setup(&fusb300->gadget, &ctrl) < 0)
1394                                 fusb300_set_cxstall(fusb300);
1395                         spin_lock(&fusb300->lock);
1396                 }
1397         }
1398
1399         if (int_grp1 & FUSB300_IGR1_CX_CMDEND_INT)
1400                 printk(KERN_INFO "fusb300_cmdend\n");
1401
1402
1403         if (int_grp1 & FUSB300_IGR1_CX_OUT_INT) {
1404                 printk(KERN_INFO "fusb300_cxout\n");
1405                 fusb300_ep0out(fusb300);
1406         }
1407
1408         if (int_grp1 & FUSB300_IGR1_CX_IN_INT) {
1409                 printk(KERN_INFO "fusb300_cxin\n");
1410                 fusb300_ep0in(fusb300);
1411         }
1412
1413         if (int_grp1 & FUSB300_IGR1_INTGRP5)
1414                 fusb300_grp5_handler();
1415
1416         if (int_grp1 & FUSB300_IGR1_INTGRP4)
1417                 fusb300_grp4_handler();
1418
1419         if (int_grp1 & FUSB300_IGR1_INTGRP3)
1420                 fusb300_grp3_handler();
1421
1422         if (int_grp1 & FUSB300_IGR1_INTGRP2)
1423                 fusb300_grp2_handler();
1424
1425         if (int_grp0) {
1426                 for (i = 1; i < FUSB300_MAX_NUM_EP; i++) {
1427                         if (int_grp0 & FUSB300_IGR0_EPn_FIFO_INT(i)) {
1428                                 reg = ioread32(fusb300->reg +
1429                                         FUSB300_OFFSET_EPSET1(i));
1430                                 in = (reg & FUSB300_EPSET1_DIRIN) ? 1 : 0;
1431                                 if (in)
1432                                         in_ep_fifo_handler(fusb300->ep[i]);
1433                                 else
1434                                         out_ep_fifo_handler(fusb300->ep[i]);
1435                         }
1436                 }
1437         }
1438
1439         spin_unlock(&fusb300->lock);
1440
1441         return IRQ_HANDLED;
1442 }
1443
1444 static void fusb300_set_u2_timeout(struct fusb300 *fusb300,
1445                                    u32 time)
1446 {
1447         u32 reg;
1448
1449         reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1450         reg &= ~0xff;
1451         reg |= FUSB300_SSCR2_U2TIMEOUT(time);
1452
1453         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1454 }
1455
1456 static void fusb300_set_u1_timeout(struct fusb300 *fusb300,
1457                                    u32 time)
1458 {
1459         u32 reg;
1460
1461         reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1462         reg &= ~(0xff << 8);
1463         reg |= FUSB300_SSCR2_U1TIMEOUT(time);
1464
1465         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1466 }
1467
1468 static void init_controller(struct fusb300 *fusb300)
1469 {
1470         u32 reg;
1471         u32 mask = 0;
1472         u32 val = 0;
1473
1474         /* split on */
1475         mask = val = FUSB300_AHBBCR_S0_SPLIT_ON | FUSB300_AHBBCR_S1_SPLIT_ON;
1476         reg = ioread32(fusb300->reg + FUSB300_OFFSET_AHBCR);
1477         reg &= ~mask;
1478         reg |= val;
1479         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_AHBCR);
1480
1481         /* enable high-speed LPM */
1482         mask = val = FUSB300_HSCR_HS_LPM_PERMIT;
1483         reg = ioread32(fusb300->reg + FUSB300_OFFSET_HSCR);
1484         reg &= ~mask;
1485         reg |= val;
1486         iowrite32(reg, fusb300->reg + FUSB300_OFFSET_HSCR);
1487
1488         /*set u1 u2 timmer*/
1489         fusb300_set_u2_timeout(fusb300, 0xff);
1490         fusb300_set_u1_timeout(fusb300, 0xff);
1491
1492         /* enable all grp1 interrupt */
1493         iowrite32(0xcfffff9f, fusb300->reg + FUSB300_OFFSET_IGER1);
1494 }
1495 /*------------------------------------------------------------------------*/
1496 static struct fusb300 *the_controller;
1497
1498 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1499                 int (*bind)(struct usb_gadget *))
1500 {
1501         struct fusb300 *fusb300 = the_controller;
1502         int retval;
1503
1504         if (!driver
1505                         || driver->speed < USB_SPEED_FULL
1506                         || !bind
1507                         || !driver->setup)
1508                 return -EINVAL;
1509
1510         if (!fusb300)
1511                 return -ENODEV;
1512
1513         if (fusb300->driver)
1514                 return -EBUSY;
1515
1516         /* hook up the driver */
1517         driver->driver.bus = NULL;
1518         fusb300->driver = driver;
1519         fusb300->gadget.dev.driver = &driver->driver;
1520
1521         retval = device_add(&fusb300->gadget.dev);
1522         if (retval) {
1523                 pr_err("device_add error (%d)\n", retval);
1524                 goto error;
1525         }
1526
1527         retval = bind(&fusb300->gadget);
1528         if (retval) {
1529                 pr_err("bind to driver error (%d)\n", retval);
1530                 device_del(&fusb300->gadget.dev);
1531                 goto error;
1532         }
1533
1534         return 0;
1535
1536 error:
1537         fusb300->driver = NULL;
1538         fusb300->gadget.dev.driver = NULL;
1539
1540         return retval;
1541 }
1542 EXPORT_SYMBOL(usb_gadget_probe_driver);
1543
1544 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1545 {
1546         struct fusb300 *fusb300 = the_controller;
1547
1548         if (driver != fusb300->driver || !driver->unbind)
1549                 return -EINVAL;
1550
1551         driver->unbind(&fusb300->gadget);
1552         fusb300->gadget.dev.driver = NULL;
1553
1554         init_controller(fusb300);
1555         device_del(&fusb300->gadget.dev);
1556         fusb300->driver = NULL;
1557
1558         return 0;
1559 }
1560 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1561 /*--------------------------------------------------------------------------*/
1562
1563 static int fusb300_udc_pullup(struct usb_gadget *_gadget, int is_active)
1564 {
1565         return 0;
1566 }
1567
1568 static struct usb_gadget_ops fusb300_gadget_ops = {
1569         .pullup         = fusb300_udc_pullup,
1570 };
1571
1572 static int __exit fusb300_remove(struct platform_device *pdev)
1573 {
1574         struct fusb300 *fusb300 = dev_get_drvdata(&pdev->dev);
1575
1576         iounmap(fusb300->reg);
1577         free_irq(platform_get_irq(pdev, 0), fusb300);
1578
1579         fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
1580         kfree(fusb300);
1581
1582         return 0;
1583 }
1584
1585 static int __init fusb300_probe(struct platform_device *pdev)
1586 {
1587         struct resource *res, *ires, *ires1;
1588         void __iomem *reg = NULL;
1589         struct fusb300 *fusb300 = NULL;
1590         struct fusb300_ep *_ep[FUSB300_MAX_NUM_EP];
1591         int ret = 0;
1592         int i;
1593
1594         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1595         if (!res) {
1596                 ret = -ENODEV;
1597                 pr_err("platform_get_resource error.\n");
1598                 goto clean_up;
1599         }
1600
1601         ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1602         if (!ires) {
1603                 ret = -ENODEV;
1604                 dev_err(&pdev->dev,
1605                         "platform_get_resource IORESOURCE_IRQ error.\n");
1606                 goto clean_up;
1607         }
1608
1609         ires1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1610         if (!ires1) {
1611                 ret = -ENODEV;
1612                 dev_err(&pdev->dev,
1613                         "platform_get_resource IORESOURCE_IRQ 1 error.\n");
1614                 goto clean_up;
1615         }
1616
1617         reg = ioremap(res->start, resource_size(res));
1618         if (reg == NULL) {
1619                 ret = -ENOMEM;
1620                 pr_err("ioremap error.\n");
1621                 goto clean_up;
1622         }
1623
1624         /* initialize udc */
1625         fusb300 = kzalloc(sizeof(struct fusb300), GFP_KERNEL);
1626         if (fusb300 == NULL) {
1627                 pr_err("kzalloc error\n");
1628                 goto clean_up;
1629         }
1630
1631         for (i = 0; i < FUSB300_MAX_NUM_EP; i++) {
1632                 _ep[i] = kzalloc(sizeof(struct fusb300_ep), GFP_KERNEL);
1633                 if (_ep[i] == NULL) {
1634                         pr_err("_ep kzalloc error\n");
1635                         goto clean_up;
1636                 }
1637                 fusb300->ep[i] = _ep[i];
1638         }
1639
1640         spin_lock_init(&fusb300->lock);
1641
1642         dev_set_drvdata(&pdev->dev, fusb300);
1643
1644         fusb300->gadget.ops = &fusb300_gadget_ops;
1645
1646         device_initialize(&fusb300->gadget.dev);
1647
1648         dev_set_name(&fusb300->gadget.dev, "gadget");
1649
1650         fusb300->gadget.is_dualspeed = 1;
1651         fusb300->gadget.dev.parent = &pdev->dev;
1652         fusb300->gadget.dev.dma_mask = pdev->dev.dma_mask;
1653         fusb300->gadget.dev.release = pdev->dev.release;
1654         fusb300->gadget.name = udc_name;
1655         fusb300->reg = reg;
1656
1657         ret = request_irq(ires->start, fusb300_irq, IRQF_DISABLED | IRQF_SHARED,
1658                           udc_name, fusb300);
1659         if (ret < 0) {
1660                 pr_err("request_irq error (%d)\n", ret);
1661                 goto clean_up;
1662         }
1663
1664         ret = request_irq(ires1->start, fusb300_irq,
1665                         IRQF_DISABLED | IRQF_SHARED, udc_name, fusb300);
1666         if (ret < 0) {
1667                 pr_err("request_irq1 error (%d)\n", ret);
1668                 goto clean_up;
1669         }
1670
1671         INIT_LIST_HEAD(&fusb300->gadget.ep_list);
1672
1673         for (i = 0; i < FUSB300_MAX_NUM_EP ; i++) {
1674                 struct fusb300_ep *ep = fusb300->ep[i];
1675
1676                 if (i != 0) {
1677                         INIT_LIST_HEAD(&fusb300->ep[i]->ep.ep_list);
1678                         list_add_tail(&fusb300->ep[i]->ep.ep_list,
1679                                      &fusb300->gadget.ep_list);
1680                 }
1681                 ep->fusb300 = fusb300;
1682                 INIT_LIST_HEAD(&ep->queue);
1683                 ep->ep.name = fusb300_ep_name[i];
1684                 ep->ep.ops = &fusb300_ep_ops;
1685                 ep->ep.maxpacket = HS_BULK_MAX_PACKET_SIZE;
1686         }
1687         fusb300->ep[0]->ep.maxpacket = HS_CTL_MAX_PACKET_SIZE;
1688         fusb300->ep[0]->epnum = 0;
1689         fusb300->gadget.ep0 = &fusb300->ep[0]->ep;
1690         INIT_LIST_HEAD(&fusb300->gadget.ep0->ep_list);
1691
1692         the_controller = fusb300;
1693
1694         fusb300->ep0_req = fusb300_alloc_request(&fusb300->ep[0]->ep,
1695                                 GFP_KERNEL);
1696         if (fusb300->ep0_req == NULL)
1697                 goto clean_up3;
1698
1699         init_controller(fusb300);
1700         dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1701
1702         return 0;
1703
1704 clean_up3:
1705         free_irq(ires->start, fusb300);
1706
1707 clean_up:
1708         if (fusb300) {
1709                 if (fusb300->ep0_req)
1710                         fusb300_free_request(&fusb300->ep[0]->ep,
1711                                 fusb300->ep0_req);
1712                 kfree(fusb300);
1713         }
1714         if (reg)
1715                 iounmap(reg);
1716
1717         return ret;
1718 }
1719
1720 static struct platform_driver fusb300_driver = {
1721         .remove =       __exit_p(fusb300_remove),
1722         .driver         = {
1723                 .name = (char *) udc_name,
1724                 .owner  = THIS_MODULE,
1725         },
1726 };
1727
1728 static int __init fusb300_udc_init(void)
1729 {
1730         return platform_driver_probe(&fusb300_driver, fusb300_probe);
1731 }
1732
1733 module_init(fusb300_udc_init);
1734
1735 static void __exit fusb300_udc_cleanup(void)
1736 {
1737         platform_driver_unregister(&fusb300_driver);
1738 }
1739 module_exit(fusb300_udc_cleanup);