2 * Standalone EHCI usb debug driver
4 * Originally written by:
5 * Eric W. Biederman" <ebiederm@xmission.com> and
6 * Yinghai Lu <yhlu.kernel@gmail.com>
8 * Changes for early/late printk and HW errata:
9 * Jason Wessel <jason.wessel@windriver.com>
10 * Copyright (C) 2009 Wind River Systems, Inc.
14 #include <linux/console.h>
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/pci_regs.h>
18 #include <linux/pci_ids.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/ehci_def.h>
21 #include <linux/delay.h>
23 #include <asm/pci-direct.h>
24 #include <asm/fixmap.h>
26 /* The code here is intended to talk directly to the EHCI debug port
27 * and does not require that you have any kind of USB host controller
28 * drivers or USB device drivers compiled into the kernel.
30 * If you make a change to anything in here, the following test cases
31 * need to pass where a USB debug device works in the following
34 * 1. boot args: earlyprintk=dbgp
35 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
36 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
37 * 2. boot args: earlyprintk=dbgp,keep
38 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
39 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
40 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
41 * o kernel has CONFIG_USB_EHCI_HCD=y and
42 * CONFIG_USB_SERIAL_DEBUG=y
43 * 4. boot args: earlyprintk=vga,dbgp
44 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
45 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
47 * For the 4th configuration you can turn on or off the DBGP_DEBUG
48 * such that you can debug the dbgp device's driver code.
51 static int dbgp_phys_port = 1;
53 static struct ehci_caps __iomem *ehci_caps;
54 static struct ehci_regs __iomem *ehci_regs;
55 static struct ehci_dbg_port __iomem *ehci_debug;
56 static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
57 static unsigned int dbgp_endpoint_out;
65 static struct ehci_dev ehci_dev;
67 #define USB_DEBUG_DEVNUM 127
69 #define DBGP_DATA_TOGGLE 0x8800
72 #define dbgp_printk printk
73 static void dbgp_ehci_status(char *str)
77 dbgp_printk("dbgp: %s\n", str);
78 dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
79 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
80 dbgp_printk(" ehci conf flg: %08x\n",
81 readl(&ehci_regs->configured_flag));
82 dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
83 dbgp_printk(" ehci portsc : %08x\n",
84 readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
87 static inline void dbgp_ehci_status(char *str) { }
88 static inline void dbgp_printk(const char *fmt, ...) { }
91 static inline u32 dbgp_pid_update(u32 x, u32 tok)
93 return ((x ^ DBGP_DATA_TOGGLE) & 0xffff00) | (tok & 0xff);
96 static inline u32 dbgp_len_update(u32 x, u32 len)
98 return (x & ~0x0f) | (len & 0x0f);
102 * USB Packet IDs (PIDs)
106 #define USB_PID_OUT 0xe1
107 #define USB_PID_IN 0x69
108 #define USB_PID_SOF 0xa5
109 #define USB_PID_SETUP 0x2d
111 #define USB_PID_ACK 0xd2
112 #define USB_PID_NAK 0x5a
113 #define USB_PID_STALL 0x1e
114 #define USB_PID_NYET 0x96
116 #define USB_PID_DATA0 0xc3
117 #define USB_PID_DATA1 0x4b
118 #define USB_PID_DATA2 0x87
119 #define USB_PID_MDATA 0x0f
121 #define USB_PID_PREAMBLE 0x3c
122 #define USB_PID_ERR 0x3c
123 #define USB_PID_SPLIT 0x78
124 #define USB_PID_PING 0xb4
125 #define USB_PID_UNDEF_0 0xf0
127 #define USB_PID_DATA_TOGGLE 0x88
128 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
130 #define PCI_CAP_ID_EHCI_DEBUG 0xa
132 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
133 #define HUB_SHORT_RESET_TIME 10
134 #define HUB_LONG_RESET_TIME 200
135 #define HUB_RESET_TIMEOUT 500
137 #define DBGP_MAX_PACKET 8
138 #define DBGP_TIMEOUT (250 * 1000)
140 static int dbgp_wait_until_complete(void)
143 int loop = DBGP_TIMEOUT;
146 ctrl = readl(&ehci_debug->control);
147 /* Stop when the transaction is finished */
148 if (ctrl & DBGP_DONE)
151 } while (--loop > 0);
154 return -DBGP_TIMEOUT;
157 * Now that we have observed the completed transaction,
158 * clear the done bit.
160 writel(ctrl | DBGP_DONE, &ehci_debug->control);
161 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
164 static inline void dbgp_mdelay(int ms)
169 for (i = 0; i < 1000; i++)
174 static void dbgp_breath(void)
176 /* Sleep to give the debug port a chance to breathe */
179 static int dbgp_wait_until_done(unsigned ctrl)
186 writel(ctrl | DBGP_GO, &ehci_debug->control);
187 ret = dbgp_wait_until_complete();
188 pids = readl(&ehci_debug->pids);
189 lpid = DBGP_PID_GET(pids);
192 /* A -DBGP_TIMEOUT failure here means the device has
193 * failed, perhaps because it was unplugged, in which
194 * case we do not want to hang the system so the dbgp
195 * will be marked as unsafe to use. EHCI reset is the
196 * only way to recover if you unplug the dbgp device.
198 if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
204 * If the port is getting full or it has dropped data
205 * start pacing ourselves, not necessary but it's friendly.
207 if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
210 /* If I get a NACK reissue the transmission */
211 if (lpid == USB_PID_NAK) {
219 static inline void dbgp_set_data(const void *buf, int size)
221 const unsigned char *bytes = buf;
226 for (i = 0; i < 4 && i < size; i++)
227 lo |= bytes[i] << (8*i);
228 for (; i < 8 && i < size; i++)
229 hi |= bytes[i] << (8*(i - 4));
230 writel(lo, &ehci_debug->data03);
231 writel(hi, &ehci_debug->data47);
234 static inline void dbgp_get_data(void *buf, int size)
236 unsigned char *bytes = buf;
240 lo = readl(&ehci_debug->data03);
241 hi = readl(&ehci_debug->data47);
242 for (i = 0; i < 4 && i < size; i++)
243 bytes[i] = (lo >> (8*i)) & 0xff;
244 for (; i < 8 && i < size; i++)
245 bytes[i] = (hi >> (8*(i - 4))) & 0xff;
248 static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
249 const char *bytes, int size)
251 u32 pids, addr, ctrl;
254 if (size > DBGP_MAX_PACKET)
257 addr = DBGP_EPADDR(devnum, endpoint);
259 pids = readl(&ehci_debug->pids);
260 pids = dbgp_pid_update(pids, USB_PID_OUT);
262 ctrl = readl(&ehci_debug->control);
263 ctrl = dbgp_len_update(ctrl, size);
267 dbgp_set_data(bytes, size);
268 writel(addr, &ehci_debug->address);
269 writel(pids, &ehci_debug->pids);
271 ret = dbgp_wait_until_done(ctrl);
278 static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
281 u32 pids, addr, ctrl;
284 if (size > DBGP_MAX_PACKET)
287 addr = DBGP_EPADDR(devnum, endpoint);
289 pids = readl(&ehci_debug->pids);
290 pids = dbgp_pid_update(pids, USB_PID_IN);
292 ctrl = readl(&ehci_debug->control);
293 ctrl = dbgp_len_update(ctrl, size);
297 writel(addr, &ehci_debug->address);
298 writel(pids, &ehci_debug->pids);
299 ret = dbgp_wait_until_done(ctrl);
305 dbgp_get_data(data, size);
309 static int dbgp_control_msg(unsigned devnum, int requesttype,
310 int request, int value, int index, void *data, int size)
312 u32 pids, addr, ctrl;
313 struct usb_ctrlrequest req;
317 read = (requesttype & USB_DIR_IN) != 0;
318 if (size > (read ? DBGP_MAX_PACKET:0))
321 /* Compute the control message */
322 req.bRequestType = requesttype;
323 req.bRequest = request;
324 req.wValue = cpu_to_le16(value);
325 req.wIndex = cpu_to_le16(index);
326 req.wLength = cpu_to_le16(size);
328 pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
329 addr = DBGP_EPADDR(devnum, 0);
331 ctrl = readl(&ehci_debug->control);
332 ctrl = dbgp_len_update(ctrl, sizeof(req));
336 /* Send the setup message */
337 dbgp_set_data(&req, sizeof(req));
338 writel(addr, &ehci_debug->address);
339 writel(pids, &ehci_debug->pids);
340 ret = dbgp_wait_until_done(ctrl);
344 /* Read the result */
345 return dbgp_bulk_read(devnum, 0, data, size);
349 /* Find a PCI capability */
350 static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
355 if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
356 PCI_STATUS_CAP_LIST))
359 pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
360 for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
364 id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
370 pos = read_pci_config_byte(num, slot, func,
371 pos+PCI_CAP_LIST_NEXT);
376 static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
380 class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
381 if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
384 return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
387 static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
391 for (bus = 0; bus < 256; bus++) {
392 for (slot = 0; slot < 32; slot++) {
393 for (func = 0; func < 8; func++) {
396 cap = __find_dbgp(bus, slot, func);
412 static int dbgp_ehci_startup(void)
414 u32 ctrl, cmd, status;
417 /* Claim ownership, but do not enable yet */
418 ctrl = readl(&ehci_debug->control);
420 ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
421 writel(ctrl, &ehci_debug->control);
424 dbgp_ehci_status("EHCI startup");
425 /* Start the ehci running */
426 cmd = readl(&ehci_regs->command);
427 cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
429 writel(cmd, &ehci_regs->command);
431 /* Ensure everything is routed to the EHCI */
432 writel(FLAG_CF, &ehci_regs->configured_flag);
434 /* Wait until the controller is no longer halted */
437 status = readl(&ehci_regs->status);
438 if (!(status & STS_HALT))
441 } while (--loop > 0);
444 dbgp_printk("ehci can not be started\n");
447 dbgp_printk("ehci started\n");
451 static int dbgp_ehci_controller_reset(void)
453 int loop = 250 * 1000;
456 /* Reset the EHCI controller */
457 cmd = readl(&ehci_regs->command);
459 writel(cmd, &ehci_regs->command);
461 cmd = readl(&ehci_regs->command);
462 } while ((cmd & CMD_RESET) && (--loop > 0));
465 dbgp_printk("can not reset ehci\n");
468 dbgp_ehci_status("ehci reset done");
471 static int ehci_wait_for_port(int port);
472 /* Return 0 on success
473 * Return -ENODEV for any general failure
474 * Return -EIO if wait for port fails
476 int dbgp_external_startup(void)
479 struct usb_debug_descriptor dbgp_desc;
482 int dbg_port = dbgp_phys_port;
485 ret = dbgp_ehci_startup();
489 /* Wait for a device to show up in the debug port */
490 ret = ehci_wait_for_port(dbg_port);
492 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
493 dbgp_printk("No device found in debug port\n");
496 dbgp_ehci_status("wait for port done");
498 /* Enable the debug port */
499 ctrl = readl(&ehci_debug->control);
501 writel(ctrl, &ehci_debug->control);
502 ctrl = readl(&ehci_debug->control);
503 if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
504 dbgp_printk("No device in debug port\n");
505 writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
508 dbgp_ehci_status("debug ported enabled");
510 /* Completely transfer the debug device to the debug controller */
511 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
513 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
518 /* Find the debug device and make it device number 127 */
519 for (devnum = 0; devnum <= 127; devnum++) {
520 ret = dbgp_control_msg(devnum,
521 USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
522 USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
523 &dbgp_desc, sizeof(dbgp_desc));
528 dbgp_printk("Could not find attached debug device\n");
532 dbgp_printk("Attached device is not a debug device\n");
535 dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
537 /* Move the device to 127 if it isn't already there */
538 if (devnum != USB_DEBUG_DEVNUM) {
539 ret = dbgp_control_msg(devnum,
540 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
541 USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
543 dbgp_printk("Could not move attached device to %d\n",
547 devnum = USB_DEBUG_DEVNUM;
548 dbgp_printk("debug device renamed to 127\n");
551 /* Enable the debug interface */
552 ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
553 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
554 USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
556 dbgp_printk(" Could not enable the debug device\n");
559 dbgp_printk("debug interface enabled\n");
560 /* Perform a small write to get the even/odd data state in sync
562 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
564 dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
567 dbgp_printk("small write doned\n");
576 EXPORT_SYMBOL_GPL(dbgp_external_startup);
578 static int __init ehci_reset_port(int port)
581 u32 delay_time, delay;
584 dbgp_ehci_status("reset port");
585 /* Reset the usb debug port */
586 portsc = readl(&ehci_regs->port_status[port - 1]);
588 portsc |= PORT_RESET;
589 writel(portsc, &ehci_regs->port_status[port - 1]);
591 delay = HUB_ROOT_RESET_TIME;
592 for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
593 delay_time += delay) {
595 portsc = readl(&ehci_regs->port_status[port - 1]);
596 if (!(portsc & PORT_RESET))
599 if (portsc & PORT_RESET) {
600 /* force reset to complete */
602 writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
603 &ehci_regs->port_status[port - 1]);
606 portsc = readl(&ehci_regs->port_status[port-1]);
607 } while ((portsc & PORT_RESET) && (--loop > 0));
610 /* Device went away? */
611 if (!(portsc & PORT_CONNECT))
614 /* bomb out completely if something weird happend */
615 if ((portsc & PORT_CSC))
618 /* If we've finished resetting, then break out of the loop */
619 if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
624 static int ehci_wait_for_port(int port)
629 for (reps = 0; reps < 300; reps++) {
630 status = readl(&ehci_regs->status);
631 if (status & STS_PCD)
635 ret = ehci_reset_port(port);
641 typedef void (*set_debug_port_t)(int port);
643 static void __init default_set_debug_port(int port)
647 static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
649 static void __init nvidia_set_debug_port(int port)
652 dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
654 dword &= ~(0x0f<<12);
655 dword |= ((port & 0x0f)<<12);
656 write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
658 dbgp_printk("set debug port to %d\n", port);
661 static void __init detect_set_debug_port(void)
665 vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
668 if ((vendorid & 0xffff) == 0x10de) {
669 dbgp_printk("using nvidia set_debug_port\n");
670 set_debug_port = nvidia_set_debug_port;
674 /* The code in early_ehci_bios_handoff() is derived from the usb pci
675 * quirk initialization, but altered so as to use the early PCI
677 #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
678 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
679 static void __init early_ehci_bios_handoff(void)
681 u32 hcc_params = readl(&ehci_caps->hcc_params);
682 int offset = (hcc_params >> 8) & 0xff;
689 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
690 ehci_dev.func, offset);
691 dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
693 if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
694 dbgp_printk("dbgp: BIOS handoff\n");
695 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
696 ehci_dev.func, offset + 3, 1);
699 /* if boot firmware now owns EHCI, spin till it hands it over. */
701 while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
704 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
705 ehci_dev.func, offset);
708 if (cap & EHCI_USBLEGSUP_BIOS) {
709 /* well, possibly buggy BIOS... try to shut it down,
710 * and hope nothing goes too wrong */
711 dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
712 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
713 ehci_dev.func, offset + 2, 0);
716 /* just in case, always disable EHCI SMIs */
717 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
718 offset + EHCI_USBLEGCTLSTS, 0);
721 static int __init ehci_setup(void)
723 u32 ctrl, portsc, hcs_params;
724 u32 debug_port, new_debug_port = 0, n_ports;
729 early_ehci_bios_handoff();
736 hcs_params = readl(&ehci_caps->hcs_params);
737 debug_port = HCS_DEBUG_PORT(hcs_params);
738 dbgp_phys_port = debug_port;
739 n_ports = HCS_N_PORTS(hcs_params);
741 dbgp_printk("debug_port: %d\n", debug_port);
742 dbgp_printk("n_ports: %d\n", n_ports);
743 dbgp_ehci_status("");
745 for (i = 1; i <= n_ports; i++) {
746 portsc = readl(&ehci_regs->port_status[i-1]);
747 dbgp_printk("portstatus%d: %08x\n", i, portsc);
750 if (port_map_tried && (new_debug_port != debug_port)) {
752 set_debug_port(new_debug_port);
758 /* Only reset the controller if it is not already in the
759 * configured state */
760 if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
761 if (dbgp_ehci_controller_reset() != 0)
764 dbgp_ehci_status("ehci skip - already configured");
767 ret = dbgp_external_startup();
769 goto next_debug_port;
772 /* Things didn't work so remove my claim */
773 ctrl = readl(&ehci_debug->control);
774 ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
775 writel(ctrl, &ehci_debug->control);
781 port_map_tried |= (1<<(debug_port - 1));
782 new_debug_port = ((debug_port-1+1)%n_ports) + 1;
783 if (port_map_tried != ((1<<n_ports) - 1)) {
784 set_debug_port(new_debug_port);
788 set_debug_port(new_debug_port);
795 int __init early_dbgp_init(char *s)
797 u32 debug_port, bar, offset;
798 u32 bus, slot, func, cap;
799 void __iomem *ehci_bar;
806 if (!early_pci_allowed())
811 dbgp_num = simple_strtoul(s, &e, 10);
812 dbgp_printk("dbgp_num: %d\n", dbgp_num);
814 cap = find_dbgp(dbgp_num, &bus, &slot, &func);
818 dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
821 debug_port = read_pci_config(bus, slot, func, cap);
822 bar = (debug_port >> 29) & 0x7;
823 bar = (bar * 4) + 0xc;
824 offset = (debug_port >> 16) & 0xfff;
825 dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
826 if (bar != PCI_BASE_ADDRESS_0) {
827 dbgp_printk("only debug ports on bar 1 handled.\n");
832 bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
833 dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
834 if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
835 dbgp_printk("only simple 32bit mmio bars supported\n");
840 /* double check if the mem space is enabled */
841 byte = read_pci_config_byte(bus, slot, func, 0x04);
844 write_pci_config_byte(bus, slot, func, 0x04, byte);
845 dbgp_printk("mmio for ehci enabled\n");
849 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
850 * than enough. 1K is the biggest I have seen.
852 set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
853 ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
854 ehci_bar += bar_val & ~PAGE_MASK;
855 dbgp_printk("ehci_bar: %p\n", ehci_bar);
857 ehci_caps = ehci_bar;
858 ehci_regs = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
859 ehci_debug = ehci_bar + offset;
861 ehci_dev.slot = slot;
862 ehci_dev.func = func;
864 detect_set_debug_port();
868 dbgp_printk("ehci_setup failed\n");
873 dbgp_ehci_status("early_init_complete");
878 static void early_dbgp_write(struct console *con, const char *str, u32 n)
881 char buf[DBGP_MAX_PACKET];
886 if (!ehci_debug || dbgp_not_safe)
889 cmd = readl(&ehci_regs->command);
890 if (unlikely(!(cmd & CMD_RUN))) {
891 /* If the ehci controller is not in the run state do extended
892 * checks to see if the acpi or some other initialization also
893 * reset the ehci debug port */
894 ctrl = readl(&ehci_debug->control);
895 if (!(ctrl & DBGP_ENABLED)) {
897 dbgp_external_startup();
900 writel(cmd, &ehci_regs->command);
905 for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
906 str++, chunk++, n--) {
907 if (!use_cr && *str == '\n') {
919 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
920 dbgp_endpoint_out, buf, chunk);
923 if (unlikely(reset_run)) {
924 cmd = readl(&ehci_regs->command);
926 writel(cmd, &ehci_regs->command);
930 struct console early_dbgp_console = {
932 .write = early_dbgp_write,
933 .flags = CON_PRINTBUFFER,