drivers/tty/serial/omap-serial.c

   1 /*
   2  * Driver for OMAP-UART controller.
   3  * Based on drivers/serial/8250.c
   4  *
   5  * Copyright (C) 2010 Texas Instruments.
   6  *
   7  * Authors:
   8  *      Govindraj R     <govindraj.raja@ti.com>
   9  *      Thara Gopinath  <thara@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * Note: This driver is made separate from 8250 driver as we cannot
  17  * over load 8250 driver with omap platform specific configuration for
  18  * features like DMA, it makes easier to implement features like DMA and
  19  * hardware flow control and software flow control configuration with
  20  * this driver as required for the omap-platform.
  21  */
  22
  23 #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  24 #define SUPPORT_SYSRQ
  25 #endif
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/console.h>
  30 #include <linux/serial_reg.h>
  31 #include <linux/delay.h>
  32 #include <linux/slab.h>
  33 #include <linux/tty.h>
  34 #include <linux/tty_flip.h>
  35 #include <linux/io.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/clk.h>
  38 #include <linux/serial_core.h>
  39 #include <linux/irq.h>
  40
  41 #include <plat/dma.h>
  42 #include <plat/dmtimer.h>
  43 #include <plat/omap-serial.h>
  44
  45 /* SCR register bitmasks */
  46 #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK               (1 << 7)
  47
  48 /* FCR register bitmasks */
  49 #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT                6
  50 #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK                 (0x3 << 6)
  51
  52 static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
  53
  54 /* Forward declaration of functions */
  55 static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
  56 static void serial_omap_rx_timeout(unsigned long uart_no);
  57 static int serial_omap_start_rxdma(struct uart_omap_port *up);
  58
  59 static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
  60 {
  61         offset <<= up->port.regshift;
  62         return readw(up->port.membase + offset);
  63 }
  64
  65 static inline void serial_out(struct uart_omap_port *up, int offset, int value)
  66 {
  67         offset <<= up->port.regshift;
  68         writew(value, up->port.membase + offset);
  69 }
  70
  71 static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
  72 {
  73         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  74         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  75                        UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  76         serial_out(up, UART_FCR, 0);
  77 }
  78
  79 /*
  80  * serial_omap_get_divisor - calculate divisor value
  81  * @port: uart port info
  82  * @baud: baudrate for which divisor needs to be calculated.
  83  *
  84  * We have written our own function to get the divisor so as to support
  85  * 13x mode. 3Mbps Baudrate as an different divisor.
  86  * Reference OMAP TRM Chapter 17:
  87  * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates
  88  * referring to oversampling - divisor value
  89  * baudrate 460,800 to 3,686,400 all have divisor 13
  90  * except 3,000,000 which has divisor value 16
  91  */
  92 static unsigned int
  93 serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
  94 {
  95         unsigned int divisor;
  96
  97         if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
  98                 divisor = 13;
  99         else
 100                 divisor = 16;
 101         return port->uartclk/(baud * divisor);
 102 }
 103
 104 static void serial_omap_stop_rxdma(struct uart_omap_port *up)
 105 {
 106         if (up->uart_dma.rx_dma_used) {
 107                 del_timer(&up->uart_dma.rx_timer);
 108                 omap_stop_dma(up->uart_dma.rx_dma_channel);
 109                 omap_free_dma(up->uart_dma.rx_dma_channel);
 110                 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
 111                 up->uart_dma.rx_dma_used = false;
 112         }
 113 }
 114
 115 static void serial_omap_enable_ms(struct uart_port *port)
 116 {
 117         struct uart_omap_port *up = (struct uart_omap_port *)port;
 118
 119         dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
 120         up->ier |= UART_IER_MSI;
 121         serial_out(up, UART_IER, up->ier);
 122 }
 123
 124 static void serial_omap_stop_tx(struct uart_port *port)
 125 {
 126         struct uart_omap_port *up = (struct uart_omap_port *)port;
 127
 128         if (up->use_dma &&
 129                 up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
 130                 /*
 131                  * Check if dma is still active. If yes do nothing,
 132                  * return. Else stop dma
 133                  */
 134                 if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
 135                         return;
 136                 omap_stop_dma(up->uart_dma.tx_dma_channel);
 137                 omap_free_dma(up->uart_dma.tx_dma_channel);
 138                 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
 139         }
 140
 141         if (up->ier & UART_IER_THRI) {
 142                 up->ier &= ~UART_IER_THRI;
 143                 serial_out(up, UART_IER, up->ier);
 144         }
 145 }
 146
 147 static void serial_omap_stop_rx(struct uart_port *port)
 148 {
 149         struct uart_omap_port *up = (struct uart_omap_port *)port;
 150
 151         if (up->use_dma)
 152                 serial_omap_stop_rxdma(up);
 153         up->ier &= ~UART_IER_RLSI;
 154         up->port.read_status_mask &= ~UART_LSR_DR;
 155         serial_out(up, UART_IER, up->ier);
 156 }
 157
 158 static inline void receive_chars(struct uart_omap_port *up,
 159                 unsigned int *status)
 160 {
 161         struct tty_struct *tty = up->port.state->port.tty;
 162         unsigned int flag, lsr = *status;
 163         unsigned char ch = 0;
 164         int max_count = 256;
 165
 166         do {
 167                 if (likely(lsr & UART_LSR_DR))
 168                         ch = serial_in(up, UART_RX);
 169                 flag = TTY_NORMAL;
 170                 up->port.icount.rx++;
 171
 172                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
 173                         /*
 174                          * For statistics only
 175                          */
 176                         if (lsr & UART_LSR_BI) {
 177                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 178                                 up->port.icount.brk++;
 179                                 /*
 180                                  * We do the SysRQ and SAK checking
 181                                  * here because otherwise the break
 182                                  * may get masked by ignore_status_mask
 183                                  * or read_status_mask.
 184                                  */
 185                                 if (uart_handle_break(&up->port))
 186                                         goto ignore_char;
 187                         } else if (lsr & UART_LSR_PE) {
 188                                 up->port.icount.parity++;
 189                         } else if (lsr & UART_LSR_FE) {
 190                                 up->port.icount.frame++;
 191                         }
 192
 193                         if (lsr & UART_LSR_OE)
 194                                 up->port.icount.overrun++;
 195
 196                         /*
 197                          * Mask off conditions which should be ignored.
 198                          */
 199                         lsr &= up->port.read_status_mask;
 200
 201 #ifdef CONFIG_SERIAL_OMAP_CONSOLE
 202                         if (up->port.line == up->port.cons->index) {
 203                                 /* Recover the break flag from console xmit */
 204                                 lsr |= up->lsr_break_flag;
 205                         }
 206 #endif
 207                         if (lsr & UART_LSR_BI)
 208                                 flag = TTY_BREAK;
 209                         else if (lsr & UART_LSR_PE)
 210                                 flag = TTY_PARITY;
 211                         else if (lsr & UART_LSR_FE)
 212                                 flag = TTY_FRAME;
 213                 }
 214
 215                 if (uart_handle_sysrq_char(&up->port, ch))
 216                         goto ignore_char;
 217                 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
 218 ignore_char:
 219                 lsr = serial_in(up, UART_LSR);
 220         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
 221         spin_unlock(&up->port.lock);
 222         tty_flip_buffer_push(tty);
 223         spin_lock(&up->port.lock);
 224 }
 225
 226 static void transmit_chars(struct uart_omap_port *up)
 227 {
 228         struct circ_buf *xmit = &up->port.state->xmit;
 229         int count;
 230
 231         if (up->port.x_char) {
 232                 serial_out(up, UART_TX, up->port.x_char);
 233                 up->port.icount.tx++;
 234                 up->port.x_char = 0;
 235                 return;
 236         }
 237         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 238                 serial_omap_stop_tx(&up->port);
 239                 return;
 240         }
 241         count = up->port.fifosize / 4;
 242         do {
 243                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 244                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 245                 up->port.icount.tx++;
 246                 if (uart_circ_empty(xmit))
 247                         break;
 248         } while (--count > 0);
 249
 250         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 251                 uart_write_wakeup(&up->port);
 252
 253         if (uart_circ_empty(xmit))
 254                 serial_omap_stop_tx(&up->port);
 255 }
 256
 257 static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
 258 {
 259         if (!(up->ier & UART_IER_THRI)) {
 260                 up->ier |= UART_IER_THRI;
 261                 serial_out(up, UART_IER, up->ier);
 262         }
 263 }
 264
 265 static void serial_omap_start_tx(struct uart_port *port)
 266 {
 267         struct uart_omap_port *up = (struct uart_omap_port *)port;
 268         struct circ_buf *xmit;
 269         unsigned int start;
 270         int ret = 0;
 271
 272         if (!up->use_dma) {
 273                 omap_uart_block_sleep_id(up->pdev->id);
 274                 serial_omap_enable_ier_thri(up);
 275                 return;
 276         }
 277
 278         if (up->uart_dma.tx_dma_used)
 279                 return;
 280
 281         xmit = &up->port.state->xmit;
 282
 283         if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
 284                 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
 285                                 "UART Tx DMA",
 286                                 (void *)uart_tx_dma_callback, up,
 287                                 &(up->uart_dma.tx_dma_channel));
 288
 289                 if (ret < 0) {
 290                         serial_omap_enable_ier_thri(up);
 291                         return;
 292                 }
 293         }
 294         spin_lock(&(up->uart_dma.tx_lock));
 295         up->uart_dma.tx_dma_used = true;
 296         spin_unlock(&(up->uart_dma.tx_lock));
 297
 298         start = up->uart_dma.tx_buf_dma_phys +
 299                                 (xmit->tail & (UART_XMIT_SIZE - 1));
 300
 301         up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
 302         /*
 303          * It is a circular buffer. See if the buffer has wounded back.
 304          * If yes it will have to be transferred in two separate dma
 305          * transfers
 306          */
 307         if (start + up->uart_dma.tx_buf_size >=
 308                         up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
 309                 up->uart_dma.tx_buf_size =
 310                         (up->uart_dma.tx_buf_dma_phys +
 311                         UART_XMIT_SIZE) - start;
 312
 313         omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
 314                                 OMAP_DMA_AMODE_CONSTANT,
 315                                 up->uart_dma.uart_base, 0, 0);
 316         omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
 317                                 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
 318         omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
 319                                 OMAP_DMA_DATA_TYPE_S8,
 320                                 up->uart_dma.tx_buf_size, 1,
 321                                 OMAP_DMA_SYNC_ELEMENT,
 322                                 up->uart_dma.uart_dma_tx, 0);
 323         /* FIXME: Cache maintenance needed here? */
 324         omap_start_dma(up->uart_dma.tx_dma_channel);
 325 }
 326
 327 static unsigned int check_modem_status(struct uart_omap_port *up)
 328 {
 329         unsigned int status;
 330
 331         status = serial_in(up, UART_MSR);
 332         status |= up->msr_saved_flags;
 333         up->msr_saved_flags = 0;
 334         if ((status & UART_MSR_ANY_DELTA) == 0)
 335                 return status;
 336
 337         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
 338             up->port.state != NULL) {
 339                 if (status & UART_MSR_TERI)
 340                         up->port.icount.rng++;
 341                 if (status & UART_MSR_DDSR)
 342                         up->port.icount.dsr++;
 343                 if (status & UART_MSR_DDCD)
 344                         uart_handle_dcd_change
 345                                 (&up->port, status & UART_MSR_DCD);
 346                 if (status & UART_MSR_DCTS)
 347                         uart_handle_cts_change
 348                                 (&up->port, status & UART_MSR_CTS);
 349                 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 350         }
 351
 352         return status;
 353 }
 354
 355 /**
 356  * serial_omap_irq() - This handles the interrupt from one port
 357  * @irq: uart port irq number
 358  * @dev_id: uart port info
 359  */
 360 static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
 361 {
 362         struct uart_omap_port *up = dev_id;
 363         unsigned int iir, lsr;
 364         unsigned long flags;
 365
 366         iir = serial_in(up, UART_IIR);
 367         if (iir & UART_IIR_NO_INT)
 368                 return IRQ_NONE;
 369
 370         spin_lock_irqsave(&up->port.lock, flags);
 371         lsr = serial_in(up, UART_LSR);
 372         if (iir & UART_IIR_RLSI) {
 373                 if (!up->use_dma) {
 374                         if (lsr & UART_LSR_DR)
 375                                 receive_chars(up, &lsr);
 376                 } else {
 377                         up->ier &= ~(UART_IER_RDI | UART_IER_RLSI);
 378                         serial_out(up, UART_IER, up->ier);
 379                         if ((serial_omap_start_rxdma(up) != 0) &&
 380                                         (lsr & UART_LSR_DR))
 381                                 receive_chars(up, &lsr);
 382                 }
 383         }
 384
 385         check_modem_status(up);
 386         if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
 387                 transmit_chars(up);
 388
 389         spin_unlock_irqrestore(&up->port.lock, flags);
 390         up->port_activity = jiffies;
 391         return IRQ_HANDLED;
 392 }
 393
 394 static unsigned int serial_omap_tx_empty(struct uart_port *port)
 395 {
 396         struct uart_omap_port *up = (struct uart_omap_port *)port;
 397         unsigned long flags = 0;
 398         unsigned int ret = 0;
 399
 400         dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
 401         spin_lock_irqsave(&up->port.lock, flags);
 402         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 403         spin_unlock_irqrestore(&up->port.lock, flags);
 404
 405         return ret;
 406 }
 407
 408 static unsigned int serial_omap_get_mctrl(struct uart_port *port)
 409 {
 410         struct uart_omap_port *up = (struct uart_omap_port *)port;
 411         unsigned char status;
 412         unsigned int ret = 0;
 413
 414         status = check_modem_status(up);
 415         dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
 416
 417         if (status & UART_MSR_DCD)
 418                 ret |= TIOCM_CAR;
 419         if (status & UART_MSR_RI)
 420                 ret |= TIOCM_RNG;
 421         if (status & UART_MSR_DSR)
 422                 ret |= TIOCM_DSR;
 423         if (status & UART_MSR_CTS)
 424                 ret |= TIOCM_CTS;
 425         return ret;
 426 }
 427
 428 static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
 429 {
 430         struct uart_omap_port *up = (struct uart_omap_port *)port;
 431         unsigned char mcr = 0;
 432
 433         dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
 434         if (mctrl & TIOCM_RTS)
 435                 mcr |= UART_MCR_RTS;
 436         if (mctrl & TIOCM_DTR)
 437                 mcr |= UART_MCR_DTR;
 438         if (mctrl & TIOCM_OUT1)
 439                 mcr |= UART_MCR_OUT1;
 440         if (mctrl & TIOCM_OUT2)
 441                 mcr |= UART_MCR_OUT2;
 442         if (mctrl & TIOCM_LOOP)
 443                 mcr |= UART_MCR_LOOP;
 444
 445         mcr |= up->mcr;
 446         serial_out(up, UART_MCR, mcr);
 447 }
 448
 449 static void serial_omap_break_ctl(struct uart_port *port, int break_state)
 450 {
 451         struct uart_omap_port *up = (struct uart_omap_port *)port;
 452         unsigned long flags = 0;
 453
 454         dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
 455         spin_lock_irqsave(&up->port.lock, flags);
 456         if (break_state == -1)
 457                 up->lcr |= UART_LCR_SBC;
 458         else
 459                 up->lcr &= ~UART_LCR_SBC;
 460         serial_out(up, UART_LCR, up->lcr);
 461         spin_unlock_irqrestore(&up->port.lock, flags);
 462 }
 463
 464 static int serial_omap_startup(struct uart_port *port)
 465 {
 466         struct uart_omap_port *up = (struct uart_omap_port *)port;
 467         unsigned long flags = 0;
 468         int retval;
 469
 470         /*
 471          * Allocate the IRQ
 472          */
 473         retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
 474                                 up->name, up);
 475         if (retval)
 476                 return retval;
 477
 478         dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
 479
 480         /*
 481          * Clear the FIFO buffers and disable them.
 482          * (they will be reenabled in set_termios())
 483          */
 484         serial_omap_clear_fifos(up);
 485         /* For Hardware flow control */
 486         serial_out(up, UART_MCR, UART_MCR_RTS);
 487
 488         /*
 489          * Clear the interrupt registers.
 490          */
 491         (void) serial_in(up, UART_LSR);
 492         if (serial_in(up, UART_LSR) & UART_LSR_DR)
 493                 (void) serial_in(up, UART_RX);
 494         (void) serial_in(up, UART_IIR);
 495         (void) serial_in(up, UART_MSR);
 496
 497         /*
 498          * Now, initialize the UART
 499          */
 500         serial_out(up, UART_LCR, UART_LCR_WLEN8);
 501         spin_lock_irqsave(&up->port.lock, flags);
 502         /*
 503          * Most PC uarts need OUT2 raised to enable interrupts.
 504          */
 505         up->port.mctrl |= TIOCM_OUT2;
 506         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 507         spin_unlock_irqrestore(&up->port.lock, flags);
 508
 509         up->msr_saved_flags = 0;
 510         if (up->use_dma) {
 511                 free_page((unsigned long)up->port.state->xmit.buf);
 512                 up->port.state->xmit.buf = dma_alloc_coherent(NULL,
 513                         UART_XMIT_SIZE,
 514                         (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
 515                         0);
 516                 init_timer(&(up->uart_dma.rx_timer));
 517                 up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
 518                 up->uart_dma.rx_timer.data = up->pdev->id;
 519                 /* Currently the buffer size is 4KB. Can increase it */
 520                 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
 521                         up->uart_dma.rx_buf_size,
 522                         (dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
 523         }
 524         /*
 525          * Finally, enable interrupts. Note: Modem status interrupts
 526          * are set via set_termios(), which will be occurring imminently
 527          * anyway, so we don't enable them here.
 528          */
 529         up->ier = UART_IER_RLSI | UART_IER_RDI;
 530         serial_out(up, UART_IER, up->ier);
 531
 532         /* Enable module level wake up */
 533         serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
 534
 535         up->port_activity = jiffies;
 536         return 0;
 537 }
 538
 539 static void serial_omap_shutdown(struct uart_port *port)
 540 {
 541         struct uart_omap_port *up = (struct uart_omap_port *)port;
 542         unsigned long flags = 0;
 543
 544         dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
 545         /*
 546          * Disable interrupts from this port
 547          */
 548         up->ier = 0;
 549         serial_out(up, UART_IER, 0);
 550
 551         spin_lock_irqsave(&up->port.lock, flags);
 552         up->port.mctrl &= ~TIOCM_OUT2;
 553         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 554         spin_unlock_irqrestore(&up->port.lock, flags);
 555
 556         /*
 557          * Disable break condition and FIFOs
 558          */
 559         serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
 560         serial_omap_clear_fifos(up);
 561
 562         /*
 563          * Read data port to reset things, and then free the irq
 564          */
 565         if (serial_in(up, UART_LSR) & UART_LSR_DR)
 566                 (void) serial_in(up, UART_RX);
 567         if (up->use_dma) {
 568                 dma_free_coherent(up->port.dev,
 569                         UART_XMIT_SIZE, up->port.state->xmit.buf,
 570                         up->uart_dma.tx_buf_dma_phys);
 571                 up->port.state->xmit.buf = NULL;
 572                 serial_omap_stop_rx(port);
 573                 dma_free_coherent(up->port.dev,
 574                         up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
 575                         up->uart_dma.rx_buf_dma_phys);
 576                 up->uart_dma.rx_buf = NULL;
 577         }
 578         free_irq(up->port.irq, up);
 579 }
 580
 581 static inline void
 582 serial_omap_configure_xonxoff
 583                 (struct uart_omap_port *up, struct ktermios *termios)
 584 {
 585         unsigned char efr = 0;
 586
 587         up->lcr = serial_in(up, UART_LCR);
 588         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 589         up->efr = serial_in(up, UART_EFR);
 590         serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
 591
 592         serial_out(up, UART_XON1, termios->c_cc[VSTART]);
 593         serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
 594
 595         /* clear SW control mode bits */
 596         efr = up->efr;
 597         efr &= OMAP_UART_SW_CLR;
 598
 599         /*
 600          * IXON Flag:
 601          * Enable XON/XOFF flow control on output.
 602          * Transmit XON1, XOFF1
 603          */
 604         if (termios->c_iflag & IXON)
 605                 efr |= OMAP_UART_SW_TX;
 606
 607         /*
 608          * IXOFF Flag:
 609          * Enable XON/XOFF flow control on input.
 610          * Receiver compares XON1, XOFF1.
 611          */
 612         if (termios->c_iflag & IXOFF)
 613                 efr |= OMAP_UART_SW_RX;
 614
 615         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 616         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 617
 618         up->mcr = serial_in(up, UART_MCR);
 619
 620         /*
 621          * IXANY Flag:
 622          * Enable any character to restart output.
 623          * Operation resumes after receiving any
 624          * character after recognition of the XOFF character
 625          */
 626         if (termios->c_iflag & IXANY)
 627                 up->mcr |= UART_MCR_XONANY;
 628
 629         serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 630         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 631         serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
 632         /* Enable special char function UARTi.EFR_REG[5] and
 633          * load the new software flow control mode IXON or IXOFF
 634          * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
 635          */
 636         serial_out(up, UART_EFR, efr | UART_EFR_SCD);
 637         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 638
 639         serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
 640         serial_out(up, UART_LCR, up->lcr);
 641 }
 642
 643 static void
 644 serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
 645                         struct ktermios *old)
 646 {
 647         struct uart_omap_port *up = (struct uart_omap_port *)port;
 648         unsigned char cval = 0;
 649         unsigned char efr = 0;
 650         unsigned long flags = 0;
 651         unsigned int baud, quot;
 652
 653         switch (termios->c_cflag & CSIZE) {
 654         case CS5:
 655                 cval = UART_LCR_WLEN5;
 656                 break;
 657         case CS6:
 658                 cval = UART_LCR_WLEN6;
 659                 break;
 660         case CS7:
 661                 cval = UART_LCR_WLEN7;
 662                 break;
 663         default:
 664         case CS8:
 665                 cval = UART_LCR_WLEN8;
 666                 break;
 667         }
 668
 669         if (termios->c_cflag & CSTOPB)
 670                 cval |= UART_LCR_STOP;
 671         if (termios->c_cflag & PARENB)
 672                 cval |= UART_LCR_PARITY;
 673         if (!(termios->c_cflag & PARODD))
 674                 cval |= UART_LCR_EPAR;
 675
 676         /*
 677          * Ask the core to calculate the divisor for us.
 678          */
 679
 680         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
 681         quot = serial_omap_get_divisor(port, baud);
 682
 683         up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
 684                         UART_FCR_ENABLE_FIFO;
 685         if (up->use_dma)
 686                 up->fcr |= UART_FCR_DMA_SELECT;
 687
 688         /*
 689          * Ok, we're now changing the port state. Do it with
 690          * interrupts disabled.
 691          */
 692         spin_lock_irqsave(&up->port.lock, flags);
 693
 694         /*
 695          * Update the per-port timeout.
 696          */
 697         uart_update_timeout(port, termios->c_cflag, baud);
 698
 699         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 700         if (termios->c_iflag & INPCK)
 701                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 702         if (termios->c_iflag & (BRKINT | PARMRK))
 703                 up->port.read_status_mask |= UART_LSR_BI;
 704
 705         /*
 706          * Characters to ignore
 707          */
 708         up->port.ignore_status_mask = 0;
 709         if (termios->c_iflag & IGNPAR)
 710                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 711         if (termios->c_iflag & IGNBRK) {
 712                 up->port.ignore_status_mask |= UART_LSR_BI;
 713                 /*
 714                  * If we're ignoring parity and break indicators,
 715                  * ignore overruns too (for real raw support).
 716                  */
 717                 if (termios->c_iflag & IGNPAR)
 718                         up->port.ignore_status_mask |= UART_LSR_OE;
 719         }
 720
 721         /*
 722          * ignore all characters if CREAD is not set
 723          */
 724         if ((termios->c_cflag & CREAD) == 0)
 725                 up->port.ignore_status_mask |= UART_LSR_DR;
 726
 727         /*
 728          * Modem status interrupts
 729          */
 730         up->ier &= ~UART_IER_MSI;
 731         if (UART_ENABLE_MS(&up->port, termios->c_cflag))
 732                 up->ier |= UART_IER_MSI;
 733         serial_out(up, UART_IER, up->ier);
 734         serial_out(up, UART_LCR, cval);         /* reset DLAB */
 735         up->scr = OMAP_UART_SCR_TX_EMPTY;
 736
 737         /* FIFOs and DMA Settings */
 738
 739         /* FCR can be changed only when the
 740          * baud clock is not running
 741          * DLL_REG and DLH_REG set to 0.
 742          */
 743         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 744         serial_out(up, UART_DLL, 0);
 745         serial_out(up, UART_DLM, 0);
 746         serial_out(up, UART_LCR, 0);
 747
 748         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 749
 750         up->efr = serial_in(up, UART_EFR);
 751         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 752
 753         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 754         up->mcr = serial_in(up, UART_MCR);
 755         serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 756         /* FIFO ENABLE, DMA MODE */
 757
 758         up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
 759
 760         if (up->use_dma) {
 761                 serial_out(up, UART_TI752_TLR, 0);
 762                 up->scr |= UART_FCR_TRIGGER_4;
 763         } else {
 764                 /* Set receive FIFO threshold to 1 byte */
 765                 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
 766                 up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT);
 767         }
 768
 769         serial_out(up, UART_FCR, up->fcr);
 770         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 771
 772         serial_out(up, UART_OMAP_SCR, up->scr);
 773
 774         serial_out(up, UART_EFR, up->efr);
 775         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 776         serial_out(up, UART_MCR, up->mcr);
 777
 778         /* Protocol, Baud Rate, and Interrupt Settings */
 779
 780         serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
 781         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 782
 783         up->efr = serial_in(up, UART_EFR);
 784         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 785
 786         serial_out(up, UART_LCR, 0);
 787         serial_out(up, UART_IER, 0);
 788         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 789
 790         serial_out(up, UART_DLL, quot & 0xff);          /* LS of divisor */
 791         serial_out(up, UART_DLM, quot >> 8);            /* MS of divisor */
 792
 793         serial_out(up, UART_LCR, 0);
 794         serial_out(up, UART_IER, up->ier);
 795         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 796
 797         serial_out(up, UART_EFR, up->efr);
 798         serial_out(up, UART_LCR, cval);
 799
 800         if (baud > 230400 && baud != 3000000)
 801                 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
 802         else
 803                 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
 804
 805         /* Hardware Flow Control Configuration */
 806
 807         if (termios->c_cflag & CRTSCTS) {
 808                 efr |= (UART_EFR_CTS | UART_EFR_RTS);
 809                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 810
 811                 up->mcr = serial_in(up, UART_MCR);
 812                 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 813
 814                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 815                 up->efr = serial_in(up, UART_EFR);
 816                 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 817
 818                 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
 819                 serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
 820                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 821                 serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
 822                 serial_out(up, UART_LCR, cval);
 823         }
 824
 825         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 826         /* Software Flow Control Configuration */
 827         serial_omap_configure_xonxoff(up, termios);
 828
 829         spin_unlock_irqrestore(&up->port.lock, flags);
 830         dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
 831 }
 832
 833 static void
 834 serial_omap_pm(struct uart_port *port, unsigned int state,
 835                unsigned int oldstate)
 836 {
 837         struct uart_omap_port *up = (struct uart_omap_port *)port;
 838         unsigned char efr;
 839
 840         dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
 841         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 842         efr = serial_in(up, UART_EFR);
 843         serial_out(up, UART_EFR, efr | UART_EFR_ECB);
 844         serial_out(up, UART_LCR, 0);
 845
 846         serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
 847         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 848         serial_out(up, UART_EFR, efr);
 849         serial_out(up, UART_LCR, 0);
 850 }
 851
 852 static void serial_omap_release_port(struct uart_port *port)
 853 {
 854         dev_dbg(port->dev, "serial_omap_release_port+\n");
 855 }
 856
 857 static int serial_omap_request_port(struct uart_port *port)
 858 {
 859         dev_dbg(port->dev, "serial_omap_request_port+\n");
 860         return 0;
 861 }
 862
 863 static void serial_omap_config_port(struct uart_port *port, int flags)
 864 {
 865         struct uart_omap_port *up = (struct uart_omap_port *)port;
 866
 867         dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
 868                                                         up->pdev->id);
 869         up->port.type = PORT_OMAP;
 870 }
 871
 872 static int
 873 serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
 874 {
 875         /* we don't want the core code to modify any port params */
 876         dev_dbg(port->dev, "serial_omap_verify_port+\n");
 877         return -EINVAL;
 878 }
 879
 880 static const char *
 881 serial_omap_type(struct uart_port *port)
 882 {
 883         struct uart_omap_port *up = (struct uart_omap_port *)port;
 884
 885         dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
 886         return up->name;
 887 }
 888
 889 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 890
 891 static inline void wait_for_xmitr(struct uart_omap_port *up)
 892 {
 893         unsigned int status, tmout = 10000;
 894
 895         /* Wait up to 10ms for the character(s) to be sent. */
 896         do {
 897                 status = serial_in(up, UART_LSR);
 898
 899                 if (status & UART_LSR_BI)
 900                         up->lsr_break_flag = UART_LSR_BI;
 901
 902                 if (--tmout == 0)
 903                         break;
 904                 udelay(1);
 905         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
 906
 907         /* Wait up to 1s for flow control if necessary */
 908         if (up->port.flags & UPF_CONS_FLOW) {
 909                 tmout = 1000000;
 910                 for (tmout = 1000000; tmout; tmout--) {
 911                         unsigned int msr = serial_in(up, UART_MSR);
 912
 913                         up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
 914                         if (msr & UART_MSR_CTS)
 915                                 break;
 916
 917                         udelay(1);
 918                 }
 919         }
 920 }
 921
 922 #ifdef CONFIG_CONSOLE_POLL
 923
 924 static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
 925 {
 926         struct uart_omap_port *up = (struct uart_omap_port *)port;
 927         wait_for_xmitr(up);
 928         serial_out(up, UART_TX, ch);
 929 }
 930
 931 static int serial_omap_poll_get_char(struct uart_port *port)
 932 {
 933         struct uart_omap_port *up = (struct uart_omap_port *)port;
 934         unsigned int status = serial_in(up, UART_LSR);
 935
 936         if (!(status & UART_LSR_DR))
 937                 return NO_POLL_CHAR;
 938
 939         return serial_in(up, UART_RX);
 940 }
 941
 942 #endif /* CONFIG_CONSOLE_POLL */
 943
 944 #ifdef CONFIG_SERIAL_OMAP_CONSOLE
 945
 946 static struct uart_omap_port *serial_omap_console_ports[4];
 947
 948 static struct uart_driver serial_omap_reg;
 949
 950 static void serial_omap_console_putchar(struct uart_port *port, int ch)
 951 {
 952         struct uart_omap_port *up = (struct uart_omap_port *)port;
 953
 954         wait_for_xmitr(up);
 955         serial_out(up, UART_TX, ch);
 956 }
 957
 958 static void
 959 serial_omap_console_write(struct console *co, const char *s,
 960                 unsigned int count)
 961 {
 962         struct uart_omap_port *up = serial_omap_console_ports[co->index];
 963         unsigned long flags;
 964         unsigned int ier;
 965         int locked = 1;
 966
 967         local_irq_save(flags);
 968         if (up->port.sysrq)
 969                 locked = 0;
 970         else if (oops_in_progress)
 971                 locked = spin_trylock(&up->port.lock);
 972         else
 973                 spin_lock(&up->port.lock);
 974
 975         /*
 976          * First save the IER then disable the interrupts
 977          */
 978         ier = serial_in(up, UART_IER);
 979         serial_out(up, UART_IER, 0);
 980
 981         uart_console_write(&up->port, s, count, serial_omap_console_putchar);
 982
 983         /*
 984          * Finally, wait for transmitter to become empty
 985          * and restore the IER
 986          */
 987         wait_for_xmitr(up);
 988         serial_out(up, UART_IER, ier);
 989         /*
 990          * The receive handling will happen properly because the
 991          * receive ready bit will still be set; it is not cleared
 992          * on read.  However, modem control will not, we must
 993          * call it if we have saved something in the saved flags
 994          * while processing with interrupts off.
 995          */
 996         if (up->msr_saved_flags)
 997                 check_modem_status(up);
 998
 999         if (locked)
1000                 spin_unlock(&up->port.lock);
1001         local_irq_restore(flags);
1002 }
1003
1004 static int __init
1005 serial_omap_console_setup(struct console *co, char *options)
1006 {
1007         struct uart_omap_port *up;
1008         int baud = 115200;
1009         int bits = 8;
1010         int parity = 'n';
1011         int flow = 'n';
1012
1013         if (serial_omap_console_ports[co->index] == NULL)
1014                 return -ENODEV;
1015         up = serial_omap_console_ports[co->index];
1016
1017         if (options)
1018                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1019
1020         return uart_set_options(&up->port, co, baud, parity, bits, flow);
1021 }
1022
1023 static struct console serial_omap_console = {
1024         .name           = OMAP_SERIAL_NAME,
1025         .write          = serial_omap_console_write,
1026         .device         = uart_console_device,
1027         .setup          = serial_omap_console_setup,
1028         .flags          = CON_PRINTBUFFER,
1029         .index          = -1,
1030         .data           = &serial_omap_reg,
1031 };
1032
1033 static void serial_omap_add_console_port(struct uart_omap_port *up)
1034 {
1035         serial_omap_console_ports[up->pdev->id] = up;
1036 }
1037
1038 #define OMAP_CONSOLE    (&serial_omap_console)
1039
1040 #else
1041
1042 #define OMAP_CONSOLE    NULL
1043
1044 static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1045 {}
1046
1047 #endif
1048
1049 static struct uart_ops serial_omap_pops = {
1050         .tx_empty       = serial_omap_tx_empty,
1051         .set_mctrl      = serial_omap_set_mctrl,
1052         .get_mctrl      = serial_omap_get_mctrl,
1053         .stop_tx        = serial_omap_stop_tx,
1054         .start_tx       = serial_omap_start_tx,
1055         .stop_rx        = serial_omap_stop_rx,
1056         .enable_ms      = serial_omap_enable_ms,
1057         .break_ctl      = serial_omap_break_ctl,
1058         .startup        = serial_omap_startup,
1059         .shutdown       = serial_omap_shutdown,
1060         .set_termios    = serial_omap_set_termios,
1061         .pm             = serial_omap_pm,
1062         .type           = serial_omap_type,
1063         .release_port   = serial_omap_release_port,
1064         .request_port   = serial_omap_request_port,
1065         .config_port    = serial_omap_config_port,
1066         .verify_port    = serial_omap_verify_port,
1067 #ifdef CONFIG_CONSOLE_POLL
1068         .poll_put_char  = serial_omap_poll_put_char,
1069         .poll_get_char  = serial_omap_poll_get_char,
1070 #endif
1071 };
1072
1073 static struct uart_driver serial_omap_reg = {
1074         .owner          = THIS_MODULE,
1075         .driver_name    = "OMAP-SERIAL",
1076         .dev_name       = OMAP_SERIAL_NAME,
1077         .nr             = OMAP_MAX_HSUART_PORTS,
1078         .cons           = OMAP_CONSOLE,
1079 };
1080
1081 static int
1082 serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
1083 {
1084         struct uart_omap_port *up = platform_get_drvdata(pdev);
1085
1086         if (up)
1087                 uart_suspend_port(&serial_omap_reg, &up->port);
1088         return 0;
1089 }
1090
1091 static int serial_omap_resume(struct platform_device *dev)
1092 {
1093         struct uart_omap_port *up = platform_get_drvdata(dev);
1094
1095         if (up)
1096                 uart_resume_port(&serial_omap_reg, &up->port);
1097         return 0;
1098 }
1099
1100 static void serial_omap_rx_timeout(unsigned long uart_no)
1101 {
1102         struct uart_omap_port *up = ui[uart_no];
1103         unsigned int curr_dma_pos, curr_transmitted_size;
1104         int ret = 0;
1105
1106         curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1107         if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1108                              (curr_dma_pos == 0)) {
1109                 if (jiffies_to_msecs(jiffies - up->port_activity) <
1110                                                         RX_TIMEOUT) {
1111                         mod_timer(&up->uart_dma.rx_timer, jiffies +
1112                                 usecs_to_jiffies(up->uart_dma.rx_timeout));
1113                 } else {
1114                         serial_omap_stop_rxdma(up);
1115                         up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1116                         serial_out(up, UART_IER, up->ier);
1117                 }
1118                 return;
1119         }
1120
1121         curr_transmitted_size = curr_dma_pos -
1122                                         up->uart_dma.prev_rx_dma_pos;
1123         up->port.icount.rx += curr_transmitted_size;
1124         tty_insert_flip_string(up->port.state->port.tty,
1125                         up->uart_dma.rx_buf +
1126                         (up->uart_dma.prev_rx_dma_pos -
1127                         up->uart_dma.rx_buf_dma_phys),
1128                         curr_transmitted_size);
1129         tty_flip_buffer_push(up->port.state->port.tty);
1130         up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1131         if (up->uart_dma.rx_buf_size +
1132                         up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1133                 ret = serial_omap_start_rxdma(up);
1134                 if (ret < 0) {
1135                         serial_omap_stop_rxdma(up);
1136                         up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1137                         serial_out(up, UART_IER, up->ier);
1138                 }
1139         } else  {
1140                 mod_timer(&up->uart_dma.rx_timer, jiffies +
1141                         usecs_to_jiffies(up->uart_dma.rx_timeout));
1142         }
1143         up->port_activity = jiffies;
1144 }
1145
1146 static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1147 {
1148         return;
1149 }
1150
1151 static int serial_omap_start_rxdma(struct uart_omap_port *up)
1152 {
1153         int ret = 0;
1154
1155         if (up->uart_dma.rx_dma_channel == -1) {
1156                 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1157                                 "UART Rx DMA",
1158                                 (void *)uart_rx_dma_callback, up,
1159                                 &(up->uart_dma.rx_dma_channel));
1160                 if (ret < 0)
1161                         return ret;
1162
1163                 omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1164                                 OMAP_DMA_AMODE_CONSTANT,
1165                                 up->uart_dma.uart_base, 0, 0);
1166                 omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1167                                 OMAP_DMA_AMODE_POST_INC,
1168                                 up->uart_dma.rx_buf_dma_phys, 0, 0);
1169                 omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1170                                 OMAP_DMA_DATA_TYPE_S8,
1171                                 up->uart_dma.rx_buf_size, 1,
1172                                 OMAP_DMA_SYNC_ELEMENT,
1173                                 up->uart_dma.uart_dma_rx, 0);
1174         }
1175         up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1176         /* FIXME: Cache maintenance needed here? */
1177         omap_start_dma(up->uart_dma.rx_dma_channel);
1178         mod_timer(&up->uart_dma.rx_timer, jiffies +
1179                                 usecs_to_jiffies(up->uart_dma.rx_timeout));
1180         up->uart_dma.rx_dma_used = true;
1181         return ret;
1182 }
1183
1184 static void serial_omap_continue_tx(struct uart_omap_port *up)
1185 {
1186         struct circ_buf *xmit = &up->port.state->xmit;
1187         unsigned int start = up->uart_dma.tx_buf_dma_phys
1188                         + (xmit->tail & (UART_XMIT_SIZE - 1));
1189
1190         if (uart_circ_empty(xmit))
1191                 return;
1192
1193         up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1194         /*
1195          * It is a circular buffer. See if the buffer has wounded back.
1196          * If yes it will have to be transferred in two separate dma
1197          * transfers
1198          */
1199         if (start + up->uart_dma.tx_buf_size >=
1200                         up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1201                 up->uart_dma.tx_buf_size =
1202                         (up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1203         omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1204                                 OMAP_DMA_AMODE_CONSTANT,
1205                                 up->uart_dma.uart_base, 0, 0);
1206         omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1207                                 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1208         omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1209                                 OMAP_DMA_DATA_TYPE_S8,
1210                                 up->uart_dma.tx_buf_size, 1,
1211                                 OMAP_DMA_SYNC_ELEMENT,
1212                                 up->uart_dma.uart_dma_tx, 0);
1213         /* FIXME: Cache maintenance needed here? */
1214         omap_start_dma(up->uart_dma.tx_dma_channel);
1215 }
1216
1217 static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1218 {
1219         struct uart_omap_port *up = (struct uart_omap_port *)data;
1220         struct circ_buf *xmit = &up->port.state->xmit;
1221
1222         xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1223                         (UART_XMIT_SIZE - 1);
1224         up->port.icount.tx += up->uart_dma.tx_buf_size;
1225
1226         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1227                 uart_write_wakeup(&up->port);
1228
1229         if (uart_circ_empty(xmit)) {
1230                 spin_lock(&(up->uart_dma.tx_lock));
1231                 serial_omap_stop_tx(&up->port);
1232                 up->uart_dma.tx_dma_used = false;
1233                 spin_unlock(&(up->uart_dma.tx_lock));
1234         } else {
1235                 omap_stop_dma(up->uart_dma.tx_dma_channel);
1236                 serial_omap_continue_tx(up);
1237         }
1238         up->port_activity = jiffies;
1239         return;
1240 }
1241
1242 static int serial_omap_probe(struct platform_device *pdev)
1243 {
1244         struct uart_omap_port   *up;
1245         struct resource         *mem, *irq, *dma_tx, *dma_rx;
1246         struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1247         int ret = -ENOSPC;
1248
1249         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1250         if (!mem) {
1251                 dev_err(&pdev->dev, "no mem resource?\n");
1252                 return -ENODEV;
1253         }
1254
1255         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1256         if (!irq) {
1257                 dev_err(&pdev->dev, "no irq resource?\n");
1258                 return -ENODEV;
1259         }
1260
1261         if (!request_mem_region(mem->start, resource_size(mem),
1262                                 pdev->dev.driver->name)) {
1263                 dev_err(&pdev->dev, "memory region already claimed\n");
1264                 return -EBUSY;
1265         }
1266
1267         dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1268         if (!dma_rx) {
1269                 ret = -EINVAL;
1270                 goto err;
1271         }
1272
1273         dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1274         if (!dma_tx) {
1275                 ret = -EINVAL;
1276                 goto err;
1277         }
1278
1279         up = kzalloc(sizeof(*up), GFP_KERNEL);
1280         if (up == NULL) {
1281                 ret = -ENOMEM;
1282                 goto do_release_region;
1283         }
1284         sprintf(up->name, "OMAP UART%d", pdev->id);
1285         up->pdev = pdev;
1286         up->port.dev = &pdev->dev;
1287         up->port.type = PORT_OMAP;
1288         up->port.iotype = UPIO_MEM;
1289         up->port.irq = irq->start;
1290
1291         up->port.regshift = 2;
1292         up->port.fifosize = 64;
1293         up->port.ops = &serial_omap_pops;
1294         up->port.line = pdev->id;
1295
1296         up->port.membase = omap_up_info->membase;
1297         up->port.mapbase = omap_up_info->mapbase;
1298         up->port.flags = omap_up_info->flags;
1299         up->port.irqflags = omap_up_info->irqflags;
1300         up->port.uartclk = omap_up_info->uartclk;
1301         up->uart_dma.uart_base = mem->start;
1302
1303         if (omap_up_info->dma_enabled) {
1304                 up->uart_dma.uart_dma_tx = dma_tx->start;
1305                 up->uart_dma.uart_dma_rx = dma_rx->start;
1306                 up->use_dma = 1;
1307                 up->uart_dma.rx_buf_size = 4096;
1308                 up->uart_dma.rx_timeout = 2;
1309                 spin_lock_init(&(up->uart_dma.tx_lock));
1310                 spin_lock_init(&(up->uart_dma.rx_lock));
1311                 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1312                 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1313         }
1314
1315         ui[pdev->id] = up;
1316         serial_omap_add_console_port(up);
1317
1318         ret = uart_add_one_port(&serial_omap_reg, &up->port);
1319         if (ret != 0)
1320                 goto do_release_region;
1321
1322         platform_set_drvdata(pdev, up);
1323         return 0;
1324 err:
1325         dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
1326                                 pdev->id, __func__, ret);
1327 do_release_region:
1328         release_mem_region(mem->start, resource_size(mem));
1329         return ret;
1330 }
1331
1332 static int serial_omap_remove(struct platform_device *dev)
1333 {
1334         struct uart_omap_port *up = platform_get_drvdata(dev);
1335
1336         platform_set_drvdata(dev, NULL);
1337         if (up) {
1338                 uart_remove_one_port(&serial_omap_reg, &up->port);
1339                 kfree(up);
1340         }
1341         return 0;
1342 }
1343
1344 static struct platform_driver serial_omap_driver = {
1345         .probe          = serial_omap_probe,
1346         .remove         = serial_omap_remove,
1347
1348         .suspend        = serial_omap_suspend,
1349         .resume         = serial_omap_resume,
1350         .driver         = {
1351                 .name   = DRIVER_NAME,
1352         },
1353 };
1354
1355 static int __init serial_omap_init(void)
1356 {
1357         int ret;
1358
1359         ret = uart_register_driver(&serial_omap_reg);
1360         if (ret != 0)
1361                 return ret;
1362         ret = platform_driver_register(&serial_omap_driver);
1363         if (ret != 0)
1364                 uart_unregister_driver(&serial_omap_reg);
1365         return ret;
1366 }
1367
1368 static void __exit serial_omap_exit(void)
1369 {
1370         platform_driver_unregister(&serial_omap_driver);
1371         uart_unregister_driver(&serial_omap_reg);
1372 }
1373
1374 module_init(serial_omap_init);
1375 module_exit(serial_omap_exit);
1376
1377 MODULE_DESCRIPTION("OMAP High Speed UART driver");
1378 MODULE_LICENSE("GPL");
1379 MODULE_AUTHOR("Texas Instruments Inc");