2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
37 #include "../rt_config.h"
39 u8 BIT8[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
41 { "none", "wep64", "wep128", "TKIP", "AES", "CKIP64", "CKIP128" };
44 /* BBP register initialization set */
46 struct rt_reg_pair BBPRegTable[] = {
47 {BBP_R65, 0x2C}, /* fix rssi issue */
48 {BBP_R66, 0x38}, /* Also set this default value to pAd->BbpTuning.R66CurrentValue at initial */
50 {BBP_R70, 0xa}, /* BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa */
55 {BBP_R84, 0x99}, /* 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before */
56 {BBP_R86, 0x00}, /* middle range issue, Rory @2008-01-28 */
57 {BBP_R91, 0x04}, /* middle range issue, Rory @2008-01-28 */
58 {BBP_R92, 0x00}, /* middle range issue, Rory @2008-01-28 */
59 {BBP_R103, 0x00}, /* near range high-power issue, requested from Gary @2008-0528 */
60 {BBP_R105, 0x05}, /* 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before. */
61 {BBP_R106, 0x35}, /* for ShortGI throughput */
64 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(struct rt_reg_pair))
67 /* ASIC register initialization sets */
70 struct rt_rtmp_reg_pair MACRegTable[] = {
71 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
72 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
73 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
74 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
75 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
76 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
78 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!
79 #endif /* HW_BEACON_OFFSET // */
81 {LEGACY_BASIC_RATE, 0x0000013f}, /* Basic rate set bitmap */
82 {HT_BASIC_RATE, 0x00008003}, /* Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI. */
83 {MAC_SYS_CTRL, 0x00}, /* 0x1004, , default Disable RX */
84 {RX_FILTR_CFG, 0x17f97}, /*0x1400 , RX filter control, */
85 {BKOFF_SLOT_CFG, 0x209}, /* default set short slot time, CC_DELAY_TIME should be 2 */
86 /*{TX_SW_CFG0, 0x40a06}, // Gary,2006-08-23 */
87 {TX_SW_CFG0, 0x0}, /* Gary,2008-05-21 for CWC test */
88 {TX_SW_CFG1, 0x80606}, /* Gary,2006-08-23 */
89 {TX_LINK_CFG, 0x1020}, /* Gary,2006-08-23 */
90 /*{TX_TIMEOUT_CFG, 0x00182090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT */
91 {TX_TIMEOUT_CFG, 0x000a2090}, /* CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01 */
92 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, /* 0x3018, MAX frame length. Max PSDU = 16kbytes. */
93 {LED_CFG, 0x7f031e46}, /* Gary, 2006-08-23 */
95 {PBF_MAX_PCNT, 0x1F3FBF9F}, /*0x1F3f7f9f}, //Jan, 2006/04/20 */
97 {TX_RTY_CFG, 0x47d01f0f}, /* Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03 */
99 {AUTO_RSP_CFG, 0x00000013}, /* Initial Auto_Responder, because QA will turn off Auto-Responder */
100 {CCK_PROT_CFG, 0x05740003 /*0x01740003 */ }, /* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
101 {OFDM_PROT_CFG, 0x05740003 /*0x01740003 */ }, /* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
103 {PBF_CFG, 0xf40006}, /* Only enable Queue 2 */
104 {MM40_PROT_CFG, 0x3F44084}, /* Initial Auto_Responder, because QA will turn off Auto-Responder */
105 {WPDMA_GLO_CFG, 0x00000030},
106 #endif /* RTMP_MAC_USB // */
107 {GF20_PROT_CFG, 0x01744004}, /* set 19:18 --> Short NAV for MIMO PS */
108 {GF40_PROT_CFG, 0x03F44084},
109 {MM20_PROT_CFG, 0x01744004},
111 {MM40_PROT_CFG, 0x03F54084},
112 #endif /* RTMP_MAC_PCI // */
113 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f *//*0x000024bf */ }, /*Extension channel backoff. */
114 {TX_RTS_CFG, 0x00092b20},
115 {EXP_ACK_TIME, 0x002400ca}, /* default value */
117 {TXOP_HLDR_ET, 0x00000002},
119 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
120 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
121 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
122 will always lost. So we change the SIFS of CCK from 10us to 16us. */
123 {XIFS_TIME_CFG, 0x33a41010},
124 {PWR_PIN_CFG, 0x00000003}, /* patch for 2880-E */
127 struct rt_rtmp_reg_pair STAMACRegTable[] = {
128 {WMM_AIFSN_CFG, 0x00002273},
129 {WMM_CWMIN_CFG, 0x00002344},
130 {WMM_CWMAX_CFG, 0x000034aa},
133 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(struct rt_rtmp_reg_pair))
134 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(struct rt_rtmp_reg_pair))
137 ========================================================================
140 Allocate struct rt_rtmp_adapter data block and do some initialization
143 Adapter Pointer to our adapter
153 ========================================================================
155 int RTMPAllocAdapterBlock(void *handle,
156 struct rt_rtmp_adapter * * ppAdapter)
158 struct rt_rtmp_adapter *pAd;
161 u8 *pBeaconBuf = NULL;
163 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
168 /* Allocate struct rt_rtmp_adapter memory block */
169 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
170 if (pBeaconBuf == NULL) {
171 Status = NDIS_STATUS_FAILURE;
172 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
175 NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
177 Status = AdapterBlockAllocateMemory(handle, (void **) & pAd);
178 if (Status != NDIS_STATUS_SUCCESS) {
179 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
182 pAd->BeaconBuf = pBeaconBuf;
183 DBGPRINT(RT_DEBUG_OFF,
184 ("=== pAd = %p, size = %d ===\n", pAd,
185 (u32)sizeof(struct rt_rtmp_adapter)));
187 /* Init spin locks */
188 NdisAllocateSpinLock(&pAd->MgmtRingLock);
190 NdisAllocateSpinLock(&pAd->RxRingLock);
192 NdisAllocateSpinLock(&pAd->McuCmdLock);
193 #endif /* RT3090 // */
194 #endif /* RTMP_MAC_PCI // */
196 for (index = 0; index < NUM_OF_TX_RING; index++) {
197 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
198 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
199 pAd->DeQueueRunning[index] = FALSE;
202 NdisAllocateSpinLock(&pAd->irq_lock);
206 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
211 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
216 ========================================================================
219 Read initial Tx power per MCS and BW from EEPROM
222 Adapter Pointer to our adapter
231 ========================================================================
233 void RTMPReadTxPwrPerRate(struct rt_rtmp_adapter *pAd)
235 unsigned long data, Adata, Gdata;
236 u16 i, value, value2;
237 int Apwrdelta, Gpwrdelta;
239 BOOLEAN bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
242 /* Get power delta for 20MHz and 40MHz. */
244 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
245 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
249 if ((value2 & 0xff) != 0xff) {
251 Gpwrdelta = (value2 & 0xf);
254 bGpwrdeltaMinus = FALSE;
256 bGpwrdeltaMinus = TRUE;
258 if ((value2 & 0xff00) != 0xff00) {
259 if ((value2 & 0x8000))
260 Apwrdelta = ((value2 & 0xf00) >> 8);
262 if ((value2 & 0x4000))
263 bApwrdeltaMinus = FALSE;
265 bApwrdeltaMinus = TRUE;
267 DBGPRINT(RT_DEBUG_TRACE,
268 ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
271 /* Get Txpower per MCS for 20MHz in 2.4G. */
273 for (i = 0; i < 5; i++) {
274 RT28xx_EEPROM_READ16(pAd,
275 EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i * 4,
278 if (bApwrdeltaMinus == FALSE) {
279 t1 = (value & 0xf) + (Apwrdelta);
282 t2 = ((value & 0xf0) >> 4) + (Apwrdelta);
285 t3 = ((value & 0xf00) >> 8) + (Apwrdelta);
288 t4 = ((value & 0xf000) >> 12) + (Apwrdelta);
292 if ((value & 0xf) > Apwrdelta)
293 t1 = (value & 0xf) - (Apwrdelta);
296 if (((value & 0xf0) >> 4) > Apwrdelta)
297 t2 = ((value & 0xf0) >> 4) - (Apwrdelta);
300 if (((value & 0xf00) >> 8) > Apwrdelta)
301 t3 = ((value & 0xf00) >> 8) - (Apwrdelta);
304 if (((value & 0xf000) >> 12) > Apwrdelta)
305 t4 = ((value & 0xf000) >> 12) - (Apwrdelta);
309 Adata = t1 + (t2 << 4) + (t3 << 8) + (t4 << 12);
310 if (bGpwrdeltaMinus == FALSE) {
311 t1 = (value & 0xf) + (Gpwrdelta);
314 t2 = ((value & 0xf0) >> 4) + (Gpwrdelta);
317 t3 = ((value & 0xf00) >> 8) + (Gpwrdelta);
320 t4 = ((value & 0xf000) >> 12) + (Gpwrdelta);
324 if ((value & 0xf) > Gpwrdelta)
325 t1 = (value & 0xf) - (Gpwrdelta);
328 if (((value & 0xf0) >> 4) > Gpwrdelta)
329 t2 = ((value & 0xf0) >> 4) - (Gpwrdelta);
332 if (((value & 0xf00) >> 8) > Gpwrdelta)
333 t3 = ((value & 0xf00) >> 8) - (Gpwrdelta);
336 if (((value & 0xf000) >> 12) > Gpwrdelta)
337 t4 = ((value & 0xf000) >> 12) - (Gpwrdelta);
341 Gdata = t1 + (t2 << 4) + (t3 << 8) + (t4 << 12);
343 RT28xx_EEPROM_READ16(pAd,
344 EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i * 4 +
346 if (bApwrdeltaMinus == FALSE) {
347 t1 = (value & 0xf) + (Apwrdelta);
350 t2 = ((value & 0xf0) >> 4) + (Apwrdelta);
353 t3 = ((value & 0xf00) >> 8) + (Apwrdelta);
356 t4 = ((value & 0xf000) >> 12) + (Apwrdelta);
360 if ((value & 0xf) > Apwrdelta)
361 t1 = (value & 0xf) - (Apwrdelta);
364 if (((value & 0xf0) >> 4) > Apwrdelta)
365 t2 = ((value & 0xf0) >> 4) - (Apwrdelta);
368 if (((value & 0xf00) >> 8) > Apwrdelta)
369 t3 = ((value & 0xf00) >> 8) - (Apwrdelta);
372 if (((value & 0xf000) >> 12) > Apwrdelta)
373 t4 = ((value & 0xf000) >> 12) - (Apwrdelta);
377 Adata |= ((t1 << 16) + (t2 << 20) + (t3 << 24) + (t4 << 28));
378 if (bGpwrdeltaMinus == FALSE) {
379 t1 = (value & 0xf) + (Gpwrdelta);
382 t2 = ((value & 0xf0) >> 4) + (Gpwrdelta);
385 t3 = ((value & 0xf00) >> 8) + (Gpwrdelta);
388 t4 = ((value & 0xf000) >> 12) + (Gpwrdelta);
392 if ((value & 0xf) > Gpwrdelta)
393 t1 = (value & 0xf) - (Gpwrdelta);
396 if (((value & 0xf0) >> 4) > Gpwrdelta)
397 t2 = ((value & 0xf0) >> 4) - (Gpwrdelta);
400 if (((value & 0xf00) >> 8) > Gpwrdelta)
401 t3 = ((value & 0xf00) >> 8) - (Gpwrdelta);
404 if (((value & 0xf000) >> 12) > Gpwrdelta)
405 t4 = ((value & 0xf000) >> 12) - (Gpwrdelta);
409 Gdata |= ((t1 << 16) + (t2 << 20) + (t3 << 24) + (t4 << 28));
410 data |= (value << 16);
412 /* For 20M/40M Power Delta issue */
413 pAd->Tx20MPwrCfgABand[i] = data;
414 pAd->Tx20MPwrCfgGBand[i] = data;
415 pAd->Tx40MPwrCfgABand[i] = Adata;
416 pAd->Tx40MPwrCfgGBand[i] = Gdata;
418 if (data != 0xffffffff)
419 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i * 4, data);
420 DBGPRINT_RAW(RT_DEBUG_TRACE,
421 ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n",
422 data, Adata, Gdata));
427 ========================================================================
430 Read initial channel power parameters from EEPROM
433 Adapter Pointer to our adapter
442 ========================================================================
444 void RTMPReadChannelPwr(struct rt_rtmp_adapter *pAd)
447 EEPROM_TX_PWR_STRUC Power;
448 EEPROM_TX_PWR_STRUC Power2;
450 /* Read Tx power value for all channels */
451 /* Value from 1 - 0x7f. Default value is 24. */
452 /* Power value : 2.4G 0x00 (0) ~ 0x1F (31) */
453 /* : 5.5G 0xF9 (-7) ~ 0x0F (15) */
455 /* 0. 11b/g, ch1 - ch 14 */
456 for (i = 0; i < 7; i++) {
457 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2,
459 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2,
461 pAd->TxPower[i * 2].Channel = i * 2 + 1;
462 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
464 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
465 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
467 pAd->TxPower[i * 2].Power = Power.field.Byte0;
469 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
470 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
472 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
474 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
475 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
477 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
479 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
480 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
482 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
485 /* 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz) */
486 /* 1.1 Fill up channel */
488 for (i = 0; i < 4; i++) {
489 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
490 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
491 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
493 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
494 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
495 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
497 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
498 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
499 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
502 /* 1.2 Fill up power */
503 for (i = 0; i < 6; i++) {
504 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2,
506 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2,
509 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
510 pAd->TxPower[i * 2 + choffset + 0].Power =
513 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
514 pAd->TxPower[i * 2 + choffset + 1].Power =
517 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
518 pAd->TxPower[i * 2 + choffset + 0].Power2 =
521 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
522 pAd->TxPower[i * 2 + choffset + 1].Power2 =
526 /* 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz) */
527 /* 2.1 Fill up channel */
529 for (i = 0; i < 5; i++) {
530 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
531 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
532 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
534 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
535 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
536 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
538 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
539 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
540 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
542 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
543 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
544 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
546 /* 2.2 Fill up power */
547 for (i = 0; i < 8; i++) {
548 RT28xx_EEPROM_READ16(pAd,
549 EEPROM_A_TX_PWR_OFFSET + (choffset - 14) +
551 RT28xx_EEPROM_READ16(pAd,
552 EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) +
555 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
556 pAd->TxPower[i * 2 + choffset + 0].Power =
559 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
560 pAd->TxPower[i * 2 + choffset + 1].Power =
563 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
564 pAd->TxPower[i * 2 + choffset + 0].Power2 =
567 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
568 pAd->TxPower[i * 2 + choffset + 1].Power2 =
572 /* 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz) */
573 /* 3.1 Fill up channel */
574 choffset = 14 + 12 + 16;
575 /*for (i = 0; i < 2; i++) */
576 for (i = 0; i < 3; i++) {
577 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
578 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
579 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
581 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
582 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
583 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
585 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
586 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
587 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
589 pAd->TxPower[3 * 3 + choffset + 0].Channel = 171;
590 pAd->TxPower[3 * 3 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
591 pAd->TxPower[3 * 3 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
593 pAd->TxPower[3 * 3 + choffset + 1].Channel = 173;
594 pAd->TxPower[3 * 3 + choffset + 1].Power = DEFAULT_RF_TX_POWER;
595 pAd->TxPower[3 * 3 + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
597 /* 3.2 Fill up power */
598 /*for (i = 0; i < 4; i++) */
599 for (i = 0; i < 6; i++) {
600 RT28xx_EEPROM_READ16(pAd,
601 EEPROM_A_TX_PWR_OFFSET + (choffset - 14) +
603 RT28xx_EEPROM_READ16(pAd,
604 EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) +
607 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
608 pAd->TxPower[i * 2 + choffset + 0].Power =
611 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
612 pAd->TxPower[i * 2 + choffset + 1].Power =
615 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
616 pAd->TxPower[i * 2 + choffset + 0].Power2 =
619 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
620 pAd->TxPower[i * 2 + choffset + 1].Power2 =
624 /* 4. Print and Debug */
625 /*choffset = 14 + 12 + 16 + 7; */
626 choffset = 14 + 12 + 16 + 11;
631 ========================================================================
634 Read the following from the registry
635 1. All the parameters
639 Adapter Pointer to our adapter
640 WrapperConfigurationContext For use by NdisOpenConfiguration
645 NDIS_STATUS_RESOURCES
651 ========================================================================
653 int NICReadRegParameters(struct rt_rtmp_adapter *pAd,
654 void *WrapperConfigurationContext)
656 int Status = NDIS_STATUS_SUCCESS;
657 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
662 ========================================================================
665 Read initial parameters from EEPROM
668 Adapter Pointer to our adapter
677 ========================================================================
679 void NICReadEEPROMParameters(struct rt_rtmp_adapter *pAd, u8 *mac_addr)
682 u16 i, value, value2;
684 EEPROM_TX_PWR_STRUC Power;
685 EEPROM_VERSION_STRUC Version;
686 EEPROM_ANTENNA_STRUC Antenna;
687 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
689 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
691 if (pAd->chipOps.eeinit)
692 pAd->chipOps.eeinit(pAd);
694 /* Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8 */
695 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
696 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
698 if ((data & 0x30) == 0)
699 pAd->EEPROMAddressNum = 6; /* 93C46 */
700 else if ((data & 0x30) == 0x10)
701 pAd->EEPROMAddressNum = 8; /* 93C66 */
703 pAd->EEPROMAddressNum = 8; /* 93C86 */
704 DBGPRINT(RT_DEBUG_TRACE,
705 ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum));
707 /* RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to initialize */
708 /* MAC address registers according to E2PROM setting */
709 if (mac_addr == NULL ||
710 strlen((char *)mac_addr) != 17 ||
711 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
712 mac_addr[11] != ':' || mac_addr[14] != ':') {
713 u16 Addr01, Addr23, Addr45;
715 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
716 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
717 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
719 pAd->PermanentAddress[0] = (u8)(Addr01 & 0xff);
720 pAd->PermanentAddress[1] = (u8)(Addr01 >> 8);
721 pAd->PermanentAddress[2] = (u8)(Addr23 & 0xff);
722 pAd->PermanentAddress[3] = (u8)(Addr23 >> 8);
723 pAd->PermanentAddress[4] = (u8)(Addr45 & 0xff);
724 pAd->PermanentAddress[5] = (u8)(Addr45 >> 8);
726 DBGPRINT(RT_DEBUG_TRACE,
727 ("Initialize MAC Address from E2PROM \n"));
732 macptr = (char *)mac_addr;
734 for (j = 0; j < MAC_ADDR_LEN; j++) {
735 AtoH(macptr, &pAd->PermanentAddress[j], 1);
739 DBGPRINT(RT_DEBUG_TRACE,
740 ("Initialize MAC Address from module parameter \n"));
744 /*more conveninet to test mbssid, so ap's bssid &0xf1 */
745 if (pAd->PermanentAddress[0] == 0xff)
746 pAd->PermanentAddress[0] = RandomByte(pAd) & 0xf8;
748 /*if (pAd->PermanentAddress[5] == 0xff) */
749 /* pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8; */
751 DBGPRINT_RAW(RT_DEBUG_TRACE,
752 ("E2PROM MAC: =%pM\n", pAd->PermanentAddress));
753 if (pAd->bLocalAdminMAC == FALSE) {
756 COPY_MAC_ADDR(pAd->CurrentAddress,
757 pAd->PermanentAddress);
758 csr2.field.Byte0 = pAd->CurrentAddress[0];
759 csr2.field.Byte1 = pAd->CurrentAddress[1];
760 csr2.field.Byte2 = pAd->CurrentAddress[2];
761 csr2.field.Byte3 = pAd->CurrentAddress[3];
762 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
764 csr3.field.Byte4 = pAd->CurrentAddress[4];
765 csr3.field.Byte5 = pAd->CurrentAddress[5];
766 csr3.field.U2MeMask = 0xff;
767 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
768 DBGPRINT_RAW(RT_DEBUG_TRACE,
769 ("E2PROM MAC: =%pM\n",
770 pAd->PermanentAddress));
774 /* if not return early. cause fail at emulation. */
775 /* Init the channel number for TX channel power */
776 RTMPReadChannelPwr(pAd);
778 /* if E2PROM version mismatch with driver's expectation, then skip */
779 /* all subsequent E2RPOM retieval and set a system error bit to notify GUI */
780 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
782 Version.field.Version + Version.field.FaeReleaseNumber * 256;
783 DBGPRINT(RT_DEBUG_TRACE,
784 ("E2PROM: Version = %d, FAE release #%d\n",
785 Version.field.Version, Version.field.FaeReleaseNumber));
787 if (Version.field.Version > VALID_EEPROM_VERSION) {
788 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",
789 Version.field.Version, VALID_EEPROM_VERSION));
790 /*pAd->SystemErrorBitmap |= 0x00000001;
792 // hard-code default value when no proper E2PROM installed
793 pAd->bAutoTxAgcA = FALSE;
794 pAd->bAutoTxAgcG = FALSE;
796 // Default the channel power
797 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
798 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
800 // Default the channel power
801 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
802 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
804 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
805 pAd->EEPROMDefaultValue[i] = 0xffff;
808 /* Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd */
809 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
810 pAd->EEPROMDefaultValue[0] = value;
812 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
813 pAd->EEPROMDefaultValue[1] = value;
815 RT28xx_EEPROM_READ16(pAd, 0x38, value); /* Country Region */
816 pAd->EEPROMDefaultValue[2] = value;
818 for (i = 0; i < 8; i++) {
819 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i * 2,
821 pAd->EEPROMDefaultValue[i + 3] = value;
824 /* We have to parse NIC configuration 0 at here. */
825 /* If TSSI did not have preloaded value, it should reset the TxAutoAgc to false */
826 /* Therefore, we have to read TxAutoAgc control beforehand. */
827 /* Read Tx AGC control bit */
828 Antenna.word = pAd->EEPROMDefaultValue[0];
829 if (Antenna.word == 0xFFFF) {
831 if (IS_RT3090(pAd) || IS_RT3390(pAd)) {
833 Antenna.field.RfIcType = RFIC_3020;
834 Antenna.field.TxPath = 1;
835 Antenna.field.RxPath = 1;
837 #endif /* RT30xx // */
841 Antenna.field.RfIcType = RFIC_2820;
842 Antenna.field.TxPath = 1;
843 Antenna.field.RxPath = 2;
844 DBGPRINT(RT_DEBUG_WARN,
845 ("E2PROM error, hard code as 0x%04x\n",
849 /* Choose the desired Tx&Rx stream. */
850 if ((pAd->CommonCfg.TxStream == 0)
851 || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
852 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
854 if ((pAd->CommonCfg.RxStream == 0)
855 || (pAd->CommonCfg.RxStream > Antenna.field.RxPath)) {
856 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
858 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
859 (pAd->CommonCfg.RxStream > 2)) {
860 /* only 2 Rx streams for RT2860 series */
861 pAd->CommonCfg.RxStream = 2;
865 /* read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2 */
867 for (i = 0; i < 3; i++) {
870 NicConfig2.word = pAd->EEPROMDefaultValue[1];
873 if ((NicConfig2.word & 0x00ff) == 0xff) {
874 NicConfig2.word &= 0xff00;
877 if ((NicConfig2.word >> 8) == 0xff) {
878 NicConfig2.word &= 0x00ff;
882 if (NicConfig2.field.DynamicTxAgcControl == 1)
883 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
885 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
887 DBGPRINT_RAW(RT_DEBUG_TRACE,
888 ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n",
889 Antenna.field.RxPath, Antenna.field.TxPath));
891 /* Save the antenna for future use */
892 pAd->Antenna.word = Antenna.word;
894 /* Set the RfICType here, then we can initialize RFIC related operation callbacks */
895 pAd->Mlme.RealRxPath = (u8)Antenna.field.RxPath;
896 pAd->RfIcType = (u8)Antenna.field.RfIcType;
898 #ifdef RTMP_RF_RW_SUPPORT
899 RtmpChipOpsRFHook(pAd);
900 #endif /* RTMP_RF_RW_SUPPORT // */
903 sprintf((char *)pAd->nickname, "RT2860STA");
904 #endif /* RTMP_MAC_PCI // */
907 /* Reset PhyMode if we don't support 802.11a */
908 /* Only RFIC_2850 & RFIC_2750 support 802.11a */
910 if ((Antenna.field.RfIcType != RFIC_2850)
911 && (Antenna.field.RfIcType != RFIC_2750)
912 && (Antenna.field.RfIcType != RFIC_3052)) {
913 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
914 (pAd->CommonCfg.PhyMode == PHY_11A))
915 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
916 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
917 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
918 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
919 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
920 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
922 /* Read TSSI reference and TSSI boundary for temperature compensation. This is ugly */
925 /* these are tempature reference value (0x00 ~ 0xFE)
926 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
927 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
928 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
929 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
930 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
931 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
932 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
933 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
934 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
935 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
936 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
937 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
938 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
939 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
940 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
941 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
942 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
943 pAd->TxAgcStepG = Power.field.Byte1;
944 pAd->TxAgcCompensateG = 0;
945 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
946 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
948 /* Disable TxAgc if the based value is not right */
949 if (pAd->TssiRefG == 0xff)
950 pAd->bAutoTxAgcG = FALSE;
952 DBGPRINT(RT_DEBUG_TRACE,
953 ("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
954 pAd->TssiMinusBoundaryG[4],
955 pAd->TssiMinusBoundaryG[3],
956 pAd->TssiMinusBoundaryG[2],
957 pAd->TssiMinusBoundaryG[1], pAd->TssiRefG,
958 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2],
959 pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
960 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
964 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
965 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
966 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
967 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
968 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
969 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
970 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
971 pAd->TssiRefA = Power.field.Byte0;
972 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
973 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
974 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
975 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
976 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
977 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
978 pAd->TxAgcStepA = Power.field.Byte1;
979 pAd->TxAgcCompensateA = 0;
980 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
981 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
983 /* Disable TxAgc if the based value is not right */
984 if (pAd->TssiRefA == 0xff)
985 pAd->bAutoTxAgcA = FALSE;
987 DBGPRINT(RT_DEBUG_TRACE,
988 ("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
989 pAd->TssiMinusBoundaryA[4],
990 pAd->TssiMinusBoundaryA[3],
991 pAd->TssiMinusBoundaryA[2],
992 pAd->TssiMinusBoundaryA[1], pAd->TssiRefA,
993 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2],
994 pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
995 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
997 pAd->BbpRssiToDbmDelta = 0x0;
999 /* Read frequency offset setting for RF */
1000 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1001 if ((value & 0x00FF) != 0x00FF)
1002 pAd->RfFreqOffset = (unsigned long)(value & 0x00FF);
1004 pAd->RfFreqOffset = 0;
1005 DBGPRINT(RT_DEBUG_TRACE,
1006 ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1008 /*CountryRegion byte offset (38h) */
1009 value = pAd->EEPROMDefaultValue[2] >> 8; /* 2.4G band */
1010 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; /* 5G band */
1012 if ((value <= REGION_MAXIMUM_BG_BAND)
1013 && (value2 <= REGION_MAXIMUM_A_BAND)) {
1014 pAd->CommonCfg.CountryRegion = ((u8)value) | 0x80;
1015 pAd->CommonCfg.CountryRegionForABand = ((u8)value2) | 0x80;
1016 TmpPhy = pAd->CommonCfg.PhyMode;
1017 pAd->CommonCfg.PhyMode = 0xff;
1018 RTMPSetPhyMode(pAd, TmpPhy);
1022 /* Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch. */
1023 /* The valid value are (-10 ~ 10) */
1025 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1026 pAd->BGRssiOffset0 = value & 0x00ff;
1027 pAd->BGRssiOffset1 = (value >> 8);
1028 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET + 2, value);
1029 pAd->BGRssiOffset2 = value & 0x00ff;
1030 pAd->ALNAGain1 = (value >> 8);
1031 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1032 pAd->BLNAGain = value & 0x00ff;
1033 pAd->ALNAGain0 = (value >> 8);
1035 /* Validate 11b/g RSSI_0 offset. */
1036 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1037 pAd->BGRssiOffset0 = 0;
1039 /* Validate 11b/g RSSI_1 offset. */
1040 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1041 pAd->BGRssiOffset1 = 0;
1043 /* Validate 11b/g RSSI_2 offset. */
1044 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1045 pAd->BGRssiOffset2 = 0;
1047 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1048 pAd->ARssiOffset0 = value & 0x00ff;
1049 pAd->ARssiOffset1 = (value >> 8);
1050 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET + 2), value);
1051 pAd->ARssiOffset2 = value & 0x00ff;
1052 pAd->ALNAGain2 = (value >> 8);
1054 if (((u8)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1055 pAd->ALNAGain1 = pAd->ALNAGain0;
1056 if (((u8)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1057 pAd->ALNAGain2 = pAd->ALNAGain0;
1059 /* Validate 11a RSSI_0 offset. */
1060 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1061 pAd->ARssiOffset0 = 0;
1063 /* Validate 11a RSSI_1 offset. */
1064 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1065 pAd->ARssiOffset1 = 0;
1067 /*Validate 11a RSSI_2 offset. */
1068 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1069 pAd->ARssiOffset2 = 0;
1073 /* Get TX mixer gain setting */
1074 /* 0xff are invalid value */
1075 /* Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero. */
1076 /* RT359X default value is 0x02 */
1078 if (IS_RT30xx(pAd) || IS_RT3572(pAd)) {
1079 RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1080 pAd->TxMixerGain24G = 0;
1082 if (value != 0xff) {
1084 pAd->TxMixerGain24G = (u8)value;
1087 #endif /* RT30xx // */
1090 /* Get LED Setting. */
1092 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1093 pAd->LedCntl.word = (value >> 8);
1094 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1096 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1098 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1101 RTMPReadTxPwrPerRate(pAd);
1104 #ifdef RTMP_EFUSE_SUPPORT
1105 RtmpEfuseSupportCheck(pAd);
1106 #endif /* RTMP_EFUSE_SUPPORT // */
1107 #endif /* RT30xx // */
1109 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1113 ========================================================================
1115 Routine Description:
1116 Set default value from EEPROM
1119 Adapter Pointer to our adapter
1124 IRQL = PASSIVE_LEVEL
1128 ========================================================================
1130 void NICInitAsicFromEEPROM(struct rt_rtmp_adapter *pAd)
1135 /* EEPROM_ANTENNA_STRUC Antenna; */
1136 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1139 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1140 for (i = 3; i < NUM_EEPROM_BBP_PARMS; i++) {
1141 u8 BbpRegIdx, BbpValue;
1143 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF)
1144 && (pAd->EEPROMDefaultValue[i] != 0)) {
1145 BbpRegIdx = (u8)(pAd->EEPROMDefaultValue[i] >> 8);
1146 BbpValue = (u8)(pAd->EEPROMDefaultValue[i] & 0xff);
1147 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1151 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1154 if ((NicConfig2.word & 0x00ff) == 0xff) {
1155 NicConfig2.word &= 0xff00;
1158 if ((NicConfig2.word >> 8) == 0xff) {
1159 NicConfig2.word &= 0x00ff;
1163 /* Save the antenna for future use */
1164 pAd->NicConfig2.word = NicConfig2.word;
1167 /* set default antenna as main */
1168 if (pAd->RfIcType == RFIC_3020)
1169 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1170 #endif /* RT30xx // */
1173 /* Send LED Setting to MCU. */
1175 if (pAd->LedCntl.word == 0xFF) {
1176 pAd->LedCntl.word = 0x01;
1182 #endif /* RTMP_MAC_PCI // */
1185 #endif /* RTMP_MAC_USB // */
1188 AsicSendCommandToMcu(pAd, 0x52, 0xff, (u8)pAd->Led1,
1189 (u8)(pAd->Led1 >> 8));
1190 AsicSendCommandToMcu(pAd, 0x53, 0xff, (u8)pAd->Led2,
1191 (u8)(pAd->Led2 >> 8));
1192 AsicSendCommandToMcu(pAd, 0x54, 0xff, (u8)pAd->Led3,
1193 (u8)(pAd->Led3 >> 8));
1194 AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1196 pAd->LedIndicatorStrength = 0xFF;
1197 RTMPSetSignalLED(pAd, -100); /* Force signal strength Led to be turned off, before link up */
1200 /* Read Hardware controlled Radio state enable bit */
1201 if (NicConfig2.field.HardwareRadioControl == 1) {
1202 pAd->StaCfg.bHardwareRadio = TRUE;
1204 /* Read GPIO pin2 as Hardware controlled radio state */
1205 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1206 if ((data & 0x04) == 0) {
1207 pAd->StaCfg.bHwRadio = FALSE;
1208 pAd->StaCfg.bRadio = FALSE;
1209 /* RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818); */
1210 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1213 pAd->StaCfg.bHardwareRadio = FALSE;
1215 if (pAd->StaCfg.bRadio == FALSE) {
1216 RTMPSetLED(pAd, LED_RADIO_OFF);
1218 RTMPSetLED(pAd, LED_RADIO_ON);
1221 AsicSendCommandToMcu(pAd, 0x30, PowerRadioOffCID, 0xff,
1223 AsicCheckCommanOk(pAd, PowerRadioOffCID);
1224 #endif /* RT3090 // */
1226 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1227 #endif /* RT3090 // */
1228 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00,
1230 /* 2-1. wait command ok. */
1231 AsicCheckCommanOk(pAd, PowerWakeCID);
1232 #endif /* RTMP_MAC_PCI // */
1238 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
1239 struct rt_rtmp_chip_op *pChipOps = &pAd->chipOps;
1240 if (pChipOps->AsicReverseRfFromSleepMode)
1241 pChipOps->AsicReverseRfFromSleepMode(pAd);
1243 /* 3090 MCU Wakeup command needs more time to be stable. */
1244 /* Before stable, don't issue other MCU command to prevent from firmware error. */
1246 if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1247 && IS_VERSION_AFTER_F(pAd)
1248 && (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3)
1249 && (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE)) {
1250 DBGPRINT(RT_DEBUG_TRACE, ("%s, release Mcu Lock\n", __func__));
1251 RTMP_SEM_LOCK(&pAd->McuCmdLock);
1252 pAd->brt30xxBanMcuCmd = FALSE;
1253 RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
1255 #endif /* RT30xx // */
1256 #endif /* RTMP_MAC_PCI // */
1258 /* Turn off patching for cardbus controller */
1259 if (NicConfig2.field.CardbusAcceleration == 1) {
1260 /* pAd->bTest1 = TRUE; */
1263 if (NicConfig2.field.DynamicTxAgcControl == 1)
1264 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1266 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1268 /* Since BBP has been progamed, to make sure BBP setting will be */
1269 /* upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND! */
1271 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1273 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1275 if (pAd->Antenna.field.RxPath == 3) {
1277 } else if (pAd->Antenna.field.RxPath == 2) {
1279 } else if (pAd->Antenna.field.RxPath == 1) {
1282 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1285 /* Handle the difference when 1T */
1286 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1287 if (pAd->Antenna.field.TxPath == 1) {
1290 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1292 DBGPRINT(RT_DEBUG_TRACE,
1293 ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1294 pAd->CommonCfg.bHardwareRadio,
1295 pAd->CommonCfg.bHardwareRadio));
1300 /* update registers from EEPROM for RT3071 or later(3572/3592). */
1302 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
1303 u8 RegIdx, RegValue;
1306 /* after RT3071, write BBP from EEPROM 0xF0 to 0x102 */
1307 for (i = 0xF0; i <= 0x102; i = i + 2) {
1309 RT28xx_EEPROM_READ16(pAd, i, value);
1310 if ((value != 0xFFFF) && (value != 0)) {
1311 RegIdx = (u8)(value >> 8);
1312 RegValue = (u8)(value & 0xff);
1313 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx,
1315 DBGPRINT(RT_DEBUG_TRACE,
1316 ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n",
1317 i, RegIdx, RegValue));
1321 /* after RT3071, write RF from EEPROM 0x104 to 0x116 */
1322 for (i = 0x104; i <= 0x116; i = i + 2) {
1324 RT28xx_EEPROM_READ16(pAd, i, value);
1325 if ((value != 0xFFFF) && (value != 0)) {
1326 RegIdx = (u8)(value >> 8);
1327 RegValue = (u8)(value & 0xff);
1328 RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
1329 DBGPRINT(RT_DEBUG_TRACE,
1330 ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n",
1331 i, RegIdx, RegValue));
1335 #endif /* RT30xx // */
1336 #endif /* RTMP_MAC_USB // */
1338 DBGPRINT(RT_DEBUG_TRACE,
1339 ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1340 pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1341 pAd->RfIcType, pAd->LedCntl.word));
1342 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1346 ========================================================================
1348 Routine Description:
1349 Initialize NIC hardware
1352 Adapter Pointer to our adapter
1357 IRQL = PASSIVE_LEVEL
1361 ========================================================================
1363 int NICInitializeAdapter(struct rt_rtmp_adapter *pAd, IN BOOLEAN bHardReset)
1365 int Status = NDIS_STATUS_SUCCESS;
1366 WPDMA_GLO_CFG_STRUC GloCfg;
1369 DELAY_INT_CFG_STRUC IntCfg;
1370 #endif /* RTMP_MAC_PCI // */
1371 /* INT_MASK_CSR_STRUC IntMask; */
1372 unsigned long i = 0, j = 0;
1373 AC_TXOP_CSR0_STRUC csr0;
1375 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1377 /* 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits: */
1381 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1382 if ((GloCfg.field.TxDMABusy == 0)
1383 && (GloCfg.field.RxDMABusy == 0))
1386 RTMPusecDelay(1000);
1389 DBGPRINT(RT_DEBUG_TRACE,
1390 ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1391 GloCfg.word &= 0xff0;
1392 GloCfg.field.EnTXWriteBackDDONE = 1;
1393 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1395 /* Record HW Beacon offset */
1396 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1397 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1398 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1399 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1400 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1401 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1402 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1403 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1406 /* write all shared Ring's base address into ASIC */
1409 /* asic simulation sequence put this ahead before loading firmware. */
1410 /* pbf hardware reset */
1412 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); /* 0x10000 for reset rx, 0x3f resets all 6 tx rings. */
1413 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1414 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1415 #endif /* RTMP_MAC_PCI // */
1417 /* Initialze ASIC for TX & Rx operation */
1418 if (NICInitializeAsic(pAd, bHardReset) != NDIS_STATUS_SUCCESS) {
1420 NICLoadFirmware(pAd);
1423 return NDIS_STATUS_FAILURE;
1427 /* Write AC_BK base address register */
1429 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1430 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1431 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1433 /* Write AC_BE base address register */
1435 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1436 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1437 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1439 /* Write AC_VI base address register */
1441 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1442 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1443 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1445 /* Write AC_VO base address register */
1447 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1448 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1449 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1451 /* Write MGMT_BASE_CSR register */
1452 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1453 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1454 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1456 /* Write RX_BASE_CSR register */
1457 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1458 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1459 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1461 /* Init RX Ring index pointer */
1462 pAd->RxRing.RxSwReadIdx = 0;
1463 pAd->RxRing.RxCpuIdx = RX_RING_SIZE - 1;
1464 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1466 /* Init TX rings index pointer */
1468 for (i = 0; i < NUM_OF_TX_RING; i++) {
1469 pAd->TxRing[i].TxSwFreeIdx = 0;
1470 pAd->TxRing[i].TxCpuIdx = 0;
1471 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10),
1472 pAd->TxRing[i].TxCpuIdx);
1476 /* init MGMT ring index pointer */
1477 pAd->MgmtRing.TxSwFreeIdx = 0;
1478 pAd->MgmtRing.TxCpuIdx = 0;
1479 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
1482 /* set each Ring's SIZE into ASIC. Descriptor Size is fixed by design. */
1485 /* Write TX_RING_CSR0 register */
1486 Value = TX_RING_SIZE;
1487 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1488 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1489 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1490 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1491 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1492 Value = MGMT_RING_SIZE;
1493 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1495 /* Write RX_RING_CSR register */
1496 Value = RX_RING_SIZE;
1497 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1498 #endif /* RTMP_MAC_PCI // */
1502 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1503 if (pAd->CommonCfg.PhyMode == PHY_11B) {
1504 csr0.field.Ac0Txop = 192; /* AC_VI: 192*32us ~= 6ms */
1505 csr0.field.Ac1Txop = 96; /* AC_VO: 96*32us ~= 3ms */
1507 csr0.field.Ac0Txop = 96; /* AC_VI: 96*32us ~= 3ms */
1508 csr0.field.Ac1Txop = 48; /* AC_VO: 48*32us ~= 1.5ms */
1510 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1513 /* 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits: */
1516 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1517 if ((GloCfg.field.TxDMABusy == 0)
1518 && (GloCfg.field.RxDMABusy == 0))
1521 RTMPusecDelay(1000);
1525 GloCfg.word &= 0xff0;
1526 GloCfg.field.EnTXWriteBackDDONE = 1;
1527 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1530 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1531 #endif /* RTMP_MAC_PCI // */
1535 /* Status = NICLoadFirmware(pAd); */
1537 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1542 ========================================================================
1544 Routine Description:
1548 Adapter Pointer to our adapter
1553 IRQL = PASSIVE_LEVEL
1557 ========================================================================
1559 int NICInitializeAsic(struct rt_rtmp_adapter *pAd, IN BOOLEAN bHardReset)
1561 unsigned long Index = 0;
1563 u32 MacCsr12 = 0, Counter = 0;
1568 #endif /* RTMP_MAC_USB // */
1572 #endif /* RT30xx // */
1576 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1579 RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); /* To fix driver disable/enable hang issue when radio off */
1580 if (bHardReset == TRUE) {
1581 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1583 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1585 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1586 /* Initialize MAC register to default value */
1587 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++) {
1588 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register,
1589 MACRegTable[Index].Value);
1593 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++) {
1594 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register,
1595 STAMACRegTable[Index].Value);
1598 #endif /* RTMP_MAC_PCI // */
1601 /* Make sure MAC gets ready after NICLoadFirmware(). */
1605 /*To avoid hang-on issue when interface up in kernel 2.4, */
1606 /*we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly. */
1608 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1610 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1614 } while (Index++ < 100);
1616 pAd->MACVersion = MacCsr0;
1617 DBGPRINT(RT_DEBUG_TRACE,
1618 ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
1619 /* turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue. */
1620 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
1621 MacCsr12 &= (~0x2000);
1622 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
1624 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1625 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
1626 Status = RTUSBVenderReset(pAd);
1628 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1630 /* Initialize MAC register to default value */
1631 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++) {
1633 if ((MACRegTable[Index].Register == TX_SW_CFG0)
1634 && (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)
1635 || IS_RT3090(pAd) || IS_RT3390(pAd))) {
1636 MACRegTable[Index].Value = 0x00000400;
1638 #endif /* RT30xx // */
1639 RTMP_IO_WRITE32(pAd, (u16)MACRegTable[Index].Register,
1640 MACRegTable[Index].Value);
1644 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++) {
1645 RTMP_IO_WRITE32(pAd,
1646 (u16)STAMACRegTable[Index].Register,
1647 STAMACRegTable[Index].Value);
1650 #endif /* RTMP_MAC_USB // */
1653 /* Initialize RT3070 serial MAC registers which is different from RT2870 serial */
1654 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
1655 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1657 /* RT3071 version E has fixed this issue */
1658 if ((pAd->MACVersion & 0xffff) < 0x0211) {
1659 if (pAd->NicConfig2.field.DACTestBit == 1) {
1660 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); /* To fix throughput drop drastically */
1662 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); /* To fix throughput drop drastically */
1665 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1667 } else if (IS_RT3070(pAd)) {
1668 if (((pAd->MACVersion & 0xffff) < 0x0201)) {
1669 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1670 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); /* To fix throughput drop drastically */
1672 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1675 #endif /* RT30xx // */
1678 /* Before program BBP, we need to wait BBP/RF get wake up. */
1682 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1684 if ((MacCsr12 & 0x03) == 0) /* if BB.RF is stable */
1687 DBGPRINT(RT_DEBUG_TRACE,
1688 ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
1689 RTMPusecDelay(1000);
1690 } while (Index++ < 100);
1692 /* The commands to firmware should be after these commands, these commands will init firmware */
1693 /* PCI and USB are not the same because PCI driver needs to wait for PCI bus ready */
1694 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); /* initialize BBP R/W access agent */
1695 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1697 /*2008/11/28:KH add to fix the dead rf frequency offset bug<-- */
1698 AsicSendCommandToMcu(pAd, 0x72, 0, 0, 0);
1699 /*2008/11/28:KH add to fix the dead rf frequency offset bug--> */
1700 #endif /* RT3090 // */
1701 RTMPusecDelay(1000);
1703 /* Read BBP register, make sure BBP is up and running before write new data */
1706 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1707 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1708 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1709 /*ASSERT(Index < 20); //this will cause BSOD on Check-build driver */
1711 if ((R0 == 0xff) || (R0 == 0x00))
1712 return NDIS_STATUS_FAILURE;
1714 /* Initialize BBP register to default value */
1715 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++) {
1716 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register,
1717 BBPRegTable[Index].Value);
1721 /* TODO: shiang, check MACVersion, currently, rbus-based chip use this. */
1722 if (pAd->MACVersion == 0x28720200) {
1724 unsigned long value2;
1726 /*disable MLD by Bruce 20080704 */
1727 /*BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value); */
1728 /*BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4); */
1730 /*Maximum PSDU length from 16K to 32K bytes */
1731 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1732 value2 &= ~(0x3 << 12);
1733 value2 |= (0x2 << 12);
1734 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1736 #endif /* RTMP_MAC_PCI // */
1738 /* for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT. */
1739 /* RT3090 should not program BBP R84 to 0x19, otherwise TX will block. */
1740 /*3070/71/72,3090,3090A( are included in RT30xx),3572,3390 */
1741 if (((pAd->MACVersion & 0xffff) != 0x0101)
1742 && !(IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)))
1743 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1746 /* add by johnli, RF power sequence setup */
1747 if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) { /*update for RT3070/71/72/90/91/92,3572,3390. */
1748 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1749 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1750 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1753 if (IS_RT3090(pAd) || IS_RT3390(pAd)) /* RT309x, RT3071/72 */
1755 /* enable DC filter */
1756 if ((pAd->MACVersion & 0xffff) >= 0x0211) {
1757 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1759 /* improve power consumption */
1760 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1761 if (pAd->Antenna.field.TxPath == 1) {
1762 /* turn off tx DAC_1 */
1763 bbpreg = (bbpreg | 0x20);
1766 if (pAd->Antenna.field.RxPath == 1) {
1767 /* turn off tx ADC_1 */
1770 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1772 /* improve power consumption in RT3071 Ver.E */
1773 if ((pAd->MACVersion & 0xffff) >= 0x0211) {
1774 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1776 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1778 } else if (IS_RT3070(pAd)) {
1779 if ((pAd->MACVersion & 0xffff) >= 0x0201) {
1780 /* enable DC filter */
1781 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1783 /* improve power consumption in RT3070 Ver.F */
1784 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1786 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1788 /* TX_LO1_en, RF R17 register Bit 3 to 0 */
1789 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1791 /* to fix rx long range issue */
1792 if (pAd->NicConfig2.field.ExternalLNAForG == 0) {
1795 /* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h */
1796 if (pAd->TxMixerGain24G >= 1) {
1797 RFValue &= (~0x7); /* clean bit [2:0] */
1798 RFValue |= pAd->TxMixerGain24G;
1800 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1803 #endif /* RT30xx // */
1805 if (pAd->MACVersion == 0x28600100) {
1806 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1807 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1810 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) /* 3*3 */
1812 /* enlarge MAX_LEN_CFG */
1814 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1817 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1822 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0, 0 };
1824 /*Initialize WCID table */
1826 for (Index = 0; Index < 254; Index++) {
1827 RTUSBMultiWrite(pAd,
1828 (u16)(MAC_WCID_BASE + Index * 8),
1832 #endif /* RTMP_MAC_USB // */
1834 /* Add radio off control */
1836 if (pAd->StaCfg.bRadio == FALSE) {
1837 /* RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818); */
1838 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1839 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1843 /* Clear raw counters */
1844 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1845 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1846 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1847 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1848 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1849 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1851 /* ASIC will keep garbage value after boot */
1852 /* Clear all shared key table when initial */
1853 /* This routine can be ignored in radio-ON/OFF operation. */
1855 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++) {
1856 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4 * KeyIdx,
1860 /* Clear all pairwise key table when initial */
1861 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++) {
1862 RTMP_IO_WRITE32(pAd,
1863 MAC_WCID_ATTRIBUTE_BASE +
1864 (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1867 /* assert HOST ready bit */
1868 /* RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark */
1869 /* RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4); */
1871 /* It isn't necessary to clear this space when not hard reset. */
1872 if (bHardReset == TRUE) {
1873 /* clear all on-chip BEACON frame space */
1874 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++) {
1875 for (i = 0; i < HW_BEACON_OFFSET >> 2; i += 4)
1876 RTMP_IO_WRITE32(pAd,
1877 pAd->BeaconOffset[apidx] + i,
1882 AsicDisableSync(pAd);
1883 /* Clear raw counters */
1884 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1885 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1886 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1887 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1888 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1889 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1890 /* Default PCI clock cycle per ms is different as default setting, which is based on PCI. */
1891 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
1892 Counter &= 0xffffff00;
1893 Counter |= 0x000001e;
1894 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
1895 #endif /* RTMP_MAC_USB // */
1898 /* for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT. */
1899 if ((pAd->MACVersion & 0xffff) != 0x0101)
1900 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1903 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1904 return NDIS_STATUS_SUCCESS;
1908 ========================================================================
1910 Routine Description:
1914 Adapter Pointer to our adapter
1919 IRQL = PASSIVE_LEVEL
1922 Reset NIC to initial state AS IS system boot up time.
1924 ========================================================================
1926 void NICIssueReset(struct rt_rtmp_adapter *pAd)
1929 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1931 /* Abort Tx, prevent ASIC from writing to Host memory */
1932 /*RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000); */
1934 /* Disable Rx, register value supposed will remain after reset */
1935 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1936 Value &= (0xfffffff3);
1937 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1939 /* Issue reset and clear from reset state */
1940 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); /* 2004-09-17 change from 0x01 */
1941 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
1943 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
1947 ========================================================================
1949 Routine Description:
1950 Check ASIC registers and find any reason the system might hang
1953 Adapter Pointer to our adapter
1958 IRQL = DISPATCH_LEVEL
1960 ========================================================================
1962 BOOLEAN NICCheckForHang(struct rt_rtmp_adapter *pAd)
1967 void NICUpdateFifoStaCounters(struct rt_rtmp_adapter *pAd)
1969 TX_STA_FIFO_STRUC StaFifo;
1970 struct rt_mac_table_entry *pEntry;
1972 u8 pid = 0, wcid = 0;
1977 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
1979 if (StaFifo.field.bValid == 0)
1982 wcid = (u8)StaFifo.field.wcid;
1984 /* ignore NoACK and MGMT frame use 0xFF as WCID */
1985 if ((StaFifo.field.TxAckRequired == 0)
1986 || (wcid >= MAX_LEN_OF_MAC_TABLE)) {
1991 /* PID store Tx MCS Rate */
1992 pid = (u8)StaFifo.field.PidType;
1994 pEntry = &pAd->MacTab.Content[wcid];
1996 pEntry->DebugFIFOCount++;
1998 if (StaFifo.field.TxBF) /* 3*3 */
1999 pEntry->TxBFCount++;
2001 if (!StaFifo.field.TxSuccess) {
2002 pEntry->FIFOCount++;
2003 pEntry->OneSecTxFailCount++;
2005 if (pEntry->FIFOCount >= 1) {
2006 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2007 pEntry->NoBADataCountDown = 64;
2009 if (pEntry->PsMode == PWR_ACTIVE) {
2011 for (tid = 0; tid < NUM_OF_TID; tid++) {
2012 BAOriSessionTearDown(pAd,
2019 /* Update the continuous transmission counter except PS mode */
2020 pEntry->ContinueTxFailCnt++;
2022 /* Clear the FIFOCount when sta in Power Save mode. Basically we assume */
2023 /* this tx error happened due to sta just go to sleep. */
2024 pEntry->FIFOCount = 0;
2025 pEntry->ContinueTxFailCnt = 0;
2027 /*pEntry->FIFOCount = 0; */
2029 /*pEntry->bSendBAR = TRUE; */
2031 if ((pEntry->PsMode != PWR_SAVE)
2032 && (pEntry->NoBADataCountDown > 0)) {
2033 pEntry->NoBADataCountDown--;
2034 if (pEntry->NoBADataCountDown == 0) {
2035 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2039 pEntry->FIFOCount = 0;
2040 pEntry->OneSecTxNoRetryOkCount++;
2041 /* update NoDataIdleCount when sucessful send packet to STA. */
2042 pEntry->NoDataIdleCount = 0;
2043 pEntry->ContinueTxFailCnt = 0;
2046 succMCS = StaFifo.field.SuccessRate & 0x7F;
2048 reTry = pid - succMCS;
2050 if (StaFifo.field.TxSuccess) {
2051 pEntry->TXMCSExpected[pid]++;
2052 if (pid == succMCS) {
2053 pEntry->TXMCSSuccessful[pid]++;
2055 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2058 pEntry->TXMCSFailed[pid]++;
2062 if ((pid >= 12) && succMCS <= 7) {
2065 pEntry->OneSecTxRetryOkCount += reTry;
2069 /* ASIC store 16 stack */
2070 } while (i < (2 * TX_RING_SIZE));
2075 ========================================================================
2077 Routine Description:
2078 Read statistical counters from hardware registers and record them
2079 in software variables for later on query
2082 pAd Pointer to our adapter
2087 IRQL = DISPATCH_LEVEL
2089 ========================================================================
2091 void NICUpdateRawCounters(struct rt_rtmp_adapter *pAd)
2093 u32 OldValue; /*, Value2; */
2094 /*unsigned long PageSum, OneSecTransmitCount; */
2095 /*unsigned long TxErrorRatio, Retry, Fail; */
2096 RX_STA_CNT0_STRUC RxStaCnt0;
2097 RX_STA_CNT1_STRUC RxStaCnt1;
2098 RX_STA_CNT2_STRUC RxStaCnt2;
2099 TX_STA_CNT0_STRUC TxStaCnt0;
2100 TX_STA_CNT1_STRUC StaTx1;
2101 TX_STA_CNT2_STRUC StaTx2;
2102 TX_AGG_CNT_STRUC TxAggCnt;
2103 TX_AGG_CNT0_STRUC TxAggCnt0;
2104 TX_AGG_CNT1_STRUC TxAggCnt1;
2105 TX_AGG_CNT2_STRUC TxAggCnt2;
2106 TX_AGG_CNT3_STRUC TxAggCnt3;
2107 TX_AGG_CNT4_STRUC TxAggCnt4;
2108 TX_AGG_CNT5_STRUC TxAggCnt5;
2109 TX_AGG_CNT6_STRUC TxAggCnt6;
2110 TX_AGG_CNT7_STRUC TxAggCnt7;
2111 struct rt_counter_ralink *pRalinkCounters;
2113 pRalinkCounters = &pAd->RalinkCounters;
2115 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2116 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2119 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2120 /* Update RX PLCP error counter */
2121 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2122 /* Update False CCA counter */
2123 pAd->RalinkCounters.OneSecFalseCCACnt +=
2124 RxStaCnt1.field.FalseCca;
2127 /* Update FCS counters */
2128 OldValue = pAd->WlanCounters.FCSErrorCount.u.LowPart;
2129 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); /* >> 7); */
2130 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2131 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2133 /* Add FCS error count to private counters */
2134 pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2135 OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2136 pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2137 if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2138 pRalinkCounters->RealFcsErrCount.u.HighPart++;
2140 /* Update Duplicate Rcv check */
2141 pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2142 pAd->WlanCounters.FrameDuplicateCount.u.LowPart +=
2143 RxStaCnt2.field.RxDupliCount;
2144 /* Update RX Overflow counter */
2145 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2147 /*pAd->RalinkCounters.RxCount = 0; */
2149 if (pRalinkCounters->RxCount != pAd->watchDogRxCnt) {
2150 pAd->watchDogRxCnt = pRalinkCounters->RxCount;
2151 pAd->watchDogRxOverFlowCnt = 0;
2153 if (RxStaCnt2.field.RxFifoOverflowCount)
2154 pAd->watchDogRxOverFlowCnt++;
2156 pAd->watchDogRxOverFlowCnt = 0;
2158 #endif /* RTMP_MAC_USB // */
2160 /*if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) || */
2161 /* (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1))) */
2162 if (!pAd->bUpdateBcnCntDone) {
2163 /* Update BEACON sent count */
2164 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2165 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2166 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2167 pRalinkCounters->OneSecBeaconSentCnt +=
2168 TxStaCnt0.field.TxBeaconCount;
2169 pRalinkCounters->OneSecTxRetryOkCount +=
2170 StaTx1.field.TxRetransmit;
2171 pRalinkCounters->OneSecTxNoRetryOkCount +=
2172 StaTx1.field.TxSuccess;
2173 pRalinkCounters->OneSecTxFailCount +=
2174 TxStaCnt0.field.TxFailCount;
2175 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart +=
2176 StaTx1.field.TxSuccess;
2177 pAd->WlanCounters.RetryCount.u.LowPart +=
2178 StaTx1.field.TxRetransmit;
2179 pAd->WlanCounters.FailedCount.u.LowPart +=
2180 TxStaCnt0.field.TxFailCount;
2183 /*if (pAd->bStaFifoTest == TRUE) */
2185 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2186 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2187 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2188 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2189 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2190 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2191 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2192 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2193 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2194 pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2195 pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2196 pRalinkCounters->TxAgg1MPDUCount +=
2197 TxAggCnt0.field.AggSize1Count;
2198 pRalinkCounters->TxAgg2MPDUCount +=
2199 TxAggCnt0.field.AggSize2Count;
2201 pRalinkCounters->TxAgg3MPDUCount +=
2202 TxAggCnt1.field.AggSize3Count;
2203 pRalinkCounters->TxAgg4MPDUCount +=
2204 TxAggCnt1.field.AggSize4Count;
2205 pRalinkCounters->TxAgg5MPDUCount +=
2206 TxAggCnt2.field.AggSize5Count;
2207 pRalinkCounters->TxAgg6MPDUCount +=
2208 TxAggCnt2.field.AggSize6Count;
2210 pRalinkCounters->TxAgg7MPDUCount +=
2211 TxAggCnt3.field.AggSize7Count;
2212 pRalinkCounters->TxAgg8MPDUCount +=
2213 TxAggCnt3.field.AggSize8Count;
2214 pRalinkCounters->TxAgg9MPDUCount +=
2215 TxAggCnt4.field.AggSize9Count;
2216 pRalinkCounters->TxAgg10MPDUCount +=
2217 TxAggCnt4.field.AggSize10Count;
2219 pRalinkCounters->TxAgg11MPDUCount +=
2220 TxAggCnt5.field.AggSize11Count;
2221 pRalinkCounters->TxAgg12MPDUCount +=
2222 TxAggCnt5.field.AggSize12Count;
2223 pRalinkCounters->TxAgg13MPDUCount +=
2224 TxAggCnt6.field.AggSize13Count;
2225 pRalinkCounters->TxAgg14MPDUCount +=
2226 TxAggCnt6.field.AggSize14Count;
2228 pRalinkCounters->TxAgg15MPDUCount +=
2229 TxAggCnt7.field.AggSize15Count;
2230 pRalinkCounters->TxAgg16MPDUCount +=
2231 TxAggCnt7.field.AggSize16Count;
2233 /* Calculate the transmitted A-MPDU count */
2234 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2235 TxAggCnt0.field.AggSize1Count;
2236 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2237 (TxAggCnt0.field.AggSize2Count / 2);
2239 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2240 (TxAggCnt1.field.AggSize3Count / 3);
2241 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2242 (TxAggCnt1.field.AggSize4Count / 4);
2244 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2245 (TxAggCnt2.field.AggSize5Count / 5);
2246 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2247 (TxAggCnt2.field.AggSize6Count / 6);
2249 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2250 (TxAggCnt3.field.AggSize7Count / 7);
2251 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2252 (TxAggCnt3.field.AggSize8Count / 8);
2254 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2255 (TxAggCnt4.field.AggSize9Count / 9);
2256 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2257 (TxAggCnt4.field.AggSize10Count / 10);
2259 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2260 (TxAggCnt5.field.AggSize11Count / 11);
2261 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2262 (TxAggCnt5.field.AggSize12Count / 12);
2264 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2265 (TxAggCnt6.field.AggSize13Count / 13);
2266 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2267 (TxAggCnt6.field.AggSize14Count / 14);
2269 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2270 (TxAggCnt7.field.AggSize15Count / 15);
2271 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2272 (TxAggCnt7.field.AggSize16Count / 16);
2278 ========================================================================
2280 Routine Description:
2281 Reset NIC from error
2284 Adapter Pointer to our adapter
2289 IRQL = PASSIVE_LEVEL
2292 Reset NIC from error state
2294 ========================================================================
2296 void NICResetFromError(struct rt_rtmp_adapter *pAd)
2298 /* Reset BBP (according to alex, reset ASIC will force reset BBP */
2299 /* Therefore, skip the reset BBP */
2300 /* RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2); */
2302 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2303 /* Remove ASIC from reset state */
2304 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2306 NICInitializeAdapter(pAd, FALSE);
2307 NICInitAsicFromEEPROM(pAd);
2309 /* Switch to current channel, since during reset process, the connection should remains on. */
2310 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2311 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2314 int NICLoadFirmware(struct rt_rtmp_adapter *pAd)
2316 int status = NDIS_STATUS_SUCCESS;
2317 if (pAd->chipOps.loadFirmware)
2318 status = pAd->chipOps.loadFirmware(pAd);
2324 ========================================================================
2326 Routine Description:
2327 erase 8051 firmware image in MAC ASIC
2330 Adapter Pointer to our adapter
2332 IRQL = PASSIVE_LEVEL
2334 ========================================================================
2336 void NICEraseFirmware(struct rt_rtmp_adapter *pAd)
2338 if (pAd->chipOps.eraseFirmware)
2339 pAd->chipOps.eraseFirmware(pAd);
2341 } /* End of NICEraseFirmware */
2344 ========================================================================
2346 Routine Description:
2347 Load Tx rate switching parameters
2350 Adapter Pointer to our adapter
2353 NDIS_STATUS_SUCCESS firmware image load ok
2354 NDIS_STATUS_FAILURE image not found
2356 IRQL = PASSIVE_LEVEL
2359 1. (B0: Valid Item number) (B1:Initial item from zero)
2360 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2362 ========================================================================
2364 int NICLoadRateSwitchingParams(struct rt_rtmp_adapter *pAd)
2366 return NDIS_STATUS_SUCCESS;
2370 ========================================================================
2372 Routine Description:
2373 Compare two memory block
2376 pSrc1 Pointer to first memory address
2377 pSrc2 Pointer to second memory address
2381 1: pSrc1 memory is larger
2382 2: pSrc2 memory is larger
2384 IRQL = DISPATCH_LEVEL
2388 ========================================================================
2390 unsigned long RTMPCompareMemory(void *pSrc1, void *pSrc2, unsigned long Length)
2394 unsigned long Index = 0;
2396 pMem1 = (u8 *)pSrc1;
2397 pMem2 = (u8 *)pSrc2;
2399 for (Index = 0; Index < Length; Index++) {
2400 if (pMem1[Index] > pMem2[Index])
2402 else if (pMem1[Index] < pMem2[Index])
2411 ========================================================================
2413 Routine Description:
2414 Zero out memory block
2417 pSrc1 Pointer to memory address
2423 IRQL = PASSIVE_LEVEL
2424 IRQL = DISPATCH_LEVEL
2428 ========================================================================
2430 void RTMPZeroMemory(void *pSrc, unsigned long Length)
2433 unsigned long Index = 0;
2437 for (Index = 0; Index < Length; Index++) {
2443 ========================================================================
2445 Routine Description:
2446 Copy data from memory block 1 to memory block 2
2449 pDest Pointer to destination memory address
2450 pSrc Pointer to source memory address
2456 IRQL = PASSIVE_LEVEL
2457 IRQL = DISPATCH_LEVEL
2461 ========================================================================
2463 void RTMPMoveMemory(void *pDest, void *pSrc, unsigned long Length)
2469 ASSERT((Length == 0) || (pDest && pSrc));
2471 pMem1 = (u8 *)pDest;
2474 for (Index = 0; Index < Length; Index++) {
2475 pMem1[Index] = pMem2[Index];
2480 ========================================================================
2482 Routine Description:
2483 Initialize port configuration structure
2486 Adapter Pointer to our adapter
2491 IRQL = PASSIVE_LEVEL
2495 ========================================================================
2497 void UserCfgInit(struct rt_rtmp_adapter *pAd)
2499 u32 key_index, bss_index;
2501 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2504 /* part I. initialize common configuration */
2507 pAd->BulkOutReq = 0;
2509 pAd->BulkOutComplete = 0;
2510 pAd->BulkOutCompleteOther = 0;
2511 pAd->BulkOutCompleteCancel = 0;
2513 pAd->BulkInComplete = 0;
2514 pAd->BulkInCompleteFail = 0;
2516 /*pAd->QuickTimerP = 100; */
2517 /*pAd->TurnAggrBulkInCount = 0; */
2518 pAd->bUsbTxBulkAggre = 0;
2520 /* init as unsed value to ensure driver will set to MCU once. */
2521 pAd->LedIndicatorStrength = 0xFF;
2523 pAd->CommonCfg.MaxPktOneTxBulk = 2;
2524 pAd->CommonCfg.TxBulkFactor = 1;
2525 pAd->CommonCfg.RxBulkFactor = 1;
2527 pAd->CommonCfg.TxPower = 100; /*mW */
2529 NdisZeroMemory(&pAd->CommonCfg.IOTestParm,
2530 sizeof(pAd->CommonCfg.IOTestParm));
2531 #endif /* RTMP_MAC_USB // */
2533 for (key_index = 0; key_index < SHARE_KEY_NUM; key_index++) {
2534 for (bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++) {
2535 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2536 pAd->SharedKey[bss_index][key_index].CipherAlg =
2541 pAd->EepromAccess = FALSE;
2543 pAd->Antenna.word = 0;
2544 pAd->CommonCfg.BBPCurrentBW = BW_20;
2546 pAd->LedCntl.word = 0;
2548 pAd->LedIndicatorStrength = 0;
2549 pAd->RLnkCtrlOffset = 0;
2550 pAd->HostLnkCtrlOffset = 0;
2551 pAd->StaCfg.PSControl.field.EnableNewPS = TRUE;
2552 pAd->CheckDmaBusyCount = 0;
2553 #endif /* RTMP_MAC_PCI // */
2555 pAd->bAutoTxAgcA = FALSE; /* Default is OFF */
2556 pAd->bAutoTxAgcG = FALSE; /* Default is OFF */
2557 pAd->RfIcType = RFIC_2820;
2559 /* Init timer for reset complete event */
2560 pAd->CommonCfg.CentralChannel = 1;
2561 pAd->bForcePrintTX = FALSE;
2562 pAd->bForcePrintRX = FALSE;
2563 pAd->bStaFifoTest = FALSE;
2564 pAd->bProtectionTest = FALSE;
2565 pAd->CommonCfg.Dsifs = 10; /* in units of usec */
2566 pAd->CommonCfg.TxPower = 100; /*mW */
2567 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; /* AUTO */
2568 pAd->CommonCfg.TxPowerDefault = 0xffffffff; /* AUTO */
2569 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; /* use Long preamble on TX by defaut */
2570 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2571 pAd->CommonCfg.RtsThreshold = 2347;
2572 pAd->CommonCfg.FragmentThreshold = 2346;
2573 pAd->CommonCfg.UseBGProtection = 0; /* 0: AUTO */
2574 pAd->CommonCfg.bEnableTxBurst = TRUE; /*0; */
2575 pAd->CommonCfg.PhyMode = 0xff; /* unknown */
2576 pAd->CommonCfg.BandState = UNKNOWN_BAND;
2577 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2578 pAd->CommonCfg.RadarDetect.CSCount = 0;
2579 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2581 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2582 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2583 pAd->CommonCfg.bAPSDCapable = FALSE;
2584 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2585 pAd->CommonCfg.TriggerTimerCount = 0;
2586 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2587 pAd->CommonCfg.bCountryFlag = FALSE;
2588 pAd->CommonCfg.TxStream = 0;
2589 pAd->CommonCfg.RxStream = 0;
2591 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2593 NdisZeroMemory(&pAd->CommonCfg.HtCapability,
2594 sizeof(pAd->CommonCfg.HtCapability));
2595 pAd->HTCEnable = FALSE;
2596 pAd->bBroadComHT = FALSE;
2597 pAd->CommonCfg.bRdg = FALSE;
2599 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo,
2600 sizeof(pAd->CommonCfg.AddHTInfo));
2601 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2602 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2603 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2604 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; /*32; */
2605 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; /*32; */
2606 DBGPRINT(RT_DEBUG_TRACE,
2607 ("--> UserCfgInit. BACapability = 0x%x\n",
2608 pAd->CommonCfg.BACapability.word));
2610 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2611 BATableInit(pAd, &pAd->BATable);
2613 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2614 pAd->CommonCfg.bHTProtect = 1;
2615 pAd->CommonCfg.bMIMOPSEnable = TRUE;
2616 /*2008/11/05:KH add to support Antenna power-saving of AP<-- */
2617 pAd->CommonCfg.bGreenAPEnable = FALSE;
2618 /*2008/11/05:KH add to support Antenna power-saving of AP--> */
2619 pAd->CommonCfg.bBADecline = FALSE;
2620 pAd->CommonCfg.bDisableReordering = FALSE;
2622 if (pAd->MACVersion == 0x28720200) {
2623 pAd->CommonCfg.TxBASize = 13; /*by Jerry recommend */
2625 pAd->CommonCfg.TxBASize = 7;
2628 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2630 /*pAd->CommonCfg.HTPhyMode.field.BW = BW_20; */
2631 /*pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO; */
2632 /*pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800; */
2633 /*pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE; */
2634 pAd->CommonCfg.TxRate = RATE_6;
2636 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2637 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2638 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2640 pAd->CommonCfg.BeaconPeriod = 100; /* in mSec */
2643 /* part II. initialize STA specific configuration */
2646 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2647 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2648 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2649 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2651 pAd->StaCfg.Psm = PWR_ACTIVE;
2653 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2654 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2655 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2656 pAd->StaCfg.bMixCipher = FALSE;
2657 pAd->StaCfg.DefaultKeyId = 0;
2659 /* 802.1x port control */
2660 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2661 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2662 pAd->StaCfg.LastMicErrorTime = 0;
2663 pAd->StaCfg.MicErrCnt = 0;
2664 pAd->StaCfg.bBlockAssoc = FALSE;
2665 pAd->StaCfg.WpaState = SS_NOTUSE;
2667 pAd->CommonCfg.NdisRadioStateOff = FALSE; /* New to support microsoft disable radio with OID command */
2669 pAd->StaCfg.RssiTrigger = 0;
2670 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(struct rt_rssi_sample));
2671 pAd->StaCfg.RssiTriggerMode =
2672 RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2673 pAd->StaCfg.AtimWin = 0;
2674 pAd->StaCfg.DefaultListenCount = 3; /*default listen count; */
2675 pAd->StaCfg.BssType = BSS_INFRA; /* BSS_INFRA or BSS_ADHOC or BSS_MONITOR */
2676 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2677 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2678 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2680 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2681 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2684 #ifdef PCIE_PS_SUPPORT
2685 pAd->brt30xxBanMcuCmd = FALSE;
2686 pAd->b3090ESpecialChip = FALSE;
2687 /*KH Debug:the following must be removed */
2688 pAd->StaCfg.PSControl.field.rt30xxPowerMode = 3;
2689 pAd->StaCfg.PSControl.field.rt30xxForceASPMTest = 0;
2690 pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM = 1;
2691 #endif /* PCIE_PS_SUPPORT // */
2693 /* global variables mXXXX used in MAC protocol state machines */
2694 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2695 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2696 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2698 /* PHY specification */
2699 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; /* default PHY mode */
2700 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); /* CCK use long preamble */
2703 /* user desired power mode */
2704 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2705 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2706 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2708 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer,
2709 GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec),
2711 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2713 /* Patch for Ndtest */
2714 pAd->StaCfg.ScanCnt = 0;
2716 pAd->StaCfg.bHwRadio = TRUE; /* Default Hardware Radio status is On */
2717 pAd->StaCfg.bSwRadio = TRUE; /* Default Software Radio status is On */
2718 pAd->StaCfg.bRadio = TRUE; /* bHwRadio && bSwRadio */
2719 pAd->StaCfg.bHardwareRadio = FALSE; /* Default is OFF */
2720 pAd->StaCfg.bShowHiddenSSID = FALSE; /* Default no show */
2722 /* Nitro mode control */
2723 pAd->StaCfg.bAutoReconnect = TRUE;
2725 /* Save the init time as last scan time, the system should do scan after 2 seconds. */
2726 /* This patch is for driver wake up from standby mode, system will do scan right away. */
2727 NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2728 if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2729 pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2731 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE + 1);
2733 sprintf((char *)pAd->nickname, "RT2860STA");
2734 #endif /* RTMP_MAC_PCI // */
2736 sprintf((char *)pAd->nickname, "RT2870STA");
2737 #endif /* RTMP_MAC_USB // */
2738 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer,
2739 GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc),
2741 pAd->StaCfg.IEEE8021X = FALSE;
2742 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2743 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2744 pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2745 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2747 NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2749 pAd->StaCfg.bAutoConnectByBssid = FALSE;
2750 pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2751 NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2752 pAd->StaCfg.WpaPassPhraseLen = 0;
2753 pAd->StaCfg.bAutoRoaming = FALSE;
2754 pAd->StaCfg.bForceTxBurst = FALSE;
2757 /* Default for extra information is not valid */
2758 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2760 /* Default Config change flag */
2761 pAd->bConfigChanged = FALSE;
2764 /* part III. AP configurations */
2768 /* part IV. others */
2770 /* dynamic BBP R66:sensibity tuning to overcome background noise */
2771 pAd->BbpTuning.bEnable = TRUE;
2772 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2773 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2774 pAd->BbpTuning.R66Delta = 4;
2775 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2778 /* Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value. */
2779 /* if not initial this value, the default value will be 0. */
2781 pAd->BbpTuning.R66CurrentValue = 0x38;
2783 pAd->Bbp94 = BBPR94_DEFAULT;
2784 pAd->BbpForCCK = FALSE;
2786 /* Default is FALSE for test bit 1 */
2787 /*pAd->bTest1 = FALSE; */
2789 /* initialize MAC table and allocate spin lock */
2790 NdisZeroMemory(&pAd->MacTab, sizeof(struct rt_mac_table));
2791 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2792 NdisAllocateSpinLock(&pAd->MacTabLock);
2794 /*RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE); */
2795 /*RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV); */
2797 pAd->CommonCfg.bWiFiTest = FALSE;
2799 pAd->bPCIclkOff = FALSE;
2800 #endif /* RTMP_MAC_PCI // */
2802 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2803 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
2806 /* IRQL = PASSIVE_LEVEL */
2808 /* FUNCTION: AtoH(char *, u8 *, int) */
2810 /* PURPOSE: Converts ascii string to network order hex */
2813 /* src - pointer to input ascii string */
2814 /* dest - pointer to output hex */
2815 /* destlen - size of dest */
2819 /* 2 ascii bytes make a hex byte so must put 1st ascii byte of pair */
2820 /* into upper nibble and 2nd ascii byte of pair into lower nibble. */
2822 /* IRQL = PASSIVE_LEVEL */
2824 void AtoH(char *src, u8 *dest, int destlen)
2830 destTemp = (u8 *)dest;
2833 *destTemp = hex_to_bin(*srcptr++) << 4; /* Put 1st ascii byte in upper nibble. */
2834 *destTemp += hex_to_bin(*srcptr++); /* Add 2nd ascii byte to above. */
2839 /*+++Mark by shiang, not use now, need to remove after confirm */
2840 /*---Mark by shiang, not use now, need to remove after confirm */
2843 ========================================================================
2845 Routine Description:
2849 pAd Pointer to our adapter
2850 pTimer Timer structure
2851 pTimerFunc Function to execute when timer expired
2852 Repeat Ture for period timer
2859 ========================================================================
2861 void RTMPInitTimer(struct rt_rtmp_adapter *pAd,
2862 struct rt_ralink_timer *pTimer,
2863 void *pTimerFunc, void *pData, IN BOOLEAN Repeat)
2866 /* Set Valid to TRUE for later used. */
2867 /* It will crash if we cancel a timer or set a timer */
2868 /* that we haven't initialize before. */
2870 pTimer->Valid = TRUE;
2872 pTimer->PeriodicType = Repeat;
2873 pTimer->State = FALSE;
2874 pTimer->cookie = (unsigned long)pData;
2876 #ifdef RTMP_TIMER_TASK_SUPPORT
2878 #endif /* RTMP_TIMER_TASK_SUPPORT // */
2880 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (void *)pTimer);
2884 ========================================================================
2886 Routine Description:
2890 pTimer Timer structure
2891 Value Timer value in milliseconds
2897 To use this routine, must call RTMPInitTimer before.
2899 ========================================================================
2901 void RTMPSetTimer(struct rt_ralink_timer *pTimer, unsigned long Value)
2903 if (pTimer->Valid) {
2904 pTimer->TimerValue = Value;
2905 pTimer->State = FALSE;
2906 if (pTimer->PeriodicType == TRUE) {
2907 pTimer->Repeat = TRUE;
2908 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
2910 pTimer->Repeat = FALSE;
2911 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
2914 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
2919 ========================================================================
2921 Routine Description:
2925 pTimer Timer structure
2926 Value Timer value in milliseconds
2932 To use this routine, must call RTMPInitTimer before.
2934 ========================================================================
2936 void RTMPModTimer(struct rt_ralink_timer *pTimer, unsigned long Value)
2940 if (pTimer->Valid) {
2941 pTimer->TimerValue = Value;
2942 pTimer->State = FALSE;
2943 if (pTimer->PeriodicType == TRUE) {
2944 RTMPCancelTimer(pTimer, &Cancel);
2945 RTMPSetTimer(pTimer, Value);
2947 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
2950 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
2955 ========================================================================
2957 Routine Description:
2958 Cancel timer objects
2961 Adapter Pointer to our adapter
2966 IRQL = PASSIVE_LEVEL
2967 IRQL = DISPATCH_LEVEL
2970 1.) To use this routine, must call RTMPInitTimer before.
2971 2.) Reset NIC to initial state AS IS system boot up time.
2973 ========================================================================
2975 void RTMPCancelTimer(struct rt_ralink_timer *pTimer, OUT BOOLEAN * pCancelled)
2977 if (pTimer->Valid) {
2978 if (pTimer->State == FALSE)
2979 pTimer->Repeat = FALSE;
2981 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
2983 if (*pCancelled == TRUE)
2984 pTimer->State = TRUE;
2986 #ifdef RTMP_TIMER_TASK_SUPPORT
2987 /* We need to go-through the TimerQ to findout this timer handler and remove it if */
2988 /* it's still waiting for execution. */
2989 RtmpTimerQRemove(pTimer->pAd, pTimer);
2990 #endif /* RTMP_TIMER_TASK_SUPPORT // */
2992 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
2997 ========================================================================
2999 Routine Description:
3003 pAd Pointer to our adapter
3009 IRQL = PASSIVE_LEVEL
3010 IRQL = DISPATCH_LEVEL
3014 ========================================================================
3016 void RTMPSetLED(struct rt_rtmp_adapter *pAd, u8 Status)
3018 /*unsigned long data; */
3022 LowByte = pAd->LedCntl.field.LedMode & 0x7f;
3026 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3027 pAd->LedIndicatorStrength = 0;
3030 if (pAd->CommonCfg.Channel > 14)
3034 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3038 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3041 LowByte = 0; /* Driver sets MAC register and MAC controls LED */
3044 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3048 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3050 case LED_ON_SITE_SURVEY:
3052 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3056 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3059 DBGPRINT(RT_DEBUG_WARN,
3060 ("RTMPSetLED::Unknown Status %d\n", Status));
3065 /* Keep LED status for LED SiteSurvey mode. */
3066 /* After SiteSurvey, we will set the LED mode to previous status. */
3068 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3069 pAd->LedStatus = Status;
3071 DBGPRINT(RT_DEBUG_TRACE,
3072 ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n",
3073 pAd->LedCntl.field.LedMode, HighByte, LowByte));
3077 ========================================================================
3079 Routine Description:
3080 Set LED Signal Stregth
3083 pAd Pointer to our adapter
3089 IRQL = PASSIVE_LEVEL
3092 Can be run on any IRQL level.
3094 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3101 ========================================================================
3103 void RTMPSetSignalLED(struct rt_rtmp_adapter *pAd, IN NDIS_802_11_RSSI Dbm)
3107 if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH) {
3110 else if (Dbm <= -81)
3112 else if (Dbm <= -71)
3114 else if (Dbm <= -67)
3116 else if (Dbm <= -57)
3122 /* Update Signal Stregth to firmware if changed. */
3124 if (pAd->LedIndicatorStrength != nLed) {
3125 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed,
3126 pAd->LedCntl.field.Polarity);
3127 pAd->LedIndicatorStrength = nLed;
3133 ========================================================================
3135 Routine Description:
3139 pAd Pointer to our adapter
3144 IRQL <= DISPATCH_LEVEL
3147 Before Enable RX, make sure you have enabled Interrupt.
3148 ========================================================================
3150 void RTMPEnableRxTx(struct rt_rtmp_adapter *pAd)
3152 /* WPDMA_GLO_CFG_STRUC GloCfg; */
3153 /* unsigned long i = 0; */
3156 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3158 /* Enable Rx DMA. */
3159 RT28XXDMAEnable(pAd);
3161 /* enable RX of MAC block */
3162 if (pAd->OpMode == OPMODE_AP) {
3163 rx_filter_flag = APNORMAL;
3165 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); /* enable RX of DMA block */
3167 if (pAd->CommonCfg.PSPXlink)
3168 rx_filter_flag = PSPXLINK;
3170 rx_filter_flag = STANORMAL; /* Staion not drop control frame will fail WiFi Certification. */
3171 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3174 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3175 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3178 /*+++Add by shiang, move from os/linux/rt_main_dev.c */
3179 void CfgInitHook(struct rt_rtmp_adapter *pAd)
3181 pAd->bBroadComHT = TRUE;
3184 int rt28xx_init(struct rt_rtmp_adapter *pAd,
3185 char *pDefaultMac, char *pHostName)
3194 /* If dirver doesn't wake up firmware here, */
3195 /* NICLoadFirmware will hang forever when interface is up again. */
3197 if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3198 OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE)) {
3199 AUTO_WAKEUP_STRUC AutoWakeupCfg;
3200 AsicForceWakeup(pAd, TRUE);
3201 AutoWakeupCfg.word = 0;
3202 RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG,
3203 AutoWakeupCfg.word);
3204 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3207 #endif /* RTMP_MAC_PCI // */
3209 /* reset Adapter flags */
3210 RTMP_CLEAR_FLAGS(pAd);
3212 /* Init BssTab & ChannelInfo tabbles for auto channel select. */
3214 /* Allocate BA Reordering memory */
3215 ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3217 /* Make sure MAC gets ready. */
3220 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3221 pAd->MACVersion = MacCsr0;
3223 if ((pAd->MACVersion != 0x00)
3224 && (pAd->MACVersion != 0xFFFFFFFF))
3228 } while (index++ < 100);
3229 DBGPRINT(RT_DEBUG_TRACE,
3230 ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3233 #ifdef PCIE_PS_SUPPORT
3234 /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register at pcie L.1 level */
3235 if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
3236 && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE)) {
3237 RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0);
3239 RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0);
3240 DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0));
3242 #endif /* PCIE_PS_SUPPORT // */
3244 /* To fix driver disable/enable hang issue when radio off */
3245 RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3246 #endif /* RTMP_MAC_PCI // */
3249 RT28XXDMADisable(pAd);
3251 /* Load 8051 firmware */
3252 Status = NICLoadFirmware(pAd);
3253 if (Status != NDIS_STATUS_SUCCESS) {
3254 DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n",
3259 NICLoadRateSwitchingParams(pAd);
3261 /* Disable interrupts here which is as soon as possible */
3262 /* This statement should never be true. We might consider to remove it later */
3264 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE)) {
3265 RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3267 #endif /* RTMP_MAC_PCI // */
3269 Status = RTMPAllocTxRxRingMemory(pAd);
3270 if (Status != NDIS_STATUS_SUCCESS) {
3271 DBGPRINT_ERR(("RTMPAllocDMAMemory failed, Status[=0x%08x]\n",
3276 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3278 /* initialize MLME */
3281 Status = RtmpMgmtTaskInit(pAd);
3282 if (Status != NDIS_STATUS_SUCCESS)
3285 Status = MlmeInit(pAd);
3286 if (Status != NDIS_STATUS_SUCCESS) {
3287 DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
3290 /* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default */
3293 Status = RtmpNetTaskInit(pAd);
3294 if (Status != NDIS_STATUS_SUCCESS)
3297 /* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr); */
3298 /* pAd->bForcePrintTX = TRUE; */
3302 NdisAllocateSpinLock(&pAd->MacTabLock);
3304 MeasureReqTabInit(pAd);
3308 /* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset */
3310 Status = NICInitializeAdapter(pAd, TRUE);
3311 if (Status != NDIS_STATUS_SUCCESS) {
3312 DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n",
3314 if (Status != NDIS_STATUS_SUCCESS)
3318 DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3321 pAd->CommonCfg.bMultipleIRP = FALSE;
3323 if (pAd->CommonCfg.bMultipleIRP)
3324 pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
3326 pAd->CommonCfg.NumOfBulkInIRP = 1;
3327 #endif /* RTMP_MAC_USB // */
3329 /*Init Ba Capability parameters. */
3330 /* RT28XX_BA_INIT(pAd); */
3331 pAd->CommonCfg.DesiredHtPhy.MpduDensity =
3332 (u8)pAd->CommonCfg.BACapability.field.MpduDensity;
3333 pAd->CommonCfg.DesiredHtPhy.AmsduEnable =
3334 (u16)pAd->CommonCfg.BACapability.field.AmsduEnable;
3335 pAd->CommonCfg.DesiredHtPhy.AmsduSize =
3336 (u16)pAd->CommonCfg.BACapability.field.AmsduSize;
3337 pAd->CommonCfg.DesiredHtPhy.MimoPs =
3338 (u16)pAd->CommonCfg.BACapability.field.MMPSmode;
3339 /* UPdata to HT IE */
3340 pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs =
3341 (u16)pAd->CommonCfg.BACapability.field.MMPSmode;
3342 pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize =
3343 (u16)pAd->CommonCfg.BACapability.field.AmsduSize;
3344 pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity =
3345 (u8)pAd->CommonCfg.BACapability.field.MpduDensity;
3347 /* after reading Registry, we now know if in AP mode or STA mode */
3349 /* Load 8051 firmware; crash when FW image not existent */
3350 /* Status = NICLoadFirmware(pAd); */
3351 /* if (Status != NDIS_STATUS_SUCCESS) */
3354 DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3356 /* We should read EEPROM for all cases. rt2860b */
3357 NICReadEEPROMParameters(pAd, (u8 *)pDefaultMac);
3359 DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3361 NICInitAsicFromEEPROM(pAd); /*rt2860b */
3363 /* Set PHY to appropriate mode */
3364 TmpPhy = pAd->CommonCfg.PhyMode;
3365 pAd->CommonCfg.PhyMode = 0xff;
3366 RTMPSetPhyMode(pAd, TmpPhy);
3369 /* No valid channels. */
3370 if (pAd->ChannelListNum == 0) {
3371 DBGPRINT(RT_DEBUG_ERROR,
3372 ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3376 DBGPRINT(RT_DEBUG_OFF,
3377 ("MCS Set = %02x %02x %02x %02x %02x\n",
3378 pAd->CommonCfg.HtCapability.MCSSet[0],
3379 pAd->CommonCfg.HtCapability.MCSSet[1],
3380 pAd->CommonCfg.HtCapability.MCSSet[2],
3381 pAd->CommonCfg.HtCapability.MCSSet[3],
3382 pAd->CommonCfg.HtCapability.MCSSet[4]));
3384 #ifdef RTMP_RF_RW_SUPPORT
3385 /*Init RT30xx RFRegisters after read RFIC type from EEPROM */
3386 NICInitRFRegisters(pAd);
3387 #endif /* RTMP_RF_RW_SUPPORT // */
3389 /* APInitialize(pAd); */
3392 /* Initialize RF register to default value */
3394 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3395 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3397 /* 8051 firmware require the signal during booting time. */
3398 /*2008/11/28:KH marked the following codes to patch Frequency offset bug */
3399 /*AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00); */
3401 if (pAd && (Status != NDIS_STATUS_SUCCESS)) {
3403 /* Undo everything if it failed */
3405 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) {
3406 /* NdisMDeregisterInterrupt(&pAd->Interrupt); */
3407 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3409 /* RTMPFreeAdapter(pAd); // we will free it in disconnect() */
3411 /* Microsoft HCT require driver send a disconnect event after driver initialization. */
3412 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3413 /* pAd->IndicateMediaState = NdisMediaStateDisconnected; */
3414 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3416 DBGPRINT(RT_DEBUG_TRACE,
3417 ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3420 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
3421 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
3424 /* Support multiple BulkIn IRP, */
3425 /* the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1. */
3427 for (index = 0; index < pAd->CommonCfg.NumOfBulkInIRP; index++) {
3428 RTUSBBulkReceive(pAd);
3429 DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n"));
3431 #endif /* RTMP_MAC_USB // */
3434 /* Set up the Mac address */
3435 RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3437 DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3445 RTMPFreeTxRxRingMemory(pAd);
3448 os_free_mem(pAd, pAd->mpdu_blk_pool.mem); /* free BA pool */
3450 /* shall not set priv to NULL here because the priv didn't been free yet. */
3451 /*net_dev->ml_priv = 0; */
3456 DBGPRINT(RT_DEBUG_ERROR, ("rt28xx Initialized fail!\n"));
3460 /*---Add by shiang, move from os/linux/rt_main_dev.c */
3462 static int RtmpChipOpsRegister(struct rt_rtmp_adapter *pAd, int infType)
3464 struct rt_rtmp_chip_op *pChipOps = &pAd->chipOps;
3467 memset(pChipOps, 0, sizeof(struct rt_rtmp_chip_op));
3469 /* set eeprom related hook functions */
3470 status = RtmpChipOpsEepromHook(pAd, infType);
3472 /* set mcu related hook functions */
3474 #ifdef RTMP_PCI_SUPPORT
3475 case RTMP_DEV_INF_PCI:
3476 pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3477 pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3478 pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3480 #endif /* RTMP_PCI_SUPPORT // */
3481 #ifdef RTMP_USB_SUPPORT
3482 case RTMP_DEV_INF_USB:
3483 pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3484 pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3486 #endif /* RTMP_USB_SUPPORT // */
3494 int RtmpRaDevCtrlInit(struct rt_rtmp_adapter *pAd, IN RTMP_INF_TYPE infType)
3498 /* Assign the interface type. We need use it when do register/EEPROM access. */
3499 pAd->infType = infType;
3501 pAd->OpMode = OPMODE_STA;
3502 DBGPRINT(RT_DEBUG_TRACE,
3503 ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3506 sema_init(&(pAd->UsbVendorReq_semaphore), 1);
3507 os_alloc_mem(pAd, (u8 **) & pAd->UsbVendorReqBuf,
3508 MAX_PARAM_BUFFER_SIZE - 1);
3509 if (pAd->UsbVendorReqBuf == NULL) {
3510 DBGPRINT(RT_DEBUG_ERROR,
3511 ("Allocate vendor request temp buffer failed!\n"));
3514 #endif /* RTMP_MAC_USB // */
3516 RtmpChipOpsRegister(pAd, infType);
3521 BOOLEAN RtmpRaDevCtrlExit(struct rt_rtmp_adapter *pAd)
3524 RTMPFreeAdapter(pAd);
3529 /* not yet support MBSS */
3530 struct net_device *get_netdev_from_bssid(struct rt_rtmp_adapter *pAd, u8 FromWhichBSSID)
3532 struct net_device *dev_p = NULL;
3535 dev_p = pAd->net_dev;
3539 return dev_p; /* return one of MBSS */