2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Specific funcitons and variables for RT30xx.
35 -------- ---------- ----------------------------------------------
40 #ifndef RTMP_RF_RW_SUPPORT
41 #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
42 #endif /* RTMP_RF_RW_SUPPORT // */
44 #include "../rt_config.h"
47 /* RF register initialization set */
49 struct rt_reg_pair RT30xx_RFRegTable[] = {
90 u8 NUM_RF_REG_PARMS = (sizeof(RT30xx_RFRegTable) / sizeof(struct rt_reg_pair));
92 /* Antenna divesity use GPIO3 and EESK pin for control */
93 /* Antenna and EEPROM access are both using EESK pin, */
94 /* Therefor we should avoid accessing EESK at the same time */
95 /* Then restore antenna after EEPROM access */
96 /* The original name of this function is AsicSetRxAnt(), now change to */
97 /*void AsicSetRxAnt( */
98 void RT30xxSetRxAnt(struct rt_rtmp_adapter *pAd, u8 Ant)
105 if ((pAd->EepromAccess) ||
106 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) ||
107 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) ||
108 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) ||
109 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) {
112 /* the antenna selection is through firmware and MAC register(GPIO3) */
116 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
118 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
120 AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x1, 0x0);
121 #endif /* RTMP_MAC_PCI // */
123 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
125 RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
126 DBGPRINT_RAW(RT_DEBUG_TRACE,
127 ("AsicSetRxAnt, switch to main antenna\n"));
131 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
133 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
135 AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x0, 0x0);
136 #endif /* RTMP_MAC_PCI // */
137 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
140 RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
141 DBGPRINT_RAW(RT_DEBUG_TRACE,
142 ("AsicSetRxAnt, switch to aux antenna\n"));
147 ========================================================================
150 For RF filter calibration purpose
153 pAd Pointer to our adapter
160 ========================================================================
162 void RTMPFilterCalibration(struct rt_rtmp_adapter *pAd)
164 u8 R55x = 0, value, FilterTarget = 0x1E, BBPValue = 0;
165 u32 loop = 0, count = 0, loopcnt = 0, ReTry = 0;
168 /* Give bbp filter initial value */
169 pAd->Mlme.CaliBW20RfR24 = 0x1F;
170 pAd->Mlme.CaliBW40RfR24 = 0x2F; /*Bit[5] must be 1 for BW 40 */
173 if (loop == 1) { /*BandWidth = 40 MHz */
174 /* Write 0x27 to RF_R24 to program filter */
176 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
177 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
182 /* when calibrate BW40, BBP mask must set to BW40. */
183 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
186 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
189 RT30xxReadRFRegister(pAd, RF_R31, &value);
191 RT30xxWriteRFRegister(pAd, RF_R31, value);
192 } else { /*BandWidth = 20 MHz */
193 /* Write 0x07 to RF_R24 to program filter */
195 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
196 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
202 RT30xxReadRFRegister(pAd, RF_R31, &value);
204 RT30xxWriteRFRegister(pAd, RF_R31, value);
207 /* Write 0x01 to RF_R22 to enable baseband loopback mode */
208 RT30xxReadRFRegister(pAd, RF_R22, &value);
210 RT30xxWriteRFRegister(pAd, RF_R22, value);
212 /* Write 0x00 to BBP_R24 to set power & frequency of passband test tone */
213 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
216 /* Write 0x90 to BBP_R25 to transmit test tone */
217 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
220 /* Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0] */
221 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
224 } while ((ReTry++ < 100) && (R55x == 0));
226 /* Write 0x06 to BBP_R24 to set power & frequency of stopband test tone */
227 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
230 /* Write 0x90 to BBP_R25 to transmit test tone */
231 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
233 /*We need to wait for calibration */
235 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
237 if ((R55x - value) < FilterTarget) {
239 } else if ((R55x - value) == FilterTarget) {
246 /* prevent infinite loop cause driver hang. */
247 if (loopcnt++ > 100) {
248 DBGPRINT(RT_DEBUG_ERROR,
249 ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating",
253 /* Write RF_R24 to program filter */
254 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
258 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
260 /* Store for future usage */
263 /*BandWidth = 20 MHz */
264 pAd->Mlme.CaliBW20RfR24 = (u8)RF_R24_Value;
266 /*BandWidth = 40 MHz */
267 pAd->Mlme.CaliBW40RfR24 = (u8)RF_R24_Value;
273 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
280 /* Set back to initial state */
282 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
284 RT30xxReadRFRegister(pAd, RF_R22, &value);
286 RT30xxWriteRFRegister(pAd, RF_R22, value);
288 /* set BBP back to BW20 */
289 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
291 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
293 DBGPRINT(RT_DEBUG_TRACE,
294 ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n",
295 pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
298 /* add by johnli, RF power sequence setup */
300 ==========================================================================
303 Load RF normal operation-mode setup
305 ==========================================================================
307 void RT30xxLoadRFNormalModeSetup(struct rt_rtmp_adapter *pAd)
311 /* RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1 */
312 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
313 RFValue = (RFValue & (~0x0C)) | 0x31;
314 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
316 /* TX_LO2_en, RF R15 register Bit 3 to 0 */
317 RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
319 RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
321 /* move to NICInitRT30xxRFRegisters
322 // TX_LO1_en, RF R17 register Bit 3 to 0
323 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
325 // to fix rx long range issue
326 if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
330 // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
331 if (pAd->TxMixerGain24G >= 2)
333 RFValue &= (~0x7); // clean bit [2:0]
334 RFValue |= pAd->TxMixerGain24G;
336 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
339 /* RX_LO1_en, RF R20 register Bit 3 to 0 */
340 RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
342 RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
344 /* RX_LO2_en, RF R21 register Bit 3 to 0 */
345 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
347 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
349 /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */
350 /* LDORF_VC, RF R27 register Bit 2 to 0 */
351 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
352 /* TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). */
353 /* Raising RF voltage is no longer needed for RT3070(F) */
354 if (IS_RT3090(pAd)) { /* RT309x and RT3071/72 */
355 if ((pAd->MACVersion & 0xffff) < 0x0211)
356 RFValue = (RFValue & (~0x77)) | 0x3;
358 RFValue = (RFValue & (~0x77));
359 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
365 ==========================================================================
368 Load RF sleep-mode setup
370 ==========================================================================
372 void RT30xxLoadRFSleepModeSetup(struct rt_rtmp_adapter *pAd)
379 #endif /* RTMP_MAC_USB // */
381 /* RF_BLOCK_en. RF R1 register Bit 0 to 0 */
382 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
384 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
386 /* VCO_IC, RF R7 register Bit 4 & Bit 5 to 0 */
387 RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
389 RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
391 /* Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 0 */
392 RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
394 RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
396 /* RX_CTB_en, RF R21 register Bit 7 to 0 */
397 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
399 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
402 if (IS_RT3090(pAd) || /* IS_RT3090 including RT309x and RT3071/72 */
404 (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
407 #endif /* RTMP_MAC_USB // */
409 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
411 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
414 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
415 MACValue |= 0x1D000000;
416 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
421 ==========================================================================
424 Reverse RF sleep-mode setup
426 ==========================================================================
428 void RT30xxReverseRFSleepModeSetup(struct rt_rtmp_adapter *pAd)
435 #endif /* RTMP_MAC_USB // */
437 /* RF_BLOCK_en, RF R1 register Bit 0 to 1 */
438 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
440 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
442 /* VCO_IC, RF R7 register Bit 4 & Bit 5 to 1 */
443 RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
445 RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
447 /* Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1 */
448 RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
450 RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
452 /* RX_CTB_en, RF R21 register Bit 7 to 1 */
453 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
455 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
458 if (IS_RT3090(pAd) || /* IS_RT3090 including RT309x and RT3071/72 */
461 (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
464 #endif /* RTMP_MAC_USB // */
466 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
467 if ((pAd->MACVersion & 0xffff) < 0x0211)
468 RFValue = (RFValue & (~0x77)) | 0x3;
470 RFValue = (RFValue & (~0x77));
471 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
473 /* RT3071 version E has fixed this issue */
474 if ((pAd->NicConfig2.field.DACTestBit == 1)
475 && ((pAd->MACVersion & 0xffff) < 0x0211)) {
476 /* patch tx EVM issue temporarily */
477 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
478 MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
479 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
481 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
482 MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
483 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
488 RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
493 void RT30xxHaltAction(struct rt_rtmp_adapter *pAd)
495 u32 TxPinCfg = 0x00050F0F;
498 /* Turn off LNA_PE or TRSW_POL */
500 if (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)) {
501 if ((IS_RT3071(pAd) || IS_RT3572(pAd))
502 #ifdef RTMP_EFUSE_SUPPORT
504 #endif /* RTMP_EFUSE_SUPPORT // */
506 TxPinCfg &= 0xFFFBF0F0; /* bit18 off */
508 TxPinCfg &= 0xFFFFF0F0;
511 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
515 #endif /* RT30xx // */