drivers/staging/otus/hal/hprw.c

   1 /*
   2  * Copyright (c) 2007-2008 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16 #include "../80211core/cprecomp.h"
  17 #include "hpani.h"
  18 #include "hpusb.h"
  19 #include "hpreg.h"
  20 #include "../80211core/ratectrl.h"
  21
  22 extern void zfIdlCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen);
  23
  24 extern void zfCoreCwmBusy(zdev_t* dev, u16_t busy);
  25 u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val);
  26 u16_t zfFlushDelayWrite(zdev_t* dev);
  27
  28 //#define zm_hp_priv(x) struct zsHpPriv* hpPriv=zgWlanDev.hpPrivate;
  29
  30 void zfInitCmdQueue(zdev_t* dev)
  31 {
  32     struct zsHpPriv* hpPriv;
  33
  34     zmw_get_wlan_dev(dev);
  35     hpPriv = (struct zsHpPriv*)(wd->hpPrivate);
  36
  37     zmw_declare_for_critical_section();
  38
  39     zmw_enter_critical_section(dev);
  40 #ifdef ZM_XP_USB_MULTCMD
  41     hpPriv->cmdTail = hpPriv->cmdHead = hpPriv->cmdSend = 0;
  42 #else
  43     hpPriv->cmdTail = hpPriv->cmdHead = 0;
  44 #endif
  45     hpPriv->cmdPending = 0;
  46     hpPriv->cmd.delayWcmdCount = 0;
  47     zmw_leave_critical_section(dev);
  48 }
  49
  50 u16_t zfPutCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen, u16_t src, u8_t* buf)
  51 {
  52     u16_t i;
  53     struct zsHpPriv* hpPriv;
  54
  55     zmw_get_wlan_dev(dev);
  56     hpPriv=wd->hpPrivate;
  57
  58     /* Make sure command length < ZM_MAX_CMD_SIZE */
  59     zm_assert(cmdLen <= ZM_MAX_CMD_SIZE);
  60     /* Make sure command queue not full */
  61     //zm_assert(((hpPriv->cmdTail+1) & (ZM_CMD_QUEUE_SIZE-1)) != hpPriv->cmdHead);
  62     if (((hpPriv->cmdTail+1) & (ZM_CMD_QUEUE_SIZE-1)) == hpPriv->cmdHead ) {
  63         zm_debug_msg0("CMD queue full!!");
  64         return 0;
  65     }
  66
  67     hpPriv->cmdQ[hpPriv->cmdTail].cmdLen = cmdLen;
  68     hpPriv->cmdQ[hpPriv->cmdTail].src = src;
  69     hpPriv->cmdQ[hpPriv->cmdTail].buf = buf;
  70     for (i=0; i<(cmdLen>>2); i++)
  71     {
  72         hpPriv->cmdQ[hpPriv->cmdTail].cmd[i] = cmd[i];
  73     }
  74
  75     hpPriv->cmdTail = (hpPriv->cmdTail+1) & (ZM_CMD_QUEUE_SIZE-1);
  76
  77     return 0;
  78 }
  79
  80 u16_t zfGetCmd(zdev_t* dev, u32_t* cmd, u16_t* cmdLen, u16_t* src, u8_t** buf)
  81 {
  82     u16_t i;
  83     struct zsHpPriv* hpPriv;
  84
  85     zmw_get_wlan_dev(dev);
  86     hpPriv=wd->hpPrivate;
  87
  88     if (hpPriv->cmdTail == hpPriv->cmdHead)
  89     {
  90         return 3;
  91     }
  92
  93     *cmdLen = hpPriv->cmdQ[hpPriv->cmdHead].cmdLen;
  94     *src = hpPriv->cmdQ[hpPriv->cmdHead].src;
  95     *buf = hpPriv->cmdQ[hpPriv->cmdHead].buf;
  96     for (i=0; i<((*cmdLen)>>2); i++)
  97     {
  98         cmd[i] = hpPriv->cmdQ[hpPriv->cmdHead].cmd[i];
  99     }
 100
 101     hpPriv->cmdHead = (hpPriv->cmdHead+1) & (ZM_CMD_QUEUE_SIZE-1);
 102
 103     return 0;
 104 }
 105
 106 #ifdef ZM_XP_USB_MULTCMD
 107 void zfSendCmdEx(zdev_t* dev)
 108 {
 109     u32_t ncmd[ZM_MAX_CMD_SIZE/4];
 110     u16_t ncmdLen = 0;
 111     u16_t cmdFlag = 0;
 112     u16_t i;
 113     struct zsHpPriv* hpPriv;
 114
 115     zmw_get_wlan_dev(dev);
 116     hpPriv=wd->hpPrivate;
 117
 118     zmw_declare_for_critical_section();
 119
 120     zmw_enter_critical_section(dev);
 121
 122     if (hpPriv->cmdPending == 0)
 123     {
 124         if (hpPriv->cmdTail != hpPriv->cmdSend)
 125         {
 126             cmdFlag = 1;
 127             /* Get queueing command */
 128             ncmdLen= hpPriv->cmdQ[hpPriv->cmdSend].cmdLen;
 129             for (i=0; i<(ncmdLen>>2); i++)
 130             {
 131                 ncmd[i] = hpPriv->cmdQ[hpPriv->cmdSend].cmd[i];
 132             }
 133             hpPriv->cmdSend = (hpPriv->cmdSend+1) & (ZM_CMD_QUEUE_SIZE-1);
 134
 135             hpPriv->cmdPending = 1;
 136         }
 137     }
 138
 139     zmw_leave_critical_section(dev);
 140
 141     if ((cmdFlag == 1))
 142     {
 143         zfIdlCmd(dev, ncmd, ncmdLen);
 144     }
 145 }
 146
 147 void zfiSendCmdComp(zdev_t* dev)
 148 {
 149     struct zsHpPriv* hpPriv;
 150
 151     zmw_get_wlan_dev(dev);
 152     hpPriv=wd->hpPrivate;
 153
 154     zmw_declare_for_critical_section();
 155
 156     zmw_enter_critical_section(dev);
 157     hpPriv->cmdPending = 0;
 158     zmw_leave_critical_section(dev);
 159
 160     zfSendCmdEx(dev);
 161 }
 162 #endif
 163
 164 u16_t zfIssueCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen, u16_t src, u8_t* buf)
 165 {
 166     u16_t cmdFlag = 0;
 167     u16_t ret;
 168     struct zsHpPriv* hpPriv;
 169
 170     zmw_get_wlan_dev(dev);
 171     hpPriv=wd->hpPrivate;
 172
 173     zmw_declare_for_critical_section();
 174
 175     zm_msg2_mm(ZM_LV_1, "cmdLen=", cmdLen);
 176
 177     zmw_enter_critical_section(dev);
 178
 179 #ifdef ZM_XP_USB_MULTCMD
 180     ret = zfPutCmd(dev, cmd, cmdLen, src, buf);
 181     zmw_leave_critical_section(dev);
 182
 183     if (ret != 0)
 184     {
 185         return 1;
 186     }
 187
 188     zfSendCmdEx(dev);
 189 #else
 190     if (hpPriv->cmdPending == 0)
 191     {
 192         hpPriv->cmdPending = 1;
 193         cmdFlag = 1;
 194     }
 195     ret = zfPutCmd(dev, cmd, cmdLen, src, buf);
 196
 197     zmw_leave_critical_section(dev);
 198
 199     if (ret != 0)
 200     {
 201         return 1;
 202     }
 203
 204     if (cmdFlag == 1)
 205     {
 206         zfIdlCmd(dev, cmd, cmdLen);
 207     }
 208 #endif
 209     return 0;
 210 }
 211
 212 void zfIdlRsp(zdev_t* dev, u32_t* rsp, u16_t rspLen)
 213 {
 214     u32_t cmd[ZM_MAX_CMD_SIZE/4];
 215     u16_t cmdLen;
 216     u16_t src;
 217     u8_t* buf;
 218     u32_t ncmd[ZM_MAX_CMD_SIZE/4];
 219     u16_t ncmdLen = 0;
 220     u16_t ret;
 221     u16_t cmdFlag = 0;
 222     u16_t i;
 223     s32_t nf;
 224     s32_t noisefloor[4];
 225     struct zsHpPriv* hpPriv;
 226
 227     zmw_get_wlan_dev(dev);
 228     hpPriv=wd->hpPrivate;
 229
 230
 231     zmw_declare_for_critical_section();
 232
 233     zmw_enter_critical_section(dev);
 234
 235     ret = zfGetCmd(dev, cmd, &cmdLen, &src, &buf);
 236     #if 0
 237     zm_assert(ret == 0);
 238     #else
 239     if (ret != 0)
 240     {
 241         zm_debug_msg0("Error IdlRsp because none cmd!!\n");
 242         #ifndef ZM_XP_USB_MULTCMD
 243         zmw_leave_critical_section(dev);
 244         return;
 245         #endif
 246     }
 247     #endif
 248 #ifdef ZM_XP_USB_MULTCMD
 249     zmw_leave_critical_section(dev);
 250 #else
 251     if (hpPriv->cmdTail != hpPriv->cmdHead)
 252     {
 253         cmdFlag = 1;
 254         /* Get queueing command */
 255         ncmdLen= hpPriv->cmdQ[hpPriv->cmdHead].cmdLen;
 256         for (i=0; i<(ncmdLen>>2); i++)
 257         {
 258             ncmd[i] = hpPriv->cmdQ[hpPriv->cmdHead].cmd[i];
 259         }
 260     }
 261     else
 262     {
 263         hpPriv->cmdPending = 0;
 264     }
 265
 266     zmw_leave_critical_section(dev);
 267
 268     if (cmdFlag == 1)
 269     {
 270         zfIdlCmd(dev, ncmd, ncmdLen);
 271     }
 272 #endif
 273     if (src == ZM_OID_READ)
 274     {
 275         ZM_PERFORMANCE_REG(dev, 0x11772c, rsp[1]);
 276         zfwDbgReadRegDone(dev, cmd[1], rsp[1]);
 277     }
 278     else if (src == ZM_OID_FLASH_CHKSUM)
 279     {
 280         zfwDbgGetFlashChkSumDone(dev, rsp+1);
 281     }
 282     else if (src == ZM_OID_FLASH_READ)
 283     {
 284         u32_t  datalen;
 285
 286         datalen = (rsp[0] & 255);
 287
 288         zfwDbgReadFlashDone(dev, cmd[1], rsp+1, datalen);
 289     }
 290     else if (src == ZM_OID_FLASH_PROGRAM)
 291     {
 292         /* Non do */
 293     }
 294     else if (src == ZM_OID_WRITE)
 295     {
 296         zfwDbgWriteRegDone(dev, cmd[1], cmd[2]);
 297     }
 298     else if (src == ZM_OID_TALLY)
 299     {
 300                 zfCollectHWTally(dev, rsp, 0);
 301     }
 302     else if (src == ZM_OID_TALLY_APD)
 303     {
 304                 zfCollectHWTally(dev, rsp, 1);
 305         zfwDbgReadTallyDone(dev);
 306 #ifdef ZM_ENABLE_BA_RATECTRL
 307         zfRateCtrlAggrSta(dev);
 308 #endif
 309     }
 310     else if (src == ZM_OID_DKTX_STATUS)
 311     {
 312         zm_debug_msg0("src = zm_OID_DKTX_STATUS");
 313         zfwDbgQueryHwTxBusyDone(dev, rsp[1]);
 314     }
 315     else if (src == ZM_CMD_SET_FREQUENCY)
 316     {
 317
 318 //#ifdef ZM_OTUS_ENABLE_RETRY_FREQ_CHANGE
 319 #if 0
 320     zm_debug_msg1("Retry Set Frequency = ", rsp[1]);
 321
 322     #if 1
 323     // Read the Noise Floor value !
 324     nf = ((rsp[2]>>19) & 0x1ff);
 325     if ((nf & 0x100) != 0x0)
 326     {
 327         noisefloor[0] = 0 - ((nf ^ 0x1ff) + 1);
 328     }
 329     else
 330     {
 331         noisefloor[0] = nf;
 332     }
 333
 334     zm_debug_msg1("Noise Floor[1] = ", noisefloor[0]);
 335
 336     nf = ((rsp[3]>>19) & 0x1ff);
 337     if ((nf & 0x100) != 0x0)
 338     {
 339         noisefloor[1] = 0 - ((nf ^ 0x1ff) + 1);
 340     }
 341     else
 342     {
 343         noisefloor[1] = nf;
 344     }
 345
 346     zm_debug_msg1("Noise Floor[2] = ", noisefloor[1]);
 347     zm_debug_msg1("Is Site Survey = ", hpPriv->isSiteSurvey);
 348     #endif
 349
 350         if ( (rsp[1] && hpPriv->freqRetryCounter == 0) ||
 351              (((noisefloor[0]>-60)||(noisefloor[1]>-60)) && hpPriv->freqRetryCounter==0) ||
 352              ((abs(noisefloor[0]-noisefloor[1])>=9) && hpPriv->freqRetryCounter==0) )
 353         {
 354             zm_debug_msg0("Retry to issue the frequency change command");
 355
 356             if ( hpPriv->recordFreqRetryCounter == 1 )
 357             {
 358                 zm_debug_msg0("Cold Reset");
 359
 360                 zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 361                                         hpPriv->latestBw40,
 362                                         hpPriv->latestExtOffset,
 363                                         2);
 364
 365                 if ( hpPriv->isSiteSurvey != 2 )
 366                 {
 367                     hpPriv->freqRetryCounter++;
 368                 }
 369                 hpPriv->recordFreqRetryCounter = 0;
 370             }
 371             else
 372             {
 373                 zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 374                                         hpPriv->latestBw40,
 375                                         hpPriv->latestExtOffset,
 376                                         0);
 377             }
 378             hpPriv->recordFreqRetryCounter++;
 379         }
 380         else
 381 #endif
 382
 383 /* ret: Bit0: AGC calibration   0=>finish  1=>unfinish               */
 384 /*      Bit1: Noise calibration 0=>finish  1=>unfinish               */
 385 /*      Bit2: Noise calibration finish, but NF value unexcepted => 1 */
 386         if ( (rsp[1] & 0x1) || (rsp[1] & 0x4) )
 387         {
 388             zm_debug_msg1("Set Frequency fail : ret = ", rsp[1]);
 389
 390             /* 1. AGC Calibration fail                                  */
 391             /* 2. Noise Calibration finish but error NoiseFloor value   */
 392             /*      and not in sitesurvey, try more twice               */
 393             if ( hpPriv->isSiteSurvey == 2 )
 394             {
 395                 if ( hpPriv->recordFreqRetryCounter < 2 )
 396                 {
 397                     /* cold reset */
 398                     zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 399                                             hpPriv->latestBw40,
 400                                             hpPriv->latestExtOffset,
 401                                             2);
 402                     hpPriv->recordFreqRetryCounter++;
 403                     zm_debug_msg1("Retry to issue the frequency change command(cold reset) counter = ", hpPriv->recordFreqRetryCounter);
 404                 }
 405                 else
 406                 {
 407                     /* Fail : we would not accept this result! */
 408                     zm_debug_msg0("\n\n\n\n  Fail twice cold reset \n\n\n\n");
 409                     hpPriv->coldResetNeedFreq = 0;
 410                     hpPriv->recordFreqRetryCounter = 0;
 411                     zfCoreSetFrequencyComplete(dev);
 412                 }
 413             }
 414             else
 415             {
 416                 /* in sitesurvey, coldreset in next channel */
 417                 hpPriv->coldResetNeedFreq = 1;
 418                 hpPriv->recordFreqRetryCounter = 0;
 419                 zfCoreSetFrequencyComplete(dev);
 420             }
 421         }
 422         else if (rsp[1] & 0x2)
 423         {
 424             zm_debug_msg1("Set Frequency fail 2 : ret = ", rsp[1]);
 425
 426             /* Noise Calibration un-finish                          */
 427             /*      and not in sitesurvey, try more once            */
 428             if ( hpPriv->isSiteSurvey == 2 )
 429             {
 430                 if ( hpPriv->recordFreqRetryCounter < 1 )
 431                 {
 432                     /* cold reset */
 433                     zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 434                                             hpPriv->latestBw40,
 435                                             hpPriv->latestExtOffset,
 436                                             2);
 437                     hpPriv->recordFreqRetryCounter++;
 438                     zm_debug_msg1("2 Retry to issue the frequency change command(cold reset) counter = ", hpPriv->recordFreqRetryCounter);
 439                 }
 440                 else
 441                 {
 442                     /* Fail : we would not accept this result! */
 443                     zm_debug_msg0("\n\n\n\n  2 Fail twice cold reset \n\n\n\n");
 444                     hpPriv->coldResetNeedFreq = 0;
 445                     hpPriv->recordFreqRetryCounter = 0;
 446                     zfCoreSetFrequencyComplete(dev);
 447                 }
 448             }
 449             else
 450             {
 451                 /* in sitesurvey, skip this frequency */
 452                 hpPriv->coldResetNeedFreq = 0;
 453                 hpPriv->recordFreqRetryCounter = 0;
 454                 zfCoreSetFrequencyComplete(dev);
 455             }
 456         }
 457         //else if (rsp[1] & 0x4)
 458         //{
 459         //    zm_debug_msg1("Set Frequency fail 3 : ret = ", rsp[1]);
 460         //    hpPriv->coldResetNeedFreq = 0;
 461         //    hpPriv->recordFreqRetryCounter = 0;
 462         //    zfCoreSetFrequencyComplete(dev);
 463         //}
 464         else
 465         {
 466             //hpPriv->freqRetryCounter = 0;
 467             zm_debug_msg2(" return complete, ret = ", rsp[1]);
 468
 469             /* set bb_heavy_clip_enable */
 470             if (hpPriv->enableBBHeavyClip && hpPriv->hwBBHeavyClip &&
 471                 hpPriv->doBBHeavyClip)
 472             {
 473                 u32_t setValue = 0x200;
 474
 475                 setValue |= hpPriv->setValueHeavyClip;
 476
 477                 //zm_dbg(("Do heavy clip setValue = %d\n", setValue));
 478
 479                 zfDelayWriteInternalReg(dev, 0x99e0+0x1bc000, setValue);
 480                 zfFlushDelayWrite(dev);
 481             }
 482
 483             hpPriv->coldResetNeedFreq = 0;
 484             hpPriv->recordFreqRetryCounter = 0;
 485             zfCoreSetFrequencyComplete(dev);
 486         }
 487
 488         #if 1
 489         // Read the Noise Floor value !
 490         nf = ((rsp[2]>>19) & 0x1ff);
 491         if ((nf & 0x100) != 0x0)
 492         {
 493             noisefloor[0] = 0 - ((nf ^ 0x1ff) + 1);
 494         }
 495         else
 496         {
 497             noisefloor[0] = nf;
 498         }
 499
 500         //zm_debug_msg1("Noise Floor[1] = ", noisefloor[0]);
 501
 502         nf = ((rsp[3]>>19) & 0x1ff);
 503         if ((nf & 0x100) != 0x0)
 504         {
 505             noisefloor[1] = 0 - ((nf ^ 0x1ff) + 1);
 506         }
 507         else
 508         {
 509             noisefloor[1] = nf;
 510         }
 511
 512         //zm_debug_msg1("Noise Floor[2] = ", noisefloor[1]);
 513
 514         nf = ((rsp[5]>>23) & 0x1ff);
 515         if ((nf & 0x100) != 0x0)
 516         {
 517             noisefloor[2] = 0 - ((nf ^ 0x1ff) + 1);
 518         }
 519         else
 520         {
 521             noisefloor[2] = nf;
 522         }
 523
 524         //zm_debug_msg1("Noise Floor ext[1] = ", noisefloor[2]);
 525
 526         nf = ((rsp[6]>>23) & 0x1ff);
 527         if ((nf & 0x100) != 0x0)
 528         {
 529             noisefloor[3] = 0 - ((nf ^ 0x1ff) + 1);
 530         }
 531         else
 532         {
 533             noisefloor[3] = nf;
 534         }
 535
 536         //zm_debug_msg1("Noise Floor ext[2] = ", noisefloor[3]);
 537
 538         //zm_debug_msg1("Is Site Survey = ", hpPriv->isSiteSurvey);
 539         #endif
 540     }
 541     else if (src == ZM_CMD_SET_KEY)
 542     {
 543         zfCoreSetKeyComplete(dev);
 544     }
 545     else if (src == ZM_CWM_READ)
 546     {
 547         zm_msg2_mm(ZM_LV_0, "CWM rsp[1]=", rsp[1]);
 548         zm_msg2_mm(ZM_LV_0, "CWM rsp[2]=", rsp[2]);
 549         zfCoreCwmBusy(dev, zfCwmIsExtChanBusy(rsp[1], rsp[2]));
 550     }
 551     else if (src == ZM_MAC_READ)
 552     {
 553         /* rsp[1] = ZM_SEEPROM_MAC_ADDRESS_OFFSET;   */
 554         /* rsp[2] = ZM_SEEPROM_MAC_ADDRESS_OFFSET+4; */
 555         /* rsp[3] = ZM_SEEPROM_REGDOMAIN_OFFSET;     */
 556         /* rsp[4] = ZM_SEEPROM_VERISON_OFFSET;       */
 557         /* rsp[5] = ZM_SEEPROM_HARDWARE_TYPE_OFFSET; */
 558         /* rsp[6] = ZM_SEEPROM_HW_HEAVY_CLIP;        */
 559
 560         u8_t addr[6], CCS, WWR;
 561         u16_t CountryDomainCode;
 562
 563         /* BB heavy clip */
 564         //hpPriv->eepromHeavyClipFlag = (u8_t)((rsp[6]>>24) & 0xff); // force enable 8107
 565         //zm_msg2_mm(ZM_LV_0, "eepromHeavyClipFlag", hpPriv->eepromHeavyClipFlag);
 566         #if 0
 567         if (hpPriv->hwBBHeavyClip)
 568         {
 569             zm_msg0_mm(ZM_LV_0, "enable BB Heavy Clip");
 570         }
 571         else
 572         {
 573             zm_msg0_mm(ZM_LV_0, "Not enable BB Heavy Clip");
 574         }
 575         #endif
 576         zm_msg2_mm(ZM_LV_0, "MAC rsp[1]=", rsp[1]);
 577         zm_msg2_mm(ZM_LV_0, "MAC rsp[2]=", rsp[2]);
 578
 579         addr[0] = (u8_t)(rsp[1] & 0xff);
 580         addr[1] = (u8_t)((rsp[1]>>8) & 0xff);
 581         addr[2] = (u8_t)((rsp[1]>>16) & 0xff);
 582         addr[3] = (u8_t)((rsp[1]>>24) & 0xff);
 583         addr[4] = (u8_t)(rsp[2] & 0xff);
 584         addr[5] = (u8_t)((rsp[2]>>8) & 0xff);
 585 /*#ifdef ZM_FB50
 586         addr[0] = (u8_t)(0 & 0xff);
 587         addr[1] = (u8_t)(3 & 0xff);
 588         addr[2] = (u8_t)(127 & 0xff);
 589         addr[3] = (u8_t)(0 & 0xff);
 590         addr[4] = (u8_t)(9 & 0xff);
 591         addr[5] = (u8_t)(11 & 0xff);
 592 #endif*/
 593
 594         zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_L,
 595                 ((((u32_t)addr[3])<<24) | (((u32_t)addr[2])<<16) | (((u32_t)addr[1])<<8) | addr[0]));
 596         zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_H,
 597                 ((((u32_t)addr[5])<<8) | addr[4]));
 598         zfFlushDelayWrite(dev);
 599
 600         wd->ledStruct.ledMode[0] = (u16_t)(rsp[5]&0xffff);
 601         wd->ledStruct.ledMode[1] = (u16_t)(rsp[5]>>16);
 602         zm_msg2_mm(ZM_LV_0, "ledMode[0]=", wd->ledStruct.ledMode[0]);
 603         zm_msg2_mm(ZM_LV_0, "ledMode[1]=", wd->ledStruct.ledMode[1]);
 604
 605         /* Regulatory Related Setting */
 606         zm_msg2_mm(ZM_LV_0, "RegDomain rsp=", rsp[3]);
 607         zm_msg2_mm(ZM_LV_0, "OpFlags+EepMisc=", rsp[4]);
 608         hpPriv->OpFlags = (u8_t)((rsp[4]>>16) & 0xff);
 609         if ((rsp[2] >> 24) == 0x1) //Tx mask == 0x1
 610         {
 611             zm_msg0_mm(ZM_LV_0, "OTUS 1x2");
 612             hpPriv->halCapability |= ZM_HP_CAP_11N_ONE_TX_STREAM;
 613         }
 614         else
 615         {
 616             zm_msg0_mm(ZM_LV_0, "OTUS 2x2");
 617         }
 618         if (hpPriv->OpFlags & 0x1)
 619         {
 620             hpPriv->halCapability |= ZM_HP_CAP_5G;
 621         }
 622         if (hpPriv->OpFlags & 0x2)
 623         {
 624             hpPriv->halCapability |= ZM_HP_CAP_2G;
 625         }
 626
 627
 628         CCS = (u8_t)((rsp[3] & 0x8000) >> 15);
 629         WWR = (u8_t)((rsp[3] & 0x4000) >> 14);
 630         CountryDomainCode = (u16_t)(rsp[3] & 0x3FFF);
 631
 632         if (rsp[3] != 0xffffffff)
 633         {
 634             if (CCS)
 635             {
 636                 //zm_debug_msg0("CWY - Get Regulation Table from Country Code");
 637                 zfHpGetRegulationTablefromCountry(dev, CountryDomainCode);
 638             }
 639             else
 640             {
 641                 //zm_debug_msg0("CWY - Get Regulation Table from Reg Domain");
 642                 zfHpGetRegulationTablefromRegionCode(dev, CountryDomainCode);
 643             }
 644             if (WWR)
 645             {
 646                 //zm_debug_msg0("CWY - Enable 802.11d");
 647                 /* below line shall be unmarked after A band is ready */
 648                 //zfiWlanSetDot11DMode(dev, 1);
 649             }
 650         }
 651         else
 652         {
 653             zfHpGetRegulationTablefromRegionCode(dev, NO_ENUMRD);
 654         }
 655
 656         zfCoreMacAddressNotify(dev, addr);
 657
 658     }
 659     else if (src == ZM_EEPROM_READ)
 660     {
 661 #if 0
 662         u8_t addr[6], CCS, WWR;
 663         u16_t CountryDomainCode;
 664 #endif
 665         for (i=0; i<ZM_HAL_MAX_EEPROM_PRQ; i++)
 666         {
 667             if (hpPriv->eepromImageIndex < 1024)
 668             {
 669                 hpPriv->eepromImage[hpPriv->eepromImageIndex++] = rsp[i+1];
 670             }
 671         }
 672
 673         if (hpPriv->eepromImageIndex == (ZM_HAL_MAX_EEPROM_REQ*ZM_HAL_MAX_EEPROM_PRQ))
 674         {
 675             #if 0
 676             for (i=0; i<1024; i++)
 677             {
 678                 zm_msg2_mm(ZM_LV_0, "index=", i);
 679                 zm_msg2_mm(ZM_LV_0, "eepromImage=", hpPriv->eepromImage[i]);
 680             }
 681             #endif
 682             zm_msg2_mm(ZM_LV_0, "MAC [1]=", hpPriv->eepromImage[0x20c/4]);
 683             zm_msg2_mm(ZM_LV_0, "MAC [2]=", hpPriv->eepromImage[0x210/4]);
 684 #if 0
 685             addr[0] = (u8_t)(hpPriv->eepromImage[0x20c/4] & 0xff);
 686             addr[1] = (u8_t)((hpPriv->eepromImage[0x20c/4]>>8) & 0xff);
 687             addr[2] = (u8_t)((hpPriv->eepromImage[0x20c/4]>>16) & 0xff);
 688             addr[3] = (u8_t)((hpPriv->eepromImage[0x20c/4]>>24) & 0xff);
 689             addr[4] = (u8_t)(hpPriv->eepromImage[0x210/4] & 0xff);
 690             addr[5] = (u8_t)((hpPriv->eepromImage[0x210/4]>>8) & 0xff);
 691
 692             zfCoreMacAddressNotify(dev, addr);
 693
 694             zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_L,
 695                     ((((u32_t)addr[3])<<24) | (((u32_t)addr[2])<<16) | (((u32_t)addr[1])<<8) | addr[0]));
 696             zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_H,
 697                     ((((u32_t)addr[5])<<8) | addr[4]));
 698             zfFlushDelayWrite(dev);
 699
 700             /* Regulatory Related Setting */
 701             zm_msg2_mm(ZM_LV_0, "RegDomain =", hpPriv->eepromImage[0x208/4]);
 702             CCS = (u8_t)((hpPriv->eepromImage[0x208/4] & 0x8000) >> 15);
 703             WWR = (u8_t)((hpPriv->eepromImage[0x208/4] & 0x4000) >> 14);
 704             /* below line shall be unmarked after A band is ready */
 705             //CountryDomainCode = (u16_t)(hpPriv->eepromImage[0x208/4] & 0x3FFF);
 706             CountryDomainCode = 8;
 707             if (CCS)
 708             {
 709                 //zm_debug_msg0("CWY - Get Regulation Table from Country Code");
 710                 zfHpGetRegulationTablefromCountry(dev, CountryDomainCode);
 711             }
 712             else
 713             {
 714                 //zm_debug_msg0("CWY - Get Regulation Table from Reg Domain");
 715                 zfHpGetRegulationTablefromRegionCode(dev, CountryDomainCode);
 716             }
 717             if (WWR)
 718             {
 719                 //zm_debug_msg0("CWY - Enable 802.11d");
 720                 /* below line shall be unmarked after A band is ready */
 721                 //zfiWlanSetDot11DMode(dev, 1);
 722             }
 723 #endif
 724             zfCoreHalInitComplete(dev);
 725         }
 726         else
 727         {
 728             hpPriv->eepromImageRdReq++;
 729             zfHpLoadEEPROMFromFW(dev);
 730         }
 731     }
 732     else if (src == ZM_EEPROM_WRITE)
 733     {
 734         zfwDbgWriteEepromDone(dev, cmd[1], cmd[2]);
 735     }
 736     else if (src == ZM_ANI_READ)
 737     {
 738         u32_t cycleTime, ctlClear;
 739
 740         zm_msg2_mm(ZM_LV_0, "ANI rsp[1]=", rsp[1]);
 741         zm_msg2_mm(ZM_LV_0, "ANI rsp[2]=", rsp[2]);
 742         zm_msg2_mm(ZM_LV_0, "ANI rsp[3]=", rsp[3]);
 743         zm_msg2_mm(ZM_LV_0, "ANI rsp[4]=", rsp[4]);
 744
 745         hpPriv->ctlBusy += rsp[1];
 746         hpPriv->extBusy += rsp[2];
 747
 748         cycleTime = 100000; //100 miniseconds
 749
 750         if (cycleTime > rsp[1])
 751         {
 752             ctlClear = (cycleTime - rsp[1]) / 100;
 753         }
 754         else
 755         {
 756             ctlClear = 0;
 757         }
 758         if (wd->aniEnable)
 759             zfHpAniArPoll(dev, ctlClear, rsp[3], rsp[4]);
 760     }
 761     else if (src == ZM_CMD_ECHO)
 762     {
 763         if ( ((struct zsHpPriv*)wd->hpPrivate)->halReInit )
 764         {
 765             zfCoreHalInitComplete(dev);
 766             ((struct zsHpPriv*)wd->hpPrivate)->halReInit = 0;
 767         }
 768         else
 769         {
 770             zfHpLoadEEPROMFromFW(dev);
 771         }
 772     }
 773     else if (src == ZM_OID_FW_DL_INIT)
 774     {
 775         zfwDbgDownloadFwInitDone(dev);
 776     }
 777     return;
 778 }
 779
 780
 781 /************************************************************************/
 782 /*                                                                      */
 783 /*    FUNCTION DESCRIPTION                  zfWriteRegInternalReg       */
 784 /*      Write on chip internal register immediately.                    */
 785 /*                                                                      */
 786 /*    INPUTS                                                            */
 787 /*      dev : device pointer                                            */
 788 /*      addr : register address                                         */
 789 /*      val : value                                                     */
 790 /*                                                                      */
 791 /*    OUTPUTS                                                           */
 792 /*      0 : success                                                     */
 793 /*      other : fail                                                    */
 794 /*                                                                      */
 795 /*    AUTHOR                                                            */
 796 /*      Stephen Chen        ZyDAS Technology Corporation    2005.11     */
 797 /*                                                                      */
 798 /************************************************************************/
 799 u32_t zfWriteRegInternalReg(zdev_t* dev, u32_t addr, u32_t val)
 800 {
 801     u32_t cmd[3];
 802     u16_t ret;
 803
 804     cmd[0] = 0x00000108;
 805     cmd[1] = addr;
 806     cmd[2] = val;
 807
 808     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_INTERNAL_WRITE, NULL);
 809     return ret;
 810 }
 811
 812
 813 /************************************************************************/
 814 /*                                                                      */
 815 /*    FUNCTION DESCRIPTION                  zfDelayWriteInternalReg     */
 816 /*      Write on chip internal register, write operation may be         */
 817 /*      postponed to form a multiple write command.                     */
 818 /*                                                                      */
 819 /*    INPUTS                                                            */
 820 /*      dev : device pointer                                            */
 821 /*      addr : register address                                         */
 822 /*      val : value                                                     */
 823 /*                                                                      */
 824 /*    OUTPUTS                                                           */
 825 /*      0 : command been postponed                                      */
 826 /*      1 : commands been executed                                      */
 827 /*                                                                      */
 828 /*    AUTHOR                                                            */
 829 /*      Stephen Chen        ZyDAS Technology Corporation    2005.11     */
 830 /*                                                                      */
 831 /************************************************************************/
 832 u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val)
 833 {
 834     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
 835     u16_t i;
 836     u16_t ret;
 837     struct zsHpPriv* hpPriv;
 838
 839     zmw_get_wlan_dev(dev);
 840     hpPriv=wd->hpPrivate;
 841
 842     zmw_declare_for_critical_section();
 843
 844     /* enter critical section */
 845     zmw_enter_critical_section(dev);
 846
 847     /* Store command to global buffer */
 848     hpPriv->cmd.delayWcmdAddr[hpPriv->cmd.delayWcmdCount] = addr;
 849     hpPriv->cmd.delayWcmdVal[hpPriv->cmd.delayWcmdCount++] = val;
 850
 851     /* If pending command reach size limit */
 852     if ((hpPriv->cmd.delayWcmdCount) >= ((ZM_MAX_CMD_SIZE - 4) >> 3))
 853     {
 854         cmd[0] = 0x00000100 + (hpPriv->cmd.delayWcmdCount<<3);
 855
 856         /* copy command to cmd buffer */
 857         for (i=0; i<hpPriv->cmd.delayWcmdCount; i++)
 858         {
 859             cmd[1+(i<<1)] = hpPriv->cmd.delayWcmdAddr[i];
 860             cmd[2+(i<<1)] = hpPriv->cmd.delayWcmdVal[i];
 861         }
 862         /* reset pending command */
 863         hpPriv->cmd.delayWcmdCount = 0;
 864
 865         /* leave critical section */
 866         zmw_leave_critical_section(dev);
 867
 868         /* issue write command */
 869         ret = zfIssueCmd(dev, cmd, 4+(i<<3), ZM_OID_INTERNAL_WRITE, NULL);
 870
 871         return 1;
 872     }
 873     else
 874     {
 875         /* leave critical section */
 876         zmw_leave_critical_section(dev);
 877
 878         return 0;
 879     }
 880 }
 881
 882
 883 /************************************************************************/
 884 /*                                                                      */
 885 /*    FUNCTION DESCRIPTION                  zfFlushDelayWrite           */
 886 /*      Flush pending write command.                                    */
 887 /*                                                                      */
 888 /*    INPUTS                                                            */
 889 /*      dev : device pointer                                            */
 890 /*                                                                      */
 891 /*    OUTPUTS                                                           */
 892 /*      0 : no pending command                                          */
 893 /*      1 : commands been executed                                      */
 894 /*                                                                      */
 895 /*    AUTHOR                                                            */
 896 /*      Stephen Chen        ZyDAS Technology Corporation    2005.11     */
 897 /*                                                                      */
 898 /************************************************************************/
 899 u16_t zfFlushDelayWrite(zdev_t* dev)
 900 {
 901     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
 902     u16_t i;
 903     u16_t ret;
 904     struct zsHpPriv* hpPriv;
 905
 906     zmw_get_wlan_dev(dev);
 907     hpPriv=wd->hpPrivate;
 908
 909     zmw_declare_for_critical_section();
 910
 911     /* enter critical section */
 912     zmw_enter_critical_section(dev);
 913
 914     /* If there is pending command */
 915     if (hpPriv->cmd.delayWcmdCount > 0)
 916     {
 917         cmd[0] = 0x00000100 + (hpPriv->cmd.delayWcmdCount<<3);
 918
 919         /* copy command to cmd buffer */
 920         for (i=0; i<hpPriv->cmd.delayWcmdCount; i++)
 921         {
 922             cmd[1+(i<<1)] = hpPriv->cmd.delayWcmdAddr[i];
 923             cmd[2+(i<<1)] = hpPriv->cmd.delayWcmdVal[i];
 924         }
 925         /* reset pending command */
 926         hpPriv->cmd.delayWcmdCount = 0;
 927
 928         /* leave critical section */
 929         zmw_leave_critical_section(dev);
 930
 931         /* issue write command */
 932         ret = zfIssueCmd(dev, cmd, 4+(i<<3), ZM_OID_INTERNAL_WRITE, NULL);
 933
 934         return 1;
 935     }
 936     else
 937     {
 938         /* leave critical section */
 939         zmw_leave_critical_section(dev);
 940
 941         return 0;
 942     }
 943 }
 944
 945
 946 u32_t zfiDbgDelayWriteReg(zdev_t* dev, u32_t addr, u32_t val)
 947 {
 948         zfDelayWriteInternalReg(dev, addr, val);
 949         return 0;
 950 }
 951
 952 u32_t zfiDbgFlushDelayWrite(zdev_t* dev)
 953 {
 954         zfFlushDelayWrite(dev);
 955         return 0;
 956 }
 957
 958 /************************************************************************/
 959 /*                                                                      */
 960 /*    FUNCTION DESCRIPTION                  zfiDbgWriteReg              */
 961 /*      Write register.                                                 */
 962 /*                                                                      */
 963 /*    INPUTS                                                            */
 964 /*      dev : device pointer                                            */
 965 /*      addr : register address                                         */
 966 /*      val : value                                                     */
 967 /*                                                                      */
 968 /*    OUTPUTS                                                           */
 969 /*      0 : success                                                     */
 970 /*      other : fail                                                    */
 971 /*                                                                      */
 972 /*    AUTHOR                                                            */
 973 /*      Stephen Chen        ZyDAS Technology Corporation    2005.10     */
 974 /*                                                                      */
 975 /************************************************************************/
 976 u32_t zfiDbgWriteReg(zdev_t* dev, u32_t addr, u32_t val)
 977 {
 978     u32_t cmd[3];
 979     u16_t ret;
 980
 981     cmd[0] = 0x00000108;
 982     cmd[1] = addr;
 983     cmd[2] = val;
 984
 985     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_WRITE, 0);
 986     return ret;
 987 }
 988 /************************************************************************/
 989 /*                                                                      */
 990 /*    FUNCTION DESCRIPTION                  zfiDbgWriteFlash            */
 991 /*      Write flash.                                                    */
 992 /*                                                                      */
 993 /*    INPUTS                                                            */
 994 /*      dev : device pointer                                            */
 995 /*      addr : register address                                         */
 996 /*      val : value                                                     */
 997 /*                                                                      */
 998 /*    OUTPUTS                                                           */
 999 /*      0 : success                                                     */
1000 /*      other : fail                                                    */
1001 /*                                                                      */
1002 /*    AUTHOR                                                            */
1003 /*      Yjsung        ZyDAS Technology Corporation    2007.02           */
1004 /*                                                                      */
1005 /************************************************************************/
1006 u32_t zfiDbgWriteFlash(zdev_t* dev, u32_t addr, u32_t val)
1007 {
1008     u32_t cmd[3];
1009     u16_t ret;
1010
1011     //cmd[0] = 0x0000B008;
1012         /* len[0] : type[0xB0] : seq[?] */
1013     cmd[0] = 8 | (ZM_CMD_WFLASH << 8);
1014     cmd[1] = addr;
1015     cmd[2] = val;
1016
1017     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_WRITE, 0);
1018     return ret;
1019 }
1020
1021 /************************************************************************/
1022 /*                                                                      */
1023 /*    FUNCTION DESCRIPTION                  zfiDbgWriteEeprom            */
1024 /*      Write EEPROM.                                                    */
1025 /*                                                                      */
1026 /*    INPUTS                                                            */
1027 /*      dev : device pointer                                            */
1028 /*      addr : register address                                         */
1029 /*      val : value                                                     */
1030 /*                                                                      */
1031 /*    OUTPUTS                                                           */
1032 /*      0 : success                                                     */
1033 /*      other : fail                                                    */
1034 /*                                                                      */
1035 /*    AUTHOR                                                            */
1036 /*      Paul        ZyDAS Technology Corporation    2007.06             */
1037 /*                                                                      */
1038 /************************************************************************/
1039 u32_t zfiDbgWriteEeprom(zdev_t* dev, u32_t addr, u32_t val)
1040 {
1041     u32_t cmd[3];
1042     u16_t ret;
1043
1044     //cmd[0] = 0x0000B008;
1045         /* len[0] : type[0xB0] : seq[?] */
1046     cmd[0] = 8 | (ZM_CMD_WREEPROM << 8);
1047     cmd[1] = addr;
1048     cmd[2] = val;
1049
1050     ret = zfIssueCmd(dev, cmd, 12, ZM_EEPROM_WRITE, 0);
1051     return ret;
1052 }
1053
1054 /************************************************************************/
1055 /*                                                                      */
1056 /*    FUNCTION DESCRIPTION                  zfiDbgBlockWriteEeprom      */
1057 /*      Block Write Eeprom.                                             */
1058 /*                                                                      */
1059 /*      p.s: now,it will write 16 bytes register data per block (N=4)   */
1060 /*                                                                      */
1061 /*    INPUTS                                                            */
1062 /*      dev : device pointer                                            */
1063 /*      addr : register address                                         */
1064 /*      buf : input data buffer pointer                                 */
1065 /*                                                                      */
1066 /*    OUTPUTS                                                           */
1067 /*      0 : success                                                     */
1068 /*      other : fail                                                    */
1069 /*                                                                      */
1070 /*    AUTHOR                                                            */
1071 /*      Paul        ZyDAS Technology Corporation    2007.06             */
1072 /*                                                                      */
1073 /************************************************************************/
1074 //#define N       buflen/4
1075 //#define SIZE    (2*N+1)
1076
1077 u32_t zfiDbgBlockWriteEeprom(zdev_t* dev, u32_t addr, u32_t* buf)
1078 {
1079     u32_t cmd[9];  //2N+1
1080     u16_t ret,i;
1081
1082     //cmd[0] = 0x0000B008;
1083           /* len[0] : type[0xB0] : seq[?] */
1084
1085     //cmd[0] = (8*N) | (ZM_CMD_WFLASH << 8);
1086     cmd[0] = 32 | (ZM_CMD_WREEPROM << 8);    //8N
1087
1088     for (i=0; i<4; i++)   // i<N
1089     {
1090         cmd[(2*i)+1] = addr+(4*i);
1091         cmd[(2*i)+2] = *(buf+i);
1092     }
1093
1094     ret = zfIssueCmd(dev, cmd, 36, ZM_EEPROM_WRITE, 0);    //8N+4
1095
1096     // added for EEPROMUpdate, wait a moment for prevent cmd queue full!
1097     //zfwSleep(dev, 1);
1098
1099     return ret;
1100 }
1101
1102
1103 /* write EEPROM with wrlen : wrlen must be 4*n */
1104 /* command format : cmd_info(4) + addr(4) + eeprom(wrlen) */
1105 u32_t zfiDbgBlockWriteEeprom_v2(zdev_t* dev, u32_t addr, u32_t* buf, u32_t wrlen)
1106 {
1107     u32_t cmd[16];
1108     u16_t ret,i;
1109
1110           /* len[0] : type[0xB0] : seq[?] */
1111           /* len = addr(4) + eeprom_block(wrlen) */
1112     cmd[0] = (wrlen+4) | (ZM_CMD_MEM_WREEPROM << 8);
1113     cmd[1] = addr;
1114
1115     for (i=0; i<(wrlen/4); i++)   // i<wrlen/4
1116     {
1117         cmd[2+i] = *(buf+i);
1118     }
1119     /* cmd_info(4) + addr(4) + eeprom(wrlen) */
1120     ret = zfIssueCmd(dev, cmd, (u16_t)(wrlen+8), ZM_EEPROM_WRITE, 0);
1121
1122     return ret;
1123 }
1124
1125 /************************************************************************/
1126 /*                                                                      */
1127 /*    FUNCTION DESCRIPTION                  zfDbgOpenEeprom            */
1128 /*      Open EEPROM.                                                    */
1129 /*                                                                      */
1130 /*    INPUTS                                                            */
1131 /*      dev : device pointer                                            */
1132 /*                                                                      */
1133 /*    OUTPUTS                                                           */
1134 /*                                                                      */
1135 /*    AUTHOR                                                            */
1136 /*      Paul                ZyDAS Technology Corporation    2007.06     */
1137 /*                                                                      */
1138 /************************************************************************/
1139 void zfDbgOpenEeprom(zdev_t* dev)
1140 {
1141     // unlock EEPROM
1142     zfDelayWriteInternalReg(dev, 0x1D1400, 0x12345678);
1143     zfDelayWriteInternalReg(dev, 0x1D1404, 0x55aa00ff);
1144     zfDelayWriteInternalReg(dev, 0x1D1408, 0x13579ace);
1145     zfDelayWriteInternalReg(dev, 0x1D1414, 0x0);
1146     zfFlushDelayWrite(dev);
1147 }
1148
1149 /************************************************************************/
1150 /*                                                                      */
1151 /*    FUNCTION DESCRIPTION                  zfDbgCloseEeprom            */
1152 /*      Close EEPROM.                                                    */
1153 /*                                                                      */
1154 /*    INPUTS                                                            */
1155 /*      dev : device pointer                                            */
1156 /*                                                                      */
1157 /*    OUTPUTS                                                           */
1158 /*                                                                      */
1159 /*    AUTHOR                                                            */
1160 /*      Paul                ZyDAS Technology Corporation    2007.05     */
1161 /*                                                                      */
1162 /************************************************************************/
1163 void zfDbgCloseEeprom(zdev_t* dev)
1164 {
1165     // lock EEPROM
1166     zfDelayWriteInternalReg(dev, 0x1D1400, 0x87654321);
1167     //zfDelayWriteInternalReg(dev, 0x1D1404, 0xffffffff);
1168     //zfDelayWriteInternalReg(dev, 0x1D1408, 0xffffffff);
1169     //zfDelayWriteInternalReg(dev, 0x1D1414, 0x100);
1170     zfFlushDelayWrite(dev);
1171 }
1172 #if 0
1173 /************************************************************************/
1174 /*                                                                      */
1175 /*    FUNCTION DESCRIPTION                  zfiSeriallyWriteEeprom      */
1176 /*      Write EEPROM Serially.                                          */
1177 /*                                                                      */
1178 /*    INPUTS                                                            */
1179 /*      dev : device pointer                                            */
1180 /*      addr : start address of writing EEPROM                          */
1181 /*      buf : input data buffer                                         */
1182 /*      buflen : size of input data buffer                              */
1183 /*               (length of data write into EEPROM)                     */
1184 /*                                                                      */
1185 /*    OUTPUTS                                                           */
1186 /*                                                                      */
1187 /*                                                                      */
1188 /*                                                                      */
1189 /*    AUTHOR                                                            */
1190 /*      Paul                ZyDAS Technology Corporation    2007.06     */
1191 /*                                                                      */
1192 /************************************************************************/
1193 u32_t zfiSeriallyWriteEeprom(zdev_t* dev, u32_t addr, u32_t* buf, u32_t buflen)
1194 {
1195     u32_t count;
1196     u16_t i,ret,blocksize;
1197     u8_t  temp[2];
1198
1199     // per 4 bytes = 1 count
1200     count = buflen/4;
1201
1202     // Open EEPROM
1203     zfDbgOpenEeprom(dev);
1204
1205     // Write EEPROM
1206     for (i=0; i<count; i++)
1207     {
1208         if (zfwWriteEeprom(dev, (addr+(4*i)), *(buf+i), 0) != 0)
1209         {
1210             // Update failed, Close EEPROM
1211             zm_debug_msg0("zfwWriteEeprom failed \n");
1212             zfDbgCloseEeprom(dev);
1213             return 1;
1214         }
1215     }
1216
1217     // Close EEPROM
1218     zfDbgCloseEeprom(dev);
1219     return 0;
1220 }
1221 #endif
1222 #if 0
1223 /************************************************************************/
1224 /*                                                                      */
1225 /*    FUNCTION DESCRIPTION                  zfiSeriallyBlockWriteEeprom */
1226 /*       Block Write EEPROM Serially.                                   */
1227 /*      (BlockWrite: per 16bytes write EEPROM once)                     */
1228 /*                                                                      */
1229 /*    INPUTS                                                            */
1230 /*      dev : device pointer                                            */
1231 /*      addr : register address                                         */
1232 /*      buf : input data buffer                                         */
1233 /*      buflen : access data size of buf                                */
1234 /*                                                                      */
1235 /*    OUTPUTS                                                           */
1236 /*      0 : success                                                     */
1237 /*      other : fail                                                    */
1238 /*                                                                      */
1239 /*    AUTHOR                                                            */
1240 /*      Paul                ZyDAS Technology Corporation    2007.05     */
1241 /*                                                                      */
1242 /************************************************************************/
1243 u32_t zfiSeriallyBlockWriteEeprom(zdev_t* dev, u32_t addr, u32_t* buf, u32_t buflen)
1244 {
1245     u32_t count;
1246     u16_t i,ret,blocksize;
1247     u8_t  temp[2];
1248
1249     // per 4 bytes = 1 count
1250     count = buflen/4;
1251
1252     // Open EEPROM
1253     zfDbgOpenEeprom(dev);
1254
1255     // Write EEPROM
1256     // EEPROM Write start address from: 0x1000!?
1257     // per 16bytes(N=4) block write EEPROM once
1258     for (i=0; i<(count/4); i++)   // count/N
1259     {
1260         //zfiDbgBlockWriteEeprom(dev, (addr+(4*N*i)), buf+(N*i));
1261         //zfiDbgBlockWriteEeprom(dev, (addr+(16*i)), buf+(4*i));
1262         if (zfwBlockWriteEeprom(dev, (addr+(16*i)), buf+(4*i), 0) != 0)
1263         {
1264             zm_debug_msg0("zfiDbgBlockWriteEeprom failed \n");
1265             // Close EEPROM
1266             zfDbgCloseEeprom(dev);
1267             return 1;
1268         }
1269     }
1270
1271     // Close EEPROM
1272     zfDbgCloseEeprom(dev);
1273     return 0;
1274 }
1275 #endif
1276 #if 0
1277 /************************************************************************/
1278 /*                                                                      */
1279 /*    FUNCTION DESCRIPTION                  zfiDbgDumpEeprom            */
1280 /*      Dump EEPROM.                                                    */
1281 /*                                                                      */
1282 /*    INPUTS                                                            */
1283 /*      dev : device pointer                                            */
1284 /*      addr : start address of dumping EEPROM                          */
1285 /*      datalen :  length of access EEPROM data                           */
1286 /*      buf :  point of buffer, the buffer saved dump data              */
1287 /*                                                                      */
1288 /*    OUTPUTS                                                           */
1289 /*      0 : success                                                     */
1290 /*      other : fail                                                    */
1291 /*                                                                      */
1292 /*    AUTHOR                                                            */
1293 /*      Paul                ZyDAS Technology Corporation    2007.06     */
1294 /*                                                                      */
1295 /************************************************************************/
1296 u32_t zfiDbgDumpEeprom(zdev_t* dev, u32_t addr, u32_t datalen, u32_t* buf)
1297 {
1298     u32_t count;
1299     u16_t i,ret;
1300
1301     count = datalen/4;
1302
1303     // over EEPROM length
1304     if(datalen > 0x2000)
1305     {
1306         return 1;
1307     }
1308
1309     for(i=0; i<count; i++)
1310     {
1311         buf[i] = zfwReadEeprom(dev, addr+(4*i));
1312     }
1313
1314     return 0;
1315 }
1316 #endif
1317 /************************************************************************/
1318 /*                                                                      */
1319 /*    FUNCTION DESCRIPTION                  zfiDbgReadReg               */
1320 /*      Read register.                                                  */
1321 /*                                                                      */
1322 /*    INPUTS                                                            */
1323 /*      dev : device pointer                                            */
1324 /*      addr : register address                                         */
1325 /*                                                                      */
1326 /*    OUTPUTS                                                           */
1327 /*      0 : success                                                     */
1328 /*      other : fail                                                    */
1329 /*                                                                      */
1330 /*    AUTHOR                                                            */
1331 /*      Stephen Chen        ZyDAS Technology Corporation    2005.10     */
1332 /*                                                                      */
1333 /************************************************************************/
1334 u32_t zfiDbgReadReg(zdev_t* dev, u32_t addr)
1335 {
1336     u32_t cmd[2];
1337     u16_t ret;
1338
1339     cmd[0] = 0x00000004;
1340     cmd[1] = addr;
1341
1342     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_READ, 0);
1343     return ret;
1344 }
1345
1346
1347 /************************************************************************/
1348 /*                                                                      */
1349 /*    FUNCTION DESCRIPTION                  zfiDbgReadTally             */
1350 /*      Read register.                                                  */
1351 /*                                                                      */
1352 /*    INPUTS                                                            */
1353 /*      dev : device pointer                                            */
1354 /*                                                                      */
1355 /*    OUTPUTS                                                           */
1356 /*      0 : success                                                     */
1357 /*      other : fail                                                    */
1358 /*                                                                      */
1359 /*    AUTHOR                                                            */
1360 /*      Stephen Chen        ZyDAS Technology Corporation    2005.10     */
1361 /*                                                                      */
1362 /************************************************************************/
1363 u32_t zfiDbgReadTally(zdev_t* dev)
1364 {
1365     u32_t cmd[1];
1366     u16_t ret;
1367         zmw_get_wlan_dev(dev);
1368
1369         if ( ((struct zsHpPriv*)wd->hpPrivate)->halReInit )
1370         {
1371             return 1;
1372         }
1373
1374         /* len[0] : type[0x81] : seq[?] */
1375     cmd[0] = 0 | (ZM_CMD_TALLY << 8);
1376     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_TALLY, 0);
1377
1378         /* len[0] : type[0x82] : seq[?] */
1379     cmd[0] = 0 | (ZM_CMD_TALLY_APD << 8);
1380     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_TALLY_APD, 0);
1381
1382     return ret;
1383 }
1384
1385
1386 u32_t zfiDbgSetIFSynthesizer(zdev_t* dev, u32_t value)
1387 {
1388     u32_t cmd[2];
1389     u16_t ret;
1390
1391         /* len[4] : type[0x32] : seq[?] */
1392     cmd[0] = 0x4 | (ZM_OID_SYNTH << 8);
1393     cmd[1] = value;
1394
1395     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_SYNTH, 0);
1396     return ret;
1397 }
1398
1399 u32_t zfiDbgQueryHwTxBusy(zdev_t* dev)
1400 {
1401     u32_t cmd[1];
1402     u16_t ret;
1403
1404         /* len[4] : type[0xC0] : seq[?] */
1405         cmd[0] = 0 | (ZM_CMD_DKTX_STATUS << 8);
1406
1407     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_DKTX_STATUS, 0);
1408     return ret;
1409 }
1410
1411 //Paul++
1412 #if 0
1413 u16_t zfHpBlockEraseFlash(zdev_t *dev, u32_t addr)
1414 {
1415     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1416     u16_t ret;
1417
1418     cmd[0] = 0x00000004 | (ZM_CMD_FLASH_ERASE << 8);
1419     cmd[1] = addr;
1420
1421     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_INTERNAL_WRITE, NULL);
1422     return ret;
1423 }
1424 #endif
1425
1426 #if 0
1427 u16_t zfiDbgProgramFlash(zdev_t *dev, u32_t offset, u32_t len, u32_t *data)
1428 {
1429     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1430     u16_t ret;
1431     u16_t i;
1432
1433
1434     cmd[0] = (ZM_CMD_FLASH_PROG << 8) | ((len+8) & 0xff);
1435     cmd[1] = offset;
1436     cmd[2] = len;
1437
1438     for (i = 0; i < (len >> 2); i++)
1439     {
1440          cmd[3+i] = data[i];
1441     }
1442
1443     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_FLASH_PROGRAM, NULL);
1444
1445     return ret;
1446 }
1447 #endif
1448
1449 /************************************************************************/
1450 /*                                                                      */
1451 /*    FUNCTION DESCRIPTION                  zfiDbgChipEraseFlash        */
1452 /*      Chip Erase Flash.                                               */
1453 /*                                                                      */
1454 /*    INPUTS                                                            */
1455 /*      dev : device pointer                                            */
1456 /*                                                                      */
1457 /*    OUTPUTS                                                           */
1458 /*      0 : success                                                     */
1459 /*      other : fail                                                    */
1460 /*                                                                      */
1461 /*    AUTHOR                                                            */
1462 /*      Paul                Atheros Technology Corporation    2007.09   */
1463 /*                                                                      */
1464 /************************************************************************/
1465 u16_t zfiDbgChipEraseFlash(zdev_t *dev)
1466 {
1467     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1468     u16_t ret;
1469
1470     cmd[0] = 0x00000000 | (ZM_CMD_FLASH_ERASE << 8);
1471
1472     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_INTERNAL_WRITE, NULL);
1473     return ret;
1474 }
1475 /************************************************************************/
1476 /*                                                                      */
1477 /*    FUNCTION DESCRIPTION                  zfiDbgGetFlashCheckSum      */
1478 /*      Get FlashCheckSum.                                              */
1479 /*                                                                      */
1480 /*    INPUTS                                                            */
1481 /*      dev : device pointer                                            */
1482 /*      addr : Start address of getchksum                               */
1483 /*      len : total lenth of calculate getchksum                        */
1484 /*                                                                      */
1485 /*    OUTPUTS                                                           */
1486 /*      0 : success                                                     */
1487 /*      other : fail                                                    */
1488 /*                                                                      */
1489 /*    AUTHOR                                                            */
1490 /*      Paul                Atheros Technology Corporation    2007.08   */
1491 /*                                                                      */
1492 /************************************************************************/
1493 u32_t zfiDbgGetFlashCheckSum(zdev_t *dev, u32_t addr, u32_t len)
1494 {
1495     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1496     u32_t ret;
1497
1498     cmd[0] = 0x00000008 | (ZM_CMD_FLASH_CHKSUM << 8);
1499     cmd[1] = addr;
1500     cmd[2] = len;
1501
1502     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_FLASH_CHKSUM, NULL);
1503
1504     return ret;
1505 }
1506
1507 /************************************************************************/
1508 /*                                                                      */
1509 /*    FUNCTION DESCRIPTION                  zfiDbgReadFlash             */
1510 /*      Read Flash.                                                     */
1511 /*                                                                      */
1512 /*    INPUTS                                                            */
1513 /*      dev : device pointer                                            */
1514 /*      addr : Start address of read flash                              */
1515 /*      len : total lenth of read flash data                            */
1516 /*                                                                      */
1517 /*    OUTPUTS                                                           */
1518 /*      0 : success                                                     */
1519 /*      other : fail                                                    */
1520 /*                                                                      */
1521 /*    AUTHOR                                                            */
1522 /*      Paul                Atheros Technology Corporation    2007.09   */
1523 /*                                                                      */
1524 /************************************************************************/
1525 u32_t zfiDbgReadFlash(zdev_t *dev, u32_t addr, u32_t len)
1526 {
1527     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1528     u32_t ret;
1529
1530     cmd[0] = len | (ZM_CMD_FLASH_READ << 8);
1531     cmd[1] = addr;
1532
1533     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_FLASH_READ, NULL);
1534     return ret;
1535 }
1536
1537 /************************************************************************/
1538 /*                                                                      */
1539 /*    FUNCTION DESCRIPTION                  zfiDownloadFwSet            */
1540 /*      Before Download FW,                                             */
1541 /*      Command FW to Software reset and close watch dog control.       */
1542 /*                                                                      */
1543 /*                                                                      */
1544 /*    INPUTS                                                            */
1545 /*      dev : device pointer                                            */
1546 /*                                                                      */
1547 /*    OUTPUTS                                                           */
1548 /*      0 : success                                                     */
1549 /*      other : fail                                                    */
1550 /*                                                                      */
1551 /*    AUTHOR                                                            */
1552 /*      Paul                Atheros Technology Corporation    2007.09   */
1553 /*                                                                      */
1554 /************************************************************************/
1555 u32_t zfiDownloadFwSet(zdev_t *dev)
1556 {
1557 //softwarereset
1558 //close watch dog
1559     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1560     u32_t ret;
1561
1562     cmd[0] = 0x00000008 | (ZM_CMD_FW_DL_INIT << 8);
1563
1564     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_FW_DL_INIT, NULL);
1565
1566     return ret;
1567 }
1568 //Paul--