4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port.
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other
36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier
39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
48 * Steve Davies <steve@daviesfam.org> July 2001
51 #include <linux/module.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
56 #include <linux/interrupt.h>
57 #include <linux/ioport.h>
58 #include <linux/kernel.h>
59 #include <linux/serial_reg.h>
60 #include <linux/time.h>
61 #include <linux/string.h>
62 #include <linux/types.h>
63 #include <linux/wait.h>
65 #include <linux/delay.h>
66 #include <linux/poll.h>
67 #include <linux/platform_device.h>
69 #include <asm/system.h>
71 #include <linux/irq.h>
72 #include <linux/fcntl.h>
73 #include <linux/spinlock.h>
75 #ifdef CONFIG_LIRC_SERIAL_NSLU2
76 #include <asm/hardware.h>
78 /* From Intel IXP42X Developer's Manual (#252480-005): */
79 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
80 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
81 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
83 #include <media/lirc.h>
84 #include <media/lirc_dev.h>
86 #define LIRC_DRIVER_NAME "lirc_serial"
90 int signal_pin_change;
93 long (*send_pulse)(unsigned long length);
94 void (*send_space)(long length);
99 #define LIRC_HOMEBREW 0
101 #define LIRC_IRDEO_REMOTE 2
102 #define LIRC_ANIMAX 3
106 /*** module parameters ***/
112 static bool softcarrier = 1;
113 static bool share_irq;
115 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
116 static bool txsense; /* 0 = active high, 1 = active low */
118 #define dprintk(fmt, args...) \
121 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
125 /* forward declarations */
126 static long send_pulse_irdeo(unsigned long length);
127 static long send_pulse_homebrew(unsigned long length);
128 static void send_space_irdeo(long length);
129 static void send_space_homebrew(long length);
131 static struct lirc_serial hardware[] = {
133 .signal_pin = UART_MSR_DCD,
134 .signal_pin_change = UART_MSR_DDCD,
135 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
136 .off = (UART_MCR_RTS | UART_MCR_OUT2),
137 .send_pulse = send_pulse_homebrew,
138 .send_space = send_space_homebrew,
139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
140 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
141 LIRC_CAN_SET_SEND_CARRIER |
142 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
144 .features = LIRC_CAN_REC_MODE2
149 .signal_pin = UART_MSR_DSR,
150 .signal_pin_change = UART_MSR_DDSR,
152 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
153 .send_pulse = send_pulse_irdeo,
154 .send_space = send_space_irdeo,
155 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
156 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
159 [LIRC_IRDEO_REMOTE] = {
160 .signal_pin = UART_MSR_DSR,
161 .signal_pin_change = UART_MSR_DDSR,
162 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
163 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
164 .send_pulse = send_pulse_irdeo,
165 .send_space = send_space_irdeo,
166 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
167 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
171 .signal_pin = UART_MSR_DCD,
172 .signal_pin_change = UART_MSR_DDCD,
174 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
177 .features = LIRC_CAN_REC_MODE2
181 .signal_pin = UART_MSR_DSR,
182 .signal_pin_change = UART_MSR_DDSR,
183 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
184 .off = (UART_MCR_RTS | UART_MCR_OUT2),
185 .send_pulse = send_pulse_homebrew,
186 .send_space = send_space_homebrew,
187 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
188 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
189 LIRC_CAN_SET_SEND_CARRIER |
190 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
192 .features = LIRC_CAN_REC_MODE2
196 #ifdef CONFIG_LIRC_SERIAL_NSLU2
198 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
199 * We receive on CTS of the 2nd serial port (R142,LHS), we
200 * transmit with a IR diode between GPIO[1] (green status LED),
201 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
202 * See also http://www.nslu2-linux.org for this device
205 .signal_pin = UART_MSR_CTS,
206 .signal_pin_change = UART_MSR_DCTS,
207 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
208 .off = (UART_MCR_RTS | UART_MCR_OUT2),
209 .send_pulse = send_pulse_homebrew,
210 .send_space = send_space_homebrew,
211 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
212 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
213 LIRC_CAN_SET_SEND_CARRIER |
214 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
216 .features = LIRC_CAN_REC_MODE2
223 #define RS_ISR_PASS_LIMIT 256
226 * A long pulse code from a remote might take up to 300 bytes. The
227 * daemon should read the bytes as soon as they are generated, so take
228 * the number of keys you think you can push before the daemon runs
229 * and multiply by 300. The driver will warn you if you overrun this
230 * buffer. If you have a slow computer or non-busmastering IDE disks,
231 * maybe you will need to increase this.
234 /* This MUST be a power of two! It has to be larger than 1 as well. */
238 static struct timeval lasttv = {0, 0};
240 static struct lirc_buffer rbuf;
242 static unsigned int freq = 38000;
243 static unsigned int duty_cycle = 50;
245 /* Initialized in init_timing_params() */
246 static unsigned long period;
247 static unsigned long pulse_width;
248 static unsigned long space_width;
250 #if defined(__i386__)
253 * Linux I/O port programming mini-HOWTO
254 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
255 * v, 28 December 1997
258 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
259 * takes almost exactly 1 microsecond, so if you're, for example, using
260 * the parallel port directly, just do additional inb()s from that port
264 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
265 * comment above plus trimming to match actual measured frequency.
266 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
267 * is spent in the uart access. Still - for reference test machine was a
268 * 1.13GHz Athlon system - Steve
272 * changed from 400 to 450 as this works better on slower machines;
273 * faster machines will use the rdtsc code anyway
275 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
279 /* does anybody have information on other platforms ? */
281 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
283 #endif /* __i386__ */
285 * FIXME: should we be using hrtimers instead of this
286 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
289 /* fetch serial input packet (1 byte) from register offset */
290 static u8 sinp(int offset)
293 /* the register is memory-mapped */
296 return inb(io + offset);
299 /* write serial output packet (1 byte) of value to register offset */
300 static void soutp(int offset, u8 value)
303 /* the register is memory-mapped */
306 outb(value, io + offset);
311 #ifdef CONFIG_LIRC_SERIAL_NSLU2
313 * On NSLU2, we put the transmit diode between the output of the green
314 * status LED and ground
316 if (type == LIRC_NSLU2) {
317 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
322 soutp(UART_MCR, hardware[type].off);
324 soutp(UART_MCR, hardware[type].on);
327 static void off(void)
329 #ifdef CONFIG_LIRC_SERIAL_NSLU2
330 if (type == LIRC_NSLU2) {
331 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
336 soutp(UART_MCR, hardware[type].on);
338 soutp(UART_MCR, hardware[type].off);
341 #ifndef MAX_UDELAY_MS
342 #define MAX_UDELAY_US 5000
344 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
347 static void safe_udelay(unsigned long usecs)
349 while (usecs > MAX_UDELAY_US) {
350 udelay(MAX_UDELAY_US);
351 usecs -= MAX_UDELAY_US;
358 * This is an overflow/precision juggle, complicated in that we can't
359 * do long long divide in the kernel
363 * When we use the rdtsc instruction to measure clocks, we keep the
364 * pulse and space widths as clock cycles. As this is CPU speed
365 * dependent, the widths must be calculated in init_port and ioctl
369 /* So send_pulse can quickly convert microseconds to clocks */
370 static unsigned long conv_us_to_clocks;
372 static int init_timing_params(unsigned int new_duty_cycle,
373 unsigned int new_freq)
375 __u64 loops_per_sec, work;
377 duty_cycle = new_duty_cycle;
380 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
383 /* How many clocks in a microsecond?, avoiding long long divide */
384 work = loops_per_sec;
385 work *= 4295; /* 4295 = 2^32 / 1e6 */
386 conv_us_to_clocks = (work >> 32);
389 * Carrier period in clocks, approach good up to 32GHz clock,
390 * gets carrier frequency within 8Hz
392 period = loops_per_sec >> 3;
393 period /= (freq >> 3);
395 /* Derive pulse and space from the period */
396 pulse_width = period * duty_cycle / 100;
397 space_width = period - pulse_width;
398 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
399 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
400 "conv_us_to_clocks=%ld\n",
401 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
402 pulse_width, space_width, conv_us_to_clocks);
405 #else /* ! USE_RDTSC */
406 static int init_timing_params(unsigned int new_duty_cycle,
407 unsigned int new_freq)
410 * period, pulse/space width are kept with 8 binary places -
411 * IE multiplied by 256.
413 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
414 LIRC_SERIAL_TRANSMITTER_LATENCY)
416 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
417 LIRC_SERIAL_TRANSMITTER_LATENCY)
419 duty_cycle = new_duty_cycle;
421 period = 256 * 1000000L / freq;
422 pulse_width = period * duty_cycle / 100;
423 space_width = period - pulse_width;
424 dprintk("in init_timing_params, freq=%d pulse=%ld, "
425 "space=%ld\n", freq, pulse_width, space_width);
428 #endif /* USE_RDTSC */
431 /* return value: space length delta */
433 static long send_pulse_irdeo(unsigned long length)
437 unsigned char output;
438 unsigned char chunk, shifted;
440 /* how many bits have to be sent ? */
441 rawbits = length * 1152 / 10000;
446 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
447 shifted = chunk << (i * 3);
449 output &= (~shifted);
452 soutp(UART_TX, output);
453 while (!(sinp(UART_LSR) & UART_LSR_THRE))
460 soutp(UART_TX, output);
461 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
466 ret = (-rawbits) * 10000 / 1152;
468 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
474 /* Version that uses Pentium rdtsc instruction to measure clocks */
477 * This version does sub-microsecond timing using rdtsc instruction,
478 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
479 * Implicitly i586 architecture... - Steve
482 static long send_pulse_homebrew_softcarrier(unsigned long length)
485 unsigned long target, start, now;
487 /* Get going quick as we can */
490 /* Convert length from microseconds to clocks */
491 length *= conv_us_to_clocks;
492 /* And loop till time is up - flipping at right intervals */
494 target = pulse_width;
497 * FIXME: This looks like a hard busy wait, without even an occasional,
498 * polite, cpu_relax() call. There's got to be a better way?
500 * The i2c code has the result of a lot of bit-banging work, I wonder if
501 * there's something there which could be helpful here.
503 while ((now - start) < length) {
504 /* Delay till flip time */
507 } while ((now - start) < target);
513 target += space_width;
516 target += pulse_width;
521 return ((now - start) - length) / conv_us_to_clocks;
523 #else /* ! USE_RDTSC */
524 /* Version using udelay() */
527 * here we use fixed point arithmetic, with 8
528 * fractional bits. that gets us within 0.1% or so of the right average
529 * frequency, albeit with some jitter in pulse length - Steve
532 /* To match 8 fractional bits used for pulse/space length */
534 static long send_pulse_homebrew_softcarrier(unsigned long length)
537 unsigned long actual, target, d;
540 actual = 0; target = 0; flag = 0;
541 while (actual < length) {
544 target += space_width;
547 target += pulse_width;
549 d = (target - actual -
550 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
552 * Note - we've checked in ioctl that the pulse/space
553 * widths are big enough so that d is > 0
556 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
559 return (actual-length) >> 8;
561 #endif /* USE_RDTSC */
563 static long send_pulse_homebrew(unsigned long length)
569 return send_pulse_homebrew_softcarrier(length);
577 static void send_space_irdeo(long length)
585 static void send_space_homebrew(long length)
593 static void rbwrite(int l)
595 if (lirc_buffer_full(&rbuf)) {
596 /* no new signals will be accepted */
597 dprintk("Buffer overrun\n");
600 lirc_buffer_write(&rbuf, (void *)&l);
603 static void frbwrite(int l)
605 /* simple noise filter */
606 static int pulse, space;
607 static unsigned int ptr;
609 if (ptr > 0 && (l & PULSE_BIT)) {
610 pulse += l & PULSE_MASK;
613 rbwrite(pulse | PULSE_BIT);
619 if (!(l & PULSE_BIT)) {
629 if (space > PULSE_MASK)
632 if (space > PULSE_MASK)
638 rbwrite(pulse | PULSE_BIT);
646 static irqreturn_t irq_handler(int i, void *blah)
653 static int last_dcd = -1;
655 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
656 /* not our interrupt */
663 status = sinp(UART_MSR);
664 if (counter > RS_ISR_PASS_LIMIT) {
665 printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
669 if ((status & hardware[type].signal_pin_change)
671 /* get current time */
672 do_gettimeofday(&tv);
674 /* New mode, written by Trent Piepho
675 <xyzzy@u.washington.edu>. */
678 * The old format was not very portable.
679 * We now use an int to pass pulses
680 * and spaces to user space.
682 * If PULSE_BIT is set a pulse has been
683 * received, otherwise a space has been
684 * received. The driver needs to know if your
685 * receiver is active high or active low, or
686 * the space/pulse sense could be
687 * inverted. The bits denoted by PULSE_MASK are
688 * the length in microseconds. Lengths greater
689 * than or equal to 16 seconds are clamped to
690 * PULSE_MASK. All other bits are unused.
691 * This is a much simpler interface for user
692 * programs, as well as eliminating "out of
693 * phase" errors with space/pulse
697 /* calc time since last interrupt in microseconds */
698 dcd = (status & hardware[type].signal_pin) ? 1 : 0;
700 if (dcd == last_dcd) {
701 printk(KERN_WARNING LIRC_DRIVER_NAME
702 ": ignoring spike: %d %d %lx %lx %lx %lx\n",
704 tv.tv_sec, lasttv.tv_sec,
705 tv.tv_usec, lasttv.tv_usec);
709 deltv = tv.tv_sec-lasttv.tv_sec;
710 if (tv.tv_sec < lasttv.tv_sec ||
711 (tv.tv_sec == lasttv.tv_sec &&
712 tv.tv_usec < lasttv.tv_usec)) {
713 printk(KERN_WARNING LIRC_DRIVER_NAME
714 ": AIEEEE: your clock just jumped "
716 printk(KERN_WARNING LIRC_DRIVER_NAME
717 ": %d %d %lx %lx %lx %lx\n",
719 tv.tv_sec, lasttv.tv_sec,
720 tv.tv_usec, lasttv.tv_usec);
722 } else if (deltv > 15) {
723 data = PULSE_MASK; /* really long time */
726 printk(KERN_WARNING LIRC_DRIVER_NAME
728 "%d %d %lx %lx %lx %lx\n",
730 tv.tv_sec, lasttv.tv_sec,
731 tv.tv_usec, lasttv.tv_usec);
733 * detecting pulse while this
736 sense = sense ? 0 : 1;
739 data = (int) (deltv*1000000 +
742 frbwrite(dcd^sense ? data : (data|PULSE_BIT));
745 wake_up_interruptible(&rbuf.wait_poll);
747 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
752 static int hardware_init_port(void)
754 u8 scratch, scratch2, scratch3;
757 * This is a simple port existence test, borrowed from the autoconfig
758 * function in drivers/serial/8250.c
760 scratch = sinp(UART_IER);
765 scratch2 = sinp(UART_IER) & 0x0f;
766 soutp(UART_IER, 0x0f);
770 scratch3 = sinp(UART_IER) & 0x0f;
771 soutp(UART_IER, scratch);
772 if (scratch2 != 0 || scratch3 != 0x0f) {
773 /* we fail, there's nothing here */
774 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
775 "failed, cannot continue\n");
782 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
784 /* First of all, disable all interrupts */
785 soutp(UART_IER, sinp(UART_IER) &
786 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
788 /* Clear registers. */
794 #ifdef CONFIG_LIRC_SERIAL_NSLU2
795 if (type == LIRC_NSLU2) {
796 /* Setup NSLU2 UART */
799 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
800 /* Disable Receiver data Time out interrupt */
801 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
802 /* set out2 = interrupt unmask; off() doesn't set MCR
804 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
808 /* Set line for power source */
811 /* Clear registers again to be sure. */
819 case LIRC_IRDEO_REMOTE:
820 /* setup port to 7N1 @ 115200 Baud */
821 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
824 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
825 /* Set divisor to 1 => 115200 Baud */
828 /* Set DLAB 0 + 7N1 */
829 soutp(UART_LCR, UART_LCR_WLEN7);
830 /* THR interrupt already disabled at this point */
839 static int __devinit lirc_serial_probe(struct platform_device *dev)
841 int i, nlow, nhigh, result;
843 result = request_irq(irq, irq_handler,
844 (share_irq ? IRQF_SHARED : 0),
845 LIRC_DRIVER_NAME, (void *)&hardware);
847 if (result == -EBUSY)
848 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
850 else if (result == -EINVAL)
851 printk(KERN_ERR LIRC_DRIVER_NAME
852 ": Bad irq number or handler\n");
856 /* Reserve io region. */
858 * Future MMAP-Developers: Attention!
859 * For memory mapped I/O you *might* need to use ioremap() first,
860 * for the NSLU2 it's done in boot code.
863 && (request_mem_region(iommap, 8 << ioshift,
864 LIRC_DRIVER_NAME) == NULL))
866 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
867 printk(KERN_ERR LIRC_DRIVER_NAME
868 ": port %04x already in use\n", io);
869 printk(KERN_WARNING LIRC_DRIVER_NAME
870 ": use 'setserial /dev/ttySX uart none'\n");
871 printk(KERN_WARNING LIRC_DRIVER_NAME
872 ": or compile the serial port driver as module and\n");
873 printk(KERN_WARNING LIRC_DRIVER_NAME
874 ": make sure this module is loaded first\n");
879 result = hardware_init_port();
881 goto exit_release_region;
883 /* Initialize pulse/space widths */
884 init_timing_params(duty_cycle, freq);
886 /* If pin is high, then this must be an active low receiver. */
888 /* wait 1/2 sec for the power supply */
892 * probe 9 times every 0.04s, collect "votes" for
897 for (i = 0; i < 9; i++) {
898 if (sinp(UART_MSR) & hardware[type].signal_pin)
904 sense = (nlow >= nhigh ? 1 : 0);
905 printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active "
906 "%s receiver\n", sense ? "low" : "high");
908 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active "
909 "%s receiver\n", sense ? "low" : "high");
911 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
916 release_mem_region(iommap, 8 << ioshift);
918 release_region(io, 8);
920 free_irq(irq, (void *)&hardware);
925 static int __devexit lirc_serial_remove(struct platform_device *dev)
927 free_irq(irq, (void *)&hardware);
930 release_mem_region(iommap, 8 << ioshift);
932 release_region(io, 8);
937 static int set_use_inc(void *data)
941 /* initialize timestamp */
942 do_gettimeofday(&lasttv);
944 spin_lock_irqsave(&hardware[type].lock, flags);
947 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
949 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
951 spin_unlock_irqrestore(&hardware[type].lock, flags);
956 static void set_use_dec(void *data)
957 { unsigned long flags;
959 spin_lock_irqsave(&hardware[type].lock, flags);
962 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
964 /* First of all, disable all interrupts */
965 soutp(UART_IER, sinp(UART_IER) &
966 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
967 spin_unlock_irqrestore(&hardware[type].lock, flags);
970 static ssize_t lirc_write(struct file *file, const char *buf,
971 size_t n, loff_t *ppos)
978 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
981 count = n / sizeof(int);
982 if (n % sizeof(int) || count % 2 == 0)
984 wbuf = memdup_user(buf, n);
986 return PTR_ERR(wbuf);
987 spin_lock_irqsave(&hardware[type].lock, flags);
988 if (type == LIRC_IRDEO) {
992 for (i = 0; i < count; i++) {
994 hardware[type].send_space(wbuf[i] - delta);
996 delta = hardware[type].send_pulse(wbuf[i]);
999 spin_unlock_irqrestore(&hardware[type].lock, flags);
1004 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1010 case LIRC_GET_SEND_MODE:
1011 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1012 return -ENOIOCTLCMD;
1014 result = put_user(LIRC_SEND2MODE
1015 (hardware[type].features&LIRC_CAN_SEND_MASK),
1021 case LIRC_SET_SEND_MODE:
1022 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1023 return -ENOIOCTLCMD;
1025 result = get_user(value, (__u32 *) arg);
1028 /* only LIRC_MODE_PULSE supported */
1029 if (value != LIRC_MODE_PULSE)
1033 case LIRC_GET_LENGTH:
1034 return -ENOIOCTLCMD;
1037 case LIRC_SET_SEND_DUTY_CYCLE:
1038 dprintk("SET_SEND_DUTY_CYCLE\n");
1039 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1040 return -ENOIOCTLCMD;
1042 result = get_user(value, (__u32 *) arg);
1045 if (value <= 0 || value > 100)
1047 return init_timing_params(value, freq);
1050 case LIRC_SET_SEND_CARRIER:
1051 dprintk("SET_SEND_CARRIER\n");
1052 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1053 return -ENOIOCTLCMD;
1055 result = get_user(value, (__u32 *) arg);
1058 if (value > 500000 || value < 20000)
1060 return init_timing_params(duty_cycle, value);
1064 return lirc_dev_fop_ioctl(filep, cmd, arg);
1069 static const struct file_operations lirc_fops = {
1070 .owner = THIS_MODULE,
1071 .write = lirc_write,
1072 .unlocked_ioctl = lirc_ioctl,
1073 #ifdef CONFIG_COMPAT
1074 .compat_ioctl = lirc_ioctl,
1076 .read = lirc_dev_fop_read,
1077 .poll = lirc_dev_fop_poll,
1078 .open = lirc_dev_fop_open,
1079 .release = lirc_dev_fop_close,
1080 .llseek = no_llseek,
1083 static struct lirc_driver driver = {
1084 .name = LIRC_DRIVER_NAME,
1091 .set_use_inc = set_use_inc,
1092 .set_use_dec = set_use_dec,
1095 .owner = THIS_MODULE,
1098 static struct platform_device *lirc_serial_dev;
1100 static int lirc_serial_suspend(struct platform_device *dev,
1104 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1106 /* Disable all interrupts */
1107 soutp(UART_IER, sinp(UART_IER) &
1108 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1110 /* Clear registers. */
1119 /* twisty maze... need a forward-declaration here... */
1120 static void lirc_serial_exit(void);
1122 static int lirc_serial_resume(struct platform_device *dev)
1124 unsigned long flags;
1127 result = hardware_init_port();
1131 spin_lock_irqsave(&hardware[type].lock, flags);
1132 /* Enable Interrupt */
1133 do_gettimeofday(&lasttv);
1134 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1137 lirc_buffer_clear(&rbuf);
1139 spin_unlock_irqrestore(&hardware[type].lock, flags);
1144 static struct platform_driver lirc_serial_driver = {
1145 .probe = lirc_serial_probe,
1146 .remove = __devexit_p(lirc_serial_remove),
1147 .suspend = lirc_serial_suspend,
1148 .resume = lirc_serial_resume,
1150 .name = "lirc_serial",
1151 .owner = THIS_MODULE,
1155 static int __init lirc_serial_init(void)
1159 /* Init read buffer. */
1160 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1164 result = platform_driver_register(&lirc_serial_driver);
1166 printk("lirc register returned %d\n", result);
1167 goto exit_buffer_free;
1170 lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1171 if (!lirc_serial_dev) {
1173 goto exit_driver_unregister;
1176 result = platform_device_add(lirc_serial_dev);
1178 goto exit_device_put;
1183 platform_device_put(lirc_serial_dev);
1184 exit_driver_unregister:
1185 platform_driver_unregister(&lirc_serial_driver);
1187 lirc_buffer_free(&rbuf);
1191 static void lirc_serial_exit(void)
1193 platform_device_unregister(lirc_serial_dev);
1194 platform_driver_unregister(&lirc_serial_driver);
1195 lirc_buffer_free(&rbuf);
1198 static int __init lirc_serial_init_module(void)
1205 case LIRC_IRDEO_REMOTE:
1208 /* if nothing specified, use ttyS0/com1 and irq 4 */
1209 io = io ? io : 0x3f8;
1210 irq = irq ? irq : 4;
1212 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1214 io = io ? io : IRQ_IXP4XX_UART2;
1215 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1216 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1217 ioshift = ioshift ? ioshift : 2;
1227 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1230 hardware[type].features &=
1231 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1232 LIRC_CAN_SET_SEND_CARRIER);
1237 result = lirc_serial_init();
1241 driver.features = hardware[type].features;
1242 driver.dev = &lirc_serial_dev->dev;
1243 driver.minor = lirc_register_driver(&driver);
1244 if (driver.minor < 0) {
1245 printk(KERN_ERR LIRC_DRIVER_NAME
1246 ": register_chrdev failed!\n");
1248 return driver.minor;
1253 static void __exit lirc_serial_exit_module(void)
1255 lirc_unregister_driver(driver.minor);
1257 dprintk("cleaned up module\n");
1261 module_init(lirc_serial_init_module);
1262 module_exit(lirc_serial_exit_module);
1264 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1265 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1266 "Christoph Bartelmus, Andrei Tanas");
1267 MODULE_LICENSE("GPL");
1269 module_param(type, int, S_IRUGO);
1270 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1271 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1272 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1274 module_param(io, int, S_IRUGO);
1275 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1277 /* some architectures (e.g. intel xscale) have memory mapped registers */
1278 module_param(iommap, bool, S_IRUGO);
1279 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1280 " (0 = no memory mapped io)");
1283 * some architectures (e.g. intel xscale) align the 8bit serial registers
1284 * on 32bit word boundaries.
1285 * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1287 module_param(ioshift, int, S_IRUGO);
1288 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1290 module_param(irq, int, S_IRUGO);
1291 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1293 module_param(share_irq, bool, S_IRUGO);
1294 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1296 module_param(sense, bool, S_IRUGO);
1297 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1298 " (0 = active high, 1 = active low )");
1300 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1301 module_param(txsense, bool, S_IRUGO);
1302 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1303 " (0 = active high, 1 = active low )");
1306 module_param(softcarrier, bool, S_IRUGO);
1307 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1309 module_param(debug, bool, S_IRUGO | S_IWUSR);
1310 MODULE_PARM_DESC(debug, "Enable debugging messages");