drivers/staging/intel_sst/intel_sst.c

   1 /*
   2  *  intel_sst.c - Intel SST Driver for audio engine
   3  *
   4  *  Copyright (C) 2008-10       Intel Corp
   5  *  Authors:    Vinod Koul <vinod.koul@intel.com>
   6  *              Harsha Priya <priya.harsha@intel.com>
   7  *              Dharageswari R <dharageswari.r@intel.com>
   8  *              KP Jeeja <jeeja.kp@intel.com>
   9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; version 2 of the License.
  14  *
  15  *  This program is distributed in the hope that it will be useful, but
  16  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  *  General Public License for more details.
  19  *
  20  *  You should have received a copy of the GNU General Public License along
  21  *  with this program; if not, write to the Free Software Foundation, Inc.,
  22  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  23  *
  24  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  25  *
  26  *  This driver exposes the audio engine functionalities to the ALSA
  27  *       and middleware.
  28  *
  29  *  This file contains all init functions
  30  */
  31
  32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  33
  34 #include <linux/pci.h>
  35 #include <linux/fs.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/firmware.h>
  38 #include <linux/miscdevice.h>
  39 #include <linux/pm_runtime.h>
  40 #include <linux/module.h>
  41 #include <asm/mrst.h>
  42 #include "intel_sst.h"
  43 #include "intel_sst_ioctl.h"
  44 #include "intel_sst_fw_ipc.h"
  45 #include "intel_sst_common.h"
  46
  47
  48 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
  49 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
  50 MODULE_AUTHOR("Dharageswari R <dharageswari.r@intel.com>");
  51 MODULE_AUTHOR("KP Jeeja <jeeja.kp@intel.com>");
  52 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver");
  53 MODULE_LICENSE("GPL v2");
  54 MODULE_VERSION(SST_DRIVER_VERSION);
  55
  56 struct intel_sst_drv *sst_drv_ctx;
  57 static struct mutex drv_ctx_lock;
  58 struct class *sst_class;
  59
  60 /* fops Routines */
  61 static const struct file_operations intel_sst_fops = {
  62         .owner = THIS_MODULE,
  63         .open = intel_sst_open,
  64         .release = intel_sst_release,
  65         .read = intel_sst_read,
  66         .write = intel_sst_write,
  67         .unlocked_ioctl = intel_sst_ioctl,
  68         .mmap = intel_sst_mmap,
  69         .aio_read = intel_sst_aio_read,
  70         .aio_write = intel_sst_aio_write,
  71 };
  72 static const struct file_operations intel_sst_fops_cntrl = {
  73         .owner = THIS_MODULE,
  74         .open = intel_sst_open_cntrl,
  75         .release = intel_sst_release_cntrl,
  76         .unlocked_ioctl = intel_sst_ioctl,
  77 };
  78
  79 static struct miscdevice lpe_dev = {
  80         .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
  81         .name = "intel_sst",/* /dev/intel_sst */
  82         .fops = &intel_sst_fops
  83 };
  84
  85
  86 static struct miscdevice lpe_ctrl = {
  87         .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
  88         .name = "intel_sst_ctrl",/* /dev/intel_sst_ctrl */
  89         .fops = &intel_sst_fops_cntrl
  90 };
  91
  92 /**
  93 * intel_sst_interrupt - Interrupt service routine for SST
  94 *
  95 * @irq: irq number of interrupt
  96 * @context: pointer to device structre
  97 *
  98 * This function is called by OS when SST device raises
  99 * an interrupt. This will be result of write in IPC register
 100 * Source can be busy or done interrupt
 101 */
 102 static irqreturn_t intel_sst_interrupt(int irq, void *context)
 103 {
 104         union interrupt_reg isr;
 105         union ipc_header header;
 106         union interrupt_reg imr;
 107         struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
 108         unsigned int size = 0, str_id;
 109         struct stream_info *stream ;
 110
 111         /* Do not handle interrupt in suspended state */
 112         if (drv->sst_state == SST_SUSPENDED)
 113                 return IRQ_NONE;
 114         /* Interrupt arrived, check src */
 115         isr.full = sst_shim_read(drv->shim, SST_ISRX);
 116
 117         if (isr.part.busy_interrupt) {
 118                 header.full = sst_shim_read(drv->shim, SST_IPCD);
 119                 if (header.part.msg_id == IPC_SST_PERIOD_ELAPSED) {
 120                         sst_clear_interrupt();
 121                         str_id = header.part.str_id;
 122                         stream = &sst_drv_ctx->streams[str_id];
 123                         if (stream->period_elapsed)
 124                                 stream->period_elapsed(stream->pcm_substream);
 125                         return IRQ_HANDLED;
 126                 }
 127                 if (header.part.large)
 128                         size = header.part.data;
 129                 if (header.part.msg_id & REPLY_MSG) {
 130                         sst_drv_ctx->ipc_process_msg.header = header;
 131                         memcpy_fromio(sst_drv_ctx->ipc_process_msg.mailbox,
 132                                 drv->mailbox + SST_MAILBOX_RCV, size);
 133                         queue_work(sst_drv_ctx->process_msg_wq,
 134                                         &sst_drv_ctx->ipc_process_msg.wq);
 135                 } else {
 136                         sst_drv_ctx->ipc_process_reply.header = header;
 137                         memcpy_fromio(sst_drv_ctx->ipc_process_reply.mailbox,
 138                                 drv->mailbox + SST_MAILBOX_RCV, size);
 139                         queue_work(sst_drv_ctx->process_reply_wq,
 140                                         &sst_drv_ctx->ipc_process_reply.wq);
 141                 }
 142                 /* mask busy inetrrupt */
 143                 imr.full = sst_shim_read(drv->shim, SST_IMRX);
 144                 imr.part.busy_interrupt = 1;
 145                 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
 146                 return IRQ_HANDLED;
 147         } else if (isr.part.done_interrupt) {
 148                 /* Clear done bit */
 149                 header.full = sst_shim_read(drv->shim, SST_IPCX);
 150                 header.part.done = 0;
 151                 sst_shim_write(sst_drv_ctx->shim, SST_IPCX, header.full);
 152                 /* write 1 to clear status register */;
 153                 isr.part.done_interrupt = 1;
 154                 /* dummy register for shim workaround */
 155                 sst_shim_write(sst_drv_ctx->shim, SST_ISRX, isr.full);
 156                 queue_work(sst_drv_ctx->post_msg_wq,
 157                         &sst_drv_ctx->ipc_post_msg.wq);
 158                 return IRQ_HANDLED;
 159         } else
 160                 return IRQ_NONE;
 161
 162 }
 163
 164
 165 /*
 166 * intel_sst_probe - PCI probe function
 167 *
 168 * @pci: PCI device structure
 169 * @pci_id: PCI device ID structure
 170 *
 171 * This function is called by OS when a device is found
 172 * This enables the device, interrupt etc
 173 */
 174 static int __devinit intel_sst_probe(struct pci_dev *pci,
 175                         const struct pci_device_id *pci_id)
 176 {
 177         int i, ret = 0;
 178
 179         pr_debug("Probe for DID %x\n", pci->device);
 180         mutex_lock(&drv_ctx_lock);
 181         if (sst_drv_ctx) {
 182                 pr_err("Only one sst handle is supported\n");
 183                 mutex_unlock(&drv_ctx_lock);
 184                 return -EBUSY;
 185         }
 186
 187         sst_drv_ctx = kzalloc(sizeof(*sst_drv_ctx), GFP_KERNEL);
 188         if (!sst_drv_ctx) {
 189                 pr_err("malloc fail\n");
 190                 mutex_unlock(&drv_ctx_lock);
 191                 return -ENOMEM;
 192         }
 193         mutex_unlock(&drv_ctx_lock);
 194
 195         sst_drv_ctx->pci_id = pci->device;
 196
 197         mutex_init(&sst_drv_ctx->stream_lock);
 198         mutex_init(&sst_drv_ctx->sst_lock);
 199         sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
 200
 201         sst_drv_ctx->stream_cnt = 0;
 202         sst_drv_ctx->encoded_cnt = 0;
 203         sst_drv_ctx->am_cnt = 0;
 204         sst_drv_ctx->pb_streams = 0;
 205         sst_drv_ctx->cp_streams = 0;
 206         sst_drv_ctx->unique_id = 0;
 207         sst_drv_ctx->pmic_port_instance = SST_DEFAULT_PMIC_PORT;
 208
 209         INIT_LIST_HEAD(&sst_drv_ctx->ipc_dispatch_list);
 210         INIT_WORK(&sst_drv_ctx->ipc_post_msg.wq, sst_post_message);
 211         INIT_WORK(&sst_drv_ctx->ipc_process_msg.wq, sst_process_message);
 212         INIT_WORK(&sst_drv_ctx->ipc_process_reply.wq, sst_process_reply);
 213         INIT_WORK(&sst_drv_ctx->mad_ops.wq, sst_process_mad_ops);
 214         init_waitqueue_head(&sst_drv_ctx->wait_queue);
 215
 216         sst_drv_ctx->mad_wq = create_workqueue("sst_mad_wq");
 217         if (!sst_drv_ctx->mad_wq)
 218                 goto do_free_drv_ctx;
 219         sst_drv_ctx->post_msg_wq = create_workqueue("sst_post_msg_wq");
 220         if (!sst_drv_ctx->post_msg_wq)
 221                 goto free_mad_wq;
 222         sst_drv_ctx->process_msg_wq = create_workqueue("sst_process_msg_wqq");
 223         if (!sst_drv_ctx->process_msg_wq)
 224                 goto free_post_msg_wq;
 225         sst_drv_ctx->process_reply_wq = create_workqueue("sst_proces_reply_wq");
 226         if (!sst_drv_ctx->process_reply_wq)
 227                 goto free_process_msg_wq;
 228
 229         for (i = 0; i < MAX_ACTIVE_STREAM; i++) {
 230                 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
 231                 sst_drv_ctx->alloc_block[i].ops_block.condition = false;
 232         }
 233         spin_lock_init(&sst_drv_ctx->list_spin_lock);
 234
 235         sst_drv_ctx->max_streams = pci_id->driver_data;
 236         pr_debug("Got drv data max stream %d\n",
 237                                 sst_drv_ctx->max_streams);
 238         for (i = 1; i <= sst_drv_ctx->max_streams; i++) {
 239                 struct stream_info *stream = &sst_drv_ctx->streams[i];
 240                 INIT_LIST_HEAD(&stream->bufs);
 241                 mutex_init(&stream->lock);
 242                 spin_lock_init(&stream->pcm_lock);
 243         }
 244         if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
 245                 sst_drv_ctx->mmap_mem = NULL;
 246                 sst_drv_ctx->mmap_len = SST_MMAP_PAGES * PAGE_SIZE;
 247                 while (sst_drv_ctx->mmap_len > 0) {
 248                         sst_drv_ctx->mmap_mem =
 249                                 kzalloc(sst_drv_ctx->mmap_len, GFP_KERNEL);
 250                         if (sst_drv_ctx->mmap_mem) {
 251                                 pr_debug("Got memory %p size 0x%x\n",
 252                                         sst_drv_ctx->mmap_mem,
 253                                         sst_drv_ctx->mmap_len);
 254                                 break;
 255                         }
 256                         if (sst_drv_ctx->mmap_len < (SST_MMAP_STEP*PAGE_SIZE)) {
 257                                 pr_err("mem alloc fail...abort!!\n");
 258                                 ret = -ENOMEM;
 259                                 goto free_process_reply_wq;
 260                         }
 261                         sst_drv_ctx->mmap_len -= (SST_MMAP_STEP * PAGE_SIZE);
 262                         pr_debug("mem alloc failed...trying %d\n",
 263                                                 sst_drv_ctx->mmap_len);
 264                 }
 265         }
 266
 267         /* Init the device */
 268         ret = pci_enable_device(pci);
 269         if (ret) {
 270                 pr_err("device can't be enabled\n");
 271                 goto do_free_mem;
 272         }
 273         sst_drv_ctx->pci = pci_dev_get(pci);
 274         ret = pci_request_regions(pci, SST_DRV_NAME);
 275         if (ret)
 276                 goto do_disable_device;
 277         /* map registers */
 278         /* SST Shim */
 279         sst_drv_ctx->shim_phy_add = pci_resource_start(pci, 1);
 280         sst_drv_ctx->shim = pci_ioremap_bar(pci, 1);
 281         if (!sst_drv_ctx->shim)
 282                 goto do_release_regions;
 283         pr_debug("SST Shim Ptr %p\n", sst_drv_ctx->shim);
 284
 285         /* Shared SRAM */
 286         sst_drv_ctx->mailbox = pci_ioremap_bar(pci, 2);
 287         if (!sst_drv_ctx->mailbox)
 288                 goto do_unmap_shim;
 289         pr_debug("SRAM Ptr %p\n", sst_drv_ctx->mailbox);
 290
 291         /* IRAM */
 292         sst_drv_ctx->iram = pci_ioremap_bar(pci, 3);
 293         if (!sst_drv_ctx->iram)
 294                 goto do_unmap_sram;
 295         pr_debug("IRAM Ptr %p\n", sst_drv_ctx->iram);
 296
 297         /* DRAM */
 298         sst_drv_ctx->dram = pci_ioremap_bar(pci, 4);
 299         if (!sst_drv_ctx->dram)
 300                 goto do_unmap_iram;
 301         pr_debug("DRAM Ptr %p\n", sst_drv_ctx->dram);
 302
 303         mutex_lock(&sst_drv_ctx->sst_lock);
 304         sst_drv_ctx->sst_state = SST_UN_INIT;
 305         mutex_unlock(&sst_drv_ctx->sst_lock);
 306         /* Register the ISR */
 307         ret = request_irq(pci->irq, intel_sst_interrupt,
 308                 IRQF_SHARED, SST_DRV_NAME, sst_drv_ctx);
 309         if (ret)
 310                 goto do_unmap_dram;
 311         pr_debug("Registered IRQ 0x%x\n", pci->irq);
 312
 313         /*Register LPE Control as misc driver*/
 314         ret = misc_register(&lpe_ctrl);
 315         if (ret) {
 316                 pr_err("couldn't register control device\n");
 317                 goto do_free_irq;
 318         }
 319
 320         if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
 321                 ret = misc_register(&lpe_dev);
 322                 if (ret) {
 323                         pr_err("couldn't register LPE device\n");
 324                         goto do_free_misc;
 325                 }
 326         } else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID) {
 327                 u32 csr;
 328
 329                 /*allocate mem for fw context save during suspend*/
 330                 sst_drv_ctx->fw_cntx = kzalloc(FW_CONTEXT_MEM, GFP_KERNEL);
 331                 if (!sst_drv_ctx->fw_cntx) {
 332                         ret = -ENOMEM;
 333                         goto do_free_misc;
 334                 }
 335                 /*setting zero as that is valid mem to restore*/
 336                 sst_drv_ctx->fw_cntx_size = 0;
 337
 338                 /*set lpe start clock and ram size*/
 339                 csr = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
 340                 csr |= 0x30060; /*remove the clock ratio after fw fix*/
 341                 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr);
 342         }
 343         sst_drv_ctx->lpe_stalled = 0;
 344         pci_set_drvdata(pci, sst_drv_ctx);
 345         pm_runtime_allow(&pci->dev);
 346         pm_runtime_put_noidle(&pci->dev);
 347         pr_debug("...successfully done!!!\n");
 348         return ret;
 349
 350 do_free_misc:
 351         misc_deregister(&lpe_ctrl);
 352 do_free_irq:
 353         free_irq(pci->irq, sst_drv_ctx);
 354 do_unmap_dram:
 355         iounmap(sst_drv_ctx->dram);
 356 do_unmap_iram:
 357         iounmap(sst_drv_ctx->iram);
 358 do_unmap_sram:
 359         iounmap(sst_drv_ctx->mailbox);
 360 do_unmap_shim:
 361         iounmap(sst_drv_ctx->shim);
 362 do_release_regions:
 363         pci_release_regions(pci);
 364 do_disable_device:
 365         pci_disable_device(pci);
 366 do_free_mem:
 367         kfree(sst_drv_ctx->mmap_mem);
 368 free_process_reply_wq:
 369         destroy_workqueue(sst_drv_ctx->process_reply_wq);
 370 free_process_msg_wq:
 371         destroy_workqueue(sst_drv_ctx->process_msg_wq);
 372 free_post_msg_wq:
 373         destroy_workqueue(sst_drv_ctx->post_msg_wq);
 374 free_mad_wq:
 375         destroy_workqueue(sst_drv_ctx->mad_wq);
 376 do_free_drv_ctx:
 377         kfree(sst_drv_ctx);
 378         sst_drv_ctx = NULL;
 379         pr_err("Probe failed with %d\n", ret);
 380         return ret;
 381 }
 382
 383 /**
 384 * intel_sst_remove - PCI remove function
 385 *
 386 * @pci: PCI device structure
 387 *
 388 * This function is called by OS when a device is unloaded
 389 * This frees the interrupt etc
 390 */
 391 static void __devexit intel_sst_remove(struct pci_dev *pci)
 392 {
 393         pm_runtime_get_noresume(&pci->dev);
 394         pm_runtime_forbid(&pci->dev);
 395         pci_dev_put(sst_drv_ctx->pci);
 396         mutex_lock(&sst_drv_ctx->sst_lock);
 397         sst_drv_ctx->sst_state = SST_UN_INIT;
 398         mutex_unlock(&sst_drv_ctx->sst_lock);
 399         misc_deregister(&lpe_ctrl);
 400         free_irq(pci->irq, sst_drv_ctx);
 401         iounmap(sst_drv_ctx->dram);
 402         iounmap(sst_drv_ctx->iram);
 403         iounmap(sst_drv_ctx->mailbox);
 404         iounmap(sst_drv_ctx->shim);
 405         sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
 406         if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
 407                 misc_deregister(&lpe_dev);
 408                 kfree(sst_drv_ctx->mmap_mem);
 409         } else
 410                 kfree(sst_drv_ctx->fw_cntx);
 411         flush_scheduled_work();
 412         destroy_workqueue(sst_drv_ctx->process_reply_wq);
 413         destroy_workqueue(sst_drv_ctx->process_msg_wq);
 414         destroy_workqueue(sst_drv_ctx->post_msg_wq);
 415         destroy_workqueue(sst_drv_ctx->mad_wq);
 416         kfree(pci_get_drvdata(pci));
 417         sst_drv_ctx = NULL;
 418         pci_release_regions(pci);
 419         pci_disable_device(pci);
 420         pci_set_drvdata(pci, NULL);
 421 }
 422
 423 void sst_save_dsp_context(void)
 424 {
 425         struct snd_sst_ctxt_params fw_context;
 426         unsigned int pvt_id, i;
 427         struct ipc_post *msg = NULL;
 428
 429         /*check cpu type*/
 430         if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
 431                 return;
 432                 /*not supported for rest*/
 433         if (sst_drv_ctx->sst_state != SST_FW_RUNNING) {
 434                 pr_debug("fw not running no context save ...\n");
 435                 return;
 436         }
 437
 438         /*send msg to fw*/
 439         if (sst_create_large_msg(&msg))
 440                 return;
 441         pvt_id = sst_assign_pvt_id(sst_drv_ctx);
 442         i = sst_get_block_stream(sst_drv_ctx);
 443         sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
 444         sst_fill_header(&msg->header, IPC_IA_GET_FW_CTXT, 1, pvt_id);
 445         msg->header.part.data = sizeof(fw_context) + sizeof(u32);
 446         fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
 447         fw_context.size = FW_CONTEXT_MEM;
 448         memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
 449         memcpy(msg->mailbox_data + sizeof(u32),
 450                                 &fw_context, sizeof(fw_context));
 451         spin_lock(&sst_drv_ctx->list_spin_lock);
 452         list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
 453         spin_unlock(&sst_drv_ctx->list_spin_lock);
 454         sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
 455         /*wait for reply*/
 456         if (sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]))
 457                 pr_debug("err fw context save timeout  ...\n");
 458         sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
 459         pr_debug("fw context saved  ...\n");
 460         return;
 461 }
 462
 463 /* Power Management */
 464 /*
 465 * intel_sst_suspend - PCI suspend function
 466 *
 467 * @pci: PCI device structure
 468 * @state: PM message
 469 *
 470 * This function is called by OS when a power event occurs
 471 */
 472 int intel_sst_suspend(struct pci_dev *pci, pm_message_t state)
 473 {
 474         union config_status_reg csr;
 475
 476         pr_debug("intel_sst_suspend called\n");
 477
 478         if (sst_drv_ctx->stream_cnt) {
 479                 pr_err("active streams,not able to suspend\n");
 480                 return -EBUSY;
 481         }
 482         /*save fw context*/
 483         sst_save_dsp_context();
 484         /*Assert RESET on LPE Processor*/
 485         csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
 486         csr.full = csr.full | 0x2;
 487         /* Move the SST state to Suspended */
 488         mutex_lock(&sst_drv_ctx->sst_lock);
 489         sst_drv_ctx->sst_state = SST_SUSPENDED;
 490         sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
 491         mutex_unlock(&sst_drv_ctx->sst_lock);
 492         pci_set_drvdata(pci, sst_drv_ctx);
 493         pci_save_state(pci);
 494         pci_disable_device(pci);
 495         pci_set_power_state(pci, PCI_D3hot);
 496         return 0;
 497 }
 498
 499 /**
 500 * intel_sst_resume - PCI resume function
 501 *
 502 * @pci: PCI device structure
 503 *
 504 * This function is called by OS when a power event occurs
 505 */
 506 int intel_sst_resume(struct pci_dev *pci)
 507 {
 508         int ret = 0;
 509
 510         pr_debug("intel_sst_resume called\n");
 511         if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
 512                 pr_err("SST is not in suspended state\n");
 513                 return 0;
 514         }
 515         sst_drv_ctx = pci_get_drvdata(pci);
 516         pci_set_power_state(pci, PCI_D0);
 517         pci_restore_state(pci);
 518         ret = pci_enable_device(pci);
 519         if (ret)
 520                 pr_err("device can't be enabled\n");
 521
 522         mutex_lock(&sst_drv_ctx->sst_lock);
 523         sst_drv_ctx->sst_state = SST_UN_INIT;
 524         mutex_unlock(&sst_drv_ctx->sst_lock);
 525         return 0;
 526 }
 527
 528 /* The runtime_suspend/resume is pretty much similar to the legacy
 529  * suspend/resume with the noted exception below:
 530  * The PCI core takes care of taking the system through D3hot and
 531  * restoring it back to D0 and so there is no need to duplicate
 532  * that here.
 533  */
 534 static int intel_sst_runtime_suspend(struct device *dev)
 535 {
 536         union config_status_reg csr;
 537
 538         pr_debug("intel_sst_runtime_suspend called\n");
 539         if (sst_drv_ctx->stream_cnt) {
 540                 pr_err("active streams,not able to suspend\n");
 541                 return -EBUSY;
 542         }
 543         /*save fw context*/
 544         sst_save_dsp_context();
 545         /*Assert RESET on LPE Processor*/
 546         csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
 547         csr.full = csr.full | 0x2;
 548         /* Move the SST state to Suspended */
 549         mutex_lock(&sst_drv_ctx->sst_lock);
 550         sst_drv_ctx->sst_state = SST_SUSPENDED;
 551
 552         /* Only needed by Medfield */
 553         if (sst_drv_ctx->pci_id != SST_MRST_PCI_ID)
 554                 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
 555         mutex_unlock(&sst_drv_ctx->sst_lock);
 556         return 0;
 557 }
 558
 559 static int intel_sst_runtime_resume(struct device *dev)
 560 {
 561
 562         pr_debug("intel_sst_runtime_resume called\n");
 563         if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
 564                 pr_err("SST is not in suspended state\n");
 565                 return 0;
 566         }
 567
 568         mutex_lock(&sst_drv_ctx->sst_lock);
 569         sst_drv_ctx->sst_state = SST_UN_INIT;
 570         mutex_unlock(&sst_drv_ctx->sst_lock);
 571         return 0;
 572 }
 573
 574 static int intel_sst_runtime_idle(struct device *dev)
 575 {
 576         pr_debug("runtime_idle called\n");
 577         if (sst_drv_ctx->stream_cnt == 0 && sst_drv_ctx->am_cnt == 0)
 578                 pm_schedule_suspend(dev, SST_SUSPEND_DELAY);
 579         return -EBUSY;
 580 }
 581
 582 static const struct dev_pm_ops intel_sst_pm = {
 583         .runtime_suspend = intel_sst_runtime_suspend,
 584         .runtime_resume = intel_sst_runtime_resume,
 585         .runtime_idle = intel_sst_runtime_idle,
 586 };
 587
 588 /* PCI Routines */
 589 static struct pci_device_id intel_sst_ids[] = {
 590         { PCI_VDEVICE(INTEL, SST_MRST_PCI_ID), 3},
 591         { PCI_VDEVICE(INTEL, SST_MFLD_PCI_ID), 6},
 592         { 0, }
 593 };
 594 MODULE_DEVICE_TABLE(pci, intel_sst_ids);
 595
 596 static struct pci_driver driver = {
 597         .name = SST_DRV_NAME,
 598         .id_table = intel_sst_ids,
 599         .probe = intel_sst_probe,
 600         .remove = __devexit_p(intel_sst_remove),
 601 #ifdef CONFIG_PM
 602         .suspend = intel_sst_suspend,
 603         .resume = intel_sst_resume,
 604         .driver = {
 605                 .pm = &intel_sst_pm,
 606         },
 607 #endif
 608 };
 609
 610 /**
 611 * intel_sst_init - Module init function
 612 *
 613 * Registers with PCI
 614 * Registers with /dev
 615 * Init all data strutures
 616 */
 617 static int __init intel_sst_init(void)
 618 {
 619         /* Init all variables, data structure etc....*/
 620         int ret = 0;
 621         pr_debug("INFO: ******** SST DRIVER loading.. Ver: %s\n",
 622                                        SST_DRIVER_VERSION);
 623
 624         mutex_init(&drv_ctx_lock);
 625         /* Register with PCI */
 626         ret = pci_register_driver(&driver);
 627         if (ret)
 628                 pr_err("PCI register failed\n");
 629         return ret;
 630 }
 631
 632 /**
 633 * intel_sst_exit - Module exit function
 634 *
 635 * Unregisters with PCI
 636 * Unregisters with /dev
 637 * Frees all data strutures
 638 */
 639 static void __exit intel_sst_exit(void)
 640 {
 641         pci_unregister_driver(&driver);
 642
 643         pr_debug("driver unloaded\n");
 644         sst_drv_ctx = NULL;
 645         return;
 646 }
 647
 648 module_init(intel_sst_init);
 649 module_exit(intel_sst_exit);