2 * Driver for ADI Direct Digital Synthesis ad9832
4 * Copyright (c) 2010 Analog Devices Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
21 #define DRV_NAME "ad9832"
23 #define value_mask (u16)0xf000
26 #define AD9832_SYNC (1 << 13)
27 #define AD9832_SELSRC (1 << 12)
28 #define AD9832_SLEEP (1 << 13)
29 #define AD9832_RESET (1 << 12)
30 #define AD9832_CLR (1 << 11)
32 #define ADD_FREQ0LL 0x0
33 #define ADD_FREQ0HL 0x1
34 #define ADD_FREQ0LM 0x2
35 #define ADD_FREQ0HM 0x3
36 #define ADD_FREQ1LL 0x4
37 #define ADD_FREQ1HL 0x5
38 #define ADD_FREQ1LM 0x6
39 #define ADD_FREQ1HM 0x7
40 #define ADD_PHASE0L 0x8
41 #define ADD_PHASE0H 0x9
42 #define ADD_PHASE1L 0xa
43 #define ADD_PHASE1H 0xb
44 #define ADD_PHASE2L 0xc
45 #define ADD_PHASE2H 0xd
46 #define ADD_PHASE3L 0xe
47 #define ADD_PHASE3H 0xf
49 #define CMD_PHA8BITSW 0x1
50 #define CMD_PHA16BITSW 0x0
51 #define CMD_FRE8BITSW 0x3
52 #define CMD_FRE16BITSW 0x2
53 #define CMD_SELBITSCTL 0x6
55 struct ad9832_setting {
67 struct spi_device *sdev;
70 static ssize_t ad9832_set_parameter(struct device *dev,
71 struct device_attribute *attr,
75 struct spi_message msg;
76 struct spi_transfer xfer;
78 struct ad9832_setting config;
79 struct iio_dev *idev = dev_get_drvdata(dev);
80 struct ad9832_state *st = idev->dev_data;
82 config.freq0[0] = (CMD_FRE8BITSW << add_shift | ADD_FREQ0LL << add_shift | buf[0]);
83 config.freq0[1] = (CMD_FRE16BITSW << add_shift | ADD_FREQ0HL << add_shift | buf[1]);
84 config.freq0[2] = (CMD_FRE8BITSW << add_shift | ADD_FREQ0LM << add_shift | buf[2]);
85 config.freq0[3] = (CMD_FRE16BITSW << add_shift | ADD_FREQ0HM << add_shift | buf[3]);
86 config.freq1[0] = (CMD_FRE8BITSW << add_shift | ADD_FREQ1LL << add_shift | buf[4]);
87 config.freq1[1] = (CMD_FRE16BITSW << add_shift | ADD_FREQ1HL << add_shift | buf[5]);
88 config.freq1[2] = (CMD_FRE8BITSW << add_shift | ADD_FREQ1LM << add_shift | buf[6]);
89 config.freq1[3] = (CMD_FRE16BITSW << add_shift | ADD_FREQ1HM << add_shift | buf[7]);
91 config.phase0[0] = (CMD_PHA8BITSW << add_shift | ADD_PHASE0L << add_shift | buf[9]);
92 config.phase0[1] = (CMD_PHA16BITSW << add_shift | ADD_PHASE0H << add_shift | buf[10]);
93 config.phase1[0] = (CMD_PHA8BITSW << add_shift | ADD_PHASE1L << add_shift | buf[11]);
94 config.phase1[1] = (CMD_PHA16BITSW << add_shift | ADD_PHASE1H << add_shift | buf[12]);
95 config.phase2[0] = (CMD_PHA8BITSW << add_shift | ADD_PHASE2L << add_shift | buf[13]);
96 config.phase2[1] = (CMD_PHA16BITSW << add_shift | ADD_PHASE2H << add_shift | buf[14]);
97 config.phase3[0] = (CMD_PHA8BITSW << add_shift | ADD_PHASE3L << add_shift | buf[15]);
98 config.phase3[1] = (CMD_PHA16BITSW << add_shift | ADD_PHASE3H << add_shift | buf[16]);
101 xfer.tx_buf = &config;
102 mutex_lock(&st->lock);
104 spi_message_init(&msg);
105 spi_message_add_tail(&xfer, &msg);
106 ret = spi_sync(st->sdev, &msg);
110 mutex_unlock(&st->lock);
112 return ret ? ret : len;
115 static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad9832_set_parameter, 0);
117 static struct attribute *ad9832_attributes[] = {
118 &iio_dev_attr_dds.dev_attr.attr,
122 static const struct attribute_group ad9832_attribute_group = {
124 .attrs = ad9832_attributes,
127 static void ad9832_init(struct ad9832_state *st)
129 struct spi_message msg;
130 struct spi_transfer xfer;
134 config = 0x3 << 14 | AD9832_SLEEP | AD9832_RESET | AD9832_CLR;
136 mutex_lock(&st->lock);
139 xfer.tx_buf = &config;
141 spi_message_init(&msg);
142 spi_message_add_tail(&xfer, &msg);
143 ret = spi_sync(st->sdev, &msg);
147 config = 0x2 << 14 | AD9832_SYNC | AD9832_SELSRC;
149 xfer.tx_buf = &config;
151 spi_message_init(&msg);
152 spi_message_add_tail(&xfer, &msg);
153 ret = spi_sync(st->sdev, &msg);
157 config = CMD_SELBITSCTL << cmd_shift;
159 xfer.tx_buf = &config;
161 spi_message_init(&msg);
162 spi_message_add_tail(&xfer, &msg);
163 ret = spi_sync(st->sdev, &msg);
170 xfer.tx_buf = &config;
172 spi_message_init(&msg);
173 spi_message_add_tail(&xfer, &msg);
174 ret = spi_sync(st->sdev, &msg);
178 mutex_unlock(&st->lock);
184 static int __devinit ad9832_probe(struct spi_device *spi)
186 struct ad9832_state *st;
189 st = kzalloc(sizeof(*st), GFP_KERNEL);
194 spi_set_drvdata(spi, st);
196 mutex_init(&st->lock);
199 st->idev = iio_allocate_device();
200 if (st->idev == NULL) {
204 st->idev->dev.parent = &spi->dev;
205 st->idev->num_interrupt_lines = 0;
206 st->idev->event_attrs = NULL;
208 st->idev->attrs = &ad9832_attribute_group;
209 st->idev->dev_data = (void *)(st);
210 st->idev->driver_module = THIS_MODULE;
211 st->idev->modes = INDIO_DIRECT_MODE;
213 ret = iio_device_register(st->idev);
216 spi->max_speed_hz = 2000000;
217 spi->mode = SPI_MODE_3;
218 spi->bits_per_word = 16;
224 iio_free_device(st->idev);
231 static int __devexit ad9832_remove(struct spi_device *spi)
233 struct ad9832_state *st = spi_get_drvdata(spi);
235 iio_device_unregister(st->idev);
241 static struct spi_driver ad9832_driver = {
244 .owner = THIS_MODULE,
246 .probe = ad9832_probe,
247 .remove = __devexit_p(ad9832_remove),
250 static __init int ad9832_spi_init(void)
252 return spi_register_driver(&ad9832_driver);
254 module_init(ad9832_spi_init);
256 static __exit void ad9832_spi_exit(void)
258 spi_unregister_driver(&ad9832_driver);
260 module_exit(ad9832_spi_exit);
262 MODULE_AUTHOR("Cliff Cai");
263 MODULE_DESCRIPTION("Analog Devices ad9832 driver");
264 MODULE_LICENSE("GPL v2");