drivers/staging/gma500/psb_intel_sdvo.c

   1 /*
   2  * Copyright (c) 2006-2007 Intel Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, write to the Free Software Foundation, Inc.,
  15  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16  *
  17  * Authors:
  18  *      Eric Anholt <eric@anholt.net>
  19  */
  20
  21 #include <linux/i2c.h>
  22 #include <linux/delay.h>
  23 /* #include <drm/drm_crtc.h> */
  24 #include <drm/drmP.h>
  25 #include "psb_drv.h"
  26 #include "psb_intel_drv.h"
  27 #include "psb_intel_reg.h"
  28 #include "psb_intel_sdvo_regs.h"
  29
  30 struct psb_intel_sdvo_priv {
  31         struct psb_intel_i2c_chan *i2c_bus;
  32         int slaveaddr;
  33         int output_device;
  34
  35         u16 active_outputs;
  36
  37         struct psb_intel_sdvo_caps caps;
  38         int pixel_clock_min, pixel_clock_max;
  39
  40         int save_sdvo_mult;
  41         u16 save_active_outputs;
  42         struct psb_intel_sdvo_dtd save_input_dtd_1, save_input_dtd_2;
  43         struct psb_intel_sdvo_dtd save_output_dtd[16];
  44         u32 save_SDVOX;
  45         u8 in_out_map[4];
  46
  47         u8 by_input_wiring;
  48         u32 active_device;
  49 };
  50
  51 /**
  52  * Writes the SDVOB or SDVOC with the given value, but always writes both
  53  * SDVOB and SDVOC to work around apparent hardware issues (according to
  54  * comments in the BIOS).
  55  */
  56 void psb_intel_sdvo_write_sdvox(struct psb_intel_output *psb_intel_output,
  57                                 u32 val)
  58 {
  59         struct drm_device *dev = psb_intel_output->base.dev;
  60         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
  61         u32 bval = val, cval = val;
  62         int i;
  63
  64         if (sdvo_priv->output_device == SDVOB)
  65                 cval = REG_READ(SDVOC);
  66         else
  67                 bval = REG_READ(SDVOB);
  68         /*
  69          * Write the registers twice for luck. Sometimes,
  70          * writing them only once doesn't appear to 'stick'.
  71          * The BIOS does this too. Yay, magic
  72          */
  73         for (i = 0; i < 2; i++) {
  74                 REG_WRITE(SDVOB, bval);
  75                 REG_READ(SDVOB);
  76                 REG_WRITE(SDVOC, cval);
  77                 REG_READ(SDVOC);
  78         }
  79 }
  80
  81 static bool psb_intel_sdvo_read_byte(
  82                                 struct psb_intel_output *psb_intel_output,
  83                                 u8 addr, u8 *ch)
  84 {
  85         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
  86         u8 out_buf[2];
  87         u8 buf[2];
  88         int ret;
  89
  90         struct i2c_msg msgs[] = {
  91                 {
  92                  .addr = sdvo_priv->i2c_bus->slave_addr,
  93                  .flags = 0,
  94                  .len = 1,
  95                  .buf = out_buf,
  96                  },
  97                 {
  98                  .addr = sdvo_priv->i2c_bus->slave_addr,
  99                  .flags = I2C_M_RD,
 100                  .len = 1,
 101                  .buf = buf,
 102                  }
 103         };
 104
 105         out_buf[0] = addr;
 106         out_buf[1] = 0;
 107
 108         ret = i2c_transfer(&sdvo_priv->i2c_bus->adapter, msgs, 2);
 109         if (ret == 2) {
 110                 /* DRM_DEBUG("got back from addr %02X = %02x\n",
 111                  * out_buf[0], buf[0]);
 112                  */
 113                 *ch = buf[0];
 114                 return true;
 115         }
 116
 117         DRM_DEBUG("i2c transfer returned %d\n", ret);
 118         return false;
 119 }
 120
 121 static bool psb_intel_sdvo_write_byte(
 122                         struct psb_intel_output *psb_intel_output,
 123                         int addr, u8 ch)
 124 {
 125         u8 out_buf[2];
 126         struct i2c_msg msgs[] = {
 127                 {
 128                  .addr = psb_intel_output->i2c_bus->slave_addr,
 129                  .flags = 0,
 130                  .len = 2,
 131                  .buf = out_buf,
 132                  }
 133         };
 134
 135         out_buf[0] = addr;
 136         out_buf[1] = ch;
 137
 138         if (i2c_transfer(&psb_intel_output->i2c_bus->adapter, msgs, 1) == 1)
 139                 return true;
 140         return false;
 141 }
 142
 143 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 144 /** Mapping of command numbers to names, for debug output */
 145 static const struct _sdvo_cmd_name {
 146         u8 cmd;
 147         char *name;
 148 } sdvo_cmd_names[] = {
 149 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 150             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 151             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 152             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 153             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 154             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 155             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 156             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 157             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 158             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 159             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 160             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 161             SDVO_CMD_NAME_ENTRY
 162             (SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 163             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 164             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 165             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 166             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 167             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 168             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 169             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 170             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 171             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 172             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 173             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 174             SDVO_CMD_NAME_ENTRY
 175             (SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 176             SDVO_CMD_NAME_ENTRY
 177             (SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 178             SDVO_CMD_NAME_ENTRY
 179             (SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 180             SDVO_CMD_NAME_ENTRY
 181             (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 182             SDVO_CMD_NAME_ENTRY
 183             (SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 184             SDVO_CMD_NAME_ENTRY
 185             (SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 186             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 187             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 188             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 189             SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 190             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 191             SDVO_CMD_NAME_ENTRY
 192             (SDVO_CMD_SET_TV_RESOLUTION_SUPPORT),
 193             SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),};
 194
 195 #define SDVO_NAME(dev_priv) \
 196                  ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC")
 197 #define SDVO_PRIV(output)   ((struct psb_intel_sdvo_priv *) (output)->dev_priv)
 198
 199 static void psb_intel_sdvo_write_cmd(struct psb_intel_output *psb_intel_output,
 200                                      u8 cmd,
 201                                      void *args,
 202                                      int args_len)
 203 {
 204         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 205         int i;
 206
 207         if (1) {
 208                 DRM_DEBUG("%s: W: %02X ", SDVO_NAME(sdvo_priv), cmd);
 209                 for (i = 0; i < args_len; i++)
 210                         printk(KERN_INFO"%02X ", ((u8 *) args)[i]);
 211                 for (; i < 8; i++)
 212                         printk("   ");
 213                 for (i = 0;
 214                      i <
 215                      sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]);
 216                      i++) {
 217                         if (cmd == sdvo_cmd_names[i].cmd) {
 218                                 printk("(%s)", sdvo_cmd_names[i].name);
 219                                 break;
 220                         }
 221                 }
 222                 if (i ==
 223                     sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]))
 224                         printk("(%02X)", cmd);
 225                 printk("\n");
 226         }
 227
 228         for (i = 0; i < args_len; i++) {
 229                 psb_intel_sdvo_write_byte(psb_intel_output,
 230                                         SDVO_I2C_ARG_0 - i,
 231                                         ((u8 *) args)[i]);
 232         }
 233
 234         psb_intel_sdvo_write_byte(psb_intel_output, SDVO_I2C_OPCODE, cmd);
 235 }
 236
 237 static const char *const cmd_status_names[] = {
 238         "Power on",
 239         "Success",
 240         "Not supported",
 241         "Invalid arg",
 242         "Pending",
 243         "Target not specified",
 244         "Scaling not supported"
 245 };
 246
 247 static u8 psb_intel_sdvo_read_response(
 248                                 struct psb_intel_output *psb_intel_output,
 249                                 void *response, int response_len)
 250 {
 251         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 252         int i;
 253         u8 status;
 254         u8 retry = 50;
 255
 256         while (retry--) {
 257                 /* Read the command response */
 258                 for (i = 0; i < response_len; i++) {
 259                         psb_intel_sdvo_read_byte(psb_intel_output,
 260                                              SDVO_I2C_RETURN_0 + i,
 261                                              &((u8 *) response)[i]);
 262                 }
 263
 264                 /* read the return status */
 265                 psb_intel_sdvo_read_byte(psb_intel_output,
 266                                          SDVO_I2C_CMD_STATUS,
 267                                          &status);
 268
 269                 if (1) {
 270                         DRM_DEBUG("%s: R: ", SDVO_NAME(sdvo_priv));
 271                         for (i = 0; i < response_len; i++)
 272                                 printk(KERN_INFO"%02X ", ((u8 *) response)[i]);
 273                         for (; i < 8; i++)
 274                                 printk("   ");
 275                         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 276                                 printk(KERN_INFO"(%s)",
 277                                          cmd_status_names[status]);
 278                         else
 279                                 printk(KERN_INFO"(??? %d)", status);
 280                         printk("\n");
 281                 }
 282
 283                 if (status != SDVO_CMD_STATUS_PENDING)
 284                         return status;
 285
 286                 mdelay(50);
 287         }
 288
 289         return status;
 290 }
 291
 292 int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 293 {
 294         if (mode->clock >= 100000)
 295                 return 1;
 296         else if (mode->clock >= 50000)
 297                 return 2;
 298         else
 299                 return 4;
 300 }
 301
 302 /**
 303  * Don't check status code from this as it switches the bus back to the
 304  * SDVO chips which defeats the purpose of doing a bus switch in the first
 305  * place.
 306  */
 307 void psb_intel_sdvo_set_control_bus_switch(
 308                                 struct psb_intel_output *psb_intel_output,
 309                                 u8 target)
 310 {
 311         psb_intel_sdvo_write_cmd(psb_intel_output,
 312                                  SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 313                                  &target,
 314                                  1);
 315 }
 316
 317 static bool psb_intel_sdvo_set_target_input(
 318                                 struct psb_intel_output *psb_intel_output,
 319                                 bool target_0, bool target_1)
 320 {
 321         struct psb_intel_sdvo_set_target_input_args targets = { 0 };
 322         u8 status;
 323
 324         if (target_0 && target_1)
 325                 return SDVO_CMD_STATUS_NOTSUPP;
 326
 327         if (target_1)
 328                 targets.target_1 = 1;
 329
 330         psb_intel_sdvo_write_cmd(psb_intel_output, SDVO_CMD_SET_TARGET_INPUT,
 331                              &targets, sizeof(targets));
 332
 333         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 334
 335         return status == SDVO_CMD_STATUS_SUCCESS;
 336 }
 337
 338 /**
 339  * Return whether each input is trained.
 340  *
 341  * This function is making an assumption about the layout of the response,
 342  * which should be checked against the docs.
 343  */
 344 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_output
 345                                           *psb_intel_output, bool *input_1,
 346                                           bool *input_2)
 347 {
 348         struct psb_intel_sdvo_get_trained_inputs_response response;
 349         u8 status;
 350
 351         psb_intel_sdvo_write_cmd(psb_intel_output, SDVO_CMD_GET_TRAINED_INPUTS,
 352                              NULL, 0);
 353         status =
 354             psb_intel_sdvo_read_response(psb_intel_output, &response,
 355                                      sizeof(response));
 356         if (status != SDVO_CMD_STATUS_SUCCESS)
 357                 return false;
 358
 359         *input_1 = response.input0_trained;
 360         *input_2 = response.input1_trained;
 361         return true;
 362 }
 363
 364 static bool psb_intel_sdvo_get_active_outputs(struct psb_intel_output
 365                                           *psb_intel_output, u16 *outputs)
 366 {
 367         u8 status;
 368
 369         psb_intel_sdvo_write_cmd(psb_intel_output, SDVO_CMD_GET_ACTIVE_OUTPUTS,
 370                              NULL, 0);
 371         status =
 372             psb_intel_sdvo_read_response(psb_intel_output, outputs,
 373                                      sizeof(*outputs));
 374
 375         return status == SDVO_CMD_STATUS_SUCCESS;
 376 }
 377
 378 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_output
 379                                           *psb_intel_output, u16 outputs)
 380 {
 381         u8 status;
 382
 383         psb_intel_sdvo_write_cmd(psb_intel_output, SDVO_CMD_SET_ACTIVE_OUTPUTS,
 384                              &outputs, sizeof(outputs));
 385         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 386         return status == SDVO_CMD_STATUS_SUCCESS;
 387 }
 388
 389 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_output
 390                                                *psb_intel_output, int mode)
 391 {
 392         u8 status, state = SDVO_ENCODER_STATE_ON;
 393
 394         switch (mode) {
 395         case DRM_MODE_DPMS_ON:
 396                 state = SDVO_ENCODER_STATE_ON;
 397                 break;
 398         case DRM_MODE_DPMS_STANDBY:
 399                 state = SDVO_ENCODER_STATE_STANDBY;
 400                 break;
 401         case DRM_MODE_DPMS_SUSPEND:
 402                 state = SDVO_ENCODER_STATE_SUSPEND;
 403                 break;
 404         case DRM_MODE_DPMS_OFF:
 405                 state = SDVO_ENCODER_STATE_OFF;
 406                 break;
 407         }
 408
 409         psb_intel_sdvo_write_cmd(psb_intel_output,
 410                              SDVO_CMD_SET_ENCODER_POWER_STATE, &state,
 411                              sizeof(state));
 412         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 413
 414         return status == SDVO_CMD_STATUS_SUCCESS;
 415 }
 416
 417 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_output
 418                                                    *psb_intel_output,
 419                                                    int *clock_min,
 420                                                    int *clock_max)
 421 {
 422         struct psb_intel_sdvo_pixel_clock_range clocks;
 423         u8 status;
 424
 425         psb_intel_sdvo_write_cmd(psb_intel_output,
 426                              SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, NULL,
 427                              0);
 428
 429         status =
 430             psb_intel_sdvo_read_response(psb_intel_output, &clocks,
 431                                      sizeof(clocks));
 432
 433         if (status != SDVO_CMD_STATUS_SUCCESS)
 434                 return false;
 435
 436         /* Convert the values from units of 10 kHz to kHz. */
 437         *clock_min = clocks.min * 10;
 438         *clock_max = clocks.max * 10;
 439
 440         return true;
 441 }
 442
 443 static bool psb_intel_sdvo_set_target_output(
 444                                 struct psb_intel_output *psb_intel_output,
 445                                 u16 outputs)
 446 {
 447         u8 status;
 448
 449         psb_intel_sdvo_write_cmd(psb_intel_output, SDVO_CMD_SET_TARGET_OUTPUT,
 450                              &outputs, sizeof(outputs));
 451
 452         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 453         return status == SDVO_CMD_STATUS_SUCCESS;
 454 }
 455
 456 static bool psb_intel_sdvo_get_timing(struct psb_intel_output *psb_intel_output,
 457                                   u8 cmd, struct psb_intel_sdvo_dtd *dtd)
 458 {
 459         u8 status;
 460
 461         psb_intel_sdvo_write_cmd(psb_intel_output, cmd, NULL, 0);
 462         status = psb_intel_sdvo_read_response(psb_intel_output, &dtd->part1,
 463                                           sizeof(dtd->part1));
 464         if (status != SDVO_CMD_STATUS_SUCCESS)
 465                 return false;
 466
 467         psb_intel_sdvo_write_cmd(psb_intel_output, cmd + 1, NULL, 0);
 468         status = psb_intel_sdvo_read_response(psb_intel_output, &dtd->part2,
 469                                           sizeof(dtd->part2));
 470         if (status != SDVO_CMD_STATUS_SUCCESS)
 471                 return false;
 472
 473         return true;
 474 }
 475
 476 static bool psb_intel_sdvo_get_input_timing(
 477                                 struct psb_intel_output *psb_intel_output,
 478                                 struct psb_intel_sdvo_dtd *dtd)
 479 {
 480         return psb_intel_sdvo_get_timing(psb_intel_output,
 481                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1,
 482                                      dtd);
 483 }
 484
 485 static bool psb_intel_sdvo_set_timing(
 486                                 struct psb_intel_output *psb_intel_output,
 487                                 u8 cmd,
 488                                 struct psb_intel_sdvo_dtd *dtd)
 489 {
 490         u8 status;
 491
 492         psb_intel_sdvo_write_cmd(psb_intel_output, cmd, &dtd->part1,
 493                              sizeof(dtd->part1));
 494         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 495         if (status != SDVO_CMD_STATUS_SUCCESS)
 496                 return false;
 497
 498         psb_intel_sdvo_write_cmd(psb_intel_output, cmd + 1, &dtd->part2,
 499                              sizeof(dtd->part2));
 500         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 501         if (status != SDVO_CMD_STATUS_SUCCESS)
 502                 return false;
 503
 504         return true;
 505 }
 506
 507 static bool psb_intel_sdvo_set_input_timing(
 508                                 struct psb_intel_output *psb_intel_output,
 509                                 struct psb_intel_sdvo_dtd *dtd)
 510 {
 511         return psb_intel_sdvo_set_timing(psb_intel_output,
 512                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1,
 513                                      dtd);
 514 }
 515
 516 static bool psb_intel_sdvo_set_output_timing(
 517                                 struct psb_intel_output *psb_intel_output,
 518                                 struct psb_intel_sdvo_dtd *dtd)
 519 {
 520         return psb_intel_sdvo_set_timing(psb_intel_output,
 521                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1,
 522                                      dtd);
 523 }
 524
 525 static int psb_intel_sdvo_get_clock_rate_mult(struct psb_intel_output
 526                                                 *psb_intel_output)
 527 {
 528         u8 response, status;
 529
 530         psb_intel_sdvo_write_cmd(psb_intel_output,
 531                                  SDVO_CMD_GET_CLOCK_RATE_MULT,
 532                                  NULL,
 533                                  0);
 534
 535         status = psb_intel_sdvo_read_response(psb_intel_output, &response, 1);
 536
 537         if (status != SDVO_CMD_STATUS_SUCCESS) {
 538                 DRM_DEBUG("Couldn't get SDVO clock rate multiplier\n");
 539                 return SDVO_CLOCK_RATE_MULT_1X;
 540         } else {
 541                 DRM_DEBUG("Current clock rate multiplier: %d\n", response);
 542         }
 543
 544         return response;
 545 }
 546
 547 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_output
 548                                                 *psb_intel_output, u8 val)
 549 {
 550         u8 status;
 551
 552         psb_intel_sdvo_write_cmd(psb_intel_output,
 553                                 SDVO_CMD_SET_CLOCK_RATE_MULT,
 554                                 &val,
 555                                 1);
 556
 557         status = psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 558         if (status != SDVO_CMD_STATUS_SUCCESS)
 559                 return false;
 560
 561         return true;
 562 }
 563
 564 static bool psb_sdvo_set_current_inoutmap(struct psb_intel_output *output,
 565                                           u32 in0outputmask,
 566                                           u32 in1outputmask)
 567 {
 568         u8 byArgs[4];
 569         u8 status;
 570         int i;
 571         struct psb_intel_sdvo_priv *sdvo_priv = output->dev_priv;
 572
 573         /* Make all fields of the  args/ret to zero */
 574         memset(byArgs, 0, sizeof(byArgs));
 575
 576         /* Fill up the argument values; */
 577         byArgs[0] = (u8) (in0outputmask & 0xFF);
 578         byArgs[1] = (u8) ((in0outputmask >> 8) & 0xFF);
 579         byArgs[2] = (u8) (in1outputmask & 0xFF);
 580         byArgs[3] = (u8) ((in1outputmask >> 8) & 0xFF);
 581
 582
 583         /*save inoutmap arg here*/
 584         for (i = 0; i < 4; i++)
 585                 sdvo_priv->in_out_map[i] = byArgs[0];
 586
 587         psb_intel_sdvo_write_cmd(output, SDVO_CMD_SET_IN_OUT_MAP, byArgs, 4);
 588         status = psb_intel_sdvo_read_response(output, NULL, 0);
 589
 590         if (status != SDVO_CMD_STATUS_SUCCESS)
 591                 return false;
 592         return true;
 593 }
 594
 595
 596 static void psb_intel_sdvo_set_iomap(struct psb_intel_output *output)
 597 {
 598         u32 dwCurrentSDVOIn0 = 0;
 599         u32 dwCurrentSDVOIn1 = 0;
 600         u32 dwDevMask = 0;
 601
 602
 603         struct psb_intel_sdvo_priv *sdvo_priv = output->dev_priv;
 604
 605         /* Please DO NOT change the following code. */
 606         /* SDVOB_IN0 or SDVOB_IN1 ==> sdvo_in0 */
 607         /* SDVOC_IN0 or SDVOC_IN1 ==> sdvo_in1 */
 608         if (sdvo_priv->by_input_wiring & (SDVOB_IN0 | SDVOC_IN0)) {
 609                 switch (sdvo_priv->active_device) {
 610                 case SDVO_DEVICE_LVDS:
 611                         dwDevMask = SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1;
 612                         break;
 613                 case SDVO_DEVICE_TMDS:
 614                         dwDevMask = SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1;
 615                         break;
 616                 case SDVO_DEVICE_TV:
 617                         dwDevMask =
 618                         SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_SVID0 |
 619                         SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB1 |
 620                         SDVO_OUTPUT_SVID1 | SDVO_OUTPUT_CVBS1 |
 621                         SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1;
 622                         break;
 623                 case SDVO_DEVICE_CRT:
 624                         dwDevMask = SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1;
 625                         break;
 626                 }
 627                 dwCurrentSDVOIn0 = (sdvo_priv->active_outputs & dwDevMask);
 628         } else if (sdvo_priv->by_input_wiring & (SDVOB_IN1 | SDVOC_IN1)) {
 629                 switch (sdvo_priv->active_device) {
 630                 case SDVO_DEVICE_LVDS:
 631                         dwDevMask = SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1;
 632                         break;
 633                 case SDVO_DEVICE_TMDS:
 634                         dwDevMask = SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1;
 635                         break;
 636                 case SDVO_DEVICE_TV:
 637                         dwDevMask =
 638                         SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_SVID0 |
 639                         SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB1 |
 640                         SDVO_OUTPUT_SVID1 | SDVO_OUTPUT_CVBS1 |
 641                         SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1;
 642                         break;
 643                 case SDVO_DEVICE_CRT:
 644                         dwDevMask = SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1;
 645                         break;
 646                 }
 647                 dwCurrentSDVOIn1 = (sdvo_priv->active_outputs & dwDevMask);
 648         }
 649
 650         psb_sdvo_set_current_inoutmap(output, dwCurrentSDVOIn0,
 651                                           dwCurrentSDVOIn1);
 652 }
 653
 654
 655 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 656                                   struct drm_display_mode *mode,
 657                                   struct drm_display_mode *adjusted_mode)
 658 {
 659         /* Make the CRTC code factor in the SDVO pixel multiplier.  The SDVO
 660          * device will be told of the multiplier during mode_set.
 661          */
 662         adjusted_mode->clock *= psb_intel_sdvo_get_pixel_multiplier(mode);
 663         return true;
 664 }
 665
 666 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
 667                                 struct drm_display_mode *mode,
 668                                 struct drm_display_mode *adjusted_mode)
 669 {
 670         struct drm_device *dev = encoder->dev;
 671         struct drm_crtc *crtc = encoder->crtc;
 672         struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
 673         struct psb_intel_output *psb_intel_output =
 674                                         enc_to_psb_intel_output(encoder);
 675         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 676         u16 width, height;
 677         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 678         u16 h_sync_offset, v_sync_offset;
 679         u32 sdvox;
 680         struct psb_intel_sdvo_dtd output_dtd;
 681         int sdvo_pixel_multiply;
 682
 683         if (!mode)
 684                 return;
 685
 686         psb_intel_sdvo_set_target_output(psb_intel_output, 0);
 687
 688         width = mode->crtc_hdisplay;
 689         height = mode->crtc_vdisplay;
 690
 691         /* do some mode translations */
 692         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
 693         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 694
 695         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
 696         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 697
 698         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
 699         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
 700
 701         output_dtd.part1.clock = mode->clock / 10;
 702         output_dtd.part1.h_active = width & 0xff;
 703         output_dtd.part1.h_blank = h_blank_len & 0xff;
 704         output_dtd.part1.h_high = (((width >> 8) & 0xf) << 4) |
 705             ((h_blank_len >> 8) & 0xf);
 706         output_dtd.part1.v_active = height & 0xff;
 707         output_dtd.part1.v_blank = v_blank_len & 0xff;
 708         output_dtd.part1.v_high = (((height >> 8) & 0xf) << 4) |
 709             ((v_blank_len >> 8) & 0xf);
 710
 711         output_dtd.part2.h_sync_off = h_sync_offset;
 712         output_dtd.part2.h_sync_width = h_sync_len & 0xff;
 713         output_dtd.part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 714             (v_sync_len & 0xf);
 715         output_dtd.part2.sync_off_width_high =
 716             ((h_sync_offset & 0x300) >> 2) | ((h_sync_len & 0x300) >> 4) |
 717             ((v_sync_offset & 0x30) >> 2) | ((v_sync_len & 0x30) >> 4);
 718
 719         output_dtd.part2.dtd_flags = 0x18;
 720         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 721                 output_dtd.part2.dtd_flags |= 0x2;
 722         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 723                 output_dtd.part2.dtd_flags |= 0x4;
 724
 725         output_dtd.part2.sdvo_flags = 0;
 726         output_dtd.part2.v_sync_off_high = v_sync_offset & 0xc0;
 727         output_dtd.part2.reserved = 0;
 728
 729         /* Set the output timing to the screen */
 730         psb_intel_sdvo_set_target_output(psb_intel_output,
 731                                      sdvo_priv->active_outputs);
 732
 733         /* Set the input timing to the screen. Assume always input 0. */
 734         psb_intel_sdvo_set_target_input(psb_intel_output, true, false);
 735
 736         psb_intel_sdvo_set_output_timing(psb_intel_output, &output_dtd);
 737
 738         /* We would like to use i830_sdvo_create_preferred_input_timing() to
 739          * provide the device with a timing it can support, if it supports that
 740          * feature.  However, presumably we would need to adjust the CRTC to
 741          * output the preferred timing, and we don't support that currently.
 742          */
 743         psb_intel_sdvo_set_input_timing(psb_intel_output, &output_dtd);
 744
 745         switch (psb_intel_sdvo_get_pixel_multiplier(mode)) {
 746         case 1:
 747                 psb_intel_sdvo_set_clock_rate_mult(psb_intel_output,
 748                                                SDVO_CLOCK_RATE_MULT_1X);
 749                 break;
 750         case 2:
 751                 psb_intel_sdvo_set_clock_rate_mult(psb_intel_output,
 752                                                SDVO_CLOCK_RATE_MULT_2X);
 753                 break;
 754         case 4:
 755                 psb_intel_sdvo_set_clock_rate_mult(psb_intel_output,
 756                                                SDVO_CLOCK_RATE_MULT_4X);
 757                 break;
 758         }
 759
 760         /* Set the SDVO control regs. */
 761         sdvox = REG_READ(sdvo_priv->output_device);
 762         switch (sdvo_priv->output_device) {
 763         case SDVOB:
 764                 sdvox &= SDVOB_PRESERVE_MASK;
 765                 break;
 766         case SDVOC:
 767                 sdvox &= SDVOC_PRESERVE_MASK;
 768                 break;
 769         }
 770         sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
 771         if (psb_intel_crtc->pipe == 1)
 772                 sdvox |= SDVO_PIPE_B_SELECT;
 773
 774         sdvo_pixel_multiply = psb_intel_sdvo_get_pixel_multiplier(mode);
 775
 776         psb_intel_sdvo_write_sdvox(psb_intel_output, sdvox);
 777
 778          psb_intel_sdvo_set_iomap(psb_intel_output);
 779 }
 780
 781 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
 782 {
 783         struct drm_device *dev = encoder->dev;
 784         struct psb_intel_output *psb_intel_output =
 785                                         enc_to_psb_intel_output(encoder);
 786         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 787         u32 temp;
 788
 789         if (mode != DRM_MODE_DPMS_ON) {
 790                 psb_intel_sdvo_set_active_outputs(psb_intel_output, 0);
 791                 if (0)
 792                         psb_intel_sdvo_set_encoder_power_state(
 793                                                         psb_intel_output,
 794                                                         mode);
 795
 796                 if (mode == DRM_MODE_DPMS_OFF) {
 797                         temp = REG_READ(sdvo_priv->output_device);
 798                         if ((temp & SDVO_ENABLE) != 0) {
 799                                 psb_intel_sdvo_write_sdvox(psb_intel_output,
 800                                                        temp &
 801                                                        ~SDVO_ENABLE);
 802                         }
 803                 }
 804         } else {
 805                 bool input1, input2;
 806                 int i;
 807                 u8 status;
 808
 809                 temp = REG_READ(sdvo_priv->output_device);
 810                 if ((temp & SDVO_ENABLE) == 0)
 811                         psb_intel_sdvo_write_sdvox(psb_intel_output,
 812                                                temp | SDVO_ENABLE);
 813                 for (i = 0; i < 2; i++)
 814                         psb_intel_wait_for_vblank(dev);
 815
 816                 status =
 817                     psb_intel_sdvo_get_trained_inputs(psb_intel_output,
 818                                                         &input1,
 819                                                         &input2);
 820
 821
 822                 /* Warn if the device reported failure to sync.
 823                  * A lot of SDVO devices fail to notify of sync, but it's
 824                  * a given it the status is a success, we succeeded.
 825                  */
 826                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
 827                         DRM_DEBUG
 828                             ("First %s output reported failure to sync\n",
 829                              SDVO_NAME(sdvo_priv));
 830                 }
 831
 832                 if (0)
 833                         psb_intel_sdvo_set_encoder_power_state(
 834                                                         psb_intel_output,
 835                                                         mode);
 836                 psb_intel_sdvo_set_active_outputs(psb_intel_output,
 837                                               sdvo_priv->active_outputs);
 838         }
 839         return;
 840 }
 841
 842 static void psb_intel_sdvo_save(struct drm_connector *connector)
 843 {
 844         struct drm_device *dev = connector->dev;
 845         struct psb_intel_output *psb_intel_output =
 846                                         to_psb_intel_output(connector);
 847         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 848         /*int o;*/
 849
 850         sdvo_priv->save_sdvo_mult =
 851             psb_intel_sdvo_get_clock_rate_mult(psb_intel_output);
 852         psb_intel_sdvo_get_active_outputs(psb_intel_output,
 853                                       &sdvo_priv->save_active_outputs);
 854
 855         if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) {
 856                 psb_intel_sdvo_set_target_input(psb_intel_output,
 857                                                 true,
 858                                                 false);
 859                 psb_intel_sdvo_get_input_timing(psb_intel_output,
 860                                             &sdvo_priv->save_input_dtd_1);
 861         }
 862
 863         if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) {
 864                 psb_intel_sdvo_set_target_input(psb_intel_output,
 865                                                 false,
 866                                                 true);
 867                 psb_intel_sdvo_get_input_timing(psb_intel_output,
 868                                             &sdvo_priv->save_input_dtd_2);
 869         }
 870         sdvo_priv->save_SDVOX = REG_READ(sdvo_priv->output_device);
 871
 872         /*TODO: save the in_out_map state*/
 873 }
 874
 875 static void psb_intel_sdvo_restore(struct drm_connector *connector)
 876 {
 877         struct drm_device *dev = connector->dev;
 878         struct psb_intel_output *psb_intel_output =
 879                                         to_psb_intel_output(connector);
 880         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 881         /*int o;*/
 882         int i;
 883         bool input1, input2;
 884         u8 status;
 885
 886         psb_intel_sdvo_set_active_outputs(psb_intel_output, 0);
 887
 888         if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) {
 889                 psb_intel_sdvo_set_target_input(psb_intel_output, true, false);
 890                 psb_intel_sdvo_set_input_timing(psb_intel_output,
 891                                             &sdvo_priv->save_input_dtd_1);
 892         }
 893
 894         if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) {
 895                 psb_intel_sdvo_set_target_input(psb_intel_output, false, true);
 896                 psb_intel_sdvo_set_input_timing(psb_intel_output,
 897                                             &sdvo_priv->save_input_dtd_2);
 898         }
 899
 900         psb_intel_sdvo_set_clock_rate_mult(psb_intel_output,
 901                                        sdvo_priv->save_sdvo_mult);
 902
 903         REG_WRITE(sdvo_priv->output_device, sdvo_priv->save_SDVOX);
 904
 905         if (sdvo_priv->save_SDVOX & SDVO_ENABLE) {
 906                 for (i = 0; i < 2; i++)
 907                         psb_intel_wait_for_vblank(dev);
 908                 status =
 909                     psb_intel_sdvo_get_trained_inputs(psb_intel_output,
 910                                                         &input1,
 911                                                         &input2);
 912                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1)
 913                         DRM_DEBUG
 914                             ("First %s output reported failure to sync\n",
 915                              SDVO_NAME(sdvo_priv));
 916         }
 917
 918         psb_intel_sdvo_set_active_outputs(psb_intel_output,
 919                                       sdvo_priv->save_active_outputs);
 920
 921         /*TODO: restore in_out_map*/
 922         psb_intel_sdvo_write_cmd(psb_intel_output,
 923                                  SDVO_CMD_SET_IN_OUT_MAP,
 924                                  sdvo_priv->in_out_map,
 925                                  4);
 926
 927         psb_intel_sdvo_read_response(psb_intel_output, NULL, 0);
 928 }
 929
 930 static int psb_intel_sdvo_mode_valid(struct drm_connector *connector,
 931                                  struct drm_display_mode *mode)
 932 {
 933         struct psb_intel_output *psb_intel_output =
 934                                 to_psb_intel_output(connector);
 935         struct psb_intel_sdvo_priv *sdvo_priv = psb_intel_output->dev_priv;
 936
 937         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 938                 return MODE_NO_DBLESCAN;
 939
 940         if (sdvo_priv->pixel_clock_min > mode->clock)
 941                 return MODE_CLOCK_LOW;
 942
 943         if (sdvo_priv->pixel_clock_max < mode->clock)
 944                 return MODE_CLOCK_HIGH;
 945
 946         return MODE_OK;
 947 }
 948
 949 static bool psb_intel_sdvo_get_capabilities(
 950                                 struct psb_intel_output *psb_intel_output,
 951                                 struct psb_intel_sdvo_caps *caps)
 952 {
 953         u8 status;
 954
 955         psb_intel_sdvo_write_cmd(psb_intel_output,
 956                                  SDVO_CMD_GET_DEVICE_CAPS,
 957                                  NULL,
 958                                  0);
 959         status = psb_intel_sdvo_read_response(psb_intel_output,
 960                                                 caps,
 961                                                 sizeof(*caps));
 962         if (status != SDVO_CMD_STATUS_SUCCESS)
 963                 return false;
 964
 965         return true;
 966 }
 967
 968 struct drm_connector *psb_intel_sdvo_find(struct drm_device *dev, int sdvoB)
 969 {
 970         struct drm_connector *connector = NULL;
 971         struct psb_intel_output *iout = NULL;
 972         struct psb_intel_sdvo_priv *sdvo;
 973
 974         /* find the sdvo connector */
 975         list_for_each_entry(connector, &dev->mode_config.connector_list,
 976                             head) {
 977                 iout = to_psb_intel_output(connector);
 978
 979                 if (iout->type != INTEL_OUTPUT_SDVO)
 980                         continue;
 981
 982                 sdvo = iout->dev_priv;
 983
 984                 if (sdvo->output_device == SDVOB && sdvoB)
 985                         return connector;
 986
 987                 if (sdvo->output_device == SDVOC && !sdvoB)
 988                         return connector;
 989
 990         }
 991
 992         return NULL;
 993 }
 994
 995 int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector)
 996 {
 997         u8 response[2];
 998         u8 status;
 999         struct psb_intel_output *psb_intel_output;
1000         DRM_DEBUG("\n");
1001
1002         if (!connector)
1003                 return 0;
1004
1005         psb_intel_output = to_psb_intel_output(connector);
1006
1007         psb_intel_sdvo_write_cmd(psb_intel_output,
1008                                  SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1009                                  NULL,
1010                                  0);
1011         status = psb_intel_sdvo_read_response(psb_intel_output,
1012                                                 &response,
1013                                                 2);
1014
1015         if (response[0] != 0)
1016                 return 1;
1017
1018         return 0;
1019 }
1020
1021 void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1022 {
1023         u8 response[2];
1024         u8 status;
1025         struct psb_intel_output *psb_intel_output =
1026                                         to_psb_intel_output(connector);
1027
1028         psb_intel_sdvo_write_cmd(psb_intel_output,
1029                                  SDVO_CMD_GET_ACTIVE_HOT_PLUG,
1030                                  NULL,
1031                                  0);
1032         psb_intel_sdvo_read_response(psb_intel_output, &response, 2);
1033
1034         if (on) {
1035                 psb_intel_sdvo_write_cmd(psb_intel_output,
1036                                      SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL,
1037                                      0);
1038                 status = psb_intel_sdvo_read_response(psb_intel_output,
1039                                                       &response,
1040                                                       2);
1041
1042                 psb_intel_sdvo_write_cmd(psb_intel_output,
1043                                      SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1044                                      &response, 2);
1045         } else {
1046                 response[0] = 0;
1047                 response[1] = 0;
1048                 psb_intel_sdvo_write_cmd(psb_intel_output,
1049                                      SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1050                                      &response, 2);
1051         }
1052
1053         psb_intel_sdvo_write_cmd(psb_intel_output,
1054                                  SDVO_CMD_GET_ACTIVE_HOT_PLUG,
1055                                  NULL,
1056                                  0);
1057         psb_intel_sdvo_read_response(psb_intel_output, &response, 2);
1058 }
1059
1060 static enum drm_connector_status psb_intel_sdvo_detect(struct drm_connector
1061                                                    *connector, bool force)
1062 {
1063         u8 response[2];
1064         u8 status;
1065         struct psb_intel_output *psb_intel_output =
1066                                         to_psb_intel_output(connector);
1067
1068         psb_intel_sdvo_write_cmd(psb_intel_output,
1069                                  SDVO_CMD_GET_ATTACHED_DISPLAYS,
1070                                  NULL,
1071                                  0);
1072         status = psb_intel_sdvo_read_response(psb_intel_output, &response, 2);
1073
1074         DRM_DEBUG("SDVO response %d %d\n", response[0], response[1]);
1075         if ((response[0] != 0) || (response[1] != 0))
1076                 return connector_status_connected;
1077         else
1078                 return connector_status_disconnected;
1079 }
1080
1081 static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1082 {
1083         struct psb_intel_output *psb_intel_output =
1084                                         to_psb_intel_output(connector);
1085
1086         /* set the bus switch and get the modes */
1087         psb_intel_sdvo_set_control_bus_switch(psb_intel_output,
1088                                           SDVO_CONTROL_BUS_DDC2);
1089         psb_intel_ddc_get_modes(psb_intel_output);
1090
1091         if (list_empty(&connector->probed_modes))
1092                 return 0;
1093         return 1;
1094 }
1095
1096 static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1097 {
1098         struct psb_intel_output *psb_intel_output =
1099                                 to_psb_intel_output(connector);
1100
1101         if (psb_intel_output->i2c_bus)
1102                 psb_intel_i2c_destroy(psb_intel_output->i2c_bus);
1103         drm_sysfs_connector_remove(connector);
1104         drm_connector_cleanup(connector);
1105         kfree(psb_intel_output);
1106 }
1107
1108 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1109         .dpms = psb_intel_sdvo_dpms,
1110         .mode_fixup = psb_intel_sdvo_mode_fixup,
1111         .prepare = psb_intel_encoder_prepare,
1112         .mode_set = psb_intel_sdvo_mode_set,
1113         .commit = psb_intel_encoder_commit,
1114 };
1115
1116 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1117         .dpms = drm_helper_connector_dpms,
1118         .save = psb_intel_sdvo_save,
1119         .restore = psb_intel_sdvo_restore,
1120         .detect = psb_intel_sdvo_detect,
1121         .fill_modes = drm_helper_probe_single_connector_modes,
1122         .destroy = psb_intel_sdvo_destroy,
1123 };
1124
1125 static const struct drm_connector_helper_funcs
1126                                 psb_intel_sdvo_connector_helper_funcs = {
1127         .get_modes = psb_intel_sdvo_get_modes,
1128         .mode_valid = psb_intel_sdvo_mode_valid,
1129         .best_encoder = psb_intel_best_encoder,
1130 };
1131
1132 void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1133 {
1134         drm_encoder_cleanup(encoder);
1135 }
1136
1137 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1138         .destroy = psb_intel_sdvo_enc_destroy,
1139 };
1140
1141
1142 void psb_intel_sdvo_init(struct drm_device *dev, int output_device)
1143 {
1144         struct drm_connector *connector;
1145         struct psb_intel_output *psb_intel_output;
1146         struct psb_intel_sdvo_priv *sdvo_priv;
1147         struct psb_intel_i2c_chan *i2cbus = NULL;
1148         int connector_type;
1149         u8 ch[0x40];
1150         int i;
1151         int encoder_type, output_id;
1152
1153         psb_intel_output =
1154             kcalloc(sizeof(struct psb_intel_output) +
1155                     sizeof(struct psb_intel_sdvo_priv), 1, GFP_KERNEL);
1156         if (!psb_intel_output)
1157                 return;
1158
1159         connector = &psb_intel_output->base;
1160
1161         drm_connector_init(dev, connector, &psb_intel_sdvo_connector_funcs,
1162                            DRM_MODE_CONNECTOR_Unknown);
1163         drm_connector_helper_add(connector,
1164                                  &psb_intel_sdvo_connector_helper_funcs);
1165         sdvo_priv = (struct psb_intel_sdvo_priv *) (psb_intel_output + 1);
1166         psb_intel_output->type = INTEL_OUTPUT_SDVO;
1167
1168         connector->interlace_allowed = 0;
1169         connector->doublescan_allowed = 0;
1170
1171         /* setup the DDC bus. */
1172         if (output_device == SDVOB)
1173                 i2cbus =
1174                     psb_intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB");
1175         else
1176                 i2cbus =
1177                     psb_intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC");
1178
1179         if (!i2cbus)
1180                 goto err_connector;
1181
1182         sdvo_priv->i2c_bus = i2cbus;
1183
1184         if (output_device == SDVOB) {
1185                 output_id = 1;
1186                 sdvo_priv->by_input_wiring = SDVOB_IN0;
1187                 sdvo_priv->i2c_bus->slave_addr = 0x38;
1188         } else {
1189                 output_id = 2;
1190                 sdvo_priv->i2c_bus->slave_addr = 0x39;
1191         }
1192
1193         sdvo_priv->output_device = output_device;
1194         psb_intel_output->i2c_bus = i2cbus;
1195         psb_intel_output->dev_priv = sdvo_priv;
1196
1197
1198         /* Read the regs to test if we can talk to the device */
1199         for (i = 0; i < 0x40; i++) {
1200                 if (!psb_intel_sdvo_read_byte(psb_intel_output, i, &ch[i])) {
1201                         DRM_DEBUG("No SDVO device found on SDVO%c\n",
1202                                   output_device == SDVOB ? 'B' : 'C');
1203                         goto err_i2c;
1204                 }
1205         }
1206
1207         psb_intel_sdvo_get_capabilities(psb_intel_output, &sdvo_priv->caps);
1208
1209         memset(&sdvo_priv->active_outputs, 0,
1210                sizeof(sdvo_priv->active_outputs));
1211
1212         /* TODO, CVBS, SVID, YPRPB & SCART outputs. */
1213         if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB0) {
1214                 sdvo_priv->active_outputs = SDVO_OUTPUT_RGB0;
1215                 sdvo_priv->active_device = SDVO_DEVICE_CRT;
1216                 connector->display_info.subpixel_order =
1217                     SubPixelHorizontalRGB;
1218                 encoder_type = DRM_MODE_ENCODER_DAC;
1219                 connector_type = DRM_MODE_CONNECTOR_VGA;
1220         } else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB1) {
1221                 sdvo_priv->active_outputs = SDVO_OUTPUT_RGB1;
1222                 sdvo_priv->active_outputs = SDVO_DEVICE_CRT;
1223                 connector->display_info.subpixel_order =
1224                     SubPixelHorizontalRGB;
1225                 encoder_type = DRM_MODE_ENCODER_DAC;
1226                 connector_type = DRM_MODE_CONNECTOR_VGA;
1227         } else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0) {
1228                 sdvo_priv->active_outputs = SDVO_OUTPUT_TMDS0;
1229                 sdvo_priv->active_device = SDVO_DEVICE_TMDS;
1230                 connector->display_info.subpixel_order =
1231                     SubPixelHorizontalRGB;
1232                 encoder_type = DRM_MODE_ENCODER_TMDS;
1233                 connector_type = DRM_MODE_CONNECTOR_DVID;
1234         } else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS1) {
1235                 sdvo_priv->active_outputs = SDVO_OUTPUT_TMDS1;
1236                 sdvo_priv->active_device = SDVO_DEVICE_TMDS;
1237                 connector->display_info.subpixel_order =
1238                     SubPixelHorizontalRGB;
1239                 encoder_type = DRM_MODE_ENCODER_TMDS;
1240                 connector_type = DRM_MODE_CONNECTOR_DVID;
1241         } else {
1242                 unsigned char bytes[2];
1243
1244                 memcpy(bytes, &sdvo_priv->caps.output_flags, 2);
1245                 DRM_DEBUG
1246                     ("%s: No active RGB or TMDS outputs (0x%02x%02x)\n",
1247                      SDVO_NAME(sdvo_priv), bytes[0], bytes[1]);
1248                 goto err_i2c;
1249         }
1250
1251         drm_encoder_init(dev, &psb_intel_output->enc, &psb_intel_sdvo_enc_funcs,
1252                          encoder_type);
1253         drm_encoder_helper_add(&psb_intel_output->enc,
1254                                &psb_intel_sdvo_helper_funcs);
1255         connector->connector_type = connector_type;
1256
1257         drm_mode_connector_attach_encoder(&psb_intel_output->base,
1258                                           &psb_intel_output->enc);
1259         drm_sysfs_connector_add(connector);
1260
1261         /* Set the input timing to the screen. Assume always input 0. */
1262         psb_intel_sdvo_set_target_input(psb_intel_output, true, false);
1263
1264         psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_output,
1265                                                &sdvo_priv->pixel_clock_min,
1266                                                &sdvo_priv->
1267                                                pixel_clock_max);
1268
1269
1270         DRM_DEBUG("%s device VID/DID: %02X:%02X.%02X, "
1271                   "clock range %dMHz - %dMHz, "
1272                   "input 1: %c, input 2: %c, "
1273                   "output 1: %c, output 2: %c\n",
1274                   SDVO_NAME(sdvo_priv),
1275                   sdvo_priv->caps.vendor_id, sdvo_priv->caps.device_id,
1276                   sdvo_priv->caps.device_rev_id,
1277                   sdvo_priv->pixel_clock_min / 1000,
1278                   sdvo_priv->pixel_clock_max / 1000,
1279                   (sdvo_priv->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
1280                   (sdvo_priv->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
1281                   /* check currently supported outputs */
1282                   sdvo_priv->caps.output_flags &
1283                   (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
1284                   sdvo_priv->caps.output_flags &
1285                   (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
1286
1287         psb_intel_output->ddc_bus = i2cbus;
1288
1289         return;
1290
1291 err_i2c:
1292         psb_intel_i2c_destroy(psb_intel_output->i2c_bus);
1293 err_connector:
1294         drm_connector_cleanup(connector);
1295         kfree(psb_intel_output);
1296
1297         return;
1298 }