1 /**************************************************************************
2 * Copyright (c) 2011, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 **************************************************************************/
20 #include <linux/backlight.h>
26 #include "psb_intel_reg.h"
27 #include "intel_bios.h"
30 static int psb_output_init(struct drm_device *dev)
32 struct drm_psb_private *dev_priv = dev->dev_private;
33 psb_intel_lvds_init(dev, &dev_priv->mode_dev);
34 psb_intel_sdvo_init(dev, SDVOB);
38 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
41 * Poulsbo Backlight Interfaces
44 #define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */
45 #define BLC_PWM_FREQ_CALC_CONSTANT 32
48 #define PSB_BLC_PWM_PRECISION_FACTOR 10
49 #define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE
50 #define PSB_BLC_MIN_PWM_REG_FREQ 0x2
52 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
53 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
55 static int psb_brightness;
56 static struct backlight_device *psb_backlight_device;
58 static int psb_get_brightness(struct backlight_device *bd)
60 /* return locally cached var instead of HW read (due to DPST etc.) */
61 /* FIXME: ideally return actual value in case firmware fiddled with
63 return psb_brightness;
67 static int psb_backlight_setup(struct drm_device *dev)
69 struct drm_psb_private *dev_priv = dev->dev_private;
70 unsigned long core_clock;
71 /* u32 bl_max_freq; */
72 /* unsigned long value; */
75 uint32_t blc_pwm_precision_factor;
77 /* get bl_max_freq and pol from dev_priv*/
78 if (!dev_priv->lvds_bl) {
79 dev_err(dev->dev, "Has no valid LVDS backlight info\n");
82 bl_max_freq = dev_priv->lvds_bl->freq;
83 blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR;
85 core_clock = dev_priv->core_freq;
87 value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
88 value *= blc_pwm_precision_factor;
90 value /= blc_pwm_precision_factor;
92 if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ ||
93 value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ)
96 value &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
97 REG_WRITE(BLC_PWM_CTL,
98 (value << PSB_BACKLIGHT_PWM_CTL_SHIFT) | (value));
103 static int psb_set_brightness(struct backlight_device *bd)
105 struct drm_device *dev = bl_get_data(psb_backlight_device);
106 int level = bd->props.brightness;
108 /* Percentage 1-100% being valid */
112 psb_intel_lvds_set_brightness(dev, level);
113 psb_brightness = level;
117 static const struct backlight_ops psb_ops = {
118 .get_brightness = psb_get_brightness,
119 .update_status = psb_set_brightness,
122 static int psb_backlight_init(struct drm_device *dev)
124 struct drm_psb_private *dev_priv = dev->dev_private;
126 struct backlight_properties props;
128 memset(&props, 0, sizeof(struct backlight_properties));
129 props.max_brightness = 100;
130 props.type = BACKLIGHT_PLATFORM;
132 psb_backlight_device = backlight_device_register("psb-bl",
133 NULL, (void *)dev, &psb_ops, &props);
134 if (IS_ERR(psb_backlight_device))
135 return PTR_ERR(psb_backlight_device);
137 ret = psb_backlight_setup(dev);
139 backlight_device_unregister(psb_backlight_device);
140 psb_backlight_device = NULL;
143 psb_backlight_device->props.brightness = 100;
144 psb_backlight_device->props.max_brightness = 100;
145 backlight_update_status(psb_backlight_device);
146 dev_priv->backlight_device = psb_backlight_device;
153 * Provide the Poulsbo specific chip logic and low level methods
154 * for power management
157 static void psb_init_pm(struct drm_device *dev)
159 struct drm_psb_private *dev_priv = dev->dev_private;
161 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL);
162 gating &= ~3; /* Disable 2D clock gating */
164 PSB_WSGX32(gating, PSB_CR_CLKGATECTL);
165 PSB_RSGX32(PSB_CR_CLKGATECTL);
169 * psb_save_display_registers - save registers lost on suspend
170 * @dev: our DRM device
172 * Save the state we need in order to be able to restore the interface
173 * upon resume from suspend
175 static int psb_save_display_registers(struct drm_device *dev)
177 struct drm_psb_private *dev_priv = dev->dev_private;
178 struct drm_crtc *crtc;
179 struct drm_connector *connector;
181 /* Display arbitration control + watermarks */
182 dev_priv->saveDSPARB = PSB_RVDC32(DSPARB);
183 dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1);
184 dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2);
185 dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3);
186 dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4);
187 dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5);
188 dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6);
189 dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
191 /* Save crtc and output state */
192 mutex_lock(&dev->mode_config.mutex);
193 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
194 if (drm_helper_crtc_in_use(crtc))
195 crtc->funcs->save(crtc);
198 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
199 connector->funcs->save(connector);
201 mutex_unlock(&dev->mode_config.mutex);
206 * psb_restore_display_registers - restore lost register state
207 * @dev: our DRM device
209 * Restore register state that was lost during suspend and resume.
211 static int psb_restore_display_registers(struct drm_device *dev)
213 struct drm_psb_private *dev_priv = dev->dev_private;
214 struct drm_crtc *crtc;
215 struct drm_connector *connector;
218 /* Display arbitration + watermarks */
219 PSB_WVDC32(dev_priv->saveDSPARB, DSPARB);
220 PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1);
221 PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2);
222 PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3);
223 PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4);
224 PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5);
225 PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6);
226 PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT);
228 /*make sure VGA plane is off. it initializes to on after reset!*/
229 PSB_WVDC32(0x80000000, VGACNTRL);
231 mutex_lock(&dev->mode_config.mutex);
232 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
233 if (drm_helper_crtc_in_use(crtc))
234 crtc->funcs->restore(crtc);
236 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
237 connector->funcs->restore(connector);
239 mutex_unlock(&dev->mode_config.mutex);
241 if (dev_priv->iLVDS_enable) {
242 /*shutdown the panel*/
243 PSB_WVDC32(0, PP_CONTROL);
245 pp_stat = PSB_RVDC32(PP_STATUS);
246 } while (pp_stat & 0x80000000);
248 /* Turn off the plane */
249 PSB_WVDC32(0x58000000, DSPACNTR);
250 PSB_WVDC32(0, DSPASURF);/*trigger the plane disable*/
254 PSB_WVDC32(0x0, PIPEACONF);
259 PSB_WVDC32(0, MRST_DPLL_A);
261 PSB_WVDC32(DPI_SHUT_DOWN, DPI_CONTROL_REG);
262 PSB_WVDC32(0x0, PIPEACONF);
263 PSB_WVDC32(0x2faf0000, BLC_PWM_CTL);
264 while (REG_READ(0x70008) & 0x40000000)
266 while ((PSB_RVDC32(GEN_FIFO_STAT_REG) & DPI_FIFO_EMPTY)
269 PSB_WVDC32(0, DEVICE_READY_REG);
274 static int psb_power_down(struct drm_device *dev)
279 static int psb_power_up(struct drm_device *dev)
284 static void psb_get_core_freq(struct drm_device *dev)
287 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
288 struct drm_psb_private *dev_priv = dev->dev_private;
290 /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
291 /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
293 pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
294 pci_read_config_dword(pci_root, 0xD4, &clock);
295 pci_dev_put(pci_root);
297 switch (clock & 0x07) {
299 dev_priv->core_freq = 100;
302 dev_priv->core_freq = 133;
305 dev_priv->core_freq = 150;
308 dev_priv->core_freq = 178;
311 dev_priv->core_freq = 200;
316 dev_priv->core_freq = 266;
318 dev_priv->core_freq = 0;
322 static int psb_chip_setup(struct drm_device *dev)
324 psb_get_core_freq(dev);
325 gma_intel_opregion_init(dev);
326 psb_intel_init_bios(dev);
330 const struct psb_ops psb_chip_ops = {
335 .sgx_offset = PSB_SGX_OFFSET,
336 .chip_setup = psb_chip_setup,
338 .crtc_helper = &psb_intel_helper_funcs,
339 .crtc_funcs = &psb_intel_crtc_funcs,
341 .output_init = psb_output_init,
343 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
344 .backlight_init = psb_backlight_init,
347 .init_pm = psb_init_pm,
348 .save_regs = psb_save_display_registers,
349 .restore_regs = psb_restore_display_registers,
350 .power_down = psb_power_down,
351 .power_up = psb_power_up,