2 * cxd2099.c: Driver for the CXD2099AR Common Interface Controller
4 * Copyright (C) 2010-2011 Digital Devices GmbH
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 only, as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
22 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
25 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/init.h>
30 #include <linux/i2c.h>
31 #include <linux/wait.h>
32 #include <linux/delay.h>
33 #include <linux/mutex.h>
38 #define MAX_BUFFER_SIZE 248
41 struct dvb_ca_en50221 en;
43 struct i2c_adapter *i2c;
44 struct cxd2099_cfg cfg;
62 static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
65 u8 m[2] = {reg, data};
66 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
68 if (i2c_transfer(adapter, &msg, 1) != 1) {
69 printk(KERN_ERR "Failed to write to I2C register %02x@%02x!\n",
76 static int i2c_write(struct i2c_adapter *adapter, u8 adr,
79 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
81 if (i2c_transfer(adapter, &msg, 1) != 1) {
82 printk(KERN_ERR "Failed to write to I2C!\n");
88 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
91 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
92 .buf = ®, .len = 1},
93 {.addr = adr, .flags = I2C_M_RD,
94 .buf = val, .len = 1} };
96 if (i2c_transfer(adapter, msgs, 2) != 2) {
97 printk(KERN_ERR "error in i2c_read_reg\n");
103 static int i2c_read(struct i2c_adapter *adapter, u8 adr,
104 u8 reg, u8 *data, u8 n)
106 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
107 .buf = ®, .len = 1},
108 {.addr = adr, .flags = I2C_M_RD,
109 .buf = data, .len = n} };
111 if (i2c_transfer(adapter, msgs, 2) != 2) {
112 printk(KERN_ERR "error in i2c_read\n");
118 static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n)
122 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
124 ci->lastaddress = adr;
125 status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n);
130 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
132 return read_block(ci, reg, val, 1);
136 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
139 u8 addr[3] = {2, address & 0xff, address >> 8};
141 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
143 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
147 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
150 u8 addr[3] = {2, address & 0xff, address >> 8};
152 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
155 memcpy(buf+1, data, n);
156 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n+1);
161 static int read_io(struct cxd *ci, u16 address, u8 *val)
164 u8 addr[3] = {2, address & 0xff, address >> 8};
166 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
168 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1);
172 static int write_io(struct cxd *ci, u16 address, u8 val)
175 u8 addr[3] = {2, address & 0xff, address >> 8};
176 u8 buf[2] = {3, val};
178 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
180 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2);
185 static int read_io_data(struct cxd *ci, u8 *data, u8 n)
188 u8 addr[3] = { 2, 0, 0 };
190 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
192 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
196 static int write_io_data(struct cxd *ci, u8 *data, u8 n)
199 u8 addr[3] = {2, 0, 0};
201 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
204 memcpy(buf+1, data, n);
205 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
211 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
215 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg);
216 if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
217 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]);
218 ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
220 ci->lastaddress = reg;
221 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]);
224 ci->regs[reg] &= 0x7f;
228 static int write_reg(struct cxd *ci, u8 reg, u8 val)
230 return write_regm(ci, reg, val, 0xff);
234 static int write_block(struct cxd *ci, u8 adr, u8 *data, int n)
239 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
241 ci->lastaddress = adr;
242 memcpy(buf + 1, data, n);
243 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
249 static void set_mode(struct cxd *ci, int mode)
251 if (mode == ci->mode)
255 case 0x00: /* IO mem */
256 write_regm(ci, 0x06, 0x00, 0x07);
258 case 0x01: /* ATT mem */
259 write_regm(ci, 0x06, 0x02, 0x07);
267 static void cam_mode(struct cxd *ci, int mode)
269 if (mode == ci->cammode)
274 write_regm(ci, 0x20, 0x80, 0x80);
278 if (!ci->en.read_data)
280 printk(KERN_INFO "enable cam buffer mode\n");
281 /* write_reg(ci, 0x0d, 0x00); */
282 /* write_reg(ci, 0x0e, 0x01); */
283 write_regm(ci, 0x08, 0x40, 0x40);
284 /* read_reg(ci, 0x12, &dummy); */
285 write_regm(ci, 0x08, 0x80, 0x80);
296 static int init(struct cxd *ci)
300 mutex_lock(&ci->lock);
303 status = write_reg(ci, 0x00, 0x00);
306 status = write_reg(ci, 0x01, 0x00);
309 status = write_reg(ci, 0x02, 0x10);
312 status = write_reg(ci, 0x03, 0x00);
315 status = write_reg(ci, 0x05, 0xFF);
318 status = write_reg(ci, 0x06, 0x1F);
321 status = write_reg(ci, 0x07, 0x1F);
324 status = write_reg(ci, 0x08, 0x28);
327 status = write_reg(ci, 0x14, 0x20);
332 status = write_reg(ci, 0x09, 0x4D); /* Input Mode C, BYPass Serial, TIVAL = low, MSB */
336 status = write_reg(ci, 0x0A, 0xA7); /* TOSTRT = 8, Mode B (gated clock), falling Edge, Serial, POL=HIGH, MSB */
340 status = write_reg(ci, 0x0B, 0x33);
343 status = write_reg(ci, 0x0C, 0x33);
347 status = write_regm(ci, 0x14, 0x00, 0x0F);
350 status = write_reg(ci, 0x15, ci->clk_reg_b);
353 status = write_regm(ci, 0x16, 0x00, 0x0F);
356 status = write_reg(ci, 0x17, ci->clk_reg_f);
360 if (ci->cfg.clock_mode) {
361 if (ci->cfg.polarity) {
362 status = write_reg(ci, 0x09, 0x6f);
366 status = write_reg(ci, 0x09, 0x6d);
370 status = write_reg(ci, 0x20, 0x68);
373 status = write_reg(ci, 0x21, 0x00);
376 status = write_reg(ci, 0x22, 0x02);
380 if (ci->cfg.polarity) {
381 status = write_reg(ci, 0x09, 0x4f);
385 status = write_reg(ci, 0x09, 0x4d);
390 status = write_reg(ci, 0x20, 0x28);
393 status = write_reg(ci, 0x21, 0x00);
396 status = write_reg(ci, 0x22, 0x07);
401 status = write_regm(ci, 0x20, 0x80, 0x80);
404 status = write_regm(ci, 0x03, 0x02, 0x02);
407 status = write_reg(ci, 0x01, 0x04);
410 status = write_reg(ci, 0x00, 0x31);
414 /* Put TS in bypass */
415 status = write_regm(ci, 0x09, 0x08, 0x08);
421 mutex_unlock(&ci->lock);
426 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
427 int slot, int address)
429 struct cxd *ci = ca->data;
432 if (address <= 0 || address > 1024)
434 return ci->amem[address];
437 mutex_lock(&ci->lock);
438 write_regm(ci, 0x06, 0x00, 0x05);
439 read_pccard(ci, 0, &ci->amem[0], 128);
440 read_pccard(ci, 128, &ci->amem[0], 128);
441 read_pccard(ci, 256, &ci->amem[0], 128);
442 read_pccard(ci, 384, &ci->amem[0], 128);
443 write_regm(ci, 0x06, 0x05, 0x05);
444 mutex_unlock(&ci->lock);
445 return ci->amem[address];
448 mutex_lock(&ci->lock);
450 read_pccard(ci, address, &val, 1);
451 mutex_unlock(&ci->lock);
452 /* printk(KERN_INFO "%02x:%02x\n", address,val); */
457 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
458 int address, u8 value)
460 struct cxd *ci = ca->data;
462 mutex_lock(&ci->lock);
464 write_pccard(ci, address, &value, 1);
465 mutex_unlock(&ci->lock);
469 static int read_cam_control(struct dvb_ca_en50221 *ca,
470 int slot, u8 address)
472 struct cxd *ci = ca->data;
475 mutex_lock(&ci->lock);
477 read_io(ci, address, &val);
478 mutex_unlock(&ci->lock);
482 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
483 u8 address, u8 value)
485 struct cxd *ci = ca->data;
487 mutex_lock(&ci->lock);
489 write_io(ci, address, value);
490 mutex_unlock(&ci->lock);
494 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
496 struct cxd *ci = ca->data;
498 mutex_lock(&ci->lock);
500 write_reg(ci, 0x00, 0x21);
501 write_reg(ci, 0x06, 0x1F);
502 write_reg(ci, 0x00, 0x31);
505 write_reg(ci, 0x06, 0x1F);
506 write_reg(ci, 0x06, 0x2F);
509 write_reg(ci, 0x00, 0x21);
510 write_reg(ci, 0x06, 0x1F);
511 write_reg(ci, 0x00, 0x31);
512 write_regm(ci, 0x20, 0x80, 0x80);
513 write_reg(ci, 0x03, 0x02);
523 for (i = 0; i < 100; i++) {
526 read_reg(ci, 0x06, &val);
527 printk(KERN_INFO "%d:%02x\n", i, val);
536 mutex_unlock(&ci->lock);
541 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
543 struct cxd *ci = ca->data;
545 printk(KERN_INFO "slot_shutdown\n");
546 mutex_lock(&ci->lock);
547 write_regm(ci, 0x09, 0x08, 0x08);
548 write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
549 write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
551 mutex_unlock(&ci->lock);
555 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
557 struct cxd *ci = ca->data;
559 mutex_lock(&ci->lock);
560 write_regm(ci, 0x09, 0x00, 0x08);
565 mutex_unlock(&ci->lock);
570 static int campoll(struct cxd *ci)
574 read_reg(ci, 0x04, &istat);
577 write_reg(ci, 0x05, istat);
581 printk(KERN_INFO "DR\n");
584 printk(KERN_INFO "WC\n");
589 read_reg(ci, 0x01, &slotstat);
591 if (!ci->slot_stat) {
592 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
593 write_regm(ci, 0x03, 0x08, 0x08);
599 write_regm(ci, 0x03, 0x00, 0x08);
600 printk(KERN_INFO "NO CAM\n");
604 if (istat&8 && ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
606 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
613 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
615 struct cxd *ci = ca->data;
618 mutex_lock(&ci->lock);
620 read_reg(ci, 0x01, &slotstat);
621 mutex_unlock(&ci->lock);
623 return ci->slot_stat;
627 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
629 struct cxd *ci = ca->data;
633 mutex_lock(&ci->lock);
635 mutex_unlock(&ci->lock);
637 printk(KERN_INFO "read_data\n");
641 mutex_lock(&ci->lock);
642 read_reg(ci, 0x0f, &msb);
643 read_reg(ci, 0x10, &lsb);
645 read_block(ci, 0x12, ebuf, len);
647 mutex_unlock(&ci->lock);
652 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
654 struct cxd *ci = ca->data;
656 mutex_lock(&ci->lock);
657 printk(kern_INFO "write_data %d\n", ecount);
658 write_reg(ci, 0x0d, ecount>>8);
659 write_reg(ci, 0x0e, ecount&0xff);
660 write_block(ci, 0x11, ebuf, ecount);
661 mutex_unlock(&ci->lock);
666 static struct dvb_ca_en50221 en_templ = {
667 .read_attribute_mem = read_attribute_mem,
668 .write_attribute_mem = write_attribute_mem,
669 .read_cam_control = read_cam_control,
670 .write_cam_control = write_cam_control,
671 .slot_reset = slot_reset,
672 .slot_shutdown = slot_shutdown,
673 .slot_ts_enable = slot_ts_enable,
674 .poll_slot_status = poll_slot_status,
676 .read_data = read_data,
677 .write_data = write_data,
682 struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg,
684 struct i2c_adapter *i2c)
689 if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) {
690 printk(KERN_INFO "No CXD2099 detected at %02x\n", cfg->adr);
694 ci = kmalloc(sizeof(struct cxd), GFP_KERNEL);
697 memset(ci, 0, sizeof(*ci));
699 mutex_init(&ci->lock);
700 memcpy(&ci->cfg, cfg, sizeof(struct cxd2099_cfg));
702 ci->lastaddress = 0xff;
703 ci->clk_reg_b = 0x4a;
704 ci->clk_reg_f = 0x1b;
706 memcpy(&ci->en, &en_templ, sizeof(en_templ));
709 printk(KERN_INFO "Attached CXD2099AR at %02x\n", ci->cfg.adr);
712 EXPORT_SYMBOL(cxd2099_attach);
714 MODULE_DESCRIPTION("cxd2099");
715 MODULE_AUTHOR("Ralph Metzler");
716 MODULE_LICENSE("GPL");