drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include <linux/slab.h>
  81 #include "../comedidev.h"
  82
  83 #include <linux/delay.h>
  84 #include <asm/dma.h>
  85
  86 #include "8253.h"
  87 #include "8255.h"
  88 #include "mite.h"
  89 #include "comedi_fc.h"
  90 #include "ni_labpc.h"
  91
  92 #define DRV_NAME "ni_labpc"
  93
  94 /* size of io region used by board */
  95 #define LABPC_SIZE           32
  96 /* 2 MHz master clock */
  97 #define LABPC_TIMER_BASE            500
  98
  99 /* Registers for the lab-pc+ */
 100
 101 /* write-only registers */
 102 #define COMMAND1_REG    0x0
 103 #define   ADC_GAIN_MASK (0x7 << 4)
 104 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 105 /* enables multi channel scans */
 106 #define   ADC_SCAN_EN_BIT       0x80
 107 #define COMMAND2_REG    0x1
 108 /* enable pretriggering (used in conjunction with SWTRIG) */
 109 #define   PRETRIG_BIT   0x1
 110 /* enable paced conversions on external trigger */
 111 #define   HWTRIG_BIT    0x2
 112 /* enable paced conversions */
 113 #define   SWTRIG_BIT    0x4
 114 /* use two cascaded counters for pacing */
 115 #define   CASCADE_BIT   0x8
 116 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 117 #define COMMAND3_REG    0x2
 118 /* enable dma transfers */
 119 #define   DMA_EN_BIT    0x1
 120 /* enable interrupts for 8255 */
 121 #define   DIO_INTR_EN_BIT       0x2
 122 /* enable dma terminal count interrupt */
 123 #define   DMATC_INTR_EN_BIT     0x4
 124 /* enable timer interrupt */
 125 #define   TIMER_INTR_EN_BIT     0x8
 126 /* enable error interrupt */
 127 #define   ERR_INTR_EN_BIT       0x10
 128 /* enable fifo not empty interrupt */
 129 #define   ADC_FNE_INTR_EN_BIT   0x20
 130 #define ADC_CONVERT_REG 0x3
 131 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 132 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 133 #define ADC_CLEAR_REG   0x8
 134 #define DMATC_CLEAR_REG 0xa
 135 #define TIMER_CLEAR_REG 0xc
 136 /* 1200 boards only */
 137 #define COMMAND6_REG    0xe
 138 /* select ground or common-mode reference */
 139 #define   ADC_COMMON_BIT        0x1
 140 /*  adc unipolar */
 141 #define   ADC_UNIP_BIT  0x2
 142 /*  dac unipolar */
 143 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 144 /* enable fifo half full interrupt */
 145 #define   ADC_FHF_INTR_EN_BIT   0x20
 146 /* enable interrupt on end of hardware count */
 147 #define   A1_INTR_EN_BIT        0x40
 148 /* scan up from channel zero instead of down to zero */
 149 #define   ADC_SCAN_UP_BIT 0x80
 150 #define COMMAND4_REG    0xf
 151 /* enables 'interval' scanning */
 152 #define   INTERVAL_SCAN_EN_BIT  0x1
 153 /* enables external signal on counter b1 output to trigger scan */
 154 #define   EXT_SCAN_EN_BIT       0x2
 155 /* chooses direction (output or input) for EXTCONV* line */
 156 #define   EXT_CONVERT_OUT_BIT   0x4
 157 /* chooses differential inputs for adc (in conjunction with board jumper) */
 158 #define   ADC_DIFF_BIT  0x8
 159 #define   EXT_CONVERT_DISABLE_BIT       0x10
 160 /* 1200 boards only, calibration stuff */
 161 #define COMMAND5_REG    0x1c
 162 /* enable eeprom for write */
 163 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 164 /* enable dithering */
 165 #define   DITHER_EN_BIT 0x8
 166 /* load calibration dac */
 167 #define   CALDAC_LOAD_BIT       0x10
 168 /* serial clock - rising edge writes, falling edge reads */
 169 #define   SCLOCK_BIT    0x20
 170 /* serial data bit for writing to eeprom or calibration dacs */
 171 #define   SDATA_BIT     0x40
 172 /* enable eeprom for read/write */
 173 #define   EEPROM_EN_BIT 0x80
 174 #define INTERVAL_COUNT_REG      0x1e
 175 #define INTERVAL_LOAD_REG       0x1f
 176 #define   INTERVAL_LOAD_BITS    0x1
 177
 178 /* read-only registers */
 179 #define STATUS1_REG     0x0
 180 /* data is available in fifo */
 181 #define   DATA_AVAIL_BIT        0x1
 182 /* overrun has occurred */
 183 #define   OVERRUN_BIT   0x2
 184 /* fifo overflow */
 185 #define   OVERFLOW_BIT  0x4
 186 /* timer interrupt has occured */
 187 #define   TIMER_BIT     0x8
 188 /* dma terminal count has occured */
 189 #define   DMATC_BIT     0x10
 190 /* external trigger has occured */
 191 #define   EXT_TRIG_BIT  0x40
 192 /* 1200 boards only */
 193 #define STATUS2_REG     0x1d
 194 /* programmable eeprom serial output */
 195 #define   EEPROM_OUT_BIT        0x1
 196 /* counter A1 terminal count */
 197 #define   A1_TC_BIT     0x2
 198 /* fifo not half full */
 199 #define   FNHF_BIT      0x4
 200 #define ADC_FIFO_REG    0xa
 201
 202 #define DIO_BASE_REG    0x10
 203 #define COUNTER_A_BASE_REG      0x14
 204 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 205 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 206 #define   INIT_A0_BITS  0x14
 207 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 208 #define   INIT_A1_BITS  0x70
 209 #define COUNTER_B_BASE_REG      0x18
 210
 211 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 212 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 213 static irqreturn_t labpc_interrupt(int irq, void *d);
 214 static int labpc_drain_fifo(struct comedi_device *dev);
 215 static void labpc_drain_dma(struct comedi_device *dev);
 216 static void handle_isa_dma(struct comedi_device *dev);
 217 static void labpc_drain_dregs(struct comedi_device *dev);
 218 static int labpc_ai_cmdtest(struct comedi_device *dev,
 219                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 220 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 221 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 222                           struct comedi_insn *insn, unsigned int *data);
 223 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 224                           struct comedi_insn *insn, unsigned int *data);
 225 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 226                           struct comedi_insn *insn, unsigned int *data);
 227 static int labpc_calib_read_insn(struct comedi_device *dev,
 228                                  struct comedi_subdevice *s,
 229                                  struct comedi_insn *insn, unsigned int *data);
 230 static int labpc_calib_write_insn(struct comedi_device *dev,
 231                                   struct comedi_subdevice *s,
 232                                   struct comedi_insn *insn, unsigned int *data);
 233 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 234                                   struct comedi_subdevice *s,
 235                                   struct comedi_insn *insn, unsigned int *data);
 236 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 237                                    struct comedi_subdevice *s,
 238                                    struct comedi_insn *insn,
 239                                    unsigned int *data);
 240 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 241 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 242 #ifdef CONFIG_COMEDI_PCI
 243 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 244 #endif
 245 static int labpc_dio_mem_callback(int dir, int port, int data,
 246                                   unsigned long arg);
 247 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 248                              unsigned int num_bits);
 249 static unsigned int labpc_serial_in(struct comedi_device *dev);
 250 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 251                                       unsigned int address);
 252 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 253 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
 254                                        unsigned int address,
 255                                        unsigned int value);
 256 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 257                          unsigned int value);
 258
 259 enum scan_mode {
 260         MODE_SINGLE_CHAN,
 261         MODE_SINGLE_CHAN_INTERVAL,
 262         MODE_MULT_CHAN_UP,
 263         MODE_MULT_CHAN_DOWN,
 264 };
 265
 266 /* analog input ranges */
 267 #define NUM_LABPC_PLUS_AI_RANGES 16
 268 /* indicates unipolar ranges */
 269 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 270         0,
 271         0,
 272         0,
 273         0,
 274         0,
 275         0,
 276         0,
 277         0,
 278         1,
 279         1,
 280         1,
 281         1,
 282         1,
 283         1,
 284         1,
 285         1,
 286 };
 287
 288 /* map range index to gain bits */
 289 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 290         0x00,
 291         0x10,
 292         0x20,
 293         0x30,
 294         0x40,
 295         0x50,
 296         0x60,
 297         0x70,
 298         0x00,
 299         0x10,
 300         0x20,
 301         0x30,
 302         0x40,
 303         0x50,
 304         0x60,
 305         0x70,
 306 };
 307
 308 static const struct comedi_lrange range_labpc_plus_ai = {
 309         NUM_LABPC_PLUS_AI_RANGES,
 310         {
 311          BIP_RANGE(5),
 312          BIP_RANGE(4),
 313          BIP_RANGE(2.5),
 314          BIP_RANGE(1),
 315          BIP_RANGE(0.5),
 316          BIP_RANGE(0.25),
 317          BIP_RANGE(0.1),
 318          BIP_RANGE(0.05),
 319          UNI_RANGE(10),
 320          UNI_RANGE(8),
 321          UNI_RANGE(5),
 322          UNI_RANGE(2),
 323          UNI_RANGE(1),
 324          UNI_RANGE(0.5),
 325          UNI_RANGE(0.2),
 326          UNI_RANGE(0.1),
 327          }
 328 };
 329
 330 #define NUM_LABPC_1200_AI_RANGES 14
 331 /* indicates unipolar ranges */
 332 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 333         0,
 334         0,
 335         0,
 336         0,
 337         0,
 338         0,
 339         0,
 340         1,
 341         1,
 342         1,
 343         1,
 344         1,
 345         1,
 346         1,
 347 };
 348
 349 /* map range index to gain bits */
 350 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 351         0x00,
 352         0x20,
 353         0x30,
 354         0x40,
 355         0x50,
 356         0x60,
 357         0x70,
 358         0x00,
 359         0x20,
 360         0x30,
 361         0x40,
 362         0x50,
 363         0x60,
 364         0x70,
 365 };
 366
 367 const struct comedi_lrange range_labpc_1200_ai = {
 368         NUM_LABPC_1200_AI_RANGES,
 369         {
 370          BIP_RANGE(5),
 371          BIP_RANGE(2.5),
 372          BIP_RANGE(1),
 373          BIP_RANGE(0.5),
 374          BIP_RANGE(0.25),
 375          BIP_RANGE(0.1),
 376          BIP_RANGE(0.05),
 377          UNI_RANGE(10),
 378          UNI_RANGE(5),
 379          UNI_RANGE(2),
 380          UNI_RANGE(1),
 381          UNI_RANGE(0.5),
 382          UNI_RANGE(0.2),
 383          UNI_RANGE(0.1),
 384          }
 385 };
 386
 387 /* analog output ranges */
 388 #define AO_RANGE_IS_UNIPOLAR 0x1
 389 static const struct comedi_lrange range_labpc_ao = {
 390         2,
 391         {
 392          BIP_RANGE(5),
 393          UNI_RANGE(10),
 394          }
 395 };
 396
 397 /* functions that do inb/outb and readb/writeb so we can use
 398  * function pointers to decide which to use */
 399 static inline unsigned int labpc_inb(unsigned long address)
 400 {
 401         return inb(address);
 402 }
 403
 404 static inline void labpc_outb(unsigned int byte, unsigned long address)
 405 {
 406         outb(byte, address);
 407 }
 408
 409 static inline unsigned int labpc_readb(unsigned long address)
 410 {
 411         return readb((void *)address);
 412 }
 413
 414 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 415 {
 416         writeb(byte, (void *)address);
 417 }
 418
 419 static const struct labpc_board_struct labpc_boards[] = {
 420         {
 421          .name = "lab-pc-1200",
 422          .ai_speed = 10000,
 423          .bustype = isa_bustype,
 424          .register_layout = labpc_1200_layout,
 425          .has_ao = 1,
 426          .ai_range_table = &range_labpc_1200_ai,
 427          .ai_range_code = labpc_1200_ai_gain_bits,
 428          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 429          .ai_scan_up = 1,
 430          .memory_mapped_io = 0,
 431          },
 432         {
 433          .name = "lab-pc-1200ai",
 434          .ai_speed = 10000,
 435          .bustype = isa_bustype,
 436          .register_layout = labpc_1200_layout,
 437          .has_ao = 0,
 438          .ai_range_table = &range_labpc_1200_ai,
 439          .ai_range_code = labpc_1200_ai_gain_bits,
 440          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 441          .ai_scan_up = 1,
 442          .memory_mapped_io = 0,
 443          },
 444         {
 445          .name = "lab-pc+",
 446          .ai_speed = 12000,
 447          .bustype = isa_bustype,
 448          .register_layout = labpc_plus_layout,
 449          .has_ao = 1,
 450          .ai_range_table = &range_labpc_plus_ai,
 451          .ai_range_code = labpc_plus_ai_gain_bits,
 452          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 453          .ai_scan_up = 0,
 454          .memory_mapped_io = 0,
 455          },
 456 #ifdef CONFIG_COMEDI_PCI
 457         {
 458          .name = "pci-1200",
 459          .device_id = 0x161,
 460          .ai_speed = 10000,
 461          .bustype = pci_bustype,
 462          .register_layout = labpc_1200_layout,
 463          .has_ao = 1,
 464          .ai_range_table = &range_labpc_1200_ai,
 465          .ai_range_code = labpc_1200_ai_gain_bits,
 466          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 467          .ai_scan_up = 1,
 468          .memory_mapped_io = 1,
 469          },
 470 /* dummy entry so pci board works when comedi_config is passed driver name */
 471         {
 472          .name = DRV_NAME,
 473          .bustype = pci_bustype,
 474          },
 475 #endif
 476 };
 477
 478 /*
 479  * Useful for shorthand access to the particular board structure
 480  */
 481 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 482
 483 /* size in bytes of dma buffer */
 484 static const int dma_buffer_size = 0xff00;
 485 /* 2 bytes per sample */
 486 static const int sample_size = 2;
 487
 488 #define devpriv ((struct labpc_private *)dev->private)
 489
 490 static struct comedi_driver driver_labpc = {
 491         .driver_name = DRV_NAME,
 492         .module = THIS_MODULE,
 493         .attach = labpc_attach,
 494         .detach = labpc_common_detach,
 495         .num_names = ARRAY_SIZE(labpc_boards),
 496         .board_name = &labpc_boards[0].name,
 497         .offset = sizeof(struct labpc_board_struct),
 498 };
 499
 500 #ifdef CONFIG_COMEDI_PCI
 501 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 502         {
 503         PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
 504         0}
 505 };
 506
 507 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 508 #endif /* CONFIG_COMEDI_PCI */
 509
 510 static inline int labpc_counter_load(struct comedi_device *dev,
 511                                      unsigned long base_address,
 512                                      unsigned int counter_number,
 513                                      unsigned int count, unsigned int mode)
 514 {
 515         if (thisboard->memory_mapped_io)
 516                 return i8254_mm_load((void *)base_address, 0, counter_number,
 517                                      count, mode);
 518         else
 519                 return i8254_load(base_address, 0, counter_number, count, mode);
 520 }
 521
 522 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 523                         unsigned int irq, unsigned int dma_chan)
 524 {
 525         struct comedi_subdevice *s;
 526         int i;
 527         unsigned long dma_flags, isr_flags;
 528         short lsb, msb;
 529
 530         printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name,
 531                iobase);
 532         if (irq)
 533                 printk(", irq %u", irq);
 534         if (dma_chan)
 535                 printk(", dma %u", dma_chan);
 536         printk("\n");
 537
 538         if (iobase == 0) {
 539                 printk("io base address is zero!\n");
 540                 return -EINVAL;
 541         }
 542         /*  request io regions for isa boards */
 543         if (thisboard->bustype == isa_bustype) {
 544                 /* check if io addresses are available */
 545                 if (!request_region(iobase, LABPC_SIZE,
 546                                     driver_labpc.driver_name)) {
 547                         printk("I/O port conflict\n");
 548                         return -EIO;
 549                 }
 550         }
 551         dev->iobase = iobase;
 552
 553         if (thisboard->memory_mapped_io) {
 554                 devpriv->read_byte = labpc_readb;
 555                 devpriv->write_byte = labpc_writeb;
 556         } else {
 557                 devpriv->read_byte = labpc_inb;
 558                 devpriv->write_byte = labpc_outb;
 559         }
 560         /* initialize board's command registers */
 561         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 562         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 563         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 564         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 565         if (thisboard->register_layout == labpc_1200_layout) {
 566                 devpriv->write_byte(devpriv->command5_bits,
 567                                     dev->iobase + COMMAND5_REG);
 568                 devpriv->write_byte(devpriv->command6_bits,
 569                                     dev->iobase + COMMAND6_REG);
 570         }
 571
 572         /* grab our IRQ */
 573         if (irq) {
 574                 isr_flags = 0;
 575                 if (thisboard->bustype == pci_bustype)
 576                         isr_flags |= IRQF_SHARED;
 577                 if (request_irq(irq, labpc_interrupt, isr_flags,
 578                                 driver_labpc.driver_name, dev)) {
 579                         printk("unable to allocate irq %u\n", irq);
 580                         return -EINVAL;
 581                 }
 582         }
 583         dev->irq = irq;
 584
 585         /* grab dma channel */
 586         if (dma_chan > 3) {
 587                 printk(" invalid dma channel %u\n", dma_chan);
 588                 return -EINVAL;
 589         } else if (dma_chan) {
 590                 /* allocate dma buffer */
 591                 devpriv->dma_buffer =
 592                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 593                 if (devpriv->dma_buffer == NULL) {
 594                         printk(" failed to allocate dma buffer\n");
 595                         return -ENOMEM;
 596                 }
 597                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 598                         printk(" failed to allocate dma channel %u\n",
 599                                dma_chan);
 600                         return -EINVAL;
 601                 }
 602                 devpriv->dma_chan = dma_chan;
 603                 dma_flags = claim_dma_lock();
 604                 disable_dma(devpriv->dma_chan);
 605                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 606                 release_dma_lock(dma_flags);
 607         }
 608
 609         dev->board_name = thisboard->name;
 610
 611         if (alloc_subdevices(dev, 5) < 0)
 612                 return -ENOMEM;
 613
 614         /* analog input subdevice */
 615         s = dev->subdevices + 0;
 616         dev->read_subdev = s;
 617         s->type = COMEDI_SUBD_AI;
 618         s->subdev_flags =
 619             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 620         s->n_chan = 8;
 621         s->len_chanlist = 8;
 622         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
 623         s->range_table = thisboard->ai_range_table;
 624         s->do_cmd = labpc_ai_cmd;
 625         s->do_cmdtest = labpc_ai_cmdtest;
 626         s->insn_read = labpc_ai_rinsn;
 627         s->cancel = labpc_cancel;
 628
 629         /* analog output */
 630         s = dev->subdevices + 1;
 631         if (thisboard->has_ao) {
 632                 /*
 633                  * Could provide command support, except it only has a
 634                  * one sample hardware buffer for analog output and no
 635                  * underrun flag.
 636                  */
 637                 s->type = COMEDI_SUBD_AO;
 638                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 639                 s->n_chan = NUM_AO_CHAN;
 640                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 641                 s->range_table = &range_labpc_ao;
 642                 s->insn_read = labpc_ao_rinsn;
 643                 s->insn_write = labpc_ao_winsn;
 644                 /* initialize analog outputs to a known value */
 645                 for (i = 0; i < s->n_chan; i++) {
 646                         devpriv->ao_value[i] = s->maxdata / 2;
 647                         lsb = devpriv->ao_value[i] & 0xff;
 648                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 649                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 650                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 651                 }
 652         } else {
 653                 s->type = COMEDI_SUBD_UNUSED;
 654         }
 655
 656         /* 8255 dio */
 657         s = dev->subdevices + 2;
 658         /*  if board uses io memory we have to give a custom callback
 659          * function to the 8255 driver */
 660         if (thisboard->memory_mapped_io)
 661                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 662                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 663         else
 664                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 665
 666         /*  calibration subdevices for boards that have one */
 667         s = dev->subdevices + 3;
 668         if (thisboard->register_layout == labpc_1200_layout) {
 669                 s->type = COMEDI_SUBD_CALIB;
 670                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 671                 s->n_chan = 16;
 672                 s->maxdata = 0xff;
 673                 s->insn_read = labpc_calib_read_insn;
 674                 s->insn_write = labpc_calib_write_insn;
 675
 676                 for (i = 0; i < s->n_chan; i++)
 677                         write_caldac(dev, i, s->maxdata / 2);
 678         } else
 679                 s->type = COMEDI_SUBD_UNUSED;
 680
 681         /* EEPROM */
 682         s = dev->subdevices + 4;
 683         if (thisboard->register_layout == labpc_1200_layout) {
 684                 s->type = COMEDI_SUBD_MEMORY;
 685                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 686                 s->n_chan = EEPROM_SIZE;
 687                 s->maxdata = 0xff;
 688                 s->insn_read = labpc_eeprom_read_insn;
 689                 s->insn_write = labpc_eeprom_write_insn;
 690
 691                 for (i = 0; i < EEPROM_SIZE; i++)
 692                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 693 #ifdef LABPC_DEBUG
 694                 printk(" eeprom:");
 695                 for (i = 0; i < EEPROM_SIZE; i++)
 696                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 697                 printk("\n");
 698 #endif
 699         } else
 700                 s->type = COMEDI_SUBD_UNUSED;
 701
 702         return 0;
 703 }
 704
 705 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 706 {
 707         unsigned long iobase = 0;
 708         unsigned int irq = 0;
 709         unsigned int dma_chan = 0;
 710 #ifdef CONFIG_COMEDI_PCI
 711         int retval;
 712 #endif
 713
 714         /* allocate and initialize dev->private */
 715         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 716                 return -ENOMEM;
 717
 718         /* get base address, irq etc. based on bustype */
 719         switch (thisboard->bustype) {
 720         case isa_bustype:
 721                 iobase = it->options[0];
 722                 irq = it->options[1];
 723                 dma_chan = it->options[2];
 724                 break;
 725         case pci_bustype:
 726 #ifdef CONFIG_COMEDI_PCI
 727                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 728                 if (retval < 0)
 729                         return retval;
 730                 retval = mite_setup(devpriv->mite);
 731                 if (retval < 0)
 732                         return retval;
 733                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 734                 irq = mite_irq(devpriv->mite);
 735 #else
 736                 printk(" this driver has not been built with PCI support.\n");
 737                 return -EINVAL;
 738 #endif
 739                 break;
 740         case pcmcia_bustype:
 741                 printk
 742                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 743                 return -EINVAL;
 744                 break;
 745         default:
 746                 printk("bug! couldn't determine board type\n");
 747                 return -EINVAL;
 748                 break;
 749         }
 750
 751         return labpc_common_attach(dev, iobase, irq, dma_chan);
 752 }
 753
 754 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 755 #ifdef CONFIG_COMEDI_PCI
 756 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 757 {
 758         struct mite_struct *mite;
 759         int i;
 760         for (mite = mite_devices; mite; mite = mite->next) {
 761                 if (mite->used)
 762                         continue;
 763 /* if bus/slot are specified then make sure we have the right bus/slot */
 764                 if (bus || slot) {
 765                         if (bus != mite->pcidev->bus->number
 766                             || slot != PCI_SLOT(mite->pcidev->devfn))
 767                                 continue;
 768                 }
 769                 for (i = 0; i < driver_labpc.num_names; i++) {
 770                         if (labpc_boards[i].bustype != pci_bustype)
 771                                 continue;
 772                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 773                                 devpriv->mite = mite;
 774 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 775                                 dev->board_ptr = &labpc_boards[i];
 776                                 return 0;
 777                         }
 778                 }
 779         }
 780         printk("no device found\n");
 781         mite_list_devices();
 782         return -EIO;
 783 }
 784 #endif
 785
 786 int labpc_common_detach(struct comedi_device *dev)
 787 {
 788         printk("comedi%d: ni_labpc: detach\n", dev->minor);
 789
 790         if (dev->subdevices)
 791                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 792
 793         /* only free stuff if it has been allocated by _attach */
 794         if (devpriv->dma_buffer)
 795                 kfree(devpriv->dma_buffer);
 796         if (devpriv->dma_chan)
 797                 free_dma(devpriv->dma_chan);
 798         if (dev->irq)
 799                 free_irq(dev->irq, dev);
 800         if (thisboard->bustype == isa_bustype && dev->iobase)
 801                 release_region(dev->iobase, LABPC_SIZE);
 802 #ifdef CONFIG_COMEDI_PCI
 803         if (devpriv->mite)
 804                 mite_unsetup(devpriv->mite);
 805 #endif
 806
 807         return 0;
 808 };
 809
 810 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 811 {
 812         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 813         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 814         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 815 }
 816
 817 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 818 {
 819         unsigned long flags;
 820
 821         spin_lock_irqsave(&dev->spinlock, flags);
 822         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 823         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 824         spin_unlock_irqrestore(&dev->spinlock, flags);
 825
 826         devpriv->command3_bits = 0;
 827         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 828
 829         return 0;
 830 }
 831
 832 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 833 {
 834         if (cmd->chanlist_len == 1)
 835                 return MODE_SINGLE_CHAN;
 836
 837         /* chanlist may be NULL during cmdtest. */
 838         if (cmd->chanlist == NULL)
 839                 return MODE_MULT_CHAN_UP;
 840
 841         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 842                 return MODE_SINGLE_CHAN_INTERVAL;
 843
 844         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 845                 return MODE_MULT_CHAN_UP;
 846
 847         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 848                 return MODE_MULT_CHAN_DOWN;
 849
 850         printk("ni_labpc: bug! this should never happen\n");
 851
 852         return 0;
 853 }
 854
 855 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 856                                      const struct comedi_cmd *cmd)
 857 {
 858         int mode, channel, range, aref, i;
 859
 860         if (cmd->chanlist == NULL)
 861                 return 0;
 862
 863         mode = labpc_ai_scan_mode(cmd);
 864
 865         if (mode == MODE_SINGLE_CHAN)
 866                 return 0;
 867
 868         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 869                 if (cmd->chanlist_len > 0xff) {
 870                         comedi_error(dev,
 871                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 872                         return 1;
 873                 }
 874         }
 875
 876         channel = CR_CHAN(cmd->chanlist[0]);
 877         range = CR_RANGE(cmd->chanlist[0]);
 878         aref = CR_AREF(cmd->chanlist[0]);
 879
 880         for (i = 0; i < cmd->chanlist_len; i++) {
 881
 882                 switch (mode) {
 883                 case MODE_SINGLE_CHAN_INTERVAL:
 884                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 885                                 comedi_error(dev,
 886                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 887                                 return 1;
 888                         }
 889                         break;
 890                 case MODE_MULT_CHAN_UP:
 891                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 892                                 comedi_error(dev,
 893                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 894                                 return 1;
 895                         }
 896                         break;
 897                 case MODE_MULT_CHAN_DOWN:
 898                         if (CR_CHAN(cmd->chanlist[i]) !=
 899                             cmd->chanlist_len - i - 1) {
 900                                 comedi_error(dev,
 901                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 902                                 return 1;
 903                         }
 904                         break;
 905                 default:
 906                         printk("ni_labpc: bug! in chanlist check\n");
 907                         return 1;
 908                         break;
 909                 }
 910
 911                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 912                         comedi_error(dev,
 913                                      "entries in chanlist must all have the same range\n");
 914                         return 1;
 915                 }
 916
 917                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 918                         comedi_error(dev,
 919                                      "entries in chanlist must all have the same reference\n");
 920                         return 1;
 921                 }
 922         }
 923
 924         return 0;
 925 }
 926
 927 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 928 {
 929         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 930                 return 1;
 931
 932         if (cmd->scan_begin_src == TRIG_FOLLOW)
 933                 return 1;
 934
 935         return 0;
 936 }
 937
 938 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 939 {
 940         if (cmd->convert_src != TRIG_TIMER)
 941                 return 0;
 942
 943         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 944             cmd->scan_begin_src == TRIG_TIMER)
 945                 return cmd->scan_begin_arg;
 946
 947         return cmd->convert_arg;
 948 }
 949
 950 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 951 {
 952         if (cmd->convert_src != TRIG_TIMER)
 953                 return;
 954
 955         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 956             cmd->scan_begin_src == TRIG_TIMER) {
 957                 cmd->scan_begin_arg = ns;
 958                 if (cmd->convert_arg > cmd->scan_begin_arg)
 959                         cmd->convert_arg = cmd->scan_begin_arg;
 960         } else
 961                 cmd->convert_arg = ns;
 962 }
 963
 964 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 965 {
 966         if (cmd->scan_begin_src != TRIG_TIMER)
 967                 return 0;
 968
 969         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 970             cmd->convert_src == TRIG_TIMER)
 971                 return 0;
 972
 973         return cmd->scan_begin_arg;
 974 }
 975
 976 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 977 {
 978         if (cmd->scan_begin_src != TRIG_TIMER)
 979                 return;
 980
 981         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 982             cmd->convert_src == TRIG_TIMER)
 983                 return;
 984
 985         cmd->scan_begin_arg = ns;
 986 }
 987
 988 static int labpc_ai_cmdtest(struct comedi_device *dev,
 989                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 990 {
 991         int err = 0;
 992         int tmp, tmp2;
 993         int stop_mask;
 994
 995         /* step 1: make sure trigger sources are trivially valid */
 996
 997         tmp = cmd->start_src;
 998         cmd->start_src &= TRIG_NOW | TRIG_EXT;
 999         if (!cmd->start_src || tmp != cmd->start_src)
1000                 err++;
1001
1002         tmp = cmd->scan_begin_src;
1003         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1004         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1005                 err++;
1006
1007         tmp = cmd->convert_src;
1008         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1009         if (!cmd->convert_src || tmp != cmd->convert_src)
1010                 err++;
1011
1012         tmp = cmd->scan_end_src;
1013         cmd->scan_end_src &= TRIG_COUNT;
1014         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1015                 err++;
1016
1017         tmp = cmd->stop_src;
1018         stop_mask = TRIG_COUNT | TRIG_NONE;
1019         if (thisboard->register_layout == labpc_1200_layout)
1020                 stop_mask |= TRIG_EXT;
1021         cmd->stop_src &= stop_mask;
1022         if (!cmd->stop_src || tmp != cmd->stop_src)
1023                 err++;
1024
1025         if (err)
1026                 return 1;
1027
1028         /* step 2: make sure trigger sources are unique and mutually compatible */
1029
1030         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1031                 err++;
1032         if (cmd->scan_begin_src != TRIG_TIMER &&
1033             cmd->scan_begin_src != TRIG_FOLLOW &&
1034             cmd->scan_begin_src != TRIG_EXT)
1035                 err++;
1036         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1037                 err++;
1038         if (cmd->stop_src != TRIG_COUNT &&
1039             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1040                 err++;
1041
1042         /* can't have external stop and start triggers at once */
1043         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1044                 err++;
1045
1046         if (err)
1047                 return 2;
1048
1049         /* step 3: make sure arguments are trivially compatible */
1050
1051         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1052                 cmd->start_arg = 0;
1053                 err++;
1054         }
1055
1056         if (!cmd->chanlist_len)
1057                 err++;
1058
1059         if (cmd->scan_end_arg != cmd->chanlist_len) {
1060                 cmd->scan_end_arg = cmd->chanlist_len;
1061                 err++;
1062         }
1063
1064         if (cmd->convert_src == TRIG_TIMER) {
1065                 if (cmd->convert_arg < thisboard->ai_speed) {
1066                         cmd->convert_arg = thisboard->ai_speed;
1067                         err++;
1068                 }
1069         }
1070         /* make sure scan timing is not too fast */
1071         if (cmd->scan_begin_src == TRIG_TIMER) {
1072                 if (cmd->convert_src == TRIG_TIMER &&
1073                     cmd->scan_begin_arg <
1074                     cmd->convert_arg * cmd->chanlist_len) {
1075                         cmd->scan_begin_arg =
1076                             cmd->convert_arg * cmd->chanlist_len;
1077                         err++;
1078                 }
1079                 if (cmd->scan_begin_arg <
1080                     thisboard->ai_speed * cmd->chanlist_len) {
1081                         cmd->scan_begin_arg =
1082                             thisboard->ai_speed * cmd->chanlist_len;
1083                         err++;
1084                 }
1085         }
1086         /* stop source */
1087         switch (cmd->stop_src) {
1088         case TRIG_COUNT:
1089                 if (!cmd->stop_arg) {
1090                         cmd->stop_arg = 1;
1091                         err++;
1092                 }
1093                 break;
1094         case TRIG_NONE:
1095                 if (cmd->stop_arg != 0) {
1096                         cmd->stop_arg = 0;
1097                         err++;
1098                 }
1099                 break;
1100                 /*  TRIG_EXT doesn't care since it doesn't trigger off a numbered channel */
1101         default:
1102                 break;
1103         }
1104
1105         if (err)
1106                 return 3;
1107
1108         /* step 4: fix up any arguments */
1109
1110         tmp = cmd->convert_arg;
1111         tmp2 = cmd->scan_begin_arg;
1112         labpc_adc_timing(dev, cmd);
1113         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1114                 err++;
1115
1116         if (err)
1117                 return 4;
1118
1119         if (labpc_ai_chanlist_invalid(dev, cmd))
1120                 return 5;
1121
1122         return 0;
1123 }
1124
1125 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1126 {
1127         int channel, range, aref;
1128         unsigned long irq_flags;
1129         int ret;
1130         struct comedi_async *async = s->async;
1131         struct comedi_cmd *cmd = &async->cmd;
1132         enum transfer_type xfer;
1133         unsigned long flags;
1134
1135         if (!dev->irq) {
1136                 comedi_error(dev, "no irq assigned, cannot perform command");
1137                 return -1;
1138         }
1139
1140         range = CR_RANGE(cmd->chanlist[0]);
1141         aref = CR_AREF(cmd->chanlist[0]);
1142
1143         /* make sure board is disabled before setting up aquisition */
1144         spin_lock_irqsave(&dev->spinlock, flags);
1145         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1146         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1147         spin_unlock_irqrestore(&dev->spinlock, flags);
1148
1149         devpriv->command3_bits = 0;
1150         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1151
1152         /*  initialize software conversion count */
1153         if (cmd->stop_src == TRIG_COUNT)
1154                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1155
1156         /*  setup hardware conversion counter */
1157         if (cmd->stop_src == TRIG_EXT) {
1158                 /*  load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0 */
1159                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1160                                          1, 3, 0);
1161                 if (ret < 0) {
1162                         comedi_error(dev, "error loading counter a1");
1163                         return -1;
1164                 }
1165         } else                  /*  otherwise, just put a1 in mode 0 with no count to set its output low */
1166                 devpriv->write_byte(INIT_A1_BITS,
1167                                     dev->iobase + COUNTER_A_CONTROL_REG);
1168
1169         /*  figure out what method we will use to transfer data */
1170         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1171             /*  dma unsafe at RT priority, and too much setup time for TRIG_WAKE_EOS for */
1172             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1173             /*  only available on the isa boards */
1174             thisboard->bustype == isa_bustype) {
1175                 xfer = isa_dma_transfer;
1176         } else if (thisboard->register_layout == labpc_1200_layout &&   /*  pc-plus has no fifo-half full interrupt */
1177                    /*  wake-end-of-scan should interrupt on fifo not empty */
1178                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1179                    /*  make sure we are taking more than just a few points */
1180                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1181                 xfer = fifo_half_full_transfer;
1182         } else
1183                 xfer = fifo_not_empty_transfer;
1184         devpriv->current_transfer = xfer;
1185
1186         /*  setup command6 register for 1200 boards */
1187         if (thisboard->register_layout == labpc_1200_layout) {
1188                 /*  reference inputs to ground or common? */
1189                 if (aref != AREF_GROUND)
1190                         devpriv->command6_bits |= ADC_COMMON_BIT;
1191                 else
1192                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1193                 /*  bipolar or unipolar range? */
1194                 if (thisboard->ai_range_is_unipolar[range])
1195                         devpriv->command6_bits |= ADC_UNIP_BIT;
1196                 else
1197                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1198                 /*  interrupt on fifo half full? */
1199                 if (xfer == fifo_half_full_transfer)
1200                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1201                 else
1202                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1203                 /*  enable interrupt on counter a1 terminal count? */
1204                 if (cmd->stop_src == TRIG_EXT)
1205                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1206                 else
1207                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1208                 /*  are we scanning up or down through channels? */
1209                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1210                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1211                 else
1212                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1213                 /*  write to register */
1214                 devpriv->write_byte(devpriv->command6_bits,
1215                                     dev->iobase + COMMAND6_REG);
1216         }
1217
1218         /* setup channel list, etc (command1 register) */
1219         devpriv->command1_bits = 0;
1220         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1221                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1222         else
1223                 channel = CR_CHAN(cmd->chanlist[0]);
1224         /* munge channel bits for differential / scan disabled mode */
1225         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1226                 channel *= 2;
1227         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1228         devpriv->command1_bits |= thisboard->ai_range_code[range];
1229         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1230         /* manual says to set scan enable bit on second pass */
1231         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1232             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1233                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1234                 /* need a brief delay before enabling scan, or scan
1235                  * list will get screwed when you switch
1236                  * between scan up to scan down mode - dunno why */
1237                 udelay(1);
1238                 devpriv->write_byte(devpriv->command1_bits,
1239                                     dev->iobase + COMMAND1_REG);
1240         }
1241         /*  setup any external triggering/pacing (command4 register) */
1242         devpriv->command4_bits = 0;
1243         if (cmd->convert_src != TRIG_EXT)
1244                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1245         /* XXX should discard first scan when using interval scanning
1246          * since manual says it is not synced with scan clock */
1247         if (labpc_use_continuous_mode(cmd) == 0) {
1248                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1249                 if (cmd->scan_begin_src == TRIG_EXT)
1250                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1251         }
1252         /*  single-ended/differential */
1253         if (aref == AREF_DIFF)
1254                 devpriv->command4_bits |= ADC_DIFF_BIT;
1255         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1256
1257         devpriv->write_byte(cmd->chanlist_len,
1258                             dev->iobase + INTERVAL_COUNT_REG);
1259         /*  load count */
1260         devpriv->write_byte(INTERVAL_LOAD_BITS,
1261                             dev->iobase + INTERVAL_LOAD_REG);
1262
1263         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1264                 /*  set up pacing */
1265                 labpc_adc_timing(dev, cmd);
1266                 /*  load counter b0 in mode 3 */
1267                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1268                                          0, devpriv->divisor_b0, 3);
1269                 if (ret < 0) {
1270                         comedi_error(dev, "error loading counter b0");
1271                         return -1;
1272                 }
1273         }
1274         /*  set up conversion pacing */
1275         if (labpc_ai_convert_period(cmd)) {
1276                 /*  load counter a0 in mode 2 */
1277                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1278                                          0, devpriv->divisor_a0, 2);
1279                 if (ret < 0) {
1280                         comedi_error(dev, "error loading counter a0");
1281                         return -1;
1282                 }
1283         } else
1284                 devpriv->write_byte(INIT_A0_BITS,
1285                                     dev->iobase + COUNTER_A_CONTROL_REG);
1286
1287         /*  set up scan pacing */
1288         if (labpc_ai_scan_period(cmd)) {
1289                 /*  load counter b1 in mode 2 */
1290                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1291                                          1, devpriv->divisor_b1, 2);
1292                 if (ret < 0) {
1293                         comedi_error(dev, "error loading counter b1");
1294                         return -1;
1295                 }
1296         }
1297
1298         labpc_clear_adc_fifo(dev);
1299
1300         /*  set up dma transfer */
1301         if (xfer == isa_dma_transfer) {
1302                 irq_flags = claim_dma_lock();
1303                 disable_dma(devpriv->dma_chan);
1304                 /* clear flip-flop to make sure 2-byte registers for
1305                  * count and address get set correctly */
1306                 clear_dma_ff(devpriv->dma_chan);
1307                 set_dma_addr(devpriv->dma_chan,
1308                              virt_to_bus(devpriv->dma_buffer));
1309                 /*  set appropriate size of transfer */
1310                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1311                 if (cmd->stop_src == TRIG_COUNT &&
1312                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1313                         devpriv->dma_transfer_size =
1314                             devpriv->count * sample_size;
1315                 }
1316                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1317                 enable_dma(devpriv->dma_chan);
1318                 release_dma_lock(irq_flags);
1319                 /*  enable board's dma */
1320                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1321         } else
1322                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1323
1324         /*  enable error interrupts */
1325         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1326         /*  enable fifo not empty interrupt? */
1327         if (xfer == fifo_not_empty_transfer)
1328                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1329         else
1330                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1331         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1332
1333         /*  startup aquisition */
1334
1335         /*  command2 reg */
1336         /*  use 2 cascaded counters for pacing */
1337         spin_lock_irqsave(&dev->spinlock, flags);
1338         devpriv->command2_bits |= CASCADE_BIT;
1339         switch (cmd->start_src) {
1340         case TRIG_EXT:
1341                 devpriv->command2_bits |= HWTRIG_BIT;
1342                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1343                 break;
1344         case TRIG_NOW:
1345                 devpriv->command2_bits |= SWTRIG_BIT;
1346                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1347                 break;
1348         default:
1349                 comedi_error(dev, "bug with start_src");
1350                 return -1;
1351                 break;
1352         }
1353         switch (cmd->stop_src) {
1354         case TRIG_EXT:
1355                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1356                 break;
1357         case TRIG_COUNT:
1358         case TRIG_NONE:
1359                 break;
1360         default:
1361                 comedi_error(dev, "bug with stop_src");
1362                 return -1;
1363         }
1364         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1365         spin_unlock_irqrestore(&dev->spinlock, flags);
1366
1367         return 0;
1368 }
1369
1370 /* interrupt service routine */
1371 static irqreturn_t labpc_interrupt(int irq, void *d)
1372 {
1373         struct comedi_device *dev = d;
1374         struct comedi_subdevice *s = dev->read_subdev;
1375         struct comedi_async *async;
1376         struct comedi_cmd *cmd;
1377
1378         if (dev->attached == 0) {
1379                 comedi_error(dev, "premature interrupt");
1380                 return IRQ_HANDLED;
1381         }
1382
1383         async = s->async;
1384         cmd = &async->cmd;
1385         async->events = 0;
1386
1387         /* read board status */
1388         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1389         if (thisboard->register_layout == labpc_1200_layout)
1390                 devpriv->status2_bits =
1391                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1392
1393         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1394                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1395             && (devpriv->status2_bits & A1_TC_BIT) == 0
1396             && (devpriv->status2_bits & FNHF_BIT)) {
1397                 return IRQ_NONE;
1398         }
1399
1400         if (devpriv->status1_bits & OVERRUN_BIT) {
1401                 /* clear error interrupt */
1402                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1403                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1404                 comedi_event(dev, s);
1405                 comedi_error(dev, "overrun");
1406                 return IRQ_HANDLED;
1407         }
1408
1409         if (devpriv->current_transfer == isa_dma_transfer) {
1410                 /*
1411                  * if a dma terminal count of external stop trigger
1412                  * has occurred
1413                  */
1414                 if (devpriv->status1_bits & DMATC_BIT ||
1415                     (thisboard->register_layout == labpc_1200_layout
1416                      && devpriv->status2_bits & A1_TC_BIT)) {
1417                         handle_isa_dma(dev);
1418                 }
1419         } else
1420                 labpc_drain_fifo(dev);
1421
1422         if (devpriv->status1_bits & TIMER_BIT) {
1423                 comedi_error(dev, "handled timer interrupt?");
1424                 /*  clear it */
1425                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1426         }
1427
1428         if (devpriv->status1_bits & OVERFLOW_BIT) {
1429                 /*  clear error interrupt */
1430                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1431                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1432                 comedi_event(dev, s);
1433                 comedi_error(dev, "overflow");
1434                 return IRQ_HANDLED;
1435         }
1436         /*  handle external stop trigger */
1437         if (cmd->stop_src == TRIG_EXT) {
1438                 if (devpriv->status2_bits & A1_TC_BIT) {
1439                         labpc_drain_dregs(dev);
1440                         labpc_cancel(dev, s);
1441                         async->events |= COMEDI_CB_EOA;
1442                 }
1443         }
1444
1445         /* TRIG_COUNT end of acquisition */
1446         if (cmd->stop_src == TRIG_COUNT) {
1447                 if (devpriv->count == 0) {
1448                         labpc_cancel(dev, s);
1449                         async->events |= COMEDI_CB_EOA;
1450                 }
1451         }
1452
1453         comedi_event(dev, s);
1454         return IRQ_HANDLED;
1455 }
1456
1457 /* read all available samples from ai fifo */
1458 static int labpc_drain_fifo(struct comedi_device *dev)
1459 {
1460         unsigned int lsb, msb;
1461         short data;
1462         struct comedi_async *async = dev->read_subdev->async;
1463         const int timeout = 10000;
1464         unsigned int i;
1465
1466         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1467
1468         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1469              i++) {
1470                 /*  quit if we have all the data we want */
1471                 if (async->cmd.stop_src == TRIG_COUNT) {
1472                         if (devpriv->count == 0)
1473                                 break;
1474                         devpriv->count--;
1475                 }
1476                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1477                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1478                 data = (msb << 8) | lsb;
1479                 cfc_write_to_buffer(dev->read_subdev, data);
1480                 devpriv->status1_bits =
1481                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1482         }
1483         if (i == timeout) {
1484                 comedi_error(dev, "ai timeout, fifo never empties");
1485                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1486                 return -1;
1487         }
1488
1489         return 0;
1490 }
1491
1492 static void labpc_drain_dma(struct comedi_device *dev)
1493 {
1494         struct comedi_subdevice *s = dev->read_subdev;
1495         struct comedi_async *async = s->async;
1496         int status;
1497         unsigned long flags;
1498         unsigned int max_points, num_points, residue, leftover;
1499         int i;
1500
1501         status = devpriv->status1_bits;
1502
1503         flags = claim_dma_lock();
1504         disable_dma(devpriv->dma_chan);
1505         /* clear flip-flop to make sure 2-byte registers for
1506          * count and address get set correctly */
1507         clear_dma_ff(devpriv->dma_chan);
1508
1509         /*  figure out how many points to read */
1510         max_points = devpriv->dma_transfer_size / sample_size;
1511         /* residue is the number of points left to be done on the dma
1512          * transfer.  It should always be zero at this point unless
1513          * the stop_src is set to external triggering.
1514          */
1515         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1516         num_points = max_points - residue;
1517         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1518                 num_points = devpriv->count;
1519
1520         /*  figure out how many points will be stored next time */
1521         leftover = 0;
1522         if (async->cmd.stop_src != TRIG_COUNT) {
1523                 leftover = devpriv->dma_transfer_size / sample_size;
1524         } else if (devpriv->count > num_points) {
1525                 leftover = devpriv->count - num_points;
1526                 if (leftover > max_points)
1527                         leftover = max_points;
1528         }
1529
1530         /* write data to comedi buffer */
1531         for (i = 0; i < num_points; i++)
1532                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1533
1534         if (async->cmd.stop_src == TRIG_COUNT)
1535                 devpriv->count -= num_points;
1536
1537         /*  set address and count for next transfer */
1538         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1539         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1540         release_dma_lock(flags);
1541
1542         async->events |= COMEDI_CB_BLOCK;
1543 }
1544
1545 static void handle_isa_dma(struct comedi_device *dev)
1546 {
1547         labpc_drain_dma(dev);
1548
1549         enable_dma(devpriv->dma_chan);
1550
1551         /*  clear dma tc interrupt */
1552         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1553 }
1554
1555 /* makes sure all data acquired by board is transfered to comedi (used
1556  * when aquisition is terminated by stop_src == TRIG_EXT). */
1557 static void labpc_drain_dregs(struct comedi_device *dev)
1558 {
1559         if (devpriv->current_transfer == isa_dma_transfer)
1560                 labpc_drain_dma(dev);
1561
1562         labpc_drain_fifo(dev);
1563 }
1564
1565 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1566                           struct comedi_insn *insn, unsigned int *data)
1567 {
1568         int i, n;
1569         int chan, range;
1570         int lsb, msb;
1571         int timeout = 1000;
1572         unsigned long flags;
1573
1574         /*  disable timed conversions */
1575         spin_lock_irqsave(&dev->spinlock, flags);
1576         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1577         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1578         spin_unlock_irqrestore(&dev->spinlock, flags);
1579
1580         /*  disable interrupt generation and dma */
1581         devpriv->command3_bits = 0;
1582         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1583
1584         /* set gain and channel */
1585         devpriv->command1_bits = 0;
1586         chan = CR_CHAN(insn->chanspec);
1587         range = CR_RANGE(insn->chanspec);
1588         devpriv->command1_bits |= thisboard->ai_range_code[range];
1589         /* munge channel bits for differential/scan disabled mode */
1590         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1591                 chan *= 2;
1592         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1593         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1594
1595         /* setup command6 register for 1200 boards */
1596         if (thisboard->register_layout == labpc_1200_layout) {
1597                 /*  reference inputs to ground or common? */
1598                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1599                         devpriv->command6_bits |= ADC_COMMON_BIT;
1600                 else
1601                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1602                 /* bipolar or unipolar range? */
1603                 if (thisboard->ai_range_is_unipolar[range])
1604                         devpriv->command6_bits |= ADC_UNIP_BIT;
1605                 else
1606                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1607                 /* don't interrupt on fifo half full */
1608                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1609                 /* don't enable interrupt on counter a1 terminal count? */
1610                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1611                 /* write to register */
1612                 devpriv->write_byte(devpriv->command6_bits,
1613                                     dev->iobase + COMMAND6_REG);
1614         }
1615         /* setup command4 register */
1616         devpriv->command4_bits = 0;
1617         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1618         /* single-ended/differential */
1619         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1620                 devpriv->command4_bits |= ADC_DIFF_BIT;
1621         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1622
1623         /* initialize pacer counter output to make sure it doesn't cause any problems */
1624         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1625
1626         labpc_clear_adc_fifo(dev);
1627
1628         for (n = 0; n < insn->n; n++) {
1629                 /* trigger conversion */
1630                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1631
1632                 for (i = 0; i < timeout; i++) {
1633                         if (devpriv->read_byte(dev->iobase +
1634                                                STATUS1_REG) & DATA_AVAIL_BIT)
1635                                 break;
1636                         udelay(1);
1637                 }
1638                 if (i == timeout) {
1639                         comedi_error(dev, "timeout");
1640                         return -ETIME;
1641                 }
1642                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1643                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1644                 data[n] = (msb << 8) | lsb;
1645         }
1646
1647         return n;
1648 }
1649
1650 /* analog output insn */
1651 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1652                           struct comedi_insn *insn, unsigned int *data)
1653 {
1654         int channel, range;
1655         unsigned long flags;
1656         int lsb, msb;
1657
1658         channel = CR_CHAN(insn->chanspec);
1659
1660         /* turn off pacing of analog output channel */
1661         /* note: hardware bug in daqcard-1200 means pacing cannot
1662          * be independently enabled/disabled for its the two channels */
1663         spin_lock_irqsave(&dev->spinlock, flags);
1664         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1665         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1666         spin_unlock_irqrestore(&dev->spinlock, flags);
1667
1668         /* set range */
1669         if (thisboard->register_layout == labpc_1200_layout) {
1670                 range = CR_RANGE(insn->chanspec);
1671                 if (range & AO_RANGE_IS_UNIPOLAR)
1672                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1673                 else
1674                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1675                 /*  write to register */
1676                 devpriv->write_byte(devpriv->command6_bits,
1677                                     dev->iobase + COMMAND6_REG);
1678         }
1679         /* send data */
1680         lsb = data[0] & 0xff;
1681         msb = (data[0] >> 8) & 0xff;
1682         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1683         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1684
1685         /* remember value for readback */
1686         devpriv->ao_value[channel] = data[0];
1687
1688         return 1;
1689 }
1690
1691 /* analog output readback insn */
1692 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1693                           struct comedi_insn *insn, unsigned int *data)
1694 {
1695         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1696
1697         return 1;
1698 }
1699
1700 static int labpc_calib_read_insn(struct comedi_device *dev,
1701                                  struct comedi_subdevice *s,
1702                                  struct comedi_insn *insn, unsigned int *data)
1703 {
1704         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1705
1706         return 1;
1707 }
1708
1709 static int labpc_calib_write_insn(struct comedi_device *dev,
1710                                   struct comedi_subdevice *s,
1711                                   struct comedi_insn *insn, unsigned int *data)
1712 {
1713         int channel = CR_CHAN(insn->chanspec);
1714
1715         write_caldac(dev, channel, data[0]);
1716         return 1;
1717 }
1718
1719 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1720                                   struct comedi_subdevice *s,
1721                                   struct comedi_insn *insn, unsigned int *data)
1722 {
1723         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1724
1725         return 1;
1726 }
1727
1728 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1729                                    struct comedi_subdevice *s,
1730                                    struct comedi_insn *insn, unsigned int *data)
1731 {
1732         int channel = CR_CHAN(insn->chanspec);
1733         int ret;
1734
1735         /*  only allow writes to user area of eeprom */
1736         if (channel < 16 || channel > 127) {
1737                 printk
1738                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1739                 return -EINVAL;
1740         }
1741
1742         ret = labpc_eeprom_write(dev, channel, data[0]);
1743         if (ret < 0)
1744                 return ret;
1745
1746         return 1;
1747 }
1748
1749 /* utility function that suggests a dma transfer size in bytes */
1750 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1751 {
1752         unsigned int size;
1753         unsigned int freq;
1754
1755         if (cmd.convert_src == TRIG_TIMER)
1756                 freq = 1000000000 / cmd.convert_arg;
1757         /* return some default value */
1758         else
1759                 freq = 0xffffffff;
1760
1761         /* make buffer fill in no more than 1/3 second */
1762         size = (freq / 3) * sample_size;
1763
1764         /* set a minimum and maximum size allowed */
1765         if (size > dma_buffer_size)
1766                 size = dma_buffer_size - dma_buffer_size % sample_size;
1767         else if (size < sample_size)
1768                 size = sample_size;
1769
1770         return size;
1771 }
1772
1773 /* figures out what counter values to use based on command */
1774 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1775 {
1776         /* max value for 16 bit counter in mode 2 */
1777         const int max_counter_value = 0x10000;
1778         /* min value for 16 bit counter in mode 2 */
1779         const int min_counter_value = 2;
1780         unsigned int base_period;
1781
1782         /*
1783          * if both convert and scan triggers are TRIG_TIMER, then they
1784          * both rely on counter b0
1785          */
1786         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1787                 /*
1788                  * pick the lowest b0 divisor value we can (for maximum input
1789                  * clock speed on convert and scan counters)
1790                  */
1791                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1792                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1793                 if (devpriv->divisor_b0 < min_counter_value)
1794                         devpriv->divisor_b0 = min_counter_value;
1795                 if (devpriv->divisor_b0 > max_counter_value)
1796                         devpriv->divisor_b0 = max_counter_value;
1797
1798                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1799
1800                 /*  set a0 for conversion frequency and b1 for scan frequency */
1801                 switch (cmd->flags & TRIG_ROUND_MASK) {
1802                 default:
1803                 case TRIG_ROUND_NEAREST:
1804                         devpriv->divisor_a0 =
1805                             (labpc_ai_convert_period(cmd) +
1806                              (base_period / 2)) / base_period;
1807                         devpriv->divisor_b1 =
1808                             (labpc_ai_scan_period(cmd) +
1809                              (base_period / 2)) / base_period;
1810                         break;
1811                 case TRIG_ROUND_UP:
1812                         devpriv->divisor_a0 =
1813                             (labpc_ai_convert_period(cmd) + (base_period -
1814                                                              1)) / base_period;
1815                         devpriv->divisor_b1 =
1816                             (labpc_ai_scan_period(cmd) + (base_period -
1817                                                           1)) / base_period;
1818                         break;
1819                 case TRIG_ROUND_DOWN:
1820                         devpriv->divisor_a0 =
1821                             labpc_ai_convert_period(cmd) / base_period;
1822                         devpriv->divisor_b1 =
1823                             labpc_ai_scan_period(cmd) / base_period;
1824                         break;
1825                 }
1826                 /*  make sure a0 and b1 values are acceptable */
1827                 if (devpriv->divisor_a0 < min_counter_value)
1828                         devpriv->divisor_a0 = min_counter_value;
1829                 if (devpriv->divisor_a0 > max_counter_value)
1830                         devpriv->divisor_a0 = max_counter_value;
1831                 if (devpriv->divisor_b1 < min_counter_value)
1832                         devpriv->divisor_b1 = min_counter_value;
1833                 if (devpriv->divisor_b1 > max_counter_value)
1834                         devpriv->divisor_b1 = max_counter_value;
1835                 /*  write corrected timings to command */
1836                 labpc_set_ai_convert_period(cmd,
1837                                             base_period * devpriv->divisor_a0);
1838                 labpc_set_ai_scan_period(cmd,
1839                                          base_period * devpriv->divisor_b1);
1840                 /*
1841                  * if only one TRIG_TIMER is used, we can employ the generic
1842                  * cascaded timing functions
1843                  */
1844         } else if (labpc_ai_scan_period(cmd)) {
1845                 unsigned int scan_period;
1846
1847                 scan_period = labpc_ai_scan_period(cmd);
1848                 /* calculate cascaded counter values that give desired scan timing */
1849                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1850                                                &(devpriv->divisor_b1),
1851                                                &(devpriv->divisor_b0),
1852                                                &scan_period,
1853                                                cmd->flags & TRIG_ROUND_MASK);
1854                 labpc_set_ai_scan_period(cmd, scan_period);
1855         } else if (labpc_ai_convert_period(cmd)) {
1856                 unsigned int convert_period;
1857
1858                 convert_period = labpc_ai_convert_period(cmd);
1859                 /* calculate cascaded counter values that give desired conversion timing */
1860                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1861                                                &(devpriv->divisor_a0),
1862                                                &(devpriv->divisor_b0),
1863                                                &convert_period,
1864                                                cmd->flags & TRIG_ROUND_MASK);
1865                 labpc_set_ai_convert_period(cmd, convert_period);
1866         }
1867 }
1868
1869 static int labpc_dio_mem_callback(int dir, int port, int data,
1870                                   unsigned long iobase)
1871 {
1872         if (dir) {
1873                 writeb(data, (void *)(iobase + port));
1874                 return 0;
1875         } else {
1876                 return readb((void *)(iobase + port));
1877         }
1878 }
1879
1880 /* lowlevel write to eeprom/dac */
1881 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1882                              unsigned int value_width)
1883 {
1884         int i;
1885
1886         for (i = 1; i <= value_width; i++) {
1887                 /*  clear serial clock */
1888                 devpriv->command5_bits &= ~SCLOCK_BIT;
1889                 /*  send bits most significant bit first */
1890                 if (value & (1 << (value_width - i)))
1891                         devpriv->command5_bits |= SDATA_BIT;
1892                 else
1893                         devpriv->command5_bits &= ~SDATA_BIT;
1894                 udelay(1);
1895                 devpriv->write_byte(devpriv->command5_bits,
1896                                     dev->iobase + COMMAND5_REG);
1897                 /*  set clock to load bit */
1898                 devpriv->command5_bits |= SCLOCK_BIT;
1899                 udelay(1);
1900                 devpriv->write_byte(devpriv->command5_bits,
1901                                     dev->iobase + COMMAND5_REG);
1902         }
1903 }
1904
1905 /* lowlevel read from eeprom */
1906 static unsigned int labpc_serial_in(struct comedi_device *dev)
1907 {
1908         unsigned int value = 0;
1909         int i;
1910         const int value_width = 8;      /*  number of bits wide values are */
1911
1912         for (i = 1; i <= value_width; i++) {
1913                 /*  set serial clock */
1914                 devpriv->command5_bits |= SCLOCK_BIT;
1915                 udelay(1);
1916                 devpriv->write_byte(devpriv->command5_bits,
1917                                     dev->iobase + COMMAND5_REG);
1918                 /*  clear clock bit */
1919                 devpriv->command5_bits &= ~SCLOCK_BIT;
1920                 udelay(1);
1921                 devpriv->write_byte(devpriv->command5_bits,
1922                                     dev->iobase + COMMAND5_REG);
1923                 /*  read bits most significant bit first */
1924                 udelay(1);
1925                 devpriv->status2_bits =
1926                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1927                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1928                         value |= 1 << (value_width - i);
1929         }
1930
1931         return value;
1932 }
1933
1934 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1935                                       unsigned int address)
1936 {
1937         unsigned int value;
1938         /*  bits to tell eeprom to expect a read */
1939         const int read_instruction = 0x3;
1940         /*  8 bit write lengths to eeprom */
1941         const int write_length = 8;
1942
1943         /*  enable read/write to eeprom */
1944         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1945         udelay(1);
1946         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1947         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1948         udelay(1);
1949         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1950
1951         /*  send read instruction */
1952         labpc_serial_out(dev, read_instruction, write_length);
1953         /*  send 8 bit address to read from */
1954         labpc_serial_out(dev, address, write_length);
1955         /*  read result */
1956         value = labpc_serial_in(dev);
1957
1958         /*  disable read/write to eeprom */
1959         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1960         udelay(1);
1961         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1962
1963         return value;
1964 }
1965
1966 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
1967                                        unsigned int address, unsigned int value)
1968 {
1969         const int write_enable_instruction = 0x6;
1970         const int write_instruction = 0x2;
1971         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1972         const int write_in_progress_bit = 0x1;
1973         const int timeout = 10000;
1974         int i;
1975
1976         /*  make sure there isn't already a write in progress */
1977         for (i = 0; i < timeout; i++) {
1978                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1979                     0)
1980                         break;
1981         }
1982         if (i == timeout) {
1983                 comedi_error(dev, "eeprom write timed out");
1984                 return -ETIME;
1985         }
1986         /*  update software copy of eeprom */
1987         devpriv->eeprom_data[address] = value;
1988
1989         /*  enable read/write to eeprom */
1990         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1991         udelay(1);
1992         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1993         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1994         udelay(1);
1995         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1996
1997         /*  send write_enable instruction */
1998         labpc_serial_out(dev, write_enable_instruction, write_length);
1999         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2000         udelay(1);
2001         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2002
2003         /*  send write instruction */
2004         devpriv->command5_bits |= EEPROM_EN_BIT;
2005         udelay(1);
2006         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2007         labpc_serial_out(dev, write_instruction, write_length);
2008         /*  send 8 bit address to write to */
2009         labpc_serial_out(dev, address, write_length);
2010         /*  write value */
2011         labpc_serial_out(dev, value, write_length);
2012         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2013         udelay(1);
2014         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2015
2016         /*  disable read/write to eeprom */
2017         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2018         udelay(1);
2019         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2020
2021         return 0;
2022 }
2023
2024 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2025 {
2026         unsigned int value;
2027         const int read_status_instruction = 0x5;
2028         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2029
2030         /*  enable read/write to eeprom */
2031         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2032         udelay(1);
2033         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2034         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2035         udelay(1);
2036         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2037
2038         /*  send read status instruction */
2039         labpc_serial_out(dev, read_status_instruction, write_length);
2040         /*  read result */
2041         value = labpc_serial_in(dev);
2042
2043         /*  disable read/write to eeprom */
2044         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2045         udelay(1);
2046         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2047
2048         return value;
2049 }
2050
2051 /* writes to 8 bit calibration dacs */
2052 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2053                          unsigned int value)
2054 {
2055         if (value == devpriv->caldac[channel])
2056                 return;
2057         devpriv->caldac[channel] = value;
2058
2059         /*  clear caldac load bit and make sure we don't write to eeprom */
2060         devpriv->command5_bits &=
2061             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2062         udelay(1);
2063         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2064
2065         /*  write 4 bit channel */
2066         labpc_serial_out(dev, channel, 4);
2067         /*  write 8 bit caldac value */
2068         labpc_serial_out(dev, value, 8);
2069
2070         /*  set and clear caldac bit to load caldac value */
2071         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2072         udelay(1);
2073         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2074         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2075         udelay(1);
2076         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2077 }
2078
2079 #ifdef CONFIG_COMEDI_PCI
2080 COMEDI_PCI_INITCLEANUP(driver_labpc, labpc_pci_table);
2081 #else
2082 COMEDI_INITCLEANUP(driver_labpc);
2083 #endif
2084
2085 EXPORT_SYMBOL_GPL(labpc_common_attach);
2086 EXPORT_SYMBOL_GPL(labpc_common_detach);
2087 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2088 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2089 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);