drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include <linux/slab.h>
  81 #include "../comedidev.h"
  82
  83 #include <linux/delay.h>
  84 #include <asm/dma.h>
  85
  86 #include "8253.h"
  87 #include "8255.h"
  88 #include "mite.h"
  89 #include "comedi_fc.h"
  90 #include "ni_labpc.h"
  91
  92 #define DRV_NAME "ni_labpc"
  93
  94 /* size of io region used by board */
  95 #define LABPC_SIZE           32
  96 /* 2 MHz master clock */
  97 #define LABPC_TIMER_BASE            500
  98
  99 /* Registers for the lab-pc+ */
 100
 101 /* write-only registers */
 102 #define COMMAND1_REG    0x0
 103 #define   ADC_GAIN_MASK (0x7 << 4)
 104 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 105 /* enables multi channel scans */
 106 #define   ADC_SCAN_EN_BIT       0x80
 107 #define COMMAND2_REG    0x1
 108 /* enable pretriggering (used in conjunction with SWTRIG) */
 109 #define   PRETRIG_BIT   0x1
 110 /* enable paced conversions on external trigger */
 111 #define   HWTRIG_BIT    0x2
 112 /* enable paced conversions */
 113 #define   SWTRIG_BIT    0x4
 114 /* use two cascaded counters for pacing */
 115 #define   CASCADE_BIT   0x8
 116 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 117 #define COMMAND3_REG    0x2
 118 /* enable dma transfers */
 119 #define   DMA_EN_BIT    0x1
 120 /* enable interrupts for 8255 */
 121 #define   DIO_INTR_EN_BIT       0x2
 122 /* enable dma terminal count interrupt */
 123 #define   DMATC_INTR_EN_BIT     0x4
 124 /* enable timer interrupt */
 125 #define   TIMER_INTR_EN_BIT     0x8
 126 /* enable error interrupt */
 127 #define   ERR_INTR_EN_BIT       0x10
 128 /* enable fifo not empty interrupt */
 129 #define   ADC_FNE_INTR_EN_BIT   0x20
 130 #define ADC_CONVERT_REG 0x3
 131 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 132 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 133 #define ADC_CLEAR_REG   0x8
 134 #define DMATC_CLEAR_REG 0xa
 135 #define TIMER_CLEAR_REG 0xc
 136 /* 1200 boards only */
 137 #define COMMAND6_REG    0xe
 138 /* select ground or common-mode reference */
 139 #define   ADC_COMMON_BIT        0x1
 140 /*  adc unipolar */
 141 #define   ADC_UNIP_BIT  0x2
 142 /*  dac unipolar */
 143 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 144 /* enable fifo half full interrupt */
 145 #define   ADC_FHF_INTR_EN_BIT   0x20
 146 /* enable interrupt on end of hardware count */
 147 #define   A1_INTR_EN_BIT        0x40
 148 /* scan up from channel zero instead of down to zero */
 149 #define   ADC_SCAN_UP_BIT 0x80
 150 #define COMMAND4_REG    0xf
 151 /* enables 'interval' scanning */
 152 #define   INTERVAL_SCAN_EN_BIT  0x1
 153 /* enables external signal on counter b1 output to trigger scan */
 154 #define   EXT_SCAN_EN_BIT       0x2
 155 /* chooses direction (output or input) for EXTCONV* line */
 156 #define   EXT_CONVERT_OUT_BIT   0x4
 157 /* chooses differential inputs for adc (in conjunction with board jumper) */
 158 #define   ADC_DIFF_BIT  0x8
 159 #define   EXT_CONVERT_DISABLE_BIT       0x10
 160 /* 1200 boards only, calibration stuff */
 161 #define COMMAND5_REG    0x1c
 162 /* enable eeprom for write */
 163 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 164 /* enable dithering */
 165 #define   DITHER_EN_BIT 0x8
 166 /* load calibration dac */
 167 #define   CALDAC_LOAD_BIT       0x10
 168 /* serial clock - rising edge writes, falling edge reads */
 169 #define   SCLOCK_BIT    0x20
 170 /* serial data bit for writing to eeprom or calibration dacs */
 171 #define   SDATA_BIT     0x40
 172 /* enable eeprom for read/write */
 173 #define   EEPROM_EN_BIT 0x80
 174 #define INTERVAL_COUNT_REG      0x1e
 175 #define INTERVAL_LOAD_REG       0x1f
 176 #define   INTERVAL_LOAD_BITS    0x1
 177
 178 /* read-only registers */
 179 #define STATUS1_REG     0x0
 180 /* data is available in fifo */
 181 #define   DATA_AVAIL_BIT        0x1
 182 /* overrun has occurred */
 183 #define   OVERRUN_BIT   0x2
 184 /* fifo overflow */
 185 #define   OVERFLOW_BIT  0x4
 186 /* timer interrupt has occured */
 187 #define   TIMER_BIT     0x8
 188 /* dma terminal count has occured */
 189 #define   DMATC_BIT     0x10
 190 /* external trigger has occured */
 191 #define   EXT_TRIG_BIT  0x40
 192 /* 1200 boards only */
 193 #define STATUS2_REG     0x1d
 194 /* programmable eeprom serial output */
 195 #define   EEPROM_OUT_BIT        0x1
 196 /* counter A1 terminal count */
 197 #define   A1_TC_BIT     0x2
 198 /* fifo not half full */
 199 #define   FNHF_BIT      0x4
 200 #define ADC_FIFO_REG    0xa
 201
 202 #define DIO_BASE_REG    0x10
 203 #define COUNTER_A_BASE_REG      0x14
 204 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 205 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 206 #define   INIT_A0_BITS  0x14
 207 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 208 #define   INIT_A1_BITS  0x70
 209 #define COUNTER_B_BASE_REG      0x18
 210
 211 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 212 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 213 static irqreturn_t labpc_interrupt(int irq, void *d);
 214 static int labpc_drain_fifo(struct comedi_device *dev);
 215 static void labpc_drain_dma(struct comedi_device *dev);
 216 static void handle_isa_dma(struct comedi_device *dev);
 217 static void labpc_drain_dregs(struct comedi_device *dev);
 218 static int labpc_ai_cmdtest(struct comedi_device *dev,
 219                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 220 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 221 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 222                           struct comedi_insn *insn, unsigned int *data);
 223 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 224                           struct comedi_insn *insn, unsigned int *data);
 225 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 226                           struct comedi_insn *insn, unsigned int *data);
 227 static int labpc_calib_read_insn(struct comedi_device *dev,
 228                                  struct comedi_subdevice *s,
 229                                  struct comedi_insn *insn, unsigned int *data);
 230 static int labpc_calib_write_insn(struct comedi_device *dev,
 231                                   struct comedi_subdevice *s,
 232                                   struct comedi_insn *insn, unsigned int *data);
 233 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 234                                   struct comedi_subdevice *s,
 235                                   struct comedi_insn *insn, unsigned int *data);
 236 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 237                                    struct comedi_subdevice *s,
 238                                    struct comedi_insn *insn,
 239                                    unsigned int *data);
 240 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 241 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 242 #ifdef CONFIG_COMEDI_PCI
 243 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 244 #endif
 245 static int labpc_dio_mem_callback(int dir, int port, int data,
 246                                   unsigned long arg);
 247 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 248                              unsigned int num_bits);
 249 static unsigned int labpc_serial_in(struct comedi_device *dev);
 250 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 251                                       unsigned int address);
 252 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 253 static int labpc_eeprom_write(struct comedi_device *dev,
 254                                        unsigned int address,
 255                                        unsigned int value);
 256 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 257                          unsigned int value);
 258
 259 enum scan_mode {
 260         MODE_SINGLE_CHAN,
 261         MODE_SINGLE_CHAN_INTERVAL,
 262         MODE_MULT_CHAN_UP,
 263         MODE_MULT_CHAN_DOWN,
 264 };
 265
 266 /* analog input ranges */
 267 #define NUM_LABPC_PLUS_AI_RANGES 16
 268 /* indicates unipolar ranges */
 269 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 270         0,
 271         0,
 272         0,
 273         0,
 274         0,
 275         0,
 276         0,
 277         0,
 278         1,
 279         1,
 280         1,
 281         1,
 282         1,
 283         1,
 284         1,
 285         1,
 286 };
 287
 288 /* map range index to gain bits */
 289 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 290         0x00,
 291         0x10,
 292         0x20,
 293         0x30,
 294         0x40,
 295         0x50,
 296         0x60,
 297         0x70,
 298         0x00,
 299         0x10,
 300         0x20,
 301         0x30,
 302         0x40,
 303         0x50,
 304         0x60,
 305         0x70,
 306 };
 307
 308 static const struct comedi_lrange range_labpc_plus_ai = {
 309         NUM_LABPC_PLUS_AI_RANGES,
 310         {
 311          BIP_RANGE(5),
 312          BIP_RANGE(4),
 313          BIP_RANGE(2.5),
 314          BIP_RANGE(1),
 315          BIP_RANGE(0.5),
 316          BIP_RANGE(0.25),
 317          BIP_RANGE(0.1),
 318          BIP_RANGE(0.05),
 319          UNI_RANGE(10),
 320          UNI_RANGE(8),
 321          UNI_RANGE(5),
 322          UNI_RANGE(2),
 323          UNI_RANGE(1),
 324          UNI_RANGE(0.5),
 325          UNI_RANGE(0.2),
 326          UNI_RANGE(0.1),
 327          }
 328 };
 329
 330 #define NUM_LABPC_1200_AI_RANGES 14
 331 /* indicates unipolar ranges */
 332 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 333         0,
 334         0,
 335         0,
 336         0,
 337         0,
 338         0,
 339         0,
 340         1,
 341         1,
 342         1,
 343         1,
 344         1,
 345         1,
 346         1,
 347 };
 348 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
 349
 350 /* map range index to gain bits */
 351 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 352         0x00,
 353         0x20,
 354         0x30,
 355         0x40,
 356         0x50,
 357         0x60,
 358         0x70,
 359         0x00,
 360         0x20,
 361         0x30,
 362         0x40,
 363         0x50,
 364         0x60,
 365         0x70,
 366 };
 367 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 368
 369 const struct comedi_lrange range_labpc_1200_ai = {
 370         NUM_LABPC_1200_AI_RANGES,
 371         {
 372          BIP_RANGE(5),
 373          BIP_RANGE(2.5),
 374          BIP_RANGE(1),
 375          BIP_RANGE(0.5),
 376          BIP_RANGE(0.25),
 377          BIP_RANGE(0.1),
 378          BIP_RANGE(0.05),
 379          UNI_RANGE(10),
 380          UNI_RANGE(5),
 381          UNI_RANGE(2),
 382          UNI_RANGE(1),
 383          UNI_RANGE(0.5),
 384          UNI_RANGE(0.2),
 385          UNI_RANGE(0.1),
 386          }
 387 };
 388 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 389
 390 /* analog output ranges */
 391 #define AO_RANGE_IS_UNIPOLAR 0x1
 392 static const struct comedi_lrange range_labpc_ao = {
 393         2,
 394         {
 395          BIP_RANGE(5),
 396          UNI_RANGE(10),
 397          }
 398 };
 399
 400 /* functions that do inb/outb and readb/writeb so we can use
 401  * function pointers to decide which to use */
 402 static inline unsigned int labpc_inb(unsigned long address)
 403 {
 404         return inb(address);
 405 }
 406
 407 static inline void labpc_outb(unsigned int byte, unsigned long address)
 408 {
 409         outb(byte, address);
 410 }
 411
 412 static inline unsigned int labpc_readb(unsigned long address)
 413 {
 414         return readb((void *)address);
 415 }
 416
 417 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 418 {
 419         writeb(byte, (void *)address);
 420 }
 421
 422 static const struct labpc_board_struct labpc_boards[] = {
 423         {
 424          .name = "lab-pc-1200",
 425          .ai_speed = 10000,
 426          .bustype = isa_bustype,
 427          .register_layout = labpc_1200_layout,
 428          .has_ao = 1,
 429          .ai_range_table = &range_labpc_1200_ai,
 430          .ai_range_code = labpc_1200_ai_gain_bits,
 431          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 432          .ai_scan_up = 1,
 433          .memory_mapped_io = 0,
 434          },
 435         {
 436          .name = "lab-pc-1200ai",
 437          .ai_speed = 10000,
 438          .bustype = isa_bustype,
 439          .register_layout = labpc_1200_layout,
 440          .has_ao = 0,
 441          .ai_range_table = &range_labpc_1200_ai,
 442          .ai_range_code = labpc_1200_ai_gain_bits,
 443          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 444          .ai_scan_up = 1,
 445          .memory_mapped_io = 0,
 446          },
 447         {
 448          .name = "lab-pc+",
 449          .ai_speed = 12000,
 450          .bustype = isa_bustype,
 451          .register_layout = labpc_plus_layout,
 452          .has_ao = 1,
 453          .ai_range_table = &range_labpc_plus_ai,
 454          .ai_range_code = labpc_plus_ai_gain_bits,
 455          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 456          .ai_scan_up = 0,
 457          .memory_mapped_io = 0,
 458          },
 459 #ifdef CONFIG_COMEDI_PCI
 460         {
 461          .name = "pci-1200",
 462          .device_id = 0x161,
 463          .ai_speed = 10000,
 464          .bustype = pci_bustype,
 465          .register_layout = labpc_1200_layout,
 466          .has_ao = 1,
 467          .ai_range_table = &range_labpc_1200_ai,
 468          .ai_range_code = labpc_1200_ai_gain_bits,
 469          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 470          .ai_scan_up = 1,
 471          .memory_mapped_io = 1,
 472          },
 473 /* dummy entry so pci board works when comedi_config is passed driver name */
 474         {
 475          .name = DRV_NAME,
 476          .bustype = pci_bustype,
 477          },
 478 #endif
 479 };
 480
 481 /*
 482  * Useful for shorthand access to the particular board structure
 483  */
 484 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 485
 486 /* size in bytes of dma buffer */
 487 static const int dma_buffer_size = 0xff00;
 488 /* 2 bytes per sample */
 489 static const int sample_size = 2;
 490
 491 #define devpriv ((struct labpc_private *)dev->private)
 492
 493 static struct comedi_driver driver_labpc = {
 494         .driver_name = DRV_NAME,
 495         .module = THIS_MODULE,
 496         .attach = labpc_attach,
 497         .detach = labpc_common_detach,
 498         .num_names = ARRAY_SIZE(labpc_boards),
 499         .board_name = &labpc_boards[0].name,
 500         .offset = sizeof(struct labpc_board_struct),
 501 };
 502
 503 #ifdef CONFIG_COMEDI_PCI
 504 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 505         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
 506         {0}
 507 };
 508
 509 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 510 #endif /* CONFIG_COMEDI_PCI */
 511
 512 static inline int labpc_counter_load(struct comedi_device *dev,
 513                                      unsigned long base_address,
 514                                      unsigned int counter_number,
 515                                      unsigned int count, unsigned int mode)
 516 {
 517         if (thisboard->memory_mapped_io)
 518                 return i8254_mm_load((void *)base_address, 0, counter_number,
 519                                      count, mode);
 520         else
 521                 return i8254_load(base_address, 0, counter_number, count, mode);
 522 }
 523
 524 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 525                         unsigned int irq, unsigned int dma_chan)
 526 {
 527         struct comedi_subdevice *s;
 528         int i;
 529         unsigned long dma_flags, isr_flags;
 530         short lsb, msb;
 531
 532         printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
 533                                                                 thisboard->name,
 534                iobase);
 535         if (irq)
 536                 printk(", irq %u", irq);
 537         if (dma_chan)
 538                 printk(", dma %u", dma_chan);
 539         printk("\n");
 540
 541         if (iobase == 0) {
 542                 printk(KERN_ERR "io base address is zero!\n");
 543                 return -EINVAL;
 544         }
 545         /*  request io regions for isa boards */
 546         if (thisboard->bustype == isa_bustype) {
 547                 /* check if io addresses are available */
 548                 if (!request_region(iobase, LABPC_SIZE,
 549                                     driver_labpc.driver_name)) {
 550                         printk(KERN_ERR "I/O port conflict\n");
 551                         return -EIO;
 552                 }
 553         }
 554         dev->iobase = iobase;
 555
 556         if (thisboard->memory_mapped_io) {
 557                 devpriv->read_byte = labpc_readb;
 558                 devpriv->write_byte = labpc_writeb;
 559         } else {
 560                 devpriv->read_byte = labpc_inb;
 561                 devpriv->write_byte = labpc_outb;
 562         }
 563         /* initialize board's command registers */
 564         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 565         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 566         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 567         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 568         if (thisboard->register_layout == labpc_1200_layout) {
 569                 devpriv->write_byte(devpriv->command5_bits,
 570                                     dev->iobase + COMMAND5_REG);
 571                 devpriv->write_byte(devpriv->command6_bits,
 572                                     dev->iobase + COMMAND6_REG);
 573         }
 574
 575         /* grab our IRQ */
 576         if (irq) {
 577                 isr_flags = 0;
 578                 if (thisboard->bustype == pci_bustype)
 579                         isr_flags |= IRQF_SHARED;
 580                 if (request_irq(irq, labpc_interrupt, isr_flags,
 581                                 driver_labpc.driver_name, dev)) {
 582                         printk(KERN_ERR "unable to allocate irq %u\n", irq);
 583                         return -EINVAL;
 584                 }
 585         }
 586         dev->irq = irq;
 587
 588         /* grab dma channel */
 589         if (dma_chan > 3) {
 590                 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
 591                 return -EINVAL;
 592         } else if (dma_chan) {
 593                 /* allocate dma buffer */
 594                 devpriv->dma_buffer =
 595                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 596                 if (devpriv->dma_buffer == NULL) {
 597                         printk(KERN_ERR " failed to allocate dma buffer\n");
 598                         return -ENOMEM;
 599                 }
 600                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 601                         printk(KERN_ERR " failed to allocate dma channel %u\n",
 602                                dma_chan);
 603                         return -EINVAL;
 604                 }
 605                 devpriv->dma_chan = dma_chan;
 606                 dma_flags = claim_dma_lock();
 607                 disable_dma(devpriv->dma_chan);
 608                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 609                 release_dma_lock(dma_flags);
 610         }
 611
 612         dev->board_name = thisboard->name;
 613
 614         if (alloc_subdevices(dev, 5) < 0)
 615                 return -ENOMEM;
 616
 617         /* analog input subdevice */
 618         s = dev->subdevices + 0;
 619         dev->read_subdev = s;
 620         s->type = COMEDI_SUBD_AI;
 621         s->subdev_flags =
 622             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 623         s->n_chan = 8;
 624         s->len_chanlist = 8;
 625         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
 626         s->range_table = thisboard->ai_range_table;
 627         s->do_cmd = labpc_ai_cmd;
 628         s->do_cmdtest = labpc_ai_cmdtest;
 629         s->insn_read = labpc_ai_rinsn;
 630         s->cancel = labpc_cancel;
 631
 632         /* analog output */
 633         s = dev->subdevices + 1;
 634         if (thisboard->has_ao) {
 635                 /*
 636                  * Could provide command support, except it only has a
 637                  * one sample hardware buffer for analog output and no
 638                  * underrun flag.
 639                  */
 640                 s->type = COMEDI_SUBD_AO;
 641                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 642                 s->n_chan = NUM_AO_CHAN;
 643                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 644                 s->range_table = &range_labpc_ao;
 645                 s->insn_read = labpc_ao_rinsn;
 646                 s->insn_write = labpc_ao_winsn;
 647                 /* initialize analog outputs to a known value */
 648                 for (i = 0; i < s->n_chan; i++) {
 649                         devpriv->ao_value[i] = s->maxdata / 2;
 650                         lsb = devpriv->ao_value[i] & 0xff;
 651                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 652                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 653                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 654                 }
 655         } else {
 656                 s->type = COMEDI_SUBD_UNUSED;
 657         }
 658
 659         /* 8255 dio */
 660         s = dev->subdevices + 2;
 661         /*  if board uses io memory we have to give a custom callback
 662          * function to the 8255 driver */
 663         if (thisboard->memory_mapped_io)
 664                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 665                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 666         else
 667                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 668
 669         /*  calibration subdevices for boards that have one */
 670         s = dev->subdevices + 3;
 671         if (thisboard->register_layout == labpc_1200_layout) {
 672                 s->type = COMEDI_SUBD_CALIB;
 673                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 674                 s->n_chan = 16;
 675                 s->maxdata = 0xff;
 676                 s->insn_read = labpc_calib_read_insn;
 677                 s->insn_write = labpc_calib_write_insn;
 678
 679                 for (i = 0; i < s->n_chan; i++)
 680                         write_caldac(dev, i, s->maxdata / 2);
 681         } else
 682                 s->type = COMEDI_SUBD_UNUSED;
 683
 684         /* EEPROM */
 685         s = dev->subdevices + 4;
 686         if (thisboard->register_layout == labpc_1200_layout) {
 687                 s->type = COMEDI_SUBD_MEMORY;
 688                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 689                 s->n_chan = EEPROM_SIZE;
 690                 s->maxdata = 0xff;
 691                 s->insn_read = labpc_eeprom_read_insn;
 692                 s->insn_write = labpc_eeprom_write_insn;
 693
 694                 for (i = 0; i < EEPROM_SIZE; i++)
 695                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 696 #ifdef LABPC_DEBUG
 697                 printk(KERN_ERR " eeprom:");
 698                 for (i = 0; i < EEPROM_SIZE; i++)
 699                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 700                 printk("\n");
 701 #endif
 702         } else
 703                 s->type = COMEDI_SUBD_UNUSED;
 704
 705         return 0;
 706 }
 707 EXPORT_SYMBOL_GPL(labpc_common_attach);
 708
 709 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 710 {
 711         unsigned long iobase = 0;
 712         unsigned int irq = 0;
 713         unsigned int dma_chan = 0;
 714 #ifdef CONFIG_COMEDI_PCI
 715         int retval;
 716 #endif
 717
 718         /* allocate and initialize dev->private */
 719         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 720                 return -ENOMEM;
 721
 722         /* get base address, irq etc. based on bustype */
 723         switch (thisboard->bustype) {
 724         case isa_bustype:
 725                 iobase = it->options[0];
 726                 irq = it->options[1];
 727                 dma_chan = it->options[2];
 728                 break;
 729         case pci_bustype:
 730 #ifdef CONFIG_COMEDI_PCI
 731                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 732                 if (retval < 0)
 733                         return retval;
 734                 retval = mite_setup(devpriv->mite);
 735                 if (retval < 0)
 736                         return retval;
 737                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 738                 irq = mite_irq(devpriv->mite);
 739 #else
 740                 printk(KERN_ERR " this driver has not been built with PCI "
 741                                                                 "support.\n");
 742                 return -EINVAL;
 743 #endif
 744                 break;
 745         case pcmcia_bustype:
 746                 printk
 747                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 748                 return -EINVAL;
 749                 break;
 750         default:
 751                 printk(KERN_ERR "bug! couldn't determine board type\n");
 752                 return -EINVAL;
 753                 break;
 754         }
 755
 756         return labpc_common_attach(dev, iobase, irq, dma_chan);
 757 }
 758
 759 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 760 #ifdef CONFIG_COMEDI_PCI
 761 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 762 {
 763         struct mite_struct *mite;
 764         int i;
 765         for (mite = mite_devices; mite; mite = mite->next) {
 766                 if (mite->used)
 767                         continue;
 768 /* if bus/slot are specified then make sure we have the right bus/slot */
 769                 if (bus || slot) {
 770                         if (bus != mite->pcidev->bus->number
 771                             || slot != PCI_SLOT(mite->pcidev->devfn))
 772                                 continue;
 773                 }
 774                 for (i = 0; i < driver_labpc.num_names; i++) {
 775                         if (labpc_boards[i].bustype != pci_bustype)
 776                                 continue;
 777                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 778                                 devpriv->mite = mite;
 779 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 780                                 dev->board_ptr = &labpc_boards[i];
 781                                 return 0;
 782                         }
 783                 }
 784         }
 785         printk(KERN_ERR "no device found\n");
 786         mite_list_devices();
 787         return -EIO;
 788 }
 789 #endif
 790
 791 int labpc_common_detach(struct comedi_device *dev)
 792 {
 793         printk(KERN_ERR "comedi%d: ni_labpc: detach\n", dev->minor);
 794
 795         if (dev->subdevices)
 796                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 797
 798         /* only free stuff if it has been allocated by _attach */
 799         if (devpriv->dma_buffer)
 800                 kfree(devpriv->dma_buffer);
 801         if (devpriv->dma_chan)
 802                 free_dma(devpriv->dma_chan);
 803         if (dev->irq)
 804                 free_irq(dev->irq, dev);
 805         if (thisboard->bustype == isa_bustype && dev->iobase)
 806                 release_region(dev->iobase, LABPC_SIZE);
 807 #ifdef CONFIG_COMEDI_PCI
 808         if (devpriv->mite)
 809                 mite_unsetup(devpriv->mite);
 810 #endif
 811
 812         return 0;
 813 };
 814 EXPORT_SYMBOL_GPL(labpc_common_detach);
 815
 816 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 817 {
 818         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 819         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 820         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 821 }
 822
 823 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 824 {
 825         unsigned long flags;
 826
 827         spin_lock_irqsave(&dev->spinlock, flags);
 828         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 829         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 830         spin_unlock_irqrestore(&dev->spinlock, flags);
 831
 832         devpriv->command3_bits = 0;
 833         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 834
 835         return 0;
 836 }
 837
 838 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 839 {
 840         if (cmd->chanlist_len == 1)
 841                 return MODE_SINGLE_CHAN;
 842
 843         /* chanlist may be NULL during cmdtest. */
 844         if (cmd->chanlist == NULL)
 845                 return MODE_MULT_CHAN_UP;
 846
 847         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 848                 return MODE_SINGLE_CHAN_INTERVAL;
 849
 850         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 851                 return MODE_MULT_CHAN_UP;
 852
 853         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 854                 return MODE_MULT_CHAN_DOWN;
 855
 856         printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
 857
 858         return 0;
 859 }
 860
 861 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 862                                      const struct comedi_cmd *cmd)
 863 {
 864         int mode, channel, range, aref, i;
 865
 866         if (cmd->chanlist == NULL)
 867                 return 0;
 868
 869         mode = labpc_ai_scan_mode(cmd);
 870
 871         if (mode == MODE_SINGLE_CHAN)
 872                 return 0;
 873
 874         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 875                 if (cmd->chanlist_len > 0xff) {
 876                         comedi_error(dev,
 877                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 878                         return 1;
 879                 }
 880         }
 881
 882         channel = CR_CHAN(cmd->chanlist[0]);
 883         range = CR_RANGE(cmd->chanlist[0]);
 884         aref = CR_AREF(cmd->chanlist[0]);
 885
 886         for (i = 0; i < cmd->chanlist_len; i++) {
 887
 888                 switch (mode) {
 889                 case MODE_SINGLE_CHAN_INTERVAL:
 890                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 891                                 comedi_error(dev,
 892                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 893                                 return 1;
 894                         }
 895                         break;
 896                 case MODE_MULT_CHAN_UP:
 897                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 898                                 comedi_error(dev,
 899                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 900                                 return 1;
 901                         }
 902                         break;
 903                 case MODE_MULT_CHAN_DOWN:
 904                         if (CR_CHAN(cmd->chanlist[i]) !=
 905                             cmd->chanlist_len - i - 1) {
 906                                 comedi_error(dev,
 907                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 908                                 return 1;
 909                         }
 910                         break;
 911                 default:
 912                         printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
 913                         return 1;
 914                         break;
 915                 }
 916
 917                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 918                         comedi_error(dev,
 919                                      "entries in chanlist must all have the same range\n");
 920                         return 1;
 921                 }
 922
 923                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 924                         comedi_error(dev,
 925                                      "entries in chanlist must all have the same reference\n");
 926                         return 1;
 927                 }
 928         }
 929
 930         return 0;
 931 }
 932
 933 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 934 {
 935         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 936                 return 1;
 937
 938         if (cmd->scan_begin_src == TRIG_FOLLOW)
 939                 return 1;
 940
 941         return 0;
 942 }
 943
 944 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 945 {
 946         if (cmd->convert_src != TRIG_TIMER)
 947                 return 0;
 948
 949         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 950             cmd->scan_begin_src == TRIG_TIMER)
 951                 return cmd->scan_begin_arg;
 952
 953         return cmd->convert_arg;
 954 }
 955
 956 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 957 {
 958         if (cmd->convert_src != TRIG_TIMER)
 959                 return;
 960
 961         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 962             cmd->scan_begin_src == TRIG_TIMER) {
 963                 cmd->scan_begin_arg = ns;
 964                 if (cmd->convert_arg > cmd->scan_begin_arg)
 965                         cmd->convert_arg = cmd->scan_begin_arg;
 966         } else
 967                 cmd->convert_arg = ns;
 968 }
 969
 970 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 971 {
 972         if (cmd->scan_begin_src != TRIG_TIMER)
 973                 return 0;
 974
 975         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 976             cmd->convert_src == TRIG_TIMER)
 977                 return 0;
 978
 979         return cmd->scan_begin_arg;
 980 }
 981
 982 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 983 {
 984         if (cmd->scan_begin_src != TRIG_TIMER)
 985                 return;
 986
 987         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 988             cmd->convert_src == TRIG_TIMER)
 989                 return;
 990
 991         cmd->scan_begin_arg = ns;
 992 }
 993
 994 static int labpc_ai_cmdtest(struct comedi_device *dev,
 995                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 996 {
 997         int err = 0;
 998         int tmp, tmp2;
 999         int stop_mask;
1000
1001         /* step 1: make sure trigger sources are trivially valid */
1002
1003         tmp = cmd->start_src;
1004         cmd->start_src &= TRIG_NOW | TRIG_EXT;
1005         if (!cmd->start_src || tmp != cmd->start_src)
1006                 err++;
1007
1008         tmp = cmd->scan_begin_src;
1009         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1010         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1011                 err++;
1012
1013         tmp = cmd->convert_src;
1014         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1015         if (!cmd->convert_src || tmp != cmd->convert_src)
1016                 err++;
1017
1018         tmp = cmd->scan_end_src;
1019         cmd->scan_end_src &= TRIG_COUNT;
1020         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1021                 err++;
1022
1023         tmp = cmd->stop_src;
1024         stop_mask = TRIG_COUNT | TRIG_NONE;
1025         if (thisboard->register_layout == labpc_1200_layout)
1026                 stop_mask |= TRIG_EXT;
1027         cmd->stop_src &= stop_mask;
1028         if (!cmd->stop_src || tmp != cmd->stop_src)
1029                 err++;
1030
1031         if (err)
1032                 return 1;
1033
1034         /* step 2: make sure trigger sources are unique and mutually compatible */
1035
1036         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1037                 err++;
1038         if (cmd->scan_begin_src != TRIG_TIMER &&
1039             cmd->scan_begin_src != TRIG_FOLLOW &&
1040             cmd->scan_begin_src != TRIG_EXT)
1041                 err++;
1042         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1043                 err++;
1044         if (cmd->stop_src != TRIG_COUNT &&
1045             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1046                 err++;
1047
1048         /* can't have external stop and start triggers at once */
1049         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1050                 err++;
1051
1052         if (err)
1053                 return 2;
1054
1055         /* step 3: make sure arguments are trivially compatible */
1056
1057         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1058                 cmd->start_arg = 0;
1059                 err++;
1060         }
1061
1062         if (!cmd->chanlist_len)
1063                 err++;
1064
1065         if (cmd->scan_end_arg != cmd->chanlist_len) {
1066                 cmd->scan_end_arg = cmd->chanlist_len;
1067                 err++;
1068         }
1069
1070         if (cmd->convert_src == TRIG_TIMER) {
1071                 if (cmd->convert_arg < thisboard->ai_speed) {
1072                         cmd->convert_arg = thisboard->ai_speed;
1073                         err++;
1074                 }
1075         }
1076         /* make sure scan timing is not too fast */
1077         if (cmd->scan_begin_src == TRIG_TIMER) {
1078                 if (cmd->convert_src == TRIG_TIMER &&
1079                     cmd->scan_begin_arg <
1080                     cmd->convert_arg * cmd->chanlist_len) {
1081                         cmd->scan_begin_arg =
1082                             cmd->convert_arg * cmd->chanlist_len;
1083                         err++;
1084                 }
1085                 if (cmd->scan_begin_arg <
1086                     thisboard->ai_speed * cmd->chanlist_len) {
1087                         cmd->scan_begin_arg =
1088                             thisboard->ai_speed * cmd->chanlist_len;
1089                         err++;
1090                 }
1091         }
1092         /* stop source */
1093         switch (cmd->stop_src) {
1094         case TRIG_COUNT:
1095                 if (!cmd->stop_arg) {
1096                         cmd->stop_arg = 1;
1097                         err++;
1098                 }
1099                 break;
1100         case TRIG_NONE:
1101                 if (cmd->stop_arg != 0) {
1102                         cmd->stop_arg = 0;
1103                         err++;
1104                 }
1105                 break;
1106                 /*
1107                  * TRIG_EXT doesn't care since it doesn't
1108                  * trigger off a numbered channel
1109                  */
1110         default:
1111                 break;
1112         }
1113
1114         if (err)
1115                 return 3;
1116
1117         /* step 4: fix up any arguments */
1118
1119         tmp = cmd->convert_arg;
1120         tmp2 = cmd->scan_begin_arg;
1121         labpc_adc_timing(dev, cmd);
1122         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1123                 err++;
1124
1125         if (err)
1126                 return 4;
1127
1128         if (labpc_ai_chanlist_invalid(dev, cmd))
1129                 return 5;
1130
1131         return 0;
1132 }
1133
1134 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1135 {
1136         int channel, range, aref;
1137         unsigned long irq_flags;
1138         int ret;
1139         struct comedi_async *async = s->async;
1140         struct comedi_cmd *cmd = &async->cmd;
1141         enum transfer_type xfer;
1142         unsigned long flags;
1143
1144         if (!dev->irq) {
1145                 comedi_error(dev, "no irq assigned, cannot perform command");
1146                 return -1;
1147         }
1148
1149         range = CR_RANGE(cmd->chanlist[0]);
1150         aref = CR_AREF(cmd->chanlist[0]);
1151
1152         /* make sure board is disabled before setting up aquisition */
1153         spin_lock_irqsave(&dev->spinlock, flags);
1154         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1155         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1156         spin_unlock_irqrestore(&dev->spinlock, flags);
1157
1158         devpriv->command3_bits = 0;
1159         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1160
1161         /*  initialize software conversion count */
1162         if (cmd->stop_src == TRIG_COUNT)
1163                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1164
1165         /*  setup hardware conversion counter */
1166         if (cmd->stop_src == TRIG_EXT) {
1167                 /*
1168                  * load counter a1 with count of 3
1169                  * (pc+ manual says this is minimum allowed) using mode 0
1170                  */
1171                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1172                                          1, 3, 0);
1173                 if (ret < 0) {
1174                         comedi_error(dev, "error loading counter a1");
1175                         return -1;
1176                 }
1177         } else                  /*
1178                                  * otherwise, just put a1 in mode 0
1179                                  * with no count to set its output low
1180                                  */
1181                 devpriv->write_byte(INIT_A1_BITS,
1182                                     dev->iobase + COUNTER_A_CONTROL_REG);
1183
1184         /*  figure out what method we will use to transfer data */
1185         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1186                 /*
1187                  * dma unsafe at RT priority,
1188                  * and too much setup time for TRIG_WAKE_EOS for
1189                  */
1190             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1191             /*  only available on the isa boards */
1192             thisboard->bustype == isa_bustype) {
1193                 xfer = isa_dma_transfer;
1194                 /* pc-plus has no fifo-half full interrupt */
1195         } else if (thisboard->register_layout == labpc_1200_layout &&
1196                    /*  wake-end-of-scan should interrupt on fifo not empty */
1197                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1198                    /*  make sure we are taking more than just a few points */
1199                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1200                 xfer = fifo_half_full_transfer;
1201         } else
1202                 xfer = fifo_not_empty_transfer;
1203         devpriv->current_transfer = xfer;
1204
1205         /*  setup command6 register for 1200 boards */
1206         if (thisboard->register_layout == labpc_1200_layout) {
1207                 /*  reference inputs to ground or common? */
1208                 if (aref != AREF_GROUND)
1209                         devpriv->command6_bits |= ADC_COMMON_BIT;
1210                 else
1211                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1212                 /*  bipolar or unipolar range? */
1213                 if (thisboard->ai_range_is_unipolar[range])
1214                         devpriv->command6_bits |= ADC_UNIP_BIT;
1215                 else
1216                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1217                 /*  interrupt on fifo half full? */
1218                 if (xfer == fifo_half_full_transfer)
1219                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1220                 else
1221                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1222                 /*  enable interrupt on counter a1 terminal count? */
1223                 if (cmd->stop_src == TRIG_EXT)
1224                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1225                 else
1226                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1227                 /*  are we scanning up or down through channels? */
1228                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1229                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1230                 else
1231                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1232                 /*  write to register */
1233                 devpriv->write_byte(devpriv->command6_bits,
1234                                     dev->iobase + COMMAND6_REG);
1235         }
1236
1237         /* setup channel list, etc (command1 register) */
1238         devpriv->command1_bits = 0;
1239         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1240                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1241         else
1242                 channel = CR_CHAN(cmd->chanlist[0]);
1243         /* munge channel bits for differential / scan disabled mode */
1244         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1245                 channel *= 2;
1246         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1247         devpriv->command1_bits |= thisboard->ai_range_code[range];
1248         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1249         /* manual says to set scan enable bit on second pass */
1250         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1251             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1252                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1253                 /* need a brief delay before enabling scan, or scan
1254                  * list will get screwed when you switch
1255                  * between scan up to scan down mode - dunno why */
1256                 udelay(1);
1257                 devpriv->write_byte(devpriv->command1_bits,
1258                                     dev->iobase + COMMAND1_REG);
1259         }
1260         /*  setup any external triggering/pacing (command4 register) */
1261         devpriv->command4_bits = 0;
1262         if (cmd->convert_src != TRIG_EXT)
1263                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1264         /* XXX should discard first scan when using interval scanning
1265          * since manual says it is not synced with scan clock */
1266         if (labpc_use_continuous_mode(cmd) == 0) {
1267                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1268                 if (cmd->scan_begin_src == TRIG_EXT)
1269                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1270         }
1271         /*  single-ended/differential */
1272         if (aref == AREF_DIFF)
1273                 devpriv->command4_bits |= ADC_DIFF_BIT;
1274         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1275
1276         devpriv->write_byte(cmd->chanlist_len,
1277                             dev->iobase + INTERVAL_COUNT_REG);
1278         /*  load count */
1279         devpriv->write_byte(INTERVAL_LOAD_BITS,
1280                             dev->iobase + INTERVAL_LOAD_REG);
1281
1282         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1283                 /*  set up pacing */
1284                 labpc_adc_timing(dev, cmd);
1285                 /*  load counter b0 in mode 3 */
1286                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1287                                          0, devpriv->divisor_b0, 3);
1288                 if (ret < 0) {
1289                         comedi_error(dev, "error loading counter b0");
1290                         return -1;
1291                 }
1292         }
1293         /*  set up conversion pacing */
1294         if (labpc_ai_convert_period(cmd)) {
1295                 /*  load counter a0 in mode 2 */
1296                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1297                                          0, devpriv->divisor_a0, 2);
1298                 if (ret < 0) {
1299                         comedi_error(dev, "error loading counter a0");
1300                         return -1;
1301                 }
1302         } else
1303                 devpriv->write_byte(INIT_A0_BITS,
1304                                     dev->iobase + COUNTER_A_CONTROL_REG);
1305
1306         /*  set up scan pacing */
1307         if (labpc_ai_scan_period(cmd)) {
1308                 /*  load counter b1 in mode 2 */
1309                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1310                                          1, devpriv->divisor_b1, 2);
1311                 if (ret < 0) {
1312                         comedi_error(dev, "error loading counter b1");
1313                         return -1;
1314                 }
1315         }
1316
1317         labpc_clear_adc_fifo(dev);
1318
1319         /*  set up dma transfer */
1320         if (xfer == isa_dma_transfer) {
1321                 irq_flags = claim_dma_lock();
1322                 disable_dma(devpriv->dma_chan);
1323                 /* clear flip-flop to make sure 2-byte registers for
1324                  * count and address get set correctly */
1325                 clear_dma_ff(devpriv->dma_chan);
1326                 set_dma_addr(devpriv->dma_chan,
1327                              virt_to_bus(devpriv->dma_buffer));
1328                 /*  set appropriate size of transfer */
1329                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1330                 if (cmd->stop_src == TRIG_COUNT &&
1331                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1332                         devpriv->dma_transfer_size =
1333                             devpriv->count * sample_size;
1334                 }
1335                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1336                 enable_dma(devpriv->dma_chan);
1337                 release_dma_lock(irq_flags);
1338                 /*  enable board's dma */
1339                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1340         } else
1341                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1342
1343         /*  enable error interrupts */
1344         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1345         /*  enable fifo not empty interrupt? */
1346         if (xfer == fifo_not_empty_transfer)
1347                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1348         else
1349                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1350         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1351
1352         /*  startup aquisition */
1353
1354         /*  command2 reg */
1355         /*  use 2 cascaded counters for pacing */
1356         spin_lock_irqsave(&dev->spinlock, flags);
1357         devpriv->command2_bits |= CASCADE_BIT;
1358         switch (cmd->start_src) {
1359         case TRIG_EXT:
1360                 devpriv->command2_bits |= HWTRIG_BIT;
1361                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1362                 break;
1363         case TRIG_NOW:
1364                 devpriv->command2_bits |= SWTRIG_BIT;
1365                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1366                 break;
1367         default:
1368                 comedi_error(dev, "bug with start_src");
1369                 return -1;
1370                 break;
1371         }
1372         switch (cmd->stop_src) {
1373         case TRIG_EXT:
1374                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1375                 break;
1376         case TRIG_COUNT:
1377         case TRIG_NONE:
1378                 break;
1379         default:
1380                 comedi_error(dev, "bug with stop_src");
1381                 return -1;
1382         }
1383         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1384         spin_unlock_irqrestore(&dev->spinlock, flags);
1385
1386         return 0;
1387 }
1388
1389 /* interrupt service routine */
1390 static irqreturn_t labpc_interrupt(int irq, void *d)
1391 {
1392         struct comedi_device *dev = d;
1393         struct comedi_subdevice *s = dev->read_subdev;
1394         struct comedi_async *async;
1395         struct comedi_cmd *cmd;
1396
1397         if (dev->attached == 0) {
1398                 comedi_error(dev, "premature interrupt");
1399                 return IRQ_HANDLED;
1400         }
1401
1402         async = s->async;
1403         cmd = &async->cmd;
1404         async->events = 0;
1405
1406         /* read board status */
1407         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1408         if (thisboard->register_layout == labpc_1200_layout)
1409                 devpriv->status2_bits =
1410                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1411
1412         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1413                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1414             && (devpriv->status2_bits & A1_TC_BIT) == 0
1415             && (devpriv->status2_bits & FNHF_BIT)) {
1416                 return IRQ_NONE;
1417         }
1418
1419         if (devpriv->status1_bits & OVERRUN_BIT) {
1420                 /* clear error interrupt */
1421                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1422                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1423                 comedi_event(dev, s);
1424                 comedi_error(dev, "overrun");
1425                 return IRQ_HANDLED;
1426         }
1427
1428         if (devpriv->current_transfer == isa_dma_transfer) {
1429                 /*
1430                  * if a dma terminal count of external stop trigger
1431                  * has occurred
1432                  */
1433                 if (devpriv->status1_bits & DMATC_BIT ||
1434                     (thisboard->register_layout == labpc_1200_layout
1435                      && devpriv->status2_bits & A1_TC_BIT)) {
1436                         handle_isa_dma(dev);
1437                 }
1438         } else
1439                 labpc_drain_fifo(dev);
1440
1441         if (devpriv->status1_bits & TIMER_BIT) {
1442                 comedi_error(dev, "handled timer interrupt?");
1443                 /*  clear it */
1444                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1445         }
1446
1447         if (devpriv->status1_bits & OVERFLOW_BIT) {
1448                 /*  clear error interrupt */
1449                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1450                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1451                 comedi_event(dev, s);
1452                 comedi_error(dev, "overflow");
1453                 return IRQ_HANDLED;
1454         }
1455         /*  handle external stop trigger */
1456         if (cmd->stop_src == TRIG_EXT) {
1457                 if (devpriv->status2_bits & A1_TC_BIT) {
1458                         labpc_drain_dregs(dev);
1459                         labpc_cancel(dev, s);
1460                         async->events |= COMEDI_CB_EOA;
1461                 }
1462         }
1463
1464         /* TRIG_COUNT end of acquisition */
1465         if (cmd->stop_src == TRIG_COUNT) {
1466                 if (devpriv->count == 0) {
1467                         labpc_cancel(dev, s);
1468                         async->events |= COMEDI_CB_EOA;
1469                 }
1470         }
1471
1472         comedi_event(dev, s);
1473         return IRQ_HANDLED;
1474 }
1475
1476 /* read all available samples from ai fifo */
1477 static int labpc_drain_fifo(struct comedi_device *dev)
1478 {
1479         unsigned int lsb, msb;
1480         short data;
1481         struct comedi_async *async = dev->read_subdev->async;
1482         const int timeout = 10000;
1483         unsigned int i;
1484
1485         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1486
1487         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1488              i++) {
1489                 /*  quit if we have all the data we want */
1490                 if (async->cmd.stop_src == TRIG_COUNT) {
1491                         if (devpriv->count == 0)
1492                                 break;
1493                         devpriv->count--;
1494                 }
1495                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1496                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1497                 data = (msb << 8) | lsb;
1498                 cfc_write_to_buffer(dev->read_subdev, data);
1499                 devpriv->status1_bits =
1500                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1501         }
1502         if (i == timeout) {
1503                 comedi_error(dev, "ai timeout, fifo never empties");
1504                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1505                 return -1;
1506         }
1507
1508         return 0;
1509 }
1510
1511 static void labpc_drain_dma(struct comedi_device *dev)
1512 {
1513         struct comedi_subdevice *s = dev->read_subdev;
1514         struct comedi_async *async = s->async;
1515         int status;
1516         unsigned long flags;
1517         unsigned int max_points, num_points, residue, leftover;
1518         int i;
1519
1520         status = devpriv->status1_bits;
1521
1522         flags = claim_dma_lock();
1523         disable_dma(devpriv->dma_chan);
1524         /* clear flip-flop to make sure 2-byte registers for
1525          * count and address get set correctly */
1526         clear_dma_ff(devpriv->dma_chan);
1527
1528         /*  figure out how many points to read */
1529         max_points = devpriv->dma_transfer_size / sample_size;
1530         /* residue is the number of points left to be done on the dma
1531          * transfer.  It should always be zero at this point unless
1532          * the stop_src is set to external triggering.
1533          */
1534         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1535         num_points = max_points - residue;
1536         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1537                 num_points = devpriv->count;
1538
1539         /*  figure out how many points will be stored next time */
1540         leftover = 0;
1541         if (async->cmd.stop_src != TRIG_COUNT) {
1542                 leftover = devpriv->dma_transfer_size / sample_size;
1543         } else if (devpriv->count > num_points) {
1544                 leftover = devpriv->count - num_points;
1545                 if (leftover > max_points)
1546                         leftover = max_points;
1547         }
1548
1549         /* write data to comedi buffer */
1550         for (i = 0; i < num_points; i++)
1551                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1552
1553         if (async->cmd.stop_src == TRIG_COUNT)
1554                 devpriv->count -= num_points;
1555
1556         /*  set address and count for next transfer */
1557         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1558         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1559         release_dma_lock(flags);
1560
1561         async->events |= COMEDI_CB_BLOCK;
1562 }
1563
1564 static void handle_isa_dma(struct comedi_device *dev)
1565 {
1566         labpc_drain_dma(dev);
1567
1568         enable_dma(devpriv->dma_chan);
1569
1570         /*  clear dma tc interrupt */
1571         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1572 }
1573
1574 /* makes sure all data acquired by board is transfered to comedi (used
1575  * when aquisition is terminated by stop_src == TRIG_EXT). */
1576 static void labpc_drain_dregs(struct comedi_device *dev)
1577 {
1578         if (devpriv->current_transfer == isa_dma_transfer)
1579                 labpc_drain_dma(dev);
1580
1581         labpc_drain_fifo(dev);
1582 }
1583
1584 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1585                           struct comedi_insn *insn, unsigned int *data)
1586 {
1587         int i, n;
1588         int chan, range;
1589         int lsb, msb;
1590         int timeout = 1000;
1591         unsigned long flags;
1592
1593         /*  disable timed conversions */
1594         spin_lock_irqsave(&dev->spinlock, flags);
1595         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1596         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1597         spin_unlock_irqrestore(&dev->spinlock, flags);
1598
1599         /*  disable interrupt generation and dma */
1600         devpriv->command3_bits = 0;
1601         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1602
1603         /* set gain and channel */
1604         devpriv->command1_bits = 0;
1605         chan = CR_CHAN(insn->chanspec);
1606         range = CR_RANGE(insn->chanspec);
1607         devpriv->command1_bits |= thisboard->ai_range_code[range];
1608         /* munge channel bits for differential/scan disabled mode */
1609         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1610                 chan *= 2;
1611         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1612         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1613
1614         /* setup command6 register for 1200 boards */
1615         if (thisboard->register_layout == labpc_1200_layout) {
1616                 /*  reference inputs to ground or common? */
1617                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1618                         devpriv->command6_bits |= ADC_COMMON_BIT;
1619                 else
1620                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1621                 /* bipolar or unipolar range? */
1622                 if (thisboard->ai_range_is_unipolar[range])
1623                         devpriv->command6_bits |= ADC_UNIP_BIT;
1624                 else
1625                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1626                 /* don't interrupt on fifo half full */
1627                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1628                 /* don't enable interrupt on counter a1 terminal count? */
1629                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1630                 /* write to register */
1631                 devpriv->write_byte(devpriv->command6_bits,
1632                                     dev->iobase + COMMAND6_REG);
1633         }
1634         /* setup command4 register */
1635         devpriv->command4_bits = 0;
1636         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1637         /* single-ended/differential */
1638         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1639                 devpriv->command4_bits |= ADC_DIFF_BIT;
1640         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1641
1642         /*
1643          * initialize pacer counter output to make sure it doesn't
1644          * cause any problems
1645          */
1646         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1647
1648         labpc_clear_adc_fifo(dev);
1649
1650         for (n = 0; n < insn->n; n++) {
1651                 /* trigger conversion */
1652                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1653
1654                 for (i = 0; i < timeout; i++) {
1655                         if (devpriv->read_byte(dev->iobase +
1656                                                STATUS1_REG) & DATA_AVAIL_BIT)
1657                                 break;
1658                         udelay(1);
1659                 }
1660                 if (i == timeout) {
1661                         comedi_error(dev, "timeout");
1662                         return -ETIME;
1663                 }
1664                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1665                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1666                 data[n] = (msb << 8) | lsb;
1667         }
1668
1669         return n;
1670 }
1671
1672 /* analog output insn */
1673 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1674                           struct comedi_insn *insn, unsigned int *data)
1675 {
1676         int channel, range;
1677         unsigned long flags;
1678         int lsb, msb;
1679
1680         channel = CR_CHAN(insn->chanspec);
1681
1682         /* turn off pacing of analog output channel */
1683         /* note: hardware bug in daqcard-1200 means pacing cannot
1684          * be independently enabled/disabled for its the two channels */
1685         spin_lock_irqsave(&dev->spinlock, flags);
1686         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1687         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1688         spin_unlock_irqrestore(&dev->spinlock, flags);
1689
1690         /* set range */
1691         if (thisboard->register_layout == labpc_1200_layout) {
1692                 range = CR_RANGE(insn->chanspec);
1693                 if (range & AO_RANGE_IS_UNIPOLAR)
1694                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1695                 else
1696                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1697                 /*  write to register */
1698                 devpriv->write_byte(devpriv->command6_bits,
1699                                     dev->iobase + COMMAND6_REG);
1700         }
1701         /* send data */
1702         lsb = data[0] & 0xff;
1703         msb = (data[0] >> 8) & 0xff;
1704         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1705         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1706
1707         /* remember value for readback */
1708         devpriv->ao_value[channel] = data[0];
1709
1710         return 1;
1711 }
1712
1713 /* analog output readback insn */
1714 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1715                           struct comedi_insn *insn, unsigned int *data)
1716 {
1717         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1718
1719         return 1;
1720 }
1721
1722 static int labpc_calib_read_insn(struct comedi_device *dev,
1723                                  struct comedi_subdevice *s,
1724                                  struct comedi_insn *insn, unsigned int *data)
1725 {
1726         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1727
1728         return 1;
1729 }
1730
1731 static int labpc_calib_write_insn(struct comedi_device *dev,
1732                                   struct comedi_subdevice *s,
1733                                   struct comedi_insn *insn, unsigned int *data)
1734 {
1735         int channel = CR_CHAN(insn->chanspec);
1736
1737         write_caldac(dev, channel, data[0]);
1738         return 1;
1739 }
1740
1741 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1742                                   struct comedi_subdevice *s,
1743                                   struct comedi_insn *insn, unsigned int *data)
1744 {
1745         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1746
1747         return 1;
1748 }
1749
1750 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1751                                    struct comedi_subdevice *s,
1752                                    struct comedi_insn *insn, unsigned int *data)
1753 {
1754         int channel = CR_CHAN(insn->chanspec);
1755         int ret;
1756
1757         /*  only allow writes to user area of eeprom */
1758         if (channel < 16 || channel > 127) {
1759                 printk
1760                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1761                 return -EINVAL;
1762         }
1763
1764         ret = labpc_eeprom_write(dev, channel, data[0]);
1765         if (ret < 0)
1766                 return ret;
1767
1768         return 1;
1769 }
1770
1771 /* utility function that suggests a dma transfer size in bytes */
1772 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1773 {
1774         unsigned int size;
1775         unsigned int freq;
1776
1777         if (cmd.convert_src == TRIG_TIMER)
1778                 freq = 1000000000 / cmd.convert_arg;
1779         /* return some default value */
1780         else
1781                 freq = 0xffffffff;
1782
1783         /* make buffer fill in no more than 1/3 second */
1784         size = (freq / 3) * sample_size;
1785
1786         /* set a minimum and maximum size allowed */
1787         if (size > dma_buffer_size)
1788                 size = dma_buffer_size - dma_buffer_size % sample_size;
1789         else if (size < sample_size)
1790                 size = sample_size;
1791
1792         return size;
1793 }
1794
1795 /* figures out what counter values to use based on command */
1796 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1797 {
1798         /* max value for 16 bit counter in mode 2 */
1799         const int max_counter_value = 0x10000;
1800         /* min value for 16 bit counter in mode 2 */
1801         const int min_counter_value = 2;
1802         unsigned int base_period;
1803
1804         /*
1805          * if both convert and scan triggers are TRIG_TIMER, then they
1806          * both rely on counter b0
1807          */
1808         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1809                 /*
1810                  * pick the lowest b0 divisor value we can (for maximum input
1811                  * clock speed on convert and scan counters)
1812                  */
1813                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1814                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1815                 if (devpriv->divisor_b0 < min_counter_value)
1816                         devpriv->divisor_b0 = min_counter_value;
1817                 if (devpriv->divisor_b0 > max_counter_value)
1818                         devpriv->divisor_b0 = max_counter_value;
1819
1820                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1821
1822                 /*  set a0 for conversion frequency and b1 for scan frequency */
1823                 switch (cmd->flags & TRIG_ROUND_MASK) {
1824                 default:
1825                 case TRIG_ROUND_NEAREST:
1826                         devpriv->divisor_a0 =
1827                             (labpc_ai_convert_period(cmd) +
1828                              (base_period / 2)) / base_period;
1829                         devpriv->divisor_b1 =
1830                             (labpc_ai_scan_period(cmd) +
1831                              (base_period / 2)) / base_period;
1832                         break;
1833                 case TRIG_ROUND_UP:
1834                         devpriv->divisor_a0 =
1835                             (labpc_ai_convert_period(cmd) + (base_period -
1836                                                              1)) / base_period;
1837                         devpriv->divisor_b1 =
1838                             (labpc_ai_scan_period(cmd) + (base_period -
1839                                                           1)) / base_period;
1840                         break;
1841                 case TRIG_ROUND_DOWN:
1842                         devpriv->divisor_a0 =
1843                             labpc_ai_convert_period(cmd) / base_period;
1844                         devpriv->divisor_b1 =
1845                             labpc_ai_scan_period(cmd) / base_period;
1846                         break;
1847                 }
1848                 /*  make sure a0 and b1 values are acceptable */
1849                 if (devpriv->divisor_a0 < min_counter_value)
1850                         devpriv->divisor_a0 = min_counter_value;
1851                 if (devpriv->divisor_a0 > max_counter_value)
1852                         devpriv->divisor_a0 = max_counter_value;
1853                 if (devpriv->divisor_b1 < min_counter_value)
1854                         devpriv->divisor_b1 = min_counter_value;
1855                 if (devpriv->divisor_b1 > max_counter_value)
1856                         devpriv->divisor_b1 = max_counter_value;
1857                 /*  write corrected timings to command */
1858                 labpc_set_ai_convert_period(cmd,
1859                                             base_period * devpriv->divisor_a0);
1860                 labpc_set_ai_scan_period(cmd,
1861                                          base_period * devpriv->divisor_b1);
1862                 /*
1863                  * if only one TRIG_TIMER is used, we can employ the generic
1864                  * cascaded timing functions
1865                  */
1866         } else if (labpc_ai_scan_period(cmd)) {
1867                 unsigned int scan_period;
1868
1869                 scan_period = labpc_ai_scan_period(cmd);
1870                 /*
1871                  * calculate cascaded counter values
1872                  * that give desired scan timing
1873                  */
1874                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1875                                                &(devpriv->divisor_b1),
1876                                                &(devpriv->divisor_b0),
1877                                                &scan_period,
1878                                                cmd->flags & TRIG_ROUND_MASK);
1879                 labpc_set_ai_scan_period(cmd, scan_period);
1880         } else if (labpc_ai_convert_period(cmd)) {
1881                 unsigned int convert_period;
1882
1883                 convert_period = labpc_ai_convert_period(cmd);
1884                 /*
1885                  * calculate cascaded counter values
1886                  * that give desired conversion timing
1887                  */
1888                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1889                                                &(devpriv->divisor_a0),
1890                                                &(devpriv->divisor_b0),
1891                                                &convert_period,
1892                                                cmd->flags & TRIG_ROUND_MASK);
1893                 labpc_set_ai_convert_period(cmd, convert_period);
1894         }
1895 }
1896
1897 static int labpc_dio_mem_callback(int dir, int port, int data,
1898                                   unsigned long iobase)
1899 {
1900         if (dir) {
1901                 writeb(data, (void *)(iobase + port));
1902                 return 0;
1903         } else {
1904                 return readb((void *)(iobase + port));
1905         }
1906 }
1907
1908 /* lowlevel write to eeprom/dac */
1909 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1910                              unsigned int value_width)
1911 {
1912         int i;
1913
1914         for (i = 1; i <= value_width; i++) {
1915                 /*  clear serial clock */
1916                 devpriv->command5_bits &= ~SCLOCK_BIT;
1917                 /*  send bits most significant bit first */
1918                 if (value & (1 << (value_width - i)))
1919                         devpriv->command5_bits |= SDATA_BIT;
1920                 else
1921                         devpriv->command5_bits &= ~SDATA_BIT;
1922                 udelay(1);
1923                 devpriv->write_byte(devpriv->command5_bits,
1924                                     dev->iobase + COMMAND5_REG);
1925                 /*  set clock to load bit */
1926                 devpriv->command5_bits |= SCLOCK_BIT;
1927                 udelay(1);
1928                 devpriv->write_byte(devpriv->command5_bits,
1929                                     dev->iobase + COMMAND5_REG);
1930         }
1931 }
1932
1933 /* lowlevel read from eeprom */
1934 static unsigned int labpc_serial_in(struct comedi_device *dev)
1935 {
1936         unsigned int value = 0;
1937         int i;
1938         const int value_width = 8;      /*  number of bits wide values are */
1939
1940         for (i = 1; i <= value_width; i++) {
1941                 /*  set serial clock */
1942                 devpriv->command5_bits |= SCLOCK_BIT;
1943                 udelay(1);
1944                 devpriv->write_byte(devpriv->command5_bits,
1945                                     dev->iobase + COMMAND5_REG);
1946                 /*  clear clock bit */
1947                 devpriv->command5_bits &= ~SCLOCK_BIT;
1948                 udelay(1);
1949                 devpriv->write_byte(devpriv->command5_bits,
1950                                     dev->iobase + COMMAND5_REG);
1951                 /*  read bits most significant bit first */
1952                 udelay(1);
1953                 devpriv->status2_bits =
1954                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1955                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1956                         value |= 1 << (value_width - i);
1957         }
1958
1959         return value;
1960 }
1961
1962 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1963                                       unsigned int address)
1964 {
1965         unsigned int value;
1966         /*  bits to tell eeprom to expect a read */
1967         const int read_instruction = 0x3;
1968         /*  8 bit write lengths to eeprom */
1969         const int write_length = 8;
1970
1971         /*  enable read/write to eeprom */
1972         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1973         udelay(1);
1974         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1975         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1976         udelay(1);
1977         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1978
1979         /*  send read instruction */
1980         labpc_serial_out(dev, read_instruction, write_length);
1981         /*  send 8 bit address to read from */
1982         labpc_serial_out(dev, address, write_length);
1983         /*  read result */
1984         value = labpc_serial_in(dev);
1985
1986         /*  disable read/write to eeprom */
1987         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1988         udelay(1);
1989         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1990
1991         return value;
1992 }
1993
1994 static int labpc_eeprom_write(struct comedi_device *dev,
1995                                 unsigned int address, unsigned int value)
1996 {
1997         const int write_enable_instruction = 0x6;
1998         const int write_instruction = 0x2;
1999         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2000         const int write_in_progress_bit = 0x1;
2001         const int timeout = 10000;
2002         int i;
2003
2004         /*  make sure there isn't already a write in progress */
2005         for (i = 0; i < timeout; i++) {
2006                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2007                     0)
2008                         break;
2009         }
2010         if (i == timeout) {
2011                 comedi_error(dev, "eeprom write timed out");
2012                 return -ETIME;
2013         }
2014         /*  update software copy of eeprom */
2015         devpriv->eeprom_data[address] = value;
2016
2017         /*  enable read/write to eeprom */
2018         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2019         udelay(1);
2020         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2021         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2022         udelay(1);
2023         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2024
2025         /*  send write_enable instruction */
2026         labpc_serial_out(dev, write_enable_instruction, write_length);
2027         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2028         udelay(1);
2029         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2030
2031         /*  send write instruction */
2032         devpriv->command5_bits |= EEPROM_EN_BIT;
2033         udelay(1);
2034         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2035         labpc_serial_out(dev, write_instruction, write_length);
2036         /*  send 8 bit address to write to */
2037         labpc_serial_out(dev, address, write_length);
2038         /*  write value */
2039         labpc_serial_out(dev, value, write_length);
2040         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2041         udelay(1);
2042         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2043
2044         /*  disable read/write to eeprom */
2045         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2046         udelay(1);
2047         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2048
2049         return 0;
2050 }
2051
2052 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2053 {
2054         unsigned int value;
2055         const int read_status_instruction = 0x5;
2056         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2057
2058         /*  enable read/write to eeprom */
2059         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2060         udelay(1);
2061         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2062         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2063         udelay(1);
2064         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2065
2066         /*  send read status instruction */
2067         labpc_serial_out(dev, read_status_instruction, write_length);
2068         /*  read result */
2069         value = labpc_serial_in(dev);
2070
2071         /*  disable read/write to eeprom */
2072         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2073         udelay(1);
2074         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2075
2076         return value;
2077 }
2078
2079 /* writes to 8 bit calibration dacs */
2080 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2081                          unsigned int value)
2082 {
2083         if (value == devpriv->caldac[channel])
2084                 return;
2085         devpriv->caldac[channel] = value;
2086
2087         /*  clear caldac load bit and make sure we don't write to eeprom */
2088         devpriv->command5_bits &=
2089             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2090         udelay(1);
2091         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2092
2093         /*  write 4 bit channel */
2094         labpc_serial_out(dev, channel, 4);
2095         /*  write 8 bit caldac value */
2096         labpc_serial_out(dev, value, 8);
2097
2098         /*  set and clear caldac bit to load caldac value */
2099         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2100         udelay(1);
2101         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2102         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2103         udelay(1);
2104         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2105 }
2106
2107 #ifdef CONFIG_COMEDI_PCI
2108 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2109                                             const struct pci_device_id *ent)
2110 {
2111         return comedi_pci_auto_config(dev, driver_labpc.driver_name);
2112 }
2113
2114 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2115 {
2116         comedi_pci_auto_unconfig(dev);
2117 }
2118
2119 static struct pci_driver driver_labpc_pci_driver = {
2120         .id_table = labpc_pci_table,
2121         .probe = &driver_labpc_pci_probe,
2122         .remove = __devexit_p(&driver_labpc_pci_remove)
2123 };
2124
2125 static int __init driver_labpc_init_module(void)
2126 {
2127         int retval;
2128
2129         retval = comedi_driver_register(&driver_labpc);
2130         if (retval < 0)
2131                 return retval;
2132
2133         driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2134         return pci_register_driver(&driver_labpc_pci_driver);
2135 }
2136
2137 static void __exit driver_labpc_cleanup_module(void)
2138 {
2139         pci_unregister_driver(&driver_labpc_pci_driver);
2140         comedi_driver_unregister(&driver_labpc);
2141 }
2142
2143 module_init(driver_labpc_init_module);
2144 module_exit(driver_labpc_cleanup_module);
2145 #else
2146 static int __init driver_labpc_init_module(void)
2147 {
2148         return comedi_driver_register(&driver_labpc);
2149 }
2150
2151 static void __exit driver_labpc_cleanup_module(void)
2152 {
2153         comedi_driver_unregister(&driver_labpc);
2154 }
2155
2156 module_init(driver_labpc_init_module);
2157 module_exit(driver_labpc_cleanup_module);
2158 #endif
2159
2160
2161 MODULE_AUTHOR("Comedi http://www.comedi.org");
2162 MODULE_DESCRIPTION("Comedi low-level driver");
2163 MODULE_LICENSE("GPL");