drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include "../comedidev.h"
  81
  82 #include <linux/delay.h>
  83 #include <asm/dma.h>
  84
  85 #include "8253.h"
  86 #include "8255.h"
  87 #include "mite.h"
  88 #include "comedi_fc.h"
  89 #include "ni_labpc.h"
  90
  91 #define DRV_NAME "ni_labpc"
  92
  93 #define LABPC_SIZE           32 /*  size of io region used by board */
  94 #define LABPC_TIMER_BASE            500 /*  2 MHz master clock */
  95
  96 /* Registers for the lab-pc+ */
  97
  98 /* write-only registers */
  99 #define COMMAND1_REG    0x0
 100 #define   ADC_GAIN_MASK (0x7 << 4)
 101 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 102 #define   ADC_SCAN_EN_BIT       0x80    /*  enables multi channel scans */
 103 #define COMMAND2_REG    0x1
 104 #define   PRETRIG_BIT   0x1     /*  enable pretriggering (used in conjunction with SWTRIG) */
 105 #define   HWTRIG_BIT    0x2     /*  enable paced conversions on external trigger */
 106 #define   SWTRIG_BIT    0x4     /*  enable paced conversions */
 107 #define   CASCADE_BIT   0x8     /*  use two cascaded counters for pacing */
 108 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 109 #define COMMAND3_REG    0x2
 110 #define   DMA_EN_BIT    0x1     /*  enable dma transfers */
 111 #define   DIO_INTR_EN_BIT       0x2     /*  enable interrupts for 8255 */
 112 #define   DMATC_INTR_EN_BIT     0x4     /*  enable dma terminal count interrupt */
 113 #define   TIMER_INTR_EN_BIT     0x8     /*  enable timer interrupt */
 114 #define   ERR_INTR_EN_BIT       0x10    /*  enable error interrupt */
 115 #define   ADC_FNE_INTR_EN_BIT   0x20    /*  enable fifo not empty interrupt */
 116 #define ADC_CONVERT_REG 0x3
 117 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 118 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 119 #define ADC_CLEAR_REG   0x8
 120 #define DMATC_CLEAR_REG 0xa
 121 #define TIMER_CLEAR_REG 0xc
 122 #define COMMAND6_REG    0xe     /*  1200 boards only */
 123 #define   ADC_COMMON_BIT        0x1     /*  select ground or common-mode reference */
 124 #define   ADC_UNIP_BIT  0x2     /*  adc unipolar */
 125 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))      /*  dac unipolar */
 126 #define   ADC_FHF_INTR_EN_BIT   0x20    /*  enable fifo half full interrupt */
 127 #define   A1_INTR_EN_BIT        0x40    /*  enable interrupt on end of hardware count */
 128 #define   ADC_SCAN_UP_BIT 0x80  /*  scan up from channel zero instead of down to zero */
 129 #define COMMAND4_REG    0xf
 130 #define   INTERVAL_SCAN_EN_BIT  0x1     /*  enables 'interval' scanning */
 131 #define   EXT_SCAN_EN_BIT       0x2     /*  enables external signal on counter b1 output to trigger scan */
 132 #define   EXT_CONVERT_OUT_BIT   0x4     /*  chooses direction (output or input) for EXTCONV* line */
 133 #define   ADC_DIFF_BIT  0x8     /*  chooses differential inputs for adc (in conjunction with board jumper) */
 134 #define   EXT_CONVERT_DISABLE_BIT       0x10
 135 #define COMMAND5_REG    0x1c    /*  1200 boards only, calibration stuff */
 136 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4     /*  enable eeprom for write */
 137 #define   DITHER_EN_BIT 0x8     /*  enable dithering */
 138 #define   CALDAC_LOAD_BIT       0x10    /*  load calibration dac */
 139 #define   SCLOCK_BIT    0x20    /*  serial clock - rising edge writes, falling edge reads */
 140 #define   SDATA_BIT     0x40    /*  serial data bit for writing to eeprom or calibration dacs */
 141 #define   EEPROM_EN_BIT 0x80    /*  enable eeprom for read/write */
 142 #define INTERVAL_COUNT_REG      0x1e
 143 #define INTERVAL_LOAD_REG       0x1f
 144 #define   INTERVAL_LOAD_BITS    0x1
 145
 146 /* read-only registers */
 147 #define STATUS1_REG     0x0
 148 #define   DATA_AVAIL_BIT        0x1     /*  data is available in fifo */
 149 #define   OVERRUN_BIT   0x2     /*  overrun has occurred */
 150 #define   OVERFLOW_BIT  0x4     /*  fifo overflow */
 151 #define   TIMER_BIT     0x8     /*  timer interrupt has occured */
 152 #define   DMATC_BIT     0x10    /*  dma terminal count has occured */
 153 #define   EXT_TRIG_BIT  0x40    /*  external trigger has occured */
 154 #define STATUS2_REG     0x1d    /*  1200 boards only */
 155 #define   EEPROM_OUT_BIT        0x1     /*  programmable eeprom serial output */
 156 #define   A1_TC_BIT     0x2     /*  counter A1 terminal count */
 157 #define   FNHF_BIT      0x4     /*  fifo not half full */
 158 #define ADC_FIFO_REG    0xa
 159
 160 #define DIO_BASE_REG    0x10
 161 #define COUNTER_A_BASE_REG      0x14
 162 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 163 #define   INIT_A0_BITS  0x14    /*  check modes put conversion pacer output in harmless state (a0 mode 2) */
 164 #define   INIT_A1_BITS  0x70    /*  put hardware conversion counter output in harmless state (a1 mode 0) */
 165 #define COUNTER_B_BASE_REG      0x18
 166
 167 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 168 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 169 static irqreturn_t labpc_interrupt(int irq, void *d);
 170 static int labpc_drain_fifo(struct comedi_device *dev);
 171 static void labpc_drain_dma(struct comedi_device *dev);
 172 static void handle_isa_dma(struct comedi_device *dev);
 173 static void labpc_drain_dregs(struct comedi_device *dev);
 174 static int labpc_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
 175         struct comedi_cmd *cmd);
 176 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 177 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 178         struct comedi_insn *insn, unsigned int *data);
 179 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 180         struct comedi_insn *insn, unsigned int *data);
 181 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 182         struct comedi_insn *insn, unsigned int *data);
 183 static int labpc_calib_read_insn(struct comedi_device *dev, struct comedi_subdevice *s,
 184         struct comedi_insn *insn, unsigned int *data);
 185 static int labpc_calib_write_insn(struct comedi_device *dev, struct comedi_subdevice *s,
 186         struct comedi_insn *insn, unsigned int *data);
 187 static int labpc_eeprom_read_insn(struct comedi_device *dev, struct comedi_subdevice *s,
 188         struct comedi_insn *insn, unsigned int *data);
 189 static int labpc_eeprom_write_insn(struct comedi_device *dev, struct comedi_subdevice *s,
 190         struct comedi_insn *insn, unsigned int *data);
 191 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 192 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 193 #ifdef CONFIG_COMEDI_PCI
 194 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 195 #endif
 196 static int labpc_dio_mem_callback(int dir, int port, int data,
 197         unsigned long arg);
 198 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 199         unsigned int num_bits);
 200 static unsigned int labpc_serial_in(struct comedi_device *dev);
 201 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 202         unsigned int address);
 203 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 204 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
 205         unsigned int address, unsigned int value);
 206 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 207         unsigned int value);
 208
 209 enum scan_mode {
 210         MODE_SINGLE_CHAN,
 211         MODE_SINGLE_CHAN_INTERVAL,
 212         MODE_MULT_CHAN_UP,
 213         MODE_MULT_CHAN_DOWN,
 214 };
 215
 216 /* analog input ranges */
 217 #define NUM_LABPC_PLUS_AI_RANGES 16
 218 /* indicates unipolar ranges */
 219 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 220         0,
 221         0,
 222         0,
 223         0,
 224         0,
 225         0,
 226         0,
 227         0,
 228         1,
 229         1,
 230         1,
 231         1,
 232         1,
 233         1,
 234         1,
 235         1,
 236 };
 237
 238 /* map range index to gain bits */
 239 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 240         0x00,
 241         0x10,
 242         0x20,
 243         0x30,
 244         0x40,
 245         0x50,
 246         0x60,
 247         0x70,
 248         0x00,
 249         0x10,
 250         0x20,
 251         0x30,
 252         0x40,
 253         0x50,
 254         0x60,
 255         0x70,
 256 };
 257 static const struct comedi_lrange range_labpc_plus_ai = {
 258         NUM_LABPC_PLUS_AI_RANGES,
 259         {
 260                         BIP_RANGE(5),
 261                         BIP_RANGE(4),
 262                         BIP_RANGE(2.5),
 263                         BIP_RANGE(1),
 264                         BIP_RANGE(0.5),
 265                         BIP_RANGE(0.25),
 266                         BIP_RANGE(0.1),
 267                         BIP_RANGE(0.05),
 268                         UNI_RANGE(10),
 269                         UNI_RANGE(8),
 270                         UNI_RANGE(5),
 271                         UNI_RANGE(2),
 272                         UNI_RANGE(1),
 273                         UNI_RANGE(0.5),
 274                         UNI_RANGE(0.2),
 275                         UNI_RANGE(0.1),
 276                 }
 277 };
 278
 279 #define NUM_LABPC_1200_AI_RANGES 14
 280 /* indicates unipolar ranges */
 281 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 282         0,
 283         0,
 284         0,
 285         0,
 286         0,
 287         0,
 288         0,
 289         1,
 290         1,
 291         1,
 292         1,
 293         1,
 294         1,
 295         1,
 296 };
 297
 298 /* map range index to gain bits */
 299 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 300         0x00,
 301         0x20,
 302         0x30,
 303         0x40,
 304         0x50,
 305         0x60,
 306         0x70,
 307         0x00,
 308         0x20,
 309         0x30,
 310         0x40,
 311         0x50,
 312         0x60,
 313         0x70,
 314 };
 315 const struct comedi_lrange range_labpc_1200_ai = {
 316         NUM_LABPC_1200_AI_RANGES,
 317         {
 318                         BIP_RANGE(5),
 319                         BIP_RANGE(2.5),
 320                         BIP_RANGE(1),
 321                         BIP_RANGE(0.5),
 322                         BIP_RANGE(0.25),
 323                         BIP_RANGE(0.1),
 324                         BIP_RANGE(0.05),
 325                         UNI_RANGE(10),
 326                         UNI_RANGE(5),
 327                         UNI_RANGE(2),
 328                         UNI_RANGE(1),
 329                         UNI_RANGE(0.5),
 330                         UNI_RANGE(0.2),
 331                         UNI_RANGE(0.1),
 332                 }
 333 };
 334
 335 /* analog output ranges */
 336 #define AO_RANGE_IS_UNIPOLAR 0x1
 337 static const struct comedi_lrange range_labpc_ao = {
 338         2,
 339         {
 340                         BIP_RANGE(5),
 341                         UNI_RANGE(10),
 342                 }
 343 };
 344
 345 /* functions that do inb/outb and readb/writeb so we can use
 346  * function pointers to decide which to use */
 347 static inline unsigned int labpc_inb(unsigned long address)
 348 {
 349         return inb(address);
 350 }
 351 static inline void labpc_outb(unsigned int byte, unsigned long address)
 352 {
 353         outb(byte, address);
 354 }
 355 static inline unsigned int labpc_readb(unsigned long address)
 356 {
 357         return readb((void *)address);
 358 }
 359 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 360 {
 361         writeb(byte, (void *)address);
 362 }
 363
 364 static const struct labpc_board_struct labpc_boards[] = {
 365         {
 366         .name = "lab-pc-1200",
 367         .ai_speed = 10000,
 368         .bustype = isa_bustype,
 369         .register_layout = labpc_1200_layout,
 370         .has_ao = 1,
 371         .ai_range_table = &range_labpc_1200_ai,
 372         .ai_range_code = labpc_1200_ai_gain_bits,
 373         .ai_range_is_unipolar = labpc_1200_is_unipolar,
 374         .ai_scan_up = 1,
 375         .memory_mapped_io = 0,
 376                 },
 377         {
 378         .name = "lab-pc-1200ai",
 379         .ai_speed = 10000,
 380         .bustype = isa_bustype,
 381         .register_layout = labpc_1200_layout,
 382         .has_ao = 0,
 383         .ai_range_table = &range_labpc_1200_ai,
 384         .ai_range_code = labpc_1200_ai_gain_bits,
 385         .ai_range_is_unipolar = labpc_1200_is_unipolar,
 386         .ai_scan_up = 1,
 387         .memory_mapped_io = 0,
 388                 },
 389         {
 390         .name = "lab-pc+",
 391         .ai_speed = 12000,
 392         .bustype = isa_bustype,
 393         .register_layout = labpc_plus_layout,
 394         .has_ao = 1,
 395         .ai_range_table = &range_labpc_plus_ai,
 396         .ai_range_code = labpc_plus_ai_gain_bits,
 397         .ai_range_is_unipolar = labpc_plus_is_unipolar,
 398         .ai_scan_up = 0,
 399         .memory_mapped_io = 0,
 400                 },
 401 #ifdef CONFIG_COMEDI_PCI
 402         {
 403         .name = "pci-1200",
 404         .device_id = 0x161,
 405         .ai_speed = 10000,
 406         .bustype = pci_bustype,
 407         .register_layout = labpc_1200_layout,
 408         .has_ao = 1,
 409         .ai_range_table = &range_labpc_1200_ai,
 410         .ai_range_code = labpc_1200_ai_gain_bits,
 411         .ai_range_is_unipolar = labpc_1200_is_unipolar,
 412         .ai_scan_up = 1,
 413         .memory_mapped_io = 1,
 414                 },
 415         /*  dummy entry so pci board works when comedi_config is passed driver name */
 416         {
 417                 .name = DRV_NAME,
 418                 .bustype = pci_bustype,
 419                 },
 420 #endif
 421 };
 422
 423 /*
 424  * Useful for shorthand access to the particular board structure
 425  */
 426 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 427
 428 static const int dma_buffer_size = 0xff00;      /*  size in bytes of dma buffer */
 429 static const int sample_size = 2;       /*  2 bytes per sample */
 430
 431 #define devpriv ((struct labpc_private *)dev->private)
 432
 433 static struct comedi_driver driver_labpc = {
 434         .driver_name = DRV_NAME,
 435         .module = THIS_MODULE,
 436         .attach = labpc_attach,
 437         .detach = labpc_common_detach,
 438         .num_names = ARRAY_SIZE(labpc_boards),
 439         .board_name = &labpc_boards[0].name,
 440         .offset = sizeof(struct labpc_board_struct),
 441 };
 442
 443 #ifdef CONFIG_COMEDI_PCI
 444 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 445         {PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 446         {0}
 447 };
 448
 449 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 450 #endif /* CONFIG_COMEDI_PCI */
 451
 452 static inline int labpc_counter_load(struct comedi_device *dev,
 453         unsigned long base_address, unsigned int counter_number,
 454         unsigned int count, unsigned int mode)
 455 {
 456         if (thisboard->memory_mapped_io)
 457                 return i8254_mm_load((void *)base_address, 0, counter_number,
 458                         count, mode);
 459         else
 460                 return i8254_load(base_address, 0, counter_number, count, mode);
 461 }
 462
 463 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 464         unsigned int irq, unsigned int dma_chan)
 465 {
 466         struct comedi_subdevice *s;
 467         int i;
 468         unsigned long dma_flags, isr_flags;
 469         short lsb, msb;
 470
 471         printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name,
 472                 iobase);
 473         if (irq) {
 474                 printk(", irq %u", irq);
 475         }
 476         if (dma_chan) {
 477                 printk(", dma %u", dma_chan);
 478         }
 479         printk("\n");
 480
 481         if (iobase == 0) {
 482                 printk("io base address is zero!\n");
 483                 return -EINVAL;
 484         }
 485         /*  request io regions for isa boards */
 486         if (thisboard->bustype == isa_bustype) {
 487                 /* check if io addresses are available */
 488                 if (!request_region(iobase, LABPC_SIZE,
 489                                 driver_labpc.driver_name)) {
 490                         printk("I/O port conflict\n");
 491                         return -EIO;
 492                 }
 493         }
 494         dev->iobase = iobase;
 495
 496         if (thisboard->memory_mapped_io) {
 497                 devpriv->read_byte = labpc_readb;
 498                 devpriv->write_byte = labpc_writeb;
 499         } else {
 500                 devpriv->read_byte = labpc_inb;
 501                 devpriv->write_byte = labpc_outb;
 502         }
 503         /*  initialize board's command registers */
 504         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 505         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 506         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 507         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 508         if (thisboard->register_layout == labpc_1200_layout) {
 509                 devpriv->write_byte(devpriv->command5_bits,
 510                         dev->iobase + COMMAND5_REG);
 511                 devpriv->write_byte(devpriv->command6_bits,
 512                         dev->iobase + COMMAND6_REG);
 513         }
 514
 515         /* grab our IRQ */
 516         if (irq) {
 517                 isr_flags = 0;
 518                 if (thisboard->bustype == pci_bustype)
 519                         isr_flags |= IRQF_SHARED;
 520                 if (request_irq(irq, labpc_interrupt, isr_flags,
 521                                 driver_labpc.driver_name, dev)) {
 522                         printk("unable to allocate irq %u\n", irq);
 523                         return -EINVAL;
 524                 }
 525         }
 526         dev->irq = irq;
 527
 528         /*  grab dma channel */
 529         if (dma_chan > 3) {
 530                 printk(" invalid dma channel %u\n", dma_chan);
 531                 return -EINVAL;
 532         } else if (dma_chan) {
 533                 /*  allocate dma buffer */
 534                 devpriv->dma_buffer =
 535                         kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 536                 if (devpriv->dma_buffer == NULL) {
 537                         printk(" failed to allocate dma buffer\n");
 538                         return -ENOMEM;
 539                 }
 540                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 541                         printk(" failed to allocate dma channel %u\n",
 542                                 dma_chan);
 543                         return -EINVAL;
 544                 }
 545                 devpriv->dma_chan = dma_chan;
 546                 dma_flags = claim_dma_lock();
 547                 disable_dma(devpriv->dma_chan);
 548                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 549                 release_dma_lock(dma_flags);
 550         }
 551
 552         dev->board_name = thisboard->name;
 553
 554         if (alloc_subdevices(dev, 5) < 0)
 555                 return -ENOMEM;
 556
 557         /* analog input subdevice */
 558         s = dev->subdevices + 0;
 559         dev->read_subdev = s;
 560         s->type = COMEDI_SUBD_AI;
 561         s->subdev_flags =
 562                 SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF |
 563                 SDF_CMD_READ;
 564         s->n_chan = 8;
 565         s->len_chanlist = 8;
 566         s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 567         s->range_table = thisboard->ai_range_table;
 568         s->do_cmd = labpc_ai_cmd;
 569         s->do_cmdtest = labpc_ai_cmdtest;
 570         s->insn_read = labpc_ai_rinsn;
 571         s->cancel = labpc_cancel;
 572
 573         /* analog output */
 574         s = dev->subdevices + 1;
 575         if (thisboard->has_ao) {
 576 /* Could provide command support, except it only has a one sample
 577  * hardware buffer for analog output and no underrun flag. */
 578                 s->type = COMEDI_SUBD_AO;
 579                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 580                 s->n_chan = NUM_AO_CHAN;
 581                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 582                 s->range_table = &range_labpc_ao;
 583                 s->insn_read = labpc_ao_rinsn;
 584                 s->insn_write = labpc_ao_winsn;
 585                 /* initialize analog outputs to a known value */
 586                 for (i = 0; i < s->n_chan; i++) {
 587                         devpriv->ao_value[i] = s->maxdata / 2;
 588                         lsb = devpriv->ao_value[i] & 0xff;
 589                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 590                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 591                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 592                 }
 593         } else {
 594                 s->type = COMEDI_SUBD_UNUSED;
 595         }
 596
 597         /* 8255 dio */
 598         s = dev->subdevices + 2;
 599         /*  if board uses io memory we have to give a custom callback function to the 8255 driver */
 600         if (thisboard->memory_mapped_io)
 601                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 602                         (unsigned long)(dev->iobase + DIO_BASE_REG));
 603         else
 604                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 605
 606         /*  calibration subdevices for boards that have one */
 607         s = dev->subdevices + 3;
 608         if (thisboard->register_layout == labpc_1200_layout) {
 609                 s->type = COMEDI_SUBD_CALIB;
 610                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 611                 s->n_chan = 16;
 612                 s->maxdata = 0xff;
 613                 s->insn_read = labpc_calib_read_insn;
 614                 s->insn_write = labpc_calib_write_insn;
 615
 616                 for (i = 0; i < s->n_chan; i++)
 617                         write_caldac(dev, i, s->maxdata / 2);
 618         } else
 619                 s->type = COMEDI_SUBD_UNUSED;
 620
 621         /* EEPROM */
 622         s = dev->subdevices + 4;
 623         if (thisboard->register_layout == labpc_1200_layout) {
 624                 s->type = COMEDI_SUBD_MEMORY;
 625                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 626                 s->n_chan = EEPROM_SIZE;
 627                 s->maxdata = 0xff;
 628                 s->insn_read = labpc_eeprom_read_insn;
 629                 s->insn_write = labpc_eeprom_write_insn;
 630
 631                 for (i = 0; i < EEPROM_SIZE; i++) {
 632                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 633                 }
 634 #ifdef LABPC_DEBUG
 635                 printk(" eeprom:");
 636                 for (i = 0; i < EEPROM_SIZE; i++) {
 637                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 638                 }
 639                 printk("\n");
 640 #endif
 641         } else
 642                 s->type = COMEDI_SUBD_UNUSED;
 643
 644         return 0;
 645 }
 646
 647 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 648 {
 649         unsigned long iobase = 0;
 650         unsigned int irq = 0;
 651         unsigned int dma_chan = 0;
 652 #ifdef CONFIG_COMEDI_PCI
 653         int retval;
 654 #endif
 655
 656         /* allocate and initialize dev->private */
 657         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 658                 return -ENOMEM;
 659
 660         /*  get base address, irq etc. based on bustype */
 661         switch (thisboard->bustype) {
 662         case isa_bustype:
 663                 iobase = it->options[0];
 664                 irq = it->options[1];
 665                 dma_chan = it->options[2];
 666                 break;
 667         case pci_bustype:
 668 #ifdef CONFIG_COMEDI_PCI
 669                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 670                 if (retval < 0) {
 671                         return retval;
 672                 }
 673                 retval = mite_setup(devpriv->mite);
 674                 if (retval < 0)
 675                         return retval;
 676                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 677                 irq = mite_irq(devpriv->mite);
 678 #else
 679                 printk(" this driver has not been built with PCI support.\n");
 680                 return -EINVAL;
 681 #endif
 682                 break;
 683         case pcmcia_bustype:
 684                 printk(" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 685                 return -EINVAL;
 686                 break;
 687         default:
 688                 printk("bug! couldn't determine board type\n");
 689                 return -EINVAL;
 690                 break;
 691         }
 692
 693         return labpc_common_attach(dev, iobase, irq, dma_chan);
 694 }
 695
 696 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 697 #ifdef CONFIG_COMEDI_PCI
 698 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 699 {
 700         struct mite_struct *mite;
 701         int i;
 702         for (mite = mite_devices; mite; mite = mite->next) {
 703                 if (mite->used)
 704                         continue;
 705                 /*  if bus/slot are specified then make sure we have the right bus/slot */
 706                 if (bus || slot) {
 707                         if (bus != mite->pcidev->bus->number
 708                                 || slot != PCI_SLOT(mite->pcidev->devfn))
 709                                 continue;
 710                 }
 711                 for (i = 0; i < driver_labpc.num_names; i++) {
 712                         if (labpc_boards[i].bustype != pci_bustype)
 713                                 continue;
 714                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 715                                 devpriv->mite = mite;
 716                                 /*  fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 717                                 dev->board_ptr = &labpc_boards[i];
 718                                 return 0;
 719                         }
 720                 }
 721         }
 722         printk("no device found\n");
 723         mite_list_devices();
 724         return -EIO;
 725 }
 726 #endif
 727
 728 int labpc_common_detach(struct comedi_device *dev)
 729 {
 730         printk("comedi%d: ni_labpc: detach\n", dev->minor);
 731
 732         if (dev->subdevices)
 733                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 734
 735         /* only free stuff if it has been allocated by _attach */
 736         if (devpriv->dma_buffer)
 737                 kfree(devpriv->dma_buffer);
 738         if (devpriv->dma_chan)
 739                 free_dma(devpriv->dma_chan);
 740         if (dev->irq)
 741                 free_irq(dev->irq, dev);
 742         if (thisboard->bustype == isa_bustype && dev->iobase)
 743                 release_region(dev->iobase, LABPC_SIZE);
 744 #ifdef CONFIG_COMEDI_PCI
 745         if (devpriv->mite)
 746                 mite_unsetup(devpriv->mite);
 747 #endif
 748
 749         return 0;
 750 };
 751
 752 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 753 {
 754         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 755         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 756         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 757 }
 758
 759 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 760 {
 761         unsigned long flags;
 762
 763         spin_lock_irqsave(&dev->spinlock, flags);
 764         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 765         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 766         spin_unlock_irqrestore(&dev->spinlock, flags);
 767
 768         devpriv->command3_bits = 0;
 769         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 770
 771         return 0;
 772 }
 773
 774 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 775 {
 776         if (cmd->chanlist_len == 1)
 777                 return MODE_SINGLE_CHAN;
 778
 779         /* chanlist may be NULL during cmdtest. */
 780         if (cmd->chanlist == NULL)
 781                 return MODE_MULT_CHAN_UP;
 782
 783         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 784                 return MODE_SINGLE_CHAN_INTERVAL;
 785
 786         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 787                 return MODE_MULT_CHAN_UP;
 788
 789         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 790                 return MODE_MULT_CHAN_DOWN;
 791
 792         printk("ni_labpc: bug! this should never happen\n");
 793
 794         return 0;
 795 }
 796
 797 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 798         const struct comedi_cmd *cmd)
 799 {
 800         int mode, channel, range, aref, i;
 801
 802         if (cmd->chanlist == NULL)
 803                 return 0;
 804
 805         mode = labpc_ai_scan_mode(cmd);
 806
 807         if (mode == MODE_SINGLE_CHAN)
 808                 return 0;
 809
 810         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 811                 if (cmd->chanlist_len > 0xff) {
 812                         comedi_error(dev,
 813                                 "ni_labpc: chanlist too long for single channel interval mode\n");
 814                         return 1;
 815                 }
 816         }
 817
 818         channel = CR_CHAN(cmd->chanlist[0]);
 819         range = CR_RANGE(cmd->chanlist[0]);
 820         aref = CR_AREF(cmd->chanlist[0]);
 821
 822         for (i = 0; i < cmd->chanlist_len; i++) {
 823
 824                 switch (mode) {
 825                 case MODE_SINGLE_CHAN_INTERVAL:
 826                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 827                                 comedi_error(dev,
 828                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 829                                 return 1;
 830                         }
 831                         break;
 832                 case MODE_MULT_CHAN_UP:
 833                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 834                                 comedi_error(dev,
 835                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 836                                 return 1;
 837                         }
 838                         break;
 839                 case MODE_MULT_CHAN_DOWN:
 840                         if (CR_CHAN(cmd->chanlist[i]) !=
 841                                 cmd->chanlist_len - i - 1) {
 842                                 comedi_error(dev,
 843                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 844                                 return 1;
 845                         }
 846                         break;
 847                 default:
 848                         printk("ni_labpc: bug! in chanlist check\n");
 849                         return 1;
 850                         break;
 851                 }
 852
 853                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 854                         comedi_error(dev,
 855                                 "entries in chanlist must all have the same range\n");
 856                         return 1;
 857                 }
 858
 859                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 860                         comedi_error(dev,
 861                                 "entries in chanlist must all have the same reference\n");
 862                         return 1;
 863                 }
 864         }
 865
 866         return 0;
 867 }
 868
 869 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 870 {
 871         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 872                 return 1;
 873
 874         if (cmd->scan_begin_src == TRIG_FOLLOW)
 875                 return 1;
 876
 877         return 0;
 878 }
 879
 880 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 881 {
 882         if (cmd->convert_src != TRIG_TIMER)
 883                 return 0;
 884
 885         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 886                 cmd->scan_begin_src == TRIG_TIMER)
 887                 return cmd->scan_begin_arg;
 888
 889         return cmd->convert_arg;
 890 }
 891
 892 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 893 {
 894         if (cmd->convert_src != TRIG_TIMER)
 895                 return;
 896
 897         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 898                 cmd->scan_begin_src == TRIG_TIMER) {
 899                 cmd->scan_begin_arg = ns;
 900                 if (cmd->convert_arg > cmd->scan_begin_arg)
 901                         cmd->convert_arg = cmd->scan_begin_arg;
 902         } else
 903                 cmd->convert_arg = ns;
 904 }
 905
 906 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 907 {
 908         if (cmd->scan_begin_src != TRIG_TIMER)
 909                 return 0;
 910
 911         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 912                 cmd->convert_src == TRIG_TIMER)
 913                 return 0;
 914
 915         return cmd->scan_begin_arg;
 916 }
 917
 918 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 919 {
 920         if (cmd->scan_begin_src != TRIG_TIMER)
 921                 return;
 922
 923         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 924                 cmd->convert_src == TRIG_TIMER)
 925                 return;
 926
 927         cmd->scan_begin_arg = ns;
 928 }
 929
 930 static int labpc_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
 931         struct comedi_cmd *cmd)
 932 {
 933         int err = 0;
 934         int tmp, tmp2;
 935         int stop_mask;
 936
 937         /* step 1: make sure trigger sources are trivially valid */
 938
 939         tmp = cmd->start_src;
 940         cmd->start_src &= TRIG_NOW | TRIG_EXT;
 941         if (!cmd->start_src || tmp != cmd->start_src)
 942                 err++;
 943
 944         tmp = cmd->scan_begin_src;
 945         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
 946         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 947                 err++;
 948
 949         tmp = cmd->convert_src;
 950         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
 951         if (!cmd->convert_src || tmp != cmd->convert_src)
 952                 err++;
 953
 954         tmp = cmd->scan_end_src;
 955         cmd->scan_end_src &= TRIG_COUNT;
 956         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 957                 err++;
 958
 959         tmp = cmd->stop_src;
 960         stop_mask = TRIG_COUNT | TRIG_NONE;
 961         if (thisboard->register_layout == labpc_1200_layout)
 962                 stop_mask |= TRIG_EXT;
 963         cmd->stop_src &= stop_mask;
 964         if (!cmd->stop_src || tmp != cmd->stop_src)
 965                 err++;
 966
 967         if (err)
 968                 return 1;
 969
 970         /* step 2: make sure trigger sources are unique and mutually compatible */
 971
 972         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
 973                 err++;
 974         if (cmd->scan_begin_src != TRIG_TIMER &&
 975                 cmd->scan_begin_src != TRIG_FOLLOW &&
 976                 cmd->scan_begin_src != TRIG_EXT)
 977                 err++;
 978         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
 979                 err++;
 980         if (cmd->stop_src != TRIG_COUNT &&
 981                 cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
 982                 err++;
 983
 984         /*  can't have external stop and start triggers at once */
 985         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 986                 err++;
 987
 988         if (err)
 989                 return 2;
 990
 991         /* step 3: make sure arguments are trivially compatible */
 992
 993         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
 994                 cmd->start_arg = 0;
 995                 err++;
 996         }
 997
 998         if (!cmd->chanlist_len) {
 999                 err++;
1000         }
1001         if (cmd->scan_end_arg != cmd->chanlist_len) {
1002                 cmd->scan_end_arg = cmd->chanlist_len;
1003                 err++;
1004         }
1005
1006         if (cmd->convert_src == TRIG_TIMER) {
1007                 if (cmd->convert_arg < thisboard->ai_speed) {
1008                         cmd->convert_arg = thisboard->ai_speed;
1009                         err++;
1010                 }
1011         }
1012         /*  make sure scan timing is not too fast */
1013         if (cmd->scan_begin_src == TRIG_TIMER) {
1014                 if (cmd->convert_src == TRIG_TIMER &&
1015                         cmd->scan_begin_arg <
1016                         cmd->convert_arg * cmd->chanlist_len) {
1017                         cmd->scan_begin_arg =
1018                                 cmd->convert_arg * cmd->chanlist_len;
1019                         err++;
1020                 }
1021                 if (cmd->scan_begin_arg <
1022                         thisboard->ai_speed * cmd->chanlist_len) {
1023                         cmd->scan_begin_arg =
1024                                 thisboard->ai_speed * cmd->chanlist_len;
1025                         err++;
1026                 }
1027         }
1028         /*  stop source */
1029         switch (cmd->stop_src) {
1030         case TRIG_COUNT:
1031                 if (!cmd->stop_arg) {
1032                         cmd->stop_arg = 1;
1033                         err++;
1034                 }
1035                 break;
1036         case TRIG_NONE:
1037                 if (cmd->stop_arg != 0) {
1038                         cmd->stop_arg = 0;
1039                         err++;
1040                 }
1041                 break;
1042                 /*  TRIG_EXT doesn't care since it doesn't trigger off a numbered channel */
1043         default:
1044                 break;
1045         }
1046
1047         if (err)
1048                 return 3;
1049
1050         /* step 4: fix up any arguments */
1051
1052         tmp = cmd->convert_arg;
1053         tmp2 = cmd->scan_begin_arg;
1054         labpc_adc_timing(dev, cmd);
1055         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1056                 err++;
1057
1058         if (err)
1059                 return 4;
1060
1061         if (labpc_ai_chanlist_invalid(dev, cmd))
1062                 return 5;
1063
1064         return 0;
1065 }
1066
1067 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1068 {
1069         int channel, range, aref;
1070         unsigned long irq_flags;
1071         int ret;
1072         struct comedi_async *async = s->async;
1073         struct comedi_cmd *cmd = &async->cmd;
1074         enum transfer_type xfer;
1075         unsigned long flags;
1076
1077         if (!dev->irq) {
1078                 comedi_error(dev, "no irq assigned, cannot perform command");
1079                 return -1;
1080         }
1081
1082         range = CR_RANGE(cmd->chanlist[0]);
1083         aref = CR_AREF(cmd->chanlist[0]);
1084
1085         /*  make sure board is disabled before setting up aquisition */
1086         spin_lock_irqsave(&dev->spinlock, flags);
1087         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1088         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1089         spin_unlock_irqrestore(&dev->spinlock, flags);
1090
1091         devpriv->command3_bits = 0;
1092         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1093
1094         /*  initialize software conversion count */
1095         if (cmd->stop_src == TRIG_COUNT) {
1096                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1097         }
1098         /*  setup hardware conversion counter */
1099         if (cmd->stop_src == TRIG_EXT) {
1100                 /*  load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0 */
1101                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1102                         1, 3, 0);
1103                 if (ret < 0) {
1104                         comedi_error(dev, "error loading counter a1");
1105                         return -1;
1106                 }
1107         } else                  /*  otherwise, just put a1 in mode 0 with no count to set its output low */
1108                 devpriv->write_byte(INIT_A1_BITS,
1109                         dev->iobase + COUNTER_A_CONTROL_REG);
1110
1111         /*  figure out what method we will use to transfer data */
1112         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1113                 /*  dma unsafe at RT priority, and too much setup time for TRIG_WAKE_EOS for */
1114                 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1115                 /*  only available on the isa boards */
1116                 thisboard->bustype == isa_bustype) {
1117                 xfer = isa_dma_transfer;
1118         } else if (thisboard->register_layout == labpc_1200_layout &&   /*  pc-plus has no fifo-half full interrupt */
1119                 /*  wake-end-of-scan should interrupt on fifo not empty */
1120                 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1121                 /*  make sure we are taking more than just a few points */
1122                 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1123                 xfer = fifo_half_full_transfer;
1124         } else
1125                 xfer = fifo_not_empty_transfer;
1126         devpriv->current_transfer = xfer;
1127
1128         /*  setup command6 register for 1200 boards */
1129         if (thisboard->register_layout == labpc_1200_layout) {
1130                 /*  reference inputs to ground or common? */
1131                 if (aref != AREF_GROUND)
1132                         devpriv->command6_bits |= ADC_COMMON_BIT;
1133                 else
1134                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1135                 /*  bipolar or unipolar range? */
1136                 if (thisboard->ai_range_is_unipolar[range])
1137                         devpriv->command6_bits |= ADC_UNIP_BIT;
1138                 else
1139                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1140                 /*  interrupt on fifo half full? */
1141                 if (xfer == fifo_half_full_transfer)
1142                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1143                 else
1144                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1145                 /*  enable interrupt on counter a1 terminal count? */
1146                 if (cmd->stop_src == TRIG_EXT)
1147                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1148                 else
1149                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1150                 /*  are we scanning up or down through channels? */
1151                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1152                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1153                 else
1154                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1155                 /*  write to register */
1156                 devpriv->write_byte(devpriv->command6_bits,
1157                         dev->iobase + COMMAND6_REG);
1158         }
1159
1160         /* setup channel list, etc (command1 register) */
1161         devpriv->command1_bits = 0;
1162         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1163                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1164         else
1165                 channel = CR_CHAN(cmd->chanlist[0]);
1166         /*  munge channel bits for differential / scan disabled mode */
1167         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1168                 channel *= 2;
1169         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1170         devpriv->command1_bits |= thisboard->ai_range_code[range];
1171         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1172         /*  manual says to set scan enable bit on second pass */
1173         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1174                 labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1175                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1176                 /* need a brief delay before enabling scan, or scan list will get screwed when you switch
1177                  * between scan up to scan down mode - dunno why */
1178                 udelay(1);
1179                 devpriv->write_byte(devpriv->command1_bits,
1180                         dev->iobase + COMMAND1_REG);
1181         }
1182         /*  setup any external triggering/pacing (command4 register) */
1183         devpriv->command4_bits = 0;
1184         if (cmd->convert_src != TRIG_EXT)
1185                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1186         /* XXX should discard first scan when using interval scanning
1187          * since manual says it is not synced with scan clock */
1188         if (labpc_use_continuous_mode(cmd) == 0) {
1189                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1190                 if (cmd->scan_begin_src == TRIG_EXT)
1191                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1192         }
1193         /*  single-ended/differential */
1194         if (aref == AREF_DIFF)
1195                 devpriv->command4_bits |= ADC_DIFF_BIT;
1196         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1197
1198         devpriv->write_byte(cmd->chanlist_len,
1199                 dev->iobase + INTERVAL_COUNT_REG);
1200         /*  load count */
1201         devpriv->write_byte(INTERVAL_LOAD_BITS,
1202                 dev->iobase + INTERVAL_LOAD_REG);
1203
1204         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1205                 /*  set up pacing */
1206                 labpc_adc_timing(dev, cmd);
1207                 /*  load counter b0 in mode 3 */
1208                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1209                         0, devpriv->divisor_b0, 3);
1210                 if (ret < 0) {
1211                         comedi_error(dev, "error loading counter b0");
1212                         return -1;
1213                 }
1214         }
1215         /*  set up conversion pacing */
1216         if (labpc_ai_convert_period(cmd)) {
1217                 /*  load counter a0 in mode 2 */
1218                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1219                         0, devpriv->divisor_a0, 2);
1220                 if (ret < 0) {
1221                         comedi_error(dev, "error loading counter a0");
1222                         return -1;
1223                 }
1224         } else
1225                 devpriv->write_byte(INIT_A0_BITS,
1226                         dev->iobase + COUNTER_A_CONTROL_REG);
1227
1228         /*  set up scan pacing */
1229         if (labpc_ai_scan_period(cmd)) {
1230                 /*  load counter b1 in mode 2 */
1231                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1232                         1, devpriv->divisor_b1, 2);
1233                 if (ret < 0) {
1234                         comedi_error(dev, "error loading counter b1");
1235                         return -1;
1236                 }
1237         }
1238
1239         labpc_clear_adc_fifo(dev);
1240
1241         /*  set up dma transfer */
1242         if (xfer == isa_dma_transfer) {
1243                 irq_flags = claim_dma_lock();
1244                 disable_dma(devpriv->dma_chan);
1245                 /* clear flip-flop to make sure 2-byte registers for
1246                  * count and address get set correctly */
1247                 clear_dma_ff(devpriv->dma_chan);
1248                 set_dma_addr(devpriv->dma_chan,
1249                         virt_to_bus(devpriv->dma_buffer));
1250                 /*  set appropriate size of transfer */
1251                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1252                 if (cmd->stop_src == TRIG_COUNT &&
1253                         devpriv->count * sample_size <
1254                         devpriv->dma_transfer_size) {
1255                         devpriv->dma_transfer_size =
1256                                 devpriv->count * sample_size;
1257                 }
1258                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1259                 enable_dma(devpriv->dma_chan);
1260                 release_dma_lock(irq_flags);
1261                 /*  enable board's dma */
1262                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1263         } else
1264                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1265
1266         /*  enable error interrupts */
1267         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1268         /*  enable fifo not empty interrupt? */
1269         if (xfer == fifo_not_empty_transfer)
1270                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1271         else
1272                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1273         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1274
1275         /*  startup aquisition */
1276
1277         /*  command2 reg */
1278         /*  use 2 cascaded counters for pacing */
1279         spin_lock_irqsave(&dev->spinlock, flags);
1280         devpriv->command2_bits |= CASCADE_BIT;
1281         switch (cmd->start_src) {
1282         case TRIG_EXT:
1283                 devpriv->command2_bits |= HWTRIG_BIT;
1284                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1285                 break;
1286         case TRIG_NOW:
1287                 devpriv->command2_bits |= SWTRIG_BIT;
1288                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1289                 break;
1290         default:
1291                 comedi_error(dev, "bug with start_src");
1292                 return -1;
1293                 break;
1294         }
1295         switch (cmd->stop_src) {
1296         case TRIG_EXT:
1297                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1298                 break;
1299         case TRIG_COUNT:
1300         case TRIG_NONE:
1301                 break;
1302         default:
1303                 comedi_error(dev, "bug with stop_src");
1304                 return -1;
1305         }
1306         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1307         spin_unlock_irqrestore(&dev->spinlock, flags);
1308
1309         return 0;
1310 }
1311
1312 /* interrupt service routine */
1313 static irqreturn_t labpc_interrupt(int irq, void *d)
1314 {
1315         struct comedi_device *dev = d;
1316         struct comedi_subdevice *s = dev->read_subdev;
1317         struct comedi_async *async;
1318         struct comedi_cmd *cmd;
1319
1320         if (dev->attached == 0) {
1321                 comedi_error(dev, "premature interrupt");
1322                 return IRQ_HANDLED;
1323         }
1324
1325         async = s->async;
1326         cmd = &async->cmd;
1327         async->events = 0;
1328
1329         /*  read board status */
1330         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1331         if (thisboard->register_layout == labpc_1200_layout)
1332                 devpriv->status2_bits =
1333                         devpriv->read_byte(dev->iobase + STATUS2_REG);
1334
1335         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1336                                 OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1337                 && (devpriv->status2_bits & A1_TC_BIT) == 0
1338                 && (devpriv->status2_bits & FNHF_BIT)) {
1339                 return IRQ_NONE;
1340         }
1341
1342         if (devpriv->status1_bits & OVERRUN_BIT) {
1343                 /*  clear error interrupt */
1344                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1345                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1346                 comedi_event(dev, s);
1347                 comedi_error(dev, "overrun");
1348                 return IRQ_HANDLED;
1349         }
1350
1351         if (devpriv->current_transfer == isa_dma_transfer) {
1352                 /*  if a dma terminal count of external stop trigger has occurred */
1353                 if (devpriv->status1_bits & DMATC_BIT ||
1354                         (thisboard->register_layout == labpc_1200_layout
1355                                 && devpriv->status2_bits & A1_TC_BIT)) {
1356                         handle_isa_dma(dev);
1357                 }
1358         } else
1359                 labpc_drain_fifo(dev);
1360
1361         if (devpriv->status1_bits & TIMER_BIT) {
1362                 comedi_error(dev, "handled timer interrupt?");
1363                 /*  clear it */
1364                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1365         }
1366
1367         if (devpriv->status1_bits & OVERFLOW_BIT) {
1368                 /*  clear error interrupt */
1369                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1370                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1371                 comedi_event(dev, s);
1372                 comedi_error(dev, "overflow");
1373                 return IRQ_HANDLED;
1374         }
1375         /*  handle external stop trigger */
1376         if (cmd->stop_src == TRIG_EXT) {
1377                 if (devpriv->status2_bits & A1_TC_BIT) {
1378                         labpc_drain_dregs(dev);
1379                         labpc_cancel(dev, s);
1380                         async->events |= COMEDI_CB_EOA;
1381                 }
1382         }
1383
1384         /* TRIG_COUNT end of acquisition */
1385         if (cmd->stop_src == TRIG_COUNT) {
1386                 if (devpriv->count == 0) {
1387                         labpc_cancel(dev, s);
1388                         async->events |= COMEDI_CB_EOA;
1389                 }
1390         }
1391
1392         comedi_event(dev, s);
1393         return IRQ_HANDLED;
1394 }
1395
1396 /* read all available samples from ai fifo */
1397 static int labpc_drain_fifo(struct comedi_device *dev)
1398 {
1399         unsigned int lsb, msb;
1400         short data;
1401         struct comedi_async *async = dev->read_subdev->async;
1402         const int timeout = 10000;
1403         unsigned int i;
1404
1405         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1406
1407         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1408                 i++) {
1409                 /*  quit if we have all the data we want */
1410                 if (async->cmd.stop_src == TRIG_COUNT) {
1411                         if (devpriv->count == 0)
1412                                 break;
1413                         devpriv->count--;
1414                 }
1415                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1416                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1417                 data = (msb << 8) | lsb;
1418                 cfc_write_to_buffer(dev->read_subdev, data);
1419                 devpriv->status1_bits =
1420                         devpriv->read_byte(dev->iobase + STATUS1_REG);
1421         }
1422         if (i == timeout) {
1423                 comedi_error(dev, "ai timeout, fifo never empties");
1424                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1425                 return -1;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static void labpc_drain_dma(struct comedi_device *dev)
1432 {
1433         struct comedi_subdevice *s = dev->read_subdev;
1434         struct comedi_async *async = s->async;
1435         int status;
1436         unsigned long flags;
1437         unsigned int max_points, num_points, residue, leftover;
1438         int i;
1439
1440         status = devpriv->status1_bits;
1441
1442         flags = claim_dma_lock();
1443         disable_dma(devpriv->dma_chan);
1444         /* clear flip-flop to make sure 2-byte registers for
1445          * count and address get set correctly */
1446         clear_dma_ff(devpriv->dma_chan);
1447
1448         /*  figure out how many points to read */
1449         max_points = devpriv->dma_transfer_size / sample_size;
1450         /* residue is the number of points left to be done on the dma
1451          * transfer.  It should always be zero at this point unless
1452          * the stop_src is set to external triggering.
1453          */
1454         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1455         num_points = max_points - residue;
1456         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1457                 num_points = devpriv->count;
1458
1459         /*  figure out how many points will be stored next time */
1460         leftover = 0;
1461         if (async->cmd.stop_src != TRIG_COUNT) {
1462                 leftover = devpriv->dma_transfer_size / sample_size;
1463         } else if (devpriv->count > num_points) {
1464                 leftover = devpriv->count - num_points;
1465                 if (leftover > max_points)
1466                         leftover = max_points;
1467         }
1468
1469         /* write data to comedi buffer */
1470         for (i = 0; i < num_points; i++) {
1471                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1472         }
1473         if (async->cmd.stop_src == TRIG_COUNT)
1474                 devpriv->count -= num_points;
1475
1476         /*  set address and count for next transfer */
1477         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1478         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1479         release_dma_lock(flags);
1480
1481         async->events |= COMEDI_CB_BLOCK;
1482 }
1483
1484 static void handle_isa_dma(struct comedi_device *dev)
1485 {
1486         labpc_drain_dma(dev);
1487
1488         enable_dma(devpriv->dma_chan);
1489
1490         /*  clear dma tc interrupt */
1491         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1492 }
1493
1494 /* makes sure all data aquired by board is transfered to comedi (used
1495  * when aquisition is terminated by stop_src == TRIG_EXT). */
1496 static void labpc_drain_dregs(struct comedi_device *dev)
1497 {
1498         if (devpriv->current_transfer == isa_dma_transfer)
1499                 labpc_drain_dma(dev);
1500
1501         labpc_drain_fifo(dev);
1502 }
1503
1504 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1505         struct comedi_insn *insn, unsigned int *data)
1506 {
1507         int i, n;
1508         int chan, range;
1509         int lsb, msb;
1510         int timeout = 1000;
1511         unsigned long flags;
1512
1513         /*  disable timed conversions */
1514         spin_lock_irqsave(&dev->spinlock, flags);
1515         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1516         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1517         spin_unlock_irqrestore(&dev->spinlock, flags);
1518
1519         /*  disable interrupt generation and dma */
1520         devpriv->command3_bits = 0;
1521         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1522
1523         /* set gain and channel */
1524         devpriv->command1_bits = 0;
1525         chan = CR_CHAN(insn->chanspec);
1526         range = CR_RANGE(insn->chanspec);
1527         devpriv->command1_bits |= thisboard->ai_range_code[range];
1528         /*  munge channel bits for differential/scan disabled mode */
1529         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1530                 chan *= 2;
1531         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1532         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1533
1534         /*  setup command6 register for 1200 boards */
1535         if (thisboard->register_layout == labpc_1200_layout) {
1536                 /*  reference inputs to ground or common? */
1537                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1538                         devpriv->command6_bits |= ADC_COMMON_BIT;
1539                 else
1540                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1541                 /*  bipolar or unipolar range? */
1542                 if (thisboard->ai_range_is_unipolar[range])
1543                         devpriv->command6_bits |= ADC_UNIP_BIT;
1544                 else
1545                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1546                 /*  don't interrupt on fifo half full */
1547                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1548                 /*  don't enable interrupt on counter a1 terminal count? */
1549                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1550                 /*  write to register */
1551                 devpriv->write_byte(devpriv->command6_bits,
1552                         dev->iobase + COMMAND6_REG);
1553         }
1554         /*  setup command4 register */
1555         devpriv->command4_bits = 0;
1556         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1557         /*  single-ended/differential */
1558         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1559                 devpriv->command4_bits |= ADC_DIFF_BIT;
1560         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1561
1562         /*  initialize pacer counter output to make sure it doesn't cause any problems */
1563         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1564
1565         labpc_clear_adc_fifo(dev);
1566
1567         for (n = 0; n < insn->n; n++) {
1568                 /* trigger conversion */
1569                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1570
1571                 for (i = 0; i < timeout; i++) {
1572                         if (devpriv->read_byte(dev->iobase +
1573                                         STATUS1_REG) & DATA_AVAIL_BIT)
1574                                 break;
1575                         udelay(1);
1576                 }
1577                 if (i == timeout) {
1578                         comedi_error(dev, "timeout");
1579                         return -ETIME;
1580                 }
1581                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1582                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1583                 data[n] = (msb << 8) | lsb;
1584         }
1585
1586         return n;
1587 }
1588
1589 /* analog output insn */
1590 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1591         struct comedi_insn *insn, unsigned int *data)
1592 {
1593         int channel, range;
1594         unsigned long flags;
1595         int lsb, msb;
1596
1597         channel = CR_CHAN(insn->chanspec);
1598
1599         /*  turn off pacing of analog output channel */
1600         /* note: hardware bug in daqcard-1200 means pacing cannot
1601          * be independently enabled/disabled for its the two channels */
1602         spin_lock_irqsave(&dev->spinlock, flags);
1603         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1604         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1605         spin_unlock_irqrestore(&dev->spinlock, flags);
1606
1607         /*  set range */
1608         if (thisboard->register_layout == labpc_1200_layout) {
1609                 range = CR_RANGE(insn->chanspec);
1610                 if (range & AO_RANGE_IS_UNIPOLAR)
1611                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1612                 else
1613                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1614                 /*  write to register */
1615                 devpriv->write_byte(devpriv->command6_bits,
1616                         dev->iobase + COMMAND6_REG);
1617         }
1618         /*  send data */
1619         lsb = data[0] & 0xff;
1620         msb = (data[0] >> 8) & 0xff;
1621         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1622         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1623
1624         /*  remember value for readback */
1625         devpriv->ao_value[channel] = data[0];
1626
1627         return 1;
1628 }
1629
1630 /* analog output readback insn */
1631 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1632         struct comedi_insn *insn, unsigned int *data)
1633 {
1634         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1635
1636         return 1;
1637 }
1638
1639 static int labpc_calib_read_insn(struct comedi_device *dev, struct comedi_subdevice *s,
1640         struct comedi_insn *insn, unsigned int *data)
1641 {
1642         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1643
1644         return 1;
1645 }
1646
1647 static int labpc_calib_write_insn(struct comedi_device *dev, struct comedi_subdevice *s,
1648         struct comedi_insn *insn, unsigned int *data)
1649 {
1650         int channel = CR_CHAN(insn->chanspec);
1651
1652         write_caldac(dev, channel, data[0]);
1653         return 1;
1654 }
1655
1656 static int labpc_eeprom_read_insn(struct comedi_device *dev, struct comedi_subdevice *s,
1657         struct comedi_insn *insn, unsigned int *data)
1658 {
1659         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1660
1661         return 1;
1662 }
1663
1664 static int labpc_eeprom_write_insn(struct comedi_device *dev, struct comedi_subdevice *s,
1665         struct comedi_insn *insn, unsigned int *data)
1666 {
1667         int channel = CR_CHAN(insn->chanspec);
1668         int ret;
1669
1670         /*  only allow writes to user area of eeprom */
1671         if (channel < 16 || channel > 127) {
1672                 printk("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1673                 return -EINVAL;
1674         }
1675
1676         ret = labpc_eeprom_write(dev, channel, data[0]);
1677         if (ret < 0)
1678                 return ret;
1679
1680         return 1;
1681 }
1682
1683 /* utility function that suggests a dma transfer size in bytes */
1684 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1685 {
1686         unsigned int size;
1687         unsigned int freq;
1688
1689         if (cmd.convert_src == TRIG_TIMER)
1690                 freq = 1000000000 / cmd.convert_arg;
1691         /*  return some default value */
1692         else
1693                 freq = 0xffffffff;
1694
1695         /*  make buffer fill in no more than 1/3 second */
1696         size = (freq / 3) * sample_size;
1697
1698         /*  set a minimum and maximum size allowed */
1699         if (size > dma_buffer_size)
1700                 size = dma_buffer_size - dma_buffer_size % sample_size;
1701         else if (size < sample_size)
1702                 size = sample_size;
1703
1704         return size;
1705 }
1706
1707 /* figures out what counter values to use based on command */
1708 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1709 {
1710         const int max_counter_value = 0x10000;  /*  max value for 16 bit counter in mode 2 */
1711         const int min_counter_value = 2;        /*  min value for 16 bit counter in mode 2 */
1712         unsigned int base_period;
1713
1714         /*  if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0 */
1715         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1716                 /*  pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters) */
1717                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1718                         (LABPC_TIMER_BASE * max_counter_value) + 1;
1719                 if (devpriv->divisor_b0 < min_counter_value)
1720                         devpriv->divisor_b0 = min_counter_value;
1721                 if (devpriv->divisor_b0 > max_counter_value)
1722                         devpriv->divisor_b0 = max_counter_value;
1723
1724                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1725
1726                 /*  set a0 for conversion frequency and b1 for scan frequency */
1727                 switch (cmd->flags & TRIG_ROUND_MASK) {
1728                 default:
1729                 case TRIG_ROUND_NEAREST:
1730                         devpriv->divisor_a0 =
1731                                 (labpc_ai_convert_period(cmd) +
1732                                 (base_period / 2)) / base_period;
1733                         devpriv->divisor_b1 =
1734                                 (labpc_ai_scan_period(cmd) +
1735                                 (base_period / 2)) / base_period;
1736                         break;
1737                 case TRIG_ROUND_UP:
1738                         devpriv->divisor_a0 =
1739                                 (labpc_ai_convert_period(cmd) + (base_period -
1740                                         1)) / base_period;
1741                         devpriv->divisor_b1 =
1742                                 (labpc_ai_scan_period(cmd) + (base_period -
1743                                         1)) / base_period;
1744                         break;
1745                 case TRIG_ROUND_DOWN:
1746                         devpriv->divisor_a0 =
1747                                 labpc_ai_convert_period(cmd) / base_period;
1748                         devpriv->divisor_b1 =
1749                                 labpc_ai_scan_period(cmd) / base_period;
1750                         break;
1751                 }
1752                 /*  make sure a0 and b1 values are acceptable */
1753                 if (devpriv->divisor_a0 < min_counter_value)
1754                         devpriv->divisor_a0 = min_counter_value;
1755                 if (devpriv->divisor_a0 > max_counter_value)
1756                         devpriv->divisor_a0 = max_counter_value;
1757                 if (devpriv->divisor_b1 < min_counter_value)
1758                         devpriv->divisor_b1 = min_counter_value;
1759                 if (devpriv->divisor_b1 > max_counter_value)
1760                         devpriv->divisor_b1 = max_counter_value;
1761                 /*  write corrected timings to command */
1762                 labpc_set_ai_convert_period(cmd,
1763                         base_period * devpriv->divisor_a0);
1764                 labpc_set_ai_scan_period(cmd,
1765                         base_period * devpriv->divisor_b1);
1766                 /*  if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions */
1767         } else if (labpc_ai_scan_period(cmd)) {
1768                 unsigned int scan_period;
1769
1770                 scan_period = labpc_ai_scan_period(cmd);
1771                 /* calculate cascaded counter values that give desired scan timing */
1772                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1773                         &(devpriv->divisor_b1), &(devpriv->divisor_b0),
1774                         &scan_period, cmd->flags & TRIG_ROUND_MASK);
1775                 labpc_set_ai_scan_period(cmd, scan_period);
1776         } else if (labpc_ai_convert_period(cmd)) {
1777                 unsigned int convert_period;
1778
1779                 convert_period = labpc_ai_convert_period(cmd);
1780                 /* calculate cascaded counter values that give desired conversion timing */
1781                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1782                         &(devpriv->divisor_a0), &(devpriv->divisor_b0),
1783                         &convert_period, cmd->flags & TRIG_ROUND_MASK);
1784                 labpc_set_ai_convert_period(cmd, convert_period);
1785         }
1786 }
1787
1788 static int labpc_dio_mem_callback(int dir, int port, int data,
1789         unsigned long iobase)
1790 {
1791         if (dir) {
1792                 writeb(data, (void *)(iobase + port));
1793                 return 0;
1794         } else {
1795                 return readb((void *)(iobase + port));
1796         }
1797 }
1798
1799 /* lowlevel write to eeprom/dac */
1800 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1801         unsigned int value_width)
1802 {
1803         int i;
1804
1805         for (i = 1; i <= value_width; i++) {
1806                 /*  clear serial clock */
1807                 devpriv->command5_bits &= ~SCLOCK_BIT;
1808                 /*  send bits most significant bit first */
1809                 if (value & (1 << (value_width - i)))
1810                         devpriv->command5_bits |= SDATA_BIT;
1811                 else
1812                         devpriv->command5_bits &= ~SDATA_BIT;
1813                 udelay(1);
1814                 devpriv->write_byte(devpriv->command5_bits,
1815                         dev->iobase + COMMAND5_REG);
1816                 /*  set clock to load bit */
1817                 devpriv->command5_bits |= SCLOCK_BIT;
1818                 udelay(1);
1819                 devpriv->write_byte(devpriv->command5_bits,
1820                         dev->iobase + COMMAND5_REG);
1821         }
1822 }
1823
1824 /* lowlevel read from eeprom */
1825 static unsigned int labpc_serial_in(struct comedi_device *dev)
1826 {
1827         unsigned int value = 0;
1828         int i;
1829         const int value_width = 8;      /*  number of bits wide values are */
1830
1831         for (i = 1; i <= value_width; i++) {
1832                 /*  set serial clock */
1833                 devpriv->command5_bits |= SCLOCK_BIT;
1834                 udelay(1);
1835                 devpriv->write_byte(devpriv->command5_bits,
1836                         dev->iobase + COMMAND5_REG);
1837                 /*  clear clock bit */
1838                 devpriv->command5_bits &= ~SCLOCK_BIT;
1839                 udelay(1);
1840                 devpriv->write_byte(devpriv->command5_bits,
1841                         dev->iobase + COMMAND5_REG);
1842                 /*  read bits most significant bit first */
1843                 udelay(1);
1844                 devpriv->status2_bits =
1845                         devpriv->read_byte(dev->iobase + STATUS2_REG);
1846                 if (devpriv->status2_bits & EEPROM_OUT_BIT) {
1847                         value |= 1 << (value_width - i);
1848                 }
1849         }
1850
1851         return value;
1852 }
1853
1854 static unsigned int labpc_eeprom_read(struct comedi_device *dev, unsigned int address)
1855 {
1856         unsigned int value;
1857         const int read_instruction = 0x3;       /*  bits to tell eeprom to expect a read */
1858         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1859
1860         /*  enable read/write to eeprom */
1861         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1862         udelay(1);
1863         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1864         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1865         udelay(1);
1866         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1867
1868         /*  send read instruction */
1869         labpc_serial_out(dev, read_instruction, write_length);
1870         /*  send 8 bit address to read from */
1871         labpc_serial_out(dev, address, write_length);
1872         /*  read result */
1873         value = labpc_serial_in(dev);
1874
1875         /*  disable read/write to eeprom */
1876         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1877         udelay(1);
1878         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1879
1880         return value;
1881 }
1882
1883 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
1884         unsigned int address, unsigned int value)
1885 {
1886         const int write_enable_instruction = 0x6;
1887         const int write_instruction = 0x2;
1888         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1889         const int write_in_progress_bit = 0x1;
1890         const int timeout = 10000;
1891         int i;
1892
1893         /*  make sure there isn't already a write in progress */
1894         for (i = 0; i < timeout; i++) {
1895                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1896                         0)
1897                         break;
1898         }
1899         if (i == timeout) {
1900                 comedi_error(dev, "eeprom write timed out");
1901                 return -ETIME;
1902         }
1903         /*  update software copy of eeprom */
1904         devpriv->eeprom_data[address] = value;
1905
1906         /*  enable read/write to eeprom */
1907         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1908         udelay(1);
1909         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1910         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1911         udelay(1);
1912         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1913
1914         /*  send write_enable instruction */
1915         labpc_serial_out(dev, write_enable_instruction, write_length);
1916         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1917         udelay(1);
1918         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1919
1920         /*  send write instruction */
1921         devpriv->command5_bits |= EEPROM_EN_BIT;
1922         udelay(1);
1923         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1924         labpc_serial_out(dev, write_instruction, write_length);
1925         /*  send 8 bit address to write to */
1926         labpc_serial_out(dev, address, write_length);
1927         /*  write value */
1928         labpc_serial_out(dev, value, write_length);
1929         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1930         udelay(1);
1931         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1932
1933         /*  disable read/write to eeprom */
1934         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1935         udelay(1);
1936         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1937
1938         return 0;
1939 }
1940
1941 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1942 {
1943         unsigned int value;
1944         const int read_status_instruction = 0x5;
1945         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1946
1947         /*  enable read/write to eeprom */
1948         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1949         udelay(1);
1950         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1951         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1952         udelay(1);
1953         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1954
1955         /*  send read status instruction */
1956         labpc_serial_out(dev, read_status_instruction, write_length);
1957         /*  read result */
1958         value = labpc_serial_in(dev);
1959
1960         /*  disable read/write to eeprom */
1961         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1962         udelay(1);
1963         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1964
1965         return value;
1966 }
1967
1968 /* writes to 8 bit calibration dacs */
1969 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1970         unsigned int value)
1971 {
1972         if (value == devpriv->caldac[channel])
1973                 return;
1974         devpriv->caldac[channel] = value;
1975
1976         /*  clear caldac load bit and make sure we don't write to eeprom */
1977         devpriv->command5_bits &=
1978                 ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1979         udelay(1);
1980         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1981
1982         /*  write 4 bit channel */
1983         labpc_serial_out(dev, channel, 4);
1984         /*  write 8 bit caldac value */
1985         labpc_serial_out(dev, value, 8);
1986
1987         /*  set and clear caldac bit to load caldac value */
1988         devpriv->command5_bits |= CALDAC_LOAD_BIT;
1989         udelay(1);
1990         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1991         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
1992         udelay(1);
1993         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1994 }
1995
1996 #ifdef CONFIG_COMEDI_PCI
1997 COMEDI_PCI_INITCLEANUP(driver_labpc, labpc_pci_table);
1998 #else
1999 COMEDI_INITCLEANUP(driver_labpc);
2000 #endif
2001
2002 EXPORT_SYMBOL_GPL(labpc_common_attach);
2003 EXPORT_SYMBOL_GPL(labpc_common_detach);
2004 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2005 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2006 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);