2 comedi/drivers/ni_atmio16d.c
3 Hardware driver for National Instruments AT-MIO16D board
4 Copyright (C) 2000 Chris R. Baugher <baugher@enteract.com>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 Description: National Instruments AT-MIO-16D
24 Author: Chris R. Baugher <baugher@enteract.com>
26 Devices: [National Instruments] AT-MIO-16 (atmio16), AT-MIO-16D (atmio16d)
29 * I must give credit here to Michal Dobes <dobes@tesnet.cz> who
30 * wrote the driver for Advantec's pcl812 boards. I used the interrupt
31 * handling code from his driver as an example for this one.
38 #include "../comedidev.h"
40 #include <linux/ioport.h>
44 /* Configuration and Status Registers */
45 #define COM_REG_1 0x00 /* wo 16 */
46 #define STAT_REG 0x00 /* ro 16 */
47 #define COM_REG_2 0x02 /* wo 16 */
48 /* Event Strobe Registers */
49 #define START_CONVERT_REG 0x08 /* wo 16 */
50 #define START_DAQ_REG 0x0A /* wo 16 */
51 #define AD_CLEAR_REG 0x0C /* wo 16 */
52 #define EXT_STROBE_REG 0x0E /* wo 16 */
53 /* Analog Output Registers */
54 #define DAC0_REG 0x10 /* wo 16 */
55 #define DAC1_REG 0x12 /* wo 16 */
56 #define INT2CLR_REG 0x14 /* wo 16 */
57 /* Analog Input Registers */
58 #define MUX_CNTR_REG 0x04 /* wo 16 */
59 #define MUX_GAIN_REG 0x06 /* wo 16 */
60 #define AD_FIFO_REG 0x16 /* ro 16 */
61 #define DMA_TC_INT_CLR_REG 0x16 /* wo 16 */
62 /* AM9513A Counter/Timer Registers */
63 #define AM9513A_DATA_REG 0x18 /* rw 16 */
64 #define AM9513A_COM_REG 0x1A /* wo 16 */
65 #define AM9513A_STAT_REG 0x1A /* ro 16 */
66 /* MIO-16 Digital I/O Registers */
67 #define MIO_16_DIG_IN_REG 0x1C /* ro 16 */
68 #define MIO_16_DIG_OUT_REG 0x1C /* wo 16 */
69 /* RTSI Switch Registers */
70 #define RTSI_SW_SHIFT_REG 0x1E /* wo 8 */
71 #define RTSI_SW_STROBE_REG 0x1F /* wo 8 */
72 /* DIO-24 Registers */
73 #define DIO_24_PORTA_REG 0x00 /* rw 8 */
74 #define DIO_24_PORTB_REG 0x01 /* rw 8 */
75 #define DIO_24_PORTC_REG 0x02 /* rw 8 */
76 #define DIO_24_CNFG_REG 0x03 /* wo 8 */
78 /* Command Register bits */
79 #define COMREG1_2SCADC 0x0001
80 #define COMREG1_1632CNT 0x0002
81 #define COMREG1_SCANEN 0x0008
82 #define COMREG1_DAQEN 0x0010
83 #define COMREG1_DMAEN 0x0020
84 #define COMREG1_CONVINTEN 0x0080
85 #define COMREG2_SCN2 0x0010
86 #define COMREG2_INTEN 0x0080
87 #define COMREG2_DOUTEN0 0x0100
88 #define COMREG2_DOUTEN1 0x0200
89 /* Status Register bits */
90 #define STAT_AD_OVERRUN 0x0100
91 #define STAT_AD_OVERFLOW 0x0200
92 #define STAT_AD_DAQPROG 0x0800
93 #define STAT_AD_CONVAVAIL 0x2000
94 #define STAT_AD_DAQSTOPINT 0x4000
95 /* AM9513A Counter/Timer defines */
96 #define CLOCK_1_MHZ 0x8B25
97 #define CLOCK_100_KHZ 0x8C25
98 #define CLOCK_10_KHZ 0x8D25
99 #define CLOCK_1_KHZ 0x8E25
100 #define CLOCK_100_HZ 0x8F25
101 /* Other miscellaneous defines */
102 #define ATMIO16D_SIZE 32 /* bus address range */
103 #define devpriv ((atmio16d_private *)dev->private)
104 #define ATMIO16D_TIMEOUT 10
110 static const atmio16_board_t atmio16_boards[] = {
121 #define n_atmio16_boards sizeof(atmio16_boards)/sizeof(atmio16_boards[0])
123 #define boardtype ((const atmio16_board_t *)dev->board_ptr)
125 /* function prototypes */
126 static int atmio16d_attach(struct comedi_device * dev, comedi_devconfig * it);
127 static int atmio16d_detach(struct comedi_device * dev);
128 static irqreturn_t atmio16d_interrupt(int irq, void *d PT_REGS_ARG);
129 static int atmio16d_ai_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
130 struct comedi_cmd * cmd);
131 static int atmio16d_ai_cmd(struct comedi_device * dev, struct comedi_subdevice * s);
132 static int atmio16d_ai_cancel(struct comedi_device * dev, struct comedi_subdevice * s);
133 static void reset_counters(struct comedi_device * dev);
134 static void reset_atmio16d(struct comedi_device * dev);
136 /* main driver struct */
137 static struct comedi_driver driver_atmio16d = {
138 driver_name:"atmio16",
140 attach:atmio16d_attach,
141 detach:atmio16d_detach,
142 board_name:&atmio16_boards[0].name,
143 num_names:n_atmio16_boards,
144 offset:sizeof(atmio16_board_t),
147 COMEDI_INITCLEANUP(driver_atmio16d);
150 static const struct comedi_lrange range_atmio16d_ai_10_bipolar = { 4, {
158 static const struct comedi_lrange range_atmio16d_ai_5_bipolar = { 4, {
166 static const struct comedi_lrange range_atmio16d_ai_unipolar = { 4, {
174 /* private data struct */
176 enum { adc_diff, adc_singleended } adc_mux;
177 enum { adc_bipolar10, adc_bipolar5, adc_unipolar10 } adc_range;
178 enum { adc_2comp, adc_straight } adc_coding;
179 enum { dac_bipolar, dac_unipolar } dac0_range, dac1_range;
180 enum { dac_internal, dac_external } dac0_reference, dac1_reference;
181 enum { dac_2comp, dac_straight } dac0_coding, dac1_coding;
182 const struct comedi_lrange *ao_range_type_list[2];
183 unsigned int ao_readback[2];
184 unsigned int com_reg_1_state; /* current state of command register 1 */
185 unsigned int com_reg_2_state; /* current state of command register 2 */
188 static void reset_counters(struct comedi_device * dev)
191 outw(0xFFC2, dev->iobase + AM9513A_COM_REG);
192 outw(0xFF02, dev->iobase + AM9513A_COM_REG);
193 outw(0x4, dev->iobase + AM9513A_DATA_REG);
194 outw(0xFF0A, dev->iobase + AM9513A_COM_REG);
195 outw(0x3, dev->iobase + AM9513A_DATA_REG);
196 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
197 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
199 outw(0xFFC4, dev->iobase + AM9513A_COM_REG);
200 outw(0xFF03, dev->iobase + AM9513A_COM_REG);
201 outw(0x4, dev->iobase + AM9513A_DATA_REG);
202 outw(0xFF0B, dev->iobase + AM9513A_COM_REG);
203 outw(0x3, dev->iobase + AM9513A_DATA_REG);
204 outw(0xFF44, dev->iobase + AM9513A_COM_REG);
205 outw(0xFF44, dev->iobase + AM9513A_COM_REG);
207 outw(0xFFC8, dev->iobase + AM9513A_COM_REG);
208 outw(0xFF04, dev->iobase + AM9513A_COM_REG);
209 outw(0x4, dev->iobase + AM9513A_DATA_REG);
210 outw(0xFF0C, dev->iobase + AM9513A_COM_REG);
211 outw(0x3, dev->iobase + AM9513A_DATA_REG);
212 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
213 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
215 outw(0xFFD0, dev->iobase + AM9513A_COM_REG);
216 outw(0xFF05, dev->iobase + AM9513A_COM_REG);
217 outw(0x4, dev->iobase + AM9513A_DATA_REG);
218 outw(0xFF0D, dev->iobase + AM9513A_COM_REG);
219 outw(0x3, dev->iobase + AM9513A_DATA_REG);
220 outw(0xFF50, dev->iobase + AM9513A_COM_REG);
221 outw(0xFF50, dev->iobase + AM9513A_COM_REG);
223 outw(0, dev->iobase + AD_CLEAR_REG);
226 static void reset_atmio16d(struct comedi_device * dev)
230 /* now we need to initialize the board */
231 outw(0, dev->iobase + COM_REG_1);
232 outw(0, dev->iobase + COM_REG_2);
233 outw(0, dev->iobase + MUX_GAIN_REG);
234 /* init AM9513A timer */
235 outw(0xFFFF, dev->iobase + AM9513A_COM_REG);
236 outw(0xFFEF, dev->iobase + AM9513A_COM_REG);
237 outw(0xFF17, dev->iobase + AM9513A_COM_REG);
238 outw(0xF000, dev->iobase + AM9513A_DATA_REG);
239 for (i = 1; i <= 5; ++i) {
240 outw(0xFF00 + i, dev->iobase + AM9513A_COM_REG);
241 outw(0x0004, dev->iobase + AM9513A_DATA_REG);
242 outw(0xFF08 + i, dev->iobase + AM9513A_COM_REG);
243 outw(0x3, dev->iobase + AM9513A_DATA_REG);
245 outw(0xFF5F, dev->iobase + AM9513A_COM_REG);
246 /* timer init done */
247 outw(0, dev->iobase + AD_CLEAR_REG);
248 outw(0, dev->iobase + INT2CLR_REG);
249 /* select straight binary mode for Analog Input */
250 devpriv->com_reg_1_state |= 1;
251 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
252 devpriv->adc_coding = adc_straight;
253 /* zero the analog outputs */
254 outw(2048, dev->iobase + DAC0_REG);
255 outw(2048, dev->iobase + DAC1_REG);
258 static irqreturn_t atmio16d_interrupt(int irq, void *d PT_REGS_ARG)
260 struct comedi_device *dev = d;
261 struct comedi_subdevice *s = dev->subdevices + 0;
263 // printk("atmio16d_interrupt!\n");
265 comedi_buf_put(s->async, inw(dev->iobase + AD_FIFO_REG));
267 comedi_event(dev, s);
271 static int atmio16d_ai_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
272 struct comedi_cmd * cmd)
276 printk("atmio16d_ai_cmdtest\n");
278 /* make sure triggers are valid */
279 tmp = cmd->start_src;
280 cmd->start_src &= TRIG_NOW;
281 if (!cmd->start_src || tmp != cmd->start_src)
284 tmp = cmd->scan_begin_src;
285 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER;
286 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
289 tmp = cmd->convert_src;
290 cmd->convert_src &= TRIG_TIMER;
291 if (!cmd->convert_src || tmp != cmd->convert_src)
294 tmp = cmd->scan_end_src;
295 cmd->scan_end_src &= TRIG_COUNT;
296 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
300 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
301 if (!cmd->stop_src || tmp != cmd->stop_src)
307 /* step 2: make sure trigger sources are unique and mutually compatible */
308 /* note that mutual compatiblity is not an issue here */
309 if (cmd->scan_begin_src != TRIG_FOLLOW &&
310 cmd->scan_begin_src != TRIG_EXT &&
311 cmd->scan_begin_src != TRIG_TIMER)
313 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
319 /* step 3: make sure arguments are trivially compatible */
321 if (cmd->start_arg != 0) {
325 if (cmd->scan_begin_src == TRIG_FOLLOW) {
326 /* internal trigger */
327 if (cmd->scan_begin_arg != 0) {
328 cmd->scan_begin_arg = 0;
333 /* external trigger */
334 /* should be level/edge, hi/lo specification here */
335 if (cmd->scan_begin_arg != 0) {
336 cmd->scan_begin_arg = 0;
342 if (cmd->convert_arg < 10000) {
343 cmd->convert_arg = 10000;
347 if (cmd->convert_arg > SLOWEST_TIMER) {
348 cmd->convert_arg = SLOWEST_TIMER;
352 if (cmd->scan_end_arg != cmd->chanlist_len) {
353 cmd->scan_end_arg = cmd->chanlist_len;
356 if (cmd->stop_src == TRIG_COUNT) {
357 /* any count is allowed */
360 if (cmd->stop_arg != 0) {
372 static int atmio16d_ai_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
374 struct comedi_cmd *cmd = &s->async->cmd;
375 unsigned int timer, base_clock;
376 unsigned int sample_count, tmp, chan, gain;
379 printk("atmio16d_ai_cmd\n");
381 /* This is slowly becoming a working command interface. *
382 * It is still uber-experimental */
385 s->async->cur_chan = 0;
387 /* check if scanning multiple channels */
388 if (cmd->chanlist_len < 2) {
389 devpriv->com_reg_1_state &= ~COMREG1_SCANEN;
390 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
392 devpriv->com_reg_1_state |= COMREG1_SCANEN;
393 devpriv->com_reg_2_state |= COMREG2_SCN2;
394 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
395 outw(devpriv->com_reg_2_state, dev->iobase + COM_REG_2);
398 /* Setup the Mux-Gain Counter */
399 for (i = 0; i < cmd->chanlist_len; ++i) {
400 chan = CR_CHAN(cmd->chanlist[i]);
401 gain = CR_RANGE(cmd->chanlist[i]);
402 outw(i, dev->iobase + MUX_CNTR_REG);
403 tmp = chan | (gain << 6);
404 if (i == cmd->scan_end_arg - 1)
405 tmp |= 0x0010; /* set LASTONE bit */
406 outw(tmp, dev->iobase + MUX_GAIN_REG);
409 /* Now program the sample interval timer */
410 /* Figure out which clock to use then get an
411 * appropriate timer value */
412 if (cmd->convert_arg < 65536000) {
413 base_clock = CLOCK_1_MHZ;
414 timer = cmd->convert_arg / 1000;
415 } else if (cmd->convert_arg < 655360000) {
416 base_clock = CLOCK_100_KHZ;
417 timer = cmd->convert_arg / 10000;
418 } else if (cmd->convert_arg <= 0xffffffff /* 6553600000 */ ) {
419 base_clock = CLOCK_10_KHZ;
420 timer = cmd->convert_arg / 100000;
421 } else if (cmd->convert_arg <= 0xffffffff /* 65536000000 */ ) {
422 base_clock = CLOCK_1_KHZ;
423 timer = cmd->convert_arg / 1000000;
425 outw(0xFF03, dev->iobase + AM9513A_COM_REG);
426 outw(base_clock, dev->iobase + AM9513A_DATA_REG);
427 outw(0xFF0B, dev->iobase + AM9513A_COM_REG);
428 outw(0x2, dev->iobase + AM9513A_DATA_REG);
429 outw(0xFF44, dev->iobase + AM9513A_COM_REG);
430 outw(0xFFF3, dev->iobase + AM9513A_COM_REG);
431 outw(timer, dev->iobase + AM9513A_DATA_REG);
432 outw(0xFF24, dev->iobase + AM9513A_COM_REG);
434 /* Now figure out how many samples to get */
435 /* and program the sample counter */
436 sample_count = cmd->stop_arg * cmd->scan_end_arg;
437 outw(0xFF04, dev->iobase + AM9513A_COM_REG);
438 outw(0x1025, dev->iobase + AM9513A_DATA_REG);
439 outw(0xFF0C, dev->iobase + AM9513A_COM_REG);
440 if (sample_count < 65536) {
441 /* use only Counter 4 */
442 outw(sample_count, dev->iobase + AM9513A_DATA_REG);
443 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
444 outw(0xFFF4, dev->iobase + AM9513A_COM_REG);
445 outw(0xFF28, dev->iobase + AM9513A_COM_REG);
446 devpriv->com_reg_1_state &= ~COMREG1_1632CNT;
447 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
449 /* Counter 4 and 5 are needed */
450 if ((tmp = sample_count & 0xFFFF)) {
451 outw(tmp - 1, dev->iobase + AM9513A_DATA_REG);
453 outw(0xFFFF, dev->iobase + AM9513A_DATA_REG);
455 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
456 outw(0, dev->iobase + AM9513A_DATA_REG);
457 outw(0xFF28, dev->iobase + AM9513A_COM_REG);
458 outw(0xFF05, dev->iobase + AM9513A_COM_REG);
459 outw(0x25, dev->iobase + AM9513A_DATA_REG);
460 outw(0xFF0D, dev->iobase + AM9513A_COM_REG);
461 tmp = sample_count & 0xFFFF;
462 if ((tmp == 0) || (tmp == 1)) {
463 outw((sample_count >> 16) & 0xFFFF,
464 dev->iobase + AM9513A_DATA_REG);
466 outw(((sample_count >> 16) & 0xFFFF) + 1,
467 dev->iobase + AM9513A_DATA_REG);
469 outw(0xFF70, dev->iobase + AM9513A_COM_REG);
470 devpriv->com_reg_1_state |= COMREG1_1632CNT;
471 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
474 /* Program the scan interval timer ONLY IF SCANNING IS ENABLED */
475 /* Figure out which clock to use then get an
476 * appropriate timer value */
477 if (cmd->chanlist_len > 1) {
478 if (cmd->scan_begin_arg < 65536000) {
479 base_clock = CLOCK_1_MHZ;
480 timer = cmd->scan_begin_arg / 1000;
481 } else if (cmd->scan_begin_arg < 655360000) {
482 base_clock = CLOCK_100_KHZ;
483 timer = cmd->scan_begin_arg / 10000;
484 } else if (cmd->scan_begin_arg < 0xffffffff /* 6553600000 */ ) {
485 base_clock = CLOCK_10_KHZ;
486 timer = cmd->scan_begin_arg / 100000;
487 } else if (cmd->scan_begin_arg < 0xffffffff /* 65536000000 */ ) {
488 base_clock = CLOCK_1_KHZ;
489 timer = cmd->scan_begin_arg / 1000000;
491 outw(0xFF02, dev->iobase + AM9513A_COM_REG);
492 outw(base_clock, dev->iobase + AM9513A_DATA_REG);
493 outw(0xFF0A, dev->iobase + AM9513A_COM_REG);
494 outw(0x2, dev->iobase + AM9513A_DATA_REG);
495 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
496 outw(0xFFF2, dev->iobase + AM9513A_COM_REG);
497 outw(timer, dev->iobase + AM9513A_DATA_REG);
498 outw(0xFF22, dev->iobase + AM9513A_COM_REG);
501 /* Clear the A/D FIFO and reset the MUX counter */
502 outw(0, dev->iobase + AD_CLEAR_REG);
503 outw(0, dev->iobase + MUX_CNTR_REG);
504 outw(0, dev->iobase + INT2CLR_REG);
505 /* enable this acquisition operation */
506 devpriv->com_reg_1_state |= COMREG1_DAQEN;
507 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
508 /* enable interrupts for conversion completion */
509 devpriv->com_reg_1_state |= COMREG1_CONVINTEN;
510 devpriv->com_reg_2_state |= COMREG2_INTEN;
511 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
512 outw(devpriv->com_reg_2_state, dev->iobase + COM_REG_2);
513 /* apply a trigger. this starts the counters! */
514 outw(0, dev->iobase + START_DAQ_REG);
519 /* This will cancel a running acquisition operation */
520 static int atmio16d_ai_cancel(struct comedi_device * dev, struct comedi_subdevice * s)
527 /* Mode 0 is used to get a single conversion on demand */
528 static int atmio16d_ai_insn_read(struct comedi_device * dev, struct comedi_subdevice * s,
529 struct comedi_insn * insn, unsigned int * data)
537 printk("atmio16d_ai_insn_read\n");
539 chan = CR_CHAN(insn->chanspec);
540 gain = CR_RANGE(insn->chanspec);
542 /* reset the Analog input circuitry */
543 //outw( 0, dev->iobase+AD_CLEAR_REG );
544 /* reset the Analog Input MUX Counter to 0 */
545 //outw( 0, dev->iobase+MUX_CNTR_REG );
547 /* set the Input MUX gain */
548 outw(chan | (gain << 6), dev->iobase + MUX_GAIN_REG);
550 for (i = 0; i < insn->n; i++) {
551 /* start the conversion */
552 outw(0, dev->iobase + START_CONVERT_REG);
553 /* wait for it to finish */
554 for (t = 0; t < ATMIO16D_TIMEOUT; t++) {
555 /* check conversion status */
556 status = inw(dev->iobase + STAT_REG);
558 printk("status=%x\n", status);
560 if (status & STAT_AD_CONVAVAIL) {
561 /* read the data now */
562 data[i] = inw(dev->iobase + AD_FIFO_REG);
563 /* change to two's complement if need be */
564 if (devpriv->adc_coding == adc_2comp) {
569 if (status & STAT_AD_OVERFLOW) {
570 printk("atmio16d: a/d FIFO overflow\n");
571 outw(0, dev->iobase + AD_CLEAR_REG);
576 /* end waiting, now check if it timed out */
577 if (t == ATMIO16D_TIMEOUT) {
578 rt_printk("atmio16d: timeout\n");
587 static int atmio16d_ao_insn_read(struct comedi_device * dev, struct comedi_subdevice * s,
588 struct comedi_insn * insn, unsigned int * data)
592 printk("atmio16d_ao_insn_read\n");
595 for (i = 0; i < insn->n; i++) {
596 data[i] = devpriv->ao_readback[CR_CHAN(insn->chanspec)];
602 static int atmio16d_ao_insn_write(struct comedi_device * dev, struct comedi_subdevice * s,
603 struct comedi_insn * insn, unsigned int * data)
609 printk("atmio16d_ao_insn_write\n");
612 chan = CR_CHAN(insn->chanspec);
614 for (i = 0; i < insn->n; i++) {
618 if (devpriv->dac0_coding == dac_2comp) {
621 outw(d, dev->iobase + DAC0_REG);
624 if (devpriv->dac1_coding == dac_2comp) {
627 outw(d, dev->iobase + DAC1_REG);
632 devpriv->ao_readback[chan] = data[i];
637 static int atmio16d_dio_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
638 struct comedi_insn * insn, unsigned int * data)
644 s->state &= ~data[0];
645 s->state |= (data[0] | data[1]);
646 outw(s->state, dev->iobase + MIO_16_DIG_OUT_REG);
648 data[1] = inw(dev->iobase + MIO_16_DIG_IN_REG);
653 static int atmio16d_dio_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
654 struct comedi_insn * insn, unsigned int * data)
659 for (i = 0; i < insn->n; i++) {
660 mask = (CR_CHAN(insn->chanspec) < 4) ? 0x0f : 0xf0;
665 devpriv->com_reg_2_state &= ~(COMREG2_DOUTEN0 | COMREG2_DOUTEN1);
666 if (s->io_bits & 0x0f)
667 devpriv->com_reg_2_state |= COMREG2_DOUTEN0;
668 if (s->io_bits & 0xf0)
669 devpriv->com_reg_2_state |= COMREG2_DOUTEN1;
670 outw(devpriv->com_reg_2_state, dev->iobase + COM_REG_2);
676 options[0] - I/O port
679 N == irq N {3,4,5,6,7,9,10,11,12,14,15}
682 N == irq N {3,4,5,6,7,9}
683 options[3] - DMA1 channel
686 options[4] - DMA2 channel
691 0=differential, 1=single
692 options[6] - a/d range
693 0=bipolar10, 1=bipolar5, 2=unipolar10
695 options[7] - dac0 range
696 0=bipolar, 1=unipolar
697 options[8] - dac0 reference
698 0=internal, 1=external
699 options[9] - dac0 coding
700 0=2's comp, 1=straight binary
702 options[10] - dac1 range
703 options[11] - dac1 reference
704 options[12] - dac1 coding
707 static int atmio16d_attach(struct comedi_device * dev, comedi_devconfig * it)
710 unsigned long iobase;
713 struct comedi_subdevice *s;
715 /* make sure the address range is free and allocate it */
716 iobase = it->options[0];
717 printk("comedi%d: atmio16d: 0x%04lx ", dev->minor, iobase);
718 if (!request_region(iobase, ATMIO16D_SIZE, "ni_atmio16d")) {
719 printk("I/O port conflict\n");
722 dev->iobase = iobase;
725 dev->board_name = boardtype->name;
727 if ((ret = alloc_subdevices(dev, 4)) < 0)
729 if ((ret = alloc_private(dev, sizeof(atmio16d_private))) < 0)
732 /* reset the atmio16d hardware */
735 /* check if our interrupt is available and get it */
736 irq = it->options[1];
738 if ((ret = comedi_request_irq(irq, atmio16d_interrupt,
739 0, "atmio16d", dev)) < 0) {
740 printk("failed to allocate irq %u\n", irq);
744 printk("( irq = %u )\n", irq);
746 printk("( no irq )");
749 /* set device options */
750 devpriv->adc_mux = it->options[5];
751 devpriv->adc_range = it->options[6];
753 devpriv->dac0_range = it->options[7];
754 devpriv->dac0_reference = it->options[8];
755 devpriv->dac0_coding = it->options[9];
756 devpriv->dac1_range = it->options[10];
757 devpriv->dac1_reference = it->options[11];
758 devpriv->dac1_coding = it->options[12];
760 /* setup sub-devices */
761 s = dev->subdevices + 0;
762 dev->read_subdev = s;
764 s->type = COMEDI_SUBD_AI;
765 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_CMD_READ;
766 s->n_chan = (devpriv->adc_mux ? 16 : 8);
767 s->len_chanlist = 16;
768 s->insn_read = atmio16d_ai_insn_read;
769 s->do_cmdtest = atmio16d_ai_cmdtest;
770 s->do_cmd = atmio16d_ai_cmd;
771 s->cancel = atmio16d_ai_cancel;
772 s->maxdata = 0xfff; /* 4095 decimal */
773 switch (devpriv->adc_range) {
775 s->range_table = &range_atmio16d_ai_10_bipolar;
778 s->range_table = &range_atmio16d_ai_5_bipolar;
781 s->range_table = &range_atmio16d_ai_unipolar;
787 s->type = COMEDI_SUBD_AO;
788 s->subdev_flags = SDF_WRITABLE;
790 s->insn_read = atmio16d_ao_insn_read;
791 s->insn_write = atmio16d_ao_insn_write;
792 s->maxdata = 0xfff; /* 4095 decimal */
793 s->range_table_list = devpriv->ao_range_type_list;
794 switch (devpriv->dac0_range) {
796 devpriv->ao_range_type_list[0] = &range_bipolar10;
799 devpriv->ao_range_type_list[0] = &range_unipolar10;
802 switch (devpriv->dac1_range) {
804 devpriv->ao_range_type_list[1] = &range_bipolar10;
807 devpriv->ao_range_type_list[1] = &range_unipolar10;
813 s->type = COMEDI_SUBD_DIO;
814 s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
816 s->insn_bits = atmio16d_dio_insn_bits;
817 s->insn_config = atmio16d_dio_insn_config;
819 s->range_table = &range_digital;
823 if (boardtype->has_8255) {
824 subdev_8255_init(dev, s, NULL, dev->iobase);
826 s->type = COMEDI_SUBD_UNUSED;
829 /* don't yet know how to deal with counter/timers */
833 s->type = COMEDI_SUBD_TIMER;
842 static int atmio16d_detach(struct comedi_device * dev)
844 printk("comedi%d: atmio16d: remove\n", dev->minor);
846 if (dev->subdevices && boardtype->has_8255)
847 subdev_8255_cleanup(dev, dev->subdevices + 3);
850 comedi_free_irq(dev->irq, dev);
855 release_region(dev->iobase, ATMIO16D_SIZE);