drivers/staging/bcm/Adapter.h

   1 /***********************************
   2 *       Adapter.h
   3 ************************************/
   4 #ifndef __ADAPTER_H__
   5 #define __ADAPTER_H__
   6
   7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
   8 #include "Debug.h"
   9
  10 struct _LEADER
  11 {
  12         USHORT  Vcid;
  13         USHORT  PLength;
  14         UCHAR   Status;
  15         UCHAR   Unused[3];
  16 }__attribute__((packed));
  17 typedef struct _LEADER LEADER,*PLEADER;
  18
  19 struct _PACKETTOSEND
  20 {
  21         LEADER  Leader;
  22         UCHAR   ucPayload;
  23 }__attribute__((packed));
  24 typedef struct _PACKETTOSEND PACKETTOSEND, *PPACKETTOSEND;
  25
  26
  27 struct _CONTROL_PACKET
  28 {
  29         PVOID   ControlBuff;
  30         UINT    ControlBuffLen;
  31         struct _CONTROL_PACKET* next;
  32 }__attribute__((packed));
  33 typedef struct _CONTROL_PACKET CONTROL_PACKET,*PCONTROL_PACKET;
  34
  35
  36 struct link_request
  37 {
  38         LEADER  Leader;
  39         UCHAR   szData[4];
  40 }__attribute__((packed));
  41 typedef struct link_request LINK_REQUEST, *PLINK_REQUEST;
  42
  43
  44 //classification extension is added
  45 typedef struct _ADD_CONNECTION
  46 {
  47     ULONG               SrcIpAddressCount;
  48     ULONG               SrcIpAddress[MAX_CONNECTIONS];
  49     ULONG               SrcIpMask[MAX_CONNECTIONS];
  50
  51     ULONG               DestIpAddressCount;
  52     ULONG               DestIpAddress[MAX_CONNECTIONS];
  53     ULONG               DestIpMask[MAX_CONNECTIONS];
  54
  55     USHORT              SrcPortBegin;
  56     USHORT              SrcPortEnd;
  57
  58     USHORT              DestPortBegin;
  59     USHORT              DestPortEnd;
  60
  61     UCHAR               SrcTOS;
  62     UCHAR               SrcProtocol;
  63 } ADD_CONNECTION,*PADD_CONNECTION;
  64
  65
  66 typedef struct _CLASSIFICATION_RULE
  67 {
  68         UCHAR           ucIPSrcAddrLen;
  69         UCHAR       ucIPSrcAddr[32];
  70         UCHAR           ucIPDestAddrLen;
  71         UCHAR       ucIPDestAddr[32];
  72         UCHAR           ucSrcPortRangeLen;
  73         UCHAR           ucSrcPortRange[4];
  74         UCHAR           ucDestPortRangeLen;
  75         UCHAR           ucDestPortRange[4];
  76         USHORT          usVcid;
  77 } CLASSIFICATION_RULE,*PCLASSIFICATION_RULE;
  78
  79 typedef struct _CLASSIFICATION_ONLY
  80 {
  81     USHORT              usVcid;
  82     ULONG               DestIpAddress;
  83     ULONG               DestIpMask;
  84     USHORT              usPortLo;
  85     USHORT              usPortHi;
  86     BOOLEAN             bIpVersion;
  87     UCHAR               ucDestinationAddress[16];
  88 } CLASSIFICATION_ONLY, *PCLASSIFICATION_ONLY;
  89
  90
  91 #define MAX_IP_RANGE_LENGTH 4
  92 #define MAX_PORT_RANGE 4
  93 #define MAX_PROTOCOL_LENGTH   32
  94 #define IPV6_ADDRESS_SIZEINBYTES 0x10
  95
  96 typedef union _U_IP_ADDRESS
  97 {
  98     struct
  99         {
 100                 ULONG                           ulIpv4Addr[MAX_IP_RANGE_LENGTH];//Source Ip Address Range
 101                 ULONG               ulIpv4Mask[MAX_IP_RANGE_LENGTH];//Source Ip Mask Address Range
 102         };
 103         struct
 104         {
 105                 ULONG                           ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];//Source Ip Address Range
 106                 ULONG               ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];//Source Ip Mask Address Range
 107
 108         };
 109         struct
 110         {
 111                 UCHAR                           ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
 112                 UCHAR                           ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
 113         };
 114         struct
 115         {
 116                 UCHAR                           ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
 117                 UCHAR                           ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
 118         };
 119 }U_IP_ADDRESS;
 120 struct _packet_info;
 121
 122 typedef struct _S_HDR_SUPRESSION_CONTEXTINFO
 123 {
 124
 125         UCHAR      ucaHdrSupressionInBuf[MAX_PHS_LENGTHS]; //Intermediate buffer to accumulate pkt Header for PHS
 126         UCHAR      ucaHdrSupressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; //Intermediate buffer containing pkt Header after PHS
 127
 128 }S_HDR_SUPRESSION_CONTEXTINFO;
 129
 130
 131 typedef struct _S_CLASSIFIER_RULE
 132 {
 133         ULONG                   ulSFID;
 134         UCHAR           ucReserved[2];
 135         B_UINT16        uiClassifierRuleIndex;
 136         BOOLEAN                 bUsed;
 137         USHORT                  usVCID_Value;
 138         B_UINT8         u8ClassifierRulePriority; //This field detemines the Classifier Priority
 139         U_IP_ADDRESS    stSrcIpAddress;
 140         UCHAR           ucIPSourceAddressLength;//Ip Source Address Length
 141
 142         U_IP_ADDRESS    stDestIpAddress;
 143     UCHAR           ucIPDestinationAddressLength;//Ip Destination Address Length
 144     UCHAR           ucIPTypeOfServiceLength;//Type of service Length
 145     UCHAR           ucTosLow;//Tos Low
 146     UCHAR           ucTosHigh;//Tos High
 147         UCHAR           ucTosMask;//Tos Mask
 148
 149     UCHAR           ucProtocolLength;//protocol Length
 150     UCHAR           ucProtocol[MAX_PROTOCOL_LENGTH];//protocol Length
 151     USHORT                      usSrcPortRangeLo[MAX_PORT_RANGE];
 152         USHORT                  usSrcPortRangeHi[MAX_PORT_RANGE];
 153     UCHAR           ucSrcPortRangeLength;
 154
 155     USHORT                      usDestPortRangeLo[MAX_PORT_RANGE];
 156         USHORT                  usDestPortRangeHi[MAX_PORT_RANGE];
 157     UCHAR           ucDestPortRangeLength;
 158
 159         BOOLEAN                 bProtocolValid;
 160         BOOLEAN                 bTOSValid;
 161         BOOLEAN                 bDestIpValid;
 162         BOOLEAN                 bSrcIpValid;
 163
 164         //For IPv6 Addressing
 165         UCHAR                   ucDirection;
 166         BOOLEAN         bIpv6Protocol;
 167         UINT32          u32PHSRuleID;
 168         S_PHS_RULE          sPhsRule;
 169         UCHAR                   u8AssociatedPHSI;
 170
 171         //Classification fields for ETH CS
 172         UCHAR           ucEthCSSrcMACLen;
 173         UCHAR           au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
 174         UCHAR           au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
 175         UCHAR           ucEthCSDestMACLen;
 176         UCHAR           au8EThCSDestMAC[MAC_ADDRESS_SIZE];
 177         UCHAR           au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
 178         UCHAR           ucEtherTypeLen;
 179         UCHAR           au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
 180         UCHAR           usUserPriority[2];
 181         USHORT          usVLANID;
 182         USHORT          usValidityBitMap;
 183 }S_CLASSIFIER_RULE;
 184 //typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE;
 185
 186 typedef struct _S_FRAGMENTED_PACKET_INFO
 187 {
 188         BOOLEAN                         bUsed;
 189         ULONG                   ulSrcIpAddress;
 190         USHORT                          usIpIdentification;
 191         S_CLASSIFIER_RULE       *pstMatchedClassifierEntry;
 192         BOOLEAN                         bOutOfOrderFragment;
 193 }S_FRAGMENTED_PACKET_INFO,*PS_FRAGMENTED_PACKET_INFO;
 194
 195 struct _packet_info
 196 {
 197         //classification extension Rule
 198         ULONG                   ulSFID;
 199         USHORT                  usVCID_Value;
 200         UINT                    uiThreshold;
 201         // This field determines the priority of the SF Queues
 202         B_UINT8         u8TrafficPriority;
 203
 204         BOOLEAN                 bValid;
 205         BOOLEAN         bActive;
 206         BOOLEAN                 bActivateRequestSent;
 207
 208         B_UINT8                 u8QueueType;//BE or rtPS
 209
 210         UINT                    uiMaxBucketSize;//maximum size of the bucket for the queue
 211         UINT                    uiCurrentQueueDepthOnTarget;
 212         UINT                    uiCurrentBytesOnHost;
 213         UINT                    uiCurrentPacketsOnHost;
 214         UINT                    uiDroppedCountBytes;
 215         UINT                    uiDroppedCountPackets;
 216         UINT                    uiSentBytes;
 217         UINT                    uiSentPackets;
 218         UINT                    uiCurrentDrainRate;
 219         UINT                    uiThisPeriodSentBytes;
 220         LARGE_INTEGER   liDrainCalculated;
 221         UINT                    uiCurrentTokenCount;
 222         LARGE_INTEGER   liLastUpdateTokenAt;
 223         UINT                    uiMaxAllowedRate;
 224         UINT                    NumOfPacketsSent;
 225         UCHAR                   ucDirection;
 226         USHORT                  usCID;
 227         S_MIBS_EXTSERVICEFLOW_PARAMETERS        stMibsExtServiceFlowTable;
 228         UINT                    uiCurrentRxRate;
 229         UINT                    uiThisPeriodRxBytes;
 230         UINT                    uiTotalRxBytes;
 231         UINT                    uiTotalTxBytes;
 232         UINT                    uiPendedLast;
 233         UCHAR                   ucIpVersion;
 234
 235         union
 236         {
 237                 struct
 238                 {
 239                         struct sk_buff*    FirstTxQueue;
 240                         struct sk_buff*    LastTxQueue;
 241                 };
 242                 struct
 243                 {
 244                         struct sk_buff*    ControlHead;
 245                         struct sk_buff*    ControlTail;
 246                 };
 247         };
 248         BOOLEAN         bProtocolValid;
 249         BOOLEAN         bTOSValid;
 250         BOOLEAN         bDestIpValid;
 251         BOOLEAN         bSrcIpValid;
 252
 253         BOOLEAN         bActiveSet;
 254         BOOLEAN         bAdmittedSet;
 255         BOOLEAN         bAuthorizedSet;
 256         BOOLEAN         bClassifierPriority;
 257         UCHAR           ucServiceClassName[MAX_CLASS_NAME_LENGTH];
 258         BOOLEAN     bHeaderSuppressionEnabled;
 259         spinlock_t      SFQueueLock;
 260         void            *pstSFIndication;
 261         struct timeval  stLastUpdateTokenAt;
 262         atomic_t        uiPerSFTxResourceCount;
 263         UINT            uiMaxLatency;
 264         UCHAR   bIPCSSupport;
 265         UCHAR   bEthCSSupport;
 266 };
 267 typedef struct _packet_info PacketInfo;
 268
 269
 270 typedef struct _PER_TARANG_DATA
 271 {
 272     struct _PER_TARANG_DATA * next;
 273     struct _MINI_ADAPTER * Adapter;
 274     struct sk_buff*     RxAppControlHead;
 275     struct sk_buff*     RxAppControlTail;
 276     volatile INT        AppCtrlQueueLen;
 277     BOOLEAN             MacTracingEnabled;
 278         BOOLEAN                         bApplicationToExit;
 279         S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs;
 280         ULONG                           RxCntrlMsgBitMask;
 281 } PER_TARANG_DATA, *PPER_TARANG_DATA;
 282
 283
 284 #ifdef REL_4_1
 285 typedef struct _TARGET_PARAMS
 286 {
 287       B_UINT32 m_u32CfgVersion;
 288
 289       // Scanning Related Params
 290       B_UINT32 m_u32CenterFrequency;
 291       B_UINT32 m_u32BandAScan;
 292       B_UINT32 m_u32BandBScan;
 293       B_UINT32 m_u32BandCScan;
 294
 295       // QoS Params
 296       B_UINT32 m_u32minGrantsize;       // size of minimum grant is 0 or 6
 297       B_UINT32 m_u32PHSEnable;
 298
 299       // HO Params
 300       B_UINT32 m_u32HoEnable;
 301       B_UINT32 m_u32HoReserved1;
 302       B_UINT32 m_u32HoReserved2;
 303
 304         // Power Control Params
 305       B_UINT32 m_u32MimoEnable;
 306       B_UINT32 m_u32SecurityEnable;
 307         /*
 308      * bit 1: 1 Idlemode enable;
 309      * bit 2: 1 Sleepmode Enable
 310      */
 311       B_UINT32 m_u32PowerSavingModesEnable;
 312           /* PowerSaving Mode Options:
 313              bit 0 = 1: CPE mode - to keep pcmcia if alive;
 314              bit 1 = 1: CINR reporing in Idlemode Msg
 315              bit 2 = 1: Default PSC Enable in sleepmode*/
 316       B_UINT32 m_u32PowerSavingModeOptions;
 317
 318       B_UINT32 m_u32ArqEnable;
 319
 320       // From Version #3, the HARQ section renamed as general
 321       B_UINT32 m_u32HarqEnable;
 322        // EEPROM Param Location
 323        B_UINT32  m_u32EEPROMFlag;
 324        /* BINARY TYPE - 4th MSByte:
 325         * Interface Type -  3rd MSByte:
 326         * Vendor Type - 2nd MSByte
 327         */
 328        // Unused - LSByte
 329       B_UINT32   m_u32Customize;
 330       B_UINT32   m_u32ConfigBW;  /* In Hz */
 331       B_UINT32   m_u32ShutDownTimer;
 332
 333
 334       B_UINT32  m_u32RadioParameter;
 335       B_UINT32  m_u32PhyParameter1;
 336       B_UINT32  m_u32PhyParameter2;
 337       B_UINT32  m_u32PhyParameter3;
 338
 339         /* in eval mode only;
 340      * lower 16bits = basic cid for testing;
 341      * then bit 16 is test cqich,
 342      * bit 17  test init rang;
 343      * bit 18 test periodic rang
 344      * bit 19 is test harq ack/nack
 345      */
 346     B_UINT32      m_u32TestOptions;
 347
 348         B_UINT32 m_u32MaxMACDataperDLFrame;
 349         B_UINT32 m_u32MaxMACDataperULFrame;
 350
 351         B_UINT32 m_u32Corr2MacFlags;
 352
 353     //adding driver params.
 354     B_UINT32 HostDrvrConfig1;
 355     B_UINT32 HostDrvrConfig2;
 356     B_UINT32 HostDrvrConfig3;
 357     B_UINT32 HostDrvrConfig4;
 358     B_UINT32 HostDrvrConfig5;
 359     B_UINT32 HostDrvrConfig6;
 360     B_UINT32 m_u32SegmentedPUSCenable;
 361
 362         //      BAMC enable - but 4.x does not support this feature
 363         //      This is added just to sync 4.x and 5.x CFGs
 364         B_UINT32 m_u32BandAMCEnable;
 365 } STARGETPARAMS, *PSTARGETPARAMS;
 366 #endif
 367
 368 typedef struct _STTARGETDSXBUFFER
 369 {
 370     ULONG ulTargetDsxBuffer;
 371     B_UINT16 tid;
 372     BOOLEAN valid;
 373 }STTARGETDSXBUFFER, *PSTTARGETDSXBUFFER;
 374
 375 typedef INT (*FP_FLASH_WRITE)(struct _MINI_ADAPTER*,UINT,PVOID);
 376
 377 typedef INT (*FP_FLASH_WRITE_STATUS)(struct _MINI_ADAPTER*,UINT,PVOID);
 378
 379 /**
 380 Driver adapter data structure
 381 */
 382 struct _MINI_ADAPTER
 383 {
 384         struct _MINI_ADAPTER *next;
 385
 386         CHAR                *caDsxReqResp;
 387         atomic_t                        ApplicationRunning;
 388         volatile INT            CtrlQueueLen;
 389         atomic_t            AppCtrlQueueLen;
 390         BOOLEAN             AppCtrlQueueOverFlow;
 391         atomic_t                        CurrentApplicationCount;
 392         atomic_t                        RegisteredApplicationCount;
 393         BOOLEAN                     TimerActive;
 394         ULONG                           StatisticsPointer;
 395         struct sk_buff          *RxControlHead;
 396         struct sk_buff          *RxControlTail;
 397 //      spinlock_t                      RxControlQueuelock;
 398         struct semaphore        RxAppControlQueuelock;
 399         struct semaphore        fw_download_sema;
 400
 401         PPER_TARANG_DATA    pTarangs;
 402         spinlock_t                      control_queue_lock;
 403         wait_queue_head_t       process_read_wait_queue;
 404         ULONG                   bcm_jiffies;    /* Store Jiffies value */
 405
 406         // the pointer to the first packet we have queued in send
 407         // deserialized miniport support variables
 408         atomic_t                    TotalPacketCount;
 409         atomic_t                    TxPktAvail;
 410
 411         // this to keep track of the Tx and Rx MailBox Registers.
 412         atomic_t                    CurrNumFreeTxDesc;
 413         // to keep track the no of byte recieved
 414         atomic_t                        RxRollOverCount;
 415         USHORT                          PrevNumRecvDescs;
 416         USHORT                          CurrNumRecvDescs;
 417         atomic_t                        GoodRxByteCount;
 418         atomic_t                        GoodRxPktCount;
 419         atomic_t                        BadRxByteCount;
 420         atomic_t                        RxPacketDroppedCount;
 421         atomic_t                        GoodTxByteCount;
 422         atomic_t                        TxTotalPacketCount;
 423         atomic_t                        TxDroppedPacketCount;
 424         ULONG                           LinkUpStatus;
 425         BOOLEAN                     TransferMode;
 426         UINT                            u32TotalDSD;
 427         PacketInfo                  PackInfo[NO_OF_QUEUES];
 428         S_CLASSIFIER_RULE       astClassifierTable[MAX_CLASSIFIERS];
 429
 430         /*************** qos ******************/
 431         UINT                            bETHCSEnabled;
 432
 433         ULONG                       BEBucketSize;
 434         ULONG                       rtPSBucketSize;
 435         UCHAR                       LinkStatus;
 436         BOOLEAN                     AutoLinkUp;
 437         BOOLEAN                     AutoSyncup;
 438
 439         struct net_device       *dev;
 440         int                             major;
 441         int                             minor;
 442         wait_queue_head_t       tx_packet_wait_queue;
 443         wait_queue_head_t       process_rx_cntrlpkt;
 444         atomic_t                        process_waiting;
 445         BOOLEAN                         fw_download_done;
 446
 447         unsigned int            ctrlpkt_present;
 448         BOOLEAN                         packets_given_to_all;
 449         char                            *txctlpacket[MAX_CNTRL_PKTS];
 450         atomic_t                        cntrlpktCnt ;
 451         atomic_t                        index_app_read_cntrlpkt;
 452         atomic_t                        index_wr_txcntrlpkt;
 453         atomic_t                        index_rd_txcntrlpkt;
 454         UINT                            index_datpkt;
 455         struct semaphore        rdmwrmsync;
 456
 457         STTARGETDSXBUFFER       astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
 458         ULONG                           ulFreeTargetBufferCnt;
 459         ULONG                   ulCurrentTargetBuffer;
 460         ULONG                   ulTotalTargetBuffersAvailable;
 461         unsigned int            timeout;
 462         int                             irq;
 463         unsigned long           chip_id;
 464         unsigned int            bFlashBoot;
 465 //      spinlock_t                      sleeper_lock;
 466         atomic_t                        rdm_wrm_access;
 467         atomic_t                        tx_rx_access;
 468         wait_queue_head_t       lowpower_mode_wait_queue;
 469         atomic_t                        bAbortedByHost;
 470         BOOLEAN                         bBinDownloaded;
 471         BOOLEAN                         bCfgDownloaded;
 472         USHORT                          usBestEffortQueueIndex;
 473         BOOLEAN                         bSyncUpRequestSent;
 474 //      struct semaphore        data_packet_queue_lock;
 475         wait_queue_head_t       ioctl_fw_dnld_wait_queue;
 476         BOOLEAN                         waiting_to_fw_download_done;
 477         pid_t                           fw_download_process_pid;
 478         PSTARGETPARAMS          pstargetparams;
 479         BOOLEAN                         device_removed;
 480         BOOLEAN                         DeviceAccess;
 481         INT                                     DDRSetting;
 482         BOOLEAN                         bDDRInitDone;
 483         ULONG                           ulPowerSaveMode;
 484         BOOLEAN                         bIsAutoCorrectEnabled;
 485         spinlock_t                      txtransmitlock;
 486         B_UINT8                         txtransmit_running;
 487         /* Thread for control packet handling */
 488         struct task_struct      *control_packet_handler;
 489         /* thread for transmitting packets. */
 490         struct task_struct      *transmit_packet_thread;
 491
 492         /* LED Related Structures */
 493         LED_INFO_STRUCT         LEDInfo;
 494
 495         /* Driver State for LED Blinking */
 496         LedEventInfo_t          DriverState;
 497         /* Interface Specific */
 498         PVOID                           pvInterfaceAdapter;
 499         int (*bcm_file_download)( PVOID,
 500                         struct file *,
 501                         unsigned int);
 502         int (*bcm_file_readback_from_chip)( PVOID,
 503                         struct file *,
 504                         unsigned int);
 505         INT (*interface_rdm)(PVOID,
 506                         UINT ,
 507                         PVOID ,
 508                         INT);
 509         INT (*interface_wrm)(PVOID,
 510                         UINT ,
 511                         PVOID ,
 512                         INT);
 513         int (*interface_transmit)(PVOID, PVOID , UINT);
 514         BOOLEAN                 IdleMode;
 515         BOOLEAN                 bDregRequestSentInIdleMode;
 516         BOOLEAN                 bTriedToWakeUpFromlowPowerMode;
 517         BOOLEAN                 bShutStatus;
 518         BOOLEAN                 bWakeUpDevice;
 519         unsigned int    usIdleModePattern;
 520         //BOOLEAN                       bTriedToWakeUpFromShutdown;
 521         BOOLEAN                 bLinkDownRequested;
 522
 523         int                     downloadDDR;
 524         PHS_DEVICE_EXTENSION stBCMPhsContext;
 525         S_HDR_SUPRESSION_CONTEXTINFO    stPhsTxContextInfo;
 526         uint8_t                 ucaPHSPktRestoreBuf[2048];
 527         uint8_t                 bPHSEnabled;
 528         int                     AutoFirmDld;
 529         BOOLEAN         bMipsConfig;
 530         BOOLEAN         bDPLLConfig;
 531         UINT32                  aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
 532         UINT32                  aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
 533         S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
 534         atomic_t                uiMBupdate;
 535         UINT32                  PmuMode;
 536         NVM_TYPE                eNVMType;
 537         UINT                    uiSectorSize;
 538         UINT                    uiSectorSizeInCFG;
 539         BOOLEAN                 bSectorSizeOverride;
 540         BOOLEAN                 bStatusWrite;
 541         UINT                    uiNVMDSDSize;
 542         UINT                    uiVendorExtnFlag;
 543          //it will always represent choosed DSD at any point of time.
 544          // Generally it is Active DSD but in case of NVM RD/WR it might be different.
 545         UINT                    ulFlashCalStart;
 546         ULONG                   ulFlashControlSectionStart;
 547         ULONG                   ulFlashWriteSize;
 548         ULONG                   ulFlashID;
 549         FP_FLASH_WRITE          fpFlashWrite;
 550         FP_FLASH_WRITE_STATUS   fpFlashWriteWithStatusCheck;
 551
 552
 553         struct semaphore        NVMRdmWrmLock;
 554
 555         struct device *pstCreatedClassDevice;
 556
 557 //      BOOLEAN                         InterfaceUpStatus;
 558         PFLASH2X_CS_INFO psFlash2xCSInfo;
 559         PFLASH_CS_INFO psFlashCSInfo ;
 560         PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
 561         UINT uiFlashBaseAdd; //Flash start address
 562         UINT uiActiveISOOffset; //Active ISO offset choosen before f/w download
 563         FLASH2X_SECTION_VAL eActiveISO; //Active ISO section val
 564         FLASH2X_SECTION_VAL eActiveDSD; //Active DSD val choosen before f/w download
 565         UINT uiActiveDSDOffsetAtFwDld;  //For accessing Active DSD choosen before f/w download
 566         UINT uiFlashLayoutMajorVersion ;
 567         UINT uiFlashLayoutMinorVersion;
 568         BOOLEAN bAllDSDWriteAllow ;
 569         BOOLEAN bSigCorrupted ;
 570         //this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately.
 571         BOOLEAN bHeaderChangeAllowed ;
 572         INT SelectedChip ;
 573         BOOLEAN bEndPointHalted;
 574         //while bFlashRawRead will be true, Driver  ignore map lay out and consider flash as of without any map.
 575         BOOLEAN bFlashRawRead;
 576         BOOLEAN                 bPreparingForLowPowerMode ;
 577         BOOLEAN bDoSuspend ;
 578         UINT syscfgBefFwDld ;
 579         BOOLEAN StopAllXaction ;
 580         UINT32  liTimeSinceLastNetEntry; //Used to Support extended CAPI requirements from
 581         struct semaphore        LowPowerModeSync;
 582         ULONG   liDrainCalculated;
 583         UINT gpioBitMap;
 584
 585     S_BCM_DEBUG_STATE stDebugState;
 586
 587 };
 588 typedef struct _MINI_ADAPTER MINI_ADAPTER, *PMINI_ADAPTER;
 589
 590 #define GET_BCM_ADAPTER(net_dev)        netdev_priv(net_dev)
 591
 592 struct _ETH_HEADER_STRUC {
 593     UCHAR       au8DestinationAddress[6];
 594     UCHAR       au8SourceAddress[6];
 595     USHORT      u16Etype;
 596 }__attribute__((packed));
 597 typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC, *PETH_HEADER_STRUC;
 598
 599
 600 typedef struct FirmwareInfo
 601 {
 602         void __user *   pvMappedFirmwareAddress;
 603         ULONG           u32FirmwareLength;
 604         ULONG           u32StartingAddress;
 605 }__attribute__((packed)) FIRMWARE_INFO, *PFIRMWARE_INFO;
 606
 607 // holds the value of net_device structure..
 608 extern struct net_device *gblpnetdev;
 609 typedef struct _cntl_pkt{
 610         PMINI_ADAPTER   Adapter;
 611         PLEADER                 PLeader;
 612 }cntl_pkt;
 613 typedef LINK_REQUEST CONTROL_MESSAGE;
 614
 615 typedef struct _DDR_SETTING
 616 {
 617         ULONG ulRegAddress;
 618         ULONG ulRegValue;
 619 }DDR_SETTING, *PDDR_SETTING;
 620 typedef DDR_SETTING DDR_SET_NODE, *PDDR_SET_NODE;
 621 INT
 622 InitAdapter(PMINI_ADAPTER psAdapter);
 623
 624 // =====================================================================
 625 // Beceem vendor request codes for EP0
 626 // =====================================================================
 627
 628 #define BCM_REQUEST_READ  0x2
 629 #define BCM_REQUEST_WRITE 0x1
 630 #define EP2_MPS_REG  0x0F0110A0
 631 #define EP2_MPS          0x40
 632
 633 #define EP2_CFG_REG  0x0F0110A8
 634 #define EP2_CFG_INT  0x27
 635 #define EP2_CFG_BULK 0x25
 636
 637 #define EP4_MPS_REG  0x0F0110F0
 638 #define EP4_MPS      0x8C
 639
 640 #define EP4_CFG_REG  0x0F0110F8
 641
 642 #define ISO_MPS_REG  0x0F0110C8
 643 #define ISO_MPS      0x00000000
 644
 645
 646 #define EP1 0
 647 #define EP2 1
 648 #define EP3 2
 649 #define EP4 3
 650 #define EP5 4
 651 #define EP6 5
 652
 653
 654 typedef enum eInterface_setting
 655 {
 656         DEFAULT_SETTING_0  = 0,
 657         ALTERNATE_SETTING_1 = 1,
 658 }INTERFACE_SETTING;
 659
 660 #endif  //__ADAPTER_H__
 661