drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2011 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 /*
  23  * Driver version
  24  */
  25 char qla2x00_version_str[40];
  26
  27 static int apidev_major;
  28
  29 /*
  30  * SRB allocation cache
  31  */
  32 static struct kmem_cache *srb_cachep;
  33
  34 /*
  35  * CT6 CTX allocation cache
  36  */
  37 static struct kmem_cache *ctx_cachep;
  38 /*
  39  * error level for logging
  40  */
  41 int ql_errlev = ql_log_all;
  42
  43 int ql2xlogintimeout = 20;
  44 module_param(ql2xlogintimeout, int, S_IRUGO);
  45 MODULE_PARM_DESC(ql2xlogintimeout,
  46                 "Login timeout value in seconds.");
  47
  48 int qlport_down_retry;
  49 module_param(qlport_down_retry, int, S_IRUGO);
  50 MODULE_PARM_DESC(qlport_down_retry,
  51                 "Maximum number of command retries to a port that returns "
  52                 "a PORT-DOWN status.");
  53
  54 int ql2xplogiabsentdevice;
  55 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  56 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  57                 "Option to enable PLOGI to devices that are not present after "
  58                 "a Fabric scan.  This is needed for several broken switches. "
  59                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  60
  61 int ql2xloginretrycount = 0;
  62 module_param(ql2xloginretrycount, int, S_IRUGO);
  63 MODULE_PARM_DESC(ql2xloginretrycount,
  64                 "Specify an alternate value for the NVRAM login retry count.");
  65
  66 int ql2xallocfwdump = 1;
  67 module_param(ql2xallocfwdump, int, S_IRUGO);
  68 MODULE_PARM_DESC(ql2xallocfwdump,
  69                 "Option to enable allocation of memory for a firmware dump "
  70                 "during HBA initialization.  Memory allocation requirements "
  71                 "vary by ISP type.  Default is 1 - allocate memory.");
  72
  73 int ql2xextended_error_logging;
  74 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  75 MODULE_PARM_DESC(ql2xextended_error_logging,
  76                 "Option to enable extended error logging,\n"
  77                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  78                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  79                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  80                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  81                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  82                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  83                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  84                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  85                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  86                 "\t\tDo LOGICAL OR of the value to enable more than one level");
  87
  88 int ql2xshiftctondsd = 6;
  89 module_param(ql2xshiftctondsd, int, S_IRUGO);
  90 MODULE_PARM_DESC(ql2xshiftctondsd,
  91                 "Set to control shifting of command type processing "
  92                 "based on total number of SG elements.");
  93
  94 static void qla2x00_free_device(scsi_qla_host_t *);
  95
  96 int ql2xfdmienable=1;
  97 module_param(ql2xfdmienable, int, S_IRUGO);
  98 MODULE_PARM_DESC(ql2xfdmienable,
  99                 "Enables FDMI registrations. "
 100                 "0 - no FDMI. Default is 1 - perform FDMI.");
 101
 102 #define MAX_Q_DEPTH    32
 103 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 104 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 105 MODULE_PARM_DESC(ql2xmaxqdepth,
 106                 "Maximum queue depth to report for target devices.");
 107
 108 /* Do not change the value of this after module load */
 109 int ql2xenabledif = 0;
 110 module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
 111 MODULE_PARM_DESC(ql2xenabledif,
 112                 " Enable T10-CRC-DIF "
 113                 " Default is 0 - No DIF Support. 1 - Enable it"
 114                 ", 2 - Enable DIF for all types, except Type 0.");
 115
 116 int ql2xenablehba_err_chk = 2;
 117 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 118 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 119                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 120                 " Default is 1.\n"
 121                 "  0 -- Error isolation disabled\n"
 122                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 123                 "  2 -- Error isolation enabled for all Types\n");
 124
 125 int ql2xiidmaenable=1;
 126 module_param(ql2xiidmaenable, int, S_IRUGO);
 127 MODULE_PARM_DESC(ql2xiidmaenable,
 128                 "Enables iIDMA settings "
 129                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 130
 131 int ql2xmaxqueues = 1;
 132 module_param(ql2xmaxqueues, int, S_IRUGO);
 133 MODULE_PARM_DESC(ql2xmaxqueues,
 134                 "Enables MQ settings "
 135                 "Default is 1 for single queue. Set it to number "
 136                 "of queues in MQ mode.");
 137
 138 int ql2xmultique_tag;
 139 module_param(ql2xmultique_tag, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xmultique_tag,
 141                 "Enables CPU affinity settings for the driver "
 142                 "Default is 0 for no affinity of request and response IO. "
 143                 "Set it to 1 to turn on the cpu affinity.");
 144
 145 int ql2xfwloadbin;
 146 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 147 MODULE_PARM_DESC(ql2xfwloadbin,
 148                 "Option to specify location from which to load ISP firmware:.\n"
 149                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 150                 "      interface.\n"
 151                 " 1 -- load firmware from flash.\n"
 152                 " 0 -- use default semantics.\n");
 153
 154 int ql2xetsenable;
 155 module_param(ql2xetsenable, int, S_IRUGO);
 156 MODULE_PARM_DESC(ql2xetsenable,
 157                 "Enables firmware ETS burst."
 158                 "Default is 0 - skip ETS enablement.");
 159
 160 int ql2xdbwr = 1;
 161 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 162 MODULE_PARM_DESC(ql2xdbwr,
 163                 "Option to specify scheme for request queue posting.\n"
 164                 " 0 -- Regular doorbell.\n"
 165                 " 1 -- CAMRAM doorbell (faster).\n");
 166
 167 int ql2xtargetreset = 1;
 168 module_param(ql2xtargetreset, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xtargetreset,
 170                  "Enable target reset."
 171                  "Default is 1 - use hw defaults.");
 172
 173 int ql2xgffidenable;
 174 module_param(ql2xgffidenable, int, S_IRUGO);
 175 MODULE_PARM_DESC(ql2xgffidenable,
 176                 "Enables GFF_ID checks of port type. "
 177                 "Default is 0 - Do not use GFF_ID information.");
 178
 179 int ql2xasynctmfenable;
 180 module_param(ql2xasynctmfenable, int, S_IRUGO);
 181 MODULE_PARM_DESC(ql2xasynctmfenable,
 182                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 183                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 184
 185 int ql2xdontresethba;
 186 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 187 MODULE_PARM_DESC(ql2xdontresethba,
 188                 "Option to specify reset behaviour.\n"
 189                 " 0 (Default) -- Reset on failure.\n"
 190                 " 1 -- Do not reset on failure.\n");
 191
 192 uint ql2xmaxlun = MAX_LUNS;
 193 module_param(ql2xmaxlun, uint, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xmaxlun,
 195                 "Defines the maximum LU number to register with the SCSI "
 196                 "midlayer. Default is 65535.");
 197
 198 int ql2xmdcapmask = 0x1F;
 199 module_param(ql2xmdcapmask, int, S_IRUGO);
 200 MODULE_PARM_DESC(ql2xmdcapmask,
 201                 "Set the Minidump driver capture mask level. "
 202                 "Default is 0x7F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 203
 204 int ql2xmdenable = 1;
 205 module_param(ql2xmdenable, int, S_IRUGO);
 206 MODULE_PARM_DESC(ql2xmdenable,
 207                 "Enable/disable MiniDump. "
 208                 "0 - MiniDump disabled. "
 209                 "1 (Default) - MiniDump enabled.");
 210
 211 /*
 212  * SCSI host template entry points
 213  */
 214 static int qla2xxx_slave_configure(struct scsi_device * device);
 215 static int qla2xxx_slave_alloc(struct scsi_device *);
 216 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 217 static void qla2xxx_scan_start(struct Scsi_Host *);
 218 static void qla2xxx_slave_destroy(struct scsi_device *);
 219 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 220 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 221 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 222 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 223 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 224 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 225
 226 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 227 static int qla2x00_change_queue_type(struct scsi_device *, int);
 228
 229 struct scsi_host_template qla2xxx_driver_template = {
 230         .module                 = THIS_MODULE,
 231         .name                   = QLA2XXX_DRIVER_NAME,
 232         .queuecommand           = qla2xxx_queuecommand,
 233
 234         .eh_abort_handler       = qla2xxx_eh_abort,
 235         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 236         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 237         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 238         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 239
 240         .slave_configure        = qla2xxx_slave_configure,
 241
 242         .slave_alloc            = qla2xxx_slave_alloc,
 243         .slave_destroy          = qla2xxx_slave_destroy,
 244         .scan_finished          = qla2xxx_scan_finished,
 245         .scan_start             = qla2xxx_scan_start,
 246         .change_queue_depth     = qla2x00_change_queue_depth,
 247         .change_queue_type      = qla2x00_change_queue_type,
 248         .this_id                = -1,
 249         .cmd_per_lun            = 3,
 250         .use_clustering         = ENABLE_CLUSTERING,
 251         .sg_tablesize           = SG_ALL,
 252
 253         .max_sectors            = 0xFFFF,
 254         .shost_attrs            = qla2x00_host_attrs,
 255 };
 256
 257 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 258 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 259
 260 /* TODO Convert to inlines
 261  *
 262  * Timer routines
 263  */
 264
 265 __inline__ void
 266 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 267 {
 268         init_timer(&vha->timer);
 269         vha->timer.expires = jiffies + interval * HZ;
 270         vha->timer.data = (unsigned long)vha;
 271         vha->timer.function = (void (*)(unsigned long))func;
 272         add_timer(&vha->timer);
 273         vha->timer_active = 1;
 274 }
 275
 276 static inline void
 277 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 278 {
 279         /* Currently used for 82XX only. */
 280         if (vha->device_flags & DFLG_DEV_FAILED) {
 281                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 282                     "Device in a failed state, returning.\n");
 283                 return;
 284         }
 285
 286         mod_timer(&vha->timer, jiffies + interval * HZ);
 287 }
 288
 289 static __inline__ void
 290 qla2x00_stop_timer(scsi_qla_host_t *vha)
 291 {
 292         del_timer_sync(&vha->timer);
 293         vha->timer_active = 0;
 294 }
 295
 296 static int qla2x00_do_dpc(void *data);
 297
 298 static void qla2x00_rst_aen(scsi_qla_host_t *);
 299
 300 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 301         struct req_que **, struct rsp_que **);
 302 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 303 static void qla2x00_mem_free(struct qla_hw_data *);
 304 static void qla2x00_sp_free_dma(srb_t *);
 305
 306 /* -------------------------------------------------------------------------- */
 307 static int qla2x00_alloc_queues(struct qla_hw_data *ha)
 308 {
 309         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 310         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 311                                 GFP_KERNEL);
 312         if (!ha->req_q_map) {
 313                 ql_log(ql_log_fatal, vha, 0x003b,
 314                     "Unable to allocate memory for request queue ptrs.\n");
 315                 goto fail_req_map;
 316         }
 317
 318         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 319                                 GFP_KERNEL);
 320         if (!ha->rsp_q_map) {
 321                 ql_log(ql_log_fatal, vha, 0x003c,
 322                     "Unable to allocate memory for response queue ptrs.\n");
 323                 goto fail_rsp_map;
 324         }
 325         set_bit(0, ha->rsp_qid_map);
 326         set_bit(0, ha->req_qid_map);
 327         return 1;
 328
 329 fail_rsp_map:
 330         kfree(ha->req_q_map);
 331         ha->req_q_map = NULL;
 332 fail_req_map:
 333         return -ENOMEM;
 334 }
 335
 336 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 337 {
 338         if (req && req->ring)
 339                 dma_free_coherent(&ha->pdev->dev,
 340                 (req->length + 1) * sizeof(request_t),
 341                 req->ring, req->dma);
 342
 343         kfree(req);
 344         req = NULL;
 345 }
 346
 347 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 348 {
 349         if (rsp && rsp->ring)
 350                 dma_free_coherent(&ha->pdev->dev,
 351                 (rsp->length + 1) * sizeof(response_t),
 352                 rsp->ring, rsp->dma);
 353
 354         kfree(rsp);
 355         rsp = NULL;
 356 }
 357
 358 static void qla2x00_free_queues(struct qla_hw_data *ha)
 359 {
 360         struct req_que *req;
 361         struct rsp_que *rsp;
 362         int cnt;
 363
 364         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 365                 req = ha->req_q_map[cnt];
 366                 qla2x00_free_req_que(ha, req);
 367         }
 368         kfree(ha->req_q_map);
 369         ha->req_q_map = NULL;
 370
 371         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 372                 rsp = ha->rsp_q_map[cnt];
 373                 qla2x00_free_rsp_que(ha, rsp);
 374         }
 375         kfree(ha->rsp_q_map);
 376         ha->rsp_q_map = NULL;
 377 }
 378
 379 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 380 {
 381         uint16_t options = 0;
 382         int ques, req, ret;
 383         struct qla_hw_data *ha = vha->hw;
 384
 385         if (!(ha->fw_attributes & BIT_6)) {
 386                 ql_log(ql_log_warn, vha, 0x00d8,
 387                     "Firmware is not multi-queue capable.\n");
 388                 goto fail;
 389         }
 390         if (ql2xmultique_tag) {
 391                 /* create a request queue for IO */
 392                 options |= BIT_7;
 393                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 394                         QLA_DEFAULT_QUE_QOS);
 395                 if (!req) {
 396                         ql_log(ql_log_warn, vha, 0x00e0,
 397                             "Failed to create request queue.\n");
 398                         goto fail;
 399                 }
 400                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 401                 vha->req = ha->req_q_map[req];
 402                 options |= BIT_1;
 403                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 404                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 405                         if (!ret) {
 406                                 ql_log(ql_log_warn, vha, 0x00e8,
 407                                     "Failed to create response queue.\n");
 408                                 goto fail2;
 409                         }
 410                 }
 411                 ha->flags.cpu_affinity_enabled = 1;
 412                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 413                     "CPU affinity mode enalbed, "
 414                     "no. of response queues:%d no. of request queues:%d.\n",
 415                     ha->max_rsp_queues, ha->max_req_queues);
 416                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 417                     "CPU affinity mode enalbed, "
 418                     "no. of response queues:%d no. of request queues:%d.\n",
 419                     ha->max_rsp_queues, ha->max_req_queues);
 420         }
 421         return 0;
 422 fail2:
 423         qla25xx_delete_queues(vha);
 424         destroy_workqueue(ha->wq);
 425         ha->wq = NULL;
 426         vha->req = ha->req_q_map[0];
 427 fail:
 428         ha->mqenable = 0;
 429         kfree(ha->req_q_map);
 430         kfree(ha->rsp_q_map);
 431         ha->max_req_queues = ha->max_rsp_queues = 1;
 432         return 1;
 433 }
 434
 435 static char *
 436 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 437 {
 438         struct qla_hw_data *ha = vha->hw;
 439         static char *pci_bus_modes[] = {
 440                 "33", "66", "100", "133",
 441         };
 442         uint16_t pci_bus;
 443
 444         strcpy(str, "PCI");
 445         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 446         if (pci_bus) {
 447                 strcat(str, "-X (");
 448                 strcat(str, pci_bus_modes[pci_bus]);
 449         } else {
 450                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 451                 strcat(str, " (");
 452                 strcat(str, pci_bus_modes[pci_bus]);
 453         }
 454         strcat(str, " MHz)");
 455
 456         return (str);
 457 }
 458
 459 static char *
 460 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 461 {
 462         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 463         struct qla_hw_data *ha = vha->hw;
 464         uint32_t pci_bus;
 465         int pcie_reg;
 466
 467         pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
 468         if (pcie_reg) {
 469                 char lwstr[6];
 470                 uint16_t pcie_lstat, lspeed, lwidth;
 471
 472                 pcie_reg += 0x12;
 473                 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
 474                 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
 475                 lwidth = (pcie_lstat &
 476                     (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
 477
 478                 strcpy(str, "PCIe (");
 479                 if (lspeed == 1)
 480                         strcat(str, "2.5GT/s ");
 481                 else if (lspeed == 2)
 482                         strcat(str, "5.0GT/s ");
 483                 else
 484                         strcat(str, "<unknown> ");
 485                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 486                 strcat(str, lwstr);
 487
 488                 return str;
 489         }
 490
 491         strcpy(str, "PCI");
 492         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 493         if (pci_bus == 0 || pci_bus == 8) {
 494                 strcat(str, " (");
 495                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 496         } else {
 497                 strcat(str, "-X ");
 498                 if (pci_bus & BIT_2)
 499                         strcat(str, "Mode 2");
 500                 else
 501                         strcat(str, "Mode 1");
 502                 strcat(str, " (");
 503                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 504         }
 505         strcat(str, " MHz)");
 506
 507         return str;
 508 }
 509
 510 static char *
 511 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 512 {
 513         char un_str[10];
 514         struct qla_hw_data *ha = vha->hw;
 515
 516         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 517             ha->fw_minor_version,
 518             ha->fw_subminor_version);
 519
 520         if (ha->fw_attributes & BIT_9) {
 521                 strcat(str, "FLX");
 522                 return (str);
 523         }
 524
 525         switch (ha->fw_attributes & 0xFF) {
 526         case 0x7:
 527                 strcat(str, "EF");
 528                 break;
 529         case 0x17:
 530                 strcat(str, "TP");
 531                 break;
 532         case 0x37:
 533                 strcat(str, "IP");
 534                 break;
 535         case 0x77:
 536                 strcat(str, "VI");
 537                 break;
 538         default:
 539                 sprintf(un_str, "(%x)", ha->fw_attributes);
 540                 strcat(str, un_str);
 541                 break;
 542         }
 543         if (ha->fw_attributes & 0x100)
 544                 strcat(str, "X");
 545
 546         return (str);
 547 }
 548
 549 static char *
 550 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 551 {
 552         struct qla_hw_data *ha = vha->hw;
 553
 554         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 555             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 556         return str;
 557 }
 558
 559 static inline srb_t *
 560 qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
 561         struct scsi_cmnd *cmd)
 562 {
 563         srb_t *sp;
 564         struct qla_hw_data *ha = vha->hw;
 565
 566         sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
 567         if (!sp) {
 568                 ql_log(ql_log_warn, vha, 0x3006,
 569                     "Memory allocation failed for sp.\n");
 570                 return sp;
 571         }
 572
 573         atomic_set(&sp->ref_count, 1);
 574         sp->fcport = fcport;
 575         sp->cmd = cmd;
 576         sp->flags = 0;
 577         CMD_SP(cmd) = (void *)sp;
 578         sp->ctx = NULL;
 579
 580         return sp;
 581 }
 582
 583 static int
 584 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 585 {
 586         scsi_qla_host_t *vha = shost_priv(host);
 587         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 588         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 589         struct qla_hw_data *ha = vha->hw;
 590         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 591         srb_t *sp;
 592         int rval;
 593
 594         if (ha->flags.eeh_busy) {
 595                 if (ha->flags.pci_channel_io_perm_failure) {
 596                         ql_dbg(ql_dbg_io, vha, 0x3001,
 597                             "PCI Channel IO permanent failure, exiting "
 598                             "cmd=%p.\n", cmd);
 599                         cmd->result = DID_NO_CONNECT << 16;
 600                 } else {
 601                         ql_dbg(ql_dbg_io, vha, 0x3002,
 602                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 603                         cmd->result = DID_REQUEUE << 16;
 604                 }
 605                 goto qc24_fail_command;
 606         }
 607
 608         rval = fc_remote_port_chkready(rport);
 609         if (rval) {
 610                 cmd->result = rval;
 611                 ql_dbg(ql_dbg_io, vha, 0x3003,
 612                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 613                     cmd, rval);
 614                 goto qc24_fail_command;
 615         }
 616
 617         if (!vha->flags.difdix_supported &&
 618                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 619                         ql_dbg(ql_dbg_io, vha, 0x3004,
 620                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 621                             cmd);
 622                         cmd->result = DID_NO_CONNECT << 16;
 623                         goto qc24_fail_command;
 624         }
 625         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 626                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 627                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 628                         ql_dbg(ql_dbg_io, vha, 0x3005,
 629                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 630                             atomic_read(&fcport->state),
 631                             atomic_read(&base_vha->loop_state));
 632                         cmd->result = DID_NO_CONNECT << 16;
 633                         goto qc24_fail_command;
 634                 }
 635                 goto qc24_target_busy;
 636         }
 637
 638         sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
 639         if (!sp)
 640                 goto qc24_host_busy;
 641
 642         rval = ha->isp_ops->start_scsi(sp);
 643         if (rval != QLA_SUCCESS) {
 644                 ql_dbg(ql_dbg_io, vha, 0x3013,
 645                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 646                 goto qc24_host_busy_free_sp;
 647         }
 648
 649         return 0;
 650
 651 qc24_host_busy_free_sp:
 652         qla2x00_sp_free_dma(sp);
 653         mempool_free(sp, ha->srb_mempool);
 654
 655 qc24_host_busy:
 656         return SCSI_MLQUEUE_HOST_BUSY;
 657
 658 qc24_target_busy:
 659         return SCSI_MLQUEUE_TARGET_BUSY;
 660
 661 qc24_fail_command:
 662         cmd->scsi_done(cmd);
 663
 664         return 0;
 665 }
 666
 667 /*
 668  * qla2x00_eh_wait_on_command
 669  *    Waits for the command to be returned by the Firmware for some
 670  *    max time.
 671  *
 672  * Input:
 673  *    cmd = Scsi Command to wait on.
 674  *
 675  * Return:
 676  *    Not Found : 0
 677  *    Found : 1
 678  */
 679 static int
 680 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 681 {
 682 #define ABORT_POLLING_PERIOD    1000
 683 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 684         unsigned long wait_iter = ABORT_WAIT_ITER;
 685         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 686         struct qla_hw_data *ha = vha->hw;
 687         int ret = QLA_SUCCESS;
 688
 689         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 690                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 691                     "Return:eh_wait.\n");
 692                 return ret;
 693         }
 694
 695         while (CMD_SP(cmd) && wait_iter--) {
 696                 msleep(ABORT_POLLING_PERIOD);
 697         }
 698         if (CMD_SP(cmd))
 699                 ret = QLA_FUNCTION_FAILED;
 700
 701         return ret;
 702 }
 703
 704 /*
 705  * qla2x00_wait_for_hba_online
 706  *    Wait till the HBA is online after going through
 707  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 708  *    finally HBA is disabled ie marked offline
 709  *
 710  * Input:
 711  *     ha - pointer to host adapter structure
 712  *
 713  * Note:
 714  *    Does context switching-Release SPIN_LOCK
 715  *    (if any) before calling this routine.
 716  *
 717  * Return:
 718  *    Success (Adapter is online) : 0
 719  *    Failed  (Adapter is offline/disabled) : 1
 720  */
 721 int
 722 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 723 {
 724         int             return_status;
 725         unsigned long   wait_online;
 726         struct qla_hw_data *ha = vha->hw;
 727         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 728
 729         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 730         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 731             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 732             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 733             ha->dpc_active) && time_before(jiffies, wait_online)) {
 734
 735                 msleep(1000);
 736         }
 737         if (base_vha->flags.online)
 738                 return_status = QLA_SUCCESS;
 739         else
 740                 return_status = QLA_FUNCTION_FAILED;
 741
 742         return (return_status);
 743 }
 744
 745 /*
 746  * qla2x00_wait_for_reset_ready
 747  *    Wait till the HBA is online after going through
 748  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 749  *    finally HBA is disabled ie marked offline or flash
 750  *    operations are in progress.
 751  *
 752  * Input:
 753  *     ha - pointer to host adapter structure
 754  *
 755  * Note:
 756  *    Does context switching-Release SPIN_LOCK
 757  *    (if any) before calling this routine.
 758  *
 759  * Return:
 760  *    Success (Adapter is online/no flash ops) : 0
 761  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 762  */
 763 static int
 764 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 765 {
 766         int             return_status;
 767         unsigned long   wait_online;
 768         struct qla_hw_data *ha = vha->hw;
 769         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 770
 771         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 772         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 773             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 774             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 775             ha->optrom_state != QLA_SWAITING ||
 776             ha->dpc_active) && time_before(jiffies, wait_online))
 777                 msleep(1000);
 778
 779         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 780                 return_status = QLA_SUCCESS;
 781         else
 782                 return_status = QLA_FUNCTION_FAILED;
 783
 784         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 785             "%s return status=%d.\n", __func__, return_status);
 786
 787         return return_status;
 788 }
 789
 790 int
 791 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 792 {
 793         int             return_status;
 794         unsigned long   wait_reset;
 795         struct qla_hw_data *ha = vha->hw;
 796         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 797
 798         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 799         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 800             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 801             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 802             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 803
 804                 msleep(1000);
 805
 806                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 807                     ha->flags.chip_reset_done)
 808                         break;
 809         }
 810         if (ha->flags.chip_reset_done)
 811                 return_status = QLA_SUCCESS;
 812         else
 813                 return_status = QLA_FUNCTION_FAILED;
 814
 815         return return_status;
 816 }
 817
 818 static void
 819 sp_get(struct srb *sp)
 820 {
 821         atomic_inc(&sp->ref_count);
 822 }
 823
 824 /**************************************************************************
 825 * qla2xxx_eh_abort
 826 *
 827 * Description:
 828 *    The abort function will abort the specified command.
 829 *
 830 * Input:
 831 *    cmd = Linux SCSI command packet to be aborted.
 832 *
 833 * Returns:
 834 *    Either SUCCESS or FAILED.
 835 *
 836 * Note:
 837 *    Only return FAILED if command not returned by firmware.
 838 **************************************************************************/
 839 static int
 840 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 841 {
 842         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 843         srb_t *sp;
 844         int ret;
 845         unsigned int id, lun;
 846         unsigned long flags;
 847         int wait = 0;
 848         struct qla_hw_data *ha = vha->hw;
 849
 850         ql_dbg(ql_dbg_taskm, vha, 0x8000,
 851             "Entered %s for cmd=%p.\n", __func__, cmd);
 852         if (!CMD_SP(cmd))
 853                 return SUCCESS;
 854
 855         ret = fc_block_scsi_eh(cmd);
 856         ql_dbg(ql_dbg_taskm, vha, 0x8001,
 857             "Return value of fc_block_scsi_eh=%d.\n", ret);
 858         if (ret != 0)
 859                 return ret;
 860         ret = SUCCESS;
 861
 862         id = cmd->device->id;
 863         lun = cmd->device->lun;
 864
 865         spin_lock_irqsave(&ha->hardware_lock, flags);
 866         sp = (srb_t *) CMD_SP(cmd);
 867         if (!sp) {
 868                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 869                 return SUCCESS;
 870         }
 871
 872         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 873             "Aborting sp=%p cmd=%p from RISC ", sp, cmd);
 874
 875         /* Get a reference to the sp and drop the lock.*/
 876         sp_get(sp);
 877
 878         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 879         if (ha->isp_ops->abort_command(sp)) {
 880                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 881                     "Abort command mbx failed for cmd=%p.\n", cmd);
 882         } else {
 883                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 884                     "Abort command mbx success.\n");
 885                 wait = 1;
 886         }
 887
 888         spin_lock_irqsave(&ha->hardware_lock, flags);
 889         qla2x00_sp_compl(ha, sp);
 890         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 891
 892         /* Did the command return during mailbox execution? */
 893         if (ret == FAILED && !CMD_SP(cmd))
 894                 ret = SUCCESS;
 895
 896         /* Wait for the command to be returned. */
 897         if (wait) {
 898                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 899                         ql_log(ql_log_warn, vha, 0x8006,
 900                             "Abort handler timed out for cmd=%p.\n", cmd);
 901                         ret = FAILED;
 902                 }
 903         }
 904
 905         ql_log(ql_log_info, vha, 0x801c,
 906             "Abort command issued --  %d %x.\n", wait, ret);
 907
 908         return ret;
 909 }
 910
 911 int
 912 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
 913         unsigned int l, enum nexus_wait_type type)
 914 {
 915         int cnt, match, status;
 916         unsigned long flags;
 917         struct qla_hw_data *ha = vha->hw;
 918         struct req_que *req;
 919         srb_t *sp;
 920
 921         status = QLA_SUCCESS;
 922
 923         spin_lock_irqsave(&ha->hardware_lock, flags);
 924         req = vha->req;
 925         for (cnt = 1; status == QLA_SUCCESS &&
 926                 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
 927                 sp = req->outstanding_cmds[cnt];
 928                 if (!sp)
 929                         continue;
 930                 if ((sp->ctx) && !IS_PROT_IO(sp))
 931                         continue;
 932                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
 933                         continue;
 934                 match = 0;
 935                 switch (type) {
 936                 case WAIT_HOST:
 937                         match = 1;
 938                         break;
 939                 case WAIT_TARGET:
 940                         match = sp->cmd->device->id == t;
 941                         break;
 942                 case WAIT_LUN:
 943                         match = (sp->cmd->device->id == t &&
 944                                 sp->cmd->device->lun == l);
 945                         break;
 946                 }
 947                 if (!match)
 948                         continue;
 949
 950                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 951                 status = qla2x00_eh_wait_on_command(sp->cmd);
 952                 spin_lock_irqsave(&ha->hardware_lock, flags);
 953         }
 954         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 955
 956         return status;
 957 }
 958
 959 static char *reset_errors[] = {
 960         "HBA not online",
 961         "HBA not ready",
 962         "Task management failed",
 963         "Waiting for command completions",
 964 };
 965
 966 static int
 967 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
 968     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
 969 {
 970         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 971         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 972         int err;
 973
 974         if (!fcport) {
 975                 ql_log(ql_log_warn, vha, 0x8007,
 976                     "fcport is NULL.\n");
 977                 return FAILED;
 978         }
 979
 980         err = fc_block_scsi_eh(cmd);
 981         ql_dbg(ql_dbg_taskm, vha, 0x8008,
 982             "fc_block_scsi_eh ret=%d.\n", err);
 983         if (err != 0)
 984                 return err;
 985
 986         ql_log(ql_log_info, vha, 0x8009,
 987             "%s RESET ISSUED for id %d lun %d cmd=%p.\n", name,
 988             cmd->device->id, cmd->device->lun, cmd);
 989
 990         err = 0;
 991         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
 992                 ql_log(ql_log_warn, vha, 0x800a,
 993                     "Wait for hba online failed for cmd=%p.\n", cmd);
 994                 goto eh_reset_failed;
 995         }
 996         err = 2;
 997         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
 998                 != QLA_SUCCESS) {
 999                 ql_log(ql_log_warn, vha, 0x800c,
1000                     "do_reset failed for cmd=%p.\n", cmd);
1001                 goto eh_reset_failed;
1002         }
1003         err = 3;
1004         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1005             cmd->device->lun, type) != QLA_SUCCESS) {
1006                 ql_log(ql_log_warn, vha, 0x800d,
1007                     "wait for peding cmds failed for cmd=%p.\n", cmd);
1008                 goto eh_reset_failed;
1009         }
1010
1011         ql_log(ql_log_info, vha, 0x800e,
1012             "%s RESET SUCCEEDED for id %d lun %d cmd=%p.\n", name,
1013             cmd->device->id, cmd->device->lun, cmd);
1014
1015         return SUCCESS;
1016
1017 eh_reset_failed:
1018         ql_log(ql_log_info, vha, 0x800f,
1019             "%s RESET FAILED: %s for id %d lun %d cmd=%p.\n", name,
1020             reset_errors[err], cmd->device->id, cmd->device->lun);
1021         return FAILED;
1022 }
1023
1024 static int
1025 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1026 {
1027         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1028         struct qla_hw_data *ha = vha->hw;
1029
1030         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1031             ha->isp_ops->lun_reset);
1032 }
1033
1034 static int
1035 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1036 {
1037         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1038         struct qla_hw_data *ha = vha->hw;
1039
1040         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1041             ha->isp_ops->target_reset);
1042 }
1043
1044 /**************************************************************************
1045 * qla2xxx_eh_bus_reset
1046 *
1047 * Description:
1048 *    The bus reset function will reset the bus and abort any executing
1049 *    commands.
1050 *
1051 * Input:
1052 *    cmd = Linux SCSI command packet of the command that cause the
1053 *          bus reset.
1054 *
1055 * Returns:
1056 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1057 *
1058 **************************************************************************/
1059 static int
1060 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1061 {
1062         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1063         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1064         int ret = FAILED;
1065         unsigned int id, lun;
1066
1067         id = cmd->device->id;
1068         lun = cmd->device->lun;
1069
1070         if (!fcport) {
1071                 ql_log(ql_log_warn, vha, 0x8010,
1072                     "fcport is NULL.\n");
1073                 return ret;
1074         }
1075
1076         ret = fc_block_scsi_eh(cmd);
1077         ql_dbg(ql_dbg_taskm, vha, 0x8011,
1078             "fc_block_scsi_eh ret=%d.\n", ret);
1079         if (ret != 0)
1080                 return ret;
1081         ret = FAILED;
1082
1083         ql_log(ql_log_info, vha, 0x8012,
1084             "BUS RESET ISSUED for id %d lun %d.\n", id, lun);
1085
1086         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1087                 ql_log(ql_log_fatal, vha, 0x8013,
1088                     "Wait for hba online failed board disabled.\n");
1089                 goto eh_bus_reset_done;
1090         }
1091
1092         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1093                 ret = SUCCESS;
1094
1095         if (ret == FAILED)
1096                 goto eh_bus_reset_done;
1097
1098         /* Flush outstanding commands. */
1099         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1100             QLA_SUCCESS) {
1101                 ql_log(ql_log_warn, vha, 0x8014,
1102                     "Wait for pending commands failed.\n");
1103                 ret = FAILED;
1104         }
1105
1106 eh_bus_reset_done:
1107         ql_log(ql_log_warn, vha, 0x802b,
1108             "BUS RESET %s.\n", (ret == FAILED) ? "FAILED" : "SUCCEDED");
1109
1110         return ret;
1111 }
1112
1113 /**************************************************************************
1114 * qla2xxx_eh_host_reset
1115 *
1116 * Description:
1117 *    The reset function will reset the Adapter.
1118 *
1119 * Input:
1120 *      cmd = Linux SCSI command packet of the command that cause the
1121 *            adapter reset.
1122 *
1123 * Returns:
1124 *      Either SUCCESS or FAILED.
1125 *
1126 * Note:
1127 **************************************************************************/
1128 static int
1129 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1130 {
1131         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1132         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1133         struct qla_hw_data *ha = vha->hw;
1134         int ret = FAILED;
1135         unsigned int id, lun;
1136         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1137
1138         id = cmd->device->id;
1139         lun = cmd->device->lun;
1140
1141         if (!fcport) {
1142                 ql_log(ql_log_warn, vha, 0x8016,
1143                     "fcport is NULL.\n");
1144                 return ret;
1145         }
1146
1147         ret = fc_block_scsi_eh(cmd);
1148         ql_dbg(ql_dbg_taskm, vha, 0x8017,
1149             "fc_block_scsi_eh ret=%d.\n", ret);
1150         if (ret != 0)
1151                 return ret;
1152         ret = FAILED;
1153
1154         ql_log(ql_log_info, vha, 0x8018,
1155             "ADAPTER RESET ISSUED for id %d lun %d.\n", id, lun);
1156
1157         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1158                 goto eh_host_reset_lock;
1159
1160         if (vha != base_vha) {
1161                 if (qla2x00_vp_abort_isp(vha))
1162                         goto eh_host_reset_lock;
1163         } else {
1164                 if (IS_QLA82XX(vha->hw)) {
1165                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1166                                 /* Ctx reset success */
1167                                 ret = SUCCESS;
1168                                 goto eh_host_reset_lock;
1169                         }
1170                         /* fall thru if ctx reset failed */
1171                 }
1172                 if (ha->wq)
1173                         flush_workqueue(ha->wq);
1174
1175                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1176                 if (ha->isp_ops->abort_isp(base_vha)) {
1177                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1178                         /* failed. schedule dpc to try */
1179                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1180
1181                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1182                                 ql_log(ql_log_warn, vha, 0x802a,
1183                                     "wait for hba online failed.\n");
1184                                 goto eh_host_reset_lock;
1185                         }
1186                 }
1187                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1188         }
1189
1190         /* Waiting for command to be returned to OS.*/
1191         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1192                 QLA_SUCCESS)
1193                 ret = SUCCESS;
1194
1195 eh_host_reset_lock:
1196         qla_printk(KERN_INFO, ha, "%s: reset %s.\n", __func__,
1197             (ret == FAILED) ? "failed" : "succeeded");
1198
1199         return ret;
1200 }
1201
1202 /*
1203 * qla2x00_loop_reset
1204 *      Issue loop reset.
1205 *
1206 * Input:
1207 *      ha = adapter block pointer.
1208 *
1209 * Returns:
1210 *      0 = success
1211 */
1212 int
1213 qla2x00_loop_reset(scsi_qla_host_t *vha)
1214 {
1215         int ret;
1216         struct fc_port *fcport;
1217         struct qla_hw_data *ha = vha->hw;
1218
1219         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1220                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1221                         if (fcport->port_type != FCT_TARGET)
1222                                 continue;
1223
1224                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1225                         if (ret != QLA_SUCCESS) {
1226                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1227                                     "Bus Reset failed: Target Reset=%d "
1228                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1229                         }
1230                 }
1231         }
1232
1233         if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
1234                 ret = qla2x00_full_login_lip(vha);
1235                 if (ret != QLA_SUCCESS) {
1236                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1237                             "full_login_lip=%d.\n", ret);
1238                 }
1239                 atomic_set(&vha->loop_state, LOOP_DOWN);
1240                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1241                 qla2x00_mark_all_devices_lost(vha, 0);
1242         }
1243
1244         if (ha->flags.enable_lip_reset) {
1245                 ret = qla2x00_lip_reset(vha);
1246                 if (ret != QLA_SUCCESS)
1247                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1248                             "lip_reset failed (%d).\n", ret);
1249         }
1250
1251         /* Issue marker command only when we are going to start the I/O */
1252         vha->marker_needed = 1;
1253
1254         return QLA_SUCCESS;
1255 }
1256
1257 void
1258 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1259 {
1260         int que, cnt;
1261         unsigned long flags;
1262         srb_t *sp;
1263         struct srb_ctx *ctx;
1264         struct qla_hw_data *ha = vha->hw;
1265         struct req_que *req;
1266
1267         spin_lock_irqsave(&ha->hardware_lock, flags);
1268         for (que = 0; que < ha->max_req_queues; que++) {
1269                 req = ha->req_q_map[que];
1270                 if (!req)
1271                         continue;
1272                 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1273                         sp = req->outstanding_cmds[cnt];
1274                         if (sp) {
1275                                 req->outstanding_cmds[cnt] = NULL;
1276                                 if (!sp->ctx ||
1277                                         (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1278                                         IS_PROT_IO(sp)) {
1279                                         sp->cmd->result = res;
1280                                         qla2x00_sp_compl(ha, sp);
1281                                 } else {
1282                                         ctx = sp->ctx;
1283                                         if (ctx->type == SRB_ELS_CMD_RPT ||
1284                                             ctx->type == SRB_ELS_CMD_HST ||
1285                                             ctx->type == SRB_CT_CMD) {
1286                                                 struct fc_bsg_job *bsg_job =
1287                                                     ctx->u.bsg_job;
1288                                                 if (bsg_job->request->msgcode
1289                                                     == FC_BSG_HST_CT)
1290                                                         kfree(sp->fcport);
1291                                                 bsg_job->req->errors = 0;
1292                                                 bsg_job->reply->result = res;
1293                                                 bsg_job->job_done(bsg_job);
1294                                                 kfree(sp->ctx);
1295                                                 mempool_free(sp,
1296                                                         ha->srb_mempool);
1297                                         } else {
1298                                                 ctx->u.iocb_cmd->free(sp);
1299                                         }
1300                                 }
1301                         }
1302                 }
1303         }
1304         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1305 }
1306
1307 static int
1308 qla2xxx_slave_alloc(struct scsi_device *sdev)
1309 {
1310         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1311
1312         if (!rport || fc_remote_port_chkready(rport))
1313                 return -ENXIO;
1314
1315         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1316
1317         return 0;
1318 }
1319
1320 static int
1321 qla2xxx_slave_configure(struct scsi_device *sdev)
1322 {
1323         scsi_qla_host_t *vha = shost_priv(sdev->host);
1324         struct req_que *req = vha->req;
1325
1326         if (sdev->tagged_supported)
1327                 scsi_activate_tcq(sdev, req->max_q_depth);
1328         else
1329                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1330         return 0;
1331 }
1332
1333 static void
1334 qla2xxx_slave_destroy(struct scsi_device *sdev)
1335 {
1336         sdev->hostdata = NULL;
1337 }
1338
1339 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1340 {
1341         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1342
1343         if (!scsi_track_queue_full(sdev, qdepth))
1344                 return;
1345
1346         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1347             "Queue depth adjusted-down "
1348             "to %d for scsi(%ld:%d:%d:%d).\n",
1349             sdev->queue_depth, fcport->vha->host_no,
1350             sdev->channel, sdev->id, sdev->lun);
1351 }
1352
1353 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1354 {
1355         fc_port_t *fcport = sdev->hostdata;
1356         struct scsi_qla_host *vha = fcport->vha;
1357         struct req_que *req = NULL;
1358
1359         req = vha->req;
1360         if (!req)
1361                 return;
1362
1363         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1364                 return;
1365
1366         if (sdev->ordered_tags)
1367                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1368         else
1369                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1370
1371         ql_dbg(ql_dbg_io, vha, 0x302a,
1372             "Queue depth adjusted-up to %d for "
1373             "scsi(%ld:%d:%d:%d).\n",
1374             sdev->queue_depth, fcport->vha->host_no,
1375             sdev->channel, sdev->id, sdev->lun);
1376 }
1377
1378 static int
1379 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1380 {
1381         switch (reason) {
1382         case SCSI_QDEPTH_DEFAULT:
1383                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1384                 break;
1385         case SCSI_QDEPTH_QFULL:
1386                 qla2x00_handle_queue_full(sdev, qdepth);
1387                 break;
1388         case SCSI_QDEPTH_RAMP_UP:
1389                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1390                 break;
1391         default:
1392                 return -EOPNOTSUPP;
1393         }
1394
1395         return sdev->queue_depth;
1396 }
1397
1398 static int
1399 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1400 {
1401         if (sdev->tagged_supported) {
1402                 scsi_set_tag_type(sdev, tag_type);
1403                 if (tag_type)
1404                         scsi_activate_tcq(sdev, sdev->queue_depth);
1405                 else
1406                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1407         } else
1408                 tag_type = 0;
1409
1410         return tag_type;
1411 }
1412
1413 /**
1414  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1415  * @ha: HA context
1416  *
1417  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1418  * supported addressing method.
1419  */
1420 static void
1421 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1422 {
1423         /* Assume a 32bit DMA mask. */
1424         ha->flags.enable_64bit_addressing = 0;
1425
1426         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1427                 /* Any upper-dword bits set? */
1428                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1429                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1430                         /* Ok, a 64bit DMA mask is applicable. */
1431                         ha->flags.enable_64bit_addressing = 1;
1432                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1433                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1434                         return;
1435                 }
1436         }
1437
1438         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1439         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1440 }
1441
1442 static void
1443 qla2x00_enable_intrs(struct qla_hw_data *ha)
1444 {
1445         unsigned long flags = 0;
1446         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1447
1448         spin_lock_irqsave(&ha->hardware_lock, flags);
1449         ha->interrupts_on = 1;
1450         /* enable risc and host interrupts */
1451         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1452         RD_REG_WORD(&reg->ictrl);
1453         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1454
1455 }
1456
1457 static void
1458 qla2x00_disable_intrs(struct qla_hw_data *ha)
1459 {
1460         unsigned long flags = 0;
1461         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1462
1463         spin_lock_irqsave(&ha->hardware_lock, flags);
1464         ha->interrupts_on = 0;
1465         /* disable risc and host interrupts */
1466         WRT_REG_WORD(&reg->ictrl, 0);
1467         RD_REG_WORD(&reg->ictrl);
1468         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1469 }
1470
1471 static void
1472 qla24xx_enable_intrs(struct qla_hw_data *ha)
1473 {
1474         unsigned long flags = 0;
1475         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1476
1477         spin_lock_irqsave(&ha->hardware_lock, flags);
1478         ha->interrupts_on = 1;
1479         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1480         RD_REG_DWORD(&reg->ictrl);
1481         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1482 }
1483
1484 static void
1485 qla24xx_disable_intrs(struct qla_hw_data *ha)
1486 {
1487         unsigned long flags = 0;
1488         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1489
1490         if (IS_NOPOLLING_TYPE(ha))
1491                 return;
1492         spin_lock_irqsave(&ha->hardware_lock, flags);
1493         ha->interrupts_on = 0;
1494         WRT_REG_DWORD(&reg->ictrl, 0);
1495         RD_REG_DWORD(&reg->ictrl);
1496         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1497 }
1498
1499 static struct isp_operations qla2100_isp_ops = {
1500         .pci_config             = qla2100_pci_config,
1501         .reset_chip             = qla2x00_reset_chip,
1502         .chip_diag              = qla2x00_chip_diag,
1503         .config_rings           = qla2x00_config_rings,
1504         .reset_adapter          = qla2x00_reset_adapter,
1505         .nvram_config           = qla2x00_nvram_config,
1506         .update_fw_options      = qla2x00_update_fw_options,
1507         .load_risc              = qla2x00_load_risc,
1508         .pci_info_str           = qla2x00_pci_info_str,
1509         .fw_version_str         = qla2x00_fw_version_str,
1510         .intr_handler           = qla2100_intr_handler,
1511         .enable_intrs           = qla2x00_enable_intrs,
1512         .disable_intrs          = qla2x00_disable_intrs,
1513         .abort_command          = qla2x00_abort_command,
1514         .target_reset           = qla2x00_abort_target,
1515         .lun_reset              = qla2x00_lun_reset,
1516         .fabric_login           = qla2x00_login_fabric,
1517         .fabric_logout          = qla2x00_fabric_logout,
1518         .calc_req_entries       = qla2x00_calc_iocbs_32,
1519         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1520         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1521         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1522         .read_nvram             = qla2x00_read_nvram_data,
1523         .write_nvram            = qla2x00_write_nvram_data,
1524         .fw_dump                = qla2100_fw_dump,
1525         .beacon_on              = NULL,
1526         .beacon_off             = NULL,
1527         .beacon_blink           = NULL,
1528         .read_optrom            = qla2x00_read_optrom_data,
1529         .write_optrom           = qla2x00_write_optrom_data,
1530         .get_flash_version      = qla2x00_get_flash_version,
1531         .start_scsi             = qla2x00_start_scsi,
1532         .abort_isp              = qla2x00_abort_isp,
1533 };
1534
1535 static struct isp_operations qla2300_isp_ops = {
1536         .pci_config             = qla2300_pci_config,
1537         .reset_chip             = qla2x00_reset_chip,
1538         .chip_diag              = qla2x00_chip_diag,
1539         .config_rings           = qla2x00_config_rings,
1540         .reset_adapter          = qla2x00_reset_adapter,
1541         .nvram_config           = qla2x00_nvram_config,
1542         .update_fw_options      = qla2x00_update_fw_options,
1543         .load_risc              = qla2x00_load_risc,
1544         .pci_info_str           = qla2x00_pci_info_str,
1545         .fw_version_str         = qla2x00_fw_version_str,
1546         .intr_handler           = qla2300_intr_handler,
1547         .enable_intrs           = qla2x00_enable_intrs,
1548         .disable_intrs          = qla2x00_disable_intrs,
1549         .abort_command          = qla2x00_abort_command,
1550         .target_reset           = qla2x00_abort_target,
1551         .lun_reset              = qla2x00_lun_reset,
1552         .fabric_login           = qla2x00_login_fabric,
1553         .fabric_logout          = qla2x00_fabric_logout,
1554         .calc_req_entries       = qla2x00_calc_iocbs_32,
1555         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1556         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1557         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1558         .read_nvram             = qla2x00_read_nvram_data,
1559         .write_nvram            = qla2x00_write_nvram_data,
1560         .fw_dump                = qla2300_fw_dump,
1561         .beacon_on              = qla2x00_beacon_on,
1562         .beacon_off             = qla2x00_beacon_off,
1563         .beacon_blink           = qla2x00_beacon_blink,
1564         .read_optrom            = qla2x00_read_optrom_data,
1565         .write_optrom           = qla2x00_write_optrom_data,
1566         .get_flash_version      = qla2x00_get_flash_version,
1567         .start_scsi             = qla2x00_start_scsi,
1568         .abort_isp              = qla2x00_abort_isp,
1569 };
1570
1571 static struct isp_operations qla24xx_isp_ops = {
1572         .pci_config             = qla24xx_pci_config,
1573         .reset_chip             = qla24xx_reset_chip,
1574         .chip_diag              = qla24xx_chip_diag,
1575         .config_rings           = qla24xx_config_rings,
1576         .reset_adapter          = qla24xx_reset_adapter,
1577         .nvram_config           = qla24xx_nvram_config,
1578         .update_fw_options      = qla24xx_update_fw_options,
1579         .load_risc              = qla24xx_load_risc,
1580         .pci_info_str           = qla24xx_pci_info_str,
1581         .fw_version_str         = qla24xx_fw_version_str,
1582         .intr_handler           = qla24xx_intr_handler,
1583         .enable_intrs           = qla24xx_enable_intrs,
1584         .disable_intrs          = qla24xx_disable_intrs,
1585         .abort_command          = qla24xx_abort_command,
1586         .target_reset           = qla24xx_abort_target,
1587         .lun_reset              = qla24xx_lun_reset,
1588         .fabric_login           = qla24xx_login_fabric,
1589         .fabric_logout          = qla24xx_fabric_logout,
1590         .calc_req_entries       = NULL,
1591         .build_iocbs            = NULL,
1592         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1593         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1594         .read_nvram             = qla24xx_read_nvram_data,
1595         .write_nvram            = qla24xx_write_nvram_data,
1596         .fw_dump                = qla24xx_fw_dump,
1597         .beacon_on              = qla24xx_beacon_on,
1598         .beacon_off             = qla24xx_beacon_off,
1599         .beacon_blink           = qla24xx_beacon_blink,
1600         .read_optrom            = qla24xx_read_optrom_data,
1601         .write_optrom           = qla24xx_write_optrom_data,
1602         .get_flash_version      = qla24xx_get_flash_version,
1603         .start_scsi             = qla24xx_start_scsi,
1604         .abort_isp              = qla2x00_abort_isp,
1605 };
1606
1607 static struct isp_operations qla25xx_isp_ops = {
1608         .pci_config             = qla25xx_pci_config,
1609         .reset_chip             = qla24xx_reset_chip,
1610         .chip_diag              = qla24xx_chip_diag,
1611         .config_rings           = qla24xx_config_rings,
1612         .reset_adapter          = qla24xx_reset_adapter,
1613         .nvram_config           = qla24xx_nvram_config,
1614         .update_fw_options      = qla24xx_update_fw_options,
1615         .load_risc              = qla24xx_load_risc,
1616         .pci_info_str           = qla24xx_pci_info_str,
1617         .fw_version_str         = qla24xx_fw_version_str,
1618         .intr_handler           = qla24xx_intr_handler,
1619         .enable_intrs           = qla24xx_enable_intrs,
1620         .disable_intrs          = qla24xx_disable_intrs,
1621         .abort_command          = qla24xx_abort_command,
1622         .target_reset           = qla24xx_abort_target,
1623         .lun_reset              = qla24xx_lun_reset,
1624         .fabric_login           = qla24xx_login_fabric,
1625         .fabric_logout          = qla24xx_fabric_logout,
1626         .calc_req_entries       = NULL,
1627         .build_iocbs            = NULL,
1628         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1629         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1630         .read_nvram             = qla25xx_read_nvram_data,
1631         .write_nvram            = qla25xx_write_nvram_data,
1632         .fw_dump                = qla25xx_fw_dump,
1633         .beacon_on              = qla24xx_beacon_on,
1634         .beacon_off             = qla24xx_beacon_off,
1635         .beacon_blink           = qla24xx_beacon_blink,
1636         .read_optrom            = qla25xx_read_optrom_data,
1637         .write_optrom           = qla24xx_write_optrom_data,
1638         .get_flash_version      = qla24xx_get_flash_version,
1639         .start_scsi             = qla24xx_dif_start_scsi,
1640         .abort_isp              = qla2x00_abort_isp,
1641 };
1642
1643 static struct isp_operations qla81xx_isp_ops = {
1644         .pci_config             = qla25xx_pci_config,
1645         .reset_chip             = qla24xx_reset_chip,
1646         .chip_diag              = qla24xx_chip_diag,
1647         .config_rings           = qla24xx_config_rings,
1648         .reset_adapter          = qla24xx_reset_adapter,
1649         .nvram_config           = qla81xx_nvram_config,
1650         .update_fw_options      = qla81xx_update_fw_options,
1651         .load_risc              = qla81xx_load_risc,
1652         .pci_info_str           = qla24xx_pci_info_str,
1653         .fw_version_str         = qla24xx_fw_version_str,
1654         .intr_handler           = qla24xx_intr_handler,
1655         .enable_intrs           = qla24xx_enable_intrs,
1656         .disable_intrs          = qla24xx_disable_intrs,
1657         .abort_command          = qla24xx_abort_command,
1658         .target_reset           = qla24xx_abort_target,
1659         .lun_reset              = qla24xx_lun_reset,
1660         .fabric_login           = qla24xx_login_fabric,
1661         .fabric_logout          = qla24xx_fabric_logout,
1662         .calc_req_entries       = NULL,
1663         .build_iocbs            = NULL,
1664         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1665         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1666         .read_nvram             = NULL,
1667         .write_nvram            = NULL,
1668         .fw_dump                = qla81xx_fw_dump,
1669         .beacon_on              = qla24xx_beacon_on,
1670         .beacon_off             = qla24xx_beacon_off,
1671         .beacon_blink           = qla24xx_beacon_blink,
1672         .read_optrom            = qla25xx_read_optrom_data,
1673         .write_optrom           = qla24xx_write_optrom_data,
1674         .get_flash_version      = qla24xx_get_flash_version,
1675         .start_scsi             = qla24xx_dif_start_scsi,
1676         .abort_isp              = qla2x00_abort_isp,
1677 };
1678
1679 static struct isp_operations qla82xx_isp_ops = {
1680         .pci_config             = qla82xx_pci_config,
1681         .reset_chip             = qla82xx_reset_chip,
1682         .chip_diag              = qla24xx_chip_diag,
1683         .config_rings           = qla82xx_config_rings,
1684         .reset_adapter          = qla24xx_reset_adapter,
1685         .nvram_config           = qla81xx_nvram_config,
1686         .update_fw_options      = qla24xx_update_fw_options,
1687         .load_risc              = qla82xx_load_risc,
1688         .pci_info_str           = qla82xx_pci_info_str,
1689         .fw_version_str         = qla24xx_fw_version_str,
1690         .intr_handler           = qla82xx_intr_handler,
1691         .enable_intrs           = qla82xx_enable_intrs,
1692         .disable_intrs          = qla82xx_disable_intrs,
1693         .abort_command          = qla24xx_abort_command,
1694         .target_reset           = qla24xx_abort_target,
1695         .lun_reset              = qla24xx_lun_reset,
1696         .fabric_login           = qla24xx_login_fabric,
1697         .fabric_logout          = qla24xx_fabric_logout,
1698         .calc_req_entries       = NULL,
1699         .build_iocbs            = NULL,
1700         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1701         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1702         .read_nvram             = qla24xx_read_nvram_data,
1703         .write_nvram            = qla24xx_write_nvram_data,
1704         .fw_dump                = qla24xx_fw_dump,
1705         .beacon_on              = qla82xx_beacon_on,
1706         .beacon_off             = qla82xx_beacon_off,
1707         .beacon_blink           = NULL,
1708         .read_optrom            = qla82xx_read_optrom_data,
1709         .write_optrom           = qla82xx_write_optrom_data,
1710         .get_flash_version      = qla24xx_get_flash_version,
1711         .start_scsi             = qla82xx_start_scsi,
1712         .abort_isp              = qla82xx_abort_isp,
1713 };
1714
1715 static inline void
1716 qla2x00_set_isp_flags(struct qla_hw_data *ha)
1717 {
1718         ha->device_type = DT_EXTENDED_IDS;
1719         switch (ha->pdev->device) {
1720         case PCI_DEVICE_ID_QLOGIC_ISP2100:
1721                 ha->device_type |= DT_ISP2100;
1722                 ha->device_type &= ~DT_EXTENDED_IDS;
1723                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1724                 break;
1725         case PCI_DEVICE_ID_QLOGIC_ISP2200:
1726                 ha->device_type |= DT_ISP2200;
1727                 ha->device_type &= ~DT_EXTENDED_IDS;
1728                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1729                 break;
1730         case PCI_DEVICE_ID_QLOGIC_ISP2300:
1731                 ha->device_type |= DT_ISP2300;
1732                 ha->device_type |= DT_ZIO_SUPPORTED;
1733                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1734                 break;
1735         case PCI_DEVICE_ID_QLOGIC_ISP2312:
1736                 ha->device_type |= DT_ISP2312;
1737                 ha->device_type |= DT_ZIO_SUPPORTED;
1738                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1739                 break;
1740         case PCI_DEVICE_ID_QLOGIC_ISP2322:
1741                 ha->device_type |= DT_ISP2322;
1742                 ha->device_type |= DT_ZIO_SUPPORTED;
1743                 if (ha->pdev->subsystem_vendor == 0x1028 &&
1744                     ha->pdev->subsystem_device == 0x0170)
1745                         ha->device_type |= DT_OEM_001;
1746                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1747                 break;
1748         case PCI_DEVICE_ID_QLOGIC_ISP6312:
1749                 ha->device_type |= DT_ISP6312;
1750                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1751                 break;
1752         case PCI_DEVICE_ID_QLOGIC_ISP6322:
1753                 ha->device_type |= DT_ISP6322;
1754                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1755                 break;
1756         case PCI_DEVICE_ID_QLOGIC_ISP2422:
1757                 ha->device_type |= DT_ISP2422;
1758                 ha->device_type |= DT_ZIO_SUPPORTED;
1759                 ha->device_type |= DT_FWI2;
1760                 ha->device_type |= DT_IIDMA;
1761                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1762                 break;
1763         case PCI_DEVICE_ID_QLOGIC_ISP2432:
1764                 ha->device_type |= DT_ISP2432;
1765                 ha->device_type |= DT_ZIO_SUPPORTED;
1766                 ha->device_type |= DT_FWI2;
1767                 ha->device_type |= DT_IIDMA;
1768                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1769                 break;
1770         case PCI_DEVICE_ID_QLOGIC_ISP8432:
1771                 ha->device_type |= DT_ISP8432;
1772                 ha->device_type |= DT_ZIO_SUPPORTED;
1773                 ha->device_type |= DT_FWI2;
1774                 ha->device_type |= DT_IIDMA;
1775                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1776                 break;
1777         case PCI_DEVICE_ID_QLOGIC_ISP5422:
1778                 ha->device_type |= DT_ISP5422;
1779                 ha->device_type |= DT_FWI2;
1780                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1781                 break;
1782         case PCI_DEVICE_ID_QLOGIC_ISP5432:
1783                 ha->device_type |= DT_ISP5432;
1784                 ha->device_type |= DT_FWI2;
1785                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1786                 break;
1787         case PCI_DEVICE_ID_QLOGIC_ISP2532:
1788                 ha->device_type |= DT_ISP2532;
1789                 ha->device_type |= DT_ZIO_SUPPORTED;
1790                 ha->device_type |= DT_FWI2;
1791                 ha->device_type |= DT_IIDMA;
1792                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1793                 break;
1794         case PCI_DEVICE_ID_QLOGIC_ISP8001:
1795                 ha->device_type |= DT_ISP8001;
1796                 ha->device_type |= DT_ZIO_SUPPORTED;
1797                 ha->device_type |= DT_FWI2;
1798                 ha->device_type |= DT_IIDMA;
1799                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1800                 break;
1801         case PCI_DEVICE_ID_QLOGIC_ISP8021:
1802                 ha->device_type |= DT_ISP8021;
1803                 ha->device_type |= DT_ZIO_SUPPORTED;
1804                 ha->device_type |= DT_FWI2;
1805                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1806                 /* Initialize 82XX ISP flags */
1807                 qla82xx_init_flags(ha);
1808                 break;
1809         }
1810
1811         if (IS_QLA82XX(ha))
1812                 ha->port_no = !(ha->portnum & 1);
1813         else
1814                 /* Get adapter physical port no from interrupt pin register. */
1815                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1816
1817         if (ha->port_no & 1)
1818                 ha->flags.port0 = 1;
1819         else
1820                 ha->flags.port0 = 0;
1821         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
1822             "device_type=0x%x port=%d fw_srisc_address=%p.\n",
1823             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
1824 }
1825
1826 static int
1827 qla2x00_iospace_config(struct qla_hw_data *ha)
1828 {
1829         resource_size_t pio;
1830         uint16_t msix;
1831         int cpus;
1832
1833         if (IS_QLA82XX(ha))
1834                 return qla82xx_iospace_config(ha);
1835
1836         if (pci_request_selected_regions(ha->pdev, ha->bars,
1837             QLA2XXX_DRIVER_NAME)) {
1838                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1839                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1840                     pci_name(ha->pdev));
1841                 goto iospace_error_exit;
1842         }
1843         if (!(ha->bars & 1))
1844                 goto skip_pio;
1845
1846         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1847         pio = pci_resource_start(ha->pdev, 0);
1848         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1849                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1850                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1851                             "Invalid pci I/O region size (%s).\n",
1852                             pci_name(ha->pdev));
1853                         pio = 0;
1854                 }
1855         } else {
1856                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1857                     "Region #0 no a PIO resource (%s).\n",
1858                     pci_name(ha->pdev));
1859                 pio = 0;
1860         }
1861         ha->pio_address = pio;
1862         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1863             "PIO address=%p.\n",
1864             ha->pio_address);
1865
1866 skip_pio:
1867         /* Use MMIO operations for all accesses. */
1868         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1869                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1870                     "Region #1 not an MMIO resource (%s), aborting.\n",
1871                     pci_name(ha->pdev));
1872                 goto iospace_error_exit;
1873         }
1874         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1875                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1876                     "Invalid PCI mem region size (%s), aborting.\n",
1877                     pci_name(ha->pdev));
1878                 goto iospace_error_exit;
1879         }
1880
1881         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1882         if (!ha->iobase) {
1883                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1884                     "Cannot remap MMIO (%s), aborting.\n",
1885                     pci_name(ha->pdev));
1886                 goto iospace_error_exit;
1887         }
1888
1889         /* Determine queue resources */
1890         ha->max_req_queues = ha->max_rsp_queues = 1;
1891         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1892                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1893                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1894                 goto mqiobase_exit;
1895
1896         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1897                         pci_resource_len(ha->pdev, 3));
1898         if (ha->mqiobase) {
1899                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1900                     "MQIO Base=%p.\n", ha->mqiobase);
1901                 /* Read MSIX vector size of the board */
1902                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1903                 ha->msix_count = msix;
1904                 /* Max queues are bounded by available msix vectors */
1905                 /* queue 0 uses two msix vectors */
1906                 if (ql2xmultique_tag) {
1907                         cpus = num_online_cpus();
1908                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1909                                 (cpus + 1) : (ha->msix_count - 1);
1910                         ha->max_req_queues = 2;
1911                 } else if (ql2xmaxqueues > 1) {
1912                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1913                             QLA_MQ_SIZE : ql2xmaxqueues;
1914                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1915                             "QoS mode set, max no of request queues:%d.\n",
1916                             ha->max_req_queues);
1917                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1918                             "QoS mode set, max no of request queues:%d.\n",
1919                             ha->max_req_queues);
1920                 }
1921                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1922                     "MSI-X vector count: %d.\n", msix);
1923         } else
1924                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1925                     "BAR 3 not enabled.\n");
1926
1927 mqiobase_exit:
1928         ha->msix_count = ha->max_rsp_queues + 1;
1929         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1930             "MSIX Count:%d.\n", ha->msix_count);
1931         return (0);
1932
1933 iospace_error_exit:
1934         return (-ENOMEM);
1935 }
1936
1937 static void
1938 qla2xxx_scan_start(struct Scsi_Host *shost)
1939 {
1940         scsi_qla_host_t *vha = shost_priv(shost);
1941
1942         if (vha->hw->flags.running_gold_fw)
1943                 return;
1944
1945         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1946         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1947         set_bit(RSCN_UPDATE, &vha->dpc_flags);
1948         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1949 }
1950
1951 static int
1952 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1953 {
1954         scsi_qla_host_t *vha = shost_priv(shost);
1955
1956         if (!vha->host)
1957                 return 1;
1958         if (time > vha->hw->loop_reset_delay * HZ)
1959                 return 1;
1960
1961         return atomic_read(&vha->loop_state) == LOOP_READY;
1962 }
1963
1964 /*
1965  * PCI driver interface
1966  */
1967 static int __devinit
1968 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1969 {
1970         int     ret = -ENODEV;
1971         struct Scsi_Host *host;
1972         scsi_qla_host_t *base_vha = NULL;
1973         struct qla_hw_data *ha;
1974         char pci_info[30];
1975         char fw_str[30];
1976         struct scsi_host_template *sht;
1977         int bars, max_id, mem_only = 0;
1978         uint16_t req_length = 0, rsp_length = 0;
1979         struct req_que *req = NULL;
1980         struct rsp_que *rsp = NULL;
1981
1982         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1983         sht = &qla2xxx_driver_template;
1984         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
1985             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
1986             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
1987             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
1988             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
1989             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
1990             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1991             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
1992                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1993                 mem_only = 1;
1994                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
1995                     "Mem only adapter.\n");
1996         }
1997         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
1998             "Bars=%d.\n", bars);
1999
2000         if (mem_only) {
2001                 if (pci_enable_device_mem(pdev))
2002                         return ret;
2003         } else {
2004                 if (pci_enable_device(pdev))
2005                         return ret;
2006         }
2007
2008         /* This may fail but that's ok */
2009         pci_enable_pcie_error_reporting(pdev);
2010
2011         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2012         if (!ha) {
2013                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2014                     "Unable to allocate memory for ha.\n");
2015                 goto disable_device;
2016         }
2017         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2018             "Memory allocated for ha=%p.\n", ha);
2019         ha->pdev = pdev;
2020
2021         /* Clear our data area */
2022         ha->bars = bars;
2023         ha->mem_only = mem_only;
2024         spin_lock_init(&ha->hardware_lock);
2025         spin_lock_init(&ha->vport_slock);
2026         mutex_init(&ha->optrom_mutex);
2027
2028         /* Set ISP-type information. */
2029         qla2x00_set_isp_flags(ha);
2030
2031         /* Set EEH reset type to fundamental if required by hba */
2032         if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
2033                 pdev->needs_freset = 1;
2034         }
2035
2036         /* Configure PCI I/O space */
2037         ret = qla2x00_iospace_config(ha);
2038         if (ret)
2039                 goto probe_hw_failed;
2040
2041         ql_log_pci(ql_log_info, pdev, 0x001d,
2042             "Found an ISP%04X irq %d iobase 0x%p.\n",
2043             pdev->device, pdev->irq, ha->iobase);
2044         ha->prev_topology = 0;
2045         ha->init_cb_size = sizeof(init_cb_t);
2046         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2047         ha->optrom_size = OPTROM_SIZE_2300;
2048
2049         /* Assign ISP specific operations. */
2050         max_id = MAX_TARGETS_2200;
2051         if (IS_QLA2100(ha)) {
2052                 max_id = MAX_TARGETS_2100;
2053                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2054                 req_length = REQUEST_ENTRY_CNT_2100;
2055                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2056                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2057                 ha->gid_list_info_size = 4;
2058                 ha->flash_conf_off = ~0;
2059                 ha->flash_data_off = ~0;
2060                 ha->nvram_conf_off = ~0;
2061                 ha->nvram_data_off = ~0;
2062                 ha->isp_ops = &qla2100_isp_ops;
2063         } else if (IS_QLA2200(ha)) {
2064                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2065                 req_length = REQUEST_ENTRY_CNT_2200;
2066                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2067                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2068                 ha->gid_list_info_size = 4;
2069                 ha->flash_conf_off = ~0;
2070                 ha->flash_data_off = ~0;
2071                 ha->nvram_conf_off = ~0;
2072                 ha->nvram_data_off = ~0;
2073                 ha->isp_ops = &qla2100_isp_ops;
2074         } else if (IS_QLA23XX(ha)) {
2075                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2076                 req_length = REQUEST_ENTRY_CNT_2200;
2077                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2078                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2079                 ha->gid_list_info_size = 6;
2080                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2081                         ha->optrom_size = OPTROM_SIZE_2322;
2082                 ha->flash_conf_off = ~0;
2083                 ha->flash_data_off = ~0;
2084                 ha->nvram_conf_off = ~0;
2085                 ha->nvram_data_off = ~0;
2086                 ha->isp_ops = &qla2300_isp_ops;
2087         } else if (IS_QLA24XX_TYPE(ha)) {
2088                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2089                 req_length = REQUEST_ENTRY_CNT_24XX;
2090                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2091                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2092                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2093                 ha->gid_list_info_size = 8;
2094                 ha->optrom_size = OPTROM_SIZE_24XX;
2095                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2096                 ha->isp_ops = &qla24xx_isp_ops;
2097                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2098                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2099                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2100                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2101         } else if (IS_QLA25XX(ha)) {
2102                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2103                 req_length = REQUEST_ENTRY_CNT_24XX;
2104                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2105                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2106                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2107                 ha->gid_list_info_size = 8;
2108                 ha->optrom_size = OPTROM_SIZE_25XX;
2109                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2110                 ha->isp_ops = &qla25xx_isp_ops;
2111                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2112                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2113                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2114                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2115         } else if (IS_QLA81XX(ha)) {
2116                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2117                 req_length = REQUEST_ENTRY_CNT_24XX;
2118                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2119                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2120                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2121                 ha->gid_list_info_size = 8;
2122                 ha->optrom_size = OPTROM_SIZE_81XX;
2123                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2124                 ha->isp_ops = &qla81xx_isp_ops;
2125                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2126                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2127                 ha->nvram_conf_off = ~0;
2128                 ha->nvram_data_off = ~0;
2129         } else if (IS_QLA82XX(ha)) {
2130                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2131                 req_length = REQUEST_ENTRY_CNT_82XX;
2132                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2133                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2134                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2135                 ha->gid_list_info_size = 8;
2136                 ha->optrom_size = OPTROM_SIZE_82XX;
2137                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2138                 ha->isp_ops = &qla82xx_isp_ops;
2139                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2140                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2141                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2142                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2143         }
2144         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2145             "mbx_count=%d, req_length=%d, "
2146             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2147             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n",
2148             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2149             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2150             ha->nvram_npiv_size);
2151         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2152             "isp_ops=%p, flash_conf_off=%d, "
2153             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2154             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2155             ha->nvram_conf_off, ha->nvram_data_off);
2156         mutex_init(&ha->vport_lock);
2157         init_completion(&ha->mbx_cmd_comp);
2158         complete(&ha->mbx_cmd_comp);
2159         init_completion(&ha->mbx_intr_comp);
2160         init_completion(&ha->dcbx_comp);
2161
2162         set_bit(0, (unsigned long *) ha->vp_idx_map);
2163
2164         qla2x00_config_dma_addressing(ha);
2165         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2166             "64 Bit addressing is %s.\n",
2167             ha->flags.enable_64bit_addressing ? "enable" :
2168             "disable");
2169         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2170         if (!ret) {
2171                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2172                     "Failed to allocate memory for adapter, aborting.\n");
2173
2174                 goto probe_hw_failed;
2175         }
2176
2177         req->max_q_depth = MAX_Q_DEPTH;
2178         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2179                 req->max_q_depth = ql2xmaxqdepth;
2180
2181
2182         base_vha = qla2x00_create_host(sht, ha);
2183         if (!base_vha) {
2184                 ret = -ENOMEM;
2185                 qla2x00_mem_free(ha);
2186                 qla2x00_free_req_que(ha, req);
2187                 qla2x00_free_rsp_que(ha, rsp);
2188                 goto probe_hw_failed;
2189         }
2190
2191         pci_set_drvdata(pdev, base_vha);
2192
2193         host = base_vha->host;
2194         base_vha->req = req;
2195         host->can_queue = req->length + 128;
2196         if (IS_QLA2XXX_MIDTYPE(ha))
2197                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2198         else
2199                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2200                                                 base_vha->vp_idx;
2201
2202         /* Set the SG table size based on ISP type */
2203         if (!IS_FWI2_CAPABLE(ha)) {
2204                 if (IS_QLA2100(ha))
2205                         host->sg_tablesize = 32;
2206         } else {
2207                 if (!IS_QLA82XX(ha))
2208                         host->sg_tablesize = QLA_SG_ALL;
2209         }
2210         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2211             "can_queue=%d, req=%p, "
2212             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2213             host->can_queue, base_vha->req,
2214             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2215         host->max_id = max_id;
2216         host->this_id = 255;
2217         host->cmd_per_lun = 3;
2218         host->unique_id = host->host_no;
2219         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2220                 host->max_cmd_len = 32;
2221         else
2222                 host->max_cmd_len = MAX_CMDSZ;
2223         host->max_channel = MAX_BUSES - 1;
2224         host->max_lun = ql2xmaxlun;
2225         host->transportt = qla2xxx_transport_template;
2226         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2227
2228         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2229             "max_id=%d this_id=%d "
2230             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2231             "max_lun=%d transportt=%p, vendor_id=%d.\n", host->max_id,
2232             host->this_id, host->cmd_per_lun, host->unique_id,
2233             host->max_cmd_len, host->max_channel, host->max_lun,
2234             host->transportt, sht->vendor_id);
2235
2236         /* Set up the irqs */
2237         ret = qla2x00_request_irqs(ha, rsp);
2238         if (ret)
2239                 goto probe_init_failed;
2240
2241         pci_save_state(pdev);
2242
2243         /* Alloc arrays of request and response ring ptrs */
2244 que_init:
2245         if (!qla2x00_alloc_queues(ha)) {
2246                 ql_log(ql_log_fatal, base_vha, 0x003d,
2247                     "Failed to allocate memory for queue pointers.. aborting.\n");
2248                 goto probe_init_failed;
2249         }
2250
2251         ha->rsp_q_map[0] = rsp;
2252         ha->req_q_map[0] = req;
2253         rsp->req = req;
2254         req->rsp = rsp;
2255         set_bit(0, ha->req_qid_map);
2256         set_bit(0, ha->rsp_qid_map);
2257         /* FWI2-capable only. */
2258         req->req_q_in = &ha->iobase->isp24.req_q_in;
2259         req->req_q_out = &ha->iobase->isp24.req_q_out;
2260         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2261         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2262         if (ha->mqenable) {
2263                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2264                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2265                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2266                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2267         }
2268
2269         if (IS_QLA82XX(ha)) {
2270                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2271                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2272                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2273         }
2274
2275         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2276             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2277             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2278         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2279             "req->req_q_in=%p req->req_q_out=%p "
2280             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2281             req->req_q_in, req->req_q_out,
2282             rsp->rsp_q_in, rsp->rsp_q_out);
2283         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2284             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2285             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2286         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2287             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2288             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2289
2290         if (qla2x00_initialize_adapter(base_vha)) {
2291                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2292                     "Failed to initialize adapter - Adapter flags %x.\n",
2293                     base_vha->device_flags);
2294
2295                 if (IS_QLA82XX(ha)) {
2296                         qla82xx_idc_lock(ha);
2297                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2298                                 QLA82XX_DEV_FAILED);
2299                         qla82xx_idc_unlock(ha);
2300                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2301                             "HW State: FAILED.\n");
2302                 }
2303
2304                 ret = -ENODEV;
2305                 goto probe_failed;
2306         }
2307
2308         if (ha->mqenable) {
2309                 if (qla25xx_setup_mode(base_vha)) {
2310                         ql_log(ql_log_warn, base_vha, 0x00ec,
2311                             "Failed to create queues, falling back to single queue mode.\n");
2312                         goto que_init;
2313                 }
2314         }
2315
2316         if (ha->flags.running_gold_fw)
2317                 goto skip_dpc;
2318
2319         /*
2320          * Startup the kernel thread for this host adapter
2321          */
2322         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2323             "%s_dpc", base_vha->host_str);
2324         if (IS_ERR(ha->dpc_thread)) {
2325                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2326                     "Failed to start DPC thread.\n");
2327                 ret = PTR_ERR(ha->dpc_thread);
2328                 goto probe_failed;
2329         }
2330         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2331             "DPC thread started successfully.\n");
2332
2333 skip_dpc:
2334         list_add_tail(&base_vha->list, &ha->vp_list);
2335         base_vha->host->irq = ha->pdev->irq;
2336
2337         /* Initialized the timer */
2338         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2339         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2340             "Started qla2x00_timer with "
2341             "interval=%d.\n", WATCH_INTERVAL);
2342         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2343             "Detected hba at address=%p.\n",
2344             ha);
2345
2346         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2347                 if (ha->fw_attributes & BIT_4) {
2348                         int prot = 0;
2349                         base_vha->flags.difdix_supported = 1;
2350                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2351                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2352                         if (ql2xenabledif == 1)
2353                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2354                         scsi_host_set_prot(host,
2355                             prot | SHOST_DIF_TYPE1_PROTECTION
2356                             | SHOST_DIF_TYPE2_PROTECTION
2357                             | SHOST_DIF_TYPE3_PROTECTION
2358                             | SHOST_DIX_TYPE1_PROTECTION
2359                             | SHOST_DIX_TYPE2_PROTECTION
2360                             | SHOST_DIX_TYPE3_PROTECTION);
2361                         scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2362                 } else
2363                         base_vha->flags.difdix_supported = 0;
2364         }
2365
2366         ha->isp_ops->enable_intrs(ha);
2367
2368         ret = scsi_add_host(host, &pdev->dev);
2369         if (ret)
2370                 goto probe_failed;
2371
2372         base_vha->flags.init_done = 1;
2373         base_vha->flags.online = 1;
2374
2375         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2376             "Init done and hba is online.\n");
2377
2378         scsi_scan_host(host);
2379
2380         qla2x00_alloc_sysfs_attr(base_vha);
2381
2382         qla2x00_init_host_attr(base_vha);
2383
2384         qla2x00_dfs_setup(base_vha);
2385
2386         ql_log(ql_log_info, base_vha, 0x00fa,
2387             "QLogic Fibre Channed HBA Driver: %s.\n",
2388             qla2x00_version_str);
2389         ql_log(ql_log_info, base_vha, 0x00fb,
2390             "QLogic %s - %s.\n",
2391             ha->model_number, ha->model_desc ? ha->model_desc : "");
2392         ql_log(ql_log_info, base_vha, 0x00fc,
2393             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2394             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2395             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2396             base_vha->host_no,
2397             ha->isp_ops->fw_version_str(base_vha, fw_str));
2398
2399         return 0;
2400
2401 probe_init_failed:
2402         qla2x00_free_req_que(ha, req);
2403         qla2x00_free_rsp_que(ha, rsp);
2404         ha->max_req_queues = ha->max_rsp_queues = 0;
2405
2406 probe_failed:
2407         if (base_vha->timer_active)
2408                 qla2x00_stop_timer(base_vha);
2409         base_vha->flags.online = 0;
2410         if (ha->dpc_thread) {
2411                 struct task_struct *t = ha->dpc_thread;
2412
2413                 ha->dpc_thread = NULL;
2414                 kthread_stop(t);
2415         }
2416
2417         qla2x00_free_device(base_vha);
2418
2419         scsi_host_put(base_vha->host);
2420
2421 probe_hw_failed:
2422         if (IS_QLA82XX(ha)) {
2423                 qla82xx_idc_lock(ha);
2424                 qla82xx_clear_drv_active(ha);
2425                 qla82xx_idc_unlock(ha);
2426                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2427                 if (!ql2xdbwr)
2428                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2429         } else {
2430                 if (ha->iobase)
2431                         iounmap(ha->iobase);
2432         }
2433         pci_release_selected_regions(ha->pdev, ha->bars);
2434         kfree(ha);
2435         ha = NULL;
2436
2437 disable_device:
2438         pci_disable_device(pdev);
2439         return ret;
2440 }
2441
2442 static void
2443 qla2x00_shutdown(struct pci_dev *pdev)
2444 {
2445         scsi_qla_host_t *vha;
2446         struct qla_hw_data  *ha;
2447
2448         vha = pci_get_drvdata(pdev);
2449         ha = vha->hw;
2450
2451         /* Turn-off FCE trace */
2452         if (ha->flags.fce_enabled) {
2453                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2454                 ha->flags.fce_enabled = 0;
2455         }
2456
2457         /* Turn-off EFT trace */
2458         if (ha->eft)
2459                 qla2x00_disable_eft_trace(vha);
2460
2461         /* Stop currently executing firmware. */
2462         qla2x00_try_to_stop_firmware(vha);
2463
2464         /* Turn adapter off line */
2465         vha->flags.online = 0;
2466
2467         /* turn-off interrupts on the card */
2468         if (ha->interrupts_on) {
2469                 vha->flags.init_done = 0;
2470                 ha->isp_ops->disable_intrs(ha);
2471         }
2472
2473         qla2x00_free_irqs(vha);
2474
2475         qla2x00_free_fw_dump(ha);
2476 }
2477
2478 static void
2479 qla2x00_remove_one(struct pci_dev *pdev)
2480 {
2481         scsi_qla_host_t *base_vha, *vha;
2482         struct qla_hw_data  *ha;
2483         unsigned long flags;
2484
2485         base_vha = pci_get_drvdata(pdev);
2486         ha = base_vha->hw;
2487
2488         mutex_lock(&ha->vport_lock);
2489         while (ha->cur_vport_count) {
2490                 struct Scsi_Host *scsi_host;
2491
2492                 spin_lock_irqsave(&ha->vport_slock, flags);
2493
2494                 BUG_ON(base_vha->list.next == &ha->vp_list);
2495                 /* This assumes first entry in ha->vp_list is always base vha */
2496                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2497                 scsi_host = scsi_host_get(vha->host);
2498
2499                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2500                 mutex_unlock(&ha->vport_lock);
2501
2502                 fc_vport_terminate(vha->fc_vport);
2503                 scsi_host_put(vha->host);
2504
2505                 mutex_lock(&ha->vport_lock);
2506         }
2507         mutex_unlock(&ha->vport_lock);
2508
2509         set_bit(UNLOADING, &base_vha->dpc_flags);
2510
2511         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2512
2513         qla2x00_dfs_remove(base_vha);
2514
2515         qla84xx_put_chip(base_vha);
2516
2517         /* Disable timer */
2518         if (base_vha->timer_active)
2519                 qla2x00_stop_timer(base_vha);
2520
2521         base_vha->flags.online = 0;
2522
2523         /* Flush the work queue and remove it */
2524         if (ha->wq) {
2525                 flush_workqueue(ha->wq);
2526                 destroy_workqueue(ha->wq);
2527                 ha->wq = NULL;
2528         }
2529
2530         /* Kill the kernel thread for this host */
2531         if (ha->dpc_thread) {
2532                 struct task_struct *t = ha->dpc_thread;
2533
2534                 /*
2535                  * qla2xxx_wake_dpc checks for ->dpc_thread
2536                  * so we need to zero it out.
2537                  */
2538                 ha->dpc_thread = NULL;
2539                 kthread_stop(t);
2540         }
2541
2542         qla2x00_free_sysfs_attr(base_vha);
2543
2544         fc_remove_host(base_vha->host);
2545
2546         scsi_remove_host(base_vha->host);
2547
2548         qla2x00_free_device(base_vha);
2549
2550         scsi_host_put(base_vha->host);
2551
2552         if (IS_QLA82XX(ha)) {
2553                 qla82xx_idc_lock(ha);
2554                 qla82xx_clear_drv_active(ha);
2555                 qla82xx_idc_unlock(ha);
2556
2557                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2558                 if (!ql2xdbwr)
2559                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2560         } else {
2561                 if (ha->iobase)
2562                         iounmap(ha->iobase);
2563
2564                 if (ha->mqiobase)
2565                         iounmap(ha->mqiobase);
2566         }
2567
2568         pci_release_selected_regions(ha->pdev, ha->bars);
2569         kfree(ha);
2570         ha = NULL;
2571
2572         pci_disable_pcie_error_reporting(pdev);
2573
2574         pci_disable_device(pdev);
2575         pci_set_drvdata(pdev, NULL);
2576 }
2577
2578 static void
2579 qla2x00_free_device(scsi_qla_host_t *vha)
2580 {
2581         struct qla_hw_data *ha = vha->hw;
2582
2583         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2584
2585         /* Disable timer */
2586         if (vha->timer_active)
2587                 qla2x00_stop_timer(vha);
2588
2589         /* Kill the kernel thread for this host */
2590         if (ha->dpc_thread) {
2591                 struct task_struct *t = ha->dpc_thread;
2592
2593                 /*
2594                  * qla2xxx_wake_dpc checks for ->dpc_thread
2595                  * so we need to zero it out.
2596                  */
2597                 ha->dpc_thread = NULL;
2598                 kthread_stop(t);
2599         }
2600
2601         qla25xx_delete_queues(vha);
2602
2603         if (ha->flags.fce_enabled)
2604                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2605
2606         if (ha->eft)
2607                 qla2x00_disable_eft_trace(vha);
2608
2609         /* Stop currently executing firmware. */
2610         qla2x00_try_to_stop_firmware(vha);
2611
2612         vha->flags.online = 0;
2613
2614         /* turn-off interrupts on the card */
2615         if (ha->interrupts_on) {
2616                 vha->flags.init_done = 0;
2617                 ha->isp_ops->disable_intrs(ha);
2618         }
2619
2620         qla2x00_free_irqs(vha);
2621
2622         qla2x00_free_fcports(vha);
2623
2624         qla2x00_mem_free(ha);
2625
2626         qla82xx_md_free(vha);
2627
2628         qla2x00_free_queues(ha);
2629 }
2630
2631 void qla2x00_free_fcports(struct scsi_qla_host *vha)
2632 {
2633         fc_port_t *fcport, *tfcport;
2634
2635         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2636                 list_del(&fcport->list);
2637                 kfree(fcport);
2638                 fcport = NULL;
2639         }
2640 }
2641
2642 static inline void
2643 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2644     int defer)
2645 {
2646         struct fc_rport *rport;
2647         scsi_qla_host_t *base_vha;
2648         unsigned long flags;
2649
2650         if (!fcport->rport)
2651                 return;
2652
2653         rport = fcport->rport;
2654         if (defer) {
2655                 base_vha = pci_get_drvdata(vha->hw->pdev);
2656                 spin_lock_irqsave(vha->host->host_lock, flags);
2657                 fcport->drport = rport;
2658                 spin_unlock_irqrestore(vha->host->host_lock, flags);
2659                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2660                 qla2xxx_wake_dpc(base_vha);
2661         } else
2662                 fc_remote_port_delete(rport);
2663 }
2664
2665 /*
2666  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2667  *
2668  * Input: ha = adapter block pointer.  fcport = port structure pointer.
2669  *
2670  * Return: None.
2671  *
2672  * Context:
2673  */
2674 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2675     int do_login, int defer)
2676 {
2677         if (atomic_read(&fcport->state) == FCS_ONLINE &&
2678             vha->vp_idx == fcport->vp_idx) {
2679                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2680                 qla2x00_schedule_rport_del(vha, fcport, defer);
2681         }
2682         /*
2683          * We may need to retry the login, so don't change the state of the
2684          * port but do the retries.
2685          */
2686         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2687                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2688
2689         if (!do_login)
2690                 return;
2691
2692         if (fcport->login_retry == 0) {
2693                 fcport->login_retry = vha->hw->login_retry_count;
2694                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2695
2696                 ql_dbg(ql_dbg_disc, vha, 0x2067,
2697                     "Port login retry "
2698                     "%02x%02x%02x%02x%02x%02x%02x%02x, "
2699                     "id = 0x%04x retry cnt=%d.\n",
2700                     fcport->port_name[0], fcport->port_name[1],
2701                     fcport->port_name[2], fcport->port_name[3],
2702                     fcport->port_name[4], fcport->port_name[5],
2703                     fcport->port_name[6], fcport->port_name[7],
2704                     fcport->loop_id, fcport->login_retry);
2705         }
2706 }
2707
2708 /*
2709  * qla2x00_mark_all_devices_lost
2710  *      Updates fcport state when device goes offline.
2711  *
2712  * Input:
2713  *      ha = adapter block pointer.
2714  *      fcport = port structure pointer.
2715  *
2716  * Return:
2717  *      None.
2718  *
2719  * Context:
2720  */
2721 void
2722 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
2723 {
2724         fc_port_t *fcport;
2725
2726         list_for_each_entry(fcport, &vha->vp_fcports, list) {
2727                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
2728                         continue;
2729
2730                 /*
2731                  * No point in marking the device as lost, if the device is
2732                  * already DEAD.
2733                  */
2734                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2735                         continue;
2736                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2737                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2738                         if (defer)
2739                                 qla2x00_schedule_rport_del(vha, fcport, defer);
2740                         else if (vha->vp_idx == fcport->vp_idx)
2741                                 qla2x00_schedule_rport_del(vha, fcport, defer);
2742                 }
2743         }
2744 }
2745
2746 /*
2747 * qla2x00_mem_alloc
2748 *      Allocates adapter memory.
2749 *
2750 * Returns:
2751 *      0  = success.
2752 *      !0  = failure.
2753 */
2754 static int
2755 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2756         struct req_que **req, struct rsp_que **rsp)
2757 {
2758         char    name[16];
2759
2760         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
2761                 &ha->init_cb_dma, GFP_KERNEL);
2762         if (!ha->init_cb)
2763                 goto fail;
2764
2765         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2766                 &ha->gid_list_dma, GFP_KERNEL);
2767         if (!ha->gid_list)
2768                 goto fail_free_init_cb;
2769
2770         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2771         if (!ha->srb_mempool)
2772                 goto fail_free_gid_list;
2773
2774         if (IS_QLA82XX(ha)) {
2775                 /* Allocate cache for CT6 Ctx. */
2776                 if (!ctx_cachep) {
2777                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2778                                 sizeof(struct ct6_dsd), 0,
2779                                 SLAB_HWCACHE_ALIGN, NULL);
2780                         if (!ctx_cachep)
2781                                 goto fail_free_gid_list;
2782                 }
2783                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2784                         ctx_cachep);
2785                 if (!ha->ctx_mempool)
2786                         goto fail_free_srb_mempool;
2787                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
2788                     "ctx_cachep=%p ctx_mempool=%p.\n",
2789                     ctx_cachep, ha->ctx_mempool);
2790         }
2791
2792         /* Get memory for cached NVRAM */
2793         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2794         if (!ha->nvram)
2795                 goto fail_free_ctx_mempool;
2796
2797         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2798                 ha->pdev->device);
2799         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2800                 DMA_POOL_SIZE, 8, 0);
2801         if (!ha->s_dma_pool)
2802                 goto fail_free_nvram;
2803
2804         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
2805             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
2806             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
2807
2808         if (IS_QLA82XX(ha) || ql2xenabledif) {
2809                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2810                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
2811                 if (!ha->dl_dma_pool) {
2812                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
2813                             "Failed to allocate memory for dl_dma_pool.\n");
2814                         goto fail_s_dma_pool;
2815                 }
2816
2817                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2818                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
2819                 if (!ha->fcp_cmnd_dma_pool) {
2820                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
2821                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
2822                         goto fail_dl_dma_pool;
2823                 }
2824                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
2825                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
2826                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
2827         }
2828
2829         /* Allocate memory for SNS commands */
2830         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2831         /* Get consistent memory allocated for SNS commands */
2832                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
2833                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
2834                 if (!ha->sns_cmd)
2835                         goto fail_dma_pool;
2836                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
2837                     "sns_cmd.\n", ha->sns_cmd);
2838         } else {
2839         /* Get consistent memory allocated for MS IOCB */
2840                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2841                         &ha->ms_iocb_dma);
2842                 if (!ha->ms_iocb)
2843                         goto fail_dma_pool;
2844         /* Get consistent memory allocated for CT SNS commands */
2845                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
2846                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
2847                 if (!ha->ct_sns)
2848                         goto fail_free_ms_iocb;
2849                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
2850                     "ms_iocb=%p ct_sns=%p.\n",
2851                     ha->ms_iocb, ha->ct_sns);
2852         }
2853
2854         /* Allocate memory for request ring */
2855         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2856         if (!*req) {
2857                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
2858                     "Failed to allocate memory for req.\n");
2859                 goto fail_req;
2860         }
2861         (*req)->length = req_len;
2862         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2863                 ((*req)->length + 1) * sizeof(request_t),
2864                 &(*req)->dma, GFP_KERNEL);
2865         if (!(*req)->ring) {
2866                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
2867                     "Failed to allocate memory for req_ring.\n");
2868                 goto fail_req_ring;
2869         }
2870         /* Allocate memory for response ring */
2871         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2872         if (!*rsp) {
2873                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
2874                     "Failed to allocate memory for rsp.\n");
2875                 goto fail_rsp;
2876         }
2877         (*rsp)->hw = ha;
2878         (*rsp)->length = rsp_len;
2879         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2880                 ((*rsp)->length + 1) * sizeof(response_t),
2881                 &(*rsp)->dma, GFP_KERNEL);
2882         if (!(*rsp)->ring) {
2883                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
2884                     "Failed to allocate memory for rsp_ring.\n");
2885                 goto fail_rsp_ring;
2886         }
2887         (*req)->rsp = *rsp;
2888         (*rsp)->req = *req;
2889         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
2890             "req=%p req->length=%d req->ring=%p rsp=%p "
2891             "rsp->length=%d rsp->ring=%p.\n",
2892             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
2893             (*rsp)->ring);
2894         /* Allocate memory for NVRAM data for vports */
2895         if (ha->nvram_npiv_size) {
2896                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2897                     ha->nvram_npiv_size, GFP_KERNEL);
2898                 if (!ha->npiv_info) {
2899                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
2900                             "Failed to allocate memory for npiv_info.\n");
2901                         goto fail_npiv_info;
2902                 }
2903         } else
2904                 ha->npiv_info = NULL;
2905
2906         /* Get consistent memory allocated for EX-INIT-CB. */
2907         if (IS_QLA8XXX_TYPE(ha)) {
2908                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2909                     &ha->ex_init_cb_dma);
2910                 if (!ha->ex_init_cb)
2911                         goto fail_ex_init_cb;
2912                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
2913                     "ex_init_cb=%p.\n", ha->ex_init_cb);
2914         }
2915
2916         INIT_LIST_HEAD(&ha->gbl_dsd_list);
2917
2918         /* Get consistent memory allocated for Async Port-Database. */
2919         if (!IS_FWI2_CAPABLE(ha)) {
2920                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2921                         &ha->async_pd_dma);
2922                 if (!ha->async_pd)
2923                         goto fail_async_pd;
2924                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
2925                     "async_pd=%p.\n", ha->async_pd);
2926         }
2927
2928         INIT_LIST_HEAD(&ha->vp_list);
2929         return 1;
2930
2931 fail_async_pd:
2932         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
2933 fail_ex_init_cb:
2934         kfree(ha->npiv_info);
2935 fail_npiv_info:
2936         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2937                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2938         (*rsp)->ring = NULL;
2939         (*rsp)->dma = 0;
2940 fail_rsp_ring:
2941         kfree(*rsp);
2942 fail_rsp:
2943         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2944                 sizeof(request_t), (*req)->ring, (*req)->dma);
2945         (*req)->ring = NULL;
2946         (*req)->dma = 0;
2947 fail_req_ring:
2948         kfree(*req);
2949 fail_req:
2950         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2951                 ha->ct_sns, ha->ct_sns_dma);
2952         ha->ct_sns = NULL;
2953         ha->ct_sns_dma = 0;
2954 fail_free_ms_iocb:
2955         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2956         ha->ms_iocb = NULL;
2957         ha->ms_iocb_dma = 0;
2958 fail_dma_pool:
2959         if (IS_QLA82XX(ha) || ql2xenabledif) {
2960                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2961                 ha->fcp_cmnd_dma_pool = NULL;
2962         }
2963 fail_dl_dma_pool:
2964         if (IS_QLA82XX(ha) || ql2xenabledif) {
2965                 dma_pool_destroy(ha->dl_dma_pool);
2966                 ha->dl_dma_pool = NULL;
2967         }
2968 fail_s_dma_pool:
2969         dma_pool_destroy(ha->s_dma_pool);
2970         ha->s_dma_pool = NULL;
2971 fail_free_nvram:
2972         kfree(ha->nvram);
2973         ha->nvram = NULL;
2974 fail_free_ctx_mempool:
2975         mempool_destroy(ha->ctx_mempool);
2976         ha->ctx_mempool = NULL;
2977 fail_free_srb_mempool:
2978         mempool_destroy(ha->srb_mempool);
2979         ha->srb_mempool = NULL;
2980 fail_free_gid_list:
2981         dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
2982         ha->gid_list_dma);
2983         ha->gid_list = NULL;
2984         ha->gid_list_dma = 0;
2985 fail_free_init_cb:
2986         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2987         ha->init_cb_dma);
2988         ha->init_cb = NULL;
2989         ha->init_cb_dma = 0;
2990 fail:
2991         ql_log(ql_log_fatal, NULL, 0x0030,
2992             "Memory allocation failure.\n");
2993         return -ENOMEM;
2994 }
2995
2996 /*
2997 * qla2x00_free_fw_dump
2998 *       Frees fw dump stuff.
2999 *
3000 * Input:
3001 *       ha = adapter block pointer.
3002 */
3003 static void
3004 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3005 {
3006         if (ha->fce)
3007                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3008                     ha->fce_dma);
3009
3010         if (ha->fw_dump) {
3011                 if (ha->eft)
3012                         dma_free_coherent(&ha->pdev->dev,
3013                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3014                 vfree(ha->fw_dump);
3015         }
3016         ha->fce = NULL;
3017         ha->fce_dma = 0;
3018         ha->eft = NULL;
3019         ha->eft_dma = 0;
3020         ha->fw_dump = NULL;
3021         ha->fw_dumped = 0;
3022         ha->fw_dump_reading = 0;
3023 }
3024
3025 /*
3026 * qla2x00_mem_free
3027 *      Frees all adapter allocated memory.
3028 *
3029 * Input:
3030 *      ha = adapter block pointer.
3031 */
3032 static void
3033 qla2x00_mem_free(struct qla_hw_data *ha)
3034 {
3035         qla2x00_free_fw_dump(ha);
3036
3037         if (ha->srb_mempool)
3038                 mempool_destroy(ha->srb_mempool);
3039
3040         if (ha->dcbx_tlv)
3041                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3042                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3043
3044         if (ha->xgmac_data)
3045                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3046                     ha->xgmac_data, ha->xgmac_data_dma);
3047
3048         if (ha->sns_cmd)
3049                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3050                 ha->sns_cmd, ha->sns_cmd_dma);
3051
3052         if (ha->ct_sns)
3053                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3054                 ha->ct_sns, ha->ct_sns_dma);
3055
3056         if (ha->sfp_data)
3057                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3058
3059         if (ha->edc_data)
3060                 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
3061
3062         if (ha->ms_iocb)
3063                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3064
3065         if (ha->ex_init_cb)
3066                 dma_pool_free(ha->s_dma_pool,
3067                         ha->ex_init_cb, ha->ex_init_cb_dma);
3068
3069         if (ha->async_pd)
3070                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3071
3072         if (ha->s_dma_pool)
3073                 dma_pool_destroy(ha->s_dma_pool);
3074
3075         if (ha->gid_list)
3076                 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
3077                 ha->gid_list_dma);
3078
3079         if (IS_QLA82XX(ha)) {
3080                 if (!list_empty(&ha->gbl_dsd_list)) {
3081                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3082
3083                         /* clean up allocated prev pool */
3084                         list_for_each_entry_safe(dsd_ptr,
3085                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3086                                 dma_pool_free(ha->dl_dma_pool,
3087                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3088                                 list_del(&dsd_ptr->list);
3089                                 kfree(dsd_ptr);
3090                         }
3091                 }
3092         }
3093
3094         if (ha->dl_dma_pool)
3095                 dma_pool_destroy(ha->dl_dma_pool);
3096
3097         if (ha->fcp_cmnd_dma_pool)
3098                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3099
3100         if (ha->ctx_mempool)
3101                 mempool_destroy(ha->ctx_mempool);
3102
3103         if (ha->init_cb)
3104                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3105                         ha->init_cb, ha->init_cb_dma);
3106         vfree(ha->optrom_buffer);
3107         kfree(ha->nvram);
3108         kfree(ha->npiv_info);
3109
3110         ha->srb_mempool = NULL;
3111         ha->ctx_mempool = NULL;
3112         ha->sns_cmd = NULL;
3113         ha->sns_cmd_dma = 0;
3114         ha->ct_sns = NULL;
3115         ha->ct_sns_dma = 0;
3116         ha->ms_iocb = NULL;
3117         ha->ms_iocb_dma = 0;
3118         ha->init_cb = NULL;
3119         ha->init_cb_dma = 0;
3120         ha->ex_init_cb = NULL;
3121         ha->ex_init_cb_dma = 0;
3122         ha->async_pd = NULL;
3123         ha->async_pd_dma = 0;
3124
3125         ha->s_dma_pool = NULL;
3126         ha->dl_dma_pool = NULL;
3127         ha->fcp_cmnd_dma_pool = NULL;
3128
3129         ha->gid_list = NULL;
3130         ha->gid_list_dma = 0;
3131 }
3132
3133 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3134                                                 struct qla_hw_data *ha)
3135 {
3136         struct Scsi_Host *host;
3137         struct scsi_qla_host *vha = NULL;
3138
3139         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3140         if (host == NULL) {
3141                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3142                     "Failed to allocate host from the scsi layer, aborting.\n");
3143                 goto fail;
3144         }
3145
3146         /* Clear our data area */
3147         vha = shost_priv(host);
3148         memset(vha, 0, sizeof(scsi_qla_host_t));
3149
3150         vha->host = host;
3151         vha->host_no = host->host_no;
3152         vha->hw = ha;
3153
3154         INIT_LIST_HEAD(&vha->vp_fcports);
3155         INIT_LIST_HEAD(&vha->work_list);
3156         INIT_LIST_HEAD(&vha->list);
3157
3158         spin_lock_init(&vha->work_lock);
3159
3160         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3161         ql_dbg(ql_dbg_init, vha, 0x0041,
3162             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3163             vha->host, vha->hw, vha,
3164             dev_name(&(ha->pdev->dev)));
3165
3166         return vha;
3167
3168 fail:
3169         return vha;
3170 }
3171
3172 static struct qla_work_evt *
3173 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3174 {
3175         struct qla_work_evt *e;
3176         uint8_t bail;
3177
3178         QLA_VHA_MARK_BUSY(vha, bail);
3179         if (bail)
3180                 return NULL;
3181
3182         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3183         if (!e) {
3184                 QLA_VHA_MARK_NOT_BUSY(vha);
3185                 return NULL;
3186         }
3187
3188         INIT_LIST_HEAD(&e->list);
3189         e->type = type;
3190         e->flags = QLA_EVT_FLAG_FREE;
3191         return e;
3192 }
3193
3194 static int
3195 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3196 {
3197         unsigned long flags;
3198
3199         spin_lock_irqsave(&vha->work_lock, flags);
3200         list_add_tail(&e->list, &vha->work_list);
3201         spin_unlock_irqrestore(&vha->work_lock, flags);
3202         qla2xxx_wake_dpc(vha);
3203
3204         return QLA_SUCCESS;
3205 }
3206
3207 int
3208 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3209     u32 data)
3210 {
3211         struct qla_work_evt *e;
3212
3213         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3214         if (!e)
3215                 return QLA_FUNCTION_FAILED;
3216
3217         e->u.aen.code = code;
3218         e->u.aen.data = data;
3219         return qla2x00_post_work(vha, e);
3220 }
3221
3222 int
3223 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3224 {
3225         struct qla_work_evt *e;
3226
3227         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3228         if (!e)
3229                 return QLA_FUNCTION_FAILED;
3230
3231         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3232         return qla2x00_post_work(vha, e);
3233 }
3234
3235 #define qla2x00_post_async_work(name, type)     \
3236 int qla2x00_post_async_##name##_work(           \
3237     struct scsi_qla_host *vha,                  \
3238     fc_port_t *fcport, uint16_t *data)          \
3239 {                                               \
3240         struct qla_work_evt *e;                 \
3241                                                 \
3242         e = qla2x00_alloc_work(vha, type);      \
3243         if (!e)                                 \
3244                 return QLA_FUNCTION_FAILED;     \
3245                                                 \
3246         e->u.logio.fcport = fcport;             \
3247         if (data) {                             \
3248                 e->u.logio.data[0] = data[0];   \
3249                 e->u.logio.data[1] = data[1];   \
3250         }                                       \
3251         return qla2x00_post_work(vha, e);       \
3252 }
3253
3254 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3255 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3256 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3257 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3258 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3259 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3260
3261 int
3262 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3263 {
3264         struct qla_work_evt *e;
3265
3266         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3267         if (!e)
3268                 return QLA_FUNCTION_FAILED;
3269
3270         e->u.uevent.code = code;
3271         return qla2x00_post_work(vha, e);
3272 }
3273
3274 static void
3275 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3276 {
3277         char event_string[40];
3278         char *envp[] = { event_string, NULL };
3279
3280         switch (code) {
3281         case QLA_UEVENT_CODE_FW_DUMP:
3282                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3283                     vha->host_no);
3284                 break;
3285         default:
3286                 /* do nothing */
3287                 break;
3288         }
3289         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3290 }
3291
3292 void
3293 qla2x00_do_work(struct scsi_qla_host *vha)
3294 {
3295         struct qla_work_evt *e, *tmp;
3296         unsigned long flags;
3297         LIST_HEAD(work);
3298
3299         spin_lock_irqsave(&vha->work_lock, flags);
3300         list_splice_init(&vha->work_list, &work);
3301         spin_unlock_irqrestore(&vha->work_lock, flags);
3302
3303         list_for_each_entry_safe(e, tmp, &work, list) {
3304                 list_del_init(&e->list);
3305
3306                 switch (e->type) {
3307                 case QLA_EVT_AEN:
3308                         fc_host_post_event(vha->host, fc_get_event_number(),
3309                             e->u.aen.code, e->u.aen.data);
3310                         break;
3311                 case QLA_EVT_IDC_ACK:
3312                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3313                         break;
3314                 case QLA_EVT_ASYNC_LOGIN:
3315                         qla2x00_async_login(vha, e->u.logio.fcport,
3316                             e->u.logio.data);
3317                         break;
3318                 case QLA_EVT_ASYNC_LOGIN_DONE:
3319                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3320                             e->u.logio.data);
3321                         break;
3322                 case QLA_EVT_ASYNC_LOGOUT:
3323                         qla2x00_async_logout(vha, e->u.logio.fcport);
3324                         break;
3325                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3326                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3327                             e->u.logio.data);
3328                         break;
3329                 case QLA_EVT_ASYNC_ADISC:
3330                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3331                             e->u.logio.data);
3332                         break;
3333                 case QLA_EVT_ASYNC_ADISC_DONE:
3334                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3335                             e->u.logio.data);
3336                         break;
3337                 case QLA_EVT_UEVENT:
3338                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3339                         break;
3340                 }
3341                 if (e->flags & QLA_EVT_FLAG_FREE)
3342                         kfree(e);
3343
3344                 /* For each work completed decrement vha ref count */
3345                 QLA_VHA_MARK_NOT_BUSY(vha);
3346         }
3347 }
3348
3349 /* Relogins all the fcports of a vport
3350  * Context: dpc thread
3351  */
3352 void qla2x00_relogin(struct scsi_qla_host *vha)
3353 {
3354         fc_port_t       *fcport;
3355         int status;
3356         uint16_t        next_loopid = 0;
3357         struct qla_hw_data *ha = vha->hw;
3358         uint16_t data[2];
3359
3360         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3361         /*
3362          * If the port is not ONLINE then try to login
3363          * to it if we haven't run out of retries.
3364          */
3365                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3366                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3367                         fcport->login_retry--;
3368                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3369                                 if (fcport->flags & FCF_FCP2_DEVICE)
3370                                         ha->isp_ops->fabric_logout(vha,
3371                                                         fcport->loop_id,
3372                                                         fcport->d_id.b.domain,
3373                                                         fcport->d_id.b.area,
3374                                                         fcport->d_id.b.al_pa);
3375
3376                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3377                                         fcport->loop_id = next_loopid =
3378                                             ha->min_external_loopid;
3379                                         status = qla2x00_find_new_loop_id(
3380                                             vha, fcport);
3381                                         if (status != QLA_SUCCESS) {
3382                                                 /* Ran out of IDs to use */
3383                                                 break;
3384                                         }
3385                                 }
3386
3387                                 if (IS_ALOGIO_CAPABLE(ha)) {
3388                                         fcport->flags |= FCF_ASYNC_SENT;
3389                                         data[0] = 0;
3390                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3391                                         status = qla2x00_post_async_login_work(
3392                                             vha, fcport, data);
3393                                         if (status == QLA_SUCCESS)
3394                                                 continue;
3395                                         /* Attempt a retry. */
3396                                         status = 1;
3397                                 } else
3398                                         status = qla2x00_fabric_login(vha,
3399                                             fcport, &next_loopid);
3400                         } else
3401                                 status = qla2x00_local_device_login(vha,
3402                                                                 fcport);
3403
3404                         if (status == QLA_SUCCESS) {
3405                                 fcport->old_loop_id = fcport->loop_id;
3406
3407                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3408                                     "Port login OK: logged in ID 0x%x.\n",
3409                                     fcport->loop_id);
3410
3411                                 qla2x00_update_fcport(vha, fcport);
3412
3413                         } else if (status == 1) {
3414                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3415                                 /* retry the login again */
3416                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
3417                                     "Retrying %d login again loop_id 0x%x.\n",
3418                                     fcport->login_retry, fcport->loop_id);
3419                         } else {
3420                                 fcport->login_retry = 0;
3421                         }
3422
3423                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3424                                 fcport->loop_id = FC_NO_LOOP_ID;
3425                 }
3426                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3427                         break;
3428         }
3429 }
3430
3431 /**************************************************************************
3432 * qla2x00_do_dpc
3433 *   This kernel thread is a task that is schedule by the interrupt handler
3434 *   to perform the background processing for interrupts.
3435 *
3436 * Notes:
3437 * This task always run in the context of a kernel thread.  It
3438 * is kick-off by the driver's detect code and starts up
3439 * up one per adapter. It immediately goes to sleep and waits for
3440 * some fibre event.  When either the interrupt handler or
3441 * the timer routine detects a event it will one of the task
3442 * bits then wake us up.
3443 **************************************************************************/
3444 static int
3445 qla2x00_do_dpc(void *data)
3446 {
3447         int             rval;
3448         scsi_qla_host_t *base_vha;
3449         struct qla_hw_data *ha;
3450
3451         ha = (struct qla_hw_data *)data;
3452         base_vha = pci_get_drvdata(ha->pdev);
3453
3454         set_user_nice(current, -20);
3455
3456         set_current_state(TASK_INTERRUPTIBLE);
3457         while (!kthread_should_stop()) {
3458                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
3459                     "DPC handler sleeping.\n");
3460
3461                 schedule();
3462                 __set_current_state(TASK_RUNNING);
3463
3464                 ql_dbg(ql_dbg_dpc, base_vha, 0x4001,
3465                     "DPC handler waking up.\n");
3466                 ql_dbg(ql_dbg_dpc, base_vha, 0x4002,
3467                     "dpc_flags=0x%lx.\n", base_vha->dpc_flags);
3468
3469                 /* Initialization not yet finished. Don't do anything yet. */
3470                 if (!base_vha->flags.init_done)
3471                         continue;
3472
3473                 if (ha->flags.eeh_busy) {
3474                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
3475                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
3476                         continue;
3477                 }
3478
3479                 ha->dpc_active = 1;
3480
3481                 if (ha->flags.mbox_busy) {
3482                         ha->dpc_active = 0;
3483                         continue;
3484                 }
3485
3486                 qla2x00_do_work(base_vha);
3487
3488                 if (IS_QLA82XX(ha)) {
3489                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
3490                                 &base_vha->dpc_flags)) {
3491                                 qla82xx_idc_lock(ha);
3492                                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3493                                         QLA82XX_DEV_FAILED);
3494                                 qla82xx_idc_unlock(ha);
3495                                 ql_log(ql_log_info, base_vha, 0x4004,
3496                                     "HW State: FAILED.\n");
3497                                 qla82xx_device_state_handler(base_vha);
3498                                 continue;
3499                         }
3500
3501                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3502                                 &base_vha->dpc_flags)) {
3503
3504                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
3505                                     "FCoE context reset scheduled.\n");
3506                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3507                                         &base_vha->dpc_flags))) {
3508                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
3509                                                 /* FCoE-ctx reset failed.
3510                                                  * Escalate to chip-reset
3511                                                  */
3512                                                 set_bit(ISP_ABORT_NEEDED,
3513                                                         &base_vha->dpc_flags);
3514                                         }
3515                                         clear_bit(ABORT_ISP_ACTIVE,
3516                                                 &base_vha->dpc_flags);
3517                                 }
3518
3519                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
3520                                     "FCoE context reset end.\n");
3521                         }
3522                 }
3523
3524                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3525                                                 &base_vha->dpc_flags)) {
3526
3527                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
3528                             "ISP abort scheduled.\n");
3529                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3530                             &base_vha->dpc_flags))) {
3531
3532                                 if (ha->isp_ops->abort_isp(base_vha)) {
3533                                         /* failed. retry later */
3534                                         set_bit(ISP_ABORT_NEEDED,
3535                                             &base_vha->dpc_flags);
3536                                 }
3537                                 clear_bit(ABORT_ISP_ACTIVE,
3538                                                 &base_vha->dpc_flags);
3539                         }
3540
3541                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
3542                             "ISP abort end.\n");
3543                 }
3544
3545                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
3546                     &base_vha->dpc_flags)) {
3547                         qla2x00_update_fcports(base_vha);
3548                 }
3549
3550                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3551                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
3552                             "Quiescence mode scheduled.\n");
3553                         qla82xx_device_state_handler(base_vha);
3554                         clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3555                         if (!ha->flags.quiesce_owner) {
3556                                 qla2x00_perform_loop_resync(base_vha);
3557
3558                                 qla82xx_idc_lock(ha);
3559                                 qla82xx_clear_qsnt_ready(base_vha);
3560                                 qla82xx_idc_unlock(ha);
3561                         }
3562                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
3563                             "Quiescence mode end.\n");
3564                 }
3565
3566                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3567                                                         &base_vha->dpc_flags) &&
3568                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
3569
3570                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
3571                             "Reset marker scheduled.\n");
3572                         qla2x00_rst_aen(base_vha);
3573                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
3574                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
3575                             "Reset marker end.\n");
3576                 }
3577
3578                 /* Retry each device up to login retry count */
3579                 if ((test_and_clear_bit(RELOGIN_NEEDED,
3580                                                 &base_vha->dpc_flags)) &&
3581                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3582                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
3583
3584                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
3585                             "Relogin scheduled.\n");
3586                         qla2x00_relogin(base_vha);
3587                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
3588                             "Relogin end.\n");
3589                 }
3590
3591                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3592                                                         &base_vha->dpc_flags)) {
3593
3594                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
3595                             "Loop resync scheduled.\n");
3596
3597                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
3598                             &base_vha->dpc_flags))) {
3599
3600                                 rval = qla2x00_loop_resync(base_vha);
3601
3602                                 clear_bit(LOOP_RESYNC_ACTIVE,
3603                                                 &base_vha->dpc_flags);
3604                         }
3605
3606                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
3607                             "Loop resync end.\n");
3608                 }
3609
3610                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3611                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
3612                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3613                         qla2xxx_flash_npiv_conf(base_vha);
3614                 }
3615
3616                 if (!ha->interrupts_on)
3617                         ha->isp_ops->enable_intrs(ha);
3618
3619                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3620                                         &base_vha->dpc_flags))
3621                         ha->isp_ops->beacon_blink(base_vha);
3622
3623                 qla2x00_do_dpc_all_vps(base_vha);
3624
3625                 ha->dpc_active = 0;
3626                 set_current_state(TASK_INTERRUPTIBLE);
3627         } /* End of while(1) */
3628         __set_current_state(TASK_RUNNING);
3629
3630         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
3631             "DPC handler exiting.\n");
3632
3633         /*
3634          * Make sure that nobody tries to wake us up again.
3635          */
3636         ha->dpc_active = 0;
3637
3638         /* Cleanup any residual CTX SRBs. */
3639         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3640
3641         return 0;
3642 }
3643
3644 void
3645 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
3646 {
3647         struct qla_hw_data *ha = vha->hw;
3648         struct task_struct *t = ha->dpc_thread;
3649
3650         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
3651                 wake_up_process(t);
3652 }
3653
3654 /*
3655 *  qla2x00_rst_aen
3656 *      Processes asynchronous reset.
3657 *
3658 * Input:
3659 *      ha  = adapter block pointer.
3660 */
3661 static void
3662 qla2x00_rst_aen(scsi_qla_host_t *vha)
3663 {
3664         if (vha->flags.online && !vha->flags.reset_active &&
3665             !atomic_read(&vha->loop_down_timer) &&
3666             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
3667                 do {
3668                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
3669
3670                         /*
3671                          * Issue marker command only when we are going to start
3672                          * the I/O.
3673                          */
3674                         vha->marker_needed = 1;
3675                 } while (!atomic_read(&vha->loop_down_timer) &&
3676                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
3677         }
3678 }
3679
3680 static void
3681 qla2x00_sp_free_dma(srb_t *sp)
3682 {
3683         struct scsi_cmnd *cmd = sp->cmd;
3684         struct qla_hw_data *ha = sp->fcport->vha->hw;
3685
3686         if (sp->flags & SRB_DMA_VALID) {
3687                 scsi_dma_unmap(cmd);
3688                 sp->flags &= ~SRB_DMA_VALID;
3689         }
3690
3691         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3692                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3693                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3694                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3695         }
3696
3697         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3698                 /* List assured to be having elements */
3699                 qla2x00_clean_dsd_pool(ha, sp);
3700                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3701         }
3702
3703         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3704                 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3705                     ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3706                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3707         }
3708
3709         CMD_SP(cmd) = NULL;
3710 }
3711
3712 static void
3713 qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
3714 {
3715         struct scsi_cmnd *cmd = sp->cmd;
3716
3717         qla2x00_sp_free_dma(sp);
3718
3719         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3720                 struct ct6_dsd *ctx = sp->ctx;
3721                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3722                         ctx->fcp_cmnd_dma);
3723                 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3724                 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3725                 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3726                 mempool_free(sp->ctx, ha->ctx_mempool);
3727                 sp->ctx = NULL;
3728         }
3729
3730         mempool_free(sp, ha->srb_mempool);
3731         cmd->scsi_done(cmd);
3732 }
3733
3734 void
3735 qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3736 {
3737         if (atomic_read(&sp->ref_count) == 0) {
3738                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
3739                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
3740                     sp, sp->cmd);
3741                 if (ql2xextended_error_logging & ql_dbg_io)
3742                         BUG();
3743                 return;
3744         }
3745         if (!atomic_dec_and_test(&sp->ref_count))
3746                 return;
3747         qla2x00_sp_final_compl(ha, sp);
3748 }
3749
3750 /**************************************************************************
3751 *   qla2x00_timer
3752 *
3753 * Description:
3754 *   One second timer
3755 *
3756 * Context: Interrupt
3757 ***************************************************************************/
3758 void
3759 qla2x00_timer(scsi_qla_host_t *vha)
3760 {
3761         unsigned long   cpu_flags = 0;
3762         int             start_dpc = 0;
3763         int             index;
3764         srb_t           *sp;
3765         uint16_t        w;
3766         struct qla_hw_data *ha = vha->hw;
3767         struct req_que *req;
3768
3769         if (ha->flags.eeh_busy) {
3770                 ql_dbg(ql_dbg_timer, vha, 0x6000,
3771                     "EEH = %d, restarting timer.\n",
3772                     ha->flags.eeh_busy);
3773                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3774                 return;
3775         }
3776
3777         /* Hardware read to raise pending EEH errors during mailbox waits. */
3778         if (!pci_channel_offline(ha->pdev))
3779                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
3780
3781         /* Make sure qla82xx_watchdog is run only for physical port */
3782         if (!vha->vp_idx && IS_QLA82XX(ha)) {
3783                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3784                         start_dpc++;
3785                 qla82xx_watchdog(vha);
3786         }
3787
3788         /* Loop down handler. */
3789         if (atomic_read(&vha->loop_down_timer) > 0 &&
3790             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
3791             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
3792                 && vha->flags.online) {
3793
3794                 if (atomic_read(&vha->loop_down_timer) ==
3795                     vha->loop_down_abort_time) {
3796
3797                         ql_log(ql_log_info, vha, 0x6008,
3798                             "Loop down - aborting the queues before time expires.\n");
3799
3800                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
3801                                 atomic_set(&vha->loop_state, LOOP_DEAD);
3802
3803                         /*
3804                          * Schedule an ISP abort to return any FCP2-device
3805                          * commands.
3806                          */
3807                         /* NPIV - scan physical port only */
3808                         if (!vha->vp_idx) {
3809                                 spin_lock_irqsave(&ha->hardware_lock,
3810                                     cpu_flags);
3811                                 req = ha->req_q_map[0];
3812                                 for (index = 1;
3813                                     index < MAX_OUTSTANDING_COMMANDS;
3814                                     index++) {
3815                                         fc_port_t *sfcp;
3816
3817                                         sp = req->outstanding_cmds[index];
3818                                         if (!sp)
3819                                                 continue;
3820                                         if (sp->ctx && !IS_PROT_IO(sp))
3821                                                 continue;
3822                                         sfcp = sp->fcport;
3823                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
3824                                                 continue;
3825
3826                                         if (IS_QLA82XX(ha))
3827                                                 set_bit(FCOE_CTX_RESET_NEEDED,
3828                                                         &vha->dpc_flags);
3829                                         else
3830                                                 set_bit(ISP_ABORT_NEEDED,
3831                                                         &vha->dpc_flags);
3832                                         break;
3833                                 }
3834                                 spin_unlock_irqrestore(&ha->hardware_lock,
3835                                                                 cpu_flags);
3836                         }
3837                         start_dpc++;
3838                 }
3839
3840                 /* if the loop has been down for 4 minutes, reinit adapter */
3841                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
3842                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
3843                                 ql_log(ql_log_warn, vha, 0x6009,
3844                                     "Loop down - aborting ISP.\n");
3845
3846                                 if (IS_QLA82XX(ha))
3847                                         set_bit(FCOE_CTX_RESET_NEEDED,
3848                                                 &vha->dpc_flags);
3849                                 else
3850                                         set_bit(ISP_ABORT_NEEDED,
3851                                                 &vha->dpc_flags);
3852                         }
3853                 }
3854                 ql_dbg(ql_dbg_timer, vha, 0x600a,
3855                     "Loop down - seconds remaining %d.\n",
3856                     atomic_read(&vha->loop_down_timer));
3857         }
3858
3859         /* Check if beacon LED needs to be blinked for physical host only */
3860         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
3861                 /* There is no beacon_blink function for ISP82xx */
3862                 if (!IS_QLA82XX(ha)) {
3863                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
3864                         start_dpc++;
3865                 }
3866         }
3867
3868         /* Process any deferred work. */
3869         if (!list_empty(&vha->work_list))
3870                 start_dpc++;
3871
3872         /* Schedule the DPC routine if needed */
3873         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3874             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3875             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
3876             start_dpc ||
3877             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3878             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
3879             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3880             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
3881             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3882             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
3883                 ql_dbg(ql_dbg_timer, vha, 0x600b,
3884                     "isp_abort_needed=%d loop_resync_needed=%d "
3885                     "fcport_update_needed=%d start_dpc=%d "
3886                     "reset_marker_needed=%d",
3887                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
3888                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
3889                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
3890                     start_dpc,
3891                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
3892                 ql_dbg(ql_dbg_timer, vha, 0x600c,
3893                     "beacon_blink_needed=%d isp_unrecoverable=%d "
3894                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
3895                     "relogin_needed=%d.\n",
3896                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
3897                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
3898                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
3899                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
3900                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
3901                 qla2xxx_wake_dpc(vha);
3902         }
3903
3904         qla2x00_restart_timer(vha, WATCH_INTERVAL);
3905 }
3906
3907 /* Firmware interface routines. */
3908
3909 #define FW_BLOBS        8
3910 #define FW_ISP21XX      0
3911 #define FW_ISP22XX      1
3912 #define FW_ISP2300      2
3913 #define FW_ISP2322      3
3914 #define FW_ISP24XX      4
3915 #define FW_ISP25XX      5
3916 #define FW_ISP81XX      6
3917 #define FW_ISP82XX      7
3918
3919 #define FW_FILE_ISP21XX "ql2100_fw.bin"
3920 #define FW_FILE_ISP22XX "ql2200_fw.bin"
3921 #define FW_FILE_ISP2300 "ql2300_fw.bin"
3922 #define FW_FILE_ISP2322 "ql2322_fw.bin"
3923 #define FW_FILE_ISP24XX "ql2400_fw.bin"
3924 #define FW_FILE_ISP25XX "ql2500_fw.bin"
3925 #define FW_FILE_ISP81XX "ql8100_fw.bin"
3926 #define FW_FILE_ISP82XX "ql8200_fw.bin"
3927
3928 static DEFINE_MUTEX(qla_fw_lock);
3929
3930 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
3931         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3932         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3933         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3934         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3935         { .name = FW_FILE_ISP24XX, },
3936         { .name = FW_FILE_ISP25XX, },
3937         { .name = FW_FILE_ISP81XX, },
3938         { .name = FW_FILE_ISP82XX, },
3939 };
3940
3941 struct fw_blob *
3942 qla2x00_request_firmware(scsi_qla_host_t *vha)
3943 {
3944         struct qla_hw_data *ha = vha->hw;
3945         struct fw_blob *blob;
3946
3947         blob = NULL;
3948         if (IS_QLA2100(ha)) {
3949                 blob = &qla_fw_blobs[FW_ISP21XX];
3950         } else if (IS_QLA2200(ha)) {
3951                 blob = &qla_fw_blobs[FW_ISP22XX];
3952         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3953                 blob = &qla_fw_blobs[FW_ISP2300];
3954         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
3955                 blob = &qla_fw_blobs[FW_ISP2322];
3956         } else if (IS_QLA24XX_TYPE(ha)) {
3957                 blob = &qla_fw_blobs[FW_ISP24XX];
3958         } else if (IS_QLA25XX(ha)) {
3959                 blob = &qla_fw_blobs[FW_ISP25XX];
3960         } else if (IS_QLA81XX(ha)) {
3961                 blob = &qla_fw_blobs[FW_ISP81XX];
3962         } else if (IS_QLA82XX(ha)) {
3963                 blob = &qla_fw_blobs[FW_ISP82XX];
3964         }
3965
3966         mutex_lock(&qla_fw_lock);
3967         if (blob->fw)
3968                 goto out;
3969
3970         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3971                 ql_log(ql_log_warn, vha, 0x0063,
3972                     "Failed to load firmware image (%s).\n", blob->name);
3973                 blob->fw = NULL;
3974                 blob = NULL;
3975                 goto out;
3976         }
3977
3978 out:
3979         mutex_unlock(&qla_fw_lock);
3980         return blob;
3981 }
3982
3983 static void
3984 qla2x00_release_firmware(void)
3985 {
3986         int idx;
3987
3988         mutex_lock(&qla_fw_lock);
3989         for (idx = 0; idx < FW_BLOBS; idx++)
3990                 if (qla_fw_blobs[idx].fw)
3991                         release_firmware(qla_fw_blobs[idx].fw);
3992         mutex_unlock(&qla_fw_lock);
3993 }
3994
3995 static pci_ers_result_t
3996 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3997 {
3998         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3999         struct qla_hw_data *ha = vha->hw;
4000
4001         ql_dbg(ql_dbg_aer, vha, 0x9000,
4002             "PCI error detected, state %x.\n", state);
4003
4004         switch (state) {
4005         case pci_channel_io_normal:
4006                 ha->flags.eeh_busy = 0;
4007                 return PCI_ERS_RESULT_CAN_RECOVER;
4008         case pci_channel_io_frozen:
4009                 ha->flags.eeh_busy = 1;
4010                 /* For ISP82XX complete any pending mailbox cmd */
4011                 if (IS_QLA82XX(ha)) {
4012                         ha->flags.isp82xx_fw_hung = 1;
4013                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
4014                         qla82xx_clear_pending_mbx(vha);
4015                 }
4016                 qla2x00_free_irqs(vha);
4017                 pci_disable_device(pdev);
4018                 /* Return back all IOs */
4019                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4020                 return PCI_ERS_RESULT_NEED_RESET;
4021         case pci_channel_io_perm_failure:
4022                 ha->flags.pci_channel_io_perm_failure = 1;
4023                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4024                 return PCI_ERS_RESULT_DISCONNECT;
4025         }
4026         return PCI_ERS_RESULT_NEED_RESET;
4027 }
4028
4029 static pci_ers_result_t
4030 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
4031 {
4032         int risc_paused = 0;
4033         uint32_t stat;
4034         unsigned long flags;
4035         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4036         struct qla_hw_data *ha = base_vha->hw;
4037         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4038         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
4039
4040         if (IS_QLA82XX(ha))
4041                 return PCI_ERS_RESULT_RECOVERED;
4042
4043         spin_lock_irqsave(&ha->hardware_lock, flags);
4044         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
4045                 stat = RD_REG_DWORD(&reg->hccr);
4046                 if (stat & HCCR_RISC_PAUSE)
4047                         risc_paused = 1;
4048         } else if (IS_QLA23XX(ha)) {
4049                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
4050                 if (stat & HSR_RISC_PAUSED)
4051                         risc_paused = 1;
4052         } else if (IS_FWI2_CAPABLE(ha)) {
4053                 stat = RD_REG_DWORD(&reg24->host_status);
4054                 if (stat & HSRX_RISC_PAUSED)
4055                         risc_paused = 1;
4056         }
4057         spin_unlock_irqrestore(&ha->hardware_lock, flags);
4058
4059         if (risc_paused) {
4060                 ql_log(ql_log_info, base_vha, 0x9003,
4061                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
4062                 ha->isp_ops->fw_dump(base_vha, 0);
4063
4064                 return PCI_ERS_RESULT_NEED_RESET;
4065         } else
4066                 return PCI_ERS_RESULT_RECOVERED;
4067 }
4068
4069 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
4070 {
4071         uint32_t rval = QLA_FUNCTION_FAILED;
4072         uint32_t drv_active = 0;
4073         struct qla_hw_data *ha = base_vha->hw;
4074         int fn;
4075         struct pci_dev *other_pdev = NULL;
4076
4077         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
4078             "Entered %s.\n", __func__);
4079
4080         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4081
4082         if (base_vha->flags.online) {
4083                 /* Abort all outstanding commands,
4084                  * so as to be requeued later */
4085                 qla2x00_abort_isp_cleanup(base_vha);
4086         }
4087
4088
4089         fn = PCI_FUNC(ha->pdev->devfn);
4090         while (fn > 0) {
4091                 fn--;
4092                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
4093                     "Finding pci device at function = 0x%x.\n", fn);
4094                 other_pdev =
4095                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
4096                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
4097                     fn));
4098
4099                 if (!other_pdev)
4100                         continue;
4101                 if (atomic_read(&other_pdev->enable_cnt)) {
4102                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
4103                             "Found PCI func available and enable at 0x%x.\n",
4104                             fn);
4105                         pci_dev_put(other_pdev);
4106                         break;
4107                 }
4108                 pci_dev_put(other_pdev);
4109         }
4110
4111         if (!fn) {
4112                 /* Reset owner */
4113                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
4114                     "This devfn is reset owner = 0x%x.\n",
4115                     ha->pdev->devfn);
4116                 qla82xx_idc_lock(ha);
4117
4118                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4119                     QLA82XX_DEV_INITIALIZING);
4120
4121                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
4122                     QLA82XX_IDC_VERSION);
4123
4124                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
4125                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
4126                     "drv_active = 0x%x.\n", drv_active);
4127
4128                 qla82xx_idc_unlock(ha);
4129                 /* Reset if device is not already reset
4130                  * drv_active would be 0 if a reset has already been done
4131                  */
4132                 if (drv_active)
4133                         rval = qla82xx_start_firmware(base_vha);
4134                 else
4135                         rval = QLA_SUCCESS;
4136                 qla82xx_idc_lock(ha);
4137
4138                 if (rval != QLA_SUCCESS) {
4139                         ql_log(ql_log_info, base_vha, 0x900b,
4140                             "HW State: FAILED.\n");
4141                         qla82xx_clear_drv_active(ha);
4142                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4143                             QLA82XX_DEV_FAILED);
4144                 } else {
4145                         ql_log(ql_log_info, base_vha, 0x900c,
4146                             "HW State: READY.\n");
4147                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4148                             QLA82XX_DEV_READY);
4149                         qla82xx_idc_unlock(ha);
4150                         ha->flags.isp82xx_fw_hung = 0;
4151                         rval = qla82xx_restart_isp(base_vha);
4152                         qla82xx_idc_lock(ha);
4153                         /* Clear driver state register */
4154                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
4155                         qla82xx_set_drv_active(base_vha);
4156                 }
4157                 qla82xx_idc_unlock(ha);
4158         } else {
4159                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
4160                     "This devfn is not reset owner = 0x%x.\n",
4161                     ha->pdev->devfn);
4162                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
4163                     QLA82XX_DEV_READY)) {
4164                         ha->flags.isp82xx_fw_hung = 0;
4165                         rval = qla82xx_restart_isp(base_vha);
4166                         qla82xx_idc_lock(ha);
4167                         qla82xx_set_drv_active(base_vha);
4168                         qla82xx_idc_unlock(ha);
4169                 }
4170         }
4171         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4172
4173         return rval;
4174 }
4175
4176 static pci_ers_result_t
4177 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
4178 {
4179         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
4180         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4181         struct qla_hw_data *ha = base_vha->hw;
4182         struct rsp_que *rsp;
4183         int rc, retries = 10;
4184
4185         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
4186             "Slot Reset.\n");
4187
4188         /* Workaround: qla2xxx driver which access hardware earlier
4189          * needs error state to be pci_channel_io_online.
4190          * Otherwise mailbox command timesout.
4191          */
4192         pdev->error_state = pci_channel_io_normal;
4193
4194         pci_restore_state(pdev);
4195
4196         /* pci_restore_state() clears the saved_state flag of the device
4197          * save restored state which resets saved_state flag
4198          */
4199         pci_save_state(pdev);
4200
4201         if (ha->mem_only)
4202                 rc = pci_enable_device_mem(pdev);
4203         else
4204                 rc = pci_enable_device(pdev);
4205
4206         if (rc) {
4207                 ql_log(ql_log_warn, base_vha, 0x9005,
4208                     "Can't re-enable PCI device after reset.\n");
4209                 goto exit_slot_reset;
4210         }
4211
4212         rsp = ha->rsp_q_map[0];
4213         if (qla2x00_request_irqs(ha, rsp))
4214                 goto exit_slot_reset;
4215
4216         if (ha->isp_ops->pci_config(base_vha))
4217                 goto exit_slot_reset;
4218
4219         if (IS_QLA82XX(ha)) {
4220                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4221                         ret = PCI_ERS_RESULT_RECOVERED;
4222                         goto exit_slot_reset;
4223                 } else
4224                         goto exit_slot_reset;
4225         }
4226
4227         while (ha->flags.mbox_busy && retries--)
4228                 msleep(1000);
4229
4230         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4231         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
4232                 ret =  PCI_ERS_RESULT_RECOVERED;
4233         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4234
4235
4236 exit_slot_reset:
4237         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
4238             "slot_reset return %x.\n", ret);
4239
4240         return ret;
4241 }
4242
4243 static void
4244 qla2xxx_pci_resume(struct pci_dev *pdev)
4245 {
4246         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4247         struct qla_hw_data *ha = base_vha->hw;
4248         int ret;
4249
4250         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
4251             "pci_resume.\n");
4252
4253         ret = qla2x00_wait_for_hba_online(base_vha);
4254         if (ret != QLA_SUCCESS) {
4255                 ql_log(ql_log_fatal, base_vha, 0x9002,
4256                     "The device failed to resume I/O from slot/link_reset.\n");
4257         }
4258
4259         pci_cleanup_aer_uncorrect_error_status(pdev);
4260
4261         ha->flags.eeh_busy = 0;
4262 }
4263
4264 static struct pci_error_handlers qla2xxx_err_handler = {
4265         .error_detected = qla2xxx_pci_error_detected,
4266         .mmio_enabled = qla2xxx_pci_mmio_enabled,
4267         .slot_reset = qla2xxx_pci_slot_reset,
4268         .resume = qla2xxx_pci_resume,
4269 };
4270
4271 static struct pci_device_id qla2xxx_pci_tbl[] = {
4272         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4273         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4274         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4275         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4276         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4277         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4278         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4279         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4280         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4281         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
4282         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4283         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
4284         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
4285         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
4286         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
4287         { 0 },
4288 };
4289 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4290
4291 static struct pci_driver qla2xxx_pci_driver = {
4292         .name           = QLA2XXX_DRIVER_NAME,
4293         .driver         = {
4294                 .owner          = THIS_MODULE,
4295         },
4296         .id_table       = qla2xxx_pci_tbl,
4297         .probe          = qla2x00_probe_one,
4298         .remove         = qla2x00_remove_one,
4299         .shutdown       = qla2x00_shutdown,
4300         .err_handler    = &qla2xxx_err_handler,
4301 };
4302
4303 static struct file_operations apidev_fops = {
4304         .owner = THIS_MODULE,
4305         .llseek = noop_llseek,
4306 };
4307
4308 /**
4309  * qla2x00_module_init - Module initialization.
4310  **/
4311 static int __init
4312 qla2x00_module_init(void)
4313 {
4314         int ret = 0;
4315
4316         /* Allocate cache for SRBs. */
4317         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
4318             SLAB_HWCACHE_ALIGN, NULL);
4319         if (srb_cachep == NULL) {
4320                 ql_log(ql_log_fatal, NULL, 0x0001,
4321                     "Unable to allocate SRB cache...Failing load!.\n");
4322                 return -ENOMEM;
4323         }
4324
4325         /* Derive version string. */
4326         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
4327         if (ql2xextended_error_logging)
4328                 strcat(qla2x00_version_str, "-debug");
4329
4330         qla2xxx_transport_template =
4331             fc_attach_transport(&qla2xxx_transport_functions);
4332         if (!qla2xxx_transport_template) {
4333                 kmem_cache_destroy(srb_cachep);
4334                 ql_log(ql_log_fatal, NULL, 0x0002,
4335                     "fc_attach_transport failed...Failing load!.\n");
4336                 return -ENODEV;
4337         }
4338
4339         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4340         if (apidev_major < 0) {
4341                 ql_log(ql_log_fatal, NULL, 0x0003,
4342                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
4343         }
4344
4345         qla2xxx_transport_vport_template =
4346             fc_attach_transport(&qla2xxx_transport_vport_functions);
4347         if (!qla2xxx_transport_vport_template) {
4348                 kmem_cache_destroy(srb_cachep);
4349                 fc_release_transport(qla2xxx_transport_template);
4350                 ql_log(ql_log_fatal, NULL, 0x0004,
4351                     "fc_attach_transport vport failed...Failing load!.\n");
4352                 return -ENODEV;
4353         }
4354         ql_log(ql_log_info, NULL, 0x0005,
4355             "QLogic Fibre Channel HBA Driver: %s.\n",
4356             qla2x00_version_str);
4357         ret = pci_register_driver(&qla2xxx_pci_driver);
4358         if (ret) {
4359                 kmem_cache_destroy(srb_cachep);
4360                 fc_release_transport(qla2xxx_transport_template);
4361                 fc_release_transport(qla2xxx_transport_vport_template);
4362                 ql_log(ql_log_fatal, NULL, 0x0006,
4363                     "pci_register_driver failed...ret=%d Failing load!.\n",
4364                     ret);
4365         }
4366         return ret;
4367 }
4368
4369 /**
4370  * qla2x00_module_exit - Module cleanup.
4371  **/
4372 static void __exit
4373 qla2x00_module_exit(void)
4374 {
4375         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
4376         pci_unregister_driver(&qla2xxx_pci_driver);
4377         qla2x00_release_firmware();
4378         kmem_cache_destroy(srb_cachep);
4379         if (ctx_cachep)
4380                 kmem_cache_destroy(ctx_cachep);
4381         fc_release_transport(qla2xxx_transport_template);
4382         fc_release_transport(qla2xxx_transport_vport_template);
4383 }
4384
4385 module_init(qla2x00_module_init);
4386 module_exit(qla2x00_module_exit);
4387
4388 MODULE_AUTHOR("QLogic Corporation");
4389 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4390 MODULE_LICENSE("GPL");
4391 MODULE_VERSION(QLA2XXX_VERSION);
4392 MODULE_FIRMWARE(FW_FILE_ISP21XX);
4393 MODULE_FIRMWARE(FW_FILE_ISP22XX);
4394 MODULE_FIRMWARE(FW_FILE_ISP2300);
4395 MODULE_FIRMWARE(FW_FILE_ISP2322);
4396 MODULE_FIRMWARE(FW_FILE_ISP24XX);
4397 MODULE_FIRMWARE(FW_FILE_ISP25XX);