2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
37 unsigned long flags = 0;
38 device_reg_t __iomem *reg;
43 uint16_t __iomem *optr;
46 unsigned long wait_time;
47 struct qla_hw_data *ha = vha->hw;
48 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
50 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
52 if (ha->pdev->error_state > pci_channel_io_frozen) {
53 ql_log(ql_log_warn, vha, 0x1001,
54 "error_state is greater than pci_channel_io_frozen, "
56 return QLA_FUNCTION_TIMEOUT;
59 if (vha->device_flags & DFLG_DEV_FAILED) {
60 ql_log(ql_log_warn, vha, 0x1002,
61 "Device in failed state, exiting.\n");
62 return QLA_FUNCTION_TIMEOUT;
66 io_lock_on = base_vha->flags.init_done;
69 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
72 if (ha->flags.pci_channel_io_perm_failure) {
73 ql_log(ql_log_warn, vha, 0x1003,
74 "Perm failure on EEH timeout MBX, exiting.\n");
75 return QLA_FUNCTION_TIMEOUT;
78 if (IS_QLA82XX(ha) && ha->flags.isp82xx_fw_hung) {
79 /* Setting Link-Down error */
80 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
81 ql_log(ql_log_warn, vha, 0x1004,
82 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
83 return QLA_FUNCTION_TIMEOUT;
87 * Wait for active mailbox commands to finish by waiting at most tov
88 * seconds. This is to serialize actual issuing of mailbox cmds during
91 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
92 /* Timeout occurred. Return error. */
93 ql_log(ql_log_warn, vha, 0x1005,
94 "Cmd access timeout, cmd=0x%x, Exiting.\n",
96 return QLA_FUNCTION_TIMEOUT;
99 ha->flags.mbox_busy = 1;
100 /* Save mailbox command for debug */
103 ql_dbg(ql_dbg_mbx, vha, 0x1006,
104 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
106 spin_lock_irqsave(&ha->hardware_lock, flags);
108 /* Load mailbox registers. */
110 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
111 else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha))
112 optr = (uint16_t __iomem *)®->isp24.mailbox0;
114 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
117 command = mcp->mb[0];
118 mboxes = mcp->out_mb;
120 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
121 if (IS_QLA2200(ha) && cnt == 8)
123 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
125 WRT_REG_WORD(optr, *iptr);
132 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1111,
133 "Loaded MBX registers (displayed in bytes) =.\n");
134 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1112,
135 (uint8_t *)mcp->mb, 16);
136 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1113,
138 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1114,
139 ((uint8_t *)mcp->mb + 0x10), 16);
140 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1115,
142 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1116,
143 ((uint8_t *)mcp->mb + 0x20), 8);
144 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
145 "I/O Address = %p.\n", optr);
146 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x100e);
148 /* Issue set host interrupt command to send cmd out. */
149 ha->flags.mbox_int = 0;
150 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
152 /* Unlock mbx registers and wait for interrupt */
153 ql_dbg(ql_dbg_mbx, vha, 0x100f,
154 "Going to unlock irq & waiting for interrupts. "
155 "jiffies=%lx.\n", jiffies);
157 /* Wait for mbx cmd completion until timeout */
159 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
160 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
162 if (IS_QLA82XX(ha)) {
163 if (RD_REG_DWORD(®->isp82.hint) &
164 HINT_MBX_INT_PENDING) {
165 spin_unlock_irqrestore(&ha->hardware_lock,
167 ha->flags.mbox_busy = 0;
168 ql_dbg(ql_dbg_mbx, vha, 0x1010,
169 "Pending mailbox timeout, exiting.\n");
170 rval = QLA_FUNCTION_TIMEOUT;
173 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
174 } else if (IS_FWI2_CAPABLE(ha))
175 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
177 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
178 spin_unlock_irqrestore(&ha->hardware_lock, flags);
180 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
182 ql_dbg(ql_dbg_mbx, vha, 0x117a,
183 "cmd=%x Timeout.\n", command);
184 spin_lock_irqsave(&ha->hardware_lock, flags);
185 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
186 spin_unlock_irqrestore(&ha->hardware_lock, flags);
189 ql_dbg(ql_dbg_mbx, vha, 0x1011,
190 "Cmd=%x Polling Mode.\n", command);
192 if (IS_QLA82XX(ha)) {
193 if (RD_REG_DWORD(®->isp82.hint) &
194 HINT_MBX_INT_PENDING) {
195 spin_unlock_irqrestore(&ha->hardware_lock,
197 ha->flags.mbox_busy = 0;
198 ql_dbg(ql_dbg_mbx, vha, 0x1012,
199 "Pending mailbox timeout, exiting.\n");
200 rval = QLA_FUNCTION_TIMEOUT;
203 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
204 } else if (IS_FWI2_CAPABLE(ha))
205 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
207 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
208 spin_unlock_irqrestore(&ha->hardware_lock, flags);
210 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
211 while (!ha->flags.mbox_int) {
212 if (time_after(jiffies, wait_time))
215 /* Check for pending interrupts. */
216 qla2x00_poll(ha->rsp_q_map[0]);
218 if (!ha->flags.mbox_int &&
220 command == MBC_LOAD_RISC_RAM_EXTENDED))
223 ql_dbg(ql_dbg_mbx, vha, 0x1013,
225 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
228 /* Check whether we timed out */
229 if (ha->flags.mbox_int) {
232 ql_dbg(ql_dbg_mbx, vha, 0x1014,
233 "Cmd=%x completed.\n", command);
235 /* Got interrupt. Clear the flag. */
236 ha->flags.mbox_int = 0;
237 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
239 if ((IS_QLA82XX(ha) && ha->flags.isp82xx_fw_hung)) {
240 ha->flags.mbox_busy = 0;
241 /* Setting Link-Down error */
242 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
244 rval = QLA_FUNCTION_FAILED;
245 ql_log(ql_log_warn, vha, 0x1015,
246 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
250 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
251 rval = QLA_FUNCTION_FAILED;
253 /* Load return mailbox registers. */
255 iptr = (uint16_t *)&ha->mailbox_out[0];
257 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
270 if (IS_FWI2_CAPABLE(ha)) {
271 mb0 = RD_REG_WORD(®->isp24.mailbox0);
272 ictrl = RD_REG_DWORD(®->isp24.ictrl);
274 mb0 = RD_MAILBOX_REG(ha, ®->isp, 0);
275 ictrl = RD_REG_WORD(®->isp.ictrl);
277 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
278 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
279 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
280 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
283 * Attempt to capture a firmware dump for further analysis
284 * of the current firmware state
286 ha->isp_ops->fw_dump(vha, 0);
288 rval = QLA_FUNCTION_TIMEOUT;
291 ha->flags.mbox_busy = 0;
296 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
297 ql_dbg(ql_dbg_mbx, vha, 0x101a,
298 "Checking for additional resp interrupt.\n");
300 /* polling mode for non isp_abort commands. */
301 qla2x00_poll(ha->rsp_q_map[0]);
304 if (rval == QLA_FUNCTION_TIMEOUT &&
305 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
306 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
307 ha->flags.eeh_busy) {
308 /* not in dpc. schedule it for dpc to take over. */
309 ql_dbg(ql_dbg_mbx, vha, 0x101b,
310 "Timeout, schedule isp_abort_needed.\n");
312 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
313 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
314 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
315 if (IS_QLA82XX(ha)) {
316 ql_dbg(ql_dbg_mbx, vha, 0x112a,
317 "disabling pause transmit on port "
320 QLA82XX_CRB_NIU + 0x98,
321 CRB_NIU_XG_PAUSE_CTL_P0|
322 CRB_NIU_XG_PAUSE_CTL_P1);
324 ql_log(ql_log_info, base_vha, 0x101c,
325 "Mailbox cmd timeout occurred, cmd=0x%x, "
326 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
327 "abort.\n", command, mcp->mb[0],
329 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
330 qla2xxx_wake_dpc(vha);
332 } else if (!abort_active) {
333 /* call abort directly since we are in the DPC thread */
334 ql_dbg(ql_dbg_mbx, vha, 0x101d,
335 "Timeout, calling abort_isp.\n");
337 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
338 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
339 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
340 if (IS_QLA82XX(ha)) {
341 ql_dbg(ql_dbg_mbx, vha, 0x112b,
342 "disabling pause transmit on port "
345 QLA82XX_CRB_NIU + 0x98,
346 CRB_NIU_XG_PAUSE_CTL_P0|
347 CRB_NIU_XG_PAUSE_CTL_P1);
349 ql_log(ql_log_info, base_vha, 0x101e,
350 "Mailbox cmd timeout occurred, cmd=0x%x, "
351 "mb[0]=0x%x. Scheduling ISP abort ",
352 command, mcp->mb[0]);
353 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
354 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
355 /* Allow next mbx cmd to come in. */
356 complete(&ha->mbx_cmd_comp);
357 if (ha->isp_ops->abort_isp(vha)) {
358 /* Failed. retry later. */
359 set_bit(ISP_ABORT_NEEDED,
362 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
363 ql_dbg(ql_dbg_mbx, vha, 0x101f,
364 "Finished abort_isp.\n");
371 /* Allow next mbx cmd to come in. */
372 complete(&ha->mbx_cmd_comp);
376 ql_log(ql_log_warn, base_vha, 0x1020,
377 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
378 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
380 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
387 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
388 uint32_t risc_code_size)
391 struct qla_hw_data *ha = vha->hw;
393 mbx_cmd_t *mcp = &mc;
395 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
396 "Entered %s.\n", __func__);
398 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
399 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
400 mcp->mb[8] = MSW(risc_addr);
401 mcp->out_mb = MBX_8|MBX_0;
403 mcp->mb[0] = MBC_LOAD_RISC_RAM;
406 mcp->mb[1] = LSW(risc_addr);
407 mcp->mb[2] = MSW(req_dma);
408 mcp->mb[3] = LSW(req_dma);
409 mcp->mb[6] = MSW(MSD(req_dma));
410 mcp->mb[7] = LSW(MSD(req_dma));
411 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
412 if (IS_FWI2_CAPABLE(ha)) {
413 mcp->mb[4] = MSW(risc_code_size);
414 mcp->mb[5] = LSW(risc_code_size);
415 mcp->out_mb |= MBX_5|MBX_4;
417 mcp->mb[4] = LSW(risc_code_size);
418 mcp->out_mb |= MBX_4;
422 mcp->tov = MBX_TOV_SECONDS;
424 rval = qla2x00_mailbox_command(vha, mcp);
426 if (rval != QLA_SUCCESS) {
427 ql_dbg(ql_dbg_mbx, vha, 0x1023,
428 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
430 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
431 "Done %s.\n", __func__);
437 #define EXTENDED_BB_CREDITS BIT_0
440 * Start adapter firmware.
443 * ha = adapter block pointer.
444 * TARGET_QUEUE_LOCK must be released.
445 * ADAPTER_STATE_LOCK must be released.
448 * qla2x00 local function return status code.
454 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
457 struct qla_hw_data *ha = vha->hw;
459 mbx_cmd_t *mcp = &mc;
461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
462 "Entered %s.\n", __func__);
464 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
467 if (IS_FWI2_CAPABLE(ha)) {
468 mcp->mb[1] = MSW(risc_addr);
469 mcp->mb[2] = LSW(risc_addr);
471 if (IS_QLA81XX(ha) || IS_QLA83XX(ha)) {
472 struct nvram_81xx *nv = ha->nvram;
473 mcp->mb[4] = (nv->enhanced_features &
474 EXTENDED_BB_CREDITS);
477 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
480 mcp->mb[1] = LSW(risc_addr);
481 mcp->out_mb |= MBX_1;
482 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
484 mcp->out_mb |= MBX_2;
488 mcp->tov = MBX_TOV_SECONDS;
490 rval = qla2x00_mailbox_command(vha, mcp);
492 if (rval != QLA_SUCCESS) {
493 ql_dbg(ql_dbg_mbx, vha, 0x1026,
494 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
496 if (IS_FWI2_CAPABLE(ha)) {
497 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
498 "Done exchanges=%x.\n", mcp->mb[1]);
500 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
501 "Done %s.\n", __func__);
509 * qla2x00_get_fw_version
510 * Get firmware version.
513 * ha: adapter state pointer.
514 * major: pointer for major number.
515 * minor: pointer for minor number.
516 * subminor: pointer for subminor number.
519 * qla2x00 local function return status code.
525 qla2x00_get_fw_version(scsi_qla_host_t *vha)
529 mbx_cmd_t *mcp = &mc;
530 struct qla_hw_data *ha = vha->hw;
532 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
533 "Entered %s.\n", __func__);
535 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
537 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
538 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha))
539 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
540 if (IS_FWI2_CAPABLE(ha))
541 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
543 mcp->tov = MBX_TOV_SECONDS;
544 rval = qla2x00_mailbox_command(vha, mcp);
545 if (rval != QLA_SUCCESS)
548 /* Return mailbox data. */
549 ha->fw_major_version = mcp->mb[1];
550 ha->fw_minor_version = mcp->mb[2];
551 ha->fw_subminor_version = mcp->mb[3];
552 ha->fw_attributes = mcp->mb[6];
553 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
554 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
556 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
557 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw)) {
558 ha->mpi_version[0] = mcp->mb[10] & 0xff;
559 ha->mpi_version[1] = mcp->mb[11] >> 8;
560 ha->mpi_version[2] = mcp->mb[11] & 0xff;
561 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
562 ha->phy_version[0] = mcp->mb[8] & 0xff;
563 ha->phy_version[1] = mcp->mb[9] >> 8;
564 ha->phy_version[2] = mcp->mb[9] & 0xff;
566 if (IS_FWI2_CAPABLE(ha)) {
567 ha->fw_attributes_h = mcp->mb[15];
568 ha->fw_attributes_ext[0] = mcp->mb[16];
569 ha->fw_attributes_ext[1] = mcp->mb[17];
570 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
571 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
572 __func__, mcp->mb[15], mcp->mb[6]);
573 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
574 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
575 __func__, mcp->mb[17], mcp->mb[16]);
579 if (rval != QLA_SUCCESS) {
581 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
584 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
585 "Done %s.\n", __func__);
591 * qla2x00_get_fw_options
592 * Set firmware options.
595 * ha = adapter block pointer.
596 * fwopt = pointer for firmware options.
599 * qla2x00 local function return status code.
605 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
609 mbx_cmd_t *mcp = &mc;
611 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
612 "Entered %s.\n", __func__);
614 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
616 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
617 mcp->tov = MBX_TOV_SECONDS;
619 rval = qla2x00_mailbox_command(vha, mcp);
621 if (rval != QLA_SUCCESS) {
623 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
625 fwopts[0] = mcp->mb[0];
626 fwopts[1] = mcp->mb[1];
627 fwopts[2] = mcp->mb[2];
628 fwopts[3] = mcp->mb[3];
630 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
631 "Done %s.\n", __func__);
639 * qla2x00_set_fw_options
640 * Set firmware options.
643 * ha = adapter block pointer.
644 * fwopt = pointer for firmware options.
647 * qla2x00 local function return status code.
653 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
657 mbx_cmd_t *mcp = &mc;
659 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
660 "Entered %s.\n", __func__);
662 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
663 mcp->mb[1] = fwopts[1];
664 mcp->mb[2] = fwopts[2];
665 mcp->mb[3] = fwopts[3];
666 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
668 if (IS_FWI2_CAPABLE(vha->hw)) {
671 mcp->mb[10] = fwopts[10];
672 mcp->mb[11] = fwopts[11];
673 mcp->mb[12] = 0; /* Undocumented, but used */
674 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
676 mcp->tov = MBX_TOV_SECONDS;
678 rval = qla2x00_mailbox_command(vha, mcp);
680 fwopts[0] = mcp->mb[0];
682 if (rval != QLA_SUCCESS) {
684 ql_dbg(ql_dbg_mbx, vha, 0x1030,
685 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
688 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
689 "Done %s.\n", __func__);
696 * qla2x00_mbx_reg_test
697 * Mailbox register wrap test.
700 * ha = adapter block pointer.
701 * TARGET_QUEUE_LOCK must be released.
702 * ADAPTER_STATE_LOCK must be released.
705 * qla2x00 local function return status code.
711 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
715 mbx_cmd_t *mcp = &mc;
717 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
718 "Entered %s.\n", __func__);
720 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
728 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
729 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
730 mcp->tov = MBX_TOV_SECONDS;
732 rval = qla2x00_mailbox_command(vha, mcp);
734 if (rval == QLA_SUCCESS) {
735 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
736 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
737 rval = QLA_FUNCTION_FAILED;
738 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
739 mcp->mb[7] != 0x2525)
740 rval = QLA_FUNCTION_FAILED;
743 if (rval != QLA_SUCCESS) {
745 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
748 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
749 "Done %s.\n", __func__);
756 * qla2x00_verify_checksum
757 * Verify firmware checksum.
760 * ha = adapter block pointer.
761 * TARGET_QUEUE_LOCK must be released.
762 * ADAPTER_STATE_LOCK must be released.
765 * qla2x00 local function return status code.
771 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
775 mbx_cmd_t *mcp = &mc;
777 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
778 "Entered %s.\n", __func__);
780 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
783 if (IS_FWI2_CAPABLE(vha->hw)) {
784 mcp->mb[1] = MSW(risc_addr);
785 mcp->mb[2] = LSW(risc_addr);
786 mcp->out_mb |= MBX_2|MBX_1;
787 mcp->in_mb |= MBX_2|MBX_1;
789 mcp->mb[1] = LSW(risc_addr);
790 mcp->out_mb |= MBX_1;
794 mcp->tov = MBX_TOV_SECONDS;
796 rval = qla2x00_mailbox_command(vha, mcp);
798 if (rval != QLA_SUCCESS) {
799 ql_dbg(ql_dbg_mbx, vha, 0x1036,
800 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
801 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
803 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
804 "Done %s.\n", __func__);
812 * Issue IOCB using mailbox command
815 * ha = adapter state pointer.
816 * buffer = buffer pointer.
817 * phys_addr = physical address of buffer.
818 * size = size of buffer.
819 * TARGET_QUEUE_LOCK must be released.
820 * ADAPTER_STATE_LOCK must be released.
823 * qla2x00 local function return status code.
829 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
830 dma_addr_t phys_addr, size_t size, uint32_t tov)
834 mbx_cmd_t *mcp = &mc;
836 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
837 "Entered %s.\n", __func__);
839 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
841 mcp->mb[2] = MSW(phys_addr);
842 mcp->mb[3] = LSW(phys_addr);
843 mcp->mb[6] = MSW(MSD(phys_addr));
844 mcp->mb[7] = LSW(MSD(phys_addr));
845 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
846 mcp->in_mb = MBX_2|MBX_0;
849 rval = qla2x00_mailbox_command(vha, mcp);
851 if (rval != QLA_SUCCESS) {
853 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
855 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
857 /* Mask reserved bits. */
858 sts_entry->entry_status &=
859 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
860 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
861 "Done %s.\n", __func__);
868 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
871 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
876 * qla2x00_abort_command
877 * Abort command aborts a specified IOCB.
880 * ha = adapter block pointer.
881 * sp = SB structure pointer.
884 * qla2x00 local function return status code.
890 qla2x00_abort_command(srb_t *sp)
892 unsigned long flags = 0;
896 mbx_cmd_t *mcp = &mc;
897 fc_port_t *fcport = sp->fcport;
898 scsi_qla_host_t *vha = fcport->vha;
899 struct qla_hw_data *ha = vha->hw;
900 struct req_que *req = vha->req;
901 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
903 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
904 "Entered %s.\n", __func__);
906 spin_lock_irqsave(&ha->hardware_lock, flags);
907 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
908 if (req->outstanding_cmds[handle] == sp)
911 spin_unlock_irqrestore(&ha->hardware_lock, flags);
913 if (handle == req->num_outstanding_cmds) {
914 /* command not found */
915 return QLA_FUNCTION_FAILED;
918 mcp->mb[0] = MBC_ABORT_COMMAND;
919 if (HAS_EXTENDED_IDS(ha))
920 mcp->mb[1] = fcport->loop_id;
922 mcp->mb[1] = fcport->loop_id << 8;
923 mcp->mb[2] = (uint16_t)handle;
924 mcp->mb[3] = (uint16_t)(handle >> 16);
925 mcp->mb[6] = (uint16_t)cmd->device->lun;
926 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
928 mcp->tov = MBX_TOV_SECONDS;
930 rval = qla2x00_mailbox_command(vha, mcp);
932 if (rval != QLA_SUCCESS) {
933 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
935 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
936 "Done %s.\n", __func__);
943 qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
947 mbx_cmd_t *mcp = &mc;
948 scsi_qla_host_t *vha;
955 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
956 "Entered %s.\n", __func__);
958 req = vha->hw->req_q_map[0];
960 mcp->mb[0] = MBC_ABORT_TARGET;
961 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
962 if (HAS_EXTENDED_IDS(vha->hw)) {
963 mcp->mb[1] = fcport->loop_id;
965 mcp->out_mb |= MBX_10;
967 mcp->mb[1] = fcport->loop_id << 8;
969 mcp->mb[2] = vha->hw->loop_reset_delay;
970 mcp->mb[9] = vha->vp_idx;
973 mcp->tov = MBX_TOV_SECONDS;
975 rval = qla2x00_mailbox_command(vha, mcp);
976 if (rval != QLA_SUCCESS) {
977 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
978 "Failed=%x.\n", rval);
981 /* Issue marker IOCB. */
982 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
984 if (rval2 != QLA_SUCCESS) {
985 ql_dbg(ql_dbg_mbx, vha, 0x1040,
986 "Failed to issue marker IOCB (%x).\n", rval2);
988 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
989 "Done %s.\n", __func__);
996 qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
1000 mbx_cmd_t *mcp = &mc;
1001 scsi_qla_host_t *vha;
1002 struct req_que *req;
1003 struct rsp_que *rsp;
1007 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1008 "Entered %s.\n", __func__);
1010 req = vha->hw->req_q_map[0];
1012 mcp->mb[0] = MBC_LUN_RESET;
1013 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1014 if (HAS_EXTENDED_IDS(vha->hw))
1015 mcp->mb[1] = fcport->loop_id;
1017 mcp->mb[1] = fcport->loop_id << 8;
1020 mcp->mb[9] = vha->vp_idx;
1023 mcp->tov = MBX_TOV_SECONDS;
1025 rval = qla2x00_mailbox_command(vha, mcp);
1026 if (rval != QLA_SUCCESS) {
1027 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1030 /* Issue marker IOCB. */
1031 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1033 if (rval2 != QLA_SUCCESS) {
1034 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1035 "Failed to issue marker IOCB (%x).\n", rval2);
1037 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1038 "Done %s.\n", __func__);
1045 * qla2x00_get_adapter_id
1046 * Get adapter ID and topology.
1049 * ha = adapter block pointer.
1050 * id = pointer for loop ID.
1051 * al_pa = pointer for AL_PA.
1052 * area = pointer for area.
1053 * domain = pointer for domain.
1054 * top = pointer for topology.
1055 * TARGET_QUEUE_LOCK must be released.
1056 * ADAPTER_STATE_LOCK must be released.
1059 * qla2x00 local function return status code.
1065 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1066 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1070 mbx_cmd_t *mcp = &mc;
1072 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1073 "Entered %s.\n", __func__);
1075 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1076 mcp->mb[9] = vha->vp_idx;
1077 mcp->out_mb = MBX_9|MBX_0;
1078 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1079 if (IS_CNA_CAPABLE(vha->hw))
1080 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1081 mcp->tov = MBX_TOV_SECONDS;
1083 rval = qla2x00_mailbox_command(vha, mcp);
1084 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1085 rval = QLA_COMMAND_ERROR;
1086 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1087 rval = QLA_INVALID_COMMAND;
1091 *al_pa = LSB(mcp->mb[2]);
1092 *area = MSB(mcp->mb[2]);
1093 *domain = LSB(mcp->mb[3]);
1095 *sw_cap = mcp->mb[7];
1097 if (rval != QLA_SUCCESS) {
1099 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1101 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1102 "Done %s.\n", __func__);
1104 if (IS_CNA_CAPABLE(vha->hw)) {
1105 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1106 vha->fcoe_fcf_idx = mcp->mb[10];
1107 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1108 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1109 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1110 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1111 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1112 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1120 * qla2x00_get_retry_cnt
1121 * Get current firmware login retry count and delay.
1124 * ha = adapter block pointer.
1125 * retry_cnt = pointer to login retry count.
1126 * tov = pointer to login timeout value.
1129 * qla2x00 local function return status code.
1135 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1141 mbx_cmd_t *mcp = &mc;
1143 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1144 "Entered %s.\n", __func__);
1146 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1147 mcp->out_mb = MBX_0;
1148 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1149 mcp->tov = MBX_TOV_SECONDS;
1151 rval = qla2x00_mailbox_command(vha, mcp);
1153 if (rval != QLA_SUCCESS) {
1155 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1156 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1158 /* Convert returned data and check our values. */
1159 *r_a_tov = mcp->mb[3] / 2;
1160 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1161 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1162 /* Update to the larger values */
1163 *retry_cnt = (uint8_t)mcp->mb[1];
1167 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1168 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1175 * qla2x00_init_firmware
1176 * Initialize adapter firmware.
1179 * ha = adapter block pointer.
1180 * dptr = Initialization control block pointer.
1181 * size = size of initialization control block.
1182 * TARGET_QUEUE_LOCK must be released.
1183 * ADAPTER_STATE_LOCK must be released.
1186 * qla2x00 local function return status code.
1192 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1196 mbx_cmd_t *mcp = &mc;
1197 struct qla_hw_data *ha = vha->hw;
1199 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1200 "Entered %s.\n", __func__);
1202 if (IS_QLA82XX(ha) && ql2xdbwr)
1203 qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
1204 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1206 if (ha->flags.npiv_supported)
1207 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1209 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1212 mcp->mb[2] = MSW(ha->init_cb_dma);
1213 mcp->mb[3] = LSW(ha->init_cb_dma);
1214 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1215 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1216 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1217 if ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) && ha->ex_init_cb->ex_version) {
1219 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1220 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1221 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1222 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1223 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1224 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1226 /* 1 and 2 should normally be captured. */
1227 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1229 /* mb3 is additional info about the installed SFP. */
1230 mcp->in_mb |= MBX_3;
1231 mcp->buf_size = size;
1232 mcp->flags = MBX_DMA_OUT;
1233 mcp->tov = MBX_TOV_SECONDS;
1234 rval = qla2x00_mailbox_command(vha, mcp);
1236 if (rval != QLA_SUCCESS) {
1238 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1239 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1240 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1243 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1244 "Done %s.\n", __func__);
1251 * qla2x00_get_node_name_list
1252 * Issue get node name list mailbox command, kmalloc()
1253 * and return the resulting list. Caller must kfree() it!
1256 * ha = adapter state pointer.
1257 * out_data = resulting list
1258 * out_len = length of the resulting list
1261 * qla2x00 local function return status code.
1267 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1269 struct qla_hw_data *ha = vha->hw;
1270 struct qla_port_24xx_data *list = NULL;
1273 dma_addr_t pmap_dma;
1279 dma_size = left * sizeof(*list);
1280 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1281 &pmap_dma, GFP_KERNEL);
1283 ql_log(ql_log_warn, vha, 0x113f,
1284 "%s(%ld): DMA Alloc failed of %ld\n",
1285 __func__, vha->host_no, dma_size);
1286 rval = QLA_MEMORY_ALLOC_FAILED;
1290 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1291 mc.mb[1] = BIT_1 | BIT_3;
1292 mc.mb[2] = MSW(pmap_dma);
1293 mc.mb[3] = LSW(pmap_dma);
1294 mc.mb[6] = MSW(MSD(pmap_dma));
1295 mc.mb[7] = LSW(MSD(pmap_dma));
1296 mc.mb[8] = dma_size;
1297 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1298 mc.in_mb = MBX_0|MBX_1;
1300 mc.flags = MBX_DMA_IN;
1302 rval = qla2x00_mailbox_command(vha, &mc);
1303 if (rval != QLA_SUCCESS) {
1304 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1305 (mc.mb[1] == 0xA)) {
1306 left += le16_to_cpu(mc.mb[2]) /
1307 sizeof(struct qla_port_24xx_data);
1315 list = kzalloc(dma_size, GFP_KERNEL);
1317 ql_log(ql_log_warn, vha, 0x1140,
1318 "%s(%ld): failed to allocate node names list "
1319 "structure.\n", __func__, vha->host_no);
1320 rval = QLA_MEMORY_ALLOC_FAILED;
1324 memcpy(list, pmap, dma_size);
1326 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1330 *out_len = dma_size;
1336 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1341 * qla2x00_get_port_database
1342 * Issue normal/enhanced get port database mailbox command
1343 * and copy device name as necessary.
1346 * ha = adapter state pointer.
1347 * dev = structure pointer.
1348 * opt = enhanced cmd option byte.
1351 * qla2x00 local function return status code.
1357 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1361 mbx_cmd_t *mcp = &mc;
1362 port_database_t *pd;
1363 struct port_database_24xx *pd24;
1365 struct qla_hw_data *ha = vha->hw;
1367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1368 "Entered %s.\n", __func__);
1371 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1373 ql_log(ql_log_warn, vha, 0x1050,
1374 "Failed to allocate port database structure.\n");
1375 return QLA_MEMORY_ALLOC_FAILED;
1377 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1379 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1380 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1381 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1382 mcp->mb[2] = MSW(pd_dma);
1383 mcp->mb[3] = LSW(pd_dma);
1384 mcp->mb[6] = MSW(MSD(pd_dma));
1385 mcp->mb[7] = LSW(MSD(pd_dma));
1386 mcp->mb[9] = vha->vp_idx;
1387 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1389 if (IS_FWI2_CAPABLE(ha)) {
1390 mcp->mb[1] = fcport->loop_id;
1392 mcp->out_mb |= MBX_10|MBX_1;
1393 mcp->in_mb |= MBX_1;
1394 } else if (HAS_EXTENDED_IDS(ha)) {
1395 mcp->mb[1] = fcport->loop_id;
1397 mcp->out_mb |= MBX_10|MBX_1;
1399 mcp->mb[1] = fcport->loop_id << 8 | opt;
1400 mcp->out_mb |= MBX_1;
1402 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1403 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1404 mcp->flags = MBX_DMA_IN;
1405 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1406 rval = qla2x00_mailbox_command(vha, mcp);
1407 if (rval != QLA_SUCCESS)
1410 if (IS_FWI2_CAPABLE(ha)) {
1412 pd24 = (struct port_database_24xx *) pd;
1414 /* Check for logged in state. */
1415 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1416 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1417 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1418 "Unable to verify login-state (%x/%x) for "
1419 "loop_id %x.\n", pd24->current_login_state,
1420 pd24->last_login_state, fcport->loop_id);
1421 rval = QLA_FUNCTION_FAILED;
1425 if (fcport->loop_id == FC_NO_LOOP_ID ||
1426 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1427 memcmp(fcport->port_name, pd24->port_name, 8))) {
1428 /* We lost the device mid way. */
1429 rval = QLA_NOT_LOGGED_IN;
1433 /* Names are little-endian. */
1434 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1435 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1437 /* Get port_id of device. */
1438 fcport->d_id.b.domain = pd24->port_id[0];
1439 fcport->d_id.b.area = pd24->port_id[1];
1440 fcport->d_id.b.al_pa = pd24->port_id[2];
1441 fcport->d_id.b.rsvd_1 = 0;
1443 /* If not target must be initiator or unknown type. */
1444 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1445 fcport->port_type = FCT_INITIATOR;
1447 fcport->port_type = FCT_TARGET;
1449 /* Passback COS information. */
1450 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1451 FC_COS_CLASS2 : FC_COS_CLASS3;
1453 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1454 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1458 /* Check for logged in state. */
1459 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1460 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1461 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1462 "Unable to verify login-state (%x/%x) - "
1463 "portid=%02x%02x%02x.\n", pd->master_state,
1464 pd->slave_state, fcport->d_id.b.domain,
1465 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1466 rval = QLA_FUNCTION_FAILED;
1470 if (fcport->loop_id == FC_NO_LOOP_ID ||
1471 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1472 memcmp(fcport->port_name, pd->port_name, 8))) {
1473 /* We lost the device mid way. */
1474 rval = QLA_NOT_LOGGED_IN;
1478 /* Names are little-endian. */
1479 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1480 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1482 /* Get port_id of device. */
1483 fcport->d_id.b.domain = pd->port_id[0];
1484 fcport->d_id.b.area = pd->port_id[3];
1485 fcport->d_id.b.al_pa = pd->port_id[2];
1486 fcport->d_id.b.rsvd_1 = 0;
1488 /* If not target must be initiator or unknown type. */
1489 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1490 fcport->port_type = FCT_INITIATOR;
1492 fcport->port_type = FCT_TARGET;
1494 /* Passback COS information. */
1495 fcport->supported_classes = (pd->options & BIT_4) ?
1496 FC_COS_CLASS2: FC_COS_CLASS3;
1500 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1502 if (rval != QLA_SUCCESS) {
1503 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1504 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1505 mcp->mb[0], mcp->mb[1]);
1507 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1508 "Done %s.\n", __func__);
1515 * qla2x00_get_firmware_state
1516 * Get adapter firmware state.
1519 * ha = adapter block pointer.
1520 * dptr = pointer for firmware state.
1521 * TARGET_QUEUE_LOCK must be released.
1522 * ADAPTER_STATE_LOCK must be released.
1525 * qla2x00 local function return status code.
1531 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1535 mbx_cmd_t *mcp = &mc;
1537 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1538 "Entered %s.\n", __func__);
1540 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1541 mcp->out_mb = MBX_0;
1542 if (IS_FWI2_CAPABLE(vha->hw))
1543 mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1545 mcp->in_mb = MBX_1|MBX_0;
1546 mcp->tov = MBX_TOV_SECONDS;
1548 rval = qla2x00_mailbox_command(vha, mcp);
1550 /* Return firmware states. */
1551 states[0] = mcp->mb[1];
1552 if (IS_FWI2_CAPABLE(vha->hw)) {
1553 states[1] = mcp->mb[2];
1554 states[2] = mcp->mb[3];
1555 states[3] = mcp->mb[4];
1556 states[4] = mcp->mb[5];
1559 if (rval != QLA_SUCCESS) {
1561 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1564 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1565 "Done %s.\n", __func__);
1572 * qla2x00_get_port_name
1573 * Issue get port name mailbox command.
1574 * Returned name is in big endian format.
1577 * ha = adapter block pointer.
1578 * loop_id = loop ID of device.
1579 * name = pointer for name.
1580 * TARGET_QUEUE_LOCK must be released.
1581 * ADAPTER_STATE_LOCK must be released.
1584 * qla2x00 local function return status code.
1590 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1595 mbx_cmd_t *mcp = &mc;
1597 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1598 "Entered %s.\n", __func__);
1600 mcp->mb[0] = MBC_GET_PORT_NAME;
1601 mcp->mb[9] = vha->vp_idx;
1602 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1603 if (HAS_EXTENDED_IDS(vha->hw)) {
1604 mcp->mb[1] = loop_id;
1606 mcp->out_mb |= MBX_10;
1608 mcp->mb[1] = loop_id << 8 | opt;
1611 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1612 mcp->tov = MBX_TOV_SECONDS;
1614 rval = qla2x00_mailbox_command(vha, mcp);
1616 if (rval != QLA_SUCCESS) {
1618 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1621 /* This function returns name in big endian. */
1622 name[0] = MSB(mcp->mb[2]);
1623 name[1] = LSB(mcp->mb[2]);
1624 name[2] = MSB(mcp->mb[3]);
1625 name[3] = LSB(mcp->mb[3]);
1626 name[4] = MSB(mcp->mb[6]);
1627 name[5] = LSB(mcp->mb[6]);
1628 name[6] = MSB(mcp->mb[7]);
1629 name[7] = LSB(mcp->mb[7]);
1632 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1633 "Done %s.\n", __func__);
1640 * qla24xx_link_initialization
1641 * Issue link initialization mailbox command.
1644 * ha = adapter block pointer.
1645 * TARGET_QUEUE_LOCK must be released.
1646 * ADAPTER_STATE_LOCK must be released.
1649 * qla2x00 local function return status code.
1655 qla24xx_link_initialize(scsi_qla_host_t *vha)
1659 mbx_cmd_t *mcp = &mc;
1661 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1662 "Entered %s.\n", __func__);
1664 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1665 return QLA_FUNCTION_FAILED;
1667 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1668 mcp->mb[1] = BIT_6|BIT_4;
1671 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1673 mcp->tov = MBX_TOV_SECONDS;
1675 rval = qla2x00_mailbox_command(vha, mcp);
1677 if (rval != QLA_SUCCESS) {
1678 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1680 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1681 "Done %s.\n", __func__);
1689 * Issue LIP reset mailbox command.
1692 * ha = adapter block pointer.
1693 * TARGET_QUEUE_LOCK must be released.
1694 * ADAPTER_STATE_LOCK must be released.
1697 * qla2x00 local function return status code.
1703 qla2x00_lip_reset(scsi_qla_host_t *vha)
1707 mbx_cmd_t *mcp = &mc;
1709 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
1710 "Entered %s.\n", __func__);
1712 if (IS_CNA_CAPABLE(vha->hw)) {
1713 /* Logout across all FCFs. */
1714 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1717 mcp->out_mb = MBX_2|MBX_1|MBX_0;
1718 } else if (IS_FWI2_CAPABLE(vha->hw)) {
1719 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1722 mcp->mb[3] = vha->hw->loop_reset_delay;
1723 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1725 mcp->mb[0] = MBC_LIP_RESET;
1726 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1727 if (HAS_EXTENDED_IDS(vha->hw)) {
1728 mcp->mb[1] = 0x00ff;
1730 mcp->out_mb |= MBX_10;
1732 mcp->mb[1] = 0xff00;
1734 mcp->mb[2] = vha->hw->loop_reset_delay;
1738 mcp->tov = MBX_TOV_SECONDS;
1740 rval = qla2x00_mailbox_command(vha, mcp);
1742 if (rval != QLA_SUCCESS) {
1744 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
1747 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
1748 "Done %s.\n", __func__);
1759 * ha = adapter block pointer.
1760 * sns = pointer for command.
1761 * cmd_size = command size.
1762 * buf_size = response/command size.
1763 * TARGET_QUEUE_LOCK must be released.
1764 * ADAPTER_STATE_LOCK must be released.
1767 * qla2x00 local function return status code.
1773 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
1774 uint16_t cmd_size, size_t buf_size)
1778 mbx_cmd_t *mcp = &mc;
1780 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
1781 "Entered %s.\n", __func__);
1783 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1784 "Retry cnt=%d ratov=%d total tov=%d.\n",
1785 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
1787 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
1788 mcp->mb[1] = cmd_size;
1789 mcp->mb[2] = MSW(sns_phys_address);
1790 mcp->mb[3] = LSW(sns_phys_address);
1791 mcp->mb[6] = MSW(MSD(sns_phys_address));
1792 mcp->mb[7] = LSW(MSD(sns_phys_address));
1793 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1794 mcp->in_mb = MBX_0|MBX_1;
1795 mcp->buf_size = buf_size;
1796 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1797 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
1798 rval = qla2x00_mailbox_command(vha, mcp);
1800 if (rval != QLA_SUCCESS) {
1802 ql_dbg(ql_dbg_mbx, vha, 0x105f,
1803 "Failed=%x mb[0]=%x mb[1]=%x.\n",
1804 rval, mcp->mb[0], mcp->mb[1]);
1807 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
1808 "Done %s.\n", __func__);
1815 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1816 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1820 struct logio_entry_24xx *lg;
1823 struct qla_hw_data *ha = vha->hw;
1824 struct req_que *req;
1825 struct rsp_que *rsp;
1827 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
1828 "Entered %s.\n", __func__);
1830 if (ha->flags.cpu_affinity_enabled)
1831 req = ha->req_q_map[0];
1836 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
1838 ql_log(ql_log_warn, vha, 0x1062,
1839 "Failed to allocate login IOCB.\n");
1840 return QLA_MEMORY_ALLOC_FAILED;
1842 memset(lg, 0, sizeof(struct logio_entry_24xx));
1844 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
1845 lg->entry_count = 1;
1846 lg->handle = MAKE_HANDLE(req->id, lg->handle);
1847 lg->nport_handle = cpu_to_le16(loop_id);
1848 lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
1850 lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1852 lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1853 lg->port_id[0] = al_pa;
1854 lg->port_id[1] = area;
1855 lg->port_id[2] = domain;
1856 lg->vp_index = vha->vp_idx;
1857 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
1858 (ha->r_a_tov / 10 * 2) + 2);
1859 if (rval != QLA_SUCCESS) {
1860 ql_dbg(ql_dbg_mbx, vha, 0x1063,
1861 "Failed to issue login IOCB (%x).\n", rval);
1862 } else if (lg->entry_status != 0) {
1863 ql_dbg(ql_dbg_mbx, vha, 0x1064,
1864 "Failed to complete IOCB -- error status (%x).\n",
1866 rval = QLA_FUNCTION_FAILED;
1867 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1868 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1869 iop[1] = le32_to_cpu(lg->io_parameter[1]);
1871 ql_dbg(ql_dbg_mbx, vha, 0x1065,
1872 "Failed to complete IOCB -- completion status (%x) "
1873 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1877 case LSC_SCODE_PORTID_USED:
1878 mb[0] = MBS_PORT_ID_USED;
1879 mb[1] = LSW(iop[1]);
1881 case LSC_SCODE_NPORT_USED:
1882 mb[0] = MBS_LOOP_ID_USED;
1884 case LSC_SCODE_NOLINK:
1885 case LSC_SCODE_NOIOCB:
1886 case LSC_SCODE_NOXCB:
1887 case LSC_SCODE_CMD_FAILED:
1888 case LSC_SCODE_NOFABRIC:
1889 case LSC_SCODE_FW_NOT_READY:
1890 case LSC_SCODE_NOT_LOGGED_IN:
1891 case LSC_SCODE_NOPCB:
1892 case LSC_SCODE_ELS_REJECT:
1893 case LSC_SCODE_CMD_PARAM_ERR:
1894 case LSC_SCODE_NONPORT:
1895 case LSC_SCODE_LOGGED_IN:
1896 case LSC_SCODE_NOFLOGI_ACC:
1898 mb[0] = MBS_COMMAND_ERROR;
1902 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
1903 "Done %s.\n", __func__);
1905 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1907 mb[0] = MBS_COMMAND_COMPLETE;
1909 if (iop[0] & BIT_4) {
1915 /* Passback COS information. */
1917 if (lg->io_parameter[7] || lg->io_parameter[8])
1918 mb[10] |= BIT_0; /* Class 2. */
1919 if (lg->io_parameter[9] || lg->io_parameter[10])
1920 mb[10] |= BIT_1; /* Class 3. */
1921 if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
1922 mb[10] |= BIT_7; /* Confirmed Completion
1927 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
1933 * qla2x00_login_fabric
1934 * Issue login fabric port mailbox command.
1937 * ha = adapter block pointer.
1938 * loop_id = device loop ID.
1939 * domain = device domain.
1940 * area = device area.
1941 * al_pa = device AL_PA.
1942 * status = pointer for return status.
1943 * opt = command options.
1944 * TARGET_QUEUE_LOCK must be released.
1945 * ADAPTER_STATE_LOCK must be released.
1948 * qla2x00 local function return status code.
1954 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1955 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1959 mbx_cmd_t *mcp = &mc;
1960 struct qla_hw_data *ha = vha->hw;
1962 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
1963 "Entered %s.\n", __func__);
1965 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
1966 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1967 if (HAS_EXTENDED_IDS(ha)) {
1968 mcp->mb[1] = loop_id;
1970 mcp->out_mb |= MBX_10;
1972 mcp->mb[1] = (loop_id << 8) | opt;
1974 mcp->mb[2] = domain;
1975 mcp->mb[3] = area << 8 | al_pa;
1977 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
1978 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1980 rval = qla2x00_mailbox_command(vha, mcp);
1982 /* Return mailbox statuses. */
1989 /* COS retrieved from Get-Port-Database mailbox command. */
1993 if (rval != QLA_SUCCESS) {
1994 /* RLU tmp code: need to change main mailbox_command function to
1995 * return ok even when the mailbox completion value is not
1996 * SUCCESS. The caller needs to be responsible to interpret
1997 * the return values of this mailbox command if we're not
1998 * to change too much of the existing code.
2000 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2001 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2002 mcp->mb[0] == 0x4006)
2006 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2007 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2008 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2011 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2012 "Done %s.\n", __func__);
2019 * qla2x00_login_local_device
2020 * Issue login loop port mailbox command.
2023 * ha = adapter block pointer.
2024 * loop_id = device loop ID.
2025 * opt = command options.
2028 * Return status code.
2035 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2036 uint16_t *mb_ret, uint8_t opt)
2040 mbx_cmd_t *mcp = &mc;
2041 struct qla_hw_data *ha = vha->hw;
2043 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2044 "Entered %s.\n", __func__);
2046 if (IS_FWI2_CAPABLE(ha))
2047 return qla24xx_login_fabric(vha, fcport->loop_id,
2048 fcport->d_id.b.domain, fcport->d_id.b.area,
2049 fcport->d_id.b.al_pa, mb_ret, opt);
2051 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2052 if (HAS_EXTENDED_IDS(ha))
2053 mcp->mb[1] = fcport->loop_id;
2055 mcp->mb[1] = fcport->loop_id << 8;
2057 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2058 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2059 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2061 rval = qla2x00_mailbox_command(vha, mcp);
2063 /* Return mailbox statuses. */
2064 if (mb_ret != NULL) {
2065 mb_ret[0] = mcp->mb[0];
2066 mb_ret[1] = mcp->mb[1];
2067 mb_ret[6] = mcp->mb[6];
2068 mb_ret[7] = mcp->mb[7];
2071 if (rval != QLA_SUCCESS) {
2072 /* AV tmp code: need to change main mailbox_command function to
2073 * return ok even when the mailbox completion value is not
2074 * SUCCESS. The caller needs to be responsible to interpret
2075 * the return values of this mailbox command if we're not
2076 * to change too much of the existing code.
2078 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2081 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2082 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2083 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2086 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2087 "Done %s.\n", __func__);
2094 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2095 uint8_t area, uint8_t al_pa)
2098 struct logio_entry_24xx *lg;
2100 struct qla_hw_data *ha = vha->hw;
2101 struct req_que *req;
2102 struct rsp_que *rsp;
2104 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2105 "Entered %s.\n", __func__);
2107 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2109 ql_log(ql_log_warn, vha, 0x106e,
2110 "Failed to allocate logout IOCB.\n");
2111 return QLA_MEMORY_ALLOC_FAILED;
2113 memset(lg, 0, sizeof(struct logio_entry_24xx));
2115 if (ql2xmaxqueues > 1)
2116 req = ha->req_q_map[0];
2120 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2121 lg->entry_count = 1;
2122 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2123 lg->nport_handle = cpu_to_le16(loop_id);
2125 __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2127 lg->port_id[0] = al_pa;
2128 lg->port_id[1] = area;
2129 lg->port_id[2] = domain;
2130 lg->vp_index = vha->vp_idx;
2131 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2132 (ha->r_a_tov / 10 * 2) + 2);
2133 if (rval != QLA_SUCCESS) {
2134 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2135 "Failed to issue logout IOCB (%x).\n", rval);
2136 } else if (lg->entry_status != 0) {
2137 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2138 "Failed to complete IOCB -- error status (%x).\n",
2140 rval = QLA_FUNCTION_FAILED;
2141 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2142 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2143 "Failed to complete IOCB -- completion status (%x) "
2144 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2145 le32_to_cpu(lg->io_parameter[0]),
2146 le32_to_cpu(lg->io_parameter[1]));
2149 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2150 "Done %s.\n", __func__);
2153 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2159 * qla2x00_fabric_logout
2160 * Issue logout fabric port mailbox command.
2163 * ha = adapter block pointer.
2164 * loop_id = device loop ID.
2165 * TARGET_QUEUE_LOCK must be released.
2166 * ADAPTER_STATE_LOCK must be released.
2169 * qla2x00 local function return status code.
2175 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2176 uint8_t area, uint8_t al_pa)
2180 mbx_cmd_t *mcp = &mc;
2182 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2183 "Entered %s.\n", __func__);
2185 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2186 mcp->out_mb = MBX_1|MBX_0;
2187 if (HAS_EXTENDED_IDS(vha->hw)) {
2188 mcp->mb[1] = loop_id;
2190 mcp->out_mb |= MBX_10;
2192 mcp->mb[1] = loop_id << 8;
2195 mcp->in_mb = MBX_1|MBX_0;
2196 mcp->tov = MBX_TOV_SECONDS;
2198 rval = qla2x00_mailbox_command(vha, mcp);
2200 if (rval != QLA_SUCCESS) {
2202 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2203 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2206 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2207 "Done %s.\n", __func__);
2214 * qla2x00_full_login_lip
2215 * Issue full login LIP mailbox command.
2218 * ha = adapter block pointer.
2219 * TARGET_QUEUE_LOCK must be released.
2220 * ADAPTER_STATE_LOCK must be released.
2223 * qla2x00 local function return status code.
2229 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2233 mbx_cmd_t *mcp = &mc;
2235 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2236 "Entered %s.\n", __func__);
2238 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2239 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2242 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2244 mcp->tov = MBX_TOV_SECONDS;
2246 rval = qla2x00_mailbox_command(vha, mcp);
2248 if (rval != QLA_SUCCESS) {
2250 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2253 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2254 "Done %s.\n", __func__);
2261 * qla2x00_get_id_list
2264 * ha = adapter block pointer.
2267 * qla2x00 local function return status code.
2273 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2278 mbx_cmd_t *mcp = &mc;
2280 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2281 "Entered %s.\n", __func__);
2283 if (id_list == NULL)
2284 return QLA_FUNCTION_FAILED;
2286 mcp->mb[0] = MBC_GET_ID_LIST;
2287 mcp->out_mb = MBX_0;
2288 if (IS_FWI2_CAPABLE(vha->hw)) {
2289 mcp->mb[2] = MSW(id_list_dma);
2290 mcp->mb[3] = LSW(id_list_dma);
2291 mcp->mb[6] = MSW(MSD(id_list_dma));
2292 mcp->mb[7] = LSW(MSD(id_list_dma));
2294 mcp->mb[9] = vha->vp_idx;
2295 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2297 mcp->mb[1] = MSW(id_list_dma);
2298 mcp->mb[2] = LSW(id_list_dma);
2299 mcp->mb[3] = MSW(MSD(id_list_dma));
2300 mcp->mb[6] = LSW(MSD(id_list_dma));
2301 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2303 mcp->in_mb = MBX_1|MBX_0;
2304 mcp->tov = MBX_TOV_SECONDS;
2306 rval = qla2x00_mailbox_command(vha, mcp);
2308 if (rval != QLA_SUCCESS) {
2310 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2312 *entries = mcp->mb[1];
2313 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2314 "Done %s.\n", __func__);
2321 * qla2x00_get_resource_cnts
2322 * Get current firmware resource counts.
2325 * ha = adapter block pointer.
2328 * qla2x00 local function return status code.
2334 qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2335 uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2336 uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
2340 mbx_cmd_t *mcp = &mc;
2342 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2343 "Entered %s.\n", __func__);
2345 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2346 mcp->out_mb = MBX_0;
2347 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2348 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
2349 mcp->in_mb |= MBX_12;
2350 mcp->tov = MBX_TOV_SECONDS;
2352 rval = qla2x00_mailbox_command(vha, mcp);
2354 if (rval != QLA_SUCCESS) {
2356 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2357 "Failed mb[0]=%x.\n", mcp->mb[0]);
2359 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2360 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2361 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2362 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2363 mcp->mb[11], mcp->mb[12]);
2366 *cur_xchg_cnt = mcp->mb[3];
2368 *orig_xchg_cnt = mcp->mb[6];
2370 *cur_iocb_cnt = mcp->mb[7];
2372 *orig_iocb_cnt = mcp->mb[10];
2373 if (vha->hw->flags.npiv_supported && max_npiv_vports)
2374 *max_npiv_vports = mcp->mb[11];
2375 if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2376 *max_fcfs = mcp->mb[12];
2383 * qla2x00_get_fcal_position_map
2384 * Get FCAL (LILP) position map using mailbox command
2387 * ha = adapter state pointer.
2388 * pos_map = buffer pointer (can be NULL).
2391 * qla2x00 local function return status code.
2397 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2401 mbx_cmd_t *mcp = &mc;
2403 dma_addr_t pmap_dma;
2404 struct qla_hw_data *ha = vha->hw;
2406 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2407 "Entered %s.\n", __func__);
2409 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2411 ql_log(ql_log_warn, vha, 0x1080,
2412 "Memory alloc failed.\n");
2413 return QLA_MEMORY_ALLOC_FAILED;
2415 memset(pmap, 0, FCAL_MAP_SIZE);
2417 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2418 mcp->mb[2] = MSW(pmap_dma);
2419 mcp->mb[3] = LSW(pmap_dma);
2420 mcp->mb[6] = MSW(MSD(pmap_dma));
2421 mcp->mb[7] = LSW(MSD(pmap_dma));
2422 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2423 mcp->in_mb = MBX_1|MBX_0;
2424 mcp->buf_size = FCAL_MAP_SIZE;
2425 mcp->flags = MBX_DMA_IN;
2426 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2427 rval = qla2x00_mailbox_command(vha, mcp);
2429 if (rval == QLA_SUCCESS) {
2430 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2431 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2432 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2433 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2437 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2439 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2441 if (rval != QLA_SUCCESS) {
2442 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2444 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2445 "Done %s.\n", __func__);
2452 * qla2x00_get_link_status
2455 * ha = adapter block pointer.
2456 * loop_id = device loop ID.
2457 * ret_buf = pointer to link status return buffer.
2461 * BIT_0 = mem alloc error.
2462 * BIT_1 = mailbox error.
2465 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2466 struct link_statistics *stats, dma_addr_t stats_dma)
2470 mbx_cmd_t *mcp = &mc;
2471 uint32_t *siter, *diter, dwords;
2472 struct qla_hw_data *ha = vha->hw;
2474 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2475 "Entered %s.\n", __func__);
2477 mcp->mb[0] = MBC_GET_LINK_STATUS;
2478 mcp->mb[2] = MSW(stats_dma);
2479 mcp->mb[3] = LSW(stats_dma);
2480 mcp->mb[6] = MSW(MSD(stats_dma));
2481 mcp->mb[7] = LSW(MSD(stats_dma));
2482 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2484 if (IS_FWI2_CAPABLE(ha)) {
2485 mcp->mb[1] = loop_id;
2488 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2489 mcp->in_mb |= MBX_1;
2490 } else if (HAS_EXTENDED_IDS(ha)) {
2491 mcp->mb[1] = loop_id;
2493 mcp->out_mb |= MBX_10|MBX_1;
2495 mcp->mb[1] = loop_id << 8;
2496 mcp->out_mb |= MBX_1;
2498 mcp->tov = MBX_TOV_SECONDS;
2499 mcp->flags = IOCTL_CMD;
2500 rval = qla2x00_mailbox_command(vha, mcp);
2502 if (rval == QLA_SUCCESS) {
2503 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2504 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2505 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2506 rval = QLA_FUNCTION_FAILED;
2508 /* Copy over data -- firmware data is LE. */
2509 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2510 "Done %s.\n", __func__);
2511 dwords = offsetof(struct link_statistics, unused1) / 4;
2512 siter = diter = &stats->link_fail_cnt;
2514 *diter++ = le32_to_cpu(*siter++);
2518 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2525 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2526 dma_addr_t stats_dma)
2530 mbx_cmd_t *mcp = &mc;
2531 uint32_t *siter, *diter, dwords;
2533 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2534 "Entered %s.\n", __func__);
2536 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2537 mcp->mb[2] = MSW(stats_dma);
2538 mcp->mb[3] = LSW(stats_dma);
2539 mcp->mb[6] = MSW(MSD(stats_dma));
2540 mcp->mb[7] = LSW(MSD(stats_dma));
2541 mcp->mb[8] = sizeof(struct link_statistics) / 4;
2542 mcp->mb[9] = vha->vp_idx;
2544 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2545 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2546 mcp->tov = MBX_TOV_SECONDS;
2547 mcp->flags = IOCTL_CMD;
2548 rval = qla2x00_mailbox_command(vha, mcp);
2550 if (rval == QLA_SUCCESS) {
2551 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2552 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2553 "Failed mb[0]=%x.\n", mcp->mb[0]);
2554 rval = QLA_FUNCTION_FAILED;
2556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2557 "Done %s.\n", __func__);
2558 /* Copy over data -- firmware data is LE. */
2559 dwords = sizeof(struct link_statistics) / 4;
2560 siter = diter = &stats->link_fail_cnt;
2562 *diter++ = le32_to_cpu(*siter++);
2566 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2573 qla24xx_abort_command(srb_t *sp)
2576 unsigned long flags = 0;
2578 struct abort_entry_24xx *abt;
2581 fc_port_t *fcport = sp->fcport;
2582 struct scsi_qla_host *vha = fcport->vha;
2583 struct qla_hw_data *ha = vha->hw;
2584 struct req_que *req = vha->req;
2586 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2587 "Entered %s.\n", __func__);
2589 spin_lock_irqsave(&ha->hardware_lock, flags);
2590 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2591 if (req->outstanding_cmds[handle] == sp)
2594 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2595 if (handle == req->num_outstanding_cmds) {
2596 /* Command not found. */
2597 return QLA_FUNCTION_FAILED;
2600 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2602 ql_log(ql_log_warn, vha, 0x108d,
2603 "Failed to allocate abort IOCB.\n");
2604 return QLA_MEMORY_ALLOC_FAILED;
2606 memset(abt, 0, sizeof(struct abort_entry_24xx));
2608 abt->entry_type = ABORT_IOCB_TYPE;
2609 abt->entry_count = 1;
2610 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2611 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2612 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2613 abt->port_id[0] = fcport->d_id.b.al_pa;
2614 abt->port_id[1] = fcport->d_id.b.area;
2615 abt->port_id[2] = fcport->d_id.b.domain;
2616 abt->vp_index = fcport->vha->vp_idx;
2618 abt->req_que_no = cpu_to_le16(req->id);
2620 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2621 if (rval != QLA_SUCCESS) {
2622 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2623 "Failed to issue IOCB (%x).\n", rval);
2624 } else if (abt->entry_status != 0) {
2625 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2626 "Failed to complete IOCB -- error status (%x).\n",
2628 rval = QLA_FUNCTION_FAILED;
2629 } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2630 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2631 "Failed to complete IOCB -- completion status (%x).\n",
2632 le16_to_cpu(abt->nport_handle));
2633 rval = QLA_FUNCTION_FAILED;
2635 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2636 "Done %s.\n", __func__);
2639 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2644 struct tsk_mgmt_cmd {
2646 struct tsk_mgmt_entry tsk;
2647 struct sts_entry_24xx sts;
2652 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2653 unsigned int l, int tag)
2656 struct tsk_mgmt_cmd *tsk;
2657 struct sts_entry_24xx *sts;
2659 scsi_qla_host_t *vha;
2660 struct qla_hw_data *ha;
2661 struct req_que *req;
2662 struct rsp_que *rsp;
2668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2669 "Entered %s.\n", __func__);
2671 if (ha->flags.cpu_affinity_enabled)
2672 rsp = ha->rsp_q_map[tag + 1];
2675 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2677 ql_log(ql_log_warn, vha, 0x1093,
2678 "Failed to allocate task management IOCB.\n");
2679 return QLA_MEMORY_ALLOC_FAILED;
2681 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2683 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2684 tsk->p.tsk.entry_count = 1;
2685 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2686 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2687 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2688 tsk->p.tsk.control_flags = cpu_to_le32(type);
2689 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2690 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2691 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2692 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2693 if (type == TCF_LUN_RESET) {
2694 int_to_scsilun(l, &tsk->p.tsk.lun);
2695 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2696 sizeof(tsk->p.tsk.lun));
2700 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2701 if (rval != QLA_SUCCESS) {
2702 ql_dbg(ql_dbg_mbx, vha, 0x1094,
2703 "Failed to issue %s reset IOCB (%x).\n", name, rval);
2704 } else if (sts->entry_status != 0) {
2705 ql_dbg(ql_dbg_mbx, vha, 0x1095,
2706 "Failed to complete IOCB -- error status (%x).\n",
2708 rval = QLA_FUNCTION_FAILED;
2709 } else if (sts->comp_status !=
2710 __constant_cpu_to_le16(CS_COMPLETE)) {
2711 ql_dbg(ql_dbg_mbx, vha, 0x1096,
2712 "Failed to complete IOCB -- completion status (%x).\n",
2713 le16_to_cpu(sts->comp_status));
2714 rval = QLA_FUNCTION_FAILED;
2715 } else if (le16_to_cpu(sts->scsi_status) &
2716 SS_RESPONSE_INFO_LEN_VALID) {
2717 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2718 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2719 "Ignoring inconsistent data length -- not enough "
2720 "response info (%d).\n",
2721 le32_to_cpu(sts->rsp_data_len));
2722 } else if (sts->data[3]) {
2723 ql_dbg(ql_dbg_mbx, vha, 0x1098,
2724 "Failed to complete IOCB -- response (%x).\n",
2726 rval = QLA_FUNCTION_FAILED;
2730 /* Issue marker IOCB. */
2731 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2732 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
2733 if (rval2 != QLA_SUCCESS) {
2734 ql_dbg(ql_dbg_mbx, vha, 0x1099,
2735 "Failed to issue marker IOCB (%x).\n", rval2);
2737 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
2738 "Done %s.\n", __func__);
2741 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2747 qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
2749 struct qla_hw_data *ha = fcport->vha->hw;
2751 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2752 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
2754 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2758 qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
2760 struct qla_hw_data *ha = fcport->vha->hw;
2762 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2763 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
2765 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2769 qla2x00_system_error(scsi_qla_host_t *vha)
2773 mbx_cmd_t *mcp = &mc;
2774 struct qla_hw_data *ha = vha->hw;
2776 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2777 return QLA_FUNCTION_FAILED;
2779 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
2780 "Entered %s.\n", __func__);
2782 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
2783 mcp->out_mb = MBX_0;
2787 rval = qla2x00_mailbox_command(vha, mcp);
2789 if (rval != QLA_SUCCESS) {
2790 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2792 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
2793 "Done %s.\n", __func__);
2800 * qla2x00_set_serdes_params() -
2806 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
2807 uint16_t sw_em_2g, uint16_t sw_em_4g)
2811 mbx_cmd_t *mcp = &mc;
2813 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
2814 "Entered %s.\n", __func__);
2816 mcp->mb[0] = MBC_SERDES_PARAMS;
2818 mcp->mb[2] = sw_em_1g | BIT_15;
2819 mcp->mb[3] = sw_em_2g | BIT_15;
2820 mcp->mb[4] = sw_em_4g | BIT_15;
2821 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2823 mcp->tov = MBX_TOV_SECONDS;
2825 rval = qla2x00_mailbox_command(vha, mcp);
2827 if (rval != QLA_SUCCESS) {
2829 ql_dbg(ql_dbg_mbx, vha, 0x109f,
2830 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2833 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
2834 "Done %s.\n", __func__);
2841 qla2x00_stop_firmware(scsi_qla_host_t *vha)
2845 mbx_cmd_t *mcp = &mc;
2847 if (!IS_FWI2_CAPABLE(vha->hw))
2848 return QLA_FUNCTION_FAILED;
2850 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
2851 "Entered %s.\n", __func__);
2853 mcp->mb[0] = MBC_STOP_FIRMWARE;
2855 mcp->out_mb = MBX_1|MBX_0;
2859 rval = qla2x00_mailbox_command(vha, mcp);
2861 if (rval != QLA_SUCCESS) {
2862 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
2863 if (mcp->mb[0] == MBS_INVALID_COMMAND)
2864 rval = QLA_INVALID_COMMAND;
2866 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
2867 "Done %s.\n", __func__);
2874 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
2879 mbx_cmd_t *mcp = &mc;
2881 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
2882 "Entered %s.\n", __func__);
2884 if (!IS_FWI2_CAPABLE(vha->hw))
2885 return QLA_FUNCTION_FAILED;
2887 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2888 return QLA_FUNCTION_FAILED;
2890 mcp->mb[0] = MBC_TRACE_CONTROL;
2891 mcp->mb[1] = TC_EFT_ENABLE;
2892 mcp->mb[2] = LSW(eft_dma);
2893 mcp->mb[3] = MSW(eft_dma);
2894 mcp->mb[4] = LSW(MSD(eft_dma));
2895 mcp->mb[5] = MSW(MSD(eft_dma));
2896 mcp->mb[6] = buffers;
2897 mcp->mb[7] = TC_AEN_DISABLE;
2898 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2899 mcp->in_mb = MBX_1|MBX_0;
2900 mcp->tov = MBX_TOV_SECONDS;
2902 rval = qla2x00_mailbox_command(vha, mcp);
2903 if (rval != QLA_SUCCESS) {
2904 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
2905 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2906 rval, mcp->mb[0], mcp->mb[1]);
2908 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
2909 "Done %s.\n", __func__);
2916 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
2920 mbx_cmd_t *mcp = &mc;
2922 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
2923 "Entered %s.\n", __func__);
2925 if (!IS_FWI2_CAPABLE(vha->hw))
2926 return QLA_FUNCTION_FAILED;
2928 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2929 return QLA_FUNCTION_FAILED;
2931 mcp->mb[0] = MBC_TRACE_CONTROL;
2932 mcp->mb[1] = TC_EFT_DISABLE;
2933 mcp->out_mb = MBX_1|MBX_0;
2934 mcp->in_mb = MBX_1|MBX_0;
2935 mcp->tov = MBX_TOV_SECONDS;
2937 rval = qla2x00_mailbox_command(vha, mcp);
2938 if (rval != QLA_SUCCESS) {
2939 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
2940 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2941 rval, mcp->mb[0], mcp->mb[1]);
2943 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
2944 "Done %s.\n", __func__);
2951 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
2952 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
2956 mbx_cmd_t *mcp = &mc;
2958 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
2959 "Entered %s.\n", __func__);
2961 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
2962 !IS_QLA83XX(vha->hw))
2963 return QLA_FUNCTION_FAILED;
2965 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2966 return QLA_FUNCTION_FAILED;
2968 mcp->mb[0] = MBC_TRACE_CONTROL;
2969 mcp->mb[1] = TC_FCE_ENABLE;
2970 mcp->mb[2] = LSW(fce_dma);
2971 mcp->mb[3] = MSW(fce_dma);
2972 mcp->mb[4] = LSW(MSD(fce_dma));
2973 mcp->mb[5] = MSW(MSD(fce_dma));
2974 mcp->mb[6] = buffers;
2975 mcp->mb[7] = TC_AEN_DISABLE;
2977 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
2978 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
2979 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
2981 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2982 mcp->tov = MBX_TOV_SECONDS;
2984 rval = qla2x00_mailbox_command(vha, mcp);
2985 if (rval != QLA_SUCCESS) {
2986 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
2987 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2988 rval, mcp->mb[0], mcp->mb[1]);
2990 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
2991 "Done %s.\n", __func__);
2994 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3003 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3007 mbx_cmd_t *mcp = &mc;
3009 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3010 "Entered %s.\n", __func__);
3012 if (!IS_FWI2_CAPABLE(vha->hw))
3013 return QLA_FUNCTION_FAILED;
3015 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3016 return QLA_FUNCTION_FAILED;
3018 mcp->mb[0] = MBC_TRACE_CONTROL;
3019 mcp->mb[1] = TC_FCE_DISABLE;
3020 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3021 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3022 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3024 mcp->tov = MBX_TOV_SECONDS;
3026 rval = qla2x00_mailbox_command(vha, mcp);
3027 if (rval != QLA_SUCCESS) {
3028 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3029 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3030 rval, mcp->mb[0], mcp->mb[1]);
3032 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3033 "Done %s.\n", __func__);
3036 *wr = (uint64_t) mcp->mb[5] << 48 |
3037 (uint64_t) mcp->mb[4] << 32 |
3038 (uint64_t) mcp->mb[3] << 16 |
3039 (uint64_t) mcp->mb[2];
3041 *rd = (uint64_t) mcp->mb[9] << 48 |
3042 (uint64_t) mcp->mb[8] << 32 |
3043 (uint64_t) mcp->mb[7] << 16 |
3044 (uint64_t) mcp->mb[6];
3051 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3052 uint16_t *port_speed, uint16_t *mb)
3056 mbx_cmd_t *mcp = &mc;
3058 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3059 "Entered %s.\n", __func__);
3061 if (!IS_IIDMA_CAPABLE(vha->hw))
3062 return QLA_FUNCTION_FAILED;
3064 mcp->mb[0] = MBC_PORT_PARAMS;
3065 mcp->mb[1] = loop_id;
3066 mcp->mb[2] = mcp->mb[3] = 0;
3067 mcp->mb[9] = vha->vp_idx;
3068 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3069 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3070 mcp->tov = MBX_TOV_SECONDS;
3072 rval = qla2x00_mailbox_command(vha, mcp);
3074 /* Return mailbox statuses. */
3081 if (rval != QLA_SUCCESS) {
3082 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3084 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3085 "Done %s.\n", __func__);
3087 *port_speed = mcp->mb[3];
3094 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3095 uint16_t port_speed, uint16_t *mb)
3099 mbx_cmd_t *mcp = &mc;
3101 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3102 "Entered %s.\n", __func__);
3104 if (!IS_IIDMA_CAPABLE(vha->hw))
3105 return QLA_FUNCTION_FAILED;
3107 mcp->mb[0] = MBC_PORT_PARAMS;
3108 mcp->mb[1] = loop_id;
3110 if (IS_CNA_CAPABLE(vha->hw))
3111 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3113 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3114 mcp->mb[9] = vha->vp_idx;
3115 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3116 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3117 mcp->tov = MBX_TOV_SECONDS;
3119 rval = qla2x00_mailbox_command(vha, mcp);
3121 /* Return mailbox statuses. */
3128 if (rval != QLA_SUCCESS) {
3129 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3130 "Failed=%x.\n", rval);
3132 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3133 "Done %s.\n", __func__);
3140 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3141 struct vp_rpt_id_entry_24xx *rptid_entry)
3144 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3145 struct qla_hw_data *ha = vha->hw;
3146 scsi_qla_host_t *vp;
3147 unsigned long flags;
3150 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3151 "Entered %s.\n", __func__);
3153 if (rptid_entry->entry_status != 0)
3156 if (rptid_entry->format == 0) {
3157 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3158 "Format 0 : Number of VPs setup %d, number of "
3159 "VPs acquired %d.\n",
3160 MSB(le16_to_cpu(rptid_entry->vp_count)),
3161 LSB(le16_to_cpu(rptid_entry->vp_count)));
3162 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3163 "Primary port id %02x%02x%02x.\n",
3164 rptid_entry->port_id[2], rptid_entry->port_id[1],
3165 rptid_entry->port_id[0]);
3166 } else if (rptid_entry->format == 1) {
3168 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3169 "Format 1: VP[%d] enabled - status %d - with "
3170 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3171 rptid_entry->port_id[2], rptid_entry->port_id[1],
3172 rptid_entry->port_id[0]);
3175 if (vp_idx == 0 && (MSB(stat) != 1))
3178 if (MSB(stat) != 0 && MSB(stat) != 2) {
3179 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3180 "Could not acquire ID for VP[%d].\n", vp_idx);
3185 spin_lock_irqsave(&ha->vport_slock, flags);
3186 list_for_each_entry(vp, &ha->vp_list, list) {
3187 if (vp_idx == vp->vp_idx) {
3192 spin_unlock_irqrestore(&ha->vport_slock, flags);
3197 vp->d_id.b.domain = rptid_entry->port_id[2];
3198 vp->d_id.b.area = rptid_entry->port_id[1];
3199 vp->d_id.b.al_pa = rptid_entry->port_id[0];
3202 * Cannot configure here as we are still sitting on the
3203 * response queue. Handle it in dpc context.
3205 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3208 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3209 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3210 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3211 qla2xxx_wake_dpc(vha);
3216 * qla24xx_modify_vp_config
3217 * Change VP configuration for vha
3220 * vha = adapter block pointer.
3223 * qla2xxx local function return status code.
3229 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3232 struct vp_config_entry_24xx *vpmod;
3233 dma_addr_t vpmod_dma;
3234 struct qla_hw_data *ha = vha->hw;
3235 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3237 /* This can be called by the parent */
3239 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3240 "Entered %s.\n", __func__);
3242 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3244 ql_log(ql_log_warn, vha, 0x10bc,
3245 "Failed to allocate modify VP IOCB.\n");
3246 return QLA_MEMORY_ALLOC_FAILED;
3249 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3250 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3251 vpmod->entry_count = 1;
3252 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3253 vpmod->vp_count = 1;
3254 vpmod->vp_index1 = vha->vp_idx;
3255 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3257 qlt_modify_vp_config(vha, vpmod);
3259 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3260 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3261 vpmod->entry_count = 1;
3263 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3264 if (rval != QLA_SUCCESS) {
3265 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3266 "Failed to issue VP config IOCB (%x).\n", rval);
3267 } else if (vpmod->comp_status != 0) {
3268 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3269 "Failed to complete IOCB -- error status (%x).\n",
3270 vpmod->comp_status);
3271 rval = QLA_FUNCTION_FAILED;
3272 } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3273 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3274 "Failed to complete IOCB -- completion status (%x).\n",
3275 le16_to_cpu(vpmod->comp_status));
3276 rval = QLA_FUNCTION_FAILED;
3279 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3280 "Done %s.\n", __func__);
3281 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3283 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3289 * qla24xx_control_vp
3290 * Enable a virtual port for given host
3293 * ha = adapter block pointer.
3294 * vhba = virtual adapter (unused)
3295 * index = index number for enabled VP
3298 * qla2xxx local function return status code.
3304 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3308 struct vp_ctrl_entry_24xx *vce;
3310 struct qla_hw_data *ha = vha->hw;
3311 int vp_index = vha->vp_idx;
3312 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3314 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3315 "Entered %s enabling index %d.\n", __func__, vp_index);
3317 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3318 return QLA_PARAMETER_ERROR;
3320 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3322 ql_log(ql_log_warn, vha, 0x10c2,
3323 "Failed to allocate VP control IOCB.\n");
3324 return QLA_MEMORY_ALLOC_FAILED;
3326 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3328 vce->entry_type = VP_CTRL_IOCB_TYPE;
3329 vce->entry_count = 1;
3330 vce->command = cpu_to_le16(cmd);
3331 vce->vp_count = __constant_cpu_to_le16(1);
3333 /* index map in firmware starts with 1; decrement index
3334 * this is ok as we never use index 0
3336 map = (vp_index - 1) / 8;
3337 pos = (vp_index - 1) & 7;
3338 mutex_lock(&ha->vport_lock);
3339 vce->vp_idx_map[map] |= 1 << pos;
3340 mutex_unlock(&ha->vport_lock);
3342 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3343 if (rval != QLA_SUCCESS) {
3344 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3345 "Failed to issue VP control IOCB (%x).\n", rval);
3346 } else if (vce->entry_status != 0) {
3347 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3348 "Failed to complete IOCB -- error status (%x).\n",
3350 rval = QLA_FUNCTION_FAILED;
3351 } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3352 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3353 "Failed to complet IOCB -- completion status (%x).\n",
3354 le16_to_cpu(vce->comp_status));
3355 rval = QLA_FUNCTION_FAILED;
3357 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3358 "Done %s.\n", __func__);
3361 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3367 * qla2x00_send_change_request
3368 * Receive or disable RSCN request from fabric controller
3371 * ha = adapter block pointer
3372 * format = registration format:
3374 * 1 - Fabric detected registration
3375 * 2 - N_port detected registration
3376 * 3 - Full registration
3377 * FF - clear registration
3378 * vp_idx = Virtual port index
3381 * qla2x00 local function return status code.
3388 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3393 mbx_cmd_t *mcp = &mc;
3395 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3396 "Entered %s.\n", __func__);
3398 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3399 mcp->mb[1] = format;
3400 mcp->mb[9] = vp_idx;
3401 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3402 mcp->in_mb = MBX_0|MBX_1;
3403 mcp->tov = MBX_TOV_SECONDS;
3405 rval = qla2x00_mailbox_command(vha, mcp);
3407 if (rval == QLA_SUCCESS) {
3408 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3418 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3423 mbx_cmd_t *mcp = &mc;
3425 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3426 "Entered %s.\n", __func__);
3428 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3429 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3430 mcp->mb[8] = MSW(addr);
3431 mcp->out_mb = MBX_8|MBX_0;
3433 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3434 mcp->out_mb = MBX_0;
3436 mcp->mb[1] = LSW(addr);
3437 mcp->mb[2] = MSW(req_dma);
3438 mcp->mb[3] = LSW(req_dma);
3439 mcp->mb[6] = MSW(MSD(req_dma));
3440 mcp->mb[7] = LSW(MSD(req_dma));
3441 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3442 if (IS_FWI2_CAPABLE(vha->hw)) {
3443 mcp->mb[4] = MSW(size);
3444 mcp->mb[5] = LSW(size);
3445 mcp->out_mb |= MBX_5|MBX_4;
3447 mcp->mb[4] = LSW(size);
3448 mcp->out_mb |= MBX_4;
3452 mcp->tov = MBX_TOV_SECONDS;
3454 rval = qla2x00_mailbox_command(vha, mcp);
3456 if (rval != QLA_SUCCESS) {
3457 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3458 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3460 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3461 "Done %s.\n", __func__);
3466 /* 84XX Support **************************************************************/
3468 struct cs84xx_mgmt_cmd {
3470 struct verify_chip_entry_84xx req;
3471 struct verify_chip_rsp_84xx rsp;
3476 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3479 struct cs84xx_mgmt_cmd *mn;
3482 unsigned long flags;
3483 struct qla_hw_data *ha = vha->hw;
3485 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3486 "Entered %s.\n", __func__);
3488 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3490 return QLA_MEMORY_ALLOC_FAILED;
3494 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3495 /* Diagnostic firmware? */
3496 /* options |= MENLO_DIAG_FW; */
3497 /* We update the firmware with only one data sequence. */
3498 options |= VCO_END_OF_DATA;
3502 memset(mn, 0, sizeof(*mn));
3503 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3504 mn->p.req.entry_count = 1;
3505 mn->p.req.options = cpu_to_le16(options);
3507 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3508 "Dump of Verify Request.\n");
3509 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3510 (uint8_t *)mn, sizeof(*mn));
3512 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3513 if (rval != QLA_SUCCESS) {
3514 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3515 "Failed to issue verify IOCB (%x).\n", rval);
3519 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3520 "Dump of Verify Response.\n");
3521 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3522 (uint8_t *)mn, sizeof(*mn));
3524 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3525 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3526 le16_to_cpu(mn->p.rsp.failure_code) : 0;
3527 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3528 "cs=%x fc=%x.\n", status[0], status[1]);
3530 if (status[0] != CS_COMPLETE) {
3531 rval = QLA_FUNCTION_FAILED;
3532 if (!(options & VCO_DONT_UPDATE_FW)) {
3533 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3534 "Firmware update failed. Retrying "
3535 "without update firmware.\n");
3536 options |= VCO_DONT_UPDATE_FW;
3537 options &= ~VCO_FORCE_UPDATE;
3541 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3542 "Firmware updated to %x.\n",
3543 le32_to_cpu(mn->p.rsp.fw_ver));
3545 /* NOTE: we only update OP firmware. */
3546 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
3547 ha->cs84xx->op_fw_version =
3548 le32_to_cpu(mn->p.rsp.fw_ver);
3549 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
3555 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
3557 if (rval != QLA_SUCCESS) {
3558 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
3559 "Failed=%x.\n", rval);
3561 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
3562 "Done %s.\n", __func__);
3569 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3572 unsigned long flags;
3574 mbx_cmd_t *mcp = &mc;
3575 struct device_reg_25xxmq __iomem *reg;
3576 struct qla_hw_data *ha = vha->hw;
3578 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
3579 "Entered %s.\n", __func__);
3581 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3582 mcp->mb[1] = req->options;
3583 mcp->mb[2] = MSW(LSD(req->dma));
3584 mcp->mb[3] = LSW(LSD(req->dma));
3585 mcp->mb[6] = MSW(MSD(req->dma));
3586 mcp->mb[7] = LSW(MSD(req->dma));
3587 mcp->mb[5] = req->length;
3589 mcp->mb[10] = req->rsp->id;
3590 mcp->mb[12] = req->qos;
3591 mcp->mb[11] = req->vp_idx;
3592 mcp->mb[13] = req->rid;
3596 reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) +
3597 QLA_QUE_PAGE * req->id);
3599 mcp->mb[4] = req->id;
3600 /* que in ptr index */
3602 /* que out ptr index */
3604 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
3605 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3607 mcp->flags = MBX_DMA_OUT;
3608 mcp->tov = MBX_TOV_SECONDS * 2;
3610 if (IS_QLA81XX(ha) || IS_QLA83XX(ha))
3611 mcp->in_mb |= MBX_1;
3612 if (IS_QLA83XX(ha)) {
3613 mcp->out_mb |= MBX_15;
3614 /* debug q create issue in SR-IOV */
3615 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3618 spin_lock_irqsave(&ha->hardware_lock, flags);
3619 if (!(req->options & BIT_0)) {
3620 WRT_REG_DWORD(®->req_q_in, 0);
3621 if (!IS_QLA83XX(ha))
3622 WRT_REG_DWORD(®->req_q_out, 0);
3624 req->req_q_in = ®->req_q_in;
3625 req->req_q_out = ®->req_q_out;
3626 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3628 rval = qla2x00_mailbox_command(vha, mcp);
3629 if (rval != QLA_SUCCESS) {
3630 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
3631 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3633 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
3634 "Done %s.\n", __func__);
3641 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3644 unsigned long flags;
3646 mbx_cmd_t *mcp = &mc;
3647 struct device_reg_25xxmq __iomem *reg;
3648 struct qla_hw_data *ha = vha->hw;
3650 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
3651 "Entered %s.\n", __func__);
3653 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3654 mcp->mb[1] = rsp->options;
3655 mcp->mb[2] = MSW(LSD(rsp->dma));
3656 mcp->mb[3] = LSW(LSD(rsp->dma));
3657 mcp->mb[6] = MSW(MSD(rsp->dma));
3658 mcp->mb[7] = LSW(MSD(rsp->dma));
3659 mcp->mb[5] = rsp->length;
3660 mcp->mb[14] = rsp->msix->entry;
3661 mcp->mb[13] = rsp->rid;
3665 reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) +
3666 QLA_QUE_PAGE * rsp->id);
3668 mcp->mb[4] = rsp->id;
3669 /* que in ptr index */
3671 /* que out ptr index */
3673 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3674 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3676 mcp->flags = MBX_DMA_OUT;
3677 mcp->tov = MBX_TOV_SECONDS * 2;
3679 if (IS_QLA81XX(ha)) {
3680 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3681 mcp->in_mb |= MBX_1;
3682 } else if (IS_QLA83XX(ha)) {
3683 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3684 mcp->in_mb |= MBX_1;
3685 /* debug q create issue in SR-IOV */
3686 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3689 spin_lock_irqsave(&ha->hardware_lock, flags);
3690 if (!(rsp->options & BIT_0)) {
3691 WRT_REG_DWORD(®->rsp_q_out, 0);
3692 if (!IS_QLA83XX(ha))
3693 WRT_REG_DWORD(®->rsp_q_in, 0);
3696 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3698 rval = qla2x00_mailbox_command(vha, mcp);
3699 if (rval != QLA_SUCCESS) {
3700 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
3701 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3703 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
3704 "Done %s.\n", __func__);
3711 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
3715 mbx_cmd_t *mcp = &mc;
3717 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
3718 "Entered %s.\n", __func__);
3720 mcp->mb[0] = MBC_IDC_ACK;
3721 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3722 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3724 mcp->tov = MBX_TOV_SECONDS;
3726 rval = qla2x00_mailbox_command(vha, mcp);
3728 if (rval != QLA_SUCCESS) {
3729 ql_dbg(ql_dbg_mbx, vha, 0x10da,
3730 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3732 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
3733 "Done %s.\n", __func__);
3740 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3744 mbx_cmd_t *mcp = &mc;
3746 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
3747 "Entered %s.\n", __func__);
3749 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3750 return QLA_FUNCTION_FAILED;
3752 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3753 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
3754 mcp->out_mb = MBX_1|MBX_0;
3755 mcp->in_mb = MBX_1|MBX_0;
3756 mcp->tov = MBX_TOV_SECONDS;
3758 rval = qla2x00_mailbox_command(vha, mcp);
3760 if (rval != QLA_SUCCESS) {
3761 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
3762 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3763 rval, mcp->mb[0], mcp->mb[1]);
3765 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
3766 "Done %s.\n", __func__);
3767 *sector_size = mcp->mb[1];
3774 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3778 mbx_cmd_t *mcp = &mc;
3780 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3781 return QLA_FUNCTION_FAILED;
3783 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
3784 "Entered %s.\n", __func__);
3786 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3787 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
3788 FAC_OPT_CMD_WRITE_PROTECT;
3789 mcp->out_mb = MBX_1|MBX_0;
3790 mcp->in_mb = MBX_1|MBX_0;
3791 mcp->tov = MBX_TOV_SECONDS;
3793 rval = qla2x00_mailbox_command(vha, mcp);
3795 if (rval != QLA_SUCCESS) {
3796 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
3797 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3798 rval, mcp->mb[0], mcp->mb[1]);
3800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
3801 "Done %s.\n", __func__);
3808 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
3812 mbx_cmd_t *mcp = &mc;
3814 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3815 return QLA_FUNCTION_FAILED;
3817 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
3818 "Entered %s.\n", __func__);
3820 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3821 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
3822 mcp->mb[2] = LSW(start);
3823 mcp->mb[3] = MSW(start);
3824 mcp->mb[4] = LSW(finish);
3825 mcp->mb[5] = MSW(finish);
3826 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3827 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3828 mcp->tov = MBX_TOV_SECONDS;
3830 rval = qla2x00_mailbox_command(vha, mcp);
3832 if (rval != QLA_SUCCESS) {
3833 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
3834 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
3835 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
3837 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
3838 "Done %s.\n", __func__);
3845 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
3849 mbx_cmd_t *mcp = &mc;
3851 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
3852 "Entered %s.\n", __func__);
3854 mcp->mb[0] = MBC_RESTART_MPI_FW;
3855 mcp->out_mb = MBX_0;
3856 mcp->in_mb = MBX_0|MBX_1;
3857 mcp->tov = MBX_TOV_SECONDS;
3859 rval = qla2x00_mailbox_command(vha, mcp);
3861 if (rval != QLA_SUCCESS) {
3862 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
3863 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3864 rval, mcp->mb[0], mcp->mb[1]);
3866 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
3867 "Done %s.\n", __func__);
3874 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
3878 mbx_cmd_t *mcp = &mc;
3880 if (!IS_FWI2_CAPABLE(vha->hw))
3881 return QLA_FUNCTION_FAILED;
3883 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
3884 "Entered %s.\n", __func__);
3886 mcp->mb[0] = MBC_GET_RNID_PARAMS;
3887 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
3888 mcp->out_mb = MBX_1|MBX_0;
3889 mcp->in_mb = MBX_1|MBX_0;
3890 mcp->tov = MBX_TOV_SECONDS;
3892 rval = qla2x00_mailbox_command(vha, mcp);
3895 if (rval != QLA_SUCCESS) {
3896 ql_dbg(ql_dbg_mbx, vha, 0x115a,
3897 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
3899 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
3900 "Done %s.\n", __func__);
3907 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
3908 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
3912 mbx_cmd_t *mcp = &mc;
3913 struct qla_hw_data *ha = vha->hw;
3915 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
3916 "Entered %s.\n", __func__);
3918 if (!IS_FWI2_CAPABLE(ha))
3919 return QLA_FUNCTION_FAILED;
3924 mcp->mb[0] = MBC_READ_SFP;
3926 mcp->mb[2] = MSW(sfp_dma);
3927 mcp->mb[3] = LSW(sfp_dma);
3928 mcp->mb[6] = MSW(MSD(sfp_dma));
3929 mcp->mb[7] = LSW(MSD(sfp_dma));
3933 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3934 mcp->in_mb = MBX_1|MBX_0;
3935 mcp->tov = MBX_TOV_SECONDS;
3937 rval = qla2x00_mailbox_command(vha, mcp);
3942 if (rval != QLA_SUCCESS) {
3943 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
3944 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3946 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
3947 "Done %s.\n", __func__);
3954 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
3955 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
3959 mbx_cmd_t *mcp = &mc;
3960 struct qla_hw_data *ha = vha->hw;
3962 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
3963 "Entered %s.\n", __func__);
3965 if (!IS_FWI2_CAPABLE(ha))
3966 return QLA_FUNCTION_FAILED;
3974 mcp->mb[0] = MBC_WRITE_SFP;
3976 mcp->mb[2] = MSW(sfp_dma);
3977 mcp->mb[3] = LSW(sfp_dma);
3978 mcp->mb[6] = MSW(MSD(sfp_dma));
3979 mcp->mb[7] = LSW(MSD(sfp_dma));
3983 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3984 mcp->in_mb = MBX_1|MBX_0;
3985 mcp->tov = MBX_TOV_SECONDS;
3987 rval = qla2x00_mailbox_command(vha, mcp);
3989 if (rval != QLA_SUCCESS) {
3990 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
3991 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3993 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
3994 "Done %s.\n", __func__);
4001 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4002 uint16_t size_in_bytes, uint16_t *actual_size)
4006 mbx_cmd_t *mcp = &mc;
4008 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4009 "Entered %s.\n", __func__);
4011 if (!IS_CNA_CAPABLE(vha->hw))
4012 return QLA_FUNCTION_FAILED;
4014 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4015 mcp->mb[2] = MSW(stats_dma);
4016 mcp->mb[3] = LSW(stats_dma);
4017 mcp->mb[6] = MSW(MSD(stats_dma));
4018 mcp->mb[7] = LSW(MSD(stats_dma));
4019 mcp->mb[8] = size_in_bytes >> 2;
4020 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4021 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4022 mcp->tov = MBX_TOV_SECONDS;
4024 rval = qla2x00_mailbox_command(vha, mcp);
4026 if (rval != QLA_SUCCESS) {
4027 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4028 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4029 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4031 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4032 "Done %s.\n", __func__);
4035 *actual_size = mcp->mb[2] << 2;
4042 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4047 mbx_cmd_t *mcp = &mc;
4049 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4050 "Entered %s.\n", __func__);
4052 if (!IS_CNA_CAPABLE(vha->hw))
4053 return QLA_FUNCTION_FAILED;
4055 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4057 mcp->mb[2] = MSW(tlv_dma);
4058 mcp->mb[3] = LSW(tlv_dma);
4059 mcp->mb[6] = MSW(MSD(tlv_dma));
4060 mcp->mb[7] = LSW(MSD(tlv_dma));
4062 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4063 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4064 mcp->tov = MBX_TOV_SECONDS;
4066 rval = qla2x00_mailbox_command(vha, mcp);
4068 if (rval != QLA_SUCCESS) {
4069 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4070 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4071 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4073 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4074 "Done %s.\n", __func__);
4081 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4085 mbx_cmd_t *mcp = &mc;
4087 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4088 "Entered %s.\n", __func__);
4090 if (!IS_FWI2_CAPABLE(vha->hw))
4091 return QLA_FUNCTION_FAILED;
4093 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4094 mcp->mb[1] = LSW(risc_addr);
4095 mcp->mb[8] = MSW(risc_addr);
4096 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4097 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4100 rval = qla2x00_mailbox_command(vha, mcp);
4101 if (rval != QLA_SUCCESS) {
4102 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4103 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4105 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4106 "Done %s.\n", __func__);
4107 *data = mcp->mb[3] << 16 | mcp->mb[2];
4114 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4119 mbx_cmd_t *mcp = &mc;
4121 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4122 "Entered %s.\n", __func__);
4124 memset(mcp->mb, 0 , sizeof(mcp->mb));
4125 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4126 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4128 /* transfer count */
4129 mcp->mb[10] = LSW(mreq->transfer_size);
4130 mcp->mb[11] = MSW(mreq->transfer_size);
4132 /* send data address */
4133 mcp->mb[14] = LSW(mreq->send_dma);
4134 mcp->mb[15] = MSW(mreq->send_dma);
4135 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4136 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4138 /* receive data address */
4139 mcp->mb[16] = LSW(mreq->rcv_dma);
4140 mcp->mb[17] = MSW(mreq->rcv_dma);
4141 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4142 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4144 /* Iteration count */
4145 mcp->mb[18] = LSW(mreq->iteration_count);
4146 mcp->mb[19] = MSW(mreq->iteration_count);
4148 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4149 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4150 if (IS_CNA_CAPABLE(vha->hw))
4151 mcp->out_mb |= MBX_2;
4152 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4154 mcp->buf_size = mreq->transfer_size;
4155 mcp->tov = MBX_TOV_SECONDS;
4156 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4158 rval = qla2x00_mailbox_command(vha, mcp);
4160 if (rval != QLA_SUCCESS) {
4161 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4162 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4163 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4164 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4166 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4167 "Done %s.\n", __func__);
4170 /* Copy mailbox information */
4171 memcpy( mresp, mcp->mb, 64);
4176 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4181 mbx_cmd_t *mcp = &mc;
4182 struct qla_hw_data *ha = vha->hw;
4184 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4185 "Entered %s.\n", __func__);
4187 memset(mcp->mb, 0 , sizeof(mcp->mb));
4188 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4189 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
4190 if (IS_CNA_CAPABLE(ha)) {
4191 mcp->mb[1] |= BIT_15;
4192 mcp->mb[2] = vha->fcoe_fcf_idx;
4194 mcp->mb[16] = LSW(mreq->rcv_dma);
4195 mcp->mb[17] = MSW(mreq->rcv_dma);
4196 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4197 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4199 mcp->mb[10] = LSW(mreq->transfer_size);
4201 mcp->mb[14] = LSW(mreq->send_dma);
4202 mcp->mb[15] = MSW(mreq->send_dma);
4203 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4204 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4206 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4207 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4208 if (IS_CNA_CAPABLE(ha))
4209 mcp->out_mb |= MBX_2;
4212 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4213 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4214 mcp->in_mb |= MBX_1;
4215 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4216 mcp->in_mb |= MBX_3;
4218 mcp->tov = MBX_TOV_SECONDS;
4219 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4220 mcp->buf_size = mreq->transfer_size;
4222 rval = qla2x00_mailbox_command(vha, mcp);
4224 if (rval != QLA_SUCCESS) {
4225 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4226 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4227 rval, mcp->mb[0], mcp->mb[1]);
4229 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4230 "Done %s.\n", __func__);
4233 /* Copy mailbox information */
4234 memcpy(mresp, mcp->mb, 64);
4239 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4243 mbx_cmd_t *mcp = &mc;
4245 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4246 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4248 mcp->mb[0] = MBC_ISP84XX_RESET;
4249 mcp->mb[1] = enable_diagnostic;
4250 mcp->out_mb = MBX_1|MBX_0;
4251 mcp->in_mb = MBX_1|MBX_0;
4252 mcp->tov = MBX_TOV_SECONDS;
4253 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4254 rval = qla2x00_mailbox_command(vha, mcp);
4256 if (rval != QLA_SUCCESS)
4257 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4259 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4260 "Done %s.\n", __func__);
4266 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4270 mbx_cmd_t *mcp = &mc;
4272 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4273 "Entered %s.\n", __func__);
4275 if (!IS_FWI2_CAPABLE(vha->hw))
4276 return QLA_FUNCTION_FAILED;
4278 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4279 mcp->mb[1] = LSW(risc_addr);
4280 mcp->mb[2] = LSW(data);
4281 mcp->mb[3] = MSW(data);
4282 mcp->mb[8] = MSW(risc_addr);
4283 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4287 rval = qla2x00_mailbox_command(vha, mcp);
4288 if (rval != QLA_SUCCESS) {
4289 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4290 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4292 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4293 "Done %s.\n", __func__);
4300 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4303 uint32_t stat, timer;
4305 struct qla_hw_data *ha = vha->hw;
4306 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4310 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4311 "Entered %s.\n", __func__);
4313 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4315 /* Write the MBC data to the registers */
4316 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
4317 WRT_REG_WORD(®->mailbox1, mb[0]);
4318 WRT_REG_WORD(®->mailbox2, mb[1]);
4319 WRT_REG_WORD(®->mailbox3, mb[2]);
4320 WRT_REG_WORD(®->mailbox4, mb[3]);
4322 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
4324 /* Poll for MBC interrupt */
4325 for (timer = 6000000; timer; timer--) {
4326 /* Check for pending interrupts. */
4327 stat = RD_REG_DWORD(®->host_status);
4328 if (stat & HSRX_RISC_INT) {
4331 if (stat == 0x1 || stat == 0x2 ||
4332 stat == 0x10 || stat == 0x11) {
4333 set_bit(MBX_INTERRUPT,
4334 &ha->mbx_cmd_flags);
4335 mb0 = RD_REG_WORD(®->mailbox0);
4336 WRT_REG_DWORD(®->hccr,
4337 HCCRX_CLR_RISC_INT);
4338 RD_REG_DWORD(®->hccr);
4345 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4346 rval = mb0 & MBS_MASK;
4348 rval = QLA_FUNCTION_FAILED;
4350 if (rval != QLA_SUCCESS) {
4351 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4352 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4354 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4355 "Done %s.\n", __func__);
4362 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4366 mbx_cmd_t *mcp = &mc;
4367 struct qla_hw_data *ha = vha->hw;
4369 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4370 "Entered %s.\n", __func__);
4372 if (!IS_FWI2_CAPABLE(ha))
4373 return QLA_FUNCTION_FAILED;
4375 mcp->mb[0] = MBC_DATA_RATE;
4377 mcp->out_mb = MBX_1|MBX_0;
4378 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4380 mcp->in_mb |= MBX_3;
4381 mcp->tov = MBX_TOV_SECONDS;
4383 rval = qla2x00_mailbox_command(vha, mcp);
4384 if (rval != QLA_SUCCESS) {
4385 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4386 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4388 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4389 "Done %s.\n", __func__);
4390 if (mcp->mb[1] != 0x7)
4391 ha->link_data_rate = mcp->mb[1];
4398 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4402 mbx_cmd_t *mcp = &mc;
4403 struct qla_hw_data *ha = vha->hw;
4405 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4406 "Entered %s.\n", __func__);
4408 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha))
4409 return QLA_FUNCTION_FAILED;
4410 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4411 mcp->out_mb = MBX_0;
4412 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4413 mcp->tov = MBX_TOV_SECONDS;
4416 rval = qla2x00_mailbox_command(vha, mcp);
4418 if (rval != QLA_SUCCESS) {
4419 ql_dbg(ql_dbg_mbx, vha, 0x110a,
4420 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4422 /* Copy all bits to preserve original value */
4423 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4425 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4426 "Done %s.\n", __func__);
4432 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4436 mbx_cmd_t *mcp = &mc;
4438 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
4439 "Entered %s.\n", __func__);
4441 mcp->mb[0] = MBC_SET_PORT_CONFIG;
4442 /* Copy all bits to preserve original setting */
4443 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
4444 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4446 mcp->tov = MBX_TOV_SECONDS;
4448 rval = qla2x00_mailbox_command(vha, mcp);
4450 if (rval != QLA_SUCCESS) {
4451 ql_dbg(ql_dbg_mbx, vha, 0x110d,
4452 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4454 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
4455 "Done %s.\n", __func__);
4462 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
4467 mbx_cmd_t *mcp = &mc;
4468 struct qla_hw_data *ha = vha->hw;
4470 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
4471 "Entered %s.\n", __func__);
4473 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
4474 return QLA_FUNCTION_FAILED;
4476 mcp->mb[0] = MBC_PORT_PARAMS;
4477 mcp->mb[1] = loop_id;
4478 if (ha->flags.fcp_prio_enabled)
4482 mcp->mb[4] = priority & 0xf;
4483 mcp->mb[9] = vha->vp_idx;
4484 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4485 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4488 rval = qla2x00_mailbox_command(vha, mcp);
4496 if (rval != QLA_SUCCESS) {
4497 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
4499 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
4500 "Done %s.\n", __func__);
4507 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4509 int rval = QLA_FUNCTION_FAILED;
4510 struct qla_hw_data *ha = vha->hw;
4513 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ca,
4514 "Entered %s.\n", __func__);
4516 if (ha->thermal_support & THERMAL_SUPPORT_I2C) {
4517 rval = qla2x00_read_sfp(vha, 0, &byte,
4518 0x98, 0x1, 1, BIT_13|BIT_12|BIT_0);
4520 if (rval == QLA_SUCCESS)
4523 ql_log(ql_log_warn, vha, 0x10c9,
4524 "Thermal not supported through I2C bus, trying alternate "
4525 "method (ISP access).\n");
4526 ha->thermal_support &= ~THERMAL_SUPPORT_I2C;
4529 if (ha->thermal_support & THERMAL_SUPPORT_ISP) {
4530 rval = qla2x00_read_asic_temperature(vha, temp);
4531 if (rval == QLA_SUCCESS)
4534 ql_log(ql_log_warn, vha, 0x1019,
4535 "Thermal not supported through ISP.\n");
4536 ha->thermal_support &= ~THERMAL_SUPPORT_ISP;
4539 ql_log(ql_log_warn, vha, 0x1150,
4540 "Thermal not supported by this card "
4541 "(ignoring further requests).\n");
4545 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1018,
4546 "Done %s.\n", __func__);
4551 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
4554 struct qla_hw_data *ha = vha->hw;
4556 mbx_cmd_t *mcp = &mc;
4558 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
4559 "Entered %s.\n", __func__);
4561 if (!IS_FWI2_CAPABLE(ha))
4562 return QLA_FUNCTION_FAILED;
4564 memset(mcp, 0, sizeof(mbx_cmd_t));
4565 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4568 mcp->out_mb = MBX_1|MBX_0;
4573 rval = qla2x00_mailbox_command(vha, mcp);
4574 if (rval != QLA_SUCCESS) {
4575 ql_dbg(ql_dbg_mbx, vha, 0x1016,
4576 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4578 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
4579 "Done %s.\n", __func__);
4586 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
4589 struct qla_hw_data *ha = vha->hw;
4591 mbx_cmd_t *mcp = &mc;
4593 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
4594 "Entered %s.\n", __func__);
4596 if (!IS_QLA82XX(ha))
4597 return QLA_FUNCTION_FAILED;
4599 memset(mcp, 0, sizeof(mbx_cmd_t));
4600 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4603 mcp->out_mb = MBX_1|MBX_0;
4608 rval = qla2x00_mailbox_command(vha, mcp);
4609 if (rval != QLA_SUCCESS) {
4610 ql_dbg(ql_dbg_mbx, vha, 0x100c,
4611 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4613 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
4614 "Done %s.\n", __func__);
4621 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
4623 struct qla_hw_data *ha = vha->hw;
4625 mbx_cmd_t *mcp = &mc;
4626 int rval = QLA_FUNCTION_FAILED;
4628 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
4629 "Entered %s.\n", __func__);
4631 memset(mcp->mb, 0 , sizeof(mcp->mb));
4632 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4633 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4634 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
4635 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
4637 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4638 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
4639 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4641 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4642 mcp->tov = MBX_TOV_SECONDS;
4643 rval = qla2x00_mailbox_command(vha, mcp);
4645 /* Always copy back return mailbox values. */
4646 if (rval != QLA_SUCCESS) {
4647 ql_dbg(ql_dbg_mbx, vha, 0x1120,
4648 "mailbox command FAILED=0x%x, subcode=%x.\n",
4649 (mcp->mb[1] << 16) | mcp->mb[0],
4650 (mcp->mb[3] << 16) | mcp->mb[2]);
4652 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
4653 "Done %s.\n", __func__);
4654 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
4655 if (!ha->md_template_size) {
4656 ql_dbg(ql_dbg_mbx, vha, 0x1122,
4657 "Null template size obtained.\n");
4658 rval = QLA_FUNCTION_FAILED;
4665 qla82xx_md_get_template(scsi_qla_host_t *vha)
4667 struct qla_hw_data *ha = vha->hw;
4669 mbx_cmd_t *mcp = &mc;
4670 int rval = QLA_FUNCTION_FAILED;
4672 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
4673 "Entered %s.\n", __func__);
4675 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4676 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4677 if (!ha->md_tmplt_hdr) {
4678 ql_log(ql_log_warn, vha, 0x1124,
4679 "Unable to allocate memory for Minidump template.\n");
4683 memset(mcp->mb, 0 , sizeof(mcp->mb));
4684 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4685 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4686 mcp->mb[2] = LSW(RQST_TMPLT);
4687 mcp->mb[3] = MSW(RQST_TMPLT);
4688 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
4689 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
4690 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
4691 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
4692 mcp->mb[8] = LSW(ha->md_template_size);
4693 mcp->mb[9] = MSW(ha->md_template_size);
4695 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4696 mcp->tov = MBX_TOV_SECONDS;
4697 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
4698 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4699 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4700 rval = qla2x00_mailbox_command(vha, mcp);
4702 if (rval != QLA_SUCCESS) {
4703 ql_dbg(ql_dbg_mbx, vha, 0x1125,
4704 "mailbox command FAILED=0x%x, subcode=%x.\n",
4705 ((mcp->mb[1] << 16) | mcp->mb[0]),
4706 ((mcp->mb[3] << 16) | mcp->mb[2]));
4708 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
4709 "Done %s.\n", __func__);
4714 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4717 struct qla_hw_data *ha = vha->hw;
4719 mbx_cmd_t *mcp = &mc;
4721 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4722 return QLA_FUNCTION_FAILED;
4724 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
4725 "Entered %s.\n", __func__);
4727 memset(mcp, 0, sizeof(mbx_cmd_t));
4728 mcp->mb[0] = MBC_SET_LED_CONFIG;
4729 mcp->mb[1] = led_cfg[0];
4730 mcp->mb[2] = led_cfg[1];
4731 if (IS_QLA8031(ha)) {
4732 mcp->mb[3] = led_cfg[2];
4733 mcp->mb[4] = led_cfg[3];
4734 mcp->mb[5] = led_cfg[4];
4735 mcp->mb[6] = led_cfg[5];
4738 mcp->out_mb = MBX_2|MBX_1|MBX_0;
4740 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4745 rval = qla2x00_mailbox_command(vha, mcp);
4746 if (rval != QLA_SUCCESS) {
4747 ql_dbg(ql_dbg_mbx, vha, 0x1134,
4748 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4750 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
4751 "Done %s.\n", __func__);
4758 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4761 struct qla_hw_data *ha = vha->hw;
4763 mbx_cmd_t *mcp = &mc;
4765 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4766 return QLA_FUNCTION_FAILED;
4768 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
4769 "Entered %s.\n", __func__);
4771 memset(mcp, 0, sizeof(mbx_cmd_t));
4772 mcp->mb[0] = MBC_GET_LED_CONFIG;
4774 mcp->out_mb = MBX_0;
4775 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4777 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4781 rval = qla2x00_mailbox_command(vha, mcp);
4782 if (rval != QLA_SUCCESS) {
4783 ql_dbg(ql_dbg_mbx, vha, 0x1137,
4784 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4786 led_cfg[0] = mcp->mb[1];
4787 led_cfg[1] = mcp->mb[2];
4788 if (IS_QLA8031(ha)) {
4789 led_cfg[2] = mcp->mb[3];
4790 led_cfg[3] = mcp->mb[4];
4791 led_cfg[4] = mcp->mb[5];
4792 led_cfg[5] = mcp->mb[6];
4794 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
4795 "Done %s.\n", __func__);
4802 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
4805 struct qla_hw_data *ha = vha->hw;
4807 mbx_cmd_t *mcp = &mc;
4809 if (!IS_QLA82XX(ha))
4810 return QLA_FUNCTION_FAILED;
4812 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
4813 "Entered %s.\n", __func__);
4815 memset(mcp, 0, sizeof(mbx_cmd_t));
4816 mcp->mb[0] = MBC_SET_LED_CONFIG;
4822 mcp->out_mb = MBX_7|MBX_0;
4824 mcp->tov = MBX_TOV_SECONDS;
4827 rval = qla2x00_mailbox_command(vha, mcp);
4828 if (rval != QLA_SUCCESS) {
4829 ql_dbg(ql_dbg_mbx, vha, 0x1128,
4830 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4832 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
4833 "Done %s.\n", __func__);
4840 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
4843 struct qla_hw_data *ha = vha->hw;
4845 mbx_cmd_t *mcp = &mc;
4847 if (!IS_QLA83XX(ha))
4848 return QLA_FUNCTION_FAILED;
4850 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
4851 "Entered %s.\n", __func__);
4853 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
4854 mcp->mb[1] = LSW(reg);
4855 mcp->mb[2] = MSW(reg);
4856 mcp->mb[3] = LSW(data);
4857 mcp->mb[4] = MSW(data);
4858 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4860 mcp->in_mb = MBX_1|MBX_0;
4861 mcp->tov = MBX_TOV_SECONDS;
4863 rval = qla2x00_mailbox_command(vha, mcp);
4865 if (rval != QLA_SUCCESS) {
4866 ql_dbg(ql_dbg_mbx, vha, 0x1131,
4867 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4869 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
4870 "Done %s.\n", __func__);
4877 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
4880 struct qla_hw_data *ha = vha->hw;
4882 mbx_cmd_t *mcp = &mc;
4884 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4885 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
4886 "Implicit LOGO Unsupported.\n");
4887 return QLA_FUNCTION_FAILED;
4891 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
4892 "Entering %s.\n", __func__);
4894 /* Perform Implicit LOGO. */
4895 mcp->mb[0] = MBC_PORT_LOGOUT;
4896 mcp->mb[1] = fcport->loop_id;
4897 mcp->mb[10] = BIT_15;
4898 mcp->out_mb = MBX_10|MBX_1|MBX_0;
4900 mcp->tov = MBX_TOV_SECONDS;
4902 rval = qla2x00_mailbox_command(vha, mcp);
4903 if (rval != QLA_SUCCESS)
4904 ql_dbg(ql_dbg_mbx, vha, 0x113d,
4905 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4907 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
4908 "Done %s.\n", __func__);
4914 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
4918 mbx_cmd_t *mcp = &mc;
4919 struct qla_hw_data *ha = vha->hw;
4920 unsigned long retry_max_time = jiffies + (2 * HZ);
4922 if (!IS_QLA83XX(ha))
4923 return QLA_FUNCTION_FAILED;
4925 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
4928 mcp->mb[0] = MBC_READ_REMOTE_REG;
4929 mcp->mb[1] = LSW(reg);
4930 mcp->mb[2] = MSW(reg);
4931 mcp->out_mb = MBX_2|MBX_1|MBX_0;
4932 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4933 mcp->tov = MBX_TOV_SECONDS;
4935 rval = qla2x00_mailbox_command(vha, mcp);
4937 if (rval != QLA_SUCCESS) {
4938 ql_dbg(ql_dbg_mbx, vha, 0x114c,
4939 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4940 rval, mcp->mb[0], mcp->mb[1]);
4942 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
4943 if (*data == QLA8XXX_BAD_VALUE) {
4945 * During soft-reset CAMRAM register reads might
4946 * return 0xbad0bad0. So retry for MAX of 2 sec
4947 * while reading camram registers.
4949 if (time_after(jiffies, retry_max_time)) {
4950 ql_dbg(ql_dbg_mbx, vha, 0x1141,
4951 "Failure to read CAMRAM register. "
4952 "data=0x%x.\n", *data);
4953 return QLA_FUNCTION_FAILED;
4958 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
4965 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
4969 mbx_cmd_t *mcp = &mc;
4970 struct qla_hw_data *ha = vha->hw;
4972 if (!IS_QLA83XX(ha))
4973 return QLA_FUNCTION_FAILED;
4975 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
4977 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
4978 mcp->out_mb = MBX_0;
4979 mcp->in_mb = MBX_1|MBX_0;
4980 mcp->tov = MBX_TOV_SECONDS;
4982 rval = qla2x00_mailbox_command(vha, mcp);
4984 if (rval != QLA_SUCCESS) {
4985 ql_dbg(ql_dbg_mbx, vha, 0x1144,
4986 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4987 rval, mcp->mb[0], mcp->mb[1]);
4988 ha->isp_ops->fw_dump(vha, 0);
4990 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
4997 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
4998 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5002 mbx_cmd_t *mcp = &mc;
5003 uint8_t subcode = (uint8_t)options;
5004 struct qla_hw_data *ha = vha->hw;
5006 if (!IS_QLA8031(ha))
5007 return QLA_FUNCTION_FAILED;
5009 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5011 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5012 mcp->mb[1] = options;
5013 mcp->out_mb = MBX_1|MBX_0;
5014 if (subcode & BIT_2) {
5015 mcp->mb[2] = LSW(start_addr);
5016 mcp->mb[3] = MSW(start_addr);
5017 mcp->mb[4] = LSW(end_addr);
5018 mcp->mb[5] = MSW(end_addr);
5019 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5021 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5022 if (!(subcode & (BIT_2 | BIT_5)))
5023 mcp->in_mb |= MBX_4|MBX_3;
5024 mcp->tov = MBX_TOV_SECONDS;
5026 rval = qla2x00_mailbox_command(vha, mcp);
5028 if (rval != QLA_SUCCESS) {
5029 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5030 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5031 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5033 ha->isp_ops->fw_dump(vha, 0);
5035 if (subcode & BIT_5)
5036 *sector_size = mcp->mb[1];
5037 else if (subcode & (BIT_6 | BIT_7)) {
5038 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5039 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5040 } else if (subcode & (BIT_3 | BIT_4)) {
5041 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5042 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5044 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5051 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5056 mbx_cmd_t *mcp = &mc;
5058 if (!IS_MCTP_CAPABLE(vha->hw))
5059 return QLA_FUNCTION_FAILED;
5061 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5062 "Entered %s.\n", __func__);
5064 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5065 mcp->mb[1] = LSW(addr);
5066 mcp->mb[2] = MSW(req_dma);
5067 mcp->mb[3] = LSW(req_dma);
5068 mcp->mb[4] = MSW(size);
5069 mcp->mb[5] = LSW(size);
5070 mcp->mb[6] = MSW(MSD(req_dma));
5071 mcp->mb[7] = LSW(MSD(req_dma));
5072 mcp->mb[8] = MSW(addr);
5073 /* Setting RAM ID to valid */
5074 mcp->mb[10] |= BIT_7;
5075 /* For MCTP RAM ID is 0x40 */
5076 mcp->mb[10] |= 0x40;
5078 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5082 mcp->tov = MBX_TOV_SECONDS;
5084 rval = qla2x00_mailbox_command(vha, mcp);
5086 if (rval != QLA_SUCCESS) {
5087 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5088 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5090 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5091 "Done %s.\n", __func__);