Merge branch 'misc' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6
[pandora-kernel.git] / drivers / scsi / pm8001 / pm8001_sas.h
1 /*
2  * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
3  *
4  * Copyright (c) 2008-2009 USI Co., Ltd.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    substantially similar to the "NO WARRANTY" disclaimer below
15  *    ("Disclaimer") and any redistribution must be conditioned upon
16  *    including a substantially similar Disclaimer requirement for further
17  *    binary redistribution.
18  * 3. Neither the names of the above-listed copyright holders nor the names
19  *    of any contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  * Alternatively, this software may be distributed under the terms of the
23  * GNU General Public License ("GPL") version 2 as published by the Free
24  * Software Foundation.
25  *
26  * NO WARRANTY
27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGES.
38  *
39  */
40
41 #ifndef _PM8001_SAS_H_
42 #define _PM8001_SAS_H_
43
44 #include <linux/kernel.h>
45 #include <linux/module.h>
46 #include <linux/spinlock.h>
47 #include <linux/delay.h>
48 #include <linux/types.h>
49 #include <linux/ctype.h>
50 #include <linux/dma-mapping.h>
51 #include <linux/pci.h>
52 #include <linux/interrupt.h>
53 #include <scsi/libsas.h>
54 #include <scsi/scsi_tcq.h>
55 #include <scsi/sas_ata.h>
56 #include <asm/atomic.h>
57 #include "pm8001_defs.h"
58
59 #define DRV_NAME                "pm8001"
60 #define DRV_VERSION             "0.1.36"
61 #define PM8001_FAIL_LOGGING     0x01 /* Error message logging */
62 #define PM8001_INIT_LOGGING     0x02 /* driver init logging */
63 #define PM8001_DISC_LOGGING     0x04 /* discovery layer logging */
64 #define PM8001_IO_LOGGING       0x08 /* I/O path logging */
65 #define PM8001_EH_LOGGING       0x10 /* libsas EH function logging*/
66 #define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
67 #define PM8001_MSG_LOGGING      0x40 /* misc message logging */
68 #define pm8001_printk(format, arg...)   printk(KERN_INFO "%s %d:" format,\
69                                 __func__, __LINE__, ## arg)
70 #define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD)   \
71 do {                                            \
72         if (unlikely(HBA->logging_level & LEVEL))       \
73                 do {                                    \
74                         CMD;                            \
75                 } while (0);                            \
76 } while (0);
77
78 #define PM8001_EH_DBG(HBA, CMD)                 \
79         PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
80
81 #define PM8001_INIT_DBG(HBA, CMD)               \
82         PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
83
84 #define PM8001_DISC_DBG(HBA, CMD)               \
85         PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
86
87 #define PM8001_IO_DBG(HBA, CMD)         \
88         PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
89
90 #define PM8001_FAIL_DBG(HBA, CMD)               \
91         PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
92
93 #define PM8001_IOCTL_DBG(HBA, CMD)              \
94         PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
95
96 #define PM8001_MSG_DBG(HBA, CMD)                \
97         PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
98
99
100 #define PM8001_USE_TASKLET
101 #define PM8001_USE_MSIX
102 #define PM8001_READ_VPD
103
104
105 #define DEV_IS_EXPANDER(type)   ((type == EDGE_DEV) || (type == FANOUT_DEV))
106
107 #define PM8001_NAME_LENGTH              32/* generic length of strings */
108 extern struct list_head hba_list;
109 extern const struct pm8001_dispatch pm8001_8001_dispatch;
110
111 struct pm8001_hba_info;
112 struct pm8001_ccb_info;
113 struct pm8001_device;
114 /* define task management IU */
115 struct pm8001_tmf_task {
116         u8      tmf;
117         u32     tag_of_task_to_be_managed;
118 };
119 struct pm8001_ioctl_payload {
120         u32     signature;
121         u16     major_function;
122         u16     minor_function;
123         u16     length;
124         u16     status;
125         u16     offset;
126         u16     id;
127         u8      *func_specific;
128 };
129
130 struct pm8001_dispatch {
131         char *name;
132         int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
133         int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha, u32 signature);
134         void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
135         int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
136         void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
137         irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha);
138         u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
139         int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha);
140         void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha);
141         void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha);
142         void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
143         int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
144                 struct pm8001_ccb_info *ccb);
145         int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
146                 struct pm8001_ccb_info *ccb);
147         int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
148                 struct pm8001_ccb_info *ccb);
149         int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
150         int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
151         int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
152                 struct pm8001_device *pm8001_dev, u32 flag);
153         int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
154         int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
155                 u32 phy_id, u32 phy_op);
156         int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
157                 struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
158                 u32 cmd_tag);
159         int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
160                 struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
161         int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
162         int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
163         int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
164                 void *payload);
165         int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
166                 struct pm8001_device *pm8001_dev, u32 state);
167         int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
168                 u32 state);
169         int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
170                 u32 state);
171         int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
172 };
173
174 struct pm8001_chip_info {
175         u32     n_phy;
176         const struct pm8001_dispatch    *dispatch;
177 };
178 #define PM8001_CHIP_DISP        (pm8001_ha->chip->dispatch)
179
180 struct pm8001_port {
181         struct asd_sas_port     sas_port;
182         u8                      port_attached;
183         u8                      wide_port_phymap;
184         u8                      port_state;
185         struct list_head        list;
186 };
187
188 struct pm8001_phy {
189         struct pm8001_hba_info  *pm8001_ha;
190         struct pm8001_port      *port;
191         struct asd_sas_phy      sas_phy;
192         struct sas_identify     identify;
193         struct scsi_device      *sdev;
194         u64                     dev_sas_addr;
195         u32                     phy_type;
196         struct completion       *enable_completion;
197         u32                     frame_rcvd_size;
198         u8                      frame_rcvd[32];
199         u8                      phy_attached;
200         u8                      phy_state;
201         enum sas_linkrate       minimum_linkrate;
202         enum sas_linkrate       maximum_linkrate;
203 };
204
205 struct pm8001_device {
206         enum sas_dev_type       dev_type;
207         struct domain_device    *sas_device;
208         u32                     attached_phy;
209         u32                     id;
210         struct completion       *dcompletion;
211         struct completion       *setds_completion;
212         u32                     device_id;
213         u32                     running_req;
214 };
215
216 struct pm8001_prd_imt {
217         __le32                  len;
218         __le32                  e;
219 };
220
221 struct pm8001_prd {
222         __le64                  addr;           /* 64-bit buffer address */
223         struct pm8001_prd_imt   im_len;         /* 64-bit length */
224 } __attribute__ ((packed));
225 /*
226  * CCB(Command Control Block)
227  */
228 struct pm8001_ccb_info {
229         struct list_head        entry;
230         struct sas_task         *task;
231         u32                     n_elem;
232         u32                     ccb_tag;
233         dma_addr_t              ccb_dma_handle;
234         struct pm8001_device    *device;
235         struct pm8001_prd       buf_prd[PM8001_MAX_DMA_SG];
236         struct fw_control_ex    *fw_control_context;
237 };
238
239 struct mpi_mem {
240         void                    *virt_ptr;
241         dma_addr_t              phys_addr;
242         u32                     phys_addr_hi;
243         u32                     phys_addr_lo;
244         u32                     total_len;
245         u32                     num_elements;
246         u32                     element_size;
247         u32                     alignment;
248 };
249
250 struct mpi_mem_req {
251         /* The number of element in the  mpiMemory array */
252         u32                     count;
253         /* The array of structures that define memroy regions*/
254         struct mpi_mem          region[USI_MAX_MEMCNT];
255 };
256
257 struct main_cfg_table {
258         u32                     signature;
259         u32                     interface_rev;
260         u32                     firmware_rev;
261         u32                     max_out_io;
262         u32                     max_sgl;
263         u32                     ctrl_cap_flag;
264         u32                     gst_offset;
265         u32                     inbound_queue_offset;
266         u32                     outbound_queue_offset;
267         u32                     inbound_q_nppd_hppd;
268         u32                     outbound_hw_event_pid0_3;
269         u32                     outbound_hw_event_pid4_7;
270         u32                     outbound_ncq_event_pid0_3;
271         u32                     outbound_ncq_event_pid4_7;
272         u32                     outbound_tgt_ITNexus_event_pid0_3;
273         u32                     outbound_tgt_ITNexus_event_pid4_7;
274         u32                     outbound_tgt_ssp_event_pid0_3;
275         u32                     outbound_tgt_ssp_event_pid4_7;
276         u32                     outbound_tgt_smp_event_pid0_3;
277         u32                     outbound_tgt_smp_event_pid4_7;
278         u32                     upper_event_log_addr;
279         u32                     lower_event_log_addr;
280         u32                     event_log_size;
281         u32                     event_log_option;
282         u32                     upper_iop_event_log_addr;
283         u32                     lower_iop_event_log_addr;
284         u32                     iop_event_log_size;
285         u32                     iop_event_log_option;
286         u32                     fatal_err_interrupt;
287         u32                     fatal_err_dump_offset0;
288         u32                     fatal_err_dump_length0;
289         u32                     fatal_err_dump_offset1;
290         u32                     fatal_err_dump_length1;
291         u32                     hda_mode_flag;
292         u32                     anolog_setup_table_offset;
293 };
294 struct general_status_table {
295         u32                     gst_len_mpistate;
296         u32                     iq_freeze_state0;
297         u32                     iq_freeze_state1;
298         u32                     msgu_tcnt;
299         u32                     iop_tcnt;
300         u32                     reserved;
301         u32                     phy_state[8];
302         u32                     reserved1;
303         u32                     reserved2;
304         u32                     reserved3;
305         u32                     recover_err_info[8];
306 };
307 struct inbound_queue_table {
308         u32                     element_pri_size_cnt;
309         u32                     upper_base_addr;
310         u32                     lower_base_addr;
311         u32                     ci_upper_base_addr;
312         u32                     ci_lower_base_addr;
313         u32                     pi_pci_bar;
314         u32                     pi_offset;
315         u32                     total_length;
316         void                    *base_virt;
317         void                    *ci_virt;
318         u32                     reserved;
319         __le32                  consumer_index;
320         u32                     producer_idx;
321 };
322 struct outbound_queue_table {
323         u32                     element_size_cnt;
324         u32                     upper_base_addr;
325         u32                     lower_base_addr;
326         void                    *base_virt;
327         u32                     pi_upper_base_addr;
328         u32                     pi_lower_base_addr;
329         u32                     ci_pci_bar;
330         u32                     ci_offset;
331         u32                     total_length;
332         void                    *pi_virt;
333         u32                     interrup_vec_cnt_delay;
334         u32                     dinterrup_to_pci_offset;
335         __le32                  producer_index;
336         u32                     consumer_idx;
337 };
338 struct pm8001_hba_memspace {
339         void __iomem            *memvirtaddr;
340         u64                     membase;
341         u32                     memsize;
342 };
343 struct pm8001_hba_info {
344         char                    name[PM8001_NAME_LENGTH];
345         struct list_head        list;
346         unsigned long           flags;
347         spinlock_t              lock;/* host-wide lock */
348         struct pci_dev          *pdev;/* our device */
349         struct device           *dev;
350         struct pm8001_hba_memspace io_mem[6];
351         struct mpi_mem_req      memoryMap;
352         void __iomem    *msg_unit_tbl_addr;/*Message Unit Table Addr*/
353         void __iomem    *main_cfg_tbl_addr;/*Main Config Table Addr*/
354         void __iomem    *general_stat_tbl_addr;/*General Status Table Addr*/
355         void __iomem    *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
356         void __iomem    *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
357         struct main_cfg_table   main_cfg_tbl;
358         struct general_status_table     gs_tbl;
359         struct inbound_queue_table      inbnd_q_tbl[PM8001_MAX_INB_NUM];
360         struct outbound_queue_table     outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
361         u8                      sas_addr[SAS_ADDR_SIZE];
362         struct sas_ha_struct    *sas;/* SCSI/SAS glue */
363         struct Scsi_Host        *shost;
364         u32                     chip_id;
365         const struct pm8001_chip_info   *chip;
366         struct completion       *nvmd_completion;
367         int                     tags_num;
368         unsigned long           *tags;
369         struct pm8001_phy       phy[PM8001_MAX_PHYS];
370         struct pm8001_port      port[PM8001_MAX_PHYS];
371         u32                     id;
372         u32                     irq;
373         struct pm8001_device    *devices;
374         struct pm8001_ccb_info  *ccb_info;
375 #ifdef PM8001_USE_MSIX
376         struct msix_entry       msix_entries[16];/*for msi-x interrupt*/
377         int                     number_of_intr;/*will be used in remove()*/
378 #endif
379 #ifdef PM8001_USE_TASKLET
380         struct tasklet_struct   tasklet;
381 #endif
382         struct list_head        wq_list;
383         u32                     logging_level;
384         u32                     fw_status;
385         const struct firmware   *fw_image;
386 };
387
388 struct pm8001_wq {
389         struct delayed_work work_q;
390         struct pm8001_hba_info *pm8001_ha;
391         void *data;
392         int handler;
393         struct list_head entry;
394 };
395
396 struct pm8001_fw_image_header {
397         u8 vender_id[8];
398         u8 product_id;
399         u8 hardware_rev;
400         u8 dest_partition;
401         u8 reserved;
402         u8 fw_rev[4];
403         __be32  image_length;
404         __be32 image_crc;
405         __be32 startup_entry;
406 } __attribute__((packed, aligned(4)));
407
408
409 /**
410  * FW Flash Update status values
411  */
412 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT    0x00
413 #define FLASH_UPDATE_IN_PROGRESS                0x01
414 #define FLASH_UPDATE_HDR_ERR                    0x02
415 #define FLASH_UPDATE_OFFSET_ERR                 0x03
416 #define FLASH_UPDATE_CRC_ERR                    0x04
417 #define FLASH_UPDATE_LENGTH_ERR                 0x05
418 #define FLASH_UPDATE_HW_ERR                     0x06
419 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED         0x10
420 #define FLASH_UPDATE_DISABLED                   0x11
421
422 /**
423  * brief param structure for firmware flash update.
424  */
425 struct fw_flash_updata_info {
426         u32                     cur_image_offset;
427         u32                     cur_image_len;
428         u32                     total_image_len;
429         struct pm8001_prd       sgl;
430 };
431
432 struct fw_control_info {
433         u32                     retcode;/*ret code (status)*/
434         u32                     phase;/*ret code phase*/
435         u32                     phaseCmplt;/*percent complete for the current
436         update phase */
437         u32                     version;/*Hex encoded firmware version number*/
438         u32                     offset;/*Used for downloading firmware  */
439         u32                     len; /*len of buffer*/
440         u32                     size;/* Used in OS VPD and Trace get size
441         operations.*/
442         u32                     reserved;/* padding required for 64 bit
443         alignment */
444         u8                      buffer[1];/* Start of buffer */
445 };
446 struct fw_control_ex {
447         struct fw_control_info *fw_control;
448         void                    *buffer;/* keep buffer pointer to be
449         freed when the responce comes*/
450         void                    *virtAddr;/* keep virtual address of the data */
451         void                    *usrAddr;/* keep virtual address of the
452         user data */
453         dma_addr_t              phys_addr;
454         u32                     len; /* len of buffer  */
455         void                    *payload; /* pointer to IOCTL Payload */
456         u8                      inProgress;/*if 1 - the IOCTL request is in
457         progress */
458         void                    *param1;
459         void                    *param2;
460         void                    *param3;
461 };
462
463 /******************** function prototype *********************/
464 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
465 void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
466 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
467 void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
468 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
469         struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
470 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
471         void *funcdata);
472 int pm8001_slave_alloc(struct scsi_device *scsi_dev);
473 int pm8001_slave_configure(struct scsi_device *sdev);
474 void pm8001_scan_start(struct Scsi_Host *shost);
475 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
476 int pm8001_queue_command(struct sas_task *task, const int num,
477         gfp_t gfp_flags);
478 int pm8001_abort_task(struct sas_task *task);
479 int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
480 int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
481 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
482 int pm8001_dev_found(struct domain_device *dev);
483 void pm8001_dev_gone(struct domain_device *dev);
484 int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
485 int pm8001_I_T_nexus_reset(struct domain_device *dev);
486 int pm8001_query_task(struct sas_task *task);
487 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
488         dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
489         u32 mem_size, u32 align);
490
491
492 /* ctl shared API */
493 extern struct device_attribute *pm8001_host_attrs[];
494
495 #endif
496