drivers/scsi/mpt2sas/mpi/mpi2_ioc.h

   1 /*
   2  *  Copyright (c) 2000-2009 LSI Corporation.
   3  *
   4  *
   5  *           Name:  mpi2_ioc.h
   6  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7  *  Creation Date:  October 11, 2006
   8  *
   9  *  mpi2_ioc.h Version:  02.00.13
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  17  *  06-04-07  02.00.01  In IOCFacts Reply structure, renamed MaxDevices to
  18  *                      MaxTargets.
  19  *                      Added TotalImageSize field to FWDownload Request.
  20  *                      Added reserved words to FWUpload Request.
  21  *  06-26-07  02.00.02  Added IR Configuration Change List Event.
  22  *  08-31-07  02.00.03  Removed SystemReplyQueueDepth field from the IOCInit
  23  *                      request and replaced it with
  24  *                      ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
  25  *                      Replaced the MinReplyQueueDepth field of the IOCFacts
  26  *                      reply with MaxReplyDescriptorPostQueueDepth.
  27  *                      Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
  28  *                      depth for the Reply Descriptor Post Queue.
  29  *                      Added SASAddress field to Initiator Device Table
  30  *                      Overflow Event data.
  31  *  10-31-07  02.00.04  Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
  32  *                      for SAS Initiator Device Status Change Event data.
  33  *                      Modified Reason Code defines for SAS Topology Change
  34  *                      List Event data, including adding a bit for PHY Vacant
  35  *                      status, and adding a mask for the Reason Code.
  36  *                      Added define for
  37  *                      MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
  38  *                      Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
  39  *  12-18-07  02.00.05  Added Boot Status defines for the IOCExceptions field of
  40  *                      the IOCFacts Reply.
  41  *                      Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  42  *                      Moved MPI2_VERSION_UNION to mpi2.h.
  43  *                      Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
  44  *                      instead of enables, and added SASBroadcastPrimitiveMasks
  45  *                      field.
  46  *                      Added Log Entry Added Event and related structure.
  47  *  02-29-08  02.00.06  Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
  48  *                      Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
  49  *                      Added MaxVolumes and MaxPersistentEntries fields to
  50  *                      IOCFacts reply.
  51  *                      Added ProtocalFlags and IOCCapabilities fields to
  52  *                      MPI2_FW_IMAGE_HEADER.
  53  *                      Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
  54  *  03-03-08  02.00.07  Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
  55  *                      a U16 (from a U32).
  56  *                      Removed extra 's' from EventMasks name.
  57  *  06-27-08  02.00.08  Fixed an offset in a comment.
  58  *  10-02-08  02.00.09  Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
  59  *                      Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
  60  *                      renamed MinReplyFrameSize to ReplyFrameSize.
  61  *                      Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
  62  *                      Added two new RAIDOperation values for Integrated RAID
  63  *                      Operations Status Event data.
  64  *                      Added four new IR Configuration Change List Event data
  65  *                      ReasonCode values.
  66  *                      Added two new ReasonCode defines for SAS Device Status
  67  *                      Change Event data.
  68  *                      Added three new DiscoveryStatus bits for the SAS
  69  *                      Discovery event data.
  70  *                      Added Multiplexing Status Change bit to the PhyStatus
  71  *                      field of the SAS Topology Change List event data.
  72  *                      Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
  73  *                      BootFlags are now product-specific.
  74  *                      Added defines for the indivdual signature bytes
  75  *                      for MPI2_INIT_IMAGE_FOOTER.
  76  *  01-19-09  02.00.10  Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
  77  *                      Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
  78  *                      define.
  79  *                      Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
  80  *                      define.
  81  *                      Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
  82  *  05-06-09  02.00.11  Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
  83  *                      Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
  84  *                      Added two new reason codes for SAS Device Status Change
  85  *                      Event.
  86  *                      Added new event: SAS PHY Counter.
  87  *  07-30-09  02.00.12  Added GPIO Interrupt event define and structure.
  88  *                      Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  89  *                      Added new product id family for 2208.
  90  *  10-28-09  02.00.13  Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
  91  *                      Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
  92  *                      Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
  93  *                      Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
  94  *                      Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
  95  *                      Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
  96  *                      Added Host Based Discovery Phy Event data.
  97  *                      Added defines for ProductID Product field
  98  *                      (MPI2_FW_HEADER_PID_).
  99  *                      Modified values for SAS ProductID Family
 100  *                      (MPI2_FW_HEADER_PID_FAMILY_).
 101  *  --------------------------------------------------------------------------
 102  */
 103
 104 #ifndef MPI2_IOC_H
 105 #define MPI2_IOC_H
 106
 107 /*****************************************************************************
 108 *
 109 *               IOC Messages
 110 *
 111 *****************************************************************************/
 112
 113 /****************************************************************************
 114 *  IOCInit message
 115 ****************************************************************************/
 116
 117 /* IOCInit Request message */
 118 typedef struct _MPI2_IOC_INIT_REQUEST
 119 {
 120     U8                      WhoInit;                        /* 0x00 */
 121     U8                      Reserved1;                      /* 0x01 */
 122     U8                      ChainOffset;                    /* 0x02 */
 123     U8                      Function;                       /* 0x03 */
 124     U16                     Reserved2;                      /* 0x04 */
 125     U8                      Reserved3;                      /* 0x06 */
 126     U8                      MsgFlags;                       /* 0x07 */
 127     U8                      VP_ID;                          /* 0x08 */
 128     U8                      VF_ID;                          /* 0x09 */
 129     U16                     Reserved4;                      /* 0x0A */
 130     U16                     MsgVersion;                     /* 0x0C */
 131     U16                     HeaderVersion;                  /* 0x0E */
 132     U32                     Reserved5;                      /* 0x10 */
 133     U16                     Reserved6;                      /* 0x14 */
 134     U8                      Reserved7;                      /* 0x16 */
 135     U8                      HostMSIxVectors;                /* 0x17 */
 136     U16                     Reserved8;                      /* 0x18 */
 137     U16                     SystemRequestFrameSize;         /* 0x1A */
 138     U16                     ReplyDescriptorPostQueueDepth;  /* 0x1C */
 139     U16                     ReplyFreeQueueDepth;            /* 0x1E */
 140     U32                     SenseBufferAddressHigh;         /* 0x20 */
 141     U32                     SystemReplyAddressHigh;         /* 0x24 */
 142     U64                     SystemRequestFrameBaseAddress;  /* 0x28 */
 143     U64                     ReplyDescriptorPostQueueAddress;/* 0x30 */
 144     U64                     ReplyFreeQueueAddress;          /* 0x38 */
 145     U64                     TimeStamp;                      /* 0x40 */
 146 } MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
 147   Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
 148
 149 /* WhoInit values */
 150 #define MPI2_WHOINIT_NOT_INITIALIZED            (0x00)
 151 #define MPI2_WHOINIT_SYSTEM_BIOS                (0x01)
 152 #define MPI2_WHOINIT_ROM_BIOS                   (0x02)
 153 #define MPI2_WHOINIT_PCI_PEER                   (0x03)
 154 #define MPI2_WHOINIT_HOST_DRIVER                (0x04)
 155 #define MPI2_WHOINIT_MANUFACTURER               (0x05)
 156
 157 /* MsgVersion */
 158 #define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK      (0xFF00)
 159 #define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT     (8)
 160 #define MPI2_IOCINIT_MSGVERSION_MINOR_MASK      (0x00FF)
 161 #define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT     (0)
 162
 163 /* HeaderVersion */
 164 #define MPI2_IOCINIT_HDRVERSION_UNIT_MASK       (0xFF00)
 165 #define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT      (8)
 166 #define MPI2_IOCINIT_HDRVERSION_DEV_MASK        (0x00FF)
 167 #define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT       (0)
 168
 169 /* minimum depth for the Reply Descriptor Post Queue */
 170 #define MPI2_RDPQ_DEPTH_MIN                     (16)
 171
 172
 173 /* IOCInit Reply message */
 174 typedef struct _MPI2_IOC_INIT_REPLY
 175 {
 176     U8                      WhoInit;                        /* 0x00 */
 177     U8                      Reserved1;                      /* 0x01 */
 178     U8                      MsgLength;                      /* 0x02 */
 179     U8                      Function;                       /* 0x03 */
 180     U16                     Reserved2;                      /* 0x04 */
 181     U8                      Reserved3;                      /* 0x06 */
 182     U8                      MsgFlags;                       /* 0x07 */
 183     U8                      VP_ID;                          /* 0x08 */
 184     U8                      VF_ID;                          /* 0x09 */
 185     U16                     Reserved4;                      /* 0x0A */
 186     U16                     Reserved5;                      /* 0x0C */
 187     U16                     IOCStatus;                      /* 0x0E */
 188     U32                     IOCLogInfo;                     /* 0x10 */
 189 } MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
 190   Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
 191
 192
 193 /****************************************************************************
 194 *  IOCFacts message
 195 ****************************************************************************/
 196
 197 /* IOCFacts Request message */
 198 typedef struct _MPI2_IOC_FACTS_REQUEST
 199 {
 200     U16                     Reserved1;                      /* 0x00 */
 201     U8                      ChainOffset;                    /* 0x02 */
 202     U8                      Function;                       /* 0x03 */
 203     U16                     Reserved2;                      /* 0x04 */
 204     U8                      Reserved3;                      /* 0x06 */
 205     U8                      MsgFlags;                       /* 0x07 */
 206     U8                      VP_ID;                          /* 0x08 */
 207     U8                      VF_ID;                          /* 0x09 */
 208     U16                     Reserved4;                      /* 0x0A */
 209 } MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
 210   Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
 211
 212
 213 /* IOCFacts Reply message */
 214 typedef struct _MPI2_IOC_FACTS_REPLY
 215 {
 216     U16                     MsgVersion;                     /* 0x00 */
 217     U8                      MsgLength;                      /* 0x02 */
 218     U8                      Function;                       /* 0x03 */
 219     U16                     HeaderVersion;                  /* 0x04 */
 220     U8                      IOCNumber;                      /* 0x06 */
 221     U8                      MsgFlags;                       /* 0x07 */
 222     U8                      VP_ID;                          /* 0x08 */
 223     U8                      VF_ID;                          /* 0x09 */
 224     U16                     Reserved1;                      /* 0x0A */
 225     U16                     IOCExceptions;                  /* 0x0C */
 226     U16                     IOCStatus;                      /* 0x0E */
 227     U32                     IOCLogInfo;                     /* 0x10 */
 228     U8                      MaxChainDepth;                  /* 0x14 */
 229     U8                      WhoInit;                        /* 0x15 */
 230     U8                      NumberOfPorts;                  /* 0x16 */
 231     U8                      MaxMSIxVectors;                 /* 0x17 */
 232     U16                     RequestCredit;                  /* 0x18 */
 233     U16                     ProductID;                      /* 0x1A */
 234     U32                     IOCCapabilities;                /* 0x1C */
 235     MPI2_VERSION_UNION      FWVersion;                      /* 0x20 */
 236     U16                     IOCRequestFrameSize;            /* 0x24 */
 237     U16                     Reserved3;                      /* 0x26 */
 238     U16                     MaxInitiators;                  /* 0x28 */
 239     U16                     MaxTargets;                     /* 0x2A */
 240     U16                     MaxSasExpanders;                /* 0x2C */
 241     U16                     MaxEnclosures;                  /* 0x2E */
 242     U16                     ProtocolFlags;                  /* 0x30 */
 243     U16                     HighPriorityCredit;             /* 0x32 */
 244     U16                     MaxReplyDescriptorPostQueueDepth; /* 0x34 */
 245     U8                      ReplyFrameSize;                 /* 0x36 */
 246     U8                      MaxVolumes;                     /* 0x37 */
 247     U16                     MaxDevHandle;                   /* 0x38 */
 248     U16                     MaxPersistentEntries;           /* 0x3A */
 249     U16                     MinDevHandle;                   /* 0x3C */
 250     U16                     Reserved4;                      /* 0x3E */
 251 } MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
 252   Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
 253
 254 /* MsgVersion */
 255 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK             (0xFF00)
 256 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT            (8)
 257 #define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK             (0x00FF)
 258 #define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT            (0)
 259
 260 /* HeaderVersion */
 261 #define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK              (0xFF00)
 262 #define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT             (8)
 263 #define MPI2_IOCFACTS_HDRVERSION_DEV_MASK               (0x00FF)
 264 #define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT              (0)
 265
 266 /* IOCExceptions */
 267 #define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX      (0x0100)
 268
 269 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK              (0x00E0)
 270 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD              (0x0000)
 271 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP            (0x0020)
 272 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED          (0x0040)
 273 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP    (0x0060)
 274
 275 #define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED       (0x0010)
 276 #define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL     (0x0008)
 277 #define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL           (0x0004)
 278 #define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID        (0x0002)
 279 #define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL       (0x0001)
 280
 281 /* defines for WhoInit field are after the IOCInit Request */
 282
 283 /* ProductID field uses MPI2_FW_HEADER_PID_ */
 284
 285 /* IOCCapabilities */
 286 #define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY   (0x00010000)
 287 #define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX            (0x00008000)
 288 #define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR       (0x00004000)
 289 #define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY           (0x00002000)
 290 #define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID        (0x00001000)
 291 #define MPI2_IOCFACTS_CAPABILITY_TLR                    (0x00000800)
 292 #define MPI2_IOCFACTS_CAPABILITY_MULTICAST              (0x00000100)
 293 #define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET   (0x00000080)
 294 #define MPI2_IOCFACTS_CAPABILITY_EEDP                   (0x00000040)
 295 #define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER        (0x00000020)
 296 #define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER        (0x00000010)
 297 #define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER      (0x00000008)
 298 #define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
 299
 300 /* ProtocolFlags */
 301 #define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET              (0x0001)
 302 #define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR           (0x0002)
 303
 304
 305 /****************************************************************************
 306 *  PortFacts message
 307 ****************************************************************************/
 308
 309 /* PortFacts Request message */
 310 typedef struct _MPI2_PORT_FACTS_REQUEST
 311 {
 312     U16                     Reserved1;                      /* 0x00 */
 313     U8                      ChainOffset;                    /* 0x02 */
 314     U8                      Function;                       /* 0x03 */
 315     U16                     Reserved2;                      /* 0x04 */
 316     U8                      PortNumber;                     /* 0x06 */
 317     U8                      MsgFlags;                       /* 0x07 */
 318     U8                      VP_ID;                          /* 0x08 */
 319     U8                      VF_ID;                          /* 0x09 */
 320     U16                     Reserved3;                      /* 0x0A */
 321 } MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
 322   Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
 323
 324 /* PortFacts Reply message */
 325 typedef struct _MPI2_PORT_FACTS_REPLY
 326 {
 327     U16                     Reserved1;                      /* 0x00 */
 328     U8                      MsgLength;                      /* 0x02 */
 329     U8                      Function;                       /* 0x03 */
 330     U16                     Reserved2;                      /* 0x04 */
 331     U8                      PortNumber;                     /* 0x06 */
 332     U8                      MsgFlags;                       /* 0x07 */
 333     U8                      VP_ID;                          /* 0x08 */
 334     U8                      VF_ID;                          /* 0x09 */
 335     U16                     Reserved3;                      /* 0x0A */
 336     U16                     Reserved4;                      /* 0x0C */
 337     U16                     IOCStatus;                      /* 0x0E */
 338     U32                     IOCLogInfo;                     /* 0x10 */
 339     U8                      Reserved5;                      /* 0x14 */
 340     U8                      PortType;                       /* 0x15 */
 341     U16                     Reserved6;                      /* 0x16 */
 342     U16                     MaxPostedCmdBuffers;            /* 0x18 */
 343     U16                     Reserved7;                      /* 0x1A */
 344 } MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
 345   Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
 346
 347 /* PortType values */
 348 #define MPI2_PORTFACTS_PORTTYPE_INACTIVE            (0x00)
 349 #define MPI2_PORTFACTS_PORTTYPE_FC                  (0x10)
 350 #define MPI2_PORTFACTS_PORTTYPE_ISCSI               (0x20)
 351 #define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL        (0x30)
 352 #define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL         (0x31)
 353
 354
 355 /****************************************************************************
 356 *  PortEnable message
 357 ****************************************************************************/
 358
 359 /* PortEnable Request message */
 360 typedef struct _MPI2_PORT_ENABLE_REQUEST
 361 {
 362     U16                     Reserved1;                      /* 0x00 */
 363     U8                      ChainOffset;                    /* 0x02 */
 364     U8                      Function;                       /* 0x03 */
 365     U8                      Reserved2;                      /* 0x04 */
 366     U8                      PortFlags;                      /* 0x05 */
 367     U8                      Reserved3;                      /* 0x06 */
 368     U8                      MsgFlags;                       /* 0x07 */
 369     U8                      VP_ID;                          /* 0x08 */
 370     U8                      VF_ID;                          /* 0x09 */
 371     U16                     Reserved4;                      /* 0x0A */
 372 } MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
 373   Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
 374
 375
 376 /* PortEnable Reply message */
 377 typedef struct _MPI2_PORT_ENABLE_REPLY
 378 {
 379     U16                     Reserved1;                      /* 0x00 */
 380     U8                      MsgLength;                      /* 0x02 */
 381     U8                      Function;                       /* 0x03 */
 382     U8                      Reserved2;                      /* 0x04 */
 383     U8                      PortFlags;                      /* 0x05 */
 384     U8                      Reserved3;                      /* 0x06 */
 385     U8                      MsgFlags;                       /* 0x07 */
 386     U8                      VP_ID;                          /* 0x08 */
 387     U8                      VF_ID;                          /* 0x09 */
 388     U16                     Reserved4;                      /* 0x0A */
 389     U16                     Reserved5;                      /* 0x0C */
 390     U16                     IOCStatus;                      /* 0x0E */
 391     U32                     IOCLogInfo;                     /* 0x10 */
 392 } MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
 393   Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
 394
 395
 396 /****************************************************************************
 397 *  EventNotification message
 398 ****************************************************************************/
 399
 400 /* EventNotification Request message */
 401 #define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS           (4)
 402
 403 typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
 404 {
 405     U16                     Reserved1;                      /* 0x00 */
 406     U8                      ChainOffset;                    /* 0x02 */
 407     U8                      Function;                       /* 0x03 */
 408     U16                     Reserved2;                      /* 0x04 */
 409     U8                      Reserved3;                      /* 0x06 */
 410     U8                      MsgFlags;                       /* 0x07 */
 411     U8                      VP_ID;                          /* 0x08 */
 412     U8                      VF_ID;                          /* 0x09 */
 413     U16                     Reserved4;                      /* 0x0A */
 414     U32                     Reserved5;                      /* 0x0C */
 415     U32                     Reserved6;                      /* 0x10 */
 416     U32                     EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
 417     U16                     SASBroadcastPrimitiveMasks;     /* 0x24 */
 418     U16                     Reserved7;                      /* 0x26 */
 419     U32                     Reserved8;                      /* 0x28 */
 420 } MPI2_EVENT_NOTIFICATION_REQUEST,
 421   MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
 422   Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
 423
 424
 425 /* EventNotification Reply message */
 426 typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
 427 {
 428     U16                     EventDataLength;                /* 0x00 */
 429     U8                      MsgLength;                      /* 0x02 */
 430     U8                      Function;                       /* 0x03 */
 431     U16                     Reserved1;                      /* 0x04 */
 432     U8                      AckRequired;                    /* 0x06 */
 433     U8                      MsgFlags;                       /* 0x07 */
 434     U8                      VP_ID;                          /* 0x08 */
 435     U8                      VF_ID;                          /* 0x09 */
 436     U16                     Reserved2;                      /* 0x0A */
 437     U16                     Reserved3;                      /* 0x0C */
 438     U16                     IOCStatus;                      /* 0x0E */
 439     U32                     IOCLogInfo;                     /* 0x10 */
 440     U16                     Event;                          /* 0x14 */
 441     U16                     Reserved4;                      /* 0x16 */
 442     U32                     EventContext;                   /* 0x18 */
 443     U32                     EventData[1];                   /* 0x1C */
 444 } MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
 445   Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
 446
 447 /* AckRequired */
 448 #define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED    (0x00)
 449 #define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED        (0x01)
 450
 451 /* Event */
 452 #define MPI2_EVENT_LOG_DATA                         (0x0001)
 453 #define MPI2_EVENT_STATE_CHANGE                     (0x0002)
 454 #define MPI2_EVENT_HARD_RESET_RECEIVED              (0x0005)
 455 #define MPI2_EVENT_EVENT_CHANGE                     (0x000A)
 456 #define MPI2_EVENT_TASK_SET_FULL                    (0x000E)
 457 #define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE         (0x000F)
 458 #define MPI2_EVENT_IR_OPERATION_STATUS              (0x0014)
 459 #define MPI2_EVENT_SAS_DISCOVERY                    (0x0016)
 460 #define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE          (0x0017)
 461 #define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE    (0x0018)
 462 #define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW          (0x0019)
 463 #define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST         (0x001C)
 464 #define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE    (0x001D)
 465 #define MPI2_EVENT_IR_VOLUME                        (0x001E)
 466 #define MPI2_EVENT_IR_PHYSICAL_DISK                 (0x001F)
 467 #define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST     (0x0020)
 468 #define MPI2_EVENT_LOG_ENTRY_ADDED                  (0x0021)
 469 #define MPI2_EVENT_SAS_PHY_COUNTER                  (0x0022)
 470 #define MPI2_EVENT_GPIO_INTERRUPT                   (0x0023)
 471 #define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY         (0x0024)
 472
 473
 474 /* Log Entry Added Event data */
 475
 476 /* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
 477 #define MPI2_EVENT_DATA_LOG_DATA_LENGTH             (0x1C)
 478
 479 typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
 480 {
 481     U64         TimeStamp;                          /* 0x00 */
 482     U32         Reserved1;                          /* 0x08 */
 483     U16         LogSequence;                        /* 0x0C */
 484     U16         LogEntryQualifier;                  /* 0x0E */
 485     U8          VP_ID;                              /* 0x10 */
 486     U8          VF_ID;                              /* 0x11 */
 487     U16         Reserved2;                          /* 0x12 */
 488     U8          LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
 489 } MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 490   MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 491   Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
 492
 493 /* GPIO Interrupt Event data */
 494
 495 typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT {
 496     U8          GPIONum;                            /* 0x00 */
 497     U8          Reserved1;                          /* 0x01 */
 498     U16         Reserved2;                          /* 0x02 */
 499 } MPI2_EVENT_DATA_GPIO_INTERRUPT,
 500   MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT,
 501   Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t;
 502
 503 /* Hard Reset Received Event data */
 504
 505 typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
 506 {
 507     U8                      Reserved1;                      /* 0x00 */
 508     U8                      Port;                           /* 0x01 */
 509     U16                     Reserved2;                      /* 0x02 */
 510 } MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 511   MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 512   Mpi2EventDataHardResetReceived_t,
 513   MPI2_POINTER pMpi2EventDataHardResetReceived_t;
 514
 515 /* Task Set Full Event data */
 516
 517 typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
 518 {
 519     U16                     DevHandle;                      /* 0x00 */
 520     U16                     CurrentDepth;                   /* 0x02 */
 521 } MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
 522   Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
 523
 524
 525 /* SAS Device Status Change Event data */
 526
 527 typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 528 {
 529     U16                     TaskTag;                        /* 0x00 */
 530     U8                      ReasonCode;                     /* 0x02 */
 531     U8                      Reserved1;                      /* 0x03 */
 532     U8                      ASC;                            /* 0x04 */
 533     U8                      ASCQ;                           /* 0x05 */
 534     U16                     DevHandle;                      /* 0x06 */
 535     U32                     Reserved2;                      /* 0x08 */
 536     U64                     SASAddress;                     /* 0x0C */
 537     U8                      LUN[8];                         /* 0x14 */
 538 } MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 539   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 540   Mpi2EventDataSasDeviceStatusChange_t,
 541   MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
 542
 543 /* SAS Device Status Change Event data ReasonCode values */
 544 #define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA                           (0x05)
 545 #define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED                          (0x07)
 546 #define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET                (0x08)
 547 #define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL                  (0x09)
 548 #define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL              (0x0A)
 549 #define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL              (0x0B)
 550 #define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL                  (0x0C)
 551 #define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION                   (0x0D)
 552 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET               (0x0E)
 553 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL              (0x0F)
 554 #define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE                    (0x10)
 555 #define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY       (0x11)
 556 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY   (0x12)
 557
 558
 559 /* Integrated RAID Operation Status Event data */
 560
 561 typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
 562 {
 563     U16                     VolDevHandle;               /* 0x00 */
 564     U16                     Reserved1;                  /* 0x02 */
 565     U8                      RAIDOperation;              /* 0x04 */
 566     U8                      PercentComplete;            /* 0x05 */
 567     U16                     Reserved2;                  /* 0x06 */
 568     U32                     Resereved3;                 /* 0x08 */
 569 } MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 570   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 571   Mpi2EventDataIrOperationStatus_t,
 572   MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
 573
 574 /* Integrated RAID Operation Status Event data RAIDOperation values */
 575 #define MPI2_EVENT_IR_RAIDOP_RESYNC                     (0x00)
 576 #define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION       (0x01)
 577 #define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK          (0x02)
 578 #define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT            (0x03)
 579 #define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT       (0x04)
 580
 581
 582 /* Integrated RAID Volume Event data */
 583
 584 typedef struct _MPI2_EVENT_DATA_IR_VOLUME
 585 {
 586     U16                     VolDevHandle;               /* 0x00 */
 587     U8                      ReasonCode;                 /* 0x02 */
 588     U8                      Reserved1;                  /* 0x03 */
 589     U32                     NewValue;                   /* 0x04 */
 590     U32                     PreviousValue;              /* 0x08 */
 591 } MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
 592   Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
 593
 594 /* Integrated RAID Volume Event data ReasonCode values */
 595 #define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED        (0x01)
 596 #define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED    (0x02)
 597 #define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED           (0x03)
 598
 599
 600 /* Integrated RAID Physical Disk Event data */
 601
 602 typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
 603 {
 604     U16                     Reserved1;                  /* 0x00 */
 605     U8                      ReasonCode;                 /* 0x02 */
 606     U8                      PhysDiskNum;                /* 0x03 */
 607     U16                     PhysDiskDevHandle;          /* 0x04 */
 608     U16                     Reserved2;                  /* 0x06 */
 609     U16                     Slot;                       /* 0x08 */
 610     U16                     EnclosureHandle;            /* 0x0A */
 611     U32                     NewValue;                   /* 0x0C */
 612     U32                     PreviousValue;              /* 0x10 */
 613 } MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 614   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 615   Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
 616
 617 /* Integrated RAID Physical Disk Event data ReasonCode values */
 618 #define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED      (0x01)
 619 #define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED  (0x02)
 620 #define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED         (0x03)
 621
 622
 623 /* Integrated RAID Configuration Change List Event data */
 624
 625 /*
 626  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 627  * one and check NumElements at runtime.
 628  */
 629 #ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
 630 #define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT          (1)
 631 #endif
 632
 633 typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
 634 {
 635     U16                     ElementFlags;               /* 0x00 */
 636     U16                     VolDevHandle;               /* 0x02 */
 637     U8                      ReasonCode;                 /* 0x04 */
 638     U8                      PhysDiskNum;                /* 0x05 */
 639     U16                     PhysDiskDevHandle;          /* 0x06 */
 640 } MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
 641   Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
 642
 643 /* IR Configuration Change List Event data ElementFlags values */
 644 #define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK   (0x000F)
 645 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT      (0x0000)
 646 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
 647 #define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT    (0x0002)
 648
 649 /* IR Configuration Change List Event data ReasonCode values */
 650 #define MPI2_EVENT_IR_CHANGE_RC_ADDED                   (0x01)
 651 #define MPI2_EVENT_IR_CHANGE_RC_REMOVED                 (0x02)
 652 #define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE               (0x03)
 653 #define MPI2_EVENT_IR_CHANGE_RC_HIDE                    (0x04)
 654 #define MPI2_EVENT_IR_CHANGE_RC_UNHIDE                  (0x05)
 655 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED          (0x06)
 656 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED          (0x07)
 657 #define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED              (0x08)
 658 #define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED              (0x09)
 659
 660 typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
 661 {
 662     U8                              NumElements;        /* 0x00 */
 663     U8                              Reserved1;          /* 0x01 */
 664     U8                              Reserved2;          /* 0x02 */
 665     U8                              ConfigNum;          /* 0x03 */
 666     U32                             Flags;              /* 0x04 */
 667     MPI2_EVENT_IR_CONFIG_ELEMENT    ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];    /* 0x08 */
 668 } MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 669   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 670   Mpi2EventDataIrConfigChangeList_t,
 671   MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
 672
 673 /* IR Configuration Change List Event data Flags values */
 674 #define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG   (0x00000001)
 675
 676
 677 /* SAS Discovery Event data */
 678
 679 typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
 680 {
 681     U8                      Flags;                      /* 0x00 */
 682     U8                      ReasonCode;                 /* 0x01 */
 683     U8                      PhysicalPort;               /* 0x02 */
 684     U8                      Reserved1;                  /* 0x03 */
 685     U32                     DiscoveryStatus;            /* 0x04 */
 686 } MPI2_EVENT_DATA_SAS_DISCOVERY,
 687   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
 688   Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
 689
 690 /* SAS Discovery Event data Flags values */
 691 #define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE                   (0x02)
 692 #define MPI2_EVENT_SAS_DISC_IN_PROGRESS                     (0x01)
 693
 694 /* SAS Discovery Event data ReasonCode values */
 695 #define MPI2_EVENT_SAS_DISC_RC_STARTED                      (0x01)
 696 #define MPI2_EVENT_SAS_DISC_RC_COMPLETED                    (0x02)
 697
 698 /* SAS Discovery Event data DiscoveryStatus values */
 699 #define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED            (0x80000000)
 700 #define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED             (0x40000000)
 701 #define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED               (0x20000000)
 702 #define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED             (0x10000000)
 703 #define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR             (0x08000000)
 704 #define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE    (0x00008000)
 705 #define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE            (0x00004000)
 706 #define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN                (0x00002000)
 707 #define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK        (0x00001000)
 708 #define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE               (0x00000800)
 709 #define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK                       (0x00000400)
 710 #define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK                 (0x00000200)
 711 #define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR                    (0x00000100)
 712 #define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED              (0x00000080)
 713 #define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST                  (0x00000040)
 714 #define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES                (0x00000020)
 715 #define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT                      (0x00000010)
 716 #define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS                   (0x00000004)
 717 #define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE             (0x00000002)
 718 #define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED                    (0x00000001)
 719
 720
 721 /* SAS Broadcast Primitive Event data */
 722
 723 typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 724 {
 725     U8                      PhyNum;                     /* 0x00 */
 726     U8                      Port;                       /* 0x01 */
 727     U8                      PortWidth;                  /* 0x02 */
 728     U8                      Primitive;                  /* 0x03 */
 729 } MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 730   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 731   Mpi2EventDataSasBroadcastPrimitive_t,
 732   MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
 733
 734 /* defines for the Primitive field */
 735 #define MPI2_EVENT_PRIMITIVE_CHANGE                         (0x01)
 736 #define MPI2_EVENT_PRIMITIVE_SES                            (0x02)
 737 #define MPI2_EVENT_PRIMITIVE_EXPANDER                       (0x03)
 738 #define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT             (0x04)
 739 #define MPI2_EVENT_PRIMITIVE_RESERVED3                      (0x05)
 740 #define MPI2_EVENT_PRIMITIVE_RESERVED4                      (0x06)
 741 #define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED               (0x07)
 742 #define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED               (0x08)
 743
 744
 745 /* SAS Initiator Device Status Change Event data */
 746
 747 typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 748 {
 749     U8                      ReasonCode;                 /* 0x00 */
 750     U8                      PhysicalPort;               /* 0x01 */
 751     U16                     DevHandle;                  /* 0x02 */
 752     U64                     SASAddress;                 /* 0x04 */
 753 } MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 754   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 755   Mpi2EventDataSasInitDevStatusChange_t,
 756   MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
 757
 758 /* SAS Initiator Device Status Change event ReasonCode values */
 759 #define MPI2_EVENT_SAS_INIT_RC_ADDED                (0x01)
 760 #define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING       (0x02)
 761
 762
 763 /* SAS Initiator Device Table Overflow Event data */
 764
 765 typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 766 {
 767     U16                     MaxInit;                    /* 0x00 */
 768     U16                     CurrentInit;                /* 0x02 */
 769     U64                     SASAddress;                 /* 0x04 */
 770 } MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 771   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 772   Mpi2EventDataSasInitTableOverflow_t,
 773   MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
 774
 775
 776 /* SAS Topology Change List Event data */
 777
 778 /*
 779  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 780  * one and check NumEntries at runtime.
 781  */
 782 #ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
 783 #define MPI2_EVENT_SAS_TOPO_PHY_COUNT           (1)
 784 #endif
 785
 786 typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
 787 {
 788     U16                     AttachedDevHandle;          /* 0x00 */
 789     U8                      LinkRate;                   /* 0x02 */
 790     U8                      PhyStatus;                  /* 0x03 */
 791 } MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
 792   Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
 793
 794 typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
 795 {
 796     U16                             EnclosureHandle;            /* 0x00 */
 797     U16                             ExpanderDevHandle;          /* 0x02 */
 798     U8                              NumPhys;                    /* 0x04 */
 799     U8                              Reserved1;                  /* 0x05 */
 800     U16                             Reserved2;                  /* 0x06 */
 801     U8                              NumEntries;                 /* 0x08 */
 802     U8                              StartPhyNum;                /* 0x09 */
 803     U8                              ExpStatus;                  /* 0x0A */
 804     U8                              PhysicalPort;               /* 0x0B */
 805     MPI2_EVENT_SAS_TOPO_PHY_ENTRY   PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
 806 } MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 807   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 808   Mpi2EventDataSasTopologyChangeList_t,
 809   MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
 810
 811 /* values for the ExpStatus field */
 812 #define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER                  (0x00)
 813 #define MPI2_EVENT_SAS_TOPO_ES_ADDED                        (0x01)
 814 #define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING               (0x02)
 815 #define MPI2_EVENT_SAS_TOPO_ES_RESPONDING                   (0x03)
 816 #define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING         (0x04)
 817
 818 /* defines for the LinkRate field */
 819 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK                 (0xF0)
 820 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT                (4)
 821 #define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK                    (0x0F)
 822 #define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT                   (0)
 823
 824 #define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE            (0x00)
 825 #define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED                 (0x01)
 826 #define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED           (0x02)
 827 #define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE            (0x03)
 828 #define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR                (0x04)
 829 #define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS        (0x05)
 830 #define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5                     (0x08)
 831 #define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0                     (0x09)
 832 #define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0                     (0x0A)
 833
 834 /* values for the PhyStatus field */
 835 #define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT                (0x80)
 836 #define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE             (0x10)
 837 /* values for the PhyStatus ReasonCode sub-field */
 838 #define MPI2_EVENT_SAS_TOPO_RC_MASK                         (0x0F)
 839 #define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED                   (0x01)
 840 #define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING          (0x02)
 841 #define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED                  (0x03)
 842 #define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE                    (0x04)
 843 #define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING         (0x05)
 844
 845
 846 /* SAS Enclosure Device Status Change Event data */
 847
 848 typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
 849 {
 850     U16                     EnclosureHandle;            /* 0x00 */
 851     U8                      ReasonCode;                 /* 0x02 */
 852     U8                      PhysicalPort;               /* 0x03 */
 853     U64                     EnclosureLogicalID;         /* 0x04 */
 854     U16                     NumSlots;                   /* 0x0C */
 855     U16                     StartSlot;                  /* 0x0E */
 856     U32                     PhyBits;                    /* 0x10 */
 857 } MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 858   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 859   Mpi2EventDataSasEnclDevStatusChange_t,
 860   MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
 861
 862 /* SAS Enclosure Device Status Change event ReasonCode values */
 863 #define MPI2_EVENT_SAS_ENCL_RC_ADDED                (0x01)
 864 #define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING       (0x02)
 865
 866
 867 /* SAS PHY Counter Event data */
 868
 869 typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
 870     U64         TimeStamp;          /* 0x00 */
 871     U32         Reserved1;          /* 0x08 */
 872     U8          PhyEventCode;       /* 0x0C */
 873     U8          PhyNum;             /* 0x0D */
 874     U16         Reserved2;          /* 0x0E */
 875     U32         PhyEventInfo;       /* 0x10 */
 876     U8          CounterType;        /* 0x14 */
 877     U8          ThresholdWindow;    /* 0x15 */
 878     U8          TimeUnits;          /* 0x16 */
 879     U8          Reserved3;          /* 0x17 */
 880     U32         EventThreshold;     /* 0x18 */
 881     U16         ThresholdFlags;     /* 0x1C */
 882     U16         Reserved4;          /* 0x1E */
 883 } MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 884   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 885   Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t;
 886
 887 /* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the
 888  * PhyEventCode field
 889  * use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the
 890  * CounterType field
 891  * use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the
 892  * TimeUnits field
 893  * use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the
 894  * ThresholdFlags field
 895  * */
 896
 897
 898 /* Host Based Discovery Phy Event data */
 899
 900 typedef struct _MPI2_EVENT_HBD_PHY_SAS {
 901     U8          Flags;                      /* 0x00 */
 902     U8          NegotiatedLinkRate;         /* 0x01 */
 903     U8          PhyNum;                     /* 0x02 */
 904     U8          PhysicalPort;               /* 0x03 */
 905     U32         Reserved1;                  /* 0x04 */
 906     U8          InitialFrame[28];           /* 0x08 */
 907 } MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
 908   Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
 909
 910 /* values for the Flags field */
 911 #define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID        (0x02)
 912 #define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME         (0x01)
 913
 914 /* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for
 915  * the NegotiatedLinkRate field */
 916
 917 typedef union _MPI2_EVENT_HBD_DESCRIPTOR {
 918     MPI2_EVENT_HBD_PHY_SAS      Sas;
 919 } MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
 920   Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
 921
 922 typedef struct _MPI2_EVENT_DATA_HBD_PHY {
 923     U8                          DescriptorType;     /* 0x00 */
 924     U8                          Reserved1;          /* 0x01 */
 925     U16                         Reserved2;          /* 0x02 */
 926     U32                         Reserved3;          /* 0x04 */
 927     MPI2_EVENT_HBD_DESCRIPTOR   Descriptor;         /* 0x08 */
 928 } MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
 929   Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
 930
 931 /* values for the DescriptorType field */
 932 #define MPI2_EVENT_HBD_DT_SAS               (0x01)
 933
 934
 935
 936 /****************************************************************************
 937 *  EventAck message
 938 ****************************************************************************/
 939
 940 /* EventAck Request message */
 941 typedef struct _MPI2_EVENT_ACK_REQUEST
 942 {
 943     U16                     Reserved1;                      /* 0x00 */
 944     U8                      ChainOffset;                    /* 0x02 */
 945     U8                      Function;                       /* 0x03 */
 946     U16                     Reserved2;                      /* 0x04 */
 947     U8                      Reserved3;                      /* 0x06 */
 948     U8                      MsgFlags;                       /* 0x07 */
 949     U8                      VP_ID;                          /* 0x08 */
 950     U8                      VF_ID;                          /* 0x09 */
 951     U16                     Reserved4;                      /* 0x0A */
 952     U16                     Event;                          /* 0x0C */
 953     U16                     Reserved5;                      /* 0x0E */
 954     U32                     EventContext;                   /* 0x10 */
 955 } MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
 956   Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
 957
 958
 959 /* EventAck Reply message */
 960 typedef struct _MPI2_EVENT_ACK_REPLY
 961 {
 962     U16                     Reserved1;                      /* 0x00 */
 963     U8                      MsgLength;                      /* 0x02 */
 964     U8                      Function;                       /* 0x03 */
 965     U16                     Reserved2;                      /* 0x04 */
 966     U8                      Reserved3;                      /* 0x06 */
 967     U8                      MsgFlags;                       /* 0x07 */
 968     U8                      VP_ID;                          /* 0x08 */
 969     U8                      VF_ID;                          /* 0x09 */
 970     U16                     Reserved4;                      /* 0x0A */
 971     U16                     Reserved5;                      /* 0x0C */
 972     U16                     IOCStatus;                      /* 0x0E */
 973     U32                     IOCLogInfo;                     /* 0x10 */
 974 } MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
 975   Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
 976
 977
 978 /****************************************************************************
 979 *  FWDownload message
 980 ****************************************************************************/
 981
 982 /* FWDownload Request message */
 983 typedef struct _MPI2_FW_DOWNLOAD_REQUEST
 984 {
 985     U8                      ImageType;                  /* 0x00 */
 986     U8                      Reserved1;                  /* 0x01 */
 987     U8                      ChainOffset;                /* 0x02 */
 988     U8                      Function;                   /* 0x03 */
 989     U16                     Reserved2;                  /* 0x04 */
 990     U8                      Reserved3;                  /* 0x06 */
 991     U8                      MsgFlags;                   /* 0x07 */
 992     U8                      VP_ID;                      /* 0x08 */
 993     U8                      VF_ID;                      /* 0x09 */
 994     U16                     Reserved4;                  /* 0x0A */
 995     U32                     TotalImageSize;             /* 0x0C */
 996     U32                     Reserved5;                  /* 0x10 */
 997     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
 998 } MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
 999   Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
1000
1001 #define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT   (0x01)
1002
1003 #define MPI2_FW_DOWNLOAD_ITYPE_FW                   (0x01)
1004 #define MPI2_FW_DOWNLOAD_ITYPE_BIOS                 (0x02)
1005 #define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING        (0x06)
1006 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1             (0x07)
1007 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2             (0x08)
1008 #define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID             (0x09)
1009 #define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK    (0x0B)
1010
1011 /* FWDownload TransactionContext Element */
1012 typedef struct _MPI2_FW_DOWNLOAD_TCSGE
1013 {
1014     U8                      Reserved1;                  /* 0x00 */
1015     U8                      ContextSize;                /* 0x01 */
1016     U8                      DetailsLength;              /* 0x02 */
1017     U8                      Flags;                      /* 0x03 */
1018     U32                     Reserved2;                  /* 0x04 */
1019     U32                     ImageOffset;                /* 0x08 */
1020     U32                     ImageSize;                  /* 0x0C */
1021 } MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
1022   Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
1023
1024 /* FWDownload Reply message */
1025 typedef struct _MPI2_FW_DOWNLOAD_REPLY
1026 {
1027     U8                      ImageType;                  /* 0x00 */
1028     U8                      Reserved1;                  /* 0x01 */
1029     U8                      MsgLength;                  /* 0x02 */
1030     U8                      Function;                   /* 0x03 */
1031     U16                     Reserved2;                  /* 0x04 */
1032     U8                      Reserved3;                  /* 0x06 */
1033     U8                      MsgFlags;                   /* 0x07 */
1034     U8                      VP_ID;                      /* 0x08 */
1035     U8                      VF_ID;                      /* 0x09 */
1036     U16                     Reserved4;                  /* 0x0A */
1037     U16                     Reserved5;                  /* 0x0C */
1038     U16                     IOCStatus;                  /* 0x0E */
1039     U32                     IOCLogInfo;                 /* 0x10 */
1040 } MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
1041   Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
1042
1043
1044 /****************************************************************************
1045 *  FWUpload message
1046 ****************************************************************************/
1047
1048 /* FWUpload Request message */
1049 typedef struct _MPI2_FW_UPLOAD_REQUEST
1050 {
1051     U8                      ImageType;                  /* 0x00 */
1052     U8                      Reserved1;                  /* 0x01 */
1053     U8                      ChainOffset;                /* 0x02 */
1054     U8                      Function;                   /* 0x03 */
1055     U16                     Reserved2;                  /* 0x04 */
1056     U8                      Reserved3;                  /* 0x06 */
1057     U8                      MsgFlags;                   /* 0x07 */
1058     U8                      VP_ID;                      /* 0x08 */
1059     U8                      VF_ID;                      /* 0x09 */
1060     U16                     Reserved4;                  /* 0x0A */
1061     U32                     Reserved5;                  /* 0x0C */
1062     U32                     Reserved6;                  /* 0x10 */
1063     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1064 } MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
1065   Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
1066
1067 #define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT         (0x00)
1068 #define MPI2_FW_UPLOAD_ITYPE_FW_FLASH           (0x01)
1069 #define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH         (0x02)
1070 #define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP          (0x05)
1071 #define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING      (0x06)
1072 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_1           (0x07)
1073 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_2           (0x08)
1074 #define MPI2_FW_UPLOAD_ITYPE_MEGARAID           (0x09)
1075 #define MPI2_FW_UPLOAD_ITYPE_COMPLETE           (0x0A)
1076 #define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK  (0x0B)
1077
1078 typedef struct _MPI2_FW_UPLOAD_TCSGE
1079 {
1080     U8                      Reserved1;                  /* 0x00 */
1081     U8                      ContextSize;                /* 0x01 */
1082     U8                      DetailsLength;              /* 0x02 */
1083     U8                      Flags;                      /* 0x03 */
1084     U32                     Reserved2;                  /* 0x04 */
1085     U32                     ImageOffset;                /* 0x08 */
1086     U32                     ImageSize;                  /* 0x0C */
1087 } MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
1088   Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
1089
1090 /* FWUpload Reply message */
1091 typedef struct _MPI2_FW_UPLOAD_REPLY
1092 {
1093     U8                      ImageType;                  /* 0x00 */
1094     U8                      Reserved1;                  /* 0x01 */
1095     U8                      MsgLength;                  /* 0x02 */
1096     U8                      Function;                   /* 0x03 */
1097     U16                     Reserved2;                  /* 0x04 */
1098     U8                      Reserved3;                  /* 0x06 */
1099     U8                      MsgFlags;                   /* 0x07 */
1100     U8                      VP_ID;                      /* 0x08 */
1101     U8                      VF_ID;                      /* 0x09 */
1102     U16                     Reserved4;                  /* 0x0A */
1103     U16                     Reserved5;                  /* 0x0C */
1104     U16                     IOCStatus;                  /* 0x0E */
1105     U32                     IOCLogInfo;                 /* 0x10 */
1106     U32                     ActualImageSize;            /* 0x14 */
1107 } MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
1108   Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
1109
1110
1111 /* FW Image Header */
1112 typedef struct _MPI2_FW_IMAGE_HEADER
1113 {
1114     U32                     Signature;                  /* 0x00 */
1115     U32                     Signature0;                 /* 0x04 */
1116     U32                     Signature1;                 /* 0x08 */
1117     U32                     Signature2;                 /* 0x0C */
1118     MPI2_VERSION_UNION      MPIVersion;                 /* 0x10 */
1119     MPI2_VERSION_UNION      FWVersion;                  /* 0x14 */
1120     MPI2_VERSION_UNION      NVDATAVersion;              /* 0x18 */
1121     MPI2_VERSION_UNION      PackageVersion;             /* 0x1C */
1122     U16                     VendorID;                   /* 0x20 */
1123     U16                     ProductID;                  /* 0x22 */
1124     U16                     ProtocolFlags;              /* 0x24 */
1125     U16                     Reserved26;                 /* 0x26 */
1126     U32                     IOCCapabilities;            /* 0x28 */
1127     U32                     ImageSize;                  /* 0x2C */
1128     U32                     NextImageHeaderOffset;      /* 0x30 */
1129     U32                     Checksum;                   /* 0x34 */
1130     U32                     Reserved38;                 /* 0x38 */
1131     U32                     Reserved3C;                 /* 0x3C */
1132     U32                     Reserved40;                 /* 0x40 */
1133     U32                     Reserved44;                 /* 0x44 */
1134     U32                     Reserved48;                 /* 0x48 */
1135     U32                     Reserved4C;                 /* 0x4C */
1136     U32                     Reserved50;                 /* 0x50 */
1137     U32                     Reserved54;                 /* 0x54 */
1138     U32                     Reserved58;                 /* 0x58 */
1139     U32                     Reserved5C;                 /* 0x5C */
1140     U32                     Reserved60;                 /* 0x60 */
1141     U32                     FirmwareVersionNameWhat;    /* 0x64 */
1142     U8                      FirmwareVersionName[32];    /* 0x68 */
1143     U32                     VendorNameWhat;             /* 0x88 */
1144     U8                      VendorName[32];             /* 0x8C */
1145     U32                     PackageNameWhat;            /* 0x88 */
1146     U8                      PackageName[32];            /* 0x8C */
1147     U32                     ReservedD0;                 /* 0xD0 */
1148     U32                     ReservedD4;                 /* 0xD4 */
1149     U32                     ReservedD8;                 /* 0xD8 */
1150     U32                     ReservedDC;                 /* 0xDC */
1151     U32                     ReservedE0;                 /* 0xE0 */
1152     U32                     ReservedE4;                 /* 0xE4 */
1153     U32                     ReservedE8;                 /* 0xE8 */
1154     U32                     ReservedEC;                 /* 0xEC */
1155     U32                     ReservedF0;                 /* 0xF0 */
1156     U32                     ReservedF4;                 /* 0xF4 */
1157     U32                     ReservedF8;                 /* 0xF8 */
1158     U32                     ReservedFC;                 /* 0xFC */
1159 } MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
1160   Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
1161
1162 /* Signature field */
1163 #define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
1164 #define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
1165 #define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
1166
1167 /* Signature0 field */
1168 #define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
1169 #define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
1170
1171 /* Signature1 field */
1172 #define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
1173 #define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
1174
1175 /* Signature2 field */
1176 #define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
1177 #define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
1178
1179
1180 /* defines for using the ProductID field */
1181 #define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
1182 #define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
1183
1184 #define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
1185 #define MPI2_FW_HEADER_PID_PROD_A                       (0x0000)
1186 #define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
1187 #define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI   (0x0200)
1188 #define MPI2_FW_HEADER_PID_PROD_IR_SCSI                 (0x0700)
1189
1190
1191 #define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
1192 /* SAS */
1193 #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0013)
1194 #define MPI2_FW_HEADER_PID_FAMILY_2208_SAS      (0x0014)
1195
1196 /* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1197
1198 /* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1199
1200
1201 #define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
1202 #define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
1203 #define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
1204
1205 #define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
1206
1207 #define MPI2_FW_HEADER_SIZE                     (0x100)
1208
1209
1210 /* Extended Image Header */
1211 typedef struct _MPI2_EXT_IMAGE_HEADER
1212
1213 {
1214     U8                      ImageType;                  /* 0x00 */
1215     U8                      Reserved1;                  /* 0x01 */
1216     U16                     Reserved2;                  /* 0x02 */
1217     U32                     Checksum;                   /* 0x04 */
1218     U32                     ImageSize;                  /* 0x08 */
1219     U32                     NextImageHeaderOffset;      /* 0x0C */
1220     U32                     PackageVersion;             /* 0x10 */
1221     U32                     Reserved3;                  /* 0x14 */
1222     U32                     Reserved4;                  /* 0x18 */
1223     U32                     Reserved5;                  /* 0x1C */
1224     U8                      IdentifyString[32];         /* 0x20 */
1225 } MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
1226   Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
1227
1228 /* useful offsets */
1229 #define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
1230 #define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
1231 #define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
1232
1233 #define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
1234
1235 /* defines for the ImageType field */
1236 #define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED         (0x00)
1237 #define MPI2_EXT_IMAGE_TYPE_FW                  (0x01)
1238 #define MPI2_EXT_IMAGE_TYPE_NVDATA              (0x03)
1239 #define MPI2_EXT_IMAGE_TYPE_BOOTLOADER          (0x04)
1240 #define MPI2_EXT_IMAGE_TYPE_INITIALIZATION      (0x05)
1241 #define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT        (0x06)
1242 #define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES   (0x07)
1243 #define MPI2_EXT_IMAGE_TYPE_MEGARAID            (0x08)
1244
1245 #define MPI2_EXT_IMAGE_TYPE_MAX                 (MPI2_EXT_IMAGE_TYPE_MEGARAID)
1246
1247
1248
1249 /* FLASH Layout Extended Image Data */
1250
1251 /*
1252  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1253  * one and check RegionsPerLayout at runtime.
1254  */
1255 #ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1256 #define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
1257 #endif
1258
1259 /*
1260  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1261  * one and check NumberOfLayouts at runtime.
1262  */
1263 #ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1264 #define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
1265 #endif
1266
1267 typedef struct _MPI2_FLASH_REGION
1268 {
1269     U8                      RegionType;                 /* 0x00 */
1270     U8                      Reserved1;                  /* 0x01 */
1271     U16                     Reserved2;                  /* 0x02 */
1272     U32                     RegionOffset;               /* 0x04 */
1273     U32                     RegionSize;                 /* 0x08 */
1274     U32                     Reserved3;                  /* 0x0C */
1275 } MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
1276   Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
1277
1278 typedef struct _MPI2_FLASH_LAYOUT
1279 {
1280     U32                     FlashSize;                  /* 0x00 */
1281     U32                     Reserved1;                  /* 0x04 */
1282     U32                     Reserved2;                  /* 0x08 */
1283     U32                     Reserved3;                  /* 0x0C */
1284     MPI2_FLASH_REGION       Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
1285 } MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
1286   Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
1287
1288 typedef struct _MPI2_FLASH_LAYOUT_DATA
1289 {
1290     U8                      ImageRevision;              /* 0x00 */
1291     U8                      Reserved1;                  /* 0x01 */
1292     U8                      SizeOfRegion;               /* 0x02 */
1293     U8                      Reserved2;                  /* 0x03 */
1294     U16                     NumberOfLayouts;            /* 0x04 */
1295     U16                     RegionsPerLayout;           /* 0x06 */
1296     U16                     MinimumSectorAlignment;     /* 0x08 */
1297     U16                     Reserved3;                  /* 0x0A */
1298     U32                     Reserved4;                  /* 0x0C */
1299     MPI2_FLASH_LAYOUT       Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
1300 } MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
1301   Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
1302
1303 /* defines for the RegionType field */
1304 #define MPI2_FLASH_REGION_UNUSED                (0x00)
1305 #define MPI2_FLASH_REGION_FIRMWARE              (0x01)
1306 #define MPI2_FLASH_REGION_BIOS                  (0x02)
1307 #define MPI2_FLASH_REGION_NVDATA                (0x03)
1308 #define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
1309 #define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
1310 #define MPI2_FLASH_REGION_CONFIG_1              (0x07)
1311 #define MPI2_FLASH_REGION_CONFIG_2              (0x08)
1312 #define MPI2_FLASH_REGION_MEGARAID              (0x09)
1313 #define MPI2_FLASH_REGION_INIT                  (0x0A)
1314
1315 /* ImageRevision */
1316 #define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
1317
1318
1319
1320 /* Supported Devices Extended Image Data */
1321
1322 /*
1323  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1324  * one and check NumberOfDevices at runtime.
1325  */
1326 #ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1327 #define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
1328 #endif
1329
1330 typedef struct _MPI2_SUPPORTED_DEVICE
1331 {
1332     U16                     DeviceID;                   /* 0x00 */
1333     U16                     VendorID;                   /* 0x02 */
1334     U16                     DeviceIDMask;               /* 0x04 */
1335     U16                     Reserved1;                  /* 0x06 */
1336     U8                      LowPCIRev;                  /* 0x08 */
1337     U8                      HighPCIRev;                 /* 0x09 */
1338     U16                     Reserved2;                  /* 0x0A */
1339     U32                     Reserved3;                  /* 0x0C */
1340 } MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
1341   Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
1342
1343 typedef struct _MPI2_SUPPORTED_DEVICES_DATA
1344 {
1345     U8                      ImageRevision;              /* 0x00 */
1346     U8                      Reserved1;                  /* 0x01 */
1347     U8                      NumberOfDevices;            /* 0x02 */
1348     U8                      Reserved2;                  /* 0x03 */
1349     U32                     Reserved3;                  /* 0x04 */
1350     MPI2_SUPPORTED_DEVICE   SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
1351 } MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
1352   Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
1353
1354 /* ImageRevision */
1355 #define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
1356
1357
1358 /* Init Extended Image Data */
1359
1360 typedef struct _MPI2_INIT_IMAGE_FOOTER
1361
1362 {
1363     U32                     BootFlags;                  /* 0x00 */
1364     U32                     ImageSize;                  /* 0x04 */
1365     U32                     Signature0;                 /* 0x08 */
1366     U32                     Signature1;                 /* 0x0C */
1367     U32                     Signature2;                 /* 0x10 */
1368     U32                     ResetVector;                /* 0x14 */
1369 } MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
1370   Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
1371
1372 /* defines for the BootFlags field */
1373 #define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
1374
1375 /* defines for the ImageSize field */
1376 #define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
1377
1378 /* defines for the Signature0 field */
1379 #define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
1380 #define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
1381
1382 /* defines for the Signature1 field */
1383 #define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
1384 #define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
1385
1386 /* defines for the Signature2 field */
1387 #define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
1388 #define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
1389
1390 /* Signature fields as individual bytes */
1391 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
1392 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
1393 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
1394 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
1395
1396 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
1397 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
1398 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
1399 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
1400
1401 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
1402 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
1403 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
1404 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
1405
1406 /* defines for the ResetVector field */
1407 #define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
1408
1409
1410 #endif
1411