2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
77 static void ata_pio_error(struct ata_port *ap);
79 static unsigned int ata_unique_id = 1;
80 static struct workqueue_struct *ata_wq;
82 int atapi_enabled = 0;
83 module_param(atapi_enabled, int, 0444);
84 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
86 MODULE_AUTHOR("Jeff Garzik");
87 MODULE_DESCRIPTION("Library module for ATA devices");
88 MODULE_LICENSE("GPL");
89 MODULE_VERSION(DRV_VERSION);
92 * ata_tf_load_pio - send taskfile registers to host controller
93 * @ap: Port to which output is sent
94 * @tf: ATA taskfile register set
96 * Outputs ATA taskfile to standard ATA host controller.
99 * Inherited from caller.
102 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
104 struct ata_ioports *ioaddr = &ap->ioaddr;
105 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
107 if (tf->ctl != ap->last_ctl) {
108 outb(tf->ctl, ioaddr->ctl_addr);
109 ap->last_ctl = tf->ctl;
113 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
114 outb(tf->hob_feature, ioaddr->feature_addr);
115 outb(tf->hob_nsect, ioaddr->nsect_addr);
116 outb(tf->hob_lbal, ioaddr->lbal_addr);
117 outb(tf->hob_lbam, ioaddr->lbam_addr);
118 outb(tf->hob_lbah, ioaddr->lbah_addr);
119 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
128 outb(tf->feature, ioaddr->feature_addr);
129 outb(tf->nsect, ioaddr->nsect_addr);
130 outb(tf->lbal, ioaddr->lbal_addr);
131 outb(tf->lbam, ioaddr->lbam_addr);
132 outb(tf->lbah, ioaddr->lbah_addr);
133 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
141 if (tf->flags & ATA_TFLAG_DEVICE) {
142 outb(tf->device, ioaddr->device_addr);
143 VPRINTK("device 0x%X\n", tf->device);
150 * ata_tf_load_mmio - send taskfile registers to host controller
151 * @ap: Port to which output is sent
152 * @tf: ATA taskfile register set
154 * Outputs ATA taskfile to standard ATA host controller using MMIO.
157 * Inherited from caller.
160 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
162 struct ata_ioports *ioaddr = &ap->ioaddr;
163 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
165 if (tf->ctl != ap->last_ctl) {
166 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
167 ap->last_ctl = tf->ctl;
171 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
172 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
173 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
174 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
175 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
176 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
177 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
186 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
187 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
188 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
189 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
190 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
191 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
199 if (tf->flags & ATA_TFLAG_DEVICE) {
200 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
201 VPRINTK("device 0x%X\n", tf->device);
209 * ata_tf_load - send taskfile registers to host controller
210 * @ap: Port to which output is sent
211 * @tf: ATA taskfile register set
213 * Outputs ATA taskfile to standard ATA host controller using MMIO
214 * or PIO as indicated by the ATA_FLAG_MMIO flag.
215 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
216 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
217 * hob_lbal, hob_lbam, and hob_lbah.
219 * This function waits for idle (!BUSY and !DRQ) after writing
220 * registers. If the control register has a new value, this
221 * function also waits for idle after writing control and before
222 * writing the remaining registers.
224 * May be used as the tf_load() entry in ata_port_operations.
227 * Inherited from caller.
229 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
231 if (ap->flags & ATA_FLAG_MMIO)
232 ata_tf_load_mmio(ap, tf);
234 ata_tf_load_pio(ap, tf);
238 * ata_exec_command_pio - issue ATA command to host controller
239 * @ap: port to which command is being issued
240 * @tf: ATA taskfile register set
242 * Issues PIO write to ATA command register, with proper
243 * synchronization with interrupt handler / other threads.
246 * spin_lock_irqsave(host_set lock)
249 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
251 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
253 outb(tf->command, ap->ioaddr.command_addr);
259 * ata_exec_command_mmio - issue ATA command to host controller
260 * @ap: port to which command is being issued
261 * @tf: ATA taskfile register set
263 * Issues MMIO write to ATA command register, with proper
264 * synchronization with interrupt handler / other threads.
267 * spin_lock_irqsave(host_set lock)
270 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
272 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
274 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
280 * ata_exec_command - issue ATA command to host controller
281 * @ap: port to which command is being issued
282 * @tf: ATA taskfile register set
284 * Issues PIO/MMIO write to ATA command register, with proper
285 * synchronization with interrupt handler / other threads.
288 * spin_lock_irqsave(host_set lock)
290 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
292 if (ap->flags & ATA_FLAG_MMIO)
293 ata_exec_command_mmio(ap, tf);
295 ata_exec_command_pio(ap, tf);
299 * ata_tf_to_host - issue ATA taskfile to host controller
300 * @ap: port to which command is being issued
301 * @tf: ATA taskfile register set
303 * Issues ATA taskfile register set to ATA host controller,
304 * with proper synchronization with interrupt handler and
308 * spin_lock_irqsave(host_set lock)
311 static inline void ata_tf_to_host(struct ata_port *ap,
312 const struct ata_taskfile *tf)
314 ap->ops->tf_load(ap, tf);
315 ap->ops->exec_command(ap, tf);
319 * ata_tf_read_pio - input device's ATA taskfile shadow registers
320 * @ap: Port from which input is read
321 * @tf: ATA taskfile register set for storing input
323 * Reads ATA taskfile registers for currently-selected device
327 * Inherited from caller.
330 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
332 struct ata_ioports *ioaddr = &ap->ioaddr;
334 tf->command = ata_check_status(ap);
335 tf->feature = inb(ioaddr->error_addr);
336 tf->nsect = inb(ioaddr->nsect_addr);
337 tf->lbal = inb(ioaddr->lbal_addr);
338 tf->lbam = inb(ioaddr->lbam_addr);
339 tf->lbah = inb(ioaddr->lbah_addr);
340 tf->device = inb(ioaddr->device_addr);
342 if (tf->flags & ATA_TFLAG_LBA48) {
343 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
344 tf->hob_feature = inb(ioaddr->error_addr);
345 tf->hob_nsect = inb(ioaddr->nsect_addr);
346 tf->hob_lbal = inb(ioaddr->lbal_addr);
347 tf->hob_lbam = inb(ioaddr->lbam_addr);
348 tf->hob_lbah = inb(ioaddr->lbah_addr);
353 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
354 * @ap: Port from which input is read
355 * @tf: ATA taskfile register set for storing input
357 * Reads ATA taskfile registers for currently-selected device
361 * Inherited from caller.
364 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
366 struct ata_ioports *ioaddr = &ap->ioaddr;
368 tf->command = ata_check_status(ap);
369 tf->feature = readb((void __iomem *)ioaddr->error_addr);
370 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
371 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
372 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
373 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
374 tf->device = readb((void __iomem *)ioaddr->device_addr);
376 if (tf->flags & ATA_TFLAG_LBA48) {
377 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
378 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
379 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
380 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
381 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
382 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
388 * ata_tf_read - input device's ATA taskfile shadow registers
389 * @ap: Port from which input is read
390 * @tf: ATA taskfile register set for storing input
392 * Reads ATA taskfile registers for currently-selected device
395 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
396 * is set, also reads the hob registers.
398 * May be used as the tf_read() entry in ata_port_operations.
401 * Inherited from caller.
403 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
405 if (ap->flags & ATA_FLAG_MMIO)
406 ata_tf_read_mmio(ap, tf);
408 ata_tf_read_pio(ap, tf);
412 * ata_check_status_pio - Read device status reg & clear interrupt
413 * @ap: port where the device is
415 * Reads ATA taskfile status register for currently-selected device
416 * and return its value. This also clears pending interrupts
420 * Inherited from caller.
422 static u8 ata_check_status_pio(struct ata_port *ap)
424 return inb(ap->ioaddr.status_addr);
428 * ata_check_status_mmio - Read device status reg & clear interrupt
429 * @ap: port where the device is
431 * Reads ATA taskfile status register for currently-selected device
432 * via MMIO and return its value. This also clears pending interrupts
436 * Inherited from caller.
438 static u8 ata_check_status_mmio(struct ata_port *ap)
440 return readb((void __iomem *) ap->ioaddr.status_addr);
445 * ata_check_status - Read device status reg & clear interrupt
446 * @ap: port where the device is
448 * Reads ATA taskfile status register for currently-selected device
449 * and return its value. This also clears pending interrupts
452 * May be used as the check_status() entry in ata_port_operations.
455 * Inherited from caller.
457 u8 ata_check_status(struct ata_port *ap)
459 if (ap->flags & ATA_FLAG_MMIO)
460 return ata_check_status_mmio(ap);
461 return ata_check_status_pio(ap);
466 * ata_altstatus - Read device alternate status reg
467 * @ap: port where the device is
469 * Reads ATA taskfile alternate status register for
470 * currently-selected device and return its value.
472 * Note: may NOT be used as the check_altstatus() entry in
473 * ata_port_operations.
476 * Inherited from caller.
478 u8 ata_altstatus(struct ata_port *ap)
480 if (ap->ops->check_altstatus)
481 return ap->ops->check_altstatus(ap);
483 if (ap->flags & ATA_FLAG_MMIO)
484 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
485 return inb(ap->ioaddr.altstatus_addr);
490 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
491 * @tf: Taskfile to convert
492 * @fis: Buffer into which data will output
493 * @pmp: Port multiplier port
495 * Converts a standard ATA taskfile to a Serial ATA
496 * FIS structure (Register - Host to Device).
499 * Inherited from caller.
502 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
504 fis[0] = 0x27; /* Register - Host to Device FIS */
505 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
506 bit 7 indicates Command FIS */
507 fis[2] = tf->command;
508 fis[3] = tf->feature;
515 fis[8] = tf->hob_lbal;
516 fis[9] = tf->hob_lbam;
517 fis[10] = tf->hob_lbah;
518 fis[11] = tf->hob_feature;
521 fis[13] = tf->hob_nsect;
532 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
533 * @fis: Buffer from which data will be input
534 * @tf: Taskfile to output
536 * Converts a standard ATA taskfile to a Serial ATA
537 * FIS structure (Register - Host to Device).
540 * Inherited from caller.
543 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
545 tf->command = fis[2]; /* status */
546 tf->feature = fis[3]; /* error */
553 tf->hob_lbal = fis[8];
554 tf->hob_lbam = fis[9];
555 tf->hob_lbah = fis[10];
558 tf->hob_nsect = fis[13];
561 static const u8 ata_rw_cmds[] = {
565 ATA_CMD_READ_MULTI_EXT,
566 ATA_CMD_WRITE_MULTI_EXT,
570 ATA_CMD_PIO_READ_EXT,
571 ATA_CMD_PIO_WRITE_EXT,
580 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
581 * @qc: command to examine and configure
583 * Examine the device configuration and tf->flags to calculate
584 * the proper read/write commands and protocol to use.
589 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
591 struct ata_taskfile *tf = &qc->tf;
592 struct ata_device *dev = qc->dev;
594 int index, lba48, write;
596 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
597 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
599 if (dev->flags & ATA_DFLAG_PIO) {
600 tf->protocol = ATA_PROT_PIO;
601 index = dev->multi_count ? 0 : 4;
603 tf->protocol = ATA_PROT_DMA;
607 tf->command = ata_rw_cmds[index + lba48 + write];
610 static const char * xfer_mode_str[] = {
630 * ata_udma_string - convert UDMA bit offset to string
631 * @mask: mask of bits supported; only highest bit counts.
633 * Determine string which represents the highest speed
634 * (highest bit in @udma_mask).
640 * Constant C string representing highest speed listed in
641 * @udma_mask, or the constant C string "<n/a>".
644 static const char *ata_mode_string(unsigned int mask)
648 for (i = 7; i >= 0; i--)
651 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
654 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
661 return xfer_mode_str[i];
665 * ata_pio_devchk - PATA device presence detection
666 * @ap: ATA channel to examine
667 * @device: Device to examine (starting at zero)
669 * This technique was originally described in
670 * Hale Landis's ATADRVR (www.ata-atapi.com), and
671 * later found its way into the ATA/ATAPI spec.
673 * Write a pattern to the ATA shadow registers,
674 * and if a device is present, it will respond by
675 * correctly storing and echoing back the
676 * ATA shadow register contents.
682 static unsigned int ata_pio_devchk(struct ata_port *ap,
685 struct ata_ioports *ioaddr = &ap->ioaddr;
688 ap->ops->dev_select(ap, device);
690 outb(0x55, ioaddr->nsect_addr);
691 outb(0xaa, ioaddr->lbal_addr);
693 outb(0xaa, ioaddr->nsect_addr);
694 outb(0x55, ioaddr->lbal_addr);
696 outb(0x55, ioaddr->nsect_addr);
697 outb(0xaa, ioaddr->lbal_addr);
699 nsect = inb(ioaddr->nsect_addr);
700 lbal = inb(ioaddr->lbal_addr);
702 if ((nsect == 0x55) && (lbal == 0xaa))
703 return 1; /* we found a device */
705 return 0; /* nothing found */
709 * ata_mmio_devchk - PATA device presence detection
710 * @ap: ATA channel to examine
711 * @device: Device to examine (starting at zero)
713 * This technique was originally described in
714 * Hale Landis's ATADRVR (www.ata-atapi.com), and
715 * later found its way into the ATA/ATAPI spec.
717 * Write a pattern to the ATA shadow registers,
718 * and if a device is present, it will respond by
719 * correctly storing and echoing back the
720 * ATA shadow register contents.
726 static unsigned int ata_mmio_devchk(struct ata_port *ap,
729 struct ata_ioports *ioaddr = &ap->ioaddr;
732 ap->ops->dev_select(ap, device);
734 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
735 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
737 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
738 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
740 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
741 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
743 nsect = readb((void __iomem *) ioaddr->nsect_addr);
744 lbal = readb((void __iomem *) ioaddr->lbal_addr);
746 if ((nsect == 0x55) && (lbal == 0xaa))
747 return 1; /* we found a device */
749 return 0; /* nothing found */
753 * ata_devchk - PATA device presence detection
754 * @ap: ATA channel to examine
755 * @device: Device to examine (starting at zero)
757 * Dispatch ATA device presence detection, depending
758 * on whether we are using PIO or MMIO to talk to the
759 * ATA shadow registers.
765 static unsigned int ata_devchk(struct ata_port *ap,
768 if (ap->flags & ATA_FLAG_MMIO)
769 return ata_mmio_devchk(ap, device);
770 return ata_pio_devchk(ap, device);
774 * ata_dev_classify - determine device type based on ATA-spec signature
775 * @tf: ATA taskfile register set for device to be identified
777 * Determine from taskfile register contents whether a device is
778 * ATA or ATAPI, as per "Signature and persistence" section
779 * of ATA/PI spec (volume 1, sect 5.14).
785 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
786 * the event of failure.
789 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
791 /* Apple's open source Darwin code hints that some devices only
792 * put a proper signature into the LBA mid/high registers,
793 * So, we only check those. It's sufficient for uniqueness.
796 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
797 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
798 DPRINTK("found ATA device by sig\n");
802 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
803 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
804 DPRINTK("found ATAPI device by sig\n");
805 return ATA_DEV_ATAPI;
808 DPRINTK("unknown device\n");
809 return ATA_DEV_UNKNOWN;
813 * ata_dev_try_classify - Parse returned ATA device signature
814 * @ap: ATA channel to examine
815 * @device: Device to examine (starting at zero)
817 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
818 * an ATA/ATAPI-defined set of values is placed in the ATA
819 * shadow registers, indicating the results of device detection
822 * Select the ATA device, and read the values from the ATA shadow
823 * registers. Then parse according to the Error register value,
824 * and the spec-defined values examined by ata_dev_classify().
830 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
832 struct ata_device *dev = &ap->device[device];
833 struct ata_taskfile tf;
837 ap->ops->dev_select(ap, device);
839 memset(&tf, 0, sizeof(tf));
841 ap->ops->tf_read(ap, &tf);
844 dev->class = ATA_DEV_NONE;
846 /* see if device passed diags */
849 else if ((device == 0) && (err == 0x81))
854 /* determine if device if ATA or ATAPI */
855 class = ata_dev_classify(&tf);
856 if (class == ATA_DEV_UNKNOWN)
858 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
867 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
868 * @id: IDENTIFY DEVICE results we will examine
869 * @s: string into which data is output
870 * @ofs: offset into identify device page
871 * @len: length of string to return. must be an even number.
873 * The strings in the IDENTIFY DEVICE page are broken up into
874 * 16-bit chunks. Run through the string, and output each
875 * 8-bit chunk linearly, regardless of platform.
881 void ata_dev_id_string(const u16 *id, unsigned char *s,
882 unsigned int ofs, unsigned int len)
902 * ata_noop_dev_select - Select device 0/1 on ATA bus
903 * @ap: ATA channel to manipulate
904 * @device: ATA device (numbered from zero) to select
906 * This function performs no actual function.
908 * May be used as the dev_select() entry in ata_port_operations.
913 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
919 * ata_std_dev_select - Select device 0/1 on ATA bus
920 * @ap: ATA channel to manipulate
921 * @device: ATA device (numbered from zero) to select
923 * Use the method defined in the ATA specification to
924 * make either device 0, or device 1, active on the
925 * ATA channel. Works with both PIO and MMIO.
927 * May be used as the dev_select() entry in ata_port_operations.
933 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
938 tmp = ATA_DEVICE_OBS;
940 tmp = ATA_DEVICE_OBS | ATA_DEV1;
942 if (ap->flags & ATA_FLAG_MMIO) {
943 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
945 outb(tmp, ap->ioaddr.device_addr);
947 ata_pause(ap); /* needed; also flushes, for mmio */
951 * ata_dev_select - Select device 0/1 on ATA bus
952 * @ap: ATA channel to manipulate
953 * @device: ATA device (numbered from zero) to select
954 * @wait: non-zero to wait for Status register BSY bit to clear
955 * @can_sleep: non-zero if context allows sleeping
957 * Use the method defined in the ATA specification to
958 * make either device 0, or device 1, active on the
961 * This is a high-level version of ata_std_dev_select(),
962 * which additionally provides the services of inserting
963 * the proper pauses and status polling, where needed.
969 void ata_dev_select(struct ata_port *ap, unsigned int device,
970 unsigned int wait, unsigned int can_sleep)
972 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
973 ap->id, device, wait);
978 ap->ops->dev_select(ap, device);
981 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
988 * ata_dump_id - IDENTIFY DEVICE info debugging output
989 * @dev: Device whose IDENTIFY DEVICE page we will dump
991 * Dump selected 16-bit words from a detected device's
992 * IDENTIFY PAGE page.
998 static inline void ata_dump_id(const struct ata_device *dev)
1000 DPRINTK("49==0x%04x "
1010 DPRINTK("80==0x%04x "
1020 DPRINTK("88==0x%04x "
1027 * Compute the PIO modes available for this device. This is not as
1028 * trivial as it seems if we must consider early devices correctly.
1030 * FIXME: pre IDE drive timing (do we care ?).
1033 static unsigned int ata_pio_modes(const struct ata_device *adev)
1037 /* Usual case. Word 53 indicates word 88 is valid */
1038 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1039 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1045 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1046 for the maximum. Turn it into a mask and return it */
1047 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1052 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1053 * @ap: port on which device we wish to probe resides
1054 * @device: device bus address, starting at zero
1056 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1057 * command, and read back the 512-byte device information page.
1058 * The device information page is fed to us via the standard
1059 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1060 * using standard PIO-IN paths)
1062 * After reading the device information page, we use several
1063 * bits of information from it to initialize data structures
1064 * that will be used during the lifetime of the ata_device.
1065 * Other data from the info page is used to disqualify certain
1066 * older ATA devices we do not wish to support.
1069 * Inherited from caller. Some functions called by this function
1070 * obtain the host_set lock.
1073 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1075 struct ata_device *dev = &ap->device[device];
1076 unsigned int major_version;
1078 unsigned long xfer_modes;
1079 unsigned int using_edd;
1080 DECLARE_COMPLETION(wait);
1081 struct ata_queued_cmd *qc;
1082 unsigned long flags;
1085 if (!ata_dev_present(dev)) {
1086 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1091 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1096 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1098 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1099 dev->class == ATA_DEV_NONE);
1101 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1103 qc = ata_qc_new_init(ap, dev);
1106 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1107 qc->dma_dir = DMA_FROM_DEVICE;
1108 qc->tf.protocol = ATA_PROT_PIO;
1112 if (dev->class == ATA_DEV_ATA) {
1113 qc->tf.command = ATA_CMD_ID_ATA;
1114 DPRINTK("do ATA identify\n");
1116 qc->tf.command = ATA_CMD_ID_ATAPI;
1117 DPRINTK("do ATAPI identify\n");
1120 qc->waiting = &wait;
1121 qc->complete_fn = ata_qc_complete_noop;
1123 spin_lock_irqsave(&ap->host_set->lock, flags);
1124 rc = ata_qc_issue(qc);
1125 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1130 wait_for_completion(&wait);
1132 spin_lock_irqsave(&ap->host_set->lock, flags);
1133 ap->ops->tf_read(ap, &qc->tf);
1134 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1136 if (qc->tf.command & ATA_ERR) {
1138 * arg! EDD works for all test cases, but seems to return
1139 * the ATA signature for some ATAPI devices. Until the
1140 * reason for this is found and fixed, we fix up the mess
1141 * here. If IDENTIFY DEVICE returns command aborted
1142 * (as ATAPI devices do), then we issue an
1143 * IDENTIFY PACKET DEVICE.
1145 * ATA software reset (SRST, the default) does not appear
1146 * to have this problem.
1148 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1149 u8 err = qc->tf.feature;
1150 if (err & ATA_ABORTED) {
1151 dev->class = ATA_DEV_ATAPI;
1162 swap_buf_le16(dev->id, ATA_ID_WORDS);
1164 /* print device capabilities */
1165 printk(KERN_DEBUG "ata%u: dev %u cfg "
1166 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1167 ap->id, device, dev->id[49],
1168 dev->id[82], dev->id[83], dev->id[84],
1169 dev->id[85], dev->id[86], dev->id[87],
1173 * common ATA, ATAPI feature tests
1176 /* we require DMA support (bits 8 of word 49) */
1177 if (!ata_id_has_dma(dev->id)) {
1178 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1182 /* quick-n-dirty find max transfer mode; for printk only */
1183 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1185 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1187 xfer_modes = ata_pio_modes(dev);
1191 /* ATA-specific feature tests */
1192 if (dev->class == ATA_DEV_ATA) {
1193 if (!ata_id_is_ata(dev->id)) /* sanity check */
1196 /* get major version */
1197 tmp = dev->id[ATA_ID_MAJOR_VER];
1198 for (major_version = 14; major_version >= 1; major_version--)
1199 if (tmp & (1 << major_version))
1203 * The exact sequence expected by certain pre-ATA4 drives is:
1206 * INITIALIZE DEVICE PARAMETERS
1208 * Some drives were very specific about that exact sequence.
1210 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1211 ata_dev_init_params(ap, dev);
1213 /* current CHS translation info (id[53-58]) might be
1214 * changed. reread the identify device info.
1216 ata_dev_reread_id(ap, dev);
1219 if (ata_id_has_lba(dev->id)) {
1220 dev->flags |= ATA_DFLAG_LBA;
1222 if (ata_id_has_lba48(dev->id)) {
1223 dev->flags |= ATA_DFLAG_LBA48;
1224 dev->n_sectors = ata_id_u64(dev->id, 100);
1226 dev->n_sectors = ata_id_u32(dev->id, 60);
1229 /* print device info to dmesg */
1230 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1233 ata_mode_string(xfer_modes),
1234 (unsigned long long)dev->n_sectors,
1235 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1239 /* Default translation */
1240 dev->cylinders = dev->id[1];
1241 dev->heads = dev->id[3];
1242 dev->sectors = dev->id[6];
1243 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1245 if (ata_id_current_chs_valid(dev->id)) {
1246 /* Current CHS translation is valid. */
1247 dev->cylinders = dev->id[54];
1248 dev->heads = dev->id[55];
1249 dev->sectors = dev->id[56];
1251 dev->n_sectors = ata_id_u32(dev->id, 57);
1254 /* print device info to dmesg */
1255 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1258 ata_mode_string(xfer_modes),
1259 (unsigned long long)dev->n_sectors,
1260 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1264 if (dev->id[59] & 0x100) {
1265 dev->multi_count = dev->id[59] & 0xff;
1266 DPRINTK("ata%u: dev %u multi count %u\n",
1267 ap->id, device, dev->multi_count);
1270 ap->host->max_cmd_len = 16;
1273 /* ATAPI-specific feature tests */
1275 if (ata_id_is_ata(dev->id)) /* sanity check */
1278 rc = atapi_cdb_len(dev->id);
1279 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1280 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1283 ap->cdb_len = (unsigned int) rc;
1284 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1286 if (ata_id_cdb_intr(dev->id))
1287 dev->flags |= ATA_DFLAG_CDB_INTR;
1289 /* print device info to dmesg */
1290 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1292 ata_mode_string(xfer_modes));
1295 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1299 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1302 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1303 DPRINTK("EXIT, err\n");
1307 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1309 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1313 * ata_dev_config - Run device specific handlers and check for
1314 * SATA->PATA bridges
1321 void ata_dev_config(struct ata_port *ap, unsigned int i)
1323 /* limit bridge transfers to udma5, 200 sectors */
1324 if (ata_dev_knobble(ap)) {
1325 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1326 ap->id, ap->device->devno);
1327 ap->udma_mask &= ATA_UDMA5;
1328 ap->host->max_sectors = ATA_MAX_SECTORS;
1329 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1330 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1333 if (ap->ops->dev_config)
1334 ap->ops->dev_config(ap, &ap->device[i]);
1338 * ata_bus_probe - Reset and probe ATA bus
1341 * Master ATA bus probing function. Initiates a hardware-dependent
1342 * bus reset, then attempts to identify any devices found on
1346 * PCI/etc. bus probe sem.
1349 * Zero on success, non-zero on error.
1352 static int ata_bus_probe(struct ata_port *ap)
1354 unsigned int i, found = 0;
1356 ap->ops->phy_reset(ap);
1357 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1360 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1361 ata_dev_identify(ap, i);
1362 if (ata_dev_present(&ap->device[i])) {
1364 ata_dev_config(ap,i);
1368 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1369 goto err_out_disable;
1372 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1373 goto err_out_disable;
1378 ap->ops->port_disable(ap);
1384 * ata_port_probe - Mark port as enabled
1385 * @ap: Port for which we indicate enablement
1387 * Modify @ap data structure such that the system
1388 * thinks that the entire port is enabled.
1390 * LOCKING: host_set lock, or some other form of
1394 void ata_port_probe(struct ata_port *ap)
1396 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1400 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1401 * @ap: SATA port associated with target SATA PHY.
1403 * This function issues commands to standard SATA Sxxx
1404 * PHY registers, to wake up the phy (and device), and
1405 * clear any reset condition.
1408 * PCI/etc. bus probe sem.
1411 void __sata_phy_reset(struct ata_port *ap)
1414 unsigned long timeout = jiffies + (HZ * 5);
1416 if (ap->flags & ATA_FLAG_SATA_RESET) {
1417 /* issue phy wake/reset */
1418 scr_write_flush(ap, SCR_CONTROL, 0x301);
1419 /* Couldn't find anything in SATA I/II specs, but
1420 * AHCI-1.1 10.4.2 says at least 1 ms. */
1423 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1425 /* wait for phy to become ready, if necessary */
1428 sstatus = scr_read(ap, SCR_STATUS);
1429 if ((sstatus & 0xf) != 1)
1431 } while (time_before(jiffies, timeout));
1433 /* TODO: phy layer with polling, timeouts, etc. */
1434 if (sata_dev_present(ap))
1437 sstatus = scr_read(ap, SCR_STATUS);
1438 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1440 ata_port_disable(ap);
1443 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1446 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1447 ata_port_disable(ap);
1451 ap->cbl = ATA_CBL_SATA;
1455 * sata_phy_reset - Reset SATA bus.
1456 * @ap: SATA port associated with target SATA PHY.
1458 * This function resets the SATA bus, and then probes
1459 * the bus for devices.
1462 * PCI/etc. bus probe sem.
1465 void sata_phy_reset(struct ata_port *ap)
1467 __sata_phy_reset(ap);
1468 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1474 * ata_port_disable - Disable port.
1475 * @ap: Port to be disabled.
1477 * Modify @ap data structure such that the system
1478 * thinks that the entire port is disabled, and should
1479 * never attempt to probe or communicate with devices
1482 * LOCKING: host_set lock, or some other form of
1486 void ata_port_disable(struct ata_port *ap)
1488 ap->device[0].class = ATA_DEV_NONE;
1489 ap->device[1].class = ATA_DEV_NONE;
1490 ap->flags |= ATA_FLAG_PORT_DISABLED;
1494 * This mode timing computation functionality is ported over from
1495 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1498 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1499 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1500 * for PIO 5, which is a nonstandard extension and UDMA6, which
1501 * is currently supported only by Maxtor drives.
1504 static const struct ata_timing ata_timing[] = {
1506 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1507 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1508 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1509 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1511 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1512 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1513 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1515 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1517 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1518 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1519 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1521 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1522 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1523 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1525 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1526 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1527 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1529 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1530 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1531 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1533 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1538 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1539 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1541 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1543 q->setup = EZ(t->setup * 1000, T);
1544 q->act8b = EZ(t->act8b * 1000, T);
1545 q->rec8b = EZ(t->rec8b * 1000, T);
1546 q->cyc8b = EZ(t->cyc8b * 1000, T);
1547 q->active = EZ(t->active * 1000, T);
1548 q->recover = EZ(t->recover * 1000, T);
1549 q->cycle = EZ(t->cycle * 1000, T);
1550 q->udma = EZ(t->udma * 1000, UT);
1553 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1554 struct ata_timing *m, unsigned int what)
1556 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1557 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1558 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1559 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1560 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1561 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1562 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1563 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1566 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1568 const struct ata_timing *t;
1570 for (t = ata_timing; t->mode != speed; t++)
1571 if (t->mode == 0xFF)
1576 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1577 struct ata_timing *t, int T, int UT)
1579 const struct ata_timing *s;
1580 struct ata_timing p;
1586 if (!(s = ata_timing_find_mode(speed)))
1590 * If the drive is an EIDE drive, it can tell us it needs extended
1591 * PIO/MW_DMA cycle timing.
1594 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1595 memset(&p, 0, sizeof(p));
1596 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1597 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1598 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1599 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1600 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1602 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1606 * Convert the timing to bus clock counts.
1609 ata_timing_quantize(s, t, T, UT);
1612 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1613 * and some other commands. We have to ensure that the DMA cycle timing is
1614 * slower/equal than the fastest PIO timing.
1617 if (speed > XFER_PIO_4) {
1618 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1619 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1623 * Lenghten active & recovery time so that cycle time is correct.
1626 if (t->act8b + t->rec8b < t->cyc8b) {
1627 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1628 t->rec8b = t->cyc8b - t->act8b;
1631 if (t->active + t->recover < t->cycle) {
1632 t->active += (t->cycle - (t->active + t->recover)) / 2;
1633 t->recover = t->cycle - t->active;
1639 static const struct {
1642 } xfer_mode_classes[] = {
1643 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1644 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1645 { ATA_SHIFT_PIO, XFER_PIO_0 },
1648 static inline u8 base_from_shift(unsigned int shift)
1652 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1653 if (xfer_mode_classes[i].shift == shift)
1654 return xfer_mode_classes[i].base;
1659 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1664 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1667 if (dev->xfer_shift == ATA_SHIFT_PIO)
1668 dev->flags |= ATA_DFLAG_PIO;
1670 ata_dev_set_xfermode(ap, dev);
1672 base = base_from_shift(dev->xfer_shift);
1673 ofs = dev->xfer_mode - base;
1674 idx = ofs + dev->xfer_shift;
1675 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1677 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1678 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1680 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1681 ap->id, dev->devno, xfer_mode_str[idx]);
1684 static int ata_host_set_pio(struct ata_port *ap)
1690 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1693 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1697 base = base_from_shift(ATA_SHIFT_PIO);
1698 xfer_mode = base + x;
1700 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1701 (int)base, (int)xfer_mode, mask, x);
1703 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1704 struct ata_device *dev = &ap->device[i];
1705 if (ata_dev_present(dev)) {
1706 dev->pio_mode = xfer_mode;
1707 dev->xfer_mode = xfer_mode;
1708 dev->xfer_shift = ATA_SHIFT_PIO;
1709 if (ap->ops->set_piomode)
1710 ap->ops->set_piomode(ap, dev);
1717 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1718 unsigned int xfer_shift)
1722 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1723 struct ata_device *dev = &ap->device[i];
1724 if (ata_dev_present(dev)) {
1725 dev->dma_mode = xfer_mode;
1726 dev->xfer_mode = xfer_mode;
1727 dev->xfer_shift = xfer_shift;
1728 if (ap->ops->set_dmamode)
1729 ap->ops->set_dmamode(ap, dev);
1735 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1736 * @ap: port on which timings will be programmed
1738 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1741 * PCI/etc. bus probe sem.
1744 static void ata_set_mode(struct ata_port *ap)
1746 unsigned int xfer_shift;
1750 /* step 1: always set host PIO timings */
1751 rc = ata_host_set_pio(ap);
1755 /* step 2: choose the best data xfer mode */
1756 xfer_mode = xfer_shift = 0;
1757 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1761 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1762 if (xfer_shift != ATA_SHIFT_PIO)
1763 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1765 /* step 4: update devices' xfer mode */
1766 ata_dev_set_mode(ap, &ap->device[0]);
1767 ata_dev_set_mode(ap, &ap->device[1]);
1769 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1772 if (ap->ops->post_set_mode)
1773 ap->ops->post_set_mode(ap);
1778 ata_port_disable(ap);
1782 * ata_busy_sleep - sleep until BSY clears, or timeout
1783 * @ap: port containing status register to be polled
1784 * @tmout_pat: impatience timeout
1785 * @tmout: overall timeout
1787 * Sleep until ATA Status register bit BSY clears,
1788 * or a timeout occurs.
1794 static unsigned int ata_busy_sleep (struct ata_port *ap,
1795 unsigned long tmout_pat,
1796 unsigned long tmout)
1798 unsigned long timer_start, timeout;
1801 status = ata_busy_wait(ap, ATA_BUSY, 300);
1802 timer_start = jiffies;
1803 timeout = timer_start + tmout_pat;
1804 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1806 status = ata_busy_wait(ap, ATA_BUSY, 3);
1809 if (status & ATA_BUSY)
1810 printk(KERN_WARNING "ata%u is slow to respond, "
1811 "please be patient\n", ap->id);
1813 timeout = timer_start + tmout;
1814 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1816 status = ata_chk_status(ap);
1819 if (status & ATA_BUSY) {
1820 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1821 ap->id, tmout / HZ);
1828 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1830 struct ata_ioports *ioaddr = &ap->ioaddr;
1831 unsigned int dev0 = devmask & (1 << 0);
1832 unsigned int dev1 = devmask & (1 << 1);
1833 unsigned long timeout;
1835 /* if device 0 was found in ata_devchk, wait for its
1839 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1841 /* if device 1 was found in ata_devchk, wait for
1842 * register access, then wait for BSY to clear
1844 timeout = jiffies + ATA_TMOUT_BOOT;
1848 ap->ops->dev_select(ap, 1);
1849 if (ap->flags & ATA_FLAG_MMIO) {
1850 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1851 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1853 nsect = inb(ioaddr->nsect_addr);
1854 lbal = inb(ioaddr->lbal_addr);
1856 if ((nsect == 1) && (lbal == 1))
1858 if (time_after(jiffies, timeout)) {
1862 msleep(50); /* give drive a breather */
1865 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1867 /* is all this really necessary? */
1868 ap->ops->dev_select(ap, 0);
1870 ap->ops->dev_select(ap, 1);
1872 ap->ops->dev_select(ap, 0);
1876 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1877 * @ap: Port to reset and probe
1879 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1880 * probe the bus. Not often used these days.
1883 * PCI/etc. bus probe sem.
1884 * Obtains host_set lock.
1888 static unsigned int ata_bus_edd(struct ata_port *ap)
1890 struct ata_taskfile tf;
1891 unsigned long flags;
1893 /* set up execute-device-diag (bus reset) taskfile */
1894 /* also, take interrupts to a known state (disabled) */
1895 DPRINTK("execute-device-diag\n");
1896 ata_tf_init(ap, &tf, 0);
1898 tf.command = ATA_CMD_EDD;
1899 tf.protocol = ATA_PROT_NODATA;
1902 spin_lock_irqsave(&ap->host_set->lock, flags);
1903 ata_tf_to_host(ap, &tf);
1904 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1906 /* spec says at least 2ms. but who knows with those
1907 * crazy ATAPI devices...
1911 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1914 static unsigned int ata_bus_softreset(struct ata_port *ap,
1915 unsigned int devmask)
1917 struct ata_ioports *ioaddr = &ap->ioaddr;
1919 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1921 /* software reset. causes dev0 to be selected */
1922 if (ap->flags & ATA_FLAG_MMIO) {
1923 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1924 udelay(20); /* FIXME: flush */
1925 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1926 udelay(20); /* FIXME: flush */
1927 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1929 outb(ap->ctl, ioaddr->ctl_addr);
1931 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1933 outb(ap->ctl, ioaddr->ctl_addr);
1936 /* spec mandates ">= 2ms" before checking status.
1937 * We wait 150ms, because that was the magic delay used for
1938 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1939 * between when the ATA command register is written, and then
1940 * status is checked. Because waiting for "a while" before
1941 * checking status is fine, post SRST, we perform this magic
1942 * delay here as well.
1946 ata_bus_post_reset(ap, devmask);
1952 * ata_bus_reset - reset host port and associated ATA channel
1953 * @ap: port to reset
1955 * This is typically the first time we actually start issuing
1956 * commands to the ATA channel. We wait for BSY to clear, then
1957 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1958 * result. Determine what devices, if any, are on the channel
1959 * by looking at the device 0/1 error register. Look at the signature
1960 * stored in each device's taskfile registers, to determine if
1961 * the device is ATA or ATAPI.
1964 * PCI/etc. bus probe sem.
1965 * Obtains host_set lock.
1968 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1971 void ata_bus_reset(struct ata_port *ap)
1973 struct ata_ioports *ioaddr = &ap->ioaddr;
1974 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1976 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1978 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1980 /* determine if device 0/1 are present */
1981 if (ap->flags & ATA_FLAG_SATA_RESET)
1984 dev0 = ata_devchk(ap, 0);
1986 dev1 = ata_devchk(ap, 1);
1990 devmask |= (1 << 0);
1992 devmask |= (1 << 1);
1994 /* select device 0 again */
1995 ap->ops->dev_select(ap, 0);
1997 /* issue bus reset */
1998 if (ap->flags & ATA_FLAG_SRST)
1999 rc = ata_bus_softreset(ap, devmask);
2000 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2001 /* set up device control */
2002 if (ap->flags & ATA_FLAG_MMIO)
2003 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2005 outb(ap->ctl, ioaddr->ctl_addr);
2006 rc = ata_bus_edd(ap);
2013 * determine by signature whether we have ATA or ATAPI devices
2015 err = ata_dev_try_classify(ap, 0);
2016 if ((slave_possible) && (err != 0x81))
2017 ata_dev_try_classify(ap, 1);
2019 /* re-enable interrupts */
2020 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2023 /* is double-select really necessary? */
2024 if (ap->device[1].class != ATA_DEV_NONE)
2025 ap->ops->dev_select(ap, 1);
2026 if (ap->device[0].class != ATA_DEV_NONE)
2027 ap->ops->dev_select(ap, 0);
2029 /* if no devices were detected, disable this port */
2030 if ((ap->device[0].class == ATA_DEV_NONE) &&
2031 (ap->device[1].class == ATA_DEV_NONE))
2034 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2035 /* set up device control for ATA_FLAG_SATA_RESET */
2036 if (ap->flags & ATA_FLAG_MMIO)
2037 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2039 outb(ap->ctl, ioaddr->ctl_addr);
2046 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2047 ap->ops->port_disable(ap);
2052 static void ata_pr_blacklisted(const struct ata_port *ap,
2053 const struct ata_device *dev)
2055 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2056 ap->id, dev->devno);
2059 static const char * ata_dma_blacklist [] = {
2078 "Toshiba CD-ROM XM-6202B",
2079 "TOSHIBA CD-ROM XM-1702BC",
2081 "E-IDE CD-ROM CR-840",
2084 "SAMSUNG CD-ROM SC-148C",
2085 "SAMSUNG CD-ROM SC",
2087 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2091 static int ata_dma_blacklisted(const struct ata_device *dev)
2093 unsigned char model_num[40];
2098 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2101 len = strnlen(s, sizeof(model_num));
2103 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2104 while ((len > 0) && (s[len - 1] == ' ')) {
2109 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2110 if (!strncmp(ata_dma_blacklist[i], s, len))
2116 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2118 const struct ata_device *master, *slave;
2121 master = &ap->device[0];
2122 slave = &ap->device[1];
2124 assert (ata_dev_present(master) || ata_dev_present(slave));
2126 if (shift == ATA_SHIFT_UDMA) {
2127 mask = ap->udma_mask;
2128 if (ata_dev_present(master)) {
2129 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2130 if (ata_dma_blacklisted(master)) {
2132 ata_pr_blacklisted(ap, master);
2135 if (ata_dev_present(slave)) {
2136 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2137 if (ata_dma_blacklisted(slave)) {
2139 ata_pr_blacklisted(ap, slave);
2143 else if (shift == ATA_SHIFT_MWDMA) {
2144 mask = ap->mwdma_mask;
2145 if (ata_dev_present(master)) {
2146 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2147 if (ata_dma_blacklisted(master)) {
2149 ata_pr_blacklisted(ap, master);
2152 if (ata_dev_present(slave)) {
2153 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2154 if (ata_dma_blacklisted(slave)) {
2156 ata_pr_blacklisted(ap, slave);
2160 else if (shift == ATA_SHIFT_PIO) {
2161 mask = ap->pio_mask;
2162 if (ata_dev_present(master)) {
2163 /* spec doesn't return explicit support for
2164 * PIO0-2, so we fake it
2166 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2171 if (ata_dev_present(slave)) {
2172 /* spec doesn't return explicit support for
2173 * PIO0-2, so we fake it
2175 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2182 mask = 0xffffffff; /* shut up compiler warning */
2189 /* find greatest bit */
2190 static int fgb(u32 bitmap)
2195 for (i = 0; i < 32; i++)
2196 if (bitmap & (1 << i))
2203 * ata_choose_xfer_mode - attempt to find best transfer mode
2204 * @ap: Port for which an xfer mode will be selected
2205 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2206 * @xfer_shift_out: (output) bit shift that selects this mode
2208 * Based on host and device capabilities, determine the
2209 * maximum transfer mode that is amenable to all.
2212 * PCI/etc. bus probe sem.
2215 * Zero on success, negative on error.
2218 static int ata_choose_xfer_mode(const struct ata_port *ap,
2220 unsigned int *xfer_shift_out)
2222 unsigned int mask, shift;
2225 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2226 shift = xfer_mode_classes[i].shift;
2227 mask = ata_get_mode_mask(ap, shift);
2231 *xfer_mode_out = xfer_mode_classes[i].base + x;
2232 *xfer_shift_out = shift;
2241 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2242 * @ap: Port associated with device @dev
2243 * @dev: Device to which command will be sent
2245 * Issue SET FEATURES - XFER MODE command to device @dev
2249 * PCI/etc. bus probe sem.
2252 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2254 DECLARE_COMPLETION(wait);
2255 struct ata_queued_cmd *qc;
2257 unsigned long flags;
2259 /* set up set-features taskfile */
2260 DPRINTK("set features - xfer mode\n");
2262 qc = ata_qc_new_init(ap, dev);
2265 qc->tf.command = ATA_CMD_SET_FEATURES;
2266 qc->tf.feature = SETFEATURES_XFER;
2267 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2268 qc->tf.protocol = ATA_PROT_NODATA;
2269 qc->tf.nsect = dev->xfer_mode;
2271 qc->waiting = &wait;
2272 qc->complete_fn = ata_qc_complete_noop;
2274 spin_lock_irqsave(&ap->host_set->lock, flags);
2275 rc = ata_qc_issue(qc);
2276 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2279 ata_port_disable(ap);
2281 wait_for_completion(&wait);
2287 * ata_dev_reread_id - Reread the device identify device info
2288 * @ap: port where the device is
2289 * @dev: device to reread the identify device info
2294 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2296 DECLARE_COMPLETION(wait);
2297 struct ata_queued_cmd *qc;
2298 unsigned long flags;
2301 qc = ata_qc_new_init(ap, dev);
2304 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2305 qc->dma_dir = DMA_FROM_DEVICE;
2307 if (dev->class == ATA_DEV_ATA) {
2308 qc->tf.command = ATA_CMD_ID_ATA;
2309 DPRINTK("do ATA identify\n");
2311 qc->tf.command = ATA_CMD_ID_ATAPI;
2312 DPRINTK("do ATAPI identify\n");
2315 qc->tf.flags |= ATA_TFLAG_DEVICE;
2316 qc->tf.protocol = ATA_PROT_PIO;
2319 qc->waiting = &wait;
2320 qc->complete_fn = ata_qc_complete_noop;
2322 spin_lock_irqsave(&ap->host_set->lock, flags);
2323 rc = ata_qc_issue(qc);
2324 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2329 wait_for_completion(&wait);
2331 swap_buf_le16(dev->id, ATA_ID_WORDS);
2339 ata_port_disable(ap);
2343 * ata_dev_init_params - Issue INIT DEV PARAMS command
2344 * @ap: Port associated with device @dev
2345 * @dev: Device to which command will be sent
2350 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2352 DECLARE_COMPLETION(wait);
2353 struct ata_queued_cmd *qc;
2355 unsigned long flags;
2356 u16 sectors = dev->id[6];
2357 u16 heads = dev->id[3];
2359 /* Number of sectors per track 1-255. Number of heads 1-16 */
2360 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2363 /* set up init dev params taskfile */
2364 DPRINTK("init dev params \n");
2366 qc = ata_qc_new_init(ap, dev);
2369 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2370 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2371 qc->tf.protocol = ATA_PROT_NODATA;
2372 qc->tf.nsect = sectors;
2373 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2375 qc->waiting = &wait;
2376 qc->complete_fn = ata_qc_complete_noop;
2378 spin_lock_irqsave(&ap->host_set->lock, flags);
2379 rc = ata_qc_issue(qc);
2380 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2383 ata_port_disable(ap);
2385 wait_for_completion(&wait);
2391 * ata_sg_clean - Unmap DMA memory associated with command
2392 * @qc: Command containing DMA memory to be released
2394 * Unmap all mapped DMA memory associated with this command.
2397 * spin_lock_irqsave(host_set lock)
2400 static void ata_sg_clean(struct ata_queued_cmd *qc)
2402 struct ata_port *ap = qc->ap;
2403 struct scatterlist *sg = qc->__sg;
2404 int dir = qc->dma_dir;
2405 void *pad_buf = NULL;
2407 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2410 if (qc->flags & ATA_QCFLAG_SINGLE)
2411 assert(qc->n_elem == 1);
2413 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2415 /* if we padded the buffer out to 32-bit bound, and data
2416 * xfer direction is from-device, we must copy from the
2417 * pad buffer back into the supplied buffer
2419 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2420 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2422 if (qc->flags & ATA_QCFLAG_SG) {
2423 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2424 /* restore last sg */
2425 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2427 struct scatterlist *psg = &qc->pad_sgent;
2428 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2429 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2430 kunmap_atomic(psg->page, KM_IRQ0);
2433 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2434 sg_dma_len(&sg[0]), dir);
2436 sg->length += qc->pad_len;
2438 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2439 pad_buf, qc->pad_len);
2442 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2447 * ata_fill_sg - Fill PCI IDE PRD table
2448 * @qc: Metadata associated with taskfile to be transferred
2450 * Fill PCI IDE PRD (scatter-gather) table with segments
2451 * associated with the current disk command.
2454 * spin_lock_irqsave(host_set lock)
2457 static void ata_fill_sg(struct ata_queued_cmd *qc)
2459 struct ata_port *ap = qc->ap;
2460 struct scatterlist *sg;
2463 assert(qc->__sg != NULL);
2464 assert(qc->n_elem > 0);
2467 ata_for_each_sg(sg, qc) {
2471 /* determine if physical DMA addr spans 64K boundary.
2472 * Note h/w doesn't support 64-bit, so we unconditionally
2473 * truncate dma_addr_t to u32.
2475 addr = (u32) sg_dma_address(sg);
2476 sg_len = sg_dma_len(sg);
2479 offset = addr & 0xffff;
2481 if ((offset + sg_len) > 0x10000)
2482 len = 0x10000 - offset;
2484 ap->prd[idx].addr = cpu_to_le32(addr);
2485 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2486 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2495 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2498 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2499 * @qc: Metadata associated with taskfile to check
2501 * Allow low-level driver to filter ATA PACKET commands, returning
2502 * a status indicating whether or not it is OK to use DMA for the
2503 * supplied PACKET command.
2506 * spin_lock_irqsave(host_set lock)
2508 * RETURNS: 0 when ATAPI DMA can be used
2511 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2513 struct ata_port *ap = qc->ap;
2514 int rc = 0; /* Assume ATAPI DMA is OK by default */
2516 if (ap->ops->check_atapi_dma)
2517 rc = ap->ops->check_atapi_dma(qc);
2522 * ata_qc_prep - Prepare taskfile for submission
2523 * @qc: Metadata associated with taskfile to be prepared
2525 * Prepare ATA taskfile for submission.
2528 * spin_lock_irqsave(host_set lock)
2530 void ata_qc_prep(struct ata_queued_cmd *qc)
2532 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2539 * ata_sg_init_one - Associate command with memory buffer
2540 * @qc: Command to be associated
2541 * @buf: Memory buffer
2542 * @buflen: Length of memory buffer, in bytes.
2544 * Initialize the data-related elements of queued_cmd @qc
2545 * to point to a single memory buffer, @buf of byte length @buflen.
2548 * spin_lock_irqsave(host_set lock)
2551 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2553 struct scatterlist *sg;
2555 qc->flags |= ATA_QCFLAG_SINGLE;
2557 memset(&qc->sgent, 0, sizeof(qc->sgent));
2558 qc->__sg = &qc->sgent;
2560 qc->orig_n_elem = 1;
2564 sg_init_one(sg, buf, buflen);
2568 * ata_sg_init - Associate command with scatter-gather table.
2569 * @qc: Command to be associated
2570 * @sg: Scatter-gather table.
2571 * @n_elem: Number of elements in s/g table.
2573 * Initialize the data-related elements of queued_cmd @qc
2574 * to point to a scatter-gather table @sg, containing @n_elem
2578 * spin_lock_irqsave(host_set lock)
2581 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2582 unsigned int n_elem)
2584 qc->flags |= ATA_QCFLAG_SG;
2586 qc->n_elem = n_elem;
2587 qc->orig_n_elem = n_elem;
2591 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2592 * @qc: Command with memory buffer to be mapped.
2594 * DMA-map the memory buffer associated with queued_cmd @qc.
2597 * spin_lock_irqsave(host_set lock)
2600 * Zero on success, negative on error.
2603 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2605 struct ata_port *ap = qc->ap;
2606 int dir = qc->dma_dir;
2607 struct scatterlist *sg = qc->__sg;
2608 dma_addr_t dma_address;
2610 /* we must lengthen transfers to end on a 32-bit boundary */
2611 qc->pad_len = sg->length & 3;
2613 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2614 struct scatterlist *psg = &qc->pad_sgent;
2616 assert(qc->dev->class == ATA_DEV_ATAPI);
2618 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2620 if (qc->tf.flags & ATA_TFLAG_WRITE)
2621 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2624 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2625 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2627 sg->length -= qc->pad_len;
2629 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2630 sg->length, qc->pad_len);
2633 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2635 if (dma_mapping_error(dma_address)) {
2637 sg->length += qc->pad_len;
2641 sg_dma_address(sg) = dma_address;
2642 sg_dma_len(sg) = sg->length;
2644 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2645 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2651 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2652 * @qc: Command with scatter-gather table to be mapped.
2654 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2657 * spin_lock_irqsave(host_set lock)
2660 * Zero on success, negative on error.
2664 static int ata_sg_setup(struct ata_queued_cmd *qc)
2666 struct ata_port *ap = qc->ap;
2667 struct scatterlist *sg = qc->__sg;
2668 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2671 VPRINTK("ENTER, ata%u\n", ap->id);
2672 assert(qc->flags & ATA_QCFLAG_SG);
2674 /* we must lengthen transfers to end on a 32-bit boundary */
2675 qc->pad_len = lsg->length & 3;
2677 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2678 struct scatterlist *psg = &qc->pad_sgent;
2679 unsigned int offset;
2681 assert(qc->dev->class == ATA_DEV_ATAPI);
2683 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2686 * psg->page/offset are used to copy to-be-written
2687 * data in this function or read data in ata_sg_clean.
2689 offset = lsg->offset + lsg->length - qc->pad_len;
2690 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2691 psg->offset = offset_in_page(offset);
2693 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2694 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2695 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2696 kunmap_atomic(psg->page, KM_IRQ0);
2699 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2700 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2702 lsg->length -= qc->pad_len;
2704 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2705 qc->n_elem - 1, lsg->length, qc->pad_len);
2709 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2711 /* restore last sg */
2712 lsg->length += qc->pad_len;
2716 DPRINTK("%d sg elements mapped\n", n_elem);
2718 qc->n_elem = n_elem;
2724 * ata_poll_qc_complete - turn irq back on and finish qc
2725 * @qc: Command to complete
2726 * @err_mask: ATA status register content
2729 * None. (grabs host lock)
2732 void ata_poll_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
2734 struct ata_port *ap = qc->ap;
2735 unsigned long flags;
2737 spin_lock_irqsave(&ap->host_set->lock, flags);
2739 ata_qc_complete(qc, err_mask);
2740 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2745 * @ap: the target ata_port
2748 * None. (executing in kernel thread context)
2751 * timeout value to use
2754 static unsigned long ata_pio_poll(struct ata_port *ap)
2757 unsigned int poll_state = HSM_ST_UNKNOWN;
2758 unsigned int reg_state = HSM_ST_UNKNOWN;
2760 switch (ap->hsm_task_state) {
2763 poll_state = HSM_ST_POLL;
2767 case HSM_ST_LAST_POLL:
2768 poll_state = HSM_ST_LAST_POLL;
2769 reg_state = HSM_ST_LAST;
2776 status = ata_chk_status(ap);
2777 if (status & ATA_BUSY) {
2778 if (time_after(jiffies, ap->pio_task_timeout)) {
2779 ap->hsm_task_state = HSM_ST_TMOUT;
2782 ap->hsm_task_state = poll_state;
2783 return ATA_SHORT_PAUSE;
2786 ap->hsm_task_state = reg_state;
2791 * ata_pio_complete - check if drive is busy or idle
2792 * @ap: the target ata_port
2795 * None. (executing in kernel thread context)
2798 * Zero if qc completed.
2799 * Non-zero if has next.
2802 static int ata_pio_complete (struct ata_port *ap)
2804 struct ata_queued_cmd *qc;
2808 * This is purely heuristic. This is a fast path. Sometimes when
2809 * we enter, BSY will be cleared in a chk-status or two. If not,
2810 * the drive is probably seeking or something. Snooze for a couple
2811 * msecs, then chk-status again. If still busy, fall back to
2812 * HSM_ST_LAST_POLL state.
2814 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2815 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2817 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2818 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2819 ap->hsm_task_state = HSM_ST_LAST_POLL;
2820 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2825 drv_stat = ata_wait_idle(ap);
2826 if (!ata_ok(drv_stat)) {
2827 ap->hsm_task_state = HSM_ST_ERR;
2831 qc = ata_qc_from_tag(ap, ap->active_tag);
2834 ap->hsm_task_state = HSM_ST_IDLE;
2836 ata_poll_qc_complete(qc, 0);
2838 /* another command may start at this point */
2845 * swap_buf_le16 - swap halves of 16-words in place
2846 * @buf: Buffer to swap
2847 * @buf_words: Number of 16-bit words in buffer.
2849 * Swap halves of 16-bit words if needed to convert from
2850 * little-endian byte order to native cpu byte order, or
2854 * Inherited from caller.
2856 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2861 for (i = 0; i < buf_words; i++)
2862 buf[i] = le16_to_cpu(buf[i]);
2863 #endif /* __BIG_ENDIAN */
2867 * ata_mmio_data_xfer - Transfer data by MMIO
2868 * @ap: port to read/write
2870 * @buflen: buffer length
2871 * @write_data: read/write
2873 * Transfer data from/to the device data register by MMIO.
2876 * Inherited from caller.
2879 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2880 unsigned int buflen, int write_data)
2883 unsigned int words = buflen >> 1;
2884 u16 *buf16 = (u16 *) buf;
2885 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2887 /* Transfer multiple of 2 bytes */
2889 for (i = 0; i < words; i++)
2890 writew(le16_to_cpu(buf16[i]), mmio);
2892 for (i = 0; i < words; i++)
2893 buf16[i] = cpu_to_le16(readw(mmio));
2896 /* Transfer trailing 1 byte, if any. */
2897 if (unlikely(buflen & 0x01)) {
2898 u16 align_buf[1] = { 0 };
2899 unsigned char *trailing_buf = buf + buflen - 1;
2902 memcpy(align_buf, trailing_buf, 1);
2903 writew(le16_to_cpu(align_buf[0]), mmio);
2905 align_buf[0] = cpu_to_le16(readw(mmio));
2906 memcpy(trailing_buf, align_buf, 1);
2912 * ata_pio_data_xfer - Transfer data by PIO
2913 * @ap: port to read/write
2915 * @buflen: buffer length
2916 * @write_data: read/write
2918 * Transfer data from/to the device data register by PIO.
2921 * Inherited from caller.
2924 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2925 unsigned int buflen, int write_data)
2927 unsigned int words = buflen >> 1;
2929 /* Transfer multiple of 2 bytes */
2931 outsw(ap->ioaddr.data_addr, buf, words);
2933 insw(ap->ioaddr.data_addr, buf, words);
2935 /* Transfer trailing 1 byte, if any. */
2936 if (unlikely(buflen & 0x01)) {
2937 u16 align_buf[1] = { 0 };
2938 unsigned char *trailing_buf = buf + buflen - 1;
2941 memcpy(align_buf, trailing_buf, 1);
2942 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2944 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2945 memcpy(trailing_buf, align_buf, 1);
2951 * ata_data_xfer - Transfer data from/to the data register.
2952 * @ap: port to read/write
2954 * @buflen: buffer length
2955 * @do_write: read/write
2957 * Transfer data from/to the device data register.
2960 * Inherited from caller.
2963 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2964 unsigned int buflen, int do_write)
2966 if (ap->flags & ATA_FLAG_MMIO)
2967 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2969 ata_pio_data_xfer(ap, buf, buflen, do_write);
2973 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2974 * @qc: Command on going
2976 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2979 * Inherited from caller.
2982 static void ata_pio_sector(struct ata_queued_cmd *qc)
2984 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2985 struct scatterlist *sg = qc->__sg;
2986 struct ata_port *ap = qc->ap;
2988 unsigned int offset;
2991 if (qc->cursect == (qc->nsect - 1))
2992 ap->hsm_task_state = HSM_ST_LAST;
2994 page = sg[qc->cursg].page;
2995 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2997 /* get the current page and offset */
2998 page = nth_page(page, (offset >> PAGE_SHIFT));
2999 offset %= PAGE_SIZE;
3001 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3003 if (PageHighMem(page)) {
3004 unsigned long flags;
3006 local_irq_save(flags);
3007 buf = kmap_atomic(page, KM_IRQ0);
3009 /* do the actual data transfer */
3010 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3012 kunmap_atomic(buf, KM_IRQ0);
3013 local_irq_restore(flags);
3015 buf = page_address(page);
3016 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3022 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3029 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3030 * @qc: Command on going
3032 * Transfer one or many ATA_SECT_SIZE of data from/to the
3033 * ATA device for the DRQ request.
3036 * Inherited from caller.
3039 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3041 if (is_multi_taskfile(&qc->tf)) {
3042 /* READ/WRITE MULTIPLE */
3045 assert(qc->dev->multi_count);
3047 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3055 * atapi_send_cdb - Write CDB bytes to hardware
3056 * @ap: Port to which ATAPI device is attached.
3057 * @qc: Taskfile currently active
3059 * When device has indicated its readiness to accept
3060 * a CDB, this function is called. Send the CDB.
3066 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3069 DPRINTK("send cdb\n");
3070 assert(ap->cdb_len >= 12);
3072 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3073 ata_altstatus(ap); /* flush */
3075 switch (qc->tf.protocol) {
3076 case ATA_PROT_ATAPI:
3077 ap->hsm_task_state = HSM_ST;
3079 case ATA_PROT_ATAPI_NODATA:
3080 ap->hsm_task_state = HSM_ST_LAST;
3082 case ATA_PROT_ATAPI_DMA:
3083 ap->hsm_task_state = HSM_ST_LAST;
3084 /* initiate bmdma */
3085 ap->ops->bmdma_start(qc);
3091 * ata_pio_first_block - Write first data block to hardware
3092 * @ap: Port to which ATA/ATAPI device is attached.
3094 * When device has indicated its readiness to accept
3095 * the data, this function sends out the CDB or
3096 * the first data block by PIO.
3098 * - If polling, ata_pio_task() handles the rest.
3099 * - Otherwise, interrupt handler takes over.
3102 * Kernel thread context (may sleep)
3105 * Zero if irq handler takes over
3106 * Non-zero if has next (polling).
3109 static int ata_pio_first_block(struct ata_port *ap)
3111 struct ata_queued_cmd *qc;
3113 unsigned long flags;
3116 qc = ata_qc_from_tag(ap, ap->active_tag);
3118 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3120 /* if polling, we will stay in the work queue after sending the data.
3121 * otherwise, interrupt handler takes over after sending the data.
3123 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3125 /* sleep-wait for BSY to clear */
3126 DPRINTK("busy wait\n");
3127 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
3128 ap->hsm_task_state = HSM_ST_TMOUT;
3132 /* make sure DRQ is set */
3133 status = ata_chk_status(ap);
3134 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3135 /* device status error */
3136 ap->hsm_task_state = HSM_ST_ERR;
3140 /* Send the CDB (atapi) or the first data block (ata pio out).
3141 * During the state transition, interrupt handler shouldn't
3142 * be invoked before the data transfer is complete and
3143 * hsm_task_state is changed. Hence, the following locking.
3145 spin_lock_irqsave(&ap->host_set->lock, flags);
3147 if (qc->tf.protocol == ATA_PROT_PIO) {
3148 /* PIO data out protocol.
3149 * send first data block.
3152 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3153 * so, the state is changed here before ata_pio_sectors().
3155 ap->hsm_task_state = HSM_ST;
3156 ata_pio_sectors(qc);
3157 ata_altstatus(ap); /* flush */
3160 atapi_send_cdb(ap, qc);
3162 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3164 /* if polling, ata_pio_task() handles the rest.
3165 * otherwise, interrupt handler takes over from here.
3170 return 1; /* has next */
3174 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3175 * @qc: Command on going
3176 * @bytes: number of bytes
3178 * Transfer Transfer data from/to the ATAPI device.
3181 * Inherited from caller.
3185 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3187 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3188 struct scatterlist *sg = qc->__sg;
3189 struct ata_port *ap = qc->ap;
3192 unsigned int offset, count;
3194 if (qc->curbytes + bytes >= qc->nbytes)
3195 ap->hsm_task_state = HSM_ST_LAST;
3198 if (unlikely(qc->cursg >= qc->n_elem)) {
3200 * The end of qc->sg is reached and the device expects
3201 * more data to transfer. In order not to overrun qc->sg
3202 * and fulfill length specified in the byte count register,
3203 * - for read case, discard trailing data from the device
3204 * - for write case, padding zero data to the device
3206 u16 pad_buf[1] = { 0 };
3207 unsigned int words = bytes >> 1;
3210 if (words) /* warning if bytes > 1 */
3211 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3214 for (i = 0; i < words; i++)
3215 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3217 ap->hsm_task_state = HSM_ST_LAST;
3221 sg = &qc->__sg[qc->cursg];
3224 offset = sg->offset + qc->cursg_ofs;
3226 /* get the current page and offset */
3227 page = nth_page(page, (offset >> PAGE_SHIFT));
3228 offset %= PAGE_SIZE;
3230 /* don't overrun current sg */
3231 count = min(sg->length - qc->cursg_ofs, bytes);
3233 /* don't cross page boundaries */
3234 count = min(count, (unsigned int)PAGE_SIZE - offset);
3236 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3238 if (PageHighMem(page)) {
3239 unsigned long flags;
3241 local_irq_save(flags);
3242 buf = kmap_atomic(page, KM_IRQ0);
3244 /* do the actual data transfer */
3245 ata_data_xfer(ap, buf + offset, count, do_write);
3247 kunmap_atomic(buf, KM_IRQ0);
3248 local_irq_restore(flags);
3250 buf = page_address(page);
3251 ata_data_xfer(ap, buf + offset, count, do_write);
3255 qc->curbytes += count;
3256 qc->cursg_ofs += count;
3258 if (qc->cursg_ofs == sg->length) {
3268 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3269 * @qc: Command on going
3271 * Transfer Transfer data from/to the ATAPI device.
3274 * Inherited from caller.
3277 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3279 struct ata_port *ap = qc->ap;
3280 struct ata_device *dev = qc->dev;
3281 unsigned int ireason, bc_lo, bc_hi, bytes;
3282 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3284 ap->ops->tf_read(ap, &qc->tf);
3285 ireason = qc->tf.nsect;
3286 bc_lo = qc->tf.lbam;
3287 bc_hi = qc->tf.lbah;
3288 bytes = (bc_hi << 8) | bc_lo;
3290 /* shall be cleared to zero, indicating xfer of data */
3291 if (ireason & (1 << 0))
3294 /* make sure transfer direction matches expected */
3295 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3296 if (do_write != i_write)
3299 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3301 __atapi_pio_bytes(qc, bytes);
3306 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3307 ap->id, dev->devno);
3308 ap->hsm_task_state = HSM_ST_ERR;
3312 * ata_pio_block - start PIO on a block
3313 * @ap: the target ata_port
3316 * None. (executing in kernel thread context)
3319 static void ata_pio_block(struct ata_port *ap)
3321 struct ata_queued_cmd *qc;
3325 * This is purely heuristic. This is a fast path.
3326 * Sometimes when we enter, BSY will be cleared in
3327 * a chk-status or two. If not, the drive is probably seeking
3328 * or something. Snooze for a couple msecs, then
3329 * chk-status again. If still busy, fall back to
3330 * HSM_ST_POLL state.
3332 status = ata_busy_wait(ap, ATA_BUSY, 5);
3333 if (status & ATA_BUSY) {
3335 status = ata_busy_wait(ap, ATA_BUSY, 10);
3336 if (status & ATA_BUSY) {
3337 ap->hsm_task_state = HSM_ST_POLL;
3338 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3343 qc = ata_qc_from_tag(ap, ap->active_tag);
3346 if (is_atapi_taskfile(&qc->tf)) {
3347 /* no more data to transfer or unsupported ATAPI command */
3348 if ((status & ATA_DRQ) == 0) {
3349 ap->hsm_task_state = HSM_ST_LAST;
3353 atapi_pio_bytes(qc);
3355 /* handle BSY=0, DRQ=0 as error */
3356 if ((status & ATA_DRQ) == 0) {
3357 ap->hsm_task_state = HSM_ST_ERR;
3361 ata_pio_sectors(qc);
3364 ata_altstatus(ap); /* flush */
3367 static void ata_pio_error(struct ata_port *ap)
3369 struct ata_queued_cmd *qc;
3371 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3373 qc = ata_qc_from_tag(ap, ap->active_tag);
3376 ap->hsm_task_state = HSM_ST_IDLE;
3378 ata_poll_qc_complete(qc, AC_ERR_ATA_BUS);
3381 static void ata_pio_task(void *_data)
3383 struct ata_port *ap = _data;
3384 unsigned long timeout;
3391 switch (ap->hsm_task_state) {
3393 has_next = ata_pio_first_block(ap);
3401 has_next = ata_pio_complete(ap);
3405 case HSM_ST_LAST_POLL:
3406 timeout = ata_pio_poll(ap);
3420 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3426 * ata_qc_timeout - Handle timeout of queued command
3427 * @qc: Command that timed out
3429 * Some part of the kernel (currently, only the SCSI layer)
3430 * has noticed that the active command on port @ap has not
3431 * completed after a specified length of time. Handle this
3432 * condition by disabling DMA (if necessary) and completing
3433 * transactions, with error if necessary.
3435 * This also handles the case of the "lost interrupt", where
3436 * for some reason (possibly hardware bug, possibly driver bug)
3437 * an interrupt was not delivered to the driver, even though the
3438 * transaction completed successfully.
3441 * Inherited from SCSI layer (none, can sleep)
3444 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3446 struct ata_port *ap = qc->ap;
3447 struct ata_host_set *host_set = ap->host_set;
3448 struct ata_device *dev = qc->dev;
3449 u8 host_stat = 0, drv_stat;
3450 unsigned long flags;
3454 /* FIXME: doesn't this conflict with timeout handling? */
3455 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3456 struct scsi_cmnd *cmd = qc->scsicmd;
3458 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3460 /* finish completing original command */
3461 spin_lock_irqsave(&host_set->lock, flags);
3462 __ata_qc_complete(qc);
3463 spin_unlock_irqrestore(&host_set->lock, flags);
3465 atapi_request_sense(ap, dev, cmd);
3467 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3468 scsi_finish_command(cmd);
3474 spin_lock_irqsave(&host_set->lock, flags);
3476 /* hack alert! We cannot use the supplied completion
3477 * function from inside the ->eh_strategy_handler() thread.
3478 * libata is the only user of ->eh_strategy_handler() in
3479 * any kernel, so the default scsi_done() assumes it is
3480 * not being called from the SCSI EH.
3482 qc->scsidone = scsi_finish_command;
3484 switch (qc->tf.protocol) {
3487 case ATA_PROT_ATAPI_DMA:
3488 host_stat = ap->ops->bmdma_status(ap);
3490 /* before we do anything else, clear DMA-Start bit */
3491 ap->ops->bmdma_stop(qc);
3497 drv_stat = ata_chk_status(ap);
3499 /* ack bmdma irq events */
3500 ap->ops->irq_clear(ap);
3502 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3503 ap->id, qc->tf.command, drv_stat, host_stat);
3505 ap->hsm_task_state = HSM_ST_IDLE;
3507 /* complete taskfile transaction */
3508 ata_qc_complete(qc, ac_err_mask(drv_stat));
3512 spin_unlock_irqrestore(&host_set->lock, flags);
3519 * ata_eng_timeout - Handle timeout of queued command
3520 * @ap: Port on which timed-out command is active
3522 * Some part of the kernel (currently, only the SCSI layer)
3523 * has noticed that the active command on port @ap has not
3524 * completed after a specified length of time. Handle this
3525 * condition by disabling DMA (if necessary) and completing
3526 * transactions, with error if necessary.
3528 * This also handles the case of the "lost interrupt", where
3529 * for some reason (possibly hardware bug, possibly driver bug)
3530 * an interrupt was not delivered to the driver, even though the
3531 * transaction completed successfully.
3534 * Inherited from SCSI layer (none, can sleep)
3537 void ata_eng_timeout(struct ata_port *ap)
3539 struct ata_queued_cmd *qc;
3543 qc = ata_qc_from_tag(ap, ap->active_tag);
3547 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3557 * ata_qc_new - Request an available ATA command, for queueing
3558 * @ap: Port associated with device @dev
3559 * @dev: Device from whom we request an available command structure
3565 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3567 struct ata_queued_cmd *qc = NULL;
3570 for (i = 0; i < ATA_MAX_QUEUE; i++)
3571 if (!test_and_set_bit(i, &ap->qactive)) {
3572 qc = ata_qc_from_tag(ap, i);
3583 * ata_qc_new_init - Request an available ATA command, and initialize it
3584 * @ap: Port associated with device @dev
3585 * @dev: Device from whom we request an available command structure
3591 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3592 struct ata_device *dev)
3594 struct ata_queued_cmd *qc;
3596 qc = ata_qc_new(ap);
3603 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3605 qc->nbytes = qc->curbytes = 0;
3607 ata_tf_init(ap, &qc->tf, dev->devno);
3613 int ata_qc_complete_noop(struct ata_queued_cmd *qc, unsigned int err_mask)
3618 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3620 struct ata_port *ap = qc->ap;
3621 unsigned int tag, do_clear = 0;
3625 if (likely(ata_tag_valid(tag))) {
3626 if (tag == ap->active_tag)
3627 ap->active_tag = ATA_TAG_POISON;
3628 qc->tag = ATA_TAG_POISON;
3633 struct completion *waiting = qc->waiting;
3638 if (likely(do_clear))
3639 clear_bit(tag, &ap->qactive);
3643 * ata_qc_free - free unused ata_queued_cmd
3644 * @qc: Command to complete
3646 * Designed to free unused ata_queued_cmd object
3647 * in case something prevents using it.
3650 * spin_lock_irqsave(host_set lock)
3652 void ata_qc_free(struct ata_queued_cmd *qc)
3654 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3655 assert(qc->waiting == NULL); /* nothing should be waiting */
3657 __ata_qc_complete(qc);
3661 * ata_qc_complete - Complete an active ATA command
3662 * @qc: Command to complete
3663 * @err_mask: ATA Status register contents
3665 * Indicate to the mid and upper layers that an ATA
3666 * command has completed, with either an ok or not-ok status.
3669 * spin_lock_irqsave(host_set lock)
3672 void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
3676 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3677 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3679 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3682 /* atapi: mark qc as inactive to prevent the interrupt handler
3683 * from completing the command twice later, before the error handler
3684 * is called. (when rc != 0 and atapi request sense is needed)
3686 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3688 /* call completion callback */
3689 rc = qc->complete_fn(qc, err_mask);
3691 /* if callback indicates not to complete command (non-zero),
3692 * return immediately
3697 __ata_qc_complete(qc);
3702 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3704 struct ata_port *ap = qc->ap;
3706 switch (qc->tf.protocol) {
3708 case ATA_PROT_ATAPI_DMA:
3711 case ATA_PROT_ATAPI:
3713 case ATA_PROT_PIO_MULT:
3714 if (ap->flags & ATA_FLAG_PIO_DMA)
3727 * ata_qc_issue - issue taskfile to device
3728 * @qc: command to issue to device
3730 * Prepare an ATA command to submission to device.
3731 * This includes mapping the data into a DMA-able
3732 * area, filling in the S/G table, and finally
3733 * writing the taskfile to hardware, starting the command.
3736 * spin_lock_irqsave(host_set lock)
3739 * Zero on success, negative on error.
3742 int ata_qc_issue(struct ata_queued_cmd *qc)
3744 struct ata_port *ap = qc->ap;
3746 if (ata_should_dma_map(qc)) {
3747 if (qc->flags & ATA_QCFLAG_SG) {
3748 if (ata_sg_setup(qc))
3750 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3751 if (ata_sg_setup_one(qc))
3755 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3758 ap->ops->qc_prep(qc);
3760 qc->ap->active_tag = qc->tag;
3761 qc->flags |= ATA_QCFLAG_ACTIVE;
3763 return ap->ops->qc_issue(qc);
3771 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3772 * @qc: command to issue to device
3774 * Using various libata functions and hooks, this function
3775 * starts an ATA command. ATA commands are grouped into
3776 * classes called "protocols", and issuing each type of protocol
3777 * is slightly different.
3779 * May be used as the qc_issue() entry in ata_port_operations.
3782 * spin_lock_irqsave(host_set lock)
3785 * Zero on success, negative on error.
3788 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3790 struct ata_port *ap = qc->ap;
3792 /* Use polling pio if the LLD doesn't handle
3793 * interrupt driven pio and atapi CDB interrupt.
3795 if (ap->flags & ATA_FLAG_PIO_POLLING) {
3796 switch (qc->tf.protocol) {
3798 case ATA_PROT_ATAPI:
3799 case ATA_PROT_ATAPI_NODATA:
3800 qc->tf.flags |= ATA_TFLAG_POLLING;
3802 case ATA_PROT_ATAPI_DMA:
3803 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3811 /* select the device */
3812 ata_dev_select(ap, qc->dev->devno, 1, 0);
3814 /* start the command */
3815 switch (qc->tf.protocol) {
3816 case ATA_PROT_NODATA:
3817 if (qc->tf.flags & ATA_TFLAG_POLLING)
3818 ata_qc_set_polling(qc);
3820 ata_tf_to_host(ap, &qc->tf);
3821 ap->hsm_task_state = HSM_ST_LAST;
3823 if (qc->tf.flags & ATA_TFLAG_POLLING)
3824 queue_work(ata_wq, &ap->pio_task);
3829 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3831 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3832 ap->ops->bmdma_setup(qc); /* set up bmdma */
3833 ap->ops->bmdma_start(qc); /* initiate bmdma */
3834 ap->hsm_task_state = HSM_ST_LAST;
3838 if (qc->tf.flags & ATA_TFLAG_POLLING)
3839 ata_qc_set_polling(qc);
3841 ata_tf_to_host(ap, &qc->tf);
3843 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3844 /* PIO data out protocol */
3845 ap->hsm_task_state = HSM_ST_FIRST;
3846 queue_work(ata_wq, &ap->pio_task);
3848 /* always send first data block using
3849 * the ata_pio_task() codepath.
3852 /* PIO data in protocol */
3853 ap->hsm_task_state = HSM_ST;
3855 if (qc->tf.flags & ATA_TFLAG_POLLING)
3856 queue_work(ata_wq, &ap->pio_task);
3858 /* if polling, ata_pio_task() handles the rest.
3859 * otherwise, interrupt handler takes over from here.
3865 case ATA_PROT_ATAPI:
3866 case ATA_PROT_ATAPI_NODATA:
3867 if (qc->tf.flags & ATA_TFLAG_POLLING)
3868 ata_qc_set_polling(qc);
3870 ata_tf_to_host(ap, &qc->tf);
3871 ap->hsm_task_state = HSM_ST_FIRST;
3873 /* send cdb by polling if no cdb interrupt */
3874 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
3875 (qc->tf.flags & ATA_TFLAG_POLLING))
3876 queue_work(ata_wq, &ap->pio_task);
3879 case ATA_PROT_ATAPI_DMA:
3880 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3882 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3883 ap->ops->bmdma_setup(qc); /* set up bmdma */
3884 ap->hsm_task_state = HSM_ST_FIRST;
3886 /* send cdb by polling if no cdb interrupt */
3887 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3888 queue_work(ata_wq, &ap->pio_task);
3900 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3901 * @qc: Info associated with this ATA transaction.
3904 * spin_lock_irqsave(host_set lock)
3907 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3909 struct ata_port *ap = qc->ap;
3910 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3912 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3914 /* load PRD table addr. */
3915 mb(); /* make sure PRD table writes are visible to controller */
3916 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3918 /* specify data direction, triple-check start bit is clear */
3919 dmactl = readb(mmio + ATA_DMA_CMD);
3920 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3922 dmactl |= ATA_DMA_WR;
3923 writeb(dmactl, mmio + ATA_DMA_CMD);
3925 /* issue r/w command */
3926 ap->ops->exec_command(ap, &qc->tf);
3930 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3931 * @qc: Info associated with this ATA transaction.
3934 * spin_lock_irqsave(host_set lock)
3937 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3939 struct ata_port *ap = qc->ap;
3940 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3943 /* start host DMA transaction */
3944 dmactl = readb(mmio + ATA_DMA_CMD);
3945 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3947 /* Strictly, one may wish to issue a readb() here, to
3948 * flush the mmio write. However, control also passes
3949 * to the hardware at this point, and it will interrupt
3950 * us when we are to resume control. So, in effect,
3951 * we don't care when the mmio write flushes.
3952 * Further, a read of the DMA status register _immediately_
3953 * following the write may not be what certain flaky hardware
3954 * is expected, so I think it is best to not add a readb()
3955 * without first all the MMIO ATA cards/mobos.
3956 * Or maybe I'm just being paranoid.
3961 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3962 * @qc: Info associated with this ATA transaction.
3965 * spin_lock_irqsave(host_set lock)
3968 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3970 struct ata_port *ap = qc->ap;
3971 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3974 /* load PRD table addr. */
3975 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3977 /* specify data direction, triple-check start bit is clear */
3978 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3979 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3981 dmactl |= ATA_DMA_WR;
3982 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3984 /* issue r/w command */
3985 ap->ops->exec_command(ap, &qc->tf);
3989 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3990 * @qc: Info associated with this ATA transaction.
3993 * spin_lock_irqsave(host_set lock)
3996 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3998 struct ata_port *ap = qc->ap;
4001 /* start host DMA transaction */
4002 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4003 outb(dmactl | ATA_DMA_START,
4004 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4009 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4010 * @qc: Info associated with this ATA transaction.
4012 * Writes the ATA_DMA_START flag to the DMA command register.
4014 * May be used as the bmdma_start() entry in ata_port_operations.
4017 * spin_lock_irqsave(host_set lock)
4019 void ata_bmdma_start(struct ata_queued_cmd *qc)
4021 if (qc->ap->flags & ATA_FLAG_MMIO)
4022 ata_bmdma_start_mmio(qc);
4024 ata_bmdma_start_pio(qc);
4029 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4030 * @qc: Info associated with this ATA transaction.
4032 * Writes address of PRD table to device's PRD Table Address
4033 * register, sets the DMA control register, and calls
4034 * ops->exec_command() to start the transfer.
4036 * May be used as the bmdma_setup() entry in ata_port_operations.
4039 * spin_lock_irqsave(host_set lock)
4041 void ata_bmdma_setup(struct ata_queued_cmd *qc)
4043 if (qc->ap->flags & ATA_FLAG_MMIO)
4044 ata_bmdma_setup_mmio(qc);
4046 ata_bmdma_setup_pio(qc);
4051 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
4052 * @ap: Port associated with this ATA transaction.
4054 * Clear interrupt and error flags in DMA status register.
4056 * May be used as the irq_clear() entry in ata_port_operations.
4059 * spin_lock_irqsave(host_set lock)
4062 void ata_bmdma_irq_clear(struct ata_port *ap)
4064 if (ap->flags & ATA_FLAG_MMIO) {
4065 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4066 writeb(readb(mmio), mmio);
4068 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4069 outb(inb(addr), addr);
4076 * ata_bmdma_status - Read PCI IDE BMDMA status
4077 * @ap: Port associated with this ATA transaction.
4079 * Read and return BMDMA status register.
4081 * May be used as the bmdma_status() entry in ata_port_operations.
4084 * spin_lock_irqsave(host_set lock)
4087 u8 ata_bmdma_status(struct ata_port *ap)
4090 if (ap->flags & ATA_FLAG_MMIO) {
4091 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4092 host_stat = readb(mmio + ATA_DMA_STATUS);
4094 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
4100 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
4101 * @qc: Command we are ending DMA for
4103 * Clears the ATA_DMA_START flag in the dma control register
4105 * May be used as the bmdma_stop() entry in ata_port_operations.
4108 * spin_lock_irqsave(host_set lock)
4111 void ata_bmdma_stop(struct ata_queued_cmd *qc)
4113 struct ata_port *ap = qc->ap;
4114 if (ap->flags & ATA_FLAG_MMIO) {
4115 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4117 /* clear start/stop bit */
4118 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4119 mmio + ATA_DMA_CMD);
4121 /* clear start/stop bit */
4122 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4123 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4126 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4127 ata_altstatus(ap); /* dummy read */
4131 * ata_host_intr - Handle host interrupt for given (port, task)
4132 * @ap: Port on which interrupt arrived (possibly...)
4133 * @qc: Taskfile currently active in engine
4135 * Handle host interrupt for given queued command. Currently,
4136 * only DMA interrupts are handled. All other commands are
4137 * handled via polling with interrupts disabled (nIEN bit).
4140 * spin_lock_irqsave(host_set lock)
4143 * One if interrupt was handled, zero if not (shared irq).
4146 inline unsigned int ata_host_intr (struct ata_port *ap,
4147 struct ata_queued_cmd *qc)
4149 u8 status, host_stat = 0;
4151 VPRINTK("ata%u: protocol %d task_state %d\n",
4152 ap->id, qc->tf.protocol, ap->hsm_task_state);
4154 /* Check whether we are expecting interrupt in this state */
4155 switch (ap->hsm_task_state) {
4157 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4158 * The flag was turned on only for atapi devices.
4159 * No need to check is_atapi_taskfile(&qc->tf) again.
4161 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4165 if (qc->tf.protocol == ATA_PROT_DMA ||
4166 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4167 /* check status of DMA engine */
4168 host_stat = ap->ops->bmdma_status(ap);
4169 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4171 /* if it's not our irq... */
4172 if (!(host_stat & ATA_DMA_INTR))
4175 /* before we do anything else, clear DMA-Start bit */
4176 ap->ops->bmdma_stop(qc);
4185 /* check altstatus */
4186 status = ata_altstatus(ap);
4187 if (status & ATA_BUSY)
4190 /* check main status, clearing INTRQ */
4191 status = ata_chk_status(ap);
4192 if (unlikely(status & ATA_BUSY))
4195 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4196 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4198 /* ack bmdma irq events */
4199 ap->ops->irq_clear(ap);
4202 if (unlikely((status & ATA_ERR) || (host_stat & ATA_DMA_ERR)))
4203 ap->hsm_task_state = HSM_ST_ERR;
4206 switch (ap->hsm_task_state) {
4208 /* Some pre-ATAPI-4 devices assert INTRQ
4209 * at this state when ready to receive CDB.
4212 /* check device status */
4213 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
4214 /* Wrong status. Let EH handle this */
4215 ap->hsm_task_state = HSM_ST_ERR;
4219 atapi_send_cdb(ap, qc);
4224 /* complete command or read/write the data register */
4225 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4226 /* ATAPI PIO protocol */
4227 if ((status & ATA_DRQ) == 0) {
4228 /* no more data to transfer */
4229 ap->hsm_task_state = HSM_ST_LAST;
4233 atapi_pio_bytes(qc);
4235 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4236 /* bad ireason reported by device */
4240 /* ATA PIO protocol */
4241 if (unlikely((status & ATA_DRQ) == 0)) {
4242 /* handle BSY=0, DRQ=0 as error */
4243 ap->hsm_task_state = HSM_ST_ERR;
4247 ata_pio_sectors(qc);
4249 if (ap->hsm_task_state == HSM_ST_LAST &&
4250 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4253 status = ata_chk_status(ap);
4258 ata_altstatus(ap); /* flush */
4262 if (unlikely(status & ATA_DRQ)) {
4263 /* handle DRQ=1 as error */
4264 ap->hsm_task_state = HSM_ST_ERR;
4268 /* no more data to transfer */
4269 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
4272 ap->hsm_task_state = HSM_ST_IDLE;
4274 /* complete taskfile transaction */
4275 ata_qc_complete(qc, ac_err_mask(status));
4279 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
4280 ap->id, status, host_stat);
4282 ap->hsm_task_state = HSM_ST_IDLE;
4283 ata_qc_complete(qc, status | ATA_ERR);
4289 return 1; /* irq handled */
4292 ap->stats.idle_irq++;
4295 if ((ap->stats.idle_irq % 1000) == 0) {
4297 ata_irq_ack(ap, 0); /* debug trap */
4298 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4301 return 0; /* irq not handled */
4305 * ata_interrupt - Default ATA host interrupt handler
4306 * @irq: irq line (unused)
4307 * @dev_instance: pointer to our ata_host_set information structure
4310 * Default interrupt handler for PCI IDE devices. Calls
4311 * ata_host_intr() for each port that is not disabled.
4314 * Obtains host_set lock during operation.
4317 * IRQ_NONE or IRQ_HANDLED.
4320 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4322 struct ata_host_set *host_set = dev_instance;
4324 unsigned int handled = 0;
4325 unsigned long flags;
4327 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4328 spin_lock_irqsave(&host_set->lock, flags);
4330 for (i = 0; i < host_set->n_ports; i++) {
4331 struct ata_port *ap;
4333 ap = host_set->ports[i];
4335 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
4336 struct ata_queued_cmd *qc;
4338 qc = ata_qc_from_tag(ap, ap->active_tag);
4339 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4340 (qc->flags & ATA_QCFLAG_ACTIVE))
4341 handled |= ata_host_intr(ap, qc);
4345 spin_unlock_irqrestore(&host_set->lock, flags);
4347 return IRQ_RETVAL(handled);
4351 * ata_port_start - Set port up for dma.
4352 * @ap: Port to initialize
4354 * Called just after data structures for each port are
4355 * initialized. Allocates space for PRD table.
4357 * May be used as the port_start() entry in ata_port_operations.
4360 * Inherited from caller.
4363 int ata_port_start (struct ata_port *ap)
4365 struct device *dev = ap->host_set->dev;
4368 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4372 rc = ata_pad_alloc(ap, dev);
4374 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4378 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4385 * ata_port_stop - Undo ata_port_start()
4386 * @ap: Port to shut down
4388 * Frees the PRD table.
4390 * May be used as the port_stop() entry in ata_port_operations.
4393 * Inherited from caller.
4396 void ata_port_stop (struct ata_port *ap)
4398 struct device *dev = ap->host_set->dev;
4400 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4401 ata_pad_free(ap, dev);
4404 void ata_host_stop (struct ata_host_set *host_set)
4406 if (host_set->mmio_base)
4407 iounmap(host_set->mmio_base);
4412 * ata_host_remove - Unregister SCSI host structure with upper layers
4413 * @ap: Port to unregister
4414 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4417 * Inherited from caller.
4420 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4422 struct Scsi_Host *sh = ap->host;
4427 scsi_remove_host(sh);
4429 ap->ops->port_stop(ap);
4433 * ata_host_init - Initialize an ata_port structure
4434 * @ap: Structure to initialize
4435 * @host: associated SCSI mid-layer structure
4436 * @host_set: Collection of hosts to which @ap belongs
4437 * @ent: Probe information provided by low-level driver
4438 * @port_no: Port number associated with this ata_port
4440 * Initialize a new ata_port structure, and its associated
4444 * Inherited from caller.
4447 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4448 struct ata_host_set *host_set,
4449 const struct ata_probe_ent *ent, unsigned int port_no)
4455 host->max_channel = 1;
4456 host->unique_id = ata_unique_id++;
4457 host->max_cmd_len = 12;
4459 ap->flags = ATA_FLAG_PORT_DISABLED;
4460 ap->id = host->unique_id;
4462 ap->ctl = ATA_DEVCTL_OBS;
4463 ap->host_set = host_set;
4464 ap->port_no = port_no;
4466 ent->legacy_mode ? ent->hard_port_no : port_no;
4467 ap->pio_mask = ent->pio_mask;
4468 ap->mwdma_mask = ent->mwdma_mask;
4469 ap->udma_mask = ent->udma_mask;
4470 ap->flags |= ent->host_flags;
4471 ap->ops = ent->port_ops;
4472 ap->cbl = ATA_CBL_NONE;
4473 ap->active_tag = ATA_TAG_POISON;
4474 ap->last_ctl = 0xFF;
4476 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4478 for (i = 0; i < ATA_MAX_DEVICES; i++)
4479 ap->device[i].devno = i;
4482 ap->stats.unhandled_irq = 1;
4483 ap->stats.idle_irq = 1;
4486 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4490 * ata_host_add - Attach low-level ATA driver to system
4491 * @ent: Information provided by low-level driver
4492 * @host_set: Collections of ports to which we add
4493 * @port_no: Port number associated with this host
4495 * Attach low-level ATA driver to system.
4498 * PCI/etc. bus probe sem.
4501 * New ata_port on success, for NULL on error.
4504 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4505 struct ata_host_set *host_set,
4506 unsigned int port_no)
4508 struct Scsi_Host *host;
4509 struct ata_port *ap;
4513 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4517 ap = (struct ata_port *) &host->hostdata[0];
4519 ata_host_init(ap, host, host_set, ent, port_no);
4521 rc = ap->ops->port_start(ap);
4528 scsi_host_put(host);
4533 * ata_device_add - Register hardware device with ATA and SCSI layers
4534 * @ent: Probe information describing hardware device to be registered
4536 * This function processes the information provided in the probe
4537 * information struct @ent, allocates the necessary ATA and SCSI
4538 * host information structures, initializes them, and registers
4539 * everything with requisite kernel subsystems.
4541 * This function requests irqs, probes the ATA bus, and probes
4545 * PCI/etc. bus probe sem.
4548 * Number of ports registered. Zero on error (no ports registered).
4551 int ata_device_add(const struct ata_probe_ent *ent)
4553 unsigned int count = 0, i;
4554 struct device *dev = ent->dev;
4555 struct ata_host_set *host_set;
4558 /* alloc a container for our list of ATA ports (buses) */
4559 host_set = kzalloc(sizeof(struct ata_host_set) +
4560 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4563 spin_lock_init(&host_set->lock);
4565 host_set->dev = dev;
4566 host_set->n_ports = ent->n_ports;
4567 host_set->irq = ent->irq;
4568 host_set->mmio_base = ent->mmio_base;
4569 host_set->private_data = ent->private_data;
4570 host_set->ops = ent->port_ops;
4572 /* register each port bound to this device */
4573 for (i = 0; i < ent->n_ports; i++) {
4574 struct ata_port *ap;
4575 unsigned long xfer_mode_mask;
4577 ap = ata_host_add(ent, host_set, i);
4581 host_set->ports[i] = ap;
4582 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4583 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4584 (ap->pio_mask << ATA_SHIFT_PIO);
4586 /* print per-port info to dmesg */
4587 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4588 "bmdma 0x%lX irq %lu\n",
4590 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4591 ata_mode_string(xfer_mode_mask),
4592 ap->ioaddr.cmd_addr,
4593 ap->ioaddr.ctl_addr,
4594 ap->ioaddr.bmdma_addr,
4598 host_set->ops->irq_clear(ap);
4605 /* obtain irq, that is shared between channels */
4606 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4607 DRV_NAME, host_set))
4610 /* perform each probe synchronously */
4611 DPRINTK("probe begin\n");
4612 for (i = 0; i < count; i++) {
4613 struct ata_port *ap;
4616 ap = host_set->ports[i];
4618 DPRINTK("ata%u: probe begin\n", ap->id);
4619 rc = ata_bus_probe(ap);
4620 DPRINTK("ata%u: probe end\n", ap->id);
4623 /* FIXME: do something useful here?
4624 * Current libata behavior will
4625 * tear down everything when
4626 * the module is removed
4627 * or the h/w is unplugged.
4631 rc = scsi_add_host(ap->host, dev);
4633 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4635 /* FIXME: do something useful here */
4636 /* FIXME: handle unconditional calls to
4637 * scsi_scan_host and ata_host_remove, below,
4643 /* probes are done, now scan each port's disk(s) */
4644 DPRINTK("probe begin\n");
4645 for (i = 0; i < count; i++) {
4646 struct ata_port *ap = host_set->ports[i];
4648 ata_scsi_scan_host(ap);
4651 dev_set_drvdata(dev, host_set);
4653 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4654 return ent->n_ports; /* success */
4657 for (i = 0; i < count; i++) {
4658 ata_host_remove(host_set->ports[i], 1);
4659 scsi_host_put(host_set->ports[i]->host);
4663 VPRINTK("EXIT, returning 0\n");
4668 * ata_host_set_remove - PCI layer callback for device removal
4669 * @host_set: ATA host set that was removed
4671 * Unregister all objects associated with this host set. Free those
4675 * Inherited from calling layer (may sleep).
4678 void ata_host_set_remove(struct ata_host_set *host_set)
4680 struct ata_port *ap;
4683 for (i = 0; i < host_set->n_ports; i++) {
4684 ap = host_set->ports[i];
4685 scsi_remove_host(ap->host);
4688 free_irq(host_set->irq, host_set);
4690 for (i = 0; i < host_set->n_ports; i++) {
4691 ap = host_set->ports[i];
4693 ata_scsi_release(ap->host);
4695 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4696 struct ata_ioports *ioaddr = &ap->ioaddr;
4698 if (ioaddr->cmd_addr == 0x1f0)
4699 release_region(0x1f0, 8);
4700 else if (ioaddr->cmd_addr == 0x170)
4701 release_region(0x170, 8);
4704 scsi_host_put(ap->host);
4707 if (host_set->ops->host_stop)
4708 host_set->ops->host_stop(host_set);
4714 * ata_scsi_release - SCSI layer callback hook for host unload
4715 * @host: libata host to be unloaded
4717 * Performs all duties necessary to shut down a libata port...
4718 * Kill port kthread, disable port, and release resources.
4721 * Inherited from SCSI layer.
4727 int ata_scsi_release(struct Scsi_Host *host)
4729 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4733 ap->ops->port_disable(ap);
4734 ata_host_remove(ap, 0);
4741 * ata_std_ports - initialize ioaddr with standard port offsets.
4742 * @ioaddr: IO address structure to be initialized
4744 * Utility function which initializes data_addr, error_addr,
4745 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4746 * device_addr, status_addr, and command_addr to standard offsets
4747 * relative to cmd_addr.
4749 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4752 void ata_std_ports(struct ata_ioports *ioaddr)
4754 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4755 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4756 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4757 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4758 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4759 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4760 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4761 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4762 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4763 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4766 static struct ata_probe_ent *
4767 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4769 struct ata_probe_ent *probe_ent;
4771 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4773 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4774 kobject_name(&(dev->kobj)));
4778 INIT_LIST_HEAD(&probe_ent->node);
4779 probe_ent->dev = dev;
4781 probe_ent->sht = port->sht;
4782 probe_ent->host_flags = port->host_flags;
4783 probe_ent->pio_mask = port->pio_mask;
4784 probe_ent->mwdma_mask = port->mwdma_mask;
4785 probe_ent->udma_mask = port->udma_mask;
4786 probe_ent->port_ops = port->port_ops;
4795 void ata_pci_host_stop (struct ata_host_set *host_set)
4797 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4799 pci_iounmap(pdev, host_set->mmio_base);
4803 * ata_pci_init_native_mode - Initialize native-mode driver
4804 * @pdev: pci device to be initialized
4805 * @port: array[2] of pointers to port info structures.
4806 * @ports: bitmap of ports present
4808 * Utility function which allocates and initializes an
4809 * ata_probe_ent structure for a standard dual-port
4810 * PIO-based IDE controller. The returned ata_probe_ent
4811 * structure can be passed to ata_device_add(). The returned
4812 * ata_probe_ent structure should then be freed with kfree().
4814 * The caller need only pass the address of the primary port, the
4815 * secondary will be deduced automatically. If the device has non
4816 * standard secondary port mappings this function can be called twice,
4817 * once for each interface.
4820 struct ata_probe_ent *
4821 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4823 struct ata_probe_ent *probe_ent =
4824 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4830 probe_ent->irq = pdev->irq;
4831 probe_ent->irq_flags = SA_SHIRQ;
4832 probe_ent->private_data = port[0]->private_data;
4834 if (ports & ATA_PORT_PRIMARY) {
4835 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4836 probe_ent->port[p].altstatus_addr =
4837 probe_ent->port[p].ctl_addr =
4838 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4839 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4840 ata_std_ports(&probe_ent->port[p]);
4844 if (ports & ATA_PORT_SECONDARY) {
4845 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4846 probe_ent->port[p].altstatus_addr =
4847 probe_ent->port[p].ctl_addr =
4848 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4849 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4850 ata_std_ports(&probe_ent->port[p]);
4854 probe_ent->n_ports = p;
4858 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
4860 struct ata_probe_ent *probe_ent;
4862 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
4866 probe_ent->legacy_mode = 1;
4867 probe_ent->n_ports = 1;
4868 probe_ent->hard_port_no = port_num;
4869 probe_ent->private_data = port->private_data;
4874 probe_ent->irq = 14;
4875 probe_ent->port[0].cmd_addr = 0x1f0;
4876 probe_ent->port[0].altstatus_addr =
4877 probe_ent->port[0].ctl_addr = 0x3f6;
4880 probe_ent->irq = 15;
4881 probe_ent->port[0].cmd_addr = 0x170;
4882 probe_ent->port[0].altstatus_addr =
4883 probe_ent->port[0].ctl_addr = 0x376;
4886 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4887 ata_std_ports(&probe_ent->port[0]);
4892 * ata_pci_init_one - Initialize/register PCI IDE host controller
4893 * @pdev: Controller to be initialized
4894 * @port_info: Information from low-level host driver
4895 * @n_ports: Number of ports attached to host controller
4897 * This is a helper function which can be called from a driver's
4898 * xxx_init_one() probe function if the hardware uses traditional
4899 * IDE taskfile registers.
4901 * This function calls pci_enable_device(), reserves its register
4902 * regions, sets the dma mask, enables bus master mode, and calls
4906 * Inherited from PCI layer (may sleep).
4909 * Zero on success, negative on errno-based value on error.
4912 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4913 unsigned int n_ports)
4915 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4916 struct ata_port_info *port[2];
4918 unsigned int legacy_mode = 0;
4919 int disable_dev_on_err = 1;
4924 port[0] = port_info[0];
4926 port[1] = port_info[1];
4930 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4931 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4932 /* TODO: What if one channel is in native mode ... */
4933 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4934 mask = (1 << 2) | (1 << 0);
4935 if ((tmp8 & mask) != mask)
4936 legacy_mode = (1 << 3);
4940 if ((!legacy_mode) && (n_ports > 2)) {
4941 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4946 /* FIXME: Really for ATA it isn't safe because the device may be
4947 multi-purpose and we want to leave it alone if it was already
4948 enabled. Secondly for shared use as Arjan says we want refcounting
4950 Checking dev->is_enabled is insufficient as this is not set at
4951 boot for the primary video which is BIOS enabled
4954 rc = pci_enable_device(pdev);
4958 rc = pci_request_regions(pdev, DRV_NAME);
4960 disable_dev_on_err = 0;
4964 /* FIXME: Should use platform specific mappers for legacy port ranges */
4966 if (!request_region(0x1f0, 8, "libata")) {
4967 struct resource *conflict, res;
4969 res.end = 0x1f0 + 8 - 1;
4970 conflict = ____request_resource(&ioport_resource, &res);
4971 if (!strcmp(conflict->name, "libata"))
4972 legacy_mode |= (1 << 0);
4974 disable_dev_on_err = 0;
4975 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4978 legacy_mode |= (1 << 0);
4980 if (!request_region(0x170, 8, "libata")) {
4981 struct resource *conflict, res;
4983 res.end = 0x170 + 8 - 1;
4984 conflict = ____request_resource(&ioport_resource, &res);
4985 if (!strcmp(conflict->name, "libata"))
4986 legacy_mode |= (1 << 1);
4988 disable_dev_on_err = 0;
4989 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4992 legacy_mode |= (1 << 1);
4995 /* we have legacy mode, but all ports are unavailable */
4996 if (legacy_mode == (1 << 3)) {
4998 goto err_out_regions;
5001 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
5003 goto err_out_regions;
5004 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
5006 goto err_out_regions;
5009 if (legacy_mode & (1 << 0))
5010 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
5011 if (legacy_mode & (1 << 1))
5012 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
5015 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
5017 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
5019 if (!probe_ent && !probe_ent2) {
5021 goto err_out_regions;
5024 pci_set_master(pdev);
5026 /* FIXME: check ata_device_add return */
5028 if (legacy_mode & (1 << 0))
5029 ata_device_add(probe_ent);
5030 if (legacy_mode & (1 << 1))
5031 ata_device_add(probe_ent2);
5033 ata_device_add(probe_ent);
5041 if (legacy_mode & (1 << 0))
5042 release_region(0x1f0, 8);
5043 if (legacy_mode & (1 << 1))
5044 release_region(0x170, 8);
5045 pci_release_regions(pdev);
5047 if (disable_dev_on_err)
5048 pci_disable_device(pdev);
5053 * ata_pci_remove_one - PCI layer callback for device removal
5054 * @pdev: PCI device that was removed
5056 * PCI layer indicates to libata via this hook that
5057 * hot-unplug or module unload event has occurred.
5058 * Handle this by unregistering all objects associated
5059 * with this PCI device. Free those objects. Then finally
5060 * release PCI resources and disable device.
5063 * Inherited from PCI layer (may sleep).
5066 void ata_pci_remove_one (struct pci_dev *pdev)
5068 struct device *dev = pci_dev_to_dev(pdev);
5069 struct ata_host_set *host_set = dev_get_drvdata(dev);
5071 ata_host_set_remove(host_set);
5072 pci_release_regions(pdev);
5073 pci_disable_device(pdev);
5074 dev_set_drvdata(dev, NULL);
5077 /* move to PCI subsystem */
5078 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5080 unsigned long tmp = 0;
5082 switch (bits->width) {
5085 pci_read_config_byte(pdev, bits->reg, &tmp8);
5091 pci_read_config_word(pdev, bits->reg, &tmp16);
5097 pci_read_config_dword(pdev, bits->reg, &tmp32);
5108 return (tmp == bits->val) ? 1 : 0;
5110 #endif /* CONFIG_PCI */
5113 static int __init ata_init(void)
5115 ata_wq = create_workqueue("ata");
5119 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5123 static void __exit ata_exit(void)
5125 destroy_workqueue(ata_wq);
5128 module_init(ata_init);
5129 module_exit(ata_exit);
5131 static unsigned long ratelimit_time;
5132 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5134 int ata_ratelimit(void)
5137 unsigned long flags;
5139 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5141 if (time_after(jiffies, ratelimit_time)) {
5143 ratelimit_time = jiffies + (HZ/5);
5147 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5153 * libata is essentially a library of internal helper functions for
5154 * low-level ATA host controller drivers. As such, the API/ABI is
5155 * likely to change as new drivers are added and updated.
5156 * Do not depend on ABI/API stability.
5159 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5160 EXPORT_SYMBOL_GPL(ata_std_ports);
5161 EXPORT_SYMBOL_GPL(ata_device_add);
5162 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5163 EXPORT_SYMBOL_GPL(ata_sg_init);
5164 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5165 EXPORT_SYMBOL_GPL(ata_qc_complete);
5166 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5167 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5168 EXPORT_SYMBOL_GPL(ata_tf_load);
5169 EXPORT_SYMBOL_GPL(ata_tf_read);
5170 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5171 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5172 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5173 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5174 EXPORT_SYMBOL_GPL(ata_check_status);
5175 EXPORT_SYMBOL_GPL(ata_altstatus);
5176 EXPORT_SYMBOL_GPL(ata_exec_command);
5177 EXPORT_SYMBOL_GPL(ata_port_start);
5178 EXPORT_SYMBOL_GPL(ata_port_stop);
5179 EXPORT_SYMBOL_GPL(ata_host_stop);
5180 EXPORT_SYMBOL_GPL(ata_interrupt);
5181 EXPORT_SYMBOL_GPL(ata_qc_prep);
5182 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5183 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5184 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5185 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5186 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5187 EXPORT_SYMBOL_GPL(ata_port_probe);
5188 EXPORT_SYMBOL_GPL(sata_phy_reset);
5189 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5190 EXPORT_SYMBOL_GPL(ata_bus_reset);
5191 EXPORT_SYMBOL_GPL(ata_port_disable);
5192 EXPORT_SYMBOL_GPL(ata_ratelimit);
5193 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5194 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5195 EXPORT_SYMBOL_GPL(ata_scsi_error);
5196 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5197 EXPORT_SYMBOL_GPL(ata_scsi_release);
5198 EXPORT_SYMBOL_GPL(ata_host_intr);
5199 EXPORT_SYMBOL_GPL(ata_dev_classify);
5200 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5201 EXPORT_SYMBOL_GPL(ata_dev_config);
5202 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5204 EXPORT_SYMBOL_GPL(ata_timing_compute);
5205 EXPORT_SYMBOL_GPL(ata_timing_merge);
5208 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5209 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5210 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5211 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5212 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5213 #endif /* CONFIG_PCI */