2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_host.h>
56 #include <linux/libata.h>
58 #include <asm/semaphore.h>
59 #include <asm/byteorder.h>
63 static unsigned int ata_busy_sleep (struct ata_port *ap,
64 unsigned long tmout_pat,
66 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
67 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
68 static void ata_set_mode(struct ata_port *ap);
69 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
70 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
71 static int fgb(u32 bitmap);
72 static int ata_choose_xfer_mode(const struct ata_port *ap,
74 unsigned int *xfer_shift_out);
75 static void __ata_qc_complete(struct ata_queued_cmd *qc);
77 static unsigned int ata_unique_id = 1;
78 static struct workqueue_struct *ata_wq;
80 int atapi_enabled = 0;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
84 MODULE_AUTHOR("Jeff Garzik");
85 MODULE_DESCRIPTION("Library module for ATA devices");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
90 * ata_tf_load_pio - send taskfile registers to host controller
91 * @ap: Port to which output is sent
92 * @tf: ATA taskfile register set
94 * Outputs ATA taskfile to standard ATA host controller.
97 * Inherited from caller.
100 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
102 struct ata_ioports *ioaddr = &ap->ioaddr;
103 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
105 if (tf->ctl != ap->last_ctl) {
106 outb(tf->ctl, ioaddr->ctl_addr);
107 ap->last_ctl = tf->ctl;
111 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
112 outb(tf->hob_feature, ioaddr->feature_addr);
113 outb(tf->hob_nsect, ioaddr->nsect_addr);
114 outb(tf->hob_lbal, ioaddr->lbal_addr);
115 outb(tf->hob_lbam, ioaddr->lbam_addr);
116 outb(tf->hob_lbah, ioaddr->lbah_addr);
117 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
126 outb(tf->feature, ioaddr->feature_addr);
127 outb(tf->nsect, ioaddr->nsect_addr);
128 outb(tf->lbal, ioaddr->lbal_addr);
129 outb(tf->lbam, ioaddr->lbam_addr);
130 outb(tf->lbah, ioaddr->lbah_addr);
131 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
139 if (tf->flags & ATA_TFLAG_DEVICE) {
140 outb(tf->device, ioaddr->device_addr);
141 VPRINTK("device 0x%X\n", tf->device);
148 * ata_tf_load_mmio - send taskfile registers to host controller
149 * @ap: Port to which output is sent
150 * @tf: ATA taskfile register set
152 * Outputs ATA taskfile to standard ATA host controller using MMIO.
155 * Inherited from caller.
158 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
160 struct ata_ioports *ioaddr = &ap->ioaddr;
161 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
163 if (tf->ctl != ap->last_ctl) {
164 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
165 ap->last_ctl = tf->ctl;
169 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
170 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
171 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
172 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
173 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
174 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
175 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
184 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
185 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
186 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
187 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
188 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
189 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
197 if (tf->flags & ATA_TFLAG_DEVICE) {
198 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
199 VPRINTK("device 0x%X\n", tf->device);
207 * ata_tf_load - send taskfile registers to host controller
208 * @ap: Port to which output is sent
209 * @tf: ATA taskfile register set
211 * Outputs ATA taskfile to standard ATA host controller using MMIO
212 * or PIO as indicated by the ATA_FLAG_MMIO flag.
213 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
214 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
215 * hob_lbal, hob_lbam, and hob_lbah.
217 * This function waits for idle (!BUSY and !DRQ) after writing
218 * registers. If the control register has a new value, this
219 * function also waits for idle after writing control and before
220 * writing the remaining registers.
222 * May be used as the tf_load() entry in ata_port_operations.
225 * Inherited from caller.
227 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
229 if (ap->flags & ATA_FLAG_MMIO)
230 ata_tf_load_mmio(ap, tf);
232 ata_tf_load_pio(ap, tf);
236 * ata_exec_command_pio - issue ATA command to host controller
237 * @ap: port to which command is being issued
238 * @tf: ATA taskfile register set
240 * Issues PIO write to ATA command register, with proper
241 * synchronization with interrupt handler / other threads.
244 * spin_lock_irqsave(host_set lock)
247 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
249 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
251 outb(tf->command, ap->ioaddr.command_addr);
257 * ata_exec_command_mmio - issue ATA command to host controller
258 * @ap: port to which command is being issued
259 * @tf: ATA taskfile register set
261 * Issues MMIO write to ATA command register, with proper
262 * synchronization with interrupt handler / other threads.
265 * spin_lock_irqsave(host_set lock)
268 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
270 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
272 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
278 * ata_exec_command - issue ATA command to host controller
279 * @ap: port to which command is being issued
280 * @tf: ATA taskfile register set
282 * Issues PIO/MMIO write to ATA command register, with proper
283 * synchronization with interrupt handler / other threads.
286 * spin_lock_irqsave(host_set lock)
288 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
290 if (ap->flags & ATA_FLAG_MMIO)
291 ata_exec_command_mmio(ap, tf);
293 ata_exec_command_pio(ap, tf);
297 * ata_exec - issue ATA command to host controller
298 * @ap: port to which command is being issued
299 * @tf: ATA taskfile register set
301 * Issues PIO/MMIO write to ATA command register, with proper
302 * synchronization with interrupt handler / other threads.
305 * Obtains host_set lock.
308 static inline void ata_exec(struct ata_port *ap, const struct ata_taskfile *tf)
312 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
313 spin_lock_irqsave(&ap->host_set->lock, flags);
314 ap->ops->exec_command(ap, tf);
315 spin_unlock_irqrestore(&ap->host_set->lock, flags);
319 * ata_tf_to_host - issue ATA taskfile to host controller
320 * @ap: port to which command is being issued
321 * @tf: ATA taskfile register set
323 * Issues ATA taskfile register set to ATA host controller,
324 * with proper synchronization with interrupt handler and
328 * Obtains host_set lock.
331 static void ata_tf_to_host(struct ata_port *ap, const struct ata_taskfile *tf)
333 ap->ops->tf_load(ap, tf);
339 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
340 * @ap: port to which command is being issued
341 * @tf: ATA taskfile register set
343 * Issues ATA taskfile register set to ATA host controller,
344 * with proper synchronization with interrupt handler and
348 * spin_lock_irqsave(host_set lock)
351 void ata_tf_to_host_nolock(struct ata_port *ap, const struct ata_taskfile *tf)
353 ap->ops->tf_load(ap, tf);
354 ap->ops->exec_command(ap, tf);
358 * ata_tf_read_pio - input device's ATA taskfile shadow registers
359 * @ap: Port from which input is read
360 * @tf: ATA taskfile register set for storing input
362 * Reads ATA taskfile registers for currently-selected device
366 * Inherited from caller.
369 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
371 struct ata_ioports *ioaddr = &ap->ioaddr;
373 tf->nsect = inb(ioaddr->nsect_addr);
374 tf->lbal = inb(ioaddr->lbal_addr);
375 tf->lbam = inb(ioaddr->lbam_addr);
376 tf->lbah = inb(ioaddr->lbah_addr);
377 tf->device = inb(ioaddr->device_addr);
379 if (tf->flags & ATA_TFLAG_LBA48) {
380 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
381 tf->hob_feature = inb(ioaddr->error_addr);
382 tf->hob_nsect = inb(ioaddr->nsect_addr);
383 tf->hob_lbal = inb(ioaddr->lbal_addr);
384 tf->hob_lbam = inb(ioaddr->lbam_addr);
385 tf->hob_lbah = inb(ioaddr->lbah_addr);
390 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
391 * @ap: Port from which input is read
392 * @tf: ATA taskfile register set for storing input
394 * Reads ATA taskfile registers for currently-selected device
398 * Inherited from caller.
401 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
403 struct ata_ioports *ioaddr = &ap->ioaddr;
405 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
406 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
407 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
408 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
409 tf->device = readb((void __iomem *)ioaddr->device_addr);
411 if (tf->flags & ATA_TFLAG_LBA48) {
412 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
413 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
414 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
415 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
416 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
417 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
423 * ata_tf_read - input device's ATA taskfile shadow registers
424 * @ap: Port from which input is read
425 * @tf: ATA taskfile register set for storing input
427 * Reads ATA taskfile registers for currently-selected device
430 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
431 * is set, also reads the hob registers.
433 * May be used as the tf_read() entry in ata_port_operations.
436 * Inherited from caller.
438 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
440 if (ap->flags & ATA_FLAG_MMIO)
441 ata_tf_read_mmio(ap, tf);
443 ata_tf_read_pio(ap, tf);
447 * ata_check_status_pio - Read device status reg & clear interrupt
448 * @ap: port where the device is
450 * Reads ATA taskfile status register for currently-selected device
451 * and return its value. This also clears pending interrupts
455 * Inherited from caller.
457 static u8 ata_check_status_pio(struct ata_port *ap)
459 return inb(ap->ioaddr.status_addr);
463 * ata_check_status_mmio - Read device status reg & clear interrupt
464 * @ap: port where the device is
466 * Reads ATA taskfile status register for currently-selected device
467 * via MMIO and return its value. This also clears pending interrupts
471 * Inherited from caller.
473 static u8 ata_check_status_mmio(struct ata_port *ap)
475 return readb((void __iomem *) ap->ioaddr.status_addr);
480 * ata_check_status - Read device status reg & clear interrupt
481 * @ap: port where the device is
483 * Reads ATA taskfile status register for currently-selected device
484 * and return its value. This also clears pending interrupts
487 * May be used as the check_status() entry in ata_port_operations.
490 * Inherited from caller.
492 u8 ata_check_status(struct ata_port *ap)
494 if (ap->flags & ATA_FLAG_MMIO)
495 return ata_check_status_mmio(ap);
496 return ata_check_status_pio(ap);
501 * ata_altstatus - Read device alternate status reg
502 * @ap: port where the device is
504 * Reads ATA taskfile alternate status register for
505 * currently-selected device and return its value.
507 * Note: may NOT be used as the check_altstatus() entry in
508 * ata_port_operations.
511 * Inherited from caller.
513 u8 ata_altstatus(struct ata_port *ap)
515 if (ap->ops->check_altstatus)
516 return ap->ops->check_altstatus(ap);
518 if (ap->flags & ATA_FLAG_MMIO)
519 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
520 return inb(ap->ioaddr.altstatus_addr);
525 * ata_chk_err - Read device error reg
526 * @ap: port where the device is
528 * Reads ATA taskfile error register for
529 * currently-selected device and return its value.
531 * Note: may NOT be used as the check_err() entry in
532 * ata_port_operations.
535 * Inherited from caller.
537 u8 ata_chk_err(struct ata_port *ap)
539 if (ap->ops->check_err)
540 return ap->ops->check_err(ap);
542 if (ap->flags & ATA_FLAG_MMIO) {
543 return readb((void __iomem *) ap->ioaddr.error_addr);
545 return inb(ap->ioaddr.error_addr);
549 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
550 * @tf: Taskfile to convert
551 * @fis: Buffer into which data will output
552 * @pmp: Port multiplier port
554 * Converts a standard ATA taskfile to a Serial ATA
555 * FIS structure (Register - Host to Device).
558 * Inherited from caller.
561 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
563 fis[0] = 0x27; /* Register - Host to Device FIS */
564 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
565 bit 7 indicates Command FIS */
566 fis[2] = tf->command;
567 fis[3] = tf->feature;
574 fis[8] = tf->hob_lbal;
575 fis[9] = tf->hob_lbam;
576 fis[10] = tf->hob_lbah;
577 fis[11] = tf->hob_feature;
580 fis[13] = tf->hob_nsect;
591 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
592 * @fis: Buffer from which data will be input
593 * @tf: Taskfile to output
595 * Converts a standard ATA taskfile to a Serial ATA
596 * FIS structure (Register - Host to Device).
599 * Inherited from caller.
602 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
604 tf->command = fis[2]; /* status */
605 tf->feature = fis[3]; /* error */
612 tf->hob_lbal = fis[8];
613 tf->hob_lbam = fis[9];
614 tf->hob_lbah = fis[10];
617 tf->hob_nsect = fis[13];
620 static const u8 ata_rw_cmds[] = {
624 ATA_CMD_READ_MULTI_EXT,
625 ATA_CMD_WRITE_MULTI_EXT,
629 ATA_CMD_PIO_READ_EXT,
630 ATA_CMD_PIO_WRITE_EXT,
639 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
640 * @qc: command to examine and configure
642 * Examine the device configuration and tf->flags to calculate
643 * the proper read/write commands and protocol to use.
648 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
650 struct ata_taskfile *tf = &qc->tf;
651 struct ata_device *dev = qc->dev;
653 int index, lba48, write;
655 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
656 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
658 if (dev->flags & ATA_DFLAG_PIO) {
659 tf->protocol = ATA_PROT_PIO;
660 index = dev->multi_count ? 0 : 4;
662 tf->protocol = ATA_PROT_DMA;
666 tf->command = ata_rw_cmds[index + lba48 + write];
669 static const char * xfer_mode_str[] = {
689 * ata_udma_string - convert UDMA bit offset to string
690 * @mask: mask of bits supported; only highest bit counts.
692 * Determine string which represents the highest speed
693 * (highest bit in @udma_mask).
699 * Constant C string representing highest speed listed in
700 * @udma_mask, or the constant C string "<n/a>".
703 static const char *ata_mode_string(unsigned int mask)
707 for (i = 7; i >= 0; i--)
710 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
713 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
720 return xfer_mode_str[i];
724 * ata_pio_devchk - PATA device presence detection
725 * @ap: ATA channel to examine
726 * @device: Device to examine (starting at zero)
728 * This technique was originally described in
729 * Hale Landis's ATADRVR (www.ata-atapi.com), and
730 * later found its way into the ATA/ATAPI spec.
732 * Write a pattern to the ATA shadow registers,
733 * and if a device is present, it will respond by
734 * correctly storing and echoing back the
735 * ATA shadow register contents.
741 static unsigned int ata_pio_devchk(struct ata_port *ap,
744 struct ata_ioports *ioaddr = &ap->ioaddr;
747 ap->ops->dev_select(ap, device);
749 outb(0x55, ioaddr->nsect_addr);
750 outb(0xaa, ioaddr->lbal_addr);
752 outb(0xaa, ioaddr->nsect_addr);
753 outb(0x55, ioaddr->lbal_addr);
755 outb(0x55, ioaddr->nsect_addr);
756 outb(0xaa, ioaddr->lbal_addr);
758 nsect = inb(ioaddr->nsect_addr);
759 lbal = inb(ioaddr->lbal_addr);
761 if ((nsect == 0x55) && (lbal == 0xaa))
762 return 1; /* we found a device */
764 return 0; /* nothing found */
768 * ata_mmio_devchk - PATA device presence detection
769 * @ap: ATA channel to examine
770 * @device: Device to examine (starting at zero)
772 * This technique was originally described in
773 * Hale Landis's ATADRVR (www.ata-atapi.com), and
774 * later found its way into the ATA/ATAPI spec.
776 * Write a pattern to the ATA shadow registers,
777 * and if a device is present, it will respond by
778 * correctly storing and echoing back the
779 * ATA shadow register contents.
785 static unsigned int ata_mmio_devchk(struct ata_port *ap,
788 struct ata_ioports *ioaddr = &ap->ioaddr;
791 ap->ops->dev_select(ap, device);
793 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
794 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
796 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
797 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
799 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
800 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
802 nsect = readb((void __iomem *) ioaddr->nsect_addr);
803 lbal = readb((void __iomem *) ioaddr->lbal_addr);
805 if ((nsect == 0x55) && (lbal == 0xaa))
806 return 1; /* we found a device */
808 return 0; /* nothing found */
812 * ata_devchk - PATA device presence detection
813 * @ap: ATA channel to examine
814 * @device: Device to examine (starting at zero)
816 * Dispatch ATA device presence detection, depending
817 * on whether we are using PIO or MMIO to talk to the
818 * ATA shadow registers.
824 static unsigned int ata_devchk(struct ata_port *ap,
827 if (ap->flags & ATA_FLAG_MMIO)
828 return ata_mmio_devchk(ap, device);
829 return ata_pio_devchk(ap, device);
833 * ata_dev_classify - determine device type based on ATA-spec signature
834 * @tf: ATA taskfile register set for device to be identified
836 * Determine from taskfile register contents whether a device is
837 * ATA or ATAPI, as per "Signature and persistence" section
838 * of ATA/PI spec (volume 1, sect 5.14).
844 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
845 * the event of failure.
848 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
850 /* Apple's open source Darwin code hints that some devices only
851 * put a proper signature into the LBA mid/high registers,
852 * So, we only check those. It's sufficient for uniqueness.
855 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
856 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
857 DPRINTK("found ATA device by sig\n");
861 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
862 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
863 DPRINTK("found ATAPI device by sig\n");
864 return ATA_DEV_ATAPI;
867 DPRINTK("unknown device\n");
868 return ATA_DEV_UNKNOWN;
872 * ata_dev_try_classify - Parse returned ATA device signature
873 * @ap: ATA channel to examine
874 * @device: Device to examine (starting at zero)
876 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
877 * an ATA/ATAPI-defined set of values is placed in the ATA
878 * shadow registers, indicating the results of device detection
881 * Select the ATA device, and read the values from the ATA shadow
882 * registers. Then parse according to the Error register value,
883 * and the spec-defined values examined by ata_dev_classify().
889 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
891 struct ata_device *dev = &ap->device[device];
892 struct ata_taskfile tf;
896 ap->ops->dev_select(ap, device);
898 memset(&tf, 0, sizeof(tf));
900 err = ata_chk_err(ap);
901 ap->ops->tf_read(ap, &tf);
903 dev->class = ATA_DEV_NONE;
905 /* see if device passed diags */
908 else if ((device == 0) && (err == 0x81))
913 /* determine if device if ATA or ATAPI */
914 class = ata_dev_classify(&tf);
915 if (class == ATA_DEV_UNKNOWN)
917 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
926 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
927 * @id: IDENTIFY DEVICE results we will examine
928 * @s: string into which data is output
929 * @ofs: offset into identify device page
930 * @len: length of string to return. must be an even number.
932 * The strings in the IDENTIFY DEVICE page are broken up into
933 * 16-bit chunks. Run through the string, and output each
934 * 8-bit chunk linearly, regardless of platform.
940 void ata_dev_id_string(const u16 *id, unsigned char *s,
941 unsigned int ofs, unsigned int len)
961 * ata_noop_dev_select - Select device 0/1 on ATA bus
962 * @ap: ATA channel to manipulate
963 * @device: ATA device (numbered from zero) to select
965 * This function performs no actual function.
967 * May be used as the dev_select() entry in ata_port_operations.
972 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
978 * ata_std_dev_select - Select device 0/1 on ATA bus
979 * @ap: ATA channel to manipulate
980 * @device: ATA device (numbered from zero) to select
982 * Use the method defined in the ATA specification to
983 * make either device 0, or device 1, active on the
984 * ATA channel. Works with both PIO and MMIO.
986 * May be used as the dev_select() entry in ata_port_operations.
992 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
997 tmp = ATA_DEVICE_OBS;
999 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1001 if (ap->flags & ATA_FLAG_MMIO) {
1002 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1004 outb(tmp, ap->ioaddr.device_addr);
1006 ata_pause(ap); /* needed; also flushes, for mmio */
1010 * ata_dev_select - Select device 0/1 on ATA bus
1011 * @ap: ATA channel to manipulate
1012 * @device: ATA device (numbered from zero) to select
1013 * @wait: non-zero to wait for Status register BSY bit to clear
1014 * @can_sleep: non-zero if context allows sleeping
1016 * Use the method defined in the ATA specification to
1017 * make either device 0, or device 1, active on the
1020 * This is a high-level version of ata_std_dev_select(),
1021 * which additionally provides the services of inserting
1022 * the proper pauses and status polling, where needed.
1028 void ata_dev_select(struct ata_port *ap, unsigned int device,
1029 unsigned int wait, unsigned int can_sleep)
1031 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1032 ap->id, device, wait);
1037 ap->ops->dev_select(ap, device);
1040 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1047 * ata_dump_id - IDENTIFY DEVICE info debugging output
1048 * @dev: Device whose IDENTIFY DEVICE page we will dump
1050 * Dump selected 16-bit words from a detected device's
1051 * IDENTIFY PAGE page.
1057 static inline void ata_dump_id(const struct ata_device *dev)
1059 DPRINTK("49==0x%04x "
1069 DPRINTK("80==0x%04x "
1079 DPRINTK("88==0x%04x "
1086 * Compute the PIO modes available for this device. This is not as
1087 * trivial as it seems if we must consider early devices correctly.
1089 * FIXME: pre IDE drive timing (do we care ?).
1092 static unsigned int ata_pio_modes(const struct ata_device *adev)
1096 /* Usual case. Word 53 indicates word 88 is valid */
1097 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1098 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1104 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1105 for the maximum. Turn it into a mask and return it */
1106 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1111 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1112 * @ap: port on which device we wish to probe resides
1113 * @device: device bus address, starting at zero
1115 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1116 * command, and read back the 512-byte device information page.
1117 * The device information page is fed to us via the standard
1118 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1119 * using standard PIO-IN paths)
1121 * After reading the device information page, we use several
1122 * bits of information from it to initialize data structures
1123 * that will be used during the lifetime of the ata_device.
1124 * Other data from the info page is used to disqualify certain
1125 * older ATA devices we do not wish to support.
1128 * Inherited from caller. Some functions called by this function
1129 * obtain the host_set lock.
1132 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1134 struct ata_device *dev = &ap->device[device];
1135 unsigned int major_version;
1137 unsigned long xfer_modes;
1139 unsigned int using_edd;
1140 DECLARE_COMPLETION(wait);
1141 struct ata_queued_cmd *qc;
1142 unsigned long flags;
1145 if (!ata_dev_present(dev)) {
1146 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1151 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1156 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1158 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1159 dev->class == ATA_DEV_NONE);
1161 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1163 qc = ata_qc_new_init(ap, dev);
1166 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1167 qc->dma_dir = DMA_FROM_DEVICE;
1168 qc->tf.protocol = ATA_PROT_PIO;
1172 if (dev->class == ATA_DEV_ATA) {
1173 qc->tf.command = ATA_CMD_ID_ATA;
1174 DPRINTK("do ATA identify\n");
1176 qc->tf.command = ATA_CMD_ID_ATAPI;
1177 DPRINTK("do ATAPI identify\n");
1180 qc->waiting = &wait;
1181 qc->complete_fn = ata_qc_complete_noop;
1183 spin_lock_irqsave(&ap->host_set->lock, flags);
1184 rc = ata_qc_issue(qc);
1185 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1190 wait_for_completion(&wait);
1192 status = ata_chk_status(ap);
1193 if (status & ATA_ERR) {
1195 * arg! EDD works for all test cases, but seems to return
1196 * the ATA signature for some ATAPI devices. Until the
1197 * reason for this is found and fixed, we fix up the mess
1198 * here. If IDENTIFY DEVICE returns command aborted
1199 * (as ATAPI devices do), then we issue an
1200 * IDENTIFY PACKET DEVICE.
1202 * ATA software reset (SRST, the default) does not appear
1203 * to have this problem.
1205 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1206 u8 err = ata_chk_err(ap);
1207 if (err & ATA_ABORTED) {
1208 dev->class = ATA_DEV_ATAPI;
1219 swap_buf_le16(dev->id, ATA_ID_WORDS);
1221 /* print device capabilities */
1222 printk(KERN_DEBUG "ata%u: dev %u cfg "
1223 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1224 ap->id, device, dev->id[49],
1225 dev->id[82], dev->id[83], dev->id[84],
1226 dev->id[85], dev->id[86], dev->id[87],
1230 * common ATA, ATAPI feature tests
1233 /* we require DMA support (bits 8 of word 49) */
1234 if (!ata_id_has_dma(dev->id)) {
1235 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1239 /* quick-n-dirty find max transfer mode; for printk only */
1240 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1242 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1244 xfer_modes = ata_pio_modes(dev);
1248 /* ATA-specific feature tests */
1249 if (dev->class == ATA_DEV_ATA) {
1250 if (!ata_id_is_ata(dev->id)) /* sanity check */
1253 /* get major version */
1254 tmp = dev->id[ATA_ID_MAJOR_VER];
1255 for (major_version = 14; major_version >= 1; major_version--)
1256 if (tmp & (1 << major_version))
1260 * The exact sequence expected by certain pre-ATA4 drives is:
1263 * INITIALIZE DEVICE PARAMETERS
1265 * Some drives were very specific about that exact sequence.
1267 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1268 ata_dev_init_params(ap, dev);
1270 /* current CHS translation info (id[53-58]) might be
1271 * changed. reread the identify device info.
1273 ata_dev_reread_id(ap, dev);
1276 if (ata_id_has_lba(dev->id)) {
1277 dev->flags |= ATA_DFLAG_LBA;
1279 if (ata_id_has_lba48(dev->id)) {
1280 dev->flags |= ATA_DFLAG_LBA48;
1281 dev->n_sectors = ata_id_u64(dev->id, 100);
1283 dev->n_sectors = ata_id_u32(dev->id, 60);
1286 /* print device info to dmesg */
1287 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1290 ata_mode_string(xfer_modes),
1291 (unsigned long long)dev->n_sectors,
1292 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1296 /* Default translation */
1297 dev->cylinders = dev->id[1];
1298 dev->heads = dev->id[3];
1299 dev->sectors = dev->id[6];
1300 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1302 if (ata_id_current_chs_valid(dev->id)) {
1303 /* Current CHS translation is valid. */
1304 dev->cylinders = dev->id[54];
1305 dev->heads = dev->id[55];
1306 dev->sectors = dev->id[56];
1308 dev->n_sectors = ata_id_u32(dev->id, 57);
1311 /* print device info to dmesg */
1312 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1315 ata_mode_string(xfer_modes),
1316 (unsigned long long)dev->n_sectors,
1317 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1321 ap->host->max_cmd_len = 16;
1324 /* ATAPI-specific feature tests */
1326 if (ata_id_is_ata(dev->id)) /* sanity check */
1329 rc = atapi_cdb_len(dev->id);
1330 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1331 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1334 ap->cdb_len = (unsigned int) rc;
1335 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1337 /* print device info to dmesg */
1338 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1340 ata_mode_string(xfer_modes));
1343 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1347 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1350 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1351 DPRINTK("EXIT, err\n");
1355 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1357 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1361 * ata_dev_config - Run device specific handlers and check for
1362 * SATA->PATA bridges
1369 void ata_dev_config(struct ata_port *ap, unsigned int i)
1371 /* limit bridge transfers to udma5, 200 sectors */
1372 if (ata_dev_knobble(ap)) {
1373 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1374 ap->id, ap->device->devno);
1375 ap->udma_mask &= ATA_UDMA5;
1376 ap->host->max_sectors = ATA_MAX_SECTORS;
1377 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1378 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1381 if (ap->ops->dev_config)
1382 ap->ops->dev_config(ap, &ap->device[i]);
1386 * ata_bus_probe - Reset and probe ATA bus
1389 * Master ATA bus probing function. Initiates a hardware-dependent
1390 * bus reset, then attempts to identify any devices found on
1394 * PCI/etc. bus probe sem.
1397 * Zero on success, non-zero on error.
1400 static int ata_bus_probe(struct ata_port *ap)
1402 unsigned int i, found = 0;
1404 ap->ops->phy_reset(ap);
1405 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1408 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1409 ata_dev_identify(ap, i);
1410 if (ata_dev_present(&ap->device[i])) {
1412 ata_dev_config(ap,i);
1416 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1417 goto err_out_disable;
1420 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1421 goto err_out_disable;
1426 ap->ops->port_disable(ap);
1432 * ata_port_probe - Mark port as enabled
1433 * @ap: Port for which we indicate enablement
1435 * Modify @ap data structure such that the system
1436 * thinks that the entire port is enabled.
1438 * LOCKING: host_set lock, or some other form of
1442 void ata_port_probe(struct ata_port *ap)
1444 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1448 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1449 * @ap: SATA port associated with target SATA PHY.
1451 * This function issues commands to standard SATA Sxxx
1452 * PHY registers, to wake up the phy (and device), and
1453 * clear any reset condition.
1456 * PCI/etc. bus probe sem.
1459 void __sata_phy_reset(struct ata_port *ap)
1462 unsigned long timeout = jiffies + (HZ * 5);
1464 if (ap->flags & ATA_FLAG_SATA_RESET) {
1465 /* issue phy wake/reset */
1466 scr_write_flush(ap, SCR_CONTROL, 0x301);
1467 /* Couldn't find anything in SATA I/II specs, but
1468 * AHCI-1.1 10.4.2 says at least 1 ms. */
1471 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1473 /* wait for phy to become ready, if necessary */
1476 sstatus = scr_read(ap, SCR_STATUS);
1477 if ((sstatus & 0xf) != 1)
1479 } while (time_before(jiffies, timeout));
1481 /* TODO: phy layer with polling, timeouts, etc. */
1482 if (sata_dev_present(ap))
1485 sstatus = scr_read(ap, SCR_STATUS);
1486 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1488 ata_port_disable(ap);
1491 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1494 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1495 ata_port_disable(ap);
1499 ap->cbl = ATA_CBL_SATA;
1503 * sata_phy_reset - Reset SATA bus.
1504 * @ap: SATA port associated with target SATA PHY.
1506 * This function resets the SATA bus, and then probes
1507 * the bus for devices.
1510 * PCI/etc. bus probe sem.
1513 void sata_phy_reset(struct ata_port *ap)
1515 __sata_phy_reset(ap);
1516 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1522 * ata_port_disable - Disable port.
1523 * @ap: Port to be disabled.
1525 * Modify @ap data structure such that the system
1526 * thinks that the entire port is disabled, and should
1527 * never attempt to probe or communicate with devices
1530 * LOCKING: host_set lock, or some other form of
1534 void ata_port_disable(struct ata_port *ap)
1536 ap->device[0].class = ATA_DEV_NONE;
1537 ap->device[1].class = ATA_DEV_NONE;
1538 ap->flags |= ATA_FLAG_PORT_DISABLED;
1542 * This mode timing computation functionality is ported over from
1543 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1546 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1547 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1548 * for PIO 5, which is a nonstandard extension and UDMA6, which
1549 * is currently supported only by Maxtor drives.
1552 static const struct ata_timing ata_timing[] = {
1554 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1555 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1556 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1557 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1559 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1560 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1561 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1563 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1565 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1566 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1567 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1569 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1570 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1571 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1573 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1574 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1575 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1577 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1578 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1579 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1581 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1586 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1587 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1589 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1591 q->setup = EZ(t->setup * 1000, T);
1592 q->act8b = EZ(t->act8b * 1000, T);
1593 q->rec8b = EZ(t->rec8b * 1000, T);
1594 q->cyc8b = EZ(t->cyc8b * 1000, T);
1595 q->active = EZ(t->active * 1000, T);
1596 q->recover = EZ(t->recover * 1000, T);
1597 q->cycle = EZ(t->cycle * 1000, T);
1598 q->udma = EZ(t->udma * 1000, UT);
1601 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1602 struct ata_timing *m, unsigned int what)
1604 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1605 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1606 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1607 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1608 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1609 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1610 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1611 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1614 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1616 const struct ata_timing *t;
1618 for (t = ata_timing; t->mode != speed; t++)
1619 if (t->mode == 0xFF)
1624 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1625 struct ata_timing *t, int T, int UT)
1627 const struct ata_timing *s;
1628 struct ata_timing p;
1634 if (!(s = ata_timing_find_mode(speed)))
1638 * If the drive is an EIDE drive, it can tell us it needs extended
1639 * PIO/MW_DMA cycle timing.
1642 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1643 memset(&p, 0, sizeof(p));
1644 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1645 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1646 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1647 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1648 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1650 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1654 * Convert the timing to bus clock counts.
1657 ata_timing_quantize(s, t, T, UT);
1660 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1661 * and some other commands. We have to ensure that the DMA cycle timing is
1662 * slower/equal than the fastest PIO timing.
1665 if (speed > XFER_PIO_4) {
1666 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1667 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1671 * Lenghten active & recovery time so that cycle time is correct.
1674 if (t->act8b + t->rec8b < t->cyc8b) {
1675 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1676 t->rec8b = t->cyc8b - t->act8b;
1679 if (t->active + t->recover < t->cycle) {
1680 t->active += (t->cycle - (t->active + t->recover)) / 2;
1681 t->recover = t->cycle - t->active;
1687 static const struct {
1690 } xfer_mode_classes[] = {
1691 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1692 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1693 { ATA_SHIFT_PIO, XFER_PIO_0 },
1696 static inline u8 base_from_shift(unsigned int shift)
1700 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1701 if (xfer_mode_classes[i].shift == shift)
1702 return xfer_mode_classes[i].base;
1707 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1712 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1715 if (dev->xfer_shift == ATA_SHIFT_PIO)
1716 dev->flags |= ATA_DFLAG_PIO;
1718 ata_dev_set_xfermode(ap, dev);
1720 base = base_from_shift(dev->xfer_shift);
1721 ofs = dev->xfer_mode - base;
1722 idx = ofs + dev->xfer_shift;
1723 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1725 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1726 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1728 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1729 ap->id, dev->devno, xfer_mode_str[idx]);
1732 static int ata_host_set_pio(struct ata_port *ap)
1738 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1741 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1745 base = base_from_shift(ATA_SHIFT_PIO);
1746 xfer_mode = base + x;
1748 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1749 (int)base, (int)xfer_mode, mask, x);
1751 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1752 struct ata_device *dev = &ap->device[i];
1753 if (ata_dev_present(dev)) {
1754 dev->pio_mode = xfer_mode;
1755 dev->xfer_mode = xfer_mode;
1756 dev->xfer_shift = ATA_SHIFT_PIO;
1757 if (ap->ops->set_piomode)
1758 ap->ops->set_piomode(ap, dev);
1765 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1766 unsigned int xfer_shift)
1770 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1771 struct ata_device *dev = &ap->device[i];
1772 if (ata_dev_present(dev)) {
1773 dev->dma_mode = xfer_mode;
1774 dev->xfer_mode = xfer_mode;
1775 dev->xfer_shift = xfer_shift;
1776 if (ap->ops->set_dmamode)
1777 ap->ops->set_dmamode(ap, dev);
1783 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1784 * @ap: port on which timings will be programmed
1786 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1789 * PCI/etc. bus probe sem.
1792 static void ata_set_mode(struct ata_port *ap)
1794 unsigned int xfer_shift;
1798 /* step 1: always set host PIO timings */
1799 rc = ata_host_set_pio(ap);
1803 /* step 2: choose the best data xfer mode */
1804 xfer_mode = xfer_shift = 0;
1805 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1809 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1810 if (xfer_shift != ATA_SHIFT_PIO)
1811 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1813 /* step 4: update devices' xfer mode */
1814 ata_dev_set_mode(ap, &ap->device[0]);
1815 ata_dev_set_mode(ap, &ap->device[1]);
1817 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1820 if (ap->ops->post_set_mode)
1821 ap->ops->post_set_mode(ap);
1826 ata_port_disable(ap);
1830 * ata_busy_sleep - sleep until BSY clears, or timeout
1831 * @ap: port containing status register to be polled
1832 * @tmout_pat: impatience timeout
1833 * @tmout: overall timeout
1835 * Sleep until ATA Status register bit BSY clears,
1836 * or a timeout occurs.
1842 static unsigned int ata_busy_sleep (struct ata_port *ap,
1843 unsigned long tmout_pat,
1844 unsigned long tmout)
1846 unsigned long timer_start, timeout;
1849 status = ata_busy_wait(ap, ATA_BUSY, 300);
1850 timer_start = jiffies;
1851 timeout = timer_start + tmout_pat;
1852 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1854 status = ata_busy_wait(ap, ATA_BUSY, 3);
1857 if (status & ATA_BUSY)
1858 printk(KERN_WARNING "ata%u is slow to respond, "
1859 "please be patient\n", ap->id);
1861 timeout = timer_start + tmout;
1862 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1864 status = ata_chk_status(ap);
1867 if (status & ATA_BUSY) {
1868 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1869 ap->id, tmout / HZ);
1876 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1878 struct ata_ioports *ioaddr = &ap->ioaddr;
1879 unsigned int dev0 = devmask & (1 << 0);
1880 unsigned int dev1 = devmask & (1 << 1);
1881 unsigned long timeout;
1883 /* if device 0 was found in ata_devchk, wait for its
1887 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1889 /* if device 1 was found in ata_devchk, wait for
1890 * register access, then wait for BSY to clear
1892 timeout = jiffies + ATA_TMOUT_BOOT;
1896 ap->ops->dev_select(ap, 1);
1897 if (ap->flags & ATA_FLAG_MMIO) {
1898 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1899 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1901 nsect = inb(ioaddr->nsect_addr);
1902 lbal = inb(ioaddr->lbal_addr);
1904 if ((nsect == 1) && (lbal == 1))
1906 if (time_after(jiffies, timeout)) {
1910 msleep(50); /* give drive a breather */
1913 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1915 /* is all this really necessary? */
1916 ap->ops->dev_select(ap, 0);
1918 ap->ops->dev_select(ap, 1);
1920 ap->ops->dev_select(ap, 0);
1924 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1925 * @ap: Port to reset and probe
1927 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1928 * probe the bus. Not often used these days.
1931 * PCI/etc. bus probe sem.
1935 static unsigned int ata_bus_edd(struct ata_port *ap)
1937 struct ata_taskfile tf;
1939 /* set up execute-device-diag (bus reset) taskfile */
1940 /* also, take interrupts to a known state (disabled) */
1941 DPRINTK("execute-device-diag\n");
1942 ata_tf_init(ap, &tf, 0);
1944 tf.command = ATA_CMD_EDD;
1945 tf.protocol = ATA_PROT_NODATA;
1948 ata_tf_to_host(ap, &tf);
1950 /* spec says at least 2ms. but who knows with those
1951 * crazy ATAPI devices...
1955 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1958 static unsigned int ata_bus_softreset(struct ata_port *ap,
1959 unsigned int devmask)
1961 struct ata_ioports *ioaddr = &ap->ioaddr;
1963 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1965 /* software reset. causes dev0 to be selected */
1966 if (ap->flags & ATA_FLAG_MMIO) {
1967 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1968 udelay(20); /* FIXME: flush */
1969 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1970 udelay(20); /* FIXME: flush */
1971 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1973 outb(ap->ctl, ioaddr->ctl_addr);
1975 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1977 outb(ap->ctl, ioaddr->ctl_addr);
1980 /* spec mandates ">= 2ms" before checking status.
1981 * We wait 150ms, because that was the magic delay used for
1982 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1983 * between when the ATA command register is written, and then
1984 * status is checked. Because waiting for "a while" before
1985 * checking status is fine, post SRST, we perform this magic
1986 * delay here as well.
1990 ata_bus_post_reset(ap, devmask);
1996 * ata_bus_reset - reset host port and associated ATA channel
1997 * @ap: port to reset
1999 * This is typically the first time we actually start issuing
2000 * commands to the ATA channel. We wait for BSY to clear, then
2001 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2002 * result. Determine what devices, if any, are on the channel
2003 * by looking at the device 0/1 error register. Look at the signature
2004 * stored in each device's taskfile registers, to determine if
2005 * the device is ATA or ATAPI.
2008 * PCI/etc. bus probe sem.
2009 * Obtains host_set lock.
2012 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2015 void ata_bus_reset(struct ata_port *ap)
2017 struct ata_ioports *ioaddr = &ap->ioaddr;
2018 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2020 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2022 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2024 /* determine if device 0/1 are present */
2025 if (ap->flags & ATA_FLAG_SATA_RESET)
2028 dev0 = ata_devchk(ap, 0);
2030 dev1 = ata_devchk(ap, 1);
2034 devmask |= (1 << 0);
2036 devmask |= (1 << 1);
2038 /* select device 0 again */
2039 ap->ops->dev_select(ap, 0);
2041 /* issue bus reset */
2042 if (ap->flags & ATA_FLAG_SRST)
2043 rc = ata_bus_softreset(ap, devmask);
2044 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2045 /* set up device control */
2046 if (ap->flags & ATA_FLAG_MMIO)
2047 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2049 outb(ap->ctl, ioaddr->ctl_addr);
2050 rc = ata_bus_edd(ap);
2057 * determine by signature whether we have ATA or ATAPI devices
2059 err = ata_dev_try_classify(ap, 0);
2060 if ((slave_possible) && (err != 0x81))
2061 ata_dev_try_classify(ap, 1);
2063 /* re-enable interrupts */
2064 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2067 /* is double-select really necessary? */
2068 if (ap->device[1].class != ATA_DEV_NONE)
2069 ap->ops->dev_select(ap, 1);
2070 if (ap->device[0].class != ATA_DEV_NONE)
2071 ap->ops->dev_select(ap, 0);
2073 /* if no devices were detected, disable this port */
2074 if ((ap->device[0].class == ATA_DEV_NONE) &&
2075 (ap->device[1].class == ATA_DEV_NONE))
2078 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2079 /* set up device control for ATA_FLAG_SATA_RESET */
2080 if (ap->flags & ATA_FLAG_MMIO)
2081 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2083 outb(ap->ctl, ioaddr->ctl_addr);
2090 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2091 ap->ops->port_disable(ap);
2096 static void ata_pr_blacklisted(const struct ata_port *ap,
2097 const struct ata_device *dev)
2099 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2100 ap->id, dev->devno);
2103 static const char * ata_dma_blacklist [] = {
2122 "Toshiba CD-ROM XM-6202B",
2123 "TOSHIBA CD-ROM XM-1702BC",
2125 "E-IDE CD-ROM CR-840",
2128 "SAMSUNG CD-ROM SC-148C",
2129 "SAMSUNG CD-ROM SC",
2131 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2135 static int ata_dma_blacklisted(const struct ata_device *dev)
2137 unsigned char model_num[40];
2142 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2145 len = strnlen(s, sizeof(model_num));
2147 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2148 while ((len > 0) && (s[len - 1] == ' ')) {
2153 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2154 if (!strncmp(ata_dma_blacklist[i], s, len))
2160 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2162 const struct ata_device *master, *slave;
2165 master = &ap->device[0];
2166 slave = &ap->device[1];
2168 assert (ata_dev_present(master) || ata_dev_present(slave));
2170 if (shift == ATA_SHIFT_UDMA) {
2171 mask = ap->udma_mask;
2172 if (ata_dev_present(master)) {
2173 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2174 if (ata_dma_blacklisted(master)) {
2176 ata_pr_blacklisted(ap, master);
2179 if (ata_dev_present(slave)) {
2180 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2181 if (ata_dma_blacklisted(slave)) {
2183 ata_pr_blacklisted(ap, slave);
2187 else if (shift == ATA_SHIFT_MWDMA) {
2188 mask = ap->mwdma_mask;
2189 if (ata_dev_present(master)) {
2190 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2191 if (ata_dma_blacklisted(master)) {
2193 ata_pr_blacklisted(ap, master);
2196 if (ata_dev_present(slave)) {
2197 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2198 if (ata_dma_blacklisted(slave)) {
2200 ata_pr_blacklisted(ap, slave);
2204 else if (shift == ATA_SHIFT_PIO) {
2205 mask = ap->pio_mask;
2206 if (ata_dev_present(master)) {
2207 /* spec doesn't return explicit support for
2208 * PIO0-2, so we fake it
2210 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2215 if (ata_dev_present(slave)) {
2216 /* spec doesn't return explicit support for
2217 * PIO0-2, so we fake it
2219 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2226 mask = 0xffffffff; /* shut up compiler warning */
2233 /* find greatest bit */
2234 static int fgb(u32 bitmap)
2239 for (i = 0; i < 32; i++)
2240 if (bitmap & (1 << i))
2247 * ata_choose_xfer_mode - attempt to find best transfer mode
2248 * @ap: Port for which an xfer mode will be selected
2249 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2250 * @xfer_shift_out: (output) bit shift that selects this mode
2252 * Based on host and device capabilities, determine the
2253 * maximum transfer mode that is amenable to all.
2256 * PCI/etc. bus probe sem.
2259 * Zero on success, negative on error.
2262 static int ata_choose_xfer_mode(const struct ata_port *ap,
2264 unsigned int *xfer_shift_out)
2266 unsigned int mask, shift;
2269 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2270 shift = xfer_mode_classes[i].shift;
2271 mask = ata_get_mode_mask(ap, shift);
2275 *xfer_mode_out = xfer_mode_classes[i].base + x;
2276 *xfer_shift_out = shift;
2285 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2286 * @ap: Port associated with device @dev
2287 * @dev: Device to which command will be sent
2289 * Issue SET FEATURES - XFER MODE command to device @dev
2293 * PCI/etc. bus probe sem.
2296 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2298 DECLARE_COMPLETION(wait);
2299 struct ata_queued_cmd *qc;
2301 unsigned long flags;
2303 /* set up set-features taskfile */
2304 DPRINTK("set features - xfer mode\n");
2306 qc = ata_qc_new_init(ap, dev);
2309 qc->tf.command = ATA_CMD_SET_FEATURES;
2310 qc->tf.feature = SETFEATURES_XFER;
2311 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2312 qc->tf.protocol = ATA_PROT_NODATA;
2313 qc->tf.nsect = dev->xfer_mode;
2315 qc->waiting = &wait;
2316 qc->complete_fn = ata_qc_complete_noop;
2318 spin_lock_irqsave(&ap->host_set->lock, flags);
2319 rc = ata_qc_issue(qc);
2320 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2323 ata_port_disable(ap);
2325 wait_for_completion(&wait);
2331 * ata_dev_reread_id - Reread the device identify device info
2332 * @ap: port where the device is
2333 * @dev: device to reread the identify device info
2338 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2340 DECLARE_COMPLETION(wait);
2341 struct ata_queued_cmd *qc;
2342 unsigned long flags;
2345 qc = ata_qc_new_init(ap, dev);
2348 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2349 qc->dma_dir = DMA_FROM_DEVICE;
2351 if (dev->class == ATA_DEV_ATA) {
2352 qc->tf.command = ATA_CMD_ID_ATA;
2353 DPRINTK("do ATA identify\n");
2355 qc->tf.command = ATA_CMD_ID_ATAPI;
2356 DPRINTK("do ATAPI identify\n");
2359 qc->tf.flags |= ATA_TFLAG_DEVICE;
2360 qc->tf.protocol = ATA_PROT_PIO;
2363 qc->waiting = &wait;
2364 qc->complete_fn = ata_qc_complete_noop;
2366 spin_lock_irqsave(&ap->host_set->lock, flags);
2367 rc = ata_qc_issue(qc);
2368 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2373 wait_for_completion(&wait);
2375 swap_buf_le16(dev->id, ATA_ID_WORDS);
2383 ata_port_disable(ap);
2387 * ata_dev_init_params - Issue INIT DEV PARAMS command
2388 * @ap: Port associated with device @dev
2389 * @dev: Device to which command will be sent
2394 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2396 DECLARE_COMPLETION(wait);
2397 struct ata_queued_cmd *qc;
2399 unsigned long flags;
2400 u16 sectors = dev->id[6];
2401 u16 heads = dev->id[3];
2403 /* Number of sectors per track 1-255. Number of heads 1-16 */
2404 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2407 /* set up init dev params taskfile */
2408 DPRINTK("init dev params \n");
2410 qc = ata_qc_new_init(ap, dev);
2413 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2414 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2415 qc->tf.protocol = ATA_PROT_NODATA;
2416 qc->tf.nsect = sectors;
2417 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2419 qc->waiting = &wait;
2420 qc->complete_fn = ata_qc_complete_noop;
2422 spin_lock_irqsave(&ap->host_set->lock, flags);
2423 rc = ata_qc_issue(qc);
2424 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2427 ata_port_disable(ap);
2429 wait_for_completion(&wait);
2435 * ata_sg_clean - Unmap DMA memory associated with command
2436 * @qc: Command containing DMA memory to be released
2438 * Unmap all mapped DMA memory associated with this command.
2441 * spin_lock_irqsave(host_set lock)
2444 static void ata_sg_clean(struct ata_queued_cmd *qc)
2446 struct ata_port *ap = qc->ap;
2447 struct scatterlist *sg = qc->__sg;
2448 int dir = qc->dma_dir;
2449 void *pad_buf = NULL;
2451 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2454 if (qc->flags & ATA_QCFLAG_SINGLE)
2455 assert(qc->n_elem == 1);
2457 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2459 /* if we padded the buffer out to 32-bit bound, and data
2460 * xfer direction is from-device, we must copy from the
2461 * pad buffer back into the supplied buffer
2463 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2464 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2466 if (qc->flags & ATA_QCFLAG_SG) {
2467 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2468 /* restore last sg */
2469 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2471 struct scatterlist *psg = &qc->pad_sgent;
2472 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2473 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2474 kunmap_atomic(psg->page, KM_IRQ0);
2477 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2478 sg_dma_len(&sg[0]), dir);
2480 sg->length += qc->pad_len;
2482 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2483 pad_buf, qc->pad_len);
2486 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2491 * ata_fill_sg - Fill PCI IDE PRD table
2492 * @qc: Metadata associated with taskfile to be transferred
2494 * Fill PCI IDE PRD (scatter-gather) table with segments
2495 * associated with the current disk command.
2498 * spin_lock_irqsave(host_set lock)
2501 static void ata_fill_sg(struct ata_queued_cmd *qc)
2503 struct ata_port *ap = qc->ap;
2504 struct scatterlist *sg;
2507 assert(qc->__sg != NULL);
2508 assert(qc->n_elem > 0);
2511 ata_for_each_sg(sg, qc) {
2515 /* determine if physical DMA addr spans 64K boundary.
2516 * Note h/w doesn't support 64-bit, so we unconditionally
2517 * truncate dma_addr_t to u32.
2519 addr = (u32) sg_dma_address(sg);
2520 sg_len = sg_dma_len(sg);
2523 offset = addr & 0xffff;
2525 if ((offset + sg_len) > 0x10000)
2526 len = 0x10000 - offset;
2528 ap->prd[idx].addr = cpu_to_le32(addr);
2529 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2530 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2539 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2542 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2543 * @qc: Metadata associated with taskfile to check
2545 * Allow low-level driver to filter ATA PACKET commands, returning
2546 * a status indicating whether or not it is OK to use DMA for the
2547 * supplied PACKET command.
2550 * spin_lock_irqsave(host_set lock)
2552 * RETURNS: 0 when ATAPI DMA can be used
2555 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2557 struct ata_port *ap = qc->ap;
2558 int rc = 0; /* Assume ATAPI DMA is OK by default */
2560 if (ap->ops->check_atapi_dma)
2561 rc = ap->ops->check_atapi_dma(qc);
2566 * ata_qc_prep - Prepare taskfile for submission
2567 * @qc: Metadata associated with taskfile to be prepared
2569 * Prepare ATA taskfile for submission.
2572 * spin_lock_irqsave(host_set lock)
2574 void ata_qc_prep(struct ata_queued_cmd *qc)
2576 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2583 * ata_sg_init_one - Associate command with memory buffer
2584 * @qc: Command to be associated
2585 * @buf: Memory buffer
2586 * @buflen: Length of memory buffer, in bytes.
2588 * Initialize the data-related elements of queued_cmd @qc
2589 * to point to a single memory buffer, @buf of byte length @buflen.
2592 * spin_lock_irqsave(host_set lock)
2595 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2597 struct scatterlist *sg;
2599 qc->flags |= ATA_QCFLAG_SINGLE;
2601 memset(&qc->sgent, 0, sizeof(qc->sgent));
2602 qc->__sg = &qc->sgent;
2604 qc->orig_n_elem = 1;
2608 sg->page = virt_to_page(buf);
2609 sg->offset = (unsigned long) buf & ~PAGE_MASK;
2610 sg->length = buflen;
2614 * ata_sg_init - Associate command with scatter-gather table.
2615 * @qc: Command to be associated
2616 * @sg: Scatter-gather table.
2617 * @n_elem: Number of elements in s/g table.
2619 * Initialize the data-related elements of queued_cmd @qc
2620 * to point to a scatter-gather table @sg, containing @n_elem
2624 * spin_lock_irqsave(host_set lock)
2627 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2628 unsigned int n_elem)
2630 qc->flags |= ATA_QCFLAG_SG;
2632 qc->n_elem = n_elem;
2633 qc->orig_n_elem = n_elem;
2637 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2638 * @qc: Command with memory buffer to be mapped.
2640 * DMA-map the memory buffer associated with queued_cmd @qc.
2643 * spin_lock_irqsave(host_set lock)
2646 * Zero on success, negative on error.
2649 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2651 struct ata_port *ap = qc->ap;
2652 int dir = qc->dma_dir;
2653 struct scatterlist *sg = qc->__sg;
2654 dma_addr_t dma_address;
2656 /* we must lengthen transfers to end on a 32-bit boundary */
2657 qc->pad_len = sg->length & 3;
2659 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2660 struct scatterlist *psg = &qc->pad_sgent;
2662 assert(qc->dev->class == ATA_DEV_ATAPI);
2664 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2666 if (qc->tf.flags & ATA_TFLAG_WRITE)
2667 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2670 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2671 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2673 sg->length -= qc->pad_len;
2675 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2676 sg->length, qc->pad_len);
2679 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2681 if (dma_mapping_error(dma_address))
2684 sg_dma_address(sg) = dma_address;
2685 sg_dma_len(sg) = sg->length;
2687 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2688 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2694 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2695 * @qc: Command with scatter-gather table to be mapped.
2697 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2700 * spin_lock_irqsave(host_set lock)
2703 * Zero on success, negative on error.
2707 static int ata_sg_setup(struct ata_queued_cmd *qc)
2709 struct ata_port *ap = qc->ap;
2710 struct scatterlist *sg = qc->__sg;
2711 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2714 VPRINTK("ENTER, ata%u\n", ap->id);
2715 assert(qc->flags & ATA_QCFLAG_SG);
2717 /* we must lengthen transfers to end on a 32-bit boundary */
2718 qc->pad_len = lsg->length & 3;
2720 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2721 struct scatterlist *psg = &qc->pad_sgent;
2722 unsigned int offset;
2724 assert(qc->dev->class == ATA_DEV_ATAPI);
2726 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2729 * psg->page/offset are used to copy to-be-written
2730 * data in this function or read data in ata_sg_clean.
2732 offset = lsg->offset + lsg->length - qc->pad_len;
2733 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2734 psg->offset = offset_in_page(offset);
2736 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2737 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2738 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2739 kunmap_atomic(psg->page, KM_IRQ0);
2742 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2743 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2745 lsg->length -= qc->pad_len;
2747 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2748 qc->n_elem - 1, lsg->length, qc->pad_len);
2752 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2756 DPRINTK("%d sg elements mapped\n", n_elem);
2758 qc->n_elem = n_elem;
2764 * ata_poll_qc_complete - turn irq back on and finish qc
2765 * @qc: Command to complete
2766 * @drv_stat: ATA status register content
2769 * None. (grabs host lock)
2772 void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2774 struct ata_port *ap = qc->ap;
2775 unsigned long flags;
2777 spin_lock_irqsave(&ap->host_set->lock, flags);
2778 ap->flags &= ~ATA_FLAG_NOINTR;
2780 ata_qc_complete(qc, drv_stat);
2781 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2786 * @ap: the target ata_port
2789 * None. (executing in kernel thread context)
2792 * timeout value to use
2795 static unsigned long ata_pio_poll(struct ata_port *ap)
2798 unsigned int poll_state = HSM_ST_UNKNOWN;
2799 unsigned int reg_state = HSM_ST_UNKNOWN;
2800 const unsigned int tmout_state = HSM_ST_TMOUT;
2802 switch (ap->hsm_task_state) {
2805 poll_state = HSM_ST_POLL;
2809 case HSM_ST_LAST_POLL:
2810 poll_state = HSM_ST_LAST_POLL;
2811 reg_state = HSM_ST_LAST;
2818 status = ata_chk_status(ap);
2819 if (status & ATA_BUSY) {
2820 if (time_after(jiffies, ap->pio_task_timeout)) {
2821 ap->hsm_task_state = tmout_state;
2824 ap->hsm_task_state = poll_state;
2825 return ATA_SHORT_PAUSE;
2828 ap->hsm_task_state = reg_state;
2833 * ata_pio_complete - check if drive is busy or idle
2834 * @ap: the target ata_port
2837 * None. (executing in kernel thread context)
2840 * Non-zero if qc completed, zero otherwise.
2843 static int ata_pio_complete (struct ata_port *ap)
2845 struct ata_queued_cmd *qc;
2849 * This is purely heuristic. This is a fast path. Sometimes when
2850 * we enter, BSY will be cleared in a chk-status or two. If not,
2851 * the drive is probably seeking or something. Snooze for a couple
2852 * msecs, then chk-status again. If still busy, fall back to
2853 * HSM_ST_POLL state.
2855 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2856 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2858 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2859 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2860 ap->hsm_task_state = HSM_ST_LAST_POLL;
2861 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2866 drv_stat = ata_wait_idle(ap);
2867 if (!ata_ok(drv_stat)) {
2868 ap->hsm_task_state = HSM_ST_ERR;
2872 qc = ata_qc_from_tag(ap, ap->active_tag);
2875 ap->hsm_task_state = HSM_ST_IDLE;
2877 ata_poll_qc_complete(qc, drv_stat);
2879 /* another command may start at this point */
2886 * swap_buf_le16 - swap halves of 16-words in place
2887 * @buf: Buffer to swap
2888 * @buf_words: Number of 16-bit words in buffer.
2890 * Swap halves of 16-bit words if needed to convert from
2891 * little-endian byte order to native cpu byte order, or
2895 * Inherited from caller.
2897 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2902 for (i = 0; i < buf_words; i++)
2903 buf[i] = le16_to_cpu(buf[i]);
2904 #endif /* __BIG_ENDIAN */
2908 * ata_mmio_data_xfer - Transfer data by MMIO
2909 * @ap: port to read/write
2911 * @buflen: buffer length
2912 * @write_data: read/write
2914 * Transfer data from/to the device data register by MMIO.
2917 * Inherited from caller.
2920 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2921 unsigned int buflen, int write_data)
2924 unsigned int words = buflen >> 1;
2925 u16 *buf16 = (u16 *) buf;
2926 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2928 /* Transfer multiple of 2 bytes */
2930 for (i = 0; i < words; i++)
2931 writew(le16_to_cpu(buf16[i]), mmio);
2933 for (i = 0; i < words; i++)
2934 buf16[i] = cpu_to_le16(readw(mmio));
2937 /* Transfer trailing 1 byte, if any. */
2938 if (unlikely(buflen & 0x01)) {
2939 u16 align_buf[1] = { 0 };
2940 unsigned char *trailing_buf = buf + buflen - 1;
2943 memcpy(align_buf, trailing_buf, 1);
2944 writew(le16_to_cpu(align_buf[0]), mmio);
2946 align_buf[0] = cpu_to_le16(readw(mmio));
2947 memcpy(trailing_buf, align_buf, 1);
2953 * ata_pio_data_xfer - Transfer data by PIO
2954 * @ap: port to read/write
2956 * @buflen: buffer length
2957 * @write_data: read/write
2959 * Transfer data from/to the device data register by PIO.
2962 * Inherited from caller.
2965 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2966 unsigned int buflen, int write_data)
2968 unsigned int words = buflen >> 1;
2970 /* Transfer multiple of 2 bytes */
2972 outsw(ap->ioaddr.data_addr, buf, words);
2974 insw(ap->ioaddr.data_addr, buf, words);
2976 /* Transfer trailing 1 byte, if any. */
2977 if (unlikely(buflen & 0x01)) {
2978 u16 align_buf[1] = { 0 };
2979 unsigned char *trailing_buf = buf + buflen - 1;
2982 memcpy(align_buf, trailing_buf, 1);
2983 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2985 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2986 memcpy(trailing_buf, align_buf, 1);
2992 * ata_data_xfer - Transfer data from/to the data register.
2993 * @ap: port to read/write
2995 * @buflen: buffer length
2996 * @do_write: read/write
2998 * Transfer data from/to the device data register.
3001 * Inherited from caller.
3004 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3005 unsigned int buflen, int do_write)
3007 if (ap->flags & ATA_FLAG_MMIO)
3008 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3010 ata_pio_data_xfer(ap, buf, buflen, do_write);
3014 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3015 * @qc: Command on going
3017 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3020 * Inherited from caller.
3023 static void ata_pio_sector(struct ata_queued_cmd *qc)
3025 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3026 struct scatterlist *sg = qc->__sg;
3027 struct ata_port *ap = qc->ap;
3029 unsigned int offset;
3032 if (qc->cursect == (qc->nsect - 1))
3033 ap->hsm_task_state = HSM_ST_LAST;
3035 page = sg[qc->cursg].page;
3036 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3038 /* get the current page and offset */
3039 page = nth_page(page, (offset >> PAGE_SHIFT));
3040 offset %= PAGE_SIZE;
3042 buf = kmap(page) + offset;
3047 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3052 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3054 /* do the actual data transfer */
3055 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3056 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3062 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3063 * @qc: Command on going
3064 * @bytes: number of bytes
3066 * Transfer Transfer data from/to the ATAPI device.
3069 * Inherited from caller.
3073 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3075 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3076 struct scatterlist *sg = qc->__sg;
3077 struct ata_port *ap = qc->ap;
3080 unsigned int offset, count;
3082 if (qc->curbytes + bytes >= qc->nbytes)
3083 ap->hsm_task_state = HSM_ST_LAST;
3086 if (unlikely(qc->cursg >= qc->n_elem)) {
3088 * The end of qc->sg is reached and the device expects
3089 * more data to transfer. In order not to overrun qc->sg
3090 * and fulfill length specified in the byte count register,
3091 * - for read case, discard trailing data from the device
3092 * - for write case, padding zero data to the device
3094 u16 pad_buf[1] = { 0 };
3095 unsigned int words = bytes >> 1;
3098 if (words) /* warning if bytes > 1 */
3099 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3102 for (i = 0; i < words; i++)
3103 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3105 ap->hsm_task_state = HSM_ST_LAST;
3109 sg = &qc->__sg[qc->cursg];
3112 offset = sg->offset + qc->cursg_ofs;
3114 /* get the current page and offset */
3115 page = nth_page(page, (offset >> PAGE_SHIFT));
3116 offset %= PAGE_SIZE;
3118 /* don't overrun current sg */
3119 count = min(sg->length - qc->cursg_ofs, bytes);
3121 /* don't cross page boundaries */
3122 count = min(count, (unsigned int)PAGE_SIZE - offset);
3124 buf = kmap(page) + offset;
3127 qc->curbytes += count;
3128 qc->cursg_ofs += count;
3130 if (qc->cursg_ofs == sg->length) {
3135 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3137 /* do the actual data transfer */
3138 ata_data_xfer(ap, buf, count, do_write);
3147 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3148 * @qc: Command on going
3150 * Transfer Transfer data from/to the ATAPI device.
3153 * Inherited from caller.
3156 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3158 struct ata_port *ap = qc->ap;
3159 struct ata_device *dev = qc->dev;
3160 unsigned int ireason, bc_lo, bc_hi, bytes;
3161 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3163 ap->ops->tf_read(ap, &qc->tf);
3164 ireason = qc->tf.nsect;
3165 bc_lo = qc->tf.lbam;
3166 bc_hi = qc->tf.lbah;
3167 bytes = (bc_hi << 8) | bc_lo;
3169 /* shall be cleared to zero, indicating xfer of data */
3170 if (ireason & (1 << 0))
3173 /* make sure transfer direction matches expected */
3174 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3175 if (do_write != i_write)
3178 __atapi_pio_bytes(qc, bytes);
3183 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3184 ap->id, dev->devno);
3185 ap->hsm_task_state = HSM_ST_ERR;
3189 * ata_pio_block - start PIO on a block
3190 * @ap: the target ata_port
3193 * None. (executing in kernel thread context)
3196 static void ata_pio_block(struct ata_port *ap)
3198 struct ata_queued_cmd *qc;
3202 * This is purely heuristic. This is a fast path.
3203 * Sometimes when we enter, BSY will be cleared in
3204 * a chk-status or two. If not, the drive is probably seeking
3205 * or something. Snooze for a couple msecs, then
3206 * chk-status again. If still busy, fall back to
3207 * HSM_ST_POLL state.
3209 status = ata_busy_wait(ap, ATA_BUSY, 5);
3210 if (status & ATA_BUSY) {
3212 status = ata_busy_wait(ap, ATA_BUSY, 10);
3213 if (status & ATA_BUSY) {
3214 ap->hsm_task_state = HSM_ST_POLL;
3215 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3220 qc = ata_qc_from_tag(ap, ap->active_tag);
3223 if (is_atapi_taskfile(&qc->tf)) {
3224 /* no more data to transfer or unsupported ATAPI command */
3225 if ((status & ATA_DRQ) == 0) {
3226 ap->hsm_task_state = HSM_ST_LAST;
3230 atapi_pio_bytes(qc);
3232 /* handle BSY=0, DRQ=0 as error */
3233 if ((status & ATA_DRQ) == 0) {
3234 ap->hsm_task_state = HSM_ST_ERR;
3242 static void ata_pio_error(struct ata_port *ap)
3244 struct ata_queued_cmd *qc;
3247 qc = ata_qc_from_tag(ap, ap->active_tag);
3250 drv_stat = ata_chk_status(ap);
3251 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
3254 ap->hsm_task_state = HSM_ST_IDLE;
3256 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
3259 static void ata_pio_task(void *_data)
3261 struct ata_port *ap = _data;
3262 unsigned long timeout;
3269 switch (ap->hsm_task_state) {
3278 qc_completed = ata_pio_complete(ap);
3282 case HSM_ST_LAST_POLL:
3283 timeout = ata_pio_poll(ap);
3293 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3294 else if (!qc_completed)
3299 * ata_qc_timeout - Handle timeout of queued command
3300 * @qc: Command that timed out
3302 * Some part of the kernel (currently, only the SCSI layer)
3303 * has noticed that the active command on port @ap has not
3304 * completed after a specified length of time. Handle this
3305 * condition by disabling DMA (if necessary) and completing
3306 * transactions, with error if necessary.
3308 * This also handles the case of the "lost interrupt", where
3309 * for some reason (possibly hardware bug, possibly driver bug)
3310 * an interrupt was not delivered to the driver, even though the
3311 * transaction completed successfully.
3314 * Inherited from SCSI layer (none, can sleep)
3317 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3319 struct ata_port *ap = qc->ap;
3320 struct ata_host_set *host_set = ap->host_set;
3321 struct ata_device *dev = qc->dev;
3322 u8 host_stat = 0, drv_stat;
3323 unsigned long flags;
3327 /* FIXME: doesn't this conflict with timeout handling? */
3328 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3329 struct scsi_cmnd *cmd = qc->scsicmd;
3331 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3333 /* finish completing original command */
3334 spin_lock_irqsave(&host_set->lock, flags);
3335 __ata_qc_complete(qc);
3336 spin_unlock_irqrestore(&host_set->lock, flags);
3338 atapi_request_sense(ap, dev, cmd);
3340 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3341 scsi_finish_command(cmd);
3347 spin_lock_irqsave(&host_set->lock, flags);
3349 /* hack alert! We cannot use the supplied completion
3350 * function from inside the ->eh_strategy_handler() thread.
3351 * libata is the only user of ->eh_strategy_handler() in
3352 * any kernel, so the default scsi_done() assumes it is
3353 * not being called from the SCSI EH.
3355 qc->scsidone = scsi_finish_command;
3357 switch (qc->tf.protocol) {
3360 case ATA_PROT_ATAPI_DMA:
3361 host_stat = ap->ops->bmdma_status(ap);
3363 /* before we do anything else, clear DMA-Start bit */
3364 ap->ops->bmdma_stop(qc);
3370 drv_stat = ata_chk_status(ap);
3372 /* ack bmdma irq events */
3373 ap->ops->irq_clear(ap);
3375 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3376 ap->id, qc->tf.command, drv_stat, host_stat);
3378 /* complete taskfile transaction */
3379 ata_qc_complete(qc, drv_stat);
3383 spin_unlock_irqrestore(&host_set->lock, flags);
3390 * ata_eng_timeout - Handle timeout of queued command
3391 * @ap: Port on which timed-out command is active
3393 * Some part of the kernel (currently, only the SCSI layer)
3394 * has noticed that the active command on port @ap has not
3395 * completed after a specified length of time. Handle this
3396 * condition by disabling DMA (if necessary) and completing
3397 * transactions, with error if necessary.
3399 * This also handles the case of the "lost interrupt", where
3400 * for some reason (possibly hardware bug, possibly driver bug)
3401 * an interrupt was not delivered to the driver, even though the
3402 * transaction completed successfully.
3405 * Inherited from SCSI layer (none, can sleep)
3408 void ata_eng_timeout(struct ata_port *ap)
3410 struct ata_queued_cmd *qc;
3414 qc = ata_qc_from_tag(ap, ap->active_tag);
3418 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3428 * ata_qc_new - Request an available ATA command, for queueing
3429 * @ap: Port associated with device @dev
3430 * @dev: Device from whom we request an available command structure
3436 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3438 struct ata_queued_cmd *qc = NULL;
3441 for (i = 0; i < ATA_MAX_QUEUE; i++)
3442 if (!test_and_set_bit(i, &ap->qactive)) {
3443 qc = ata_qc_from_tag(ap, i);
3454 * ata_qc_new_init - Request an available ATA command, and initialize it
3455 * @ap: Port associated with device @dev
3456 * @dev: Device from whom we request an available command structure
3462 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3463 struct ata_device *dev)
3465 struct ata_queued_cmd *qc;
3467 qc = ata_qc_new(ap);
3474 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3476 qc->nbytes = qc->curbytes = 0;
3478 ata_tf_init(ap, &qc->tf, dev->devno);
3484 int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3489 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3491 struct ata_port *ap = qc->ap;
3492 unsigned int tag, do_clear = 0;
3496 if (likely(ata_tag_valid(tag))) {
3497 if (tag == ap->active_tag)
3498 ap->active_tag = ATA_TAG_POISON;
3499 qc->tag = ATA_TAG_POISON;
3504 struct completion *waiting = qc->waiting;
3509 if (likely(do_clear))
3510 clear_bit(tag, &ap->qactive);
3514 * ata_qc_free - free unused ata_queued_cmd
3515 * @qc: Command to complete
3517 * Designed to free unused ata_queued_cmd object
3518 * in case something prevents using it.
3521 * spin_lock_irqsave(host_set lock)
3523 void ata_qc_free(struct ata_queued_cmd *qc)
3525 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3526 assert(qc->waiting == NULL); /* nothing should be waiting */
3528 __ata_qc_complete(qc);
3532 * ata_qc_complete - Complete an active ATA command
3533 * @qc: Command to complete
3534 * @drv_stat: ATA Status register contents
3536 * Indicate to the mid and upper layers that an ATA
3537 * command has completed, with either an ok or not-ok status.
3540 * spin_lock_irqsave(host_set lock)
3543 void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3547 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3548 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3550 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3553 /* atapi: mark qc as inactive to prevent the interrupt handler
3554 * from completing the command twice later, before the error handler
3555 * is called. (when rc != 0 and atapi request sense is needed)
3557 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3559 /* call completion callback */
3560 rc = qc->complete_fn(qc, drv_stat);
3562 /* if callback indicates not to complete command (non-zero),
3563 * return immediately
3568 __ata_qc_complete(qc);
3573 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3575 struct ata_port *ap = qc->ap;
3577 switch (qc->tf.protocol) {
3579 case ATA_PROT_ATAPI_DMA:
3582 case ATA_PROT_ATAPI:
3584 case ATA_PROT_PIO_MULT:
3585 if (ap->flags & ATA_FLAG_PIO_DMA)
3598 * ata_qc_issue - issue taskfile to device
3599 * @qc: command to issue to device
3601 * Prepare an ATA command to submission to device.
3602 * This includes mapping the data into a DMA-able
3603 * area, filling in the S/G table, and finally
3604 * writing the taskfile to hardware, starting the command.
3607 * spin_lock_irqsave(host_set lock)
3610 * Zero on success, negative on error.
3613 int ata_qc_issue(struct ata_queued_cmd *qc)
3615 struct ata_port *ap = qc->ap;
3617 if (ata_should_dma_map(qc)) {
3618 if (qc->flags & ATA_QCFLAG_SG) {
3619 if (ata_sg_setup(qc))
3621 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3622 if (ata_sg_setup_one(qc))
3626 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3629 ap->ops->qc_prep(qc);
3631 qc->ap->active_tag = qc->tag;
3632 qc->flags |= ATA_QCFLAG_ACTIVE;
3634 return ap->ops->qc_issue(qc);
3642 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3643 * @qc: command to issue to device
3645 * Using various libata functions and hooks, this function
3646 * starts an ATA command. ATA commands are grouped into
3647 * classes called "protocols", and issuing each type of protocol
3648 * is slightly different.
3650 * May be used as the qc_issue() entry in ata_port_operations.
3653 * spin_lock_irqsave(host_set lock)
3656 * Zero on success, negative on error.
3659 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3661 struct ata_port *ap = qc->ap;
3663 ata_dev_select(ap, qc->dev->devno, 1, 0);
3665 switch (qc->tf.protocol) {
3666 case ATA_PROT_NODATA:
3667 ata_tf_to_host_nolock(ap, &qc->tf);
3671 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3672 ap->ops->bmdma_setup(qc); /* set up bmdma */
3673 ap->ops->bmdma_start(qc); /* initiate bmdma */
3676 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3677 ata_qc_set_polling(qc);
3678 ata_tf_to_host_nolock(ap, &qc->tf);
3679 ap->hsm_task_state = HSM_ST;
3680 queue_work(ata_wq, &ap->pio_task);
3683 case ATA_PROT_ATAPI:
3684 ata_qc_set_polling(qc);
3685 ata_tf_to_host_nolock(ap, &qc->tf);
3686 queue_work(ata_wq, &ap->packet_task);
3689 case ATA_PROT_ATAPI_NODATA:
3690 ap->flags |= ATA_FLAG_NOINTR;
3691 ata_tf_to_host_nolock(ap, &qc->tf);
3692 queue_work(ata_wq, &ap->packet_task);
3695 case ATA_PROT_ATAPI_DMA:
3696 ap->flags |= ATA_FLAG_NOINTR;
3697 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3698 ap->ops->bmdma_setup(qc); /* set up bmdma */
3699 queue_work(ata_wq, &ap->packet_task);
3711 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3712 * @qc: Info associated with this ATA transaction.
3715 * spin_lock_irqsave(host_set lock)
3718 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3720 struct ata_port *ap = qc->ap;
3721 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3723 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3725 /* load PRD table addr. */
3726 mb(); /* make sure PRD table writes are visible to controller */
3727 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3729 /* specify data direction, triple-check start bit is clear */
3730 dmactl = readb(mmio + ATA_DMA_CMD);
3731 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3733 dmactl |= ATA_DMA_WR;
3734 writeb(dmactl, mmio + ATA_DMA_CMD);
3736 /* issue r/w command */
3737 ap->ops->exec_command(ap, &qc->tf);
3741 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3742 * @qc: Info associated with this ATA transaction.
3745 * spin_lock_irqsave(host_set lock)
3748 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3750 struct ata_port *ap = qc->ap;
3751 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3754 /* start host DMA transaction */
3755 dmactl = readb(mmio + ATA_DMA_CMD);
3756 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3758 /* Strictly, one may wish to issue a readb() here, to
3759 * flush the mmio write. However, control also passes
3760 * to the hardware at this point, and it will interrupt
3761 * us when we are to resume control. So, in effect,
3762 * we don't care when the mmio write flushes.
3763 * Further, a read of the DMA status register _immediately_
3764 * following the write may not be what certain flaky hardware
3765 * is expected, so I think it is best to not add a readb()
3766 * without first all the MMIO ATA cards/mobos.
3767 * Or maybe I'm just being paranoid.
3772 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3773 * @qc: Info associated with this ATA transaction.
3776 * spin_lock_irqsave(host_set lock)
3779 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3781 struct ata_port *ap = qc->ap;
3782 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3785 /* load PRD table addr. */
3786 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3788 /* specify data direction, triple-check start bit is clear */
3789 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3790 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3792 dmactl |= ATA_DMA_WR;
3793 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3795 /* issue r/w command */
3796 ap->ops->exec_command(ap, &qc->tf);
3800 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3801 * @qc: Info associated with this ATA transaction.
3804 * spin_lock_irqsave(host_set lock)
3807 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3809 struct ata_port *ap = qc->ap;
3812 /* start host DMA transaction */
3813 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3814 outb(dmactl | ATA_DMA_START,
3815 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3820 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3821 * @qc: Info associated with this ATA transaction.
3823 * Writes the ATA_DMA_START flag to the DMA command register.
3825 * May be used as the bmdma_start() entry in ata_port_operations.
3828 * spin_lock_irqsave(host_set lock)
3830 void ata_bmdma_start(struct ata_queued_cmd *qc)
3832 if (qc->ap->flags & ATA_FLAG_MMIO)
3833 ata_bmdma_start_mmio(qc);
3835 ata_bmdma_start_pio(qc);
3840 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3841 * @qc: Info associated with this ATA transaction.
3843 * Writes address of PRD table to device's PRD Table Address
3844 * register, sets the DMA control register, and calls
3845 * ops->exec_command() to start the transfer.
3847 * May be used as the bmdma_setup() entry in ata_port_operations.
3850 * spin_lock_irqsave(host_set lock)
3852 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3854 if (qc->ap->flags & ATA_FLAG_MMIO)
3855 ata_bmdma_setup_mmio(qc);
3857 ata_bmdma_setup_pio(qc);
3862 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3863 * @ap: Port associated with this ATA transaction.
3865 * Clear interrupt and error flags in DMA status register.
3867 * May be used as the irq_clear() entry in ata_port_operations.
3870 * spin_lock_irqsave(host_set lock)
3873 void ata_bmdma_irq_clear(struct ata_port *ap)
3875 if (ap->flags & ATA_FLAG_MMIO) {
3876 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3877 writeb(readb(mmio), mmio);
3879 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3880 outb(inb(addr), addr);
3887 * ata_bmdma_status - Read PCI IDE BMDMA status
3888 * @ap: Port associated with this ATA transaction.
3890 * Read and return BMDMA status register.
3892 * May be used as the bmdma_status() entry in ata_port_operations.
3895 * spin_lock_irqsave(host_set lock)
3898 u8 ata_bmdma_status(struct ata_port *ap)
3901 if (ap->flags & ATA_FLAG_MMIO) {
3902 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3903 host_stat = readb(mmio + ATA_DMA_STATUS);
3905 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3911 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3912 * @qc: Command we are ending DMA for
3914 * Clears the ATA_DMA_START flag in the dma control register
3916 * May be used as the bmdma_stop() entry in ata_port_operations.
3919 * spin_lock_irqsave(host_set lock)
3922 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3924 struct ata_port *ap = qc->ap;
3925 if (ap->flags & ATA_FLAG_MMIO) {
3926 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3928 /* clear start/stop bit */
3929 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3930 mmio + ATA_DMA_CMD);
3932 /* clear start/stop bit */
3933 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3934 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3937 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3938 ata_altstatus(ap); /* dummy read */
3942 * ata_host_intr - Handle host interrupt for given (port, task)
3943 * @ap: Port on which interrupt arrived (possibly...)
3944 * @qc: Taskfile currently active in engine
3946 * Handle host interrupt for given queued command. Currently,
3947 * only DMA interrupts are handled. All other commands are
3948 * handled via polling with interrupts disabled (nIEN bit).
3951 * spin_lock_irqsave(host_set lock)
3954 * One if interrupt was handled, zero if not (shared irq).
3957 inline unsigned int ata_host_intr (struct ata_port *ap,
3958 struct ata_queued_cmd *qc)
3960 u8 status, host_stat;
3962 switch (qc->tf.protocol) {
3965 case ATA_PROT_ATAPI_DMA:
3966 case ATA_PROT_ATAPI:
3967 /* check status of DMA engine */
3968 host_stat = ap->ops->bmdma_status(ap);
3969 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3971 /* if it's not our irq... */
3972 if (!(host_stat & ATA_DMA_INTR))
3975 /* before we do anything else, clear DMA-Start bit */
3976 ap->ops->bmdma_stop(qc);
3980 case ATA_PROT_ATAPI_NODATA:
3981 case ATA_PROT_NODATA:
3982 /* check altstatus */
3983 status = ata_altstatus(ap);
3984 if (status & ATA_BUSY)
3987 /* check main status, clearing INTRQ */
3988 status = ata_chk_status(ap);
3989 if (unlikely(status & ATA_BUSY))
3991 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3992 ap->id, qc->tf.protocol, status);
3994 /* ack bmdma irq events */
3995 ap->ops->irq_clear(ap);
3997 /* complete taskfile transaction */
3998 ata_qc_complete(qc, status);
4005 return 1; /* irq handled */
4008 ap->stats.idle_irq++;
4011 if ((ap->stats.idle_irq % 1000) == 0) {
4013 ata_irq_ack(ap, 0); /* debug trap */
4014 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4017 return 0; /* irq not handled */
4021 * ata_interrupt - Default ATA host interrupt handler
4022 * @irq: irq line (unused)
4023 * @dev_instance: pointer to our ata_host_set information structure
4026 * Default interrupt handler for PCI IDE devices. Calls
4027 * ata_host_intr() for each port that is not disabled.
4030 * Obtains host_set lock during operation.
4033 * IRQ_NONE or IRQ_HANDLED.
4036 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4038 struct ata_host_set *host_set = dev_instance;
4040 unsigned int handled = 0;
4041 unsigned long flags;
4043 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4044 spin_lock_irqsave(&host_set->lock, flags);
4046 for (i = 0; i < host_set->n_ports; i++) {
4047 struct ata_port *ap;
4049 ap = host_set->ports[i];
4051 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4052 struct ata_queued_cmd *qc;
4054 qc = ata_qc_from_tag(ap, ap->active_tag);
4055 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4056 (qc->flags & ATA_QCFLAG_ACTIVE))
4057 handled |= ata_host_intr(ap, qc);
4061 spin_unlock_irqrestore(&host_set->lock, flags);
4063 return IRQ_RETVAL(handled);
4067 * atapi_packet_task - Write CDB bytes to hardware
4068 * @_data: Port to which ATAPI device is attached.
4070 * When device has indicated its readiness to accept
4071 * a CDB, this function is called. Send the CDB.
4072 * If DMA is to be performed, exit immediately.
4073 * Otherwise, we are in polling mode, so poll
4074 * status under operation succeeds or fails.
4077 * Kernel thread context (may sleep)
4080 static void atapi_packet_task(void *_data)
4082 struct ata_port *ap = _data;
4083 struct ata_queued_cmd *qc;
4086 qc = ata_qc_from_tag(ap, ap->active_tag);
4088 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4090 /* sleep-wait for BSY to clear */
4091 DPRINTK("busy wait\n");
4092 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
4095 /* make sure DRQ is set */
4096 status = ata_chk_status(ap);
4097 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4101 DPRINTK("send cdb\n");
4102 assert(ap->cdb_len >= 12);
4104 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4105 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4106 unsigned long flags;
4108 /* Once we're done issuing command and kicking bmdma,
4109 * irq handler takes over. To not lose irq, we need
4110 * to clear NOINTR flag before sending cdb, but
4111 * interrupt handler shouldn't be invoked before we're
4112 * finished. Hence, the following locking.
4114 spin_lock_irqsave(&ap->host_set->lock, flags);
4115 ap->flags &= ~ATA_FLAG_NOINTR;
4116 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4117 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4118 ap->ops->bmdma_start(qc); /* initiate bmdma */
4119 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4121 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4123 /* PIO commands are handled by polling */
4124 ap->hsm_task_state = HSM_ST;
4125 queue_work(ata_wq, &ap->pio_task);
4131 ata_poll_qc_complete(qc, ATA_ERR);
4136 * ata_port_start - Set port up for dma.
4137 * @ap: Port to initialize
4139 * Called just after data structures for each port are
4140 * initialized. Allocates space for PRD table.
4142 * May be used as the port_start() entry in ata_port_operations.
4145 * Inherited from caller.
4148 int ata_port_start (struct ata_port *ap)
4150 struct device *dev = ap->host_set->dev;
4152 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4156 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, &ap->pad_dma, GFP_KERNEL);
4158 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4162 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4169 * ata_port_stop - Undo ata_port_start()
4170 * @ap: Port to shut down
4172 * Frees the PRD table.
4174 * May be used as the port_stop() entry in ata_port_operations.
4177 * Inherited from caller.
4180 void ata_port_stop (struct ata_port *ap)
4182 struct device *dev = ap->host_set->dev;
4184 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4185 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
4188 void ata_host_stop (struct ata_host_set *host_set)
4190 if (host_set->mmio_base)
4191 iounmap(host_set->mmio_base);
4196 * ata_host_remove - Unregister SCSI host structure with upper layers
4197 * @ap: Port to unregister
4198 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4201 * Inherited from caller.
4204 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4206 struct Scsi_Host *sh = ap->host;
4211 scsi_remove_host(sh);
4213 ap->ops->port_stop(ap);
4217 * ata_host_init - Initialize an ata_port structure
4218 * @ap: Structure to initialize
4219 * @host: associated SCSI mid-layer structure
4220 * @host_set: Collection of hosts to which @ap belongs
4221 * @ent: Probe information provided by low-level driver
4222 * @port_no: Port number associated with this ata_port
4224 * Initialize a new ata_port structure, and its associated
4228 * Inherited from caller.
4231 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4232 struct ata_host_set *host_set,
4233 const struct ata_probe_ent *ent, unsigned int port_no)
4239 host->max_channel = 1;
4240 host->unique_id = ata_unique_id++;
4241 host->max_cmd_len = 12;
4243 scsi_assign_lock(host, &host_set->lock);
4245 ap->flags = ATA_FLAG_PORT_DISABLED;
4246 ap->id = host->unique_id;
4248 ap->ctl = ATA_DEVCTL_OBS;
4249 ap->host_set = host_set;
4250 ap->port_no = port_no;
4252 ent->legacy_mode ? ent->hard_port_no : port_no;
4253 ap->pio_mask = ent->pio_mask;
4254 ap->mwdma_mask = ent->mwdma_mask;
4255 ap->udma_mask = ent->udma_mask;
4256 ap->flags |= ent->host_flags;
4257 ap->ops = ent->port_ops;
4258 ap->cbl = ATA_CBL_NONE;
4259 ap->active_tag = ATA_TAG_POISON;
4260 ap->last_ctl = 0xFF;
4262 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4263 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4265 for (i = 0; i < ATA_MAX_DEVICES; i++)
4266 ap->device[i].devno = i;
4269 ap->stats.unhandled_irq = 1;
4270 ap->stats.idle_irq = 1;
4273 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4277 * ata_host_add - Attach low-level ATA driver to system
4278 * @ent: Information provided by low-level driver
4279 * @host_set: Collections of ports to which we add
4280 * @port_no: Port number associated with this host
4282 * Attach low-level ATA driver to system.
4285 * PCI/etc. bus probe sem.
4288 * New ata_port on success, for NULL on error.
4291 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4292 struct ata_host_set *host_set,
4293 unsigned int port_no)
4295 struct Scsi_Host *host;
4296 struct ata_port *ap;
4300 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4304 ap = (struct ata_port *) &host->hostdata[0];
4306 ata_host_init(ap, host, host_set, ent, port_no);
4308 rc = ap->ops->port_start(ap);
4315 scsi_host_put(host);
4320 * ata_device_add - Register hardware device with ATA and SCSI layers
4321 * @ent: Probe information describing hardware device to be registered
4323 * This function processes the information provided in the probe
4324 * information struct @ent, allocates the necessary ATA and SCSI
4325 * host information structures, initializes them, and registers
4326 * everything with requisite kernel subsystems.
4328 * This function requests irqs, probes the ATA bus, and probes
4332 * PCI/etc. bus probe sem.
4335 * Number of ports registered. Zero on error (no ports registered).
4338 int ata_device_add(const struct ata_probe_ent *ent)
4340 unsigned int count = 0, i;
4341 struct device *dev = ent->dev;
4342 struct ata_host_set *host_set;
4345 /* alloc a container for our list of ATA ports (buses) */
4346 host_set = kmalloc(sizeof(struct ata_host_set) +
4347 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4350 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
4351 spin_lock_init(&host_set->lock);
4353 host_set->dev = dev;
4354 host_set->n_ports = ent->n_ports;
4355 host_set->irq = ent->irq;
4356 host_set->mmio_base = ent->mmio_base;
4357 host_set->private_data = ent->private_data;
4358 host_set->ops = ent->port_ops;
4360 /* register each port bound to this device */
4361 for (i = 0; i < ent->n_ports; i++) {
4362 struct ata_port *ap;
4363 unsigned long xfer_mode_mask;
4365 ap = ata_host_add(ent, host_set, i);
4369 host_set->ports[i] = ap;
4370 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4371 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4372 (ap->pio_mask << ATA_SHIFT_PIO);
4374 /* print per-port info to dmesg */
4375 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4376 "bmdma 0x%lX irq %lu\n",
4378 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4379 ata_mode_string(xfer_mode_mask),
4380 ap->ioaddr.cmd_addr,
4381 ap->ioaddr.ctl_addr,
4382 ap->ioaddr.bmdma_addr,
4386 host_set->ops->irq_clear(ap);
4395 /* obtain irq, that is shared between channels */
4396 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4397 DRV_NAME, host_set))
4400 /* perform each probe synchronously */
4401 DPRINTK("probe begin\n");
4402 for (i = 0; i < count; i++) {
4403 struct ata_port *ap;
4406 ap = host_set->ports[i];
4408 DPRINTK("ata%u: probe begin\n", ap->id);
4409 rc = ata_bus_probe(ap);
4410 DPRINTK("ata%u: probe end\n", ap->id);
4413 /* FIXME: do something useful here?
4414 * Current libata behavior will
4415 * tear down everything when
4416 * the module is removed
4417 * or the h/w is unplugged.
4421 rc = scsi_add_host(ap->host, dev);
4423 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4425 /* FIXME: do something useful here */
4426 /* FIXME: handle unconditional calls to
4427 * scsi_scan_host and ata_host_remove, below,
4433 /* probes are done, now scan each port's disk(s) */
4434 DPRINTK("probe begin\n");
4435 for (i = 0; i < count; i++) {
4436 struct ata_port *ap = host_set->ports[i];
4438 ata_scsi_scan_host(ap);
4441 dev_set_drvdata(dev, host_set);
4443 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4444 return ent->n_ports; /* success */
4447 for (i = 0; i < count; i++) {
4448 ata_host_remove(host_set->ports[i], 1);
4449 scsi_host_put(host_set->ports[i]->host);
4452 VPRINTK("EXIT, returning 0\n");
4457 * ata_host_set_remove - PCI layer callback for device removal
4458 * @host_set: ATA host set that was removed
4460 * Unregister all objects associated with this host set. Free those
4464 * Inherited from calling layer (may sleep).
4467 void ata_host_set_remove(struct ata_host_set *host_set)
4469 struct ata_port *ap;
4472 for (i = 0; i < host_set->n_ports; i++) {
4473 ap = host_set->ports[i];
4474 scsi_remove_host(ap->host);
4477 free_irq(host_set->irq, host_set);
4479 for (i = 0; i < host_set->n_ports; i++) {
4480 ap = host_set->ports[i];
4482 ata_scsi_release(ap->host);
4484 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4485 struct ata_ioports *ioaddr = &ap->ioaddr;
4487 if (ioaddr->cmd_addr == 0x1f0)
4488 release_region(0x1f0, 8);
4489 else if (ioaddr->cmd_addr == 0x170)
4490 release_region(0x170, 8);
4493 scsi_host_put(ap->host);
4496 if (host_set->ops->host_stop)
4497 host_set->ops->host_stop(host_set);
4503 * ata_scsi_release - SCSI layer callback hook for host unload
4504 * @host: libata host to be unloaded
4506 * Performs all duties necessary to shut down a libata port...
4507 * Kill port kthread, disable port, and release resources.
4510 * Inherited from SCSI layer.
4516 int ata_scsi_release(struct Scsi_Host *host)
4518 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4522 ap->ops->port_disable(ap);
4523 ata_host_remove(ap, 0);
4530 * ata_std_ports - initialize ioaddr with standard port offsets.
4531 * @ioaddr: IO address structure to be initialized
4533 * Utility function which initializes data_addr, error_addr,
4534 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4535 * device_addr, status_addr, and command_addr to standard offsets
4536 * relative to cmd_addr.
4538 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4541 void ata_std_ports(struct ata_ioports *ioaddr)
4543 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4544 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4545 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4546 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4547 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4548 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4549 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4550 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4551 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4552 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4555 static struct ata_probe_ent *
4556 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4558 struct ata_probe_ent *probe_ent;
4560 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4562 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4563 kobject_name(&(dev->kobj)));
4567 memset(probe_ent, 0, sizeof(*probe_ent));
4569 INIT_LIST_HEAD(&probe_ent->node);
4570 probe_ent->dev = dev;
4572 probe_ent->sht = port->sht;
4573 probe_ent->host_flags = port->host_flags;
4574 probe_ent->pio_mask = port->pio_mask;
4575 probe_ent->mwdma_mask = port->mwdma_mask;
4576 probe_ent->udma_mask = port->udma_mask;
4577 probe_ent->port_ops = port->port_ops;
4586 void ata_pci_host_stop (struct ata_host_set *host_set)
4588 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4590 pci_iounmap(pdev, host_set->mmio_base);
4594 * ata_pci_init_native_mode - Initialize native-mode driver
4595 * @pdev: pci device to be initialized
4596 * @port: array[2] of pointers to port info structures.
4597 * @ports: bitmap of ports present
4599 * Utility function which allocates and initializes an
4600 * ata_probe_ent structure for a standard dual-port
4601 * PIO-based IDE controller. The returned ata_probe_ent
4602 * structure can be passed to ata_device_add(). The returned
4603 * ata_probe_ent structure should then be freed with kfree().
4605 * The caller need only pass the address of the primary port, the
4606 * secondary will be deduced automatically. If the device has non
4607 * standard secondary port mappings this function can be called twice,
4608 * once for each interface.
4611 struct ata_probe_ent *
4612 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4614 struct ata_probe_ent *probe_ent =
4615 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4621 probe_ent->irq = pdev->irq;
4622 probe_ent->irq_flags = SA_SHIRQ;
4624 if (ports & ATA_PORT_PRIMARY) {
4625 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4626 probe_ent->port[p].altstatus_addr =
4627 probe_ent->port[p].ctl_addr =
4628 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4629 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4630 ata_std_ports(&probe_ent->port[p]);
4634 if (ports & ATA_PORT_SECONDARY) {
4635 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4636 probe_ent->port[p].altstatus_addr =
4637 probe_ent->port[p].ctl_addr =
4638 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4639 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4640 ata_std_ports(&probe_ent->port[p]);
4644 probe_ent->n_ports = p;
4648 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num)
4650 struct ata_probe_ent *probe_ent;
4652 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4656 probe_ent->legacy_mode = 1;
4657 probe_ent->n_ports = 1;
4658 probe_ent->hard_port_no = port_num;
4663 probe_ent->irq = 14;
4664 probe_ent->port[0].cmd_addr = 0x1f0;
4665 probe_ent->port[0].altstatus_addr =
4666 probe_ent->port[0].ctl_addr = 0x3f6;
4669 probe_ent->irq = 15;
4670 probe_ent->port[0].cmd_addr = 0x170;
4671 probe_ent->port[0].altstatus_addr =
4672 probe_ent->port[0].ctl_addr = 0x376;
4675 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4676 ata_std_ports(&probe_ent->port[0]);
4681 * ata_pci_init_one - Initialize/register PCI IDE host controller
4682 * @pdev: Controller to be initialized
4683 * @port_info: Information from low-level host driver
4684 * @n_ports: Number of ports attached to host controller
4686 * This is a helper function which can be called from a driver's
4687 * xxx_init_one() probe function if the hardware uses traditional
4688 * IDE taskfile registers.
4690 * This function calls pci_enable_device(), reserves its register
4691 * regions, sets the dma mask, enables bus master mode, and calls
4695 * Inherited from PCI layer (may sleep).
4698 * Zero on success, negative on errno-based value on error.
4701 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4702 unsigned int n_ports)
4704 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4705 struct ata_port_info *port[2];
4707 unsigned int legacy_mode = 0;
4708 int disable_dev_on_err = 1;
4713 port[0] = port_info[0];
4715 port[1] = port_info[1];
4719 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4720 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4721 /* TODO: What if one channel is in native mode ... */
4722 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4723 mask = (1 << 2) | (1 << 0);
4724 if ((tmp8 & mask) != mask)
4725 legacy_mode = (1 << 3);
4729 if ((!legacy_mode) && (n_ports > 2)) {
4730 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4735 /* FIXME: Really for ATA it isn't safe because the device may be
4736 multi-purpose and we want to leave it alone if it was already
4737 enabled. Secondly for shared use as Arjan says we want refcounting
4739 Checking dev->is_enabled is insufficient as this is not set at
4740 boot for the primary video which is BIOS enabled
4743 rc = pci_enable_device(pdev);
4747 rc = pci_request_regions(pdev, DRV_NAME);
4749 disable_dev_on_err = 0;
4753 /* FIXME: Should use platform specific mappers for legacy port ranges */
4755 if (!request_region(0x1f0, 8, "libata")) {
4756 struct resource *conflict, res;
4758 res.end = 0x1f0 + 8 - 1;
4759 conflict = ____request_resource(&ioport_resource, &res);
4760 if (!strcmp(conflict->name, "libata"))
4761 legacy_mode |= (1 << 0);
4763 disable_dev_on_err = 0;
4764 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4767 legacy_mode |= (1 << 0);
4769 if (!request_region(0x170, 8, "libata")) {
4770 struct resource *conflict, res;
4772 res.end = 0x170 + 8 - 1;
4773 conflict = ____request_resource(&ioport_resource, &res);
4774 if (!strcmp(conflict->name, "libata"))
4775 legacy_mode |= (1 << 1);
4777 disable_dev_on_err = 0;
4778 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4781 legacy_mode |= (1 << 1);
4784 /* we have legacy mode, but all ports are unavailable */
4785 if (legacy_mode == (1 << 3)) {
4787 goto err_out_regions;
4790 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4792 goto err_out_regions;
4793 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4795 goto err_out_regions;
4798 if (legacy_mode & (1 << 0))
4799 probe_ent = ata_pci_init_legacy_port(pdev, port, 0);
4800 if (legacy_mode & (1 << 1))
4801 probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1);
4804 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4806 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4808 if (!probe_ent && !probe_ent2) {
4810 goto err_out_regions;
4813 pci_set_master(pdev);
4815 /* FIXME: check ata_device_add return */
4817 if (legacy_mode & (1 << 0))
4818 ata_device_add(probe_ent);
4819 if (legacy_mode & (1 << 1))
4820 ata_device_add(probe_ent2);
4822 ata_device_add(probe_ent);
4830 if (legacy_mode & (1 << 0))
4831 release_region(0x1f0, 8);
4832 if (legacy_mode & (1 << 1))
4833 release_region(0x170, 8);
4834 pci_release_regions(pdev);
4836 if (disable_dev_on_err)
4837 pci_disable_device(pdev);
4842 * ata_pci_remove_one - PCI layer callback for device removal
4843 * @pdev: PCI device that was removed
4845 * PCI layer indicates to libata via this hook that
4846 * hot-unplug or module unload event has occurred.
4847 * Handle this by unregistering all objects associated
4848 * with this PCI device. Free those objects. Then finally
4849 * release PCI resources and disable device.
4852 * Inherited from PCI layer (may sleep).
4855 void ata_pci_remove_one (struct pci_dev *pdev)
4857 struct device *dev = pci_dev_to_dev(pdev);
4858 struct ata_host_set *host_set = dev_get_drvdata(dev);
4860 ata_host_set_remove(host_set);
4861 pci_release_regions(pdev);
4862 pci_disable_device(pdev);
4863 dev_set_drvdata(dev, NULL);
4866 /* move to PCI subsystem */
4867 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4869 unsigned long tmp = 0;
4871 switch (bits->width) {
4874 pci_read_config_byte(pdev, bits->reg, &tmp8);
4880 pci_read_config_word(pdev, bits->reg, &tmp16);
4886 pci_read_config_dword(pdev, bits->reg, &tmp32);
4897 return (tmp == bits->val) ? 1 : 0;
4899 #endif /* CONFIG_PCI */
4902 static int __init ata_init(void)
4904 ata_wq = create_workqueue("ata");
4908 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4912 static void __exit ata_exit(void)
4914 destroy_workqueue(ata_wq);
4917 module_init(ata_init);
4918 module_exit(ata_exit);
4920 static unsigned long ratelimit_time;
4921 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4923 int ata_ratelimit(void)
4926 unsigned long flags;
4928 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4930 if (time_after(jiffies, ratelimit_time)) {
4932 ratelimit_time = jiffies + (HZ/5);
4936 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4942 * libata is essentially a library of internal helper functions for
4943 * low-level ATA host controller drivers. As such, the API/ABI is
4944 * likely to change as new drivers are added and updated.
4945 * Do not depend on ABI/API stability.
4948 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4949 EXPORT_SYMBOL_GPL(ata_std_ports);
4950 EXPORT_SYMBOL_GPL(ata_device_add);
4951 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4952 EXPORT_SYMBOL_GPL(ata_sg_init);
4953 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4954 EXPORT_SYMBOL_GPL(ata_qc_complete);
4955 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4956 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4957 EXPORT_SYMBOL_GPL(ata_tf_load);
4958 EXPORT_SYMBOL_GPL(ata_tf_read);
4959 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4960 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4961 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4962 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4963 EXPORT_SYMBOL_GPL(ata_check_status);
4964 EXPORT_SYMBOL_GPL(ata_altstatus);
4965 EXPORT_SYMBOL_GPL(ata_chk_err);
4966 EXPORT_SYMBOL_GPL(ata_exec_command);
4967 EXPORT_SYMBOL_GPL(ata_port_start);
4968 EXPORT_SYMBOL_GPL(ata_port_stop);
4969 EXPORT_SYMBOL_GPL(ata_host_stop);
4970 EXPORT_SYMBOL_GPL(ata_interrupt);
4971 EXPORT_SYMBOL_GPL(ata_qc_prep);
4972 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4973 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4974 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4975 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4976 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4977 EXPORT_SYMBOL_GPL(ata_port_probe);
4978 EXPORT_SYMBOL_GPL(sata_phy_reset);
4979 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4980 EXPORT_SYMBOL_GPL(ata_bus_reset);
4981 EXPORT_SYMBOL_GPL(ata_port_disable);
4982 EXPORT_SYMBOL_GPL(ata_ratelimit);
4983 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4984 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4985 EXPORT_SYMBOL_GPL(ata_scsi_error);
4986 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4987 EXPORT_SYMBOL_GPL(ata_scsi_release);
4988 EXPORT_SYMBOL_GPL(ata_host_intr);
4989 EXPORT_SYMBOL_GPL(ata_dev_classify);
4990 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4991 EXPORT_SYMBOL_GPL(ata_dev_config);
4992 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4994 EXPORT_SYMBOL_GPL(ata_timing_compute);
4995 EXPORT_SYMBOL_GPL(ata_timing_merge);
4998 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4999 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5000 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5001 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5002 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5003 #endif /* CONFIG_PCI */