drivers/rtc/rtc-cmos.c

   1 /*
   2  * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   3  *
   4  * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   5  * Copyright (C) 2006 David Brownell (convert to new framework)
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 /*
  14  * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  15  * That defined the register interface now provided by all PCs, some
  16  * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  17  * integrate an MC146818 clone in their southbridge, and boards use
  18  * that instead of discrete clones like the DS12887 or M48T86.  There
  19  * are also clones that connect using the LPC bus.
  20  *
  21  * That register API is also used directly by various other drivers
  22  * (notably for integrated NVRAM), infrastructure (x86 has code to
  23  * bypass the RTC framework, directly reading the RTC during boot
  24  * and updating minutes/seconds for systems using NTP synch) and
  25  * utilities (like userspace 'hwclock', if no /dev node exists).
  26  *
  27  * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  28  * interrupts disabled, holding the global rtc_lock, to exclude those
  29  * other drivers and utilities on correctly configured systems.
  30  */
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/init.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/spinlock.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/log2.h>
  38 #include <linux/pm.h>
  39 #include <linux/of.h>
  40 #include <linux/of_platform.h>
  41 #include <linux/dmi.h>
  42
  43 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  44 #include <asm-generic/rtc.h>
  45
  46 struct cmos_rtc {
  47         struct rtc_device       *rtc;
  48         struct device           *dev;
  49         int                     irq;
  50         struct resource         *iomem;
  51
  52         void                    (*wake_on)(struct device *);
  53         void                    (*wake_off)(struct device *);
  54
  55         u8                      enabled_wake;
  56         u8                      suspend_ctrl;
  57
  58         /* newer hardware extends the original register set */
  59         u8                      day_alrm;
  60         u8                      mon_alrm;
  61         u8                      century;
  62 };
  63
  64 /* both platform and pnp busses use negative numbers for invalid irqs */
  65 #define is_valid_irq(n)         ((n) > 0)
  66
  67 static const char driver_name[] = "rtc_cmos";
  68
  69 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  70  * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
  71  * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  72  */
  73 #define RTC_IRQMASK     (RTC_PF | RTC_AF | RTC_UF)
  74
  75 static inline int is_intr(u8 rtc_intr)
  76 {
  77         if (!(rtc_intr & RTC_IRQF))
  78                 return 0;
  79         return rtc_intr & RTC_IRQMASK;
  80 }
  81
  82 /*----------------------------------------------------------------*/
  83
  84 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  85  * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  86  * used in a broken "legacy replacement" mode.  The breakage includes
  87  * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  88  * other (better) use.
  89  *
  90  * When that broken mode is in use, platform glue provides a partial
  91  * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
  92  * want to use HPET for anything except those IRQs though...
  93  */
  94 #ifdef CONFIG_HPET_EMULATE_RTC
  95 #include <asm/hpet.h>
  96 #else
  97
  98 static inline int is_hpet_enabled(void)
  99 {
 100         return 0;
 101 }
 102
 103 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 104 {
 105         return 0;
 106 }
 107
 108 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 109 {
 110         return 0;
 111 }
 112
 113 static inline int
 114 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 115 {
 116         return 0;
 117 }
 118
 119 static inline int hpet_set_periodic_freq(unsigned long freq)
 120 {
 121         return 0;
 122 }
 123
 124 static inline int hpet_rtc_dropped_irq(void)
 125 {
 126         return 0;
 127 }
 128
 129 static inline int hpet_rtc_timer_init(void)
 130 {
 131         return 0;
 132 }
 133
 134 extern irq_handler_t hpet_rtc_interrupt;
 135
 136 static inline int hpet_register_irq_handler(irq_handler_t handler)
 137 {
 138         return 0;
 139 }
 140
 141 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 142 {
 143         return 0;
 144 }
 145
 146 #endif
 147
 148 /*----------------------------------------------------------------*/
 149
 150 #ifdef RTC_PORT
 151
 152 /* Most newer x86 systems have two register banks, the first used
 153  * for RTC and NVRAM and the second only for NVRAM.  Caller must
 154  * own rtc_lock ... and we won't worry about access during NMI.
 155  */
 156 #define can_bank2       true
 157
 158 static inline unsigned char cmos_read_bank2(unsigned char addr)
 159 {
 160         outb(addr, RTC_PORT(2));
 161         return inb(RTC_PORT(3));
 162 }
 163
 164 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 165 {
 166         outb(addr, RTC_PORT(2));
 167         outb(val, RTC_PORT(2));
 168 }
 169
 170 #else
 171
 172 #define can_bank2       false
 173
 174 static inline unsigned char cmos_read_bank2(unsigned char addr)
 175 {
 176         return 0;
 177 }
 178
 179 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 180 {
 181 }
 182
 183 #endif
 184
 185 /*----------------------------------------------------------------*/
 186
 187 static int cmos_read_time(struct device *dev, struct rtc_time *t)
 188 {
 189         /* REVISIT:  if the clock has a "century" register, use
 190          * that instead of the heuristic in get_rtc_time().
 191          * That'll make Y3K compatility (year > 2070) easy!
 192          */
 193         get_rtc_time(t);
 194         return 0;
 195 }
 196
 197 static int cmos_set_time(struct device *dev, struct rtc_time *t)
 198 {
 199         /* REVISIT:  set the "century" register if available
 200          *
 201          * NOTE: this ignores the issue whereby updating the seconds
 202          * takes effect exactly 500ms after we write the register.
 203          * (Also queueing and other delays before we get this far.)
 204          */
 205         return set_rtc_time(t);
 206 }
 207
 208 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 209 {
 210         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 211         unsigned char   rtc_control;
 212
 213         if (!is_valid_irq(cmos->irq))
 214                 return -EIO;
 215
 216         /* Basic alarms only support hour, minute, and seconds fields.
 217          * Some also support day and month, for alarms up to a year in
 218          * the future.
 219          */
 220         t->time.tm_mday = -1;
 221         t->time.tm_mon = -1;
 222
 223         spin_lock_irq(&rtc_lock);
 224         t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 225         t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 226         t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 227
 228         if (cmos->day_alrm) {
 229                 /* ignore upper bits on readback per ACPI spec */
 230                 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
 231                 if (!t->time.tm_mday)
 232                         t->time.tm_mday = -1;
 233
 234                 if (cmos->mon_alrm) {
 235                         t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
 236                         if (!t->time.tm_mon)
 237                                 t->time.tm_mon = -1;
 238                 }
 239         }
 240
 241         rtc_control = CMOS_READ(RTC_CONTROL);
 242         spin_unlock_irq(&rtc_lock);
 243
 244         if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 245                 if (((unsigned)t->time.tm_sec) < 0x60)
 246                         t->time.tm_sec = bcd2bin(t->time.tm_sec);
 247                 else
 248                         t->time.tm_sec = -1;
 249                 if (((unsigned)t->time.tm_min) < 0x60)
 250                         t->time.tm_min = bcd2bin(t->time.tm_min);
 251                 else
 252                         t->time.tm_min = -1;
 253                 if (((unsigned)t->time.tm_hour) < 0x24)
 254                         t->time.tm_hour = bcd2bin(t->time.tm_hour);
 255                 else
 256                         t->time.tm_hour = -1;
 257
 258                 if (cmos->day_alrm) {
 259                         if (((unsigned)t->time.tm_mday) <= 0x31)
 260                                 t->time.tm_mday = bcd2bin(t->time.tm_mday);
 261                         else
 262                                 t->time.tm_mday = -1;
 263
 264                         if (cmos->mon_alrm) {
 265                                 if (((unsigned)t->time.tm_mon) <= 0x12)
 266                                         t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
 267                                 else
 268                                         t->time.tm_mon = -1;
 269                         }
 270                 }
 271         }
 272         t->time.tm_year = -1;
 273
 274         t->enabled = !!(rtc_control & RTC_AIE);
 275         t->pending = 0;
 276
 277         return 0;
 278 }
 279
 280 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 281 {
 282         unsigned char   rtc_intr;
 283
 284         /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 285          * allegedly some older rtcs need that to handle irqs properly
 286          */
 287         rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 288
 289         if (is_hpet_enabled())
 290                 return;
 291
 292         rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 293         if (is_intr(rtc_intr))
 294                 rtc_update_irq(cmos->rtc, 1, rtc_intr);
 295 }
 296
 297 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 298 {
 299         unsigned char   rtc_control;
 300
 301         /* flush any pending IRQ status, notably for update irqs,
 302          * before we enable new IRQs
 303          */
 304         rtc_control = CMOS_READ(RTC_CONTROL);
 305         cmos_checkintr(cmos, rtc_control);
 306
 307         rtc_control |= mask;
 308         CMOS_WRITE(rtc_control, RTC_CONTROL);
 309         hpet_set_rtc_irq_bit(mask);
 310
 311         cmos_checkintr(cmos, rtc_control);
 312 }
 313
 314 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 315 {
 316         unsigned char   rtc_control;
 317
 318         rtc_control = CMOS_READ(RTC_CONTROL);
 319         rtc_control &= ~mask;
 320         CMOS_WRITE(rtc_control, RTC_CONTROL);
 321         hpet_mask_rtc_irq_bit(mask);
 322
 323         cmos_checkintr(cmos, rtc_control);
 324 }
 325
 326 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 327 {
 328         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 329        unsigned char   mon, mday, hrs, min, sec, rtc_control;
 330
 331         if (!is_valid_irq(cmos->irq))
 332                 return -EIO;
 333
 334         mon = t->time.tm_mon + 1;
 335         mday = t->time.tm_mday;
 336         hrs = t->time.tm_hour;
 337         min = t->time.tm_min;
 338         sec = t->time.tm_sec;
 339
 340         rtc_control = CMOS_READ(RTC_CONTROL);
 341         if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 342                 /* Writing 0xff means "don't care" or "match all".  */
 343                 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
 344                 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
 345                 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
 346                 min = (min < 60) ? bin2bcd(min) : 0xff;
 347                 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
 348         }
 349
 350         spin_lock_irq(&rtc_lock);
 351
 352         /* next rtc irq must not be from previous alarm setting */
 353         cmos_irq_disable(cmos, RTC_AIE);
 354
 355         /* update alarm */
 356         CMOS_WRITE(hrs, RTC_HOURS_ALARM);
 357         CMOS_WRITE(min, RTC_MINUTES_ALARM);
 358         CMOS_WRITE(sec, RTC_SECONDS_ALARM);
 359
 360         /* the system may support an "enhanced" alarm */
 361         if (cmos->day_alrm) {
 362                 CMOS_WRITE(mday, cmos->day_alrm);
 363                 if (cmos->mon_alrm)
 364                         CMOS_WRITE(mon, cmos->mon_alrm);
 365         }
 366
 367         /* FIXME the HPET alarm glue currently ignores day_alrm
 368          * and mon_alrm ...
 369          */
 370         hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
 371
 372         if (t->enabled)
 373                 cmos_irq_enable(cmos, RTC_AIE);
 374
 375         spin_unlock_irq(&rtc_lock);
 376
 377         return 0;
 378 }
 379
 380 /*
 381  * Do not disable RTC alarm on shutdown - workaround for b0rked BIOSes.
 382  */
 383 static bool alarm_disable_quirk;
 384
 385 static int __init set_alarm_disable_quirk(const struct dmi_system_id *id)
 386 {
 387         alarm_disable_quirk = true;
 388         pr_info("rtc-cmos: BIOS has alarm-disable quirk. ");
 389         pr_info("RTC alarms disabled\n");
 390         return 0;
 391 }
 392
 393 static const struct dmi_system_id rtc_quirks[] __initconst = {
 394         /* https://bugzilla.novell.com/show_bug.cgi?id=805740 */
 395         {
 396                 .callback = set_alarm_disable_quirk,
 397                 .ident    = "IBM Truman",
 398                 .matches  = {
 399                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 400                         DMI_MATCH(DMI_PRODUCT_NAME, "4852570"),
 401                 },
 402         },
 403         /* https://bugzilla.novell.com/show_bug.cgi?id=812592 */
 404         {
 405                 .callback = set_alarm_disable_quirk,
 406                 .ident    = "Gigabyte GA-990XA-UD3",
 407                 .matches  = {
 408                         DMI_MATCH(DMI_SYS_VENDOR,
 409                                         "Gigabyte Technology Co., Ltd."),
 410                         DMI_MATCH(DMI_PRODUCT_NAME, "GA-990XA-UD3"),
 411                 },
 412         },
 413         /* http://permalink.gmane.org/gmane.linux.kernel/1604474 */
 414         {
 415                 .callback = set_alarm_disable_quirk,
 416                 .ident    = "Toshiba Satellite L300",
 417                 .matches  = {
 418                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 419                         DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
 420                 },
 421         },
 422         {}
 423 };
 424
 425 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 426 {
 427         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 428         unsigned long   flags;
 429
 430         if (!is_valid_irq(cmos->irq))
 431                 return -EINVAL;
 432
 433         if (alarm_disable_quirk)
 434                 return 0;
 435
 436         spin_lock_irqsave(&rtc_lock, flags);
 437
 438         if (enabled)
 439                 cmos_irq_enable(cmos, RTC_AIE);
 440         else
 441                 cmos_irq_disable(cmos, RTC_AIE);
 442
 443         spin_unlock_irqrestore(&rtc_lock, flags);
 444         return 0;
 445 }
 446
 447 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
 448
 449 static int cmos_procfs(struct device *dev, struct seq_file *seq)
 450 {
 451         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 452         unsigned char   rtc_control, valid;
 453
 454         spin_lock_irq(&rtc_lock);
 455         rtc_control = CMOS_READ(RTC_CONTROL);
 456         valid = CMOS_READ(RTC_VALID);
 457         spin_unlock_irq(&rtc_lock);
 458
 459         /* NOTE:  at least ICH6 reports battery status using a different
 460          * (non-RTC) bit; and SQWE is ignored on many current systems.
 461          */
 462         return seq_printf(seq,
 463                         "periodic_IRQ\t: %s\n"
 464                         "update_IRQ\t: %s\n"
 465                         "HPET_emulated\t: %s\n"
 466                         // "square_wave\t: %s\n"
 467                         "BCD\t\t: %s\n"
 468                         "DST_enable\t: %s\n"
 469                         "periodic_freq\t: %d\n"
 470                         "batt_status\t: %s\n",
 471                         (rtc_control & RTC_PIE) ? "yes" : "no",
 472                         (rtc_control & RTC_UIE) ? "yes" : "no",
 473                         is_hpet_enabled() ? "yes" : "no",
 474                         // (rtc_control & RTC_SQWE) ? "yes" : "no",
 475                         (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 476                         (rtc_control & RTC_DST_EN) ? "yes" : "no",
 477                         cmos->rtc->irq_freq,
 478                         (valid & RTC_VRT) ? "okay" : "dead");
 479 }
 480
 481 #else
 482 #define cmos_procfs     NULL
 483 #endif
 484
 485 static const struct rtc_class_ops cmos_rtc_ops = {
 486         .read_time              = cmos_read_time,
 487         .set_time               = cmos_set_time,
 488         .read_alarm             = cmos_read_alarm,
 489         .set_alarm              = cmos_set_alarm,
 490         .proc                   = cmos_procfs,
 491         .alarm_irq_enable       = cmos_alarm_irq_enable,
 492 };
 493
 494 /*----------------------------------------------------------------*/
 495
 496 /*
 497  * All these chips have at least 64 bytes of address space, shared by
 498  * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 499  * by boot firmware.  Modern chips have 128 or 256 bytes.
 500  */
 501
 502 #define NVRAM_OFFSET    (RTC_REG_D + 1)
 503
 504 static ssize_t
 505 cmos_nvram_read(struct file *filp, struct kobject *kobj,
 506                 struct bin_attribute *attr,
 507                 char *buf, loff_t off, size_t count)
 508 {
 509         int     retval;
 510
 511         if (unlikely(off >= attr->size))
 512                 return 0;
 513         if (unlikely(off < 0))
 514                 return -EINVAL;
 515         if ((off + count) > attr->size)
 516                 count = attr->size - off;
 517
 518         off += NVRAM_OFFSET;
 519         spin_lock_irq(&rtc_lock);
 520         for (retval = 0; count; count--, off++, retval++) {
 521                 if (off < 128)
 522                         *buf++ = CMOS_READ(off);
 523                 else if (can_bank2)
 524                         *buf++ = cmos_read_bank2(off);
 525                 else
 526                         break;
 527         }
 528         spin_unlock_irq(&rtc_lock);
 529
 530         return retval;
 531 }
 532
 533 static ssize_t
 534 cmos_nvram_write(struct file *filp, struct kobject *kobj,
 535                 struct bin_attribute *attr,
 536                 char *buf, loff_t off, size_t count)
 537 {
 538         struct cmos_rtc *cmos;
 539         int             retval;
 540
 541         cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
 542         if (unlikely(off >= attr->size))
 543                 return -EFBIG;
 544         if (unlikely(off < 0))
 545                 return -EINVAL;
 546         if ((off + count) > attr->size)
 547                 count = attr->size - off;
 548
 549         /* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 550          * checksum on part of the NVRAM data.  That's currently ignored
 551          * here.  If userspace is smart enough to know what fields of
 552          * NVRAM to update, updating checksums is also part of its job.
 553          */
 554         off += NVRAM_OFFSET;
 555         spin_lock_irq(&rtc_lock);
 556         for (retval = 0; count; count--, off++, retval++) {
 557                 /* don't trash RTC registers */
 558                 if (off == cmos->day_alrm
 559                                 || off == cmos->mon_alrm
 560                                 || off == cmos->century)
 561                         buf++;
 562                 else if (off < 128)
 563                         CMOS_WRITE(*buf++, off);
 564                 else if (can_bank2)
 565                         cmos_write_bank2(*buf++, off);
 566                 else
 567                         break;
 568         }
 569         spin_unlock_irq(&rtc_lock);
 570
 571         return retval;
 572 }
 573
 574 static struct bin_attribute nvram = {
 575         .attr = {
 576                 .name   = "nvram",
 577                 .mode   = S_IRUGO | S_IWUSR,
 578         },
 579
 580         .read   = cmos_nvram_read,
 581         .write  = cmos_nvram_write,
 582         /* size gets set up later */
 583 };
 584
 585 /*----------------------------------------------------------------*/
 586
 587 static struct cmos_rtc  cmos_rtc;
 588
 589 static irqreturn_t cmos_interrupt(int irq, void *p)
 590 {
 591         u8              irqstat;
 592         u8              rtc_control;
 593
 594         spin_lock(&rtc_lock);
 595
 596         /* When the HPET interrupt handler calls us, the interrupt
 597          * status is passed as arg1 instead of the irq number.  But
 598          * always clear irq status, even when HPET is in the way.
 599          *
 600          * Note that HPET and RTC are almost certainly out of phase,
 601          * giving different IRQ status ...
 602          */
 603         irqstat = CMOS_READ(RTC_INTR_FLAGS);
 604         rtc_control = CMOS_READ(RTC_CONTROL);
 605         if (is_hpet_enabled())
 606                 irqstat = (unsigned long)irq & 0xF0;
 607         irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 608
 609         /* All Linux RTC alarms should be treated as if they were oneshot.
 610          * Similar code may be needed in system wakeup paths, in case the
 611          * alarm woke the system.
 612          */
 613         if (irqstat & RTC_AIE) {
 614                 rtc_control &= ~RTC_AIE;
 615                 CMOS_WRITE(rtc_control, RTC_CONTROL);
 616                 hpet_mask_rtc_irq_bit(RTC_AIE);
 617
 618                 CMOS_READ(RTC_INTR_FLAGS);
 619         }
 620         spin_unlock(&rtc_lock);
 621
 622         if (is_intr(irqstat)) {
 623                 rtc_update_irq(p, 1, irqstat);
 624                 return IRQ_HANDLED;
 625         } else
 626                 return IRQ_NONE;
 627 }
 628
 629 #ifdef  CONFIG_PNP
 630 #define INITSECTION
 631
 632 #else
 633 #define INITSECTION     __init
 634 #endif
 635
 636 static int INITSECTION
 637 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 638 {
 639         struct cmos_rtc_board_info      *info = dev->platform_data;
 640         int                             retval = 0;
 641         unsigned char                   rtc_control;
 642         unsigned                        address_space;
 643
 644         /* there can be only one ... */
 645         if (cmos_rtc.dev)
 646                 return -EBUSY;
 647
 648         if (!ports)
 649                 return -ENODEV;
 650
 651         /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 652          *
 653          * REVISIT non-x86 systems may instead use memory space resources
 654          * (needing ioremap etc), not i/o space resources like this ...
 655          */
 656         ports = request_region(ports->start,
 657                         resource_size(ports),
 658                         driver_name);
 659         if (!ports) {
 660                 dev_dbg(dev, "i/o registers already in use\n");
 661                 return -EBUSY;
 662         }
 663
 664         cmos_rtc.irq = rtc_irq;
 665         cmos_rtc.iomem = ports;
 666
 667         /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 668          * driver did, but don't reject unknown configs.   Old hardware
 669          * won't address 128 bytes.  Newer chips have multiple banks,
 670          * though they may not be listed in one I/O resource.
 671          */
 672 #if     defined(CONFIG_ATARI)
 673         address_space = 64;
 674 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 675                         || defined(__sparc__) || defined(__mips__) \
 676                         || defined(__powerpc__)
 677         address_space = 128;
 678 #else
 679 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 680         address_space = 128;
 681 #endif
 682         if (can_bank2 && ports->end > (ports->start + 1))
 683                 address_space = 256;
 684
 685         /* For ACPI systems extension info comes from the FADT.  On others,
 686          * board specific setup provides it as appropriate.  Systems where
 687          * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 688          * some almost-clones) can provide hooks to make that behave.
 689          *
 690          * Note that ACPI doesn't preclude putting these registers into
 691          * "extended" areas of the chip, including some that we won't yet
 692          * expect CMOS_READ and friends to handle.
 693          */
 694         if (info) {
 695                 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
 696                         cmos_rtc.day_alrm = info->rtc_day_alarm;
 697                 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
 698                         cmos_rtc.mon_alrm = info->rtc_mon_alarm;
 699                 if (info->rtc_century && info->rtc_century < 128)
 700                         cmos_rtc.century = info->rtc_century;
 701
 702                 if (info->wake_on && info->wake_off) {
 703                         cmos_rtc.wake_on = info->wake_on;
 704                         cmos_rtc.wake_off = info->wake_off;
 705                 }
 706         }
 707
 708         cmos_rtc.dev = dev;
 709         dev_set_drvdata(dev, &cmos_rtc);
 710
 711         cmos_rtc.rtc = rtc_device_register(driver_name, dev,
 712                                 &cmos_rtc_ops, THIS_MODULE);
 713         if (IS_ERR(cmos_rtc.rtc)) {
 714                 retval = PTR_ERR(cmos_rtc.rtc);
 715                 goto cleanup0;
 716         }
 717
 718         rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 719
 720         spin_lock_irq(&rtc_lock);
 721
 722         /* force periodic irq to CMOS reset default of 1024Hz;
 723          *
 724          * REVISIT it's been reported that at least one x86_64 ALI mobo
 725          * doesn't use 32KHz here ... for portability we might need to
 726          * do something about other clock frequencies.
 727          */
 728         cmos_rtc.rtc->irq_freq = 1024;
 729         hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
 730         CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
 731
 732         /* disable irqs */
 733         cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
 734
 735         rtc_control = CMOS_READ(RTC_CONTROL);
 736
 737         spin_unlock_irq(&rtc_lock);
 738
 739         /* FIXME:
 740          * <asm-generic/rtc.h> doesn't know 12-hour mode either.
 741          */
 742        if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
 743                 dev_warn(dev, "only 24-hr supported\n");
 744                 retval = -ENXIO;
 745                 goto cleanup1;
 746         }
 747
 748         if (is_valid_irq(rtc_irq)) {
 749                 irq_handler_t rtc_cmos_int_handler;
 750
 751                 if (is_hpet_enabled()) {
 752                         int err;
 753
 754                         rtc_cmos_int_handler = hpet_rtc_interrupt;
 755                         err = hpet_register_irq_handler(cmos_interrupt);
 756                         if (err != 0) {
 757                                 printk(KERN_WARNING "hpet_register_irq_handler "
 758                                                 " failed in rtc_init().");
 759                                 goto cleanup1;
 760                         }
 761                 } else
 762                         rtc_cmos_int_handler = cmos_interrupt;
 763
 764                 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
 765                                 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
 766                                 cmos_rtc.rtc);
 767                 if (retval < 0) {
 768                         dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
 769                         goto cleanup1;
 770                 }
 771         }
 772         hpet_rtc_timer_init();
 773
 774         /* export at least the first block of NVRAM */
 775         nvram.size = address_space - NVRAM_OFFSET;
 776         retval = sysfs_create_bin_file(&dev->kobj, &nvram);
 777         if (retval < 0) {
 778                 dev_dbg(dev, "can't create nvram file? %d\n", retval);
 779                 goto cleanup2;
 780         }
 781
 782         pr_info("%s: %s%s, %zd bytes nvram%s\n",
 783                 dev_name(&cmos_rtc.rtc->dev),
 784                 !is_valid_irq(rtc_irq) ? "no alarms" :
 785                         cmos_rtc.mon_alrm ? "alarms up to one year" :
 786                         cmos_rtc.day_alrm ? "alarms up to one month" :
 787                         "alarms up to one day",
 788                 cmos_rtc.century ? ", y3k" : "",
 789                 nvram.size,
 790                 is_hpet_enabled() ? ", hpet irqs" : "");
 791
 792         return 0;
 793
 794 cleanup2:
 795         if (is_valid_irq(rtc_irq))
 796                 free_irq(rtc_irq, cmos_rtc.rtc);
 797 cleanup1:
 798         cmos_rtc.dev = NULL;
 799         rtc_device_unregister(cmos_rtc.rtc);
 800 cleanup0:
 801         release_region(ports->start, resource_size(ports));
 802         return retval;
 803 }
 804
 805 static void cmos_do_shutdown(void)
 806 {
 807         spin_lock_irq(&rtc_lock);
 808         cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
 809         spin_unlock_irq(&rtc_lock);
 810 }
 811
 812 static void __exit cmos_do_remove(struct device *dev)
 813 {
 814         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 815         struct resource *ports;
 816
 817         cmos_do_shutdown();
 818
 819         sysfs_remove_bin_file(&dev->kobj, &nvram);
 820
 821         if (is_valid_irq(cmos->irq)) {
 822                 free_irq(cmos->irq, cmos->rtc);
 823                 hpet_unregister_irq_handler(cmos_interrupt);
 824         }
 825
 826         rtc_device_unregister(cmos->rtc);
 827         cmos->rtc = NULL;
 828
 829         ports = cmos->iomem;
 830         release_region(ports->start, resource_size(ports));
 831         cmos->iomem = NULL;
 832
 833         cmos->dev = NULL;
 834         dev_set_drvdata(dev, NULL);
 835 }
 836
 837 #ifdef  CONFIG_PM
 838
 839 static int cmos_suspend(struct device *dev)
 840 {
 841         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 842         unsigned char   tmp;
 843
 844         /* only the alarm might be a wakeup event source */
 845         spin_lock_irq(&rtc_lock);
 846         cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
 847         if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
 848                 unsigned char   mask;
 849
 850                 if (device_may_wakeup(dev))
 851                         mask = RTC_IRQMASK & ~RTC_AIE;
 852                 else
 853                         mask = RTC_IRQMASK;
 854                 tmp &= ~mask;
 855                 CMOS_WRITE(tmp, RTC_CONTROL);
 856                 hpet_mask_rtc_irq_bit(mask);
 857
 858                 cmos_checkintr(cmos, tmp);
 859         }
 860         spin_unlock_irq(&rtc_lock);
 861
 862         if (tmp & RTC_AIE) {
 863                 cmos->enabled_wake = 1;
 864                 if (cmos->wake_on)
 865                         cmos->wake_on(dev);
 866                 else
 867                         enable_irq_wake(cmos->irq);
 868         }
 869
 870         pr_debug("%s: suspend%s, ctrl %02x\n",
 871                         dev_name(&cmos_rtc.rtc->dev),
 872                         (tmp & RTC_AIE) ? ", alarm may wake" : "",
 873                         tmp);
 874
 875         return 0;
 876 }
 877
 878 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
 879  * after a detour through G3 "mechanical off", although the ACPI spec
 880  * says wakeup should only work from G1/S4 "hibernate".  To most users,
 881  * distinctions between S4 and S5 are pointless.  So when the hardware
 882  * allows, don't draw that distinction.
 883  */
 884 static inline int cmos_poweroff(struct device *dev)
 885 {
 886         return cmos_suspend(dev);
 887 }
 888
 889 static int cmos_resume(struct device *dev)
 890 {
 891         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 892         unsigned char   tmp = cmos->suspend_ctrl;
 893
 894         /* re-enable any irqs previously active */
 895         if (tmp & RTC_IRQMASK) {
 896                 unsigned char   mask;
 897
 898                 if (cmos->enabled_wake) {
 899                         if (cmos->wake_off)
 900                                 cmos->wake_off(dev);
 901                         else
 902                                 disable_irq_wake(cmos->irq);
 903                         cmos->enabled_wake = 0;
 904                 }
 905
 906                 spin_lock_irq(&rtc_lock);
 907                 do {
 908                         CMOS_WRITE(tmp, RTC_CONTROL);
 909                         hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
 910
 911                         mask = CMOS_READ(RTC_INTR_FLAGS);
 912                         mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
 913                         if (!is_hpet_enabled() || !is_intr(mask))
 914                                 break;
 915
 916                         /* force one-shot behavior if HPET blocked
 917                          * the wake alarm's irq
 918                          */
 919                         rtc_update_irq(cmos->rtc, 1, mask);
 920                         tmp &= ~RTC_AIE;
 921                         hpet_mask_rtc_irq_bit(RTC_AIE);
 922                         hpet_rtc_timer_init();
 923                 } while (mask & RTC_AIE);
 924                 spin_unlock_irq(&rtc_lock);
 925         }
 926
 927         pr_debug("%s: resume, ctrl %02x\n",
 928                         dev_name(&cmos_rtc.rtc->dev),
 929                         tmp);
 930
 931         return 0;
 932 }
 933
 934 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
 935
 936 #else
 937
 938 static inline int cmos_poweroff(struct device *dev)
 939 {
 940         return -ENOSYS;
 941 }
 942
 943 #endif
 944
 945 /*----------------------------------------------------------------*/
 946
 947 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
 948  * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
 949  * probably list them in similar PNPBIOS tables; so PNP is more common.
 950  *
 951  * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
 952  * predate even PNPBIOS should set up platform_bus devices.
 953  */
 954
 955 #ifdef  CONFIG_ACPI
 956
 957 #include <linux/acpi.h>
 958
 959 static u32 rtc_handler(void *context)
 960 {
 961         acpi_clear_event(ACPI_EVENT_RTC);
 962         acpi_disable_event(ACPI_EVENT_RTC, 0);
 963         return ACPI_INTERRUPT_HANDLED;
 964 }
 965
 966 static inline void rtc_wake_setup(void)
 967 {
 968         acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
 969         /*
 970          * After the RTC handler is installed, the Fixed_RTC event should
 971          * be disabled. Only when the RTC alarm is set will it be enabled.
 972          */
 973         acpi_clear_event(ACPI_EVENT_RTC);
 974         acpi_disable_event(ACPI_EVENT_RTC, 0);
 975 }
 976
 977 static void rtc_wake_on(struct device *dev)
 978 {
 979         acpi_clear_event(ACPI_EVENT_RTC);
 980         acpi_enable_event(ACPI_EVENT_RTC, 0);
 981 }
 982
 983 static void rtc_wake_off(struct device *dev)
 984 {
 985         acpi_disable_event(ACPI_EVENT_RTC, 0);
 986 }
 987
 988 /* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
 989  * its device node and pass extra config data.  This helps its driver use
 990  * capabilities that the now-obsolete mc146818 didn't have, and informs it
 991  * that this board's RTC is wakeup-capable (per ACPI spec).
 992  */
 993 static struct cmos_rtc_board_info acpi_rtc_info;
 994
 995 static void __devinit
 996 cmos_wake_setup(struct device *dev)
 997 {
 998         if (acpi_disabled)
 999                 return;
1000
1001         rtc_wake_setup();
1002         acpi_rtc_info.wake_on = rtc_wake_on;
1003         acpi_rtc_info.wake_off = rtc_wake_off;
1004
1005         /* workaround bug in some ACPI tables */
1006         if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1007                 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1008                         acpi_gbl_FADT.month_alarm);
1009                 acpi_gbl_FADT.month_alarm = 0;
1010         }
1011
1012         acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1013         acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1014         acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1015
1016         /* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
1017         if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1018                 dev_info(dev, "RTC can wake from S4\n");
1019
1020         dev->platform_data = &acpi_rtc_info;
1021
1022         /* RTC always wakes from S1/S2/S3, and often S4/STD */
1023         device_init_wakeup(dev, 1);
1024 }
1025
1026 #else
1027
1028 static void __devinit
1029 cmos_wake_setup(struct device *dev)
1030 {
1031 }
1032
1033 #endif
1034
1035 #ifdef  CONFIG_PNP
1036
1037 #include <linux/pnp.h>
1038
1039 static int __devinit
1040 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1041 {
1042         cmos_wake_setup(&pnp->dev);
1043
1044         if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1045                 /* Some machines contain a PNP entry for the RTC, but
1046                  * don't define the IRQ. It should always be safe to
1047                  * hardcode it in these cases
1048                  */
1049                 return cmos_do_probe(&pnp->dev,
1050                                 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1051         else
1052                 return cmos_do_probe(&pnp->dev,
1053                                 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1054                                 pnp_irq(pnp, 0));
1055 }
1056
1057 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1058 {
1059         cmos_do_remove(&pnp->dev);
1060 }
1061
1062 #ifdef  CONFIG_PM
1063
1064 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1065 {
1066         return cmos_suspend(&pnp->dev);
1067 }
1068
1069 static int cmos_pnp_resume(struct pnp_dev *pnp)
1070 {
1071         return cmos_resume(&pnp->dev);
1072 }
1073
1074 #else
1075 #define cmos_pnp_suspend        NULL
1076 #define cmos_pnp_resume         NULL
1077 #endif
1078
1079 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1080 {
1081         if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1082                 return;
1083
1084         cmos_do_shutdown();
1085 }
1086
1087 static const struct pnp_device_id rtc_ids[] = {
1088         { .id = "PNP0b00", },
1089         { .id = "PNP0b01", },
1090         { .id = "PNP0b02", },
1091         { },
1092 };
1093 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1094
1095 static struct pnp_driver cmos_pnp_driver = {
1096         .name           = (char *) driver_name,
1097         .id_table       = rtc_ids,
1098         .probe          = cmos_pnp_probe,
1099         .remove         = __exit_p(cmos_pnp_remove),
1100         .shutdown       = cmos_pnp_shutdown,
1101
1102         /* flag ensures resume() gets called, and stops syslog spam */
1103         .flags          = PNP_DRIVER_RES_DO_NOT_CHANGE,
1104         .suspend        = cmos_pnp_suspend,
1105         .resume         = cmos_pnp_resume,
1106 };
1107
1108 #endif  /* CONFIG_PNP */
1109
1110 #ifdef CONFIG_OF
1111 static const struct of_device_id of_cmos_match[] = {
1112         {
1113                 .compatible = "motorola,mc146818",
1114         },
1115         { },
1116 };
1117 MODULE_DEVICE_TABLE(of, of_cmos_match);
1118
1119 static __init void cmos_of_init(struct platform_device *pdev)
1120 {
1121         struct device_node *node = pdev->dev.of_node;
1122         struct rtc_time time;
1123         int ret;
1124         const __be32 *val;
1125
1126         if (!node)
1127                 return;
1128
1129         val = of_get_property(node, "ctrl-reg", NULL);
1130         if (val)
1131                 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1132
1133         val = of_get_property(node, "freq-reg", NULL);
1134         if (val)
1135                 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1136
1137         get_rtc_time(&time);
1138         ret = rtc_valid_tm(&time);
1139         if (ret) {
1140                 struct rtc_time def_time = {
1141                         .tm_year = 1,
1142                         .tm_mday = 1,
1143                 };
1144                 set_rtc_time(&def_time);
1145         }
1146 }
1147 #else
1148 static inline void cmos_of_init(struct platform_device *pdev) {}
1149 #define of_cmos_match NULL
1150 #endif
1151 /*----------------------------------------------------------------*/
1152
1153 /* Platform setup should have set up an RTC device, when PNP is
1154  * unavailable ... this could happen even on (older) PCs.
1155  */
1156
1157 static int __init cmos_platform_probe(struct platform_device *pdev)
1158 {
1159         cmos_of_init(pdev);
1160         cmos_wake_setup(&pdev->dev);
1161         return cmos_do_probe(&pdev->dev,
1162                         platform_get_resource(pdev, IORESOURCE_IO, 0),
1163                         platform_get_irq(pdev, 0));
1164 }
1165
1166 static int __exit cmos_platform_remove(struct platform_device *pdev)
1167 {
1168         cmos_do_remove(&pdev->dev);
1169         return 0;
1170 }
1171
1172 static void cmos_platform_shutdown(struct platform_device *pdev)
1173 {
1174         if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1175                 return;
1176
1177         cmos_do_shutdown();
1178 }
1179
1180 /* work with hotplug and coldplug */
1181 MODULE_ALIAS("platform:rtc_cmos");
1182
1183 static struct platform_driver cmos_platform_driver = {
1184         .remove         = __exit_p(cmos_platform_remove),
1185         .shutdown       = cmos_platform_shutdown,
1186         .driver = {
1187                 .name           = (char *) driver_name,
1188 #ifdef CONFIG_PM
1189                 .pm             = &cmos_pm_ops,
1190 #endif
1191                 .of_match_table = of_cmos_match,
1192         }
1193 };
1194
1195 #ifdef CONFIG_PNP
1196 static bool pnp_driver_registered;
1197 #endif
1198 static bool platform_driver_registered;
1199
1200 static int __init cmos_init(void)
1201 {
1202         int retval = 0;
1203
1204 #ifdef  CONFIG_PNP
1205         retval = pnp_register_driver(&cmos_pnp_driver);
1206         if (retval == 0)
1207                 pnp_driver_registered = true;
1208 #endif
1209
1210         if (!cmos_rtc.dev) {
1211                 retval = platform_driver_probe(&cmos_platform_driver,
1212                                                cmos_platform_probe);
1213                 if (retval == 0)
1214                         platform_driver_registered = true;
1215         }
1216
1217         dmi_check_system(rtc_quirks);
1218
1219         if (retval == 0)
1220                 return 0;
1221
1222 #ifdef  CONFIG_PNP
1223         if (pnp_driver_registered)
1224                 pnp_unregister_driver(&cmos_pnp_driver);
1225 #endif
1226         return retval;
1227 }
1228 module_init(cmos_init);
1229
1230 static void __exit cmos_exit(void)
1231 {
1232 #ifdef  CONFIG_PNP
1233         if (pnp_driver_registered)
1234                 pnp_unregister_driver(&cmos_pnp_driver);
1235 #endif
1236         if (platform_driver_registered)
1237                 platform_driver_unregister(&cmos_platform_driver);
1238 }
1239 module_exit(cmos_exit);
1240
1241
1242 MODULE_AUTHOR("David Brownell");
1243 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1244 MODULE_LICENSE("GPL");