Merge branch 'topic/lola' into for-linus
[pandora-kernel.git] / drivers / net / wireless / rtlwifi / rtl8192ce / sw.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2010  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <wlanfae@realtek.com>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <Larry.Finger@lwfinger.net>
27  *
28  *****************************************************************************/
29
30 #include <linux/vmalloc.h>
31
32 #include "../wifi.h"
33 #include "../core.h"
34 #include "../pci.h"
35 #include "reg.h"
36 #include "def.h"
37 #include "phy.h"
38 #include "dm.h"
39 #include "hw.h"
40 #include "rf.h"
41 #include "sw.h"
42 #include "trx.h"
43 #include "led.h"
44
45 int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
46 {
47         struct rtl_priv *rtlpriv = rtl_priv(hw);
48         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
49
50         rtlpriv->dm.dm_initialgain_enable = 1;
51         rtlpriv->dm.dm_flag = 0;
52         rtlpriv->dm.disable_framebursting = 0;
53         rtlpriv->dm.thermalvalue = 0;
54         rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
55
56         rtlpci->receive_config = (RCR_APP_FCS |
57                                   RCR_AMF |
58                                   RCR_ADF |
59                                   RCR_APP_MIC |
60                                   RCR_APP_ICV |
61                                   RCR_AICV |
62                                   RCR_ACRC32 |
63                                   RCR_AB |
64                                   RCR_AM |
65                                   RCR_APM |
66                                   RCR_APP_PHYST_RXFF | RCR_HTC_LOC_CTRL | 0);
67
68         rtlpci->irq_mask[0] =
69             (u32) (IMR_ROK |
70                    IMR_VODOK |
71                    IMR_VIDOK |
72                    IMR_BEDOK |
73                    IMR_BKDOK |
74                    IMR_MGNTDOK |
75                    IMR_HIGHDOK | IMR_BDOK | IMR_RDU | IMR_RXFOVW | 0);
76
77         rtlpci->irq_mask[1] = (u32) (IMR_CPWM | IMR_C2HCMD | 0);
78
79         rtlpriv->rtlhal.pfirmware = (u8 *) vmalloc(0x4000);
80         if (!rtlpriv->rtlhal.pfirmware) {
81                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
82                          ("Can't alloc buffer for fw.\n"));
83                 return 1;
84         }
85
86         return 0;
87 }
88
89 void rtl92c_deinit_sw_vars(struct ieee80211_hw *hw)
90 {
91         struct rtl_priv *rtlpriv = rtl_priv(hw);
92
93         if (rtlpriv->rtlhal.pfirmware) {
94                 vfree(rtlpriv->rtlhal.pfirmware);
95                 rtlpriv->rtlhal.pfirmware = NULL;
96         }
97 }
98
99 static struct rtl_hal_ops rtl8192ce_hal_ops = {
100         .init_sw_vars = rtl92c_init_sw_vars,
101         .deinit_sw_vars = rtl92c_deinit_sw_vars,
102         .read_eeprom_info = rtl92ce_read_eeprom_info,
103         .interrupt_recognized = rtl92ce_interrupt_recognized,
104         .hw_init = rtl92ce_hw_init,
105         .hw_disable = rtl92ce_card_disable,
106         .enable_interrupt = rtl92ce_enable_interrupt,
107         .disable_interrupt = rtl92ce_disable_interrupt,
108         .set_network_type = rtl92ce_set_network_type,
109         .set_qos = rtl92ce_set_qos,
110         .set_bcn_reg = rtl92ce_set_beacon_related_registers,
111         .set_bcn_intv = rtl92ce_set_beacon_interval,
112         .update_interrupt_mask = rtl92ce_update_interrupt_mask,
113         .get_hw_reg = rtl92ce_get_hw_reg,
114         .set_hw_reg = rtl92ce_set_hw_reg,
115         .update_rate_table = rtl92ce_update_hal_rate_table,
116         .update_rate_mask = rtl92ce_update_hal_rate_mask,
117         .fill_tx_desc = rtl92ce_tx_fill_desc,
118         .fill_tx_cmddesc = rtl92ce_tx_fill_cmddesc,
119         .query_rx_desc = rtl92ce_rx_query_desc,
120         .set_channel_access = rtl92ce_update_channel_access_setting,
121         .radio_onoff_checking = rtl92ce_gpio_radio_on_off_checking,
122         .set_bw_mode = rtl92c_phy_set_bw_mode,
123         .switch_channel = rtl92c_phy_sw_chnl,
124         .dm_watchdog = rtl92c_dm_watchdog,
125         .scan_operation_backup = rtl92c_phy_scan_operation_backup,
126         .set_rf_power_state = rtl92ce_phy_set_rf_power_state,
127         .led_control = rtl92ce_led_control,
128         .set_desc = rtl92ce_set_desc,
129         .get_desc = rtl92ce_get_desc,
130         .tx_polling = rtl92ce_tx_polling,
131         .enable_hw_sec = rtl92ce_enable_hw_security_config,
132         .set_key = rtl92ce_set_key,
133         .init_sw_leds = rtl92ce_init_sw_leds,
134         .deinit_sw_leds = rtl92ce_deinit_sw_leds,
135         .get_bbreg = rtl92c_phy_query_bb_reg,
136         .set_bbreg = rtl92c_phy_set_bb_reg,
137         .get_rfreg = rtl92ce_phy_query_rf_reg,
138         .set_rfreg = rtl92ce_phy_set_rf_reg,
139         .cmd_send_packet = _rtl92c_cmd_send_packet,
140         .phy_rf6052_config = rtl92ce_phy_rf6052_config,
141         .phy_rf6052_set_cck_txpower = rtl92ce_phy_rf6052_set_cck_txpower,
142         .phy_rf6052_set_ofdm_txpower = rtl92ce_phy_rf6052_set_ofdm_txpower,
143         .config_bb_with_headerfile = _rtl92ce_phy_config_bb_with_headerfile,
144         .config_bb_with_pgheaderfile = _rtl92ce_phy_config_bb_with_pgheaderfile,
145         .phy_lc_calibrate = _rtl92ce_phy_lc_calibrate,
146         .phy_set_bw_mode_callback = rtl92ce_phy_set_bw_mode_callback,
147         .dm_dynamic_txpower = rtl92ce_dm_dynamic_txpower,
148 };
149
150 static struct rtl_mod_params rtl92ce_mod_params = {
151         .sw_crypto = 0,
152 };
153
154 static struct rtl_hal_cfg rtl92ce_hal_cfg = {
155         .name = "rtl92c_pci",
156         .fw_name = "rtlwifi/rtl8192cfw.bin",
157         .ops = &rtl8192ce_hal_ops,
158         .mod_params = &rtl92ce_mod_params,
159
160         .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
161         .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
162         .maps[SYS_CLK] = REG_SYS_CLKR,
163         .maps[MAC_RCR_AM] = AM,
164         .maps[MAC_RCR_AB] = AB,
165         .maps[MAC_RCR_ACRC32] = ACRC32,
166         .maps[MAC_RCR_ACF] = ACF,
167         .maps[MAC_RCR_AAP] = AAP,
168
169         .maps[EFUSE_TEST] = REG_EFUSE_TEST,
170         .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
171         .maps[EFUSE_CLK] = 0,
172         .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
173         .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
174         .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
175         .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
176         .maps[EFUSE_ANA8M] = EFUSE_ANA8M,
177         .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
178
179         .maps[RWCAM] = REG_CAMCMD,
180         .maps[WCAMI] = REG_CAMWRITE,
181         .maps[RCAMO] = REG_CAMREAD,
182         .maps[CAMDBG] = REG_CAMDBG,
183         .maps[SECR] = REG_SECCFG,
184         .maps[SEC_CAM_NONE] = CAM_NONE,
185         .maps[SEC_CAM_WEP40] = CAM_WEP40,
186         .maps[SEC_CAM_TKIP] = CAM_TKIP,
187         .maps[SEC_CAM_AES] = CAM_AES,
188         .maps[SEC_CAM_WEP104] = CAM_WEP104,
189
190         .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
191         .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
192         .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
193         .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
194         .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
195         .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
196         .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
197         .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
198         .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
199         .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
200         .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
201         .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
202         .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
203         .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
204         .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
205         .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
206
207         .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
208         .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
209         .maps[RTL_IMR_BcnInt] = IMR_BCNINT,
210         .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
211         .maps[RTL_IMR_RDU] = IMR_RDU,
212         .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
213         .maps[RTL_IMR_BDOK] = IMR_BDOK,
214         .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
215         .maps[RTL_IMR_TBDER] = IMR_TBDER,
216         .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
217         .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
218         .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
219         .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
220         .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
221         .maps[RTL_IMR_VODOK] = IMR_VODOK,
222         .maps[RTL_IMR_ROK] = IMR_ROK,
223         .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER),
224
225         .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
226         .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
227         .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
228         .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
229         .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
230         .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
231         .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
232         .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
233         .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
234         .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
235         .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
236         .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
237
238         .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
239         .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
240 };
241
242 static struct pci_device_id rtl92ce_pci_ids[] __devinitdata = {
243         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8191, rtl92ce_hal_cfg)},
244         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8178, rtl92ce_hal_cfg)},
245         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8177, rtl92ce_hal_cfg)},
246         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8176, rtl92ce_hal_cfg)},
247         {},
248 };
249
250 MODULE_DEVICE_TABLE(pci, rtl92ce_pci_ids);
251
252 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
253 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
254 MODULE_AUTHOR("Larry Finger     <Larry.Finger@lwfinger.net>");
255 MODULE_LICENSE("GPL");
256 MODULE_DESCRIPTION("Realtek 8192C/8188C 802.11n PCI wireless");
257 MODULE_FIRMWARE("rtlwifi/rtl8192cfw.bin");
258
259 module_param_named(swenc, rtl92ce_mod_params.sw_crypto, bool, 0444);
260 MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n");
261
262 static struct pci_driver rtl92ce_driver = {
263         .name = KBUILD_MODNAME,
264         .id_table = rtl92ce_pci_ids,
265         .probe = rtl_pci_probe,
266         .remove = rtl_pci_disconnect,
267
268 #ifdef CONFIG_PM
269         .suspend = rtl_pci_suspend,
270         .resume = rtl_pci_resume,
271 #endif
272
273 };
274
275 static int __init rtl92ce_module_init(void)
276 {
277         int ret;
278
279         ret = pci_register_driver(&rtl92ce_driver);
280         if (ret)
281                 RT_ASSERT(false, (": No device found\n"));
282
283         return ret;
284 }
285
286 static void __exit rtl92ce_module_exit(void)
287 {
288         pci_unregister_driver(&rtl92ce_driver);
289 }
290
291 module_init(rtl92ce_module_init);
292 module_exit(rtl92ce_module_exit);