drivers/net/wireless/rtlwifi/rtl8192ce/dm.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "../wifi.h"
  31 #include "../base.h"
  32 #include "reg.h"
  33 #include "def.h"
  34 #include "phy.h"
  35 #include "dm.h"
  36 #include "fw.h"
  37
  38 struct dig_t dm_digtable;
  39 static struct ps_t dm_pstable;
  40
  41 static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
  42         0x7f8001fe,
  43         0x788001e2,
  44         0x71c001c7,
  45         0x6b8001ae,
  46         0x65400195,
  47         0x5fc0017f,
  48         0x5a400169,
  49         0x55400155,
  50         0x50800142,
  51         0x4c000130,
  52         0x47c0011f,
  53         0x43c0010f,
  54         0x40000100,
  55         0x3c8000f2,
  56         0x390000e4,
  57         0x35c000d7,
  58         0x32c000cb,
  59         0x300000c0,
  60         0x2d4000b5,
  61         0x2ac000ab,
  62         0x288000a2,
  63         0x26000098,
  64         0x24000090,
  65         0x22000088,
  66         0x20000080,
  67         0x1e400079,
  68         0x1c800072,
  69         0x1b00006c,
  70         0x19800066,
  71         0x18000060,
  72         0x16c0005b,
  73         0x15800056,
  74         0x14400051,
  75         0x1300004c,
  76         0x12000048,
  77         0x11000044,
  78         0x10000040,
  79 };
  80
  81 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  82         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
  83         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
  84         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
  85         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
  86         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
  87         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
  88         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
  89         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
  90         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
  91         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
  92         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
  93         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
  94         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
  95         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
  96         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
  97         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
  98         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
  99         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
 100         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 101         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 102         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 103         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
 104         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
 105         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
 106         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
 107         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
 108         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
 109         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
 110         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
 111         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
 112         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
 113         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
 114         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
 115 };
 116
 117 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
 118         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 119         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
 120         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 121         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
 122         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 123         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
 124         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 125         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
 126         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 127         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
 128         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 129         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
 130         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 131         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
 132         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 133         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
 134         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 135         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
 136         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 137         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 138         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 139         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
 140         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
 141         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 142         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 143         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
 144         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 145         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 146         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 147         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 148         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 149         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 150         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
 151 };
 152
 153 static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
 154 {
 155         dm_digtable.dig_enable_flag = true;
 156         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 157         dm_digtable.cur_igvalue = 0x20;
 158         dm_digtable.pre_igvalue = 0x0;
 159         dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 160         dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
 161         dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
 162         dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
 163         dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
 164         dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
 165         dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
 166         dm_digtable.rx_gain_range_max = DM_DIG_MAX;
 167         dm_digtable.rx_gain_range_min = DM_DIG_MIN;
 168         dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 169         dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
 170         dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
 171         dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
 172         dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 173 }
 174
 175 static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
 176 {
 177         struct rtl_priv *rtlpriv = rtl_priv(hw);
 178         long rssi_val_min = 0;
 179
 180         if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
 181             (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
 182                 if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
 183                         rssi_val_min =
 184                             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
 185                              rtlpriv->dm.undecorated_smoothed_pwdb) ?
 186                             rtlpriv->dm.undecorated_smoothed_pwdb :
 187                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 188                 else
 189                         rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 190         } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
 191                    dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
 192                 rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 193         } else if (dm_digtable.curmultista_connectstate ==
 194                    DIG_MULTISTA_CONNECT) {
 195                 rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 196         }
 197
 198         return (u8) rssi_val_min;
 199 }
 200
 201 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
 202 {
 203         u32 ret_value;
 204         struct rtl_priv *rtlpriv = rtl_priv(hw);
 205         struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
 206
 207         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
 208         falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
 209
 210         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
 211         falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
 212         falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
 213
 214         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
 215         falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
 216         falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
 217             falsealm_cnt->cnt_rate_illegal +
 218             falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
 219
 220         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
 221         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
 222         falsealm_cnt->cnt_cck_fail = ret_value;
 223
 224         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
 225         falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
 226         falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
 227                                  falsealm_cnt->cnt_rate_illegal +
 228                                  falsealm_cnt->cnt_crc8_fail +
 229                                  falsealm_cnt->cnt_mcs_fail +
 230                                  falsealm_cnt->cnt_cck_fail);
 231
 232         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
 233         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
 234         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
 235         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
 236
 237         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 238                  ("cnt_parity_fail = %d, cnt_rate_illegal = %d, "
 239                   "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
 240                   falsealm_cnt->cnt_parity_fail,
 241                   falsealm_cnt->cnt_rate_illegal,
 242                   falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail));
 243
 244         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 245                  ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
 246                   falsealm_cnt->cnt_ofdm_fail,
 247                   falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all));
 248 }
 249
 250 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
 251 {
 252         struct rtl_priv *rtlpriv = rtl_priv(hw);
 253         u8 value_igi = dm_digtable.cur_igvalue;
 254
 255         if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
 256                 value_igi--;
 257         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
 258                 value_igi += 0;
 259         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
 260                 value_igi++;
 261         else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
 262                 value_igi += 2;
 263         if (value_igi > DM_DIG_FA_UPPER)
 264                 value_igi = DM_DIG_FA_UPPER;
 265         else if (value_igi < DM_DIG_FA_LOWER)
 266                 value_igi = DM_DIG_FA_LOWER;
 267         if (rtlpriv->falsealm_cnt.cnt_all > 10000)
 268                 value_igi = 0x32;
 269
 270         dm_digtable.cur_igvalue = value_igi;
 271         rtl92c_dm_write_dig(hw);
 272 }
 273
 274 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
 275 {
 276         struct rtl_priv *rtlpriv = rtl_priv(hw);
 277
 278         if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
 279                 if ((dm_digtable.backoff_val - 2) <
 280                     dm_digtable.backoff_val_range_min)
 281                         dm_digtable.backoff_val =
 282                             dm_digtable.backoff_val_range_min;
 283                 else
 284                         dm_digtable.backoff_val -= 2;
 285         } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
 286                 if ((dm_digtable.backoff_val + 2) >
 287                     dm_digtable.backoff_val_range_max)
 288                         dm_digtable.backoff_val =
 289                             dm_digtable.backoff_val_range_max;
 290                 else
 291                         dm_digtable.backoff_val += 2;
 292         }
 293
 294         if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
 295             dm_digtable.rx_gain_range_max)
 296                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
 297         else if ((dm_digtable.rssi_val_min + 10 -
 298                   dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
 299                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
 300         else
 301                 dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
 302                     dm_digtable.backoff_val;
 303
 304         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 305                  ("rssi_val_min = %x backoff_val %x\n",
 306                   dm_digtable.rssi_val_min, dm_digtable.backoff_val));
 307
 308         rtl92c_dm_write_dig(hw);
 309 }
 310
 311 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
 312 {
 313         static u8 binitialized; /* initialized to false */
 314         struct rtl_priv *rtlpriv = rtl_priv(hw);
 315         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 316         long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 317         bool b_multi_sta = false;
 318
 319         if (mac->opmode == NL80211_IFTYPE_ADHOC)
 320                 b_multi_sta = true;
 321
 322         if ((b_multi_sta == false) || (dm_digtable.cursta_connectctate !=
 323                                        DIG_STA_DISCONNECT)) {
 324                 binitialized = false;
 325                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 326                 return;
 327         } else if (binitialized == false) {
 328                 binitialized = true;
 329                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 330                 dm_digtable.cur_igvalue = 0x20;
 331                 rtl92c_dm_write_dig(hw);
 332         }
 333
 334         if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
 335                 if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
 336                     (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
 337
 338                         if (dm_digtable.dig_ext_port_stage ==
 339                             DIG_EXT_PORT_STAGE_2) {
 340                                 dm_digtable.cur_igvalue = 0x20;
 341                                 rtl92c_dm_write_dig(hw);
 342                         }
 343
 344                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
 345                 } else if (rssi_strength > dm_digtable.rssi_highthresh) {
 346                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
 347                         rtl92c_dm_ctrl_initgain_by_fa(hw);
 348                 }
 349         } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
 350                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 351                 dm_digtable.cur_igvalue = 0x20;
 352                 rtl92c_dm_write_dig(hw);
 353         }
 354
 355         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 356                  ("curmultista_connectstate = "
 357                   "%x dig_ext_port_stage %x\n",
 358                   dm_digtable.curmultista_connectstate,
 359                   dm_digtable.dig_ext_port_stage));
 360 }
 361
 362 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
 363 {
 364         struct rtl_priv *rtlpriv = rtl_priv(hw);
 365
 366         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 367                  ("presta_connectstate = %x,"
 368                   " cursta_connectctate = %x\n",
 369                   dm_digtable.presta_connectstate,
 370                   dm_digtable.cursta_connectctate));
 371
 372         if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
 373             || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
 374             || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 375
 376                 if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
 377                         dm_digtable.rssi_val_min =
 378                             rtl92c_dm_initial_gain_min_pwdb(hw);
 379                         rtl92c_dm_ctrl_initgain_by_rssi(hw);
 380                 }
 381         } else {
 382                 dm_digtable.rssi_val_min = 0;
 383                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 384                 dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 385                 dm_digtable.cur_igvalue = 0x20;
 386                 dm_digtable.pre_igvalue = 0;
 387                 rtl92c_dm_write_dig(hw);
 388         }
 389 }
 390
 391 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
 392 {
 393         struct rtl_priv *rtlpriv = rtl_priv(hw);
 394         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 395
 396         if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 397                 dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
 398
 399                 if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 400                         if (dm_digtable.rssi_val_min <= 25)
 401                                 dm_digtable.cur_cck_pd_state =
 402                                     CCK_PD_STAGE_LowRssi;
 403                         else
 404                                 dm_digtable.cur_cck_pd_state =
 405                                     CCK_PD_STAGE_HighRssi;
 406                 } else {
 407                         if (dm_digtable.rssi_val_min <= 20)
 408                                 dm_digtable.cur_cck_pd_state =
 409                                     CCK_PD_STAGE_LowRssi;
 410                         else
 411                                 dm_digtable.cur_cck_pd_state =
 412                                     CCK_PD_STAGE_HighRssi;
 413                 }
 414         } else {
 415                 dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 416         }
 417
 418         if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
 419                 if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 420                         if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
 421                                 dm_digtable.cur_cck_fa_state =
 422                                     CCK_FA_STAGE_High;
 423                         else
 424                                 dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
 425
 426                         if (dm_digtable.pre_cck_fa_state !=
 427                             dm_digtable.cur_cck_fa_state) {
 428                                 if (dm_digtable.cur_cck_fa_state ==
 429                                     CCK_FA_STAGE_Low)
 430                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 431                                                       0x83);
 432                                 else
 433                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 434                                                       0xcd);
 435
 436                                 dm_digtable.pre_cck_fa_state =
 437                                     dm_digtable.cur_cck_fa_state;
 438                         }
 439
 440                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
 441
 442                         if (IS_92C_SERIAL(rtlhal->version))
 443                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 444                                               MASKBYTE2, 0xd7);
 445                 } else {
 446                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
 447                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
 448
 449                         if (IS_92C_SERIAL(rtlhal->version))
 450                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 451                                               MASKBYTE2, 0xd3);
 452                 }
 453                 dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
 454         }
 455
 456         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 457                  ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state));
 458
 459         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 460                  ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version)));
 461 }
 462
 463 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
 464 {
 465         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 466
 467         if (mac->act_scanning == true)
 468                 return;
 469
 470         if ((mac->link_state > MAC80211_NOLINK) &&
 471             (mac->link_state < MAC80211_LINKED))
 472                 dm_digtable.cursta_connectctate = DIG_STA_BEFORE_CONNECT;
 473         else if (mac->link_state >= MAC80211_LINKED)
 474                 dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
 475         else
 476                 dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 477
 478         rtl92c_dm_initial_gain_sta(hw);
 479         rtl92c_dm_initial_gain_multi_sta(hw);
 480         rtl92c_dm_cck_packet_detection_thresh(hw);
 481
 482         dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
 483
 484 }
 485
 486 static void rtl92c_dm_dig(struct ieee80211_hw *hw)
 487 {
 488         struct rtl_priv *rtlpriv = rtl_priv(hw);
 489
 490         if (rtlpriv->dm.b_dm_initialgain_enable == false)
 491                 return;
 492         if (dm_digtable.dig_enable_flag == false)
 493                 return;
 494
 495         rtl92c_dm_ctrl_initgain_by_twoport(hw);
 496
 497 }
 498
 499 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
 500 {
 501         struct rtl_priv *rtlpriv = rtl_priv(hw);
 502
 503         rtlpriv->dm.bdynamic_txpower_enable = false;
 504
 505         rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
 506         rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 507 }
 508
 509 static void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
 510 {
 511         struct rtl_priv *rtlpriv = rtl_priv(hw);
 512         struct rtl_phy *rtlphy = &(rtlpriv->phy);
 513         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 514         long undecorated_smoothed_pwdb;
 515
 516         if (!rtlpriv->dm.bdynamic_txpower_enable)
 517                 return;
 518
 519         if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
 520                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 521                 return;
 522         }
 523
 524         if ((mac->link_state < MAC80211_LINKED) &&
 525             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
 526                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 527                          ("Not connected to any\n"));
 528
 529                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 530
 531                 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
 532                 return;
 533         }
 534
 535         if (mac->link_state >= MAC80211_LINKED) {
 536                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
 537                         undecorated_smoothed_pwdb =
 538                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 539                         RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 540                                  ("AP Client PWDB = 0x%lx\n",
 541                                   undecorated_smoothed_pwdb));
 542                 } else {
 543                         undecorated_smoothed_pwdb =
 544                             rtlpriv->dm.undecorated_smoothed_pwdb;
 545                         RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 546                                  ("STA Default Port PWDB = 0x%lx\n",
 547                                   undecorated_smoothed_pwdb));
 548                 }
 549         } else {
 550                 undecorated_smoothed_pwdb =
 551                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 552
 553                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 554                          ("AP Ext Port PWDB = 0x%lx\n",
 555                           undecorated_smoothed_pwdb));
 556         }
 557
 558         if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
 559                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
 560                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 561                          ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"));
 562         } else if ((undecorated_smoothed_pwdb <
 563                     (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
 564                    (undecorated_smoothed_pwdb >=
 565                     TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
 566
 567                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
 568                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 569                          ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"));
 570         } else if (undecorated_smoothed_pwdb <
 571                    (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
 572                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 573                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 574                          ("TXHIGHPWRLEVEL_NORMAL\n"));
 575         }
 576
 577         if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
 578                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
 579                          ("PHY_SetTxPowerLevel8192S() Channel = %d\n",
 580                           rtlphy->current_channel));
 581                 rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
 582         }
 583
 584         rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
 585 }
 586
 587 void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
 588 {
 589         struct rtl_priv *rtlpriv = rtl_priv(hw);
 590
 591         RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
 592                  ("cur_igvalue = 0x%x, "
 593                   "pre_igvalue = 0x%x, backoff_val = %d\n",
 594                   dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
 595                   dm_digtable.backoff_val));
 596
 597         if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
 598                 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
 599                               dm_digtable.cur_igvalue);
 600                 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
 601                               dm_digtable.cur_igvalue);
 602
 603                 dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
 604         }
 605 }
 606
 607 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
 608 {
 609         struct rtl_priv *rtlpriv = rtl_priv(hw);
 610         long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
 611
 612         u8 h2c_parameter[3] = { 0 };
 613
 614         return;
 615
 616         if (tmpentry_max_pwdb != 0) {
 617                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
 618                     tmpentry_max_pwdb;
 619         } else {
 620                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
 621         }
 622
 623         if (tmpentry_min_pwdb != 0xff) {
 624                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
 625                     tmpentry_min_pwdb;
 626         } else {
 627                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
 628         }
 629
 630         h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
 631         h2c_parameter[0] = 0;
 632
 633         rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
 634 }
 635
 636 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
 637 {
 638         struct rtl_priv *rtlpriv = rtl_priv(hw);
 639         rtlpriv->dm.bcurrent_turbo_edca = false;
 640         rtlpriv->dm.bis_any_nonbepkts = false;
 641         rtlpriv->dm.bis_cur_rdlstate = false;
 642 }
 643
 644 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
 645 {
 646         struct rtl_priv *rtlpriv = rtl_priv(hw);
 647         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 648         static u64 last_txok_cnt;
 649         static u64 last_rxok_cnt;
 650         u64 cur_txok_cnt;
 651         u64 cur_rxok_cnt;
 652         u32 edca_be_ul = 0x5ea42b;
 653         u32 edca_be_dl = 0x5ea42b;
 654
 655         if (mac->opmode == NL80211_IFTYPE_ADHOC)
 656                 goto dm_checkedcaturbo_exit;
 657
 658         if (mac->link_state != MAC80211_LINKED) {
 659                 rtlpriv->dm.bcurrent_turbo_edca = false;
 660                 return;
 661         }
 662
 663         if (!mac->ht_enable) {  /*FIX MERGE */
 664                 if (!(edca_be_ul & 0xffff0000))
 665                         edca_be_ul |= 0x005e0000;
 666
 667                 if (!(edca_be_dl & 0xffff0000))
 668                         edca_be_dl |= 0x005e0000;
 669         }
 670
 671         if ((!rtlpriv->dm.bis_any_nonbepkts) &&
 672             (!rtlpriv->dm.b_disable_framebursting)) {
 673                 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
 674                 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
 675                 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
 676                         if (!rtlpriv->dm.bis_cur_rdlstate ||
 677                             !rtlpriv->dm.bcurrent_turbo_edca) {
 678                                 rtl_write_dword(rtlpriv,
 679                                                 REG_EDCA_BE_PARAM,
 680                                                 edca_be_dl);
 681                                 rtlpriv->dm.bis_cur_rdlstate = true;
 682                         }
 683                 } else {
 684                         if (rtlpriv->dm.bis_cur_rdlstate ||
 685                             !rtlpriv->dm.bcurrent_turbo_edca) {
 686                                 rtl_write_dword(rtlpriv,
 687                                                 REG_EDCA_BE_PARAM,
 688                                                 edca_be_ul);
 689                                 rtlpriv->dm.bis_cur_rdlstate = false;
 690                         }
 691                 }
 692                 rtlpriv->dm.bcurrent_turbo_edca = true;
 693         } else {
 694                 if (rtlpriv->dm.bcurrent_turbo_edca) {
 695                         u8 tmp = AC0_BE;
 696                         rtlpriv->cfg->ops->set_hw_reg(hw,
 697                                                       HW_VAR_AC_PARAM,
 698                                                       (u8 *) (&tmp));
 699                         rtlpriv->dm.bcurrent_turbo_edca = false;
 700                 }
 701         }
 702
 703 dm_checkedcaturbo_exit:
 704         rtlpriv->dm.bis_any_nonbepkts = false;
 705         last_txok_cnt = rtlpriv->stats.txbytesunicast;
 706         last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
 707 }
 708
 709 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
 710                                                              *hw)
 711 {
 712         struct rtl_priv *rtlpriv = rtl_priv(hw);
 713         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 714         struct rtl_phy *rtlphy = &(rtlpriv->phy);
 715         struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
 716         u8 thermalvalue, delta, delta_lck, delta_iqk;
 717         long ele_a, ele_d, temp_cck, val_x, value32;
 718         long val_y, ele_c;
 719         u8 ofdm_index[2], cck_index, ofdm_index_old[2], cck_index_old;
 720         int i;
 721         bool is2t = IS_92C_SERIAL(rtlhal->version);
 722         u8 txpwr_level[2] = {0, 0};
 723         u8 ofdm_min_index = 6, rf;
 724
 725         rtlpriv->dm.btxpower_trackingInit = true;
 726         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 727                  ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
 728
 729         thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
 730
 731         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 732                  ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
 733                   "eeprom_thermalmeter 0x%x\n",
 734                   thermalvalue, rtlpriv->dm.thermalvalue,
 735                   rtlefuse->eeprom_thermalmeter));
 736
 737         rtl92c_phy_ap_calibrate(hw, (thermalvalue -
 738                                      rtlefuse->eeprom_thermalmeter));
 739         if (is2t)
 740                 rf = 2;
 741         else
 742                 rf = 1;
 743
 744         if (thermalvalue) {
 745                 ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 746                                       MASKDWORD) & MASKOFDM_D;
 747
 748                 for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 749                         if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
 750                                 ofdm_index_old[0] = (u8) i;
 751
 752                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 753                                         ("Initial pathA ele_d reg0x%x = 0x%lx, "
 754                                          "ofdm_index=0x%x\n",
 755                                          ROFDM0_XATXIQIMBALANCE,
 756                                          ele_d, ofdm_index_old[0]));
 757                                 break;
 758                         }
 759                 }
 760
 761                 if (is2t) {
 762                         ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
 763                                               MASKDWORD) & MASKOFDM_D;
 764
 765                         for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 766                                 if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
 767                                         ofdm_index_old[1] = (u8) i;
 768
 769                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 770                                            DBG_LOUD,
 771                                            ("Initial pathB ele_d reg0x%x = "
 772                                            "0x%lx, ofdm_index=0x%x\n",
 773                                            ROFDM0_XBTXIQIMBALANCE, ele_d,
 774                                            ofdm_index_old[1]));
 775                                         break;
 776                                 }
 777                         }
 778                 }
 779
 780                 temp_cck =
 781                     rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
 782
 783                 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
 784                         if (rtlpriv->dm.b_cck_inch14) {
 785                                 if (memcmp((void *)&temp_cck,
 786                                            (void *)&cckswing_table_ch14[i][2],
 787                                            4) == 0) {
 788                                         cck_index_old = (u8) i;
 789
 790                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 791                                                  DBG_LOUD,
 792                                                  ("Initial reg0x%x = 0x%lx, "
 793                                                   "cck_index=0x%x, ch 14 %d\n",
 794                                                   RCCK0_TXFILTER2, temp_cck,
 795                                                   cck_index_old,
 796                                                   rtlpriv->dm.b_cck_inch14));
 797                                         break;
 798                                 }
 799                         } else {
 800                                 if (memcmp((void *)&temp_cck,
 801                                            (void *)
 802                                            &cckswing_table_ch1ch13[i][2],
 803                                            4) == 0) {
 804                                         cck_index_old = (u8) i;
 805
 806                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 807                                                  DBG_LOUD,
 808                                                  ("Initial reg0x%x = 0x%lx, "
 809                                                   "cck_index=0x%x, ch14 %d\n",
 810                                                   RCCK0_TXFILTER2, temp_cck,
 811                                                   cck_index_old,
 812                                                   rtlpriv->dm.b_cck_inch14));
 813                                         break;
 814                                 }
 815                         }
 816                 }
 817
 818                 if (!rtlpriv->dm.thermalvalue) {
 819                         rtlpriv->dm.thermalvalue =
 820                             rtlefuse->eeprom_thermalmeter;
 821                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 822                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
 823                         for (i = 0; i < rf; i++)
 824                                 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
 825                         rtlpriv->dm.cck_index = cck_index_old;
 826                 }
 827
 828                 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
 829                     (thermalvalue - rtlpriv->dm.thermalvalue) :
 830                     (rtlpriv->dm.thermalvalue - thermalvalue);
 831
 832                 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
 833                     (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
 834                     (rtlpriv->dm.thermalvalue_lck - thermalvalue);
 835
 836                 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
 837                     (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
 838                     (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
 839
 840                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 841                         ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
 842                          "eeprom_thermalmeter 0x%x delta 0x%x "
 843                          "delta_lck 0x%x delta_iqk 0x%x\n",
 844                          thermalvalue, rtlpriv->dm.thermalvalue,
 845                          rtlefuse->eeprom_thermalmeter, delta, delta_lck,
 846                          delta_iqk));
 847
 848                 if (delta_lck > 1) {
 849                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 850                         rtl92c_phy_lc_calibrate(hw);
 851                 }
 852
 853                 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
 854                         if (thermalvalue > rtlpriv->dm.thermalvalue) {
 855                                 for (i = 0; i < rf; i++)
 856                                         rtlpriv->dm.ofdm_index[i] -= delta;
 857                                 rtlpriv->dm.cck_index -= delta;
 858                         } else {
 859                                 for (i = 0; i < rf; i++)
 860                                         rtlpriv->dm.ofdm_index[i] += delta;
 861                                 rtlpriv->dm.cck_index += delta;
 862                         }
 863
 864                         if (is2t) {
 865                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 866                                          ("temp OFDM_A_index=0x%x, "
 867                                           "OFDM_B_index=0x%x,"
 868                                           "cck_index=0x%x\n",
 869                                           rtlpriv->dm.ofdm_index[0],
 870                                           rtlpriv->dm.ofdm_index[1],
 871                                           rtlpriv->dm.cck_index));
 872                         } else {
 873                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 874                                          ("temp OFDM_A_index=0x%x,"
 875                                           "cck_index=0x%x\n",
 876                                           rtlpriv->dm.ofdm_index[0],
 877                                           rtlpriv->dm.cck_index));
 878                         }
 879
 880                         if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
 881                                 for (i = 0; i < rf; i++)
 882                                         ofdm_index[i] =
 883                                             rtlpriv->dm.ofdm_index[i]
 884                                             + 1;
 885                                 cck_index = rtlpriv->dm.cck_index + 1;
 886                         } else {
 887                                 for (i = 0; i < rf; i++)
 888                                         ofdm_index[i] =
 889                                             rtlpriv->dm.ofdm_index[i];
 890                                 cck_index = rtlpriv->dm.cck_index;
 891                         }
 892
 893                         for (i = 0; i < rf; i++) {
 894                                 if (txpwr_level[i] >= 0 &&
 895                                     txpwr_level[i] <= 26) {
 896                                         if (thermalvalue >
 897                                             rtlefuse->eeprom_thermalmeter) {
 898                                                 if (delta < 5)
 899                                                         ofdm_index[i] -= 1;
 900
 901                                                 else
 902                                                         ofdm_index[i] -= 2;
 903                                         } else if (delta > 5 && thermalvalue <
 904                                                    rtlefuse->
 905                                                    eeprom_thermalmeter) {
 906                                                 ofdm_index[i] += 1;
 907                                         }
 908                                 } else if (txpwr_level[i] >= 27 &&
 909                                            txpwr_level[i] <= 32
 910                                            && thermalvalue >
 911                                            rtlefuse->eeprom_thermalmeter) {
 912                                         if (delta < 5)
 913                                                 ofdm_index[i] -= 1;
 914
 915                                         else
 916                                                 ofdm_index[i] -= 2;
 917                                 } else if (txpwr_level[i] >= 32 &&
 918                                            txpwr_level[i] <= 38 &&
 919                                            thermalvalue >
 920                                            rtlefuse->eeprom_thermalmeter
 921                                            && delta > 5) {
 922                                         ofdm_index[i] -= 1;
 923                                 }
 924                         }
 925
 926                         if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
 927                                 if (thermalvalue >
 928                                     rtlefuse->eeprom_thermalmeter) {
 929                                         if (delta < 5)
 930                                                 cck_index -= 1;
 931
 932                                         else
 933                                                 cck_index -= 2;
 934                                 } else if (delta > 5 && thermalvalue <
 935                                            rtlefuse->eeprom_thermalmeter) {
 936                                         cck_index += 1;
 937                                 }
 938                         } else if (txpwr_level[i] >= 27 &&
 939                                    txpwr_level[i] <= 32 &&
 940                                    thermalvalue >
 941                                    rtlefuse->eeprom_thermalmeter) {
 942                                 if (delta < 5)
 943                                         cck_index -= 1;
 944
 945                                 else
 946                                         cck_index -= 2;
 947                         } else if (txpwr_level[i] >= 32 &&
 948                                    txpwr_level[i] <= 38 &&
 949                                    thermalvalue > rtlefuse->eeprom_thermalmeter
 950                                    && delta > 5) {
 951                                 cck_index -= 1;
 952                         }
 953
 954                         for (i = 0; i < rf; i++) {
 955                                 if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
 956                                         ofdm_index[i] = OFDM_TABLE_SIZE - 1;
 957
 958                                 else if (ofdm_index[i] < ofdm_min_index)
 959                                         ofdm_index[i] = ofdm_min_index;
 960                         }
 961
 962                         if (cck_index > CCK_TABLE_SIZE - 1)
 963                                 cck_index = CCK_TABLE_SIZE - 1;
 964                         else if (cck_index < 0)
 965                                 cck_index = 0;
 966
 967                         if (is2t) {
 968                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 969                                          ("new OFDM_A_index=0x%x, "
 970                                           "OFDM_B_index=0x%x,"
 971                                           "cck_index=0x%x\n",
 972                                           ofdm_index[0], ofdm_index[1],
 973                                           cck_index));
 974                         } else {
 975                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 976                                          ("new OFDM_A_index=0x%x,"
 977                                           "cck_index=0x%x\n",
 978                                           ofdm_index[0], cck_index));
 979                         }
 980                 }
 981
 982                 if (rtlpriv->dm.txpower_track_control && delta != 0) {
 983                         ele_d =
 984                             (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
 985                         val_x = rtlphy->reg_e94;
 986                         val_y = rtlphy->reg_e9c;
 987
 988                         if (val_x != 0) {
 989                                 if ((val_x & 0x00000200) != 0)
 990                                         val_x = val_x | 0xFFFFFC00;
 991                                 ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
 992
 993                                 if ((val_y & 0x00000200) != 0)
 994                                         val_y = val_y | 0xFFFFFC00;
 995                                 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
 996
 997                                 value32 = (ele_d << 22) |
 998                                     ((ele_c & 0x3F) << 16) | ele_a;
 999
1000                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
1001                                               MASKDWORD, value32);
1002
1003                                 value32 = (ele_c & 0x000003C0) >> 6;
1004                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
1005                                               value32);
1006
1007                                 value32 = ((val_x * ele_d) >> 7) & 0x01;
1008                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1009                                               BIT(31), value32);
1010
1011                                 value32 = ((val_y * ele_d) >> 7) & 0x01;
1012                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1013                                               BIT(29), value32);
1014                         } else {
1015                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
1016                                               MASKDWORD,
1017                                               ofdmswing_table[ofdm_index[0]]);
1018
1019                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
1020                                               0x00);
1021                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1022                                               BIT(31) | BIT(29), 0x00);
1023                         }
1024
1025                         if (!rtlpriv->dm.b_cck_inch14) {
1026                                 rtl_write_byte(rtlpriv, 0xa22,
1027                                                cckswing_table_ch1ch13[cck_index]
1028                                                [0]);
1029                                 rtl_write_byte(rtlpriv, 0xa23,
1030                                                cckswing_table_ch1ch13[cck_index]
1031                                                [1]);
1032                                 rtl_write_byte(rtlpriv, 0xa24,
1033                                                cckswing_table_ch1ch13[cck_index]
1034                                                [2]);
1035                                 rtl_write_byte(rtlpriv, 0xa25,
1036                                                cckswing_table_ch1ch13[cck_index]
1037                                                [3]);
1038                                 rtl_write_byte(rtlpriv, 0xa26,
1039                                                cckswing_table_ch1ch13[cck_index]
1040                                                [4]);
1041                                 rtl_write_byte(rtlpriv, 0xa27,
1042                                                cckswing_table_ch1ch13[cck_index]
1043                                                [5]);
1044                                 rtl_write_byte(rtlpriv, 0xa28,
1045                                                cckswing_table_ch1ch13[cck_index]
1046                                                [6]);
1047                                 rtl_write_byte(rtlpriv, 0xa29,
1048                                                cckswing_table_ch1ch13[cck_index]
1049                                                [7]);
1050                         } else {
1051                                 rtl_write_byte(rtlpriv, 0xa22,
1052                                                cckswing_table_ch14[cck_index]
1053                                                [0]);
1054                                 rtl_write_byte(rtlpriv, 0xa23,
1055                                                cckswing_table_ch14[cck_index]
1056                                                [1]);
1057                                 rtl_write_byte(rtlpriv, 0xa24,
1058                                                cckswing_table_ch14[cck_index]
1059                                                [2]);
1060                                 rtl_write_byte(rtlpriv, 0xa25,
1061                                                cckswing_table_ch14[cck_index]
1062                                                [3]);
1063                                 rtl_write_byte(rtlpriv, 0xa26,
1064                                                cckswing_table_ch14[cck_index]
1065                                                [4]);
1066                                 rtl_write_byte(rtlpriv, 0xa27,
1067                                                cckswing_table_ch14[cck_index]
1068                                                [5]);
1069                                 rtl_write_byte(rtlpriv, 0xa28,
1070                                                cckswing_table_ch14[cck_index]
1071                                                [6]);
1072                                 rtl_write_byte(rtlpriv, 0xa29,
1073                                                cckswing_table_ch14[cck_index]
1074                                                [7]);
1075                         }
1076
1077                         if (is2t) {
1078                                 ele_d = (ofdmswing_table[ofdm_index[1]] &
1079                                          0xFFC00000) >> 22;
1080
1081                                 val_x = rtlphy->reg_eb4;
1082                                 val_y = rtlphy->reg_ebc;
1083
1084                                 if (val_x != 0) {
1085                                         if ((val_x & 0x00000200) != 0)
1086                                                 val_x = val_x | 0xFFFFFC00;
1087                                         ele_a = ((val_x * ele_d) >> 8) &
1088                                             0x000003FF;
1089
1090                                         if ((val_y & 0x00000200) != 0)
1091                                                 val_y = val_y | 0xFFFFFC00;
1092                                         ele_c = ((val_y * ele_d) >> 8) &
1093                                             0x00003FF;
1094
1095                                         value32 = (ele_d << 22) |
1096                                             ((ele_c & 0x3F) << 16) | ele_a;
1097                                         rtl_set_bbreg(hw,
1098                                                       ROFDM0_XBTXIQIMBALANCE,
1099                                                       MASKDWORD, value32);
1100
1101                                         value32 = (ele_c & 0x000003C0) >> 6;
1102                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1103                                                       MASKH4BITS, value32);
1104
1105                                         value32 = ((val_x * ele_d) >> 7) & 0x01;
1106                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1107                                                       BIT(27), value32);
1108
1109                                         value32 = ((val_y * ele_d) >> 7) & 0x01;
1110                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1111                                                       BIT(25), value32);
1112                                 } else {
1113                                         rtl_set_bbreg(hw,
1114                                                       ROFDM0_XBTXIQIMBALANCE,
1115                                                       MASKDWORD,
1116                                                       ofdmswing_table[ofdm_index
1117                                                                       [1]]);
1118                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1119                                                       MASKH4BITS, 0x00);
1120                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1121                                                       BIT(27) | BIT(25), 0x00);
1122                                 }
1123
1124                         }
1125                 }
1126
1127                 if (delta_iqk > 3) {
1128                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1129                         rtl92c_phy_iq_calibrate(hw, false);
1130                 }
1131
1132                 if (rtlpriv->dm.txpower_track_control)
1133                         rtlpriv->dm.thermalvalue = thermalvalue;
1134         }
1135
1136         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
1137
1138 }
1139
1140 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1141                                                 struct ieee80211_hw *hw)
1142 {
1143         struct rtl_priv *rtlpriv = rtl_priv(hw);
1144
1145         rtlpriv->dm.btxpower_tracking = true;
1146         rtlpriv->dm.btxpower_trackingInit = false;
1147
1148         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1149                  ("pMgntInfo->btxpower_tracking = %d\n",
1150                   rtlpriv->dm.btxpower_tracking));
1151 }
1152
1153 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1154 {
1155         rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
1156 }
1157
1158 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
1159 {
1160         rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
1161 }
1162
1163 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1164                                                 struct ieee80211_hw *hw)
1165 {
1166         struct rtl_priv *rtlpriv = rtl_priv(hw);
1167         static u8 tm_trigger;
1168
1169         if (!rtlpriv->dm.btxpower_tracking)
1170                 return;
1171
1172         if (!tm_trigger) {
1173                 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
1174                               0x60);
1175                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1176                          ("Trigger 92S Thermal Meter!!\n"));
1177                 tm_trigger = 1;
1178                 return;
1179         } else {
1180                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1181                          ("Schedule TxPowerTracking direct call!!\n"));
1182                 rtl92c_dm_txpower_tracking_directcall(hw);
1183                 tm_trigger = 0;
1184         }
1185 }
1186
1187 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
1188 {
1189         rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
1190 }
1191
1192 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1193 {
1194         struct rtl_priv *rtlpriv = rtl_priv(hw);
1195         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1196
1197         p_ra->ratr_state = DM_RATR_STA_INIT;
1198         p_ra->pre_ratr_state = DM_RATR_STA_INIT;
1199
1200         if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1201                 rtlpriv->dm.b_useramask = true;
1202         else
1203                 rtlpriv->dm.b_useramask = false;
1204
1205 }
1206
1207 static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
1208 {
1209         struct rtl_priv *rtlpriv = rtl_priv(hw);
1210         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1211         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1212         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1213         u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
1214
1215         if (is_hal_stop(rtlhal)) {
1216                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1217                          ("<---- driver is going to unload\n"));
1218                 return;
1219         }
1220
1221         if (!rtlpriv->dm.b_useramask) {
1222                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1223                         ("<---- driver does not control rate adaptive mask\n"));
1224                 return;
1225         }
1226
1227         if (mac->link_state == MAC80211_LINKED) {
1228
1229                 switch (p_ra->pre_ratr_state) {
1230                 case DM_RATR_STA_HIGH:
1231                         high_rssithresh_for_ra = 50;
1232                         low_rssithresh_for_ra = 20;
1233                         break;
1234                 case DM_RATR_STA_MIDDLE:
1235                         high_rssithresh_for_ra = 55;
1236                         low_rssithresh_for_ra = 20;
1237                         break;
1238                 case DM_RATR_STA_LOW:
1239                         high_rssithresh_for_ra = 50;
1240                         low_rssithresh_for_ra = 25;
1241                         break;
1242                 default:
1243                         high_rssithresh_for_ra = 50;
1244                         low_rssithresh_for_ra = 20;
1245                         break;
1246                 }
1247
1248                 if (rtlpriv->dm.undecorated_smoothed_pwdb >
1249                     (long)high_rssithresh_for_ra)
1250                         p_ra->ratr_state = DM_RATR_STA_HIGH;
1251                 else if (rtlpriv->dm.undecorated_smoothed_pwdb >
1252                          (long)low_rssithresh_for_ra)
1253                         p_ra->ratr_state = DM_RATR_STA_MIDDLE;
1254                 else
1255                         p_ra->ratr_state = DM_RATR_STA_LOW;
1256
1257                 if (p_ra->pre_ratr_state != p_ra->ratr_state) {
1258                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1259                                  ("RSSI = %ld\n",
1260                                   rtlpriv->dm.undecorated_smoothed_pwdb));
1261                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1262                                  ("RSSI_LEVEL = %d\n", p_ra->ratr_state));
1263                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1264                                  ("PreState = %d, CurState = %d\n",
1265                                   p_ra->pre_ratr_state, p_ra->ratr_state));
1266
1267                         rtlpriv->cfg->ops->update_rate_mask(hw,
1268                                         p_ra->ratr_state);
1269
1270                         p_ra->pre_ratr_state = p_ra->ratr_state;
1271                 }
1272         }
1273 }
1274
1275 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1276 {
1277         dm_pstable.pre_ccastate = CCA_MAX;
1278         dm_pstable.cur_ccasate = CCA_MAX;
1279         dm_pstable.pre_rfstate = RF_MAX;
1280         dm_pstable.cur_rfstate = RF_MAX;
1281         dm_pstable.rssi_val_min = 0;
1282 }
1283
1284 static void rtl92c_dm_1r_cca(struct ieee80211_hw *hw)
1285 {
1286         struct rtl_priv *rtlpriv = rtl_priv(hw);
1287         struct rtl_phy *rtlphy = &(rtlpriv->phy);
1288
1289         if (dm_pstable.rssi_val_min != 0) {
1290                 if (dm_pstable.pre_ccastate == CCA_2R) {
1291                         if (dm_pstable.rssi_val_min >= 35)
1292                                 dm_pstable.cur_ccasate = CCA_1R;
1293                         else
1294                                 dm_pstable.cur_ccasate = CCA_2R;
1295                 } else {
1296                         if (dm_pstable.rssi_val_min <= 30)
1297                                 dm_pstable.cur_ccasate = CCA_2R;
1298                         else
1299                                 dm_pstable.cur_ccasate = CCA_1R;
1300                 }
1301         } else {
1302                 dm_pstable.cur_ccasate = CCA_MAX;
1303         }
1304
1305         if (dm_pstable.pre_ccastate != dm_pstable.cur_ccasate) {
1306                 if (dm_pstable.cur_ccasate == CCA_1R) {
1307                         if (get_rf_type(rtlphy) == RF_2T2R) {
1308                                 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
1309                                               MASKBYTE0, 0x13);
1310                                 rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x20);
1311                         } else {
1312                                 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
1313                                               MASKBYTE0, 0x23);
1314                                 rtl_set_bbreg(hw, 0xe70, 0x7fc00000, 0x10c);
1315                         }
1316                 } else {
1317                         rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0,
1318                                       0x33);
1319                         rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x63);
1320                 }
1321                 dm_pstable.pre_ccastate = dm_pstable.cur_ccasate;
1322         }
1323
1324         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, ("CCAStage = %s\n",
1325                                                (dm_pstable.cur_ccasate ==
1326                                                 0) ? "1RCCA" : "2RCCA"));
1327 }
1328
1329 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
1330 {
1331         static u8 initialize;
1332         static u32 reg_874, reg_c70, reg_85c, reg_a74;
1333
1334         if (initialize == 0) {
1335                 reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1336                                          MASKDWORD) & 0x1CC000) >> 14;
1337
1338                 reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
1339                                          MASKDWORD) & BIT(3)) >> 3;
1340
1341                 reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1342                                          MASKDWORD) & 0xFF000000) >> 24;
1343
1344                 reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
1345
1346                 initialize = 1;
1347         }
1348
1349         if (!bforce_in_normal) {
1350                 if (dm_pstable.rssi_val_min != 0) {
1351                         if (dm_pstable.pre_rfstate == RF_NORMAL) {
1352                                 if (dm_pstable.rssi_val_min >= 30)
1353                                         dm_pstable.cur_rfstate = RF_SAVE;
1354                                 else
1355                                         dm_pstable.cur_rfstate = RF_NORMAL;
1356                         } else {
1357                                 if (dm_pstable.rssi_val_min <= 25)
1358                                         dm_pstable.cur_rfstate = RF_NORMAL;
1359                                 else
1360                                         dm_pstable.cur_rfstate = RF_SAVE;
1361                         }
1362                 } else {
1363                         dm_pstable.cur_rfstate = RF_MAX;
1364                 }
1365         } else {
1366                 dm_pstable.cur_rfstate = RF_NORMAL;
1367         }
1368
1369         if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
1370                 if (dm_pstable.cur_rfstate == RF_SAVE) {
1371                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1372                                       0x1C0000, 0x2);
1373                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
1374                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1375                                       0xFF000000, 0x63);
1376                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1377                                       0xC000, 0x2);
1378                         rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
1379                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1380                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
1381                 } else {
1382                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1383                                       0x1CC000, reg_874);
1384                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
1385                                       reg_c70);
1386                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
1387                                       reg_85c);
1388                         rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
1389                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1390                 }
1391
1392                 dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
1393         }
1394 }
1395
1396 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1397 {
1398         struct rtl_priv *rtlpriv = rtl_priv(hw);
1399         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1400         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1401
1402         if (((mac->link_state == MAC80211_NOLINK)) &&
1403             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
1404                 dm_pstable.rssi_val_min = 0;
1405                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1406                          ("Not connected to any\n"));
1407         }
1408
1409         if (mac->link_state == MAC80211_LINKED) {
1410                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1411                         dm_pstable.rssi_val_min =
1412                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1413                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1414                                  ("AP Client PWDB = 0x%lx\n",
1415                                   dm_pstable.rssi_val_min));
1416                 } else {
1417                         dm_pstable.rssi_val_min =
1418                             rtlpriv->dm.undecorated_smoothed_pwdb;
1419                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1420                                  ("STA Default Port PWDB = 0x%lx\n",
1421                                   dm_pstable.rssi_val_min));
1422                 }
1423         } else {
1424                 dm_pstable.rssi_val_min =
1425                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1426
1427                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1428                          ("AP Ext Port PWDB = 0x%lx\n",
1429                           dm_pstable.rssi_val_min));
1430         }
1431
1432         if (IS_92C_SERIAL(rtlhal->version))
1433                 rtl92c_dm_1r_cca(hw);
1434 }
1435
1436 void rtl92c_dm_init(struct ieee80211_hw *hw)
1437 {
1438         struct rtl_priv *rtlpriv = rtl_priv(hw);
1439
1440         rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1441         rtl92c_dm_diginit(hw);
1442         rtl92c_dm_init_dynamic_txpower(hw);
1443         rtl92c_dm_init_edca_turbo(hw);
1444         rtl92c_dm_init_rate_adaptive_mask(hw);
1445         rtl92c_dm_initialize_txpower_tracking(hw);
1446         rtl92c_dm_init_dynamic_bb_powersaving(hw);
1447 }
1448
1449 void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
1450 {
1451         struct rtl_priv *rtlpriv = rtl_priv(hw);
1452         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1453         bool b_fw_current_inpsmode = false;
1454         bool b_fw_ps_awake = true;
1455
1456         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
1457                                       (u8 *) (&b_fw_current_inpsmode));
1458         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
1459                                       (u8 *) (&b_fw_ps_awake));
1460
1461         if ((ppsc->rfpwr_state == ERFON) && ((!b_fw_current_inpsmode) &&
1462                                              b_fw_ps_awake)
1463             && (!ppsc->rfchange_inprogress)) {
1464                 rtl92c_dm_pwdb_monitor(hw);
1465                 rtl92c_dm_dig(hw);
1466                 rtl92c_dm_false_alarm_counter_statistics(hw);
1467                 rtl92c_dm_dynamic_bb_powersaving(hw);
1468                 rtl92c_dm_dynamic_txpower(hw);
1469                 rtl92c_dm_check_txpower_tracking(hw);
1470                 rtl92c_dm_refresh_rate_adaptive_mask(hw);
1471                 rtl92c_dm_check_edca_turbo(hw);
1472         }
1473 }