drivers/net/wireless/rtl818x/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/usb.h>
  25 #include <linux/slab.h>
  26 #include <linux/delay.h>
  27 #include <linux/etherdevice.h>
  28 #include <linux/eeprom_93cx6.h>
  29 #include <net/mac80211.h>
  30
  31 #include "rtl8187.h"
  32 #include "rtl8187_rtl8225.h"
  33 #ifdef CONFIG_RTL8187_LEDS
  34 #include "rtl8187_leds.h"
  35 #endif
  36 #include "rtl8187_rfkill.h"
  37
  38 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  39 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  40 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  41 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  42 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  43 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  44 MODULE_LICENSE("GPL");
  45
  46 static struct usb_device_id rtl8187_table[] __devinitdata = {
  47         /* Asus */
  48         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  49         /* Belkin */
  50         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  51         /* Realtek */
  52         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  53         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  54         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  55         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  56         /* Surecom */
  57         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  58         /* Logitech */
  59         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  60         /* Netgear */
  61         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  62         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  63         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  64         /* HP */
  65         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  66         /* Sitecom */
  67         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  68         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  69         {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  70         /* Sphairon Access Systems GmbH */
  71         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  72         /* Dick Smith Electronics */
  73         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  74         /* Abocom */
  75         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  76         /* Qcom */
  77         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  78         /* AirLive */
  79         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  80         /* Linksys */
  81         {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  82         {}
  83 };
  84
  85 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  86
  87 static const struct ieee80211_rate rtl818x_rates[] = {
  88         { .bitrate = 10, .hw_value = 0, },
  89         { .bitrate = 20, .hw_value = 1, },
  90         { .bitrate = 55, .hw_value = 2, },
  91         { .bitrate = 110, .hw_value = 3, },
  92         { .bitrate = 60, .hw_value = 4, },
  93         { .bitrate = 90, .hw_value = 5, },
  94         { .bitrate = 120, .hw_value = 6, },
  95         { .bitrate = 180, .hw_value = 7, },
  96         { .bitrate = 240, .hw_value = 8, },
  97         { .bitrate = 360, .hw_value = 9, },
  98         { .bitrate = 480, .hw_value = 10, },
  99         { .bitrate = 540, .hw_value = 11, },
 100 };
 101
 102 static const struct ieee80211_channel rtl818x_channels[] = {
 103         { .center_freq = 2412 },
 104         { .center_freq = 2417 },
 105         { .center_freq = 2422 },
 106         { .center_freq = 2427 },
 107         { .center_freq = 2432 },
 108         { .center_freq = 2437 },
 109         { .center_freq = 2442 },
 110         { .center_freq = 2447 },
 111         { .center_freq = 2452 },
 112         { .center_freq = 2457 },
 113         { .center_freq = 2462 },
 114         { .center_freq = 2467 },
 115         { .center_freq = 2472 },
 116         { .center_freq = 2484 },
 117 };
 118
 119 static void rtl8187_iowrite_async_cb(struct urb *urb)
 120 {
 121         kfree(urb->context);
 122 }
 123
 124 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 125                                   void *data, u16 len)
 126 {
 127         struct usb_ctrlrequest *dr;
 128         struct urb *urb;
 129         struct rtl8187_async_write_data {
 130                 u8 data[4];
 131                 struct usb_ctrlrequest dr;
 132         } *buf;
 133         int rc;
 134
 135         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 136         if (!buf)
 137                 return;
 138
 139         urb = usb_alloc_urb(0, GFP_ATOMIC);
 140         if (!urb) {
 141                 kfree(buf);
 142                 return;
 143         }
 144
 145         dr = &buf->dr;
 146
 147         dr->bRequestType = RTL8187_REQT_WRITE;
 148         dr->bRequest = RTL8187_REQ_SET_REG;
 149         dr->wValue = addr;
 150         dr->wIndex = 0;
 151         dr->wLength = cpu_to_le16(len);
 152
 153         memcpy(buf, data, len);
 154
 155         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 156                              (unsigned char *)dr, buf, len,
 157                              rtl8187_iowrite_async_cb, buf);
 158         usb_anchor_urb(urb, &priv->anchored);
 159         rc = usb_submit_urb(urb, GFP_ATOMIC);
 160         if (rc < 0) {
 161                 kfree(buf);
 162                 usb_unanchor_urb(urb);
 163         }
 164         usb_free_urb(urb);
 165 }
 166
 167 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 168                                            __le32 *addr, u32 val)
 169 {
 170         __le32 buf = cpu_to_le32(val);
 171
 172         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 173                               &buf, sizeof(buf));
 174 }
 175
 176 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 177 {
 178         struct rtl8187_priv *priv = dev->priv;
 179
 180         data <<= 8;
 181         data |= addr | 0x80;
 182
 183         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 184         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 185         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 186         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 187 }
 188
 189 static void rtl8187_tx_cb(struct urb *urb)
 190 {
 191         struct sk_buff *skb = (struct sk_buff *)urb->context;
 192         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 193         struct ieee80211_hw *hw = info->rate_driver_data[0];
 194         struct rtl8187_priv *priv = hw->priv;
 195
 196         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 197                                           sizeof(struct rtl8187_tx_hdr));
 198         ieee80211_tx_info_clear_status(info);
 199
 200         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 201                 if (priv->is_rtl8187b) {
 202                         skb_queue_tail(&priv->b_tx_status.queue, skb);
 203
 204                         /* queue is "full", discard last items */
 205                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 206                                 struct sk_buff *old_skb;
 207
 208                                 dev_dbg(&priv->udev->dev,
 209                                         "transmit status queue full\n");
 210
 211                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 212                                 ieee80211_tx_status_irqsafe(hw, old_skb);
 213                         }
 214                         return;
 215                 } else {
 216                         info->flags |= IEEE80211_TX_STAT_ACK;
 217                 }
 218         }
 219         if (priv->is_rtl8187b)
 220                 ieee80211_tx_status_irqsafe(hw, skb);
 221         else {
 222                 /* Retry information for the RTI8187 is only available by
 223                  * reading a register in the device. We are in interrupt mode
 224                  * here, thus queue the skb and finish on a work queue. */
 225                 skb_queue_tail(&priv->b_tx_status.queue, skb);
 226                 ieee80211_queue_delayed_work(hw, &priv->work, 0);
 227         }
 228 }
 229
 230 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 231 {
 232         struct rtl8187_priv *priv = dev->priv;
 233         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 234         unsigned int ep;
 235         void *buf;
 236         struct urb *urb;
 237         __le16 rts_dur = 0;
 238         u32 flags;
 239         int rc;
 240
 241         urb = usb_alloc_urb(0, GFP_ATOMIC);
 242         if (!urb) {
 243                 kfree_skb(skb);
 244                 return NETDEV_TX_OK;
 245         }
 246
 247         flags = skb->len;
 248         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 249
 250         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 251         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 252                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 253         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 254                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 255                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 256                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 257                                                  skb->len, info);
 258         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 259                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 260                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 261         }
 262
 263         if (!priv->is_rtl8187b) {
 264                 struct rtl8187_tx_hdr *hdr =
 265                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 266                 hdr->flags = cpu_to_le32(flags);
 267                 hdr->len = 0;
 268                 hdr->rts_duration = rts_dur;
 269                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 270                 buf = hdr;
 271
 272                 ep = 2;
 273         } else {
 274                 /* fc needs to be calculated before skb_push() */
 275                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 276                 struct ieee80211_hdr *tx_hdr =
 277                         (struct ieee80211_hdr *)(skb->data);
 278                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 279
 280                 struct rtl8187b_tx_hdr *hdr =
 281                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 282                 struct ieee80211_rate *txrate =
 283                         ieee80211_get_tx_rate(dev, info);
 284                 memset(hdr, 0, sizeof(*hdr));
 285                 hdr->flags = cpu_to_le32(flags);
 286                 hdr->rts_duration = rts_dur;
 287                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 288                 hdr->tx_duration =
 289                         ieee80211_generic_frame_duration(dev, priv->vif,
 290                                                          skb->len, txrate);
 291                 buf = hdr;
 292
 293                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 294                         ep = 12;
 295                 else
 296                         ep = epmap[skb_get_queue_mapping(skb)];
 297         }
 298
 299         info->rate_driver_data[0] = dev;
 300         info->rate_driver_data[1] = urb;
 301
 302         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 303                           buf, skb->len, rtl8187_tx_cb, skb);
 304         urb->transfer_flags |= URB_ZERO_PACKET;
 305         usb_anchor_urb(urb, &priv->anchored);
 306         rc = usb_submit_urb(urb, GFP_ATOMIC);
 307         if (rc < 0) {
 308                 usb_unanchor_urb(urb);
 309                 kfree_skb(skb);
 310         }
 311         usb_free_urb(urb);
 312
 313         return NETDEV_TX_OK;
 314 }
 315
 316 static void rtl8187_rx_cb(struct urb *urb)
 317 {
 318         struct sk_buff *skb = (struct sk_buff *)urb->context;
 319         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 320         struct ieee80211_hw *dev = info->dev;
 321         struct rtl8187_priv *priv = dev->priv;
 322         struct ieee80211_rx_status rx_status = { 0 };
 323         int rate, signal;
 324         u32 flags;
 325         unsigned long f;
 326
 327         spin_lock_irqsave(&priv->rx_queue.lock, f);
 328         __skb_unlink(skb, &priv->rx_queue);
 329         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 330         skb_put(skb, urb->actual_length);
 331
 332         if (unlikely(urb->status)) {
 333                 dev_kfree_skb_irq(skb);
 334                 return;
 335         }
 336
 337         if (!priv->is_rtl8187b) {
 338                 struct rtl8187_rx_hdr *hdr =
 339                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 340                 flags = le32_to_cpu(hdr->flags);
 341                 /* As with the RTL8187B below, the AGC is used to calculate
 342                  * signal strength. In this case, the scaling
 343                  * constants are derived from the output of p54usb.
 344                  */
 345                 signal = -4 - ((27 * hdr->agc) >> 6);
 346                 rx_status.antenna = (hdr->signal >> 7) & 1;
 347                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 348         } else {
 349                 struct rtl8187b_rx_hdr *hdr =
 350                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 351                 /* The Realtek datasheet for the RTL8187B shows that the RX
 352                  * header contains the following quantities: signal quality,
 353                  * RSSI, AGC, the received power in dB, and the measured SNR.
 354                  * In testing, none of these quantities show qualitative
 355                  * agreement with AP signal strength, except for the AGC,
 356                  * which is inversely proportional to the strength of the
 357                  * signal. In the following, the signal strength
 358                  * is derived from the AGC. The arbitrary scaling constants
 359                  * are chosen to make the results close to the values obtained
 360                  * for a BCM4312 using b43 as the driver. The noise is ignored
 361                  * for now.
 362                  */
 363                 flags = le32_to_cpu(hdr->flags);
 364                 signal = 14 - hdr->agc / 2;
 365                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 366                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 367         }
 368
 369         rx_status.signal = signal;
 370         priv->signal = signal;
 371         rate = (flags >> 20) & 0xF;
 372         skb_trim(skb, flags & 0x0FFF);
 373         rx_status.rate_idx = rate;
 374         rx_status.freq = dev->conf.channel->center_freq;
 375         rx_status.band = dev->conf.channel->band;
 376         rx_status.flag |= RX_FLAG_TSFT;
 377         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 378                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 379         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 380         ieee80211_rx_irqsafe(dev, skb);
 381
 382         skb = dev_alloc_skb(RTL8187_MAX_RX);
 383         if (unlikely(!skb)) {
 384                 /* TODO check rx queue length and refill *somewhere* */
 385                 return;
 386         }
 387
 388         info = (struct rtl8187_rx_info *)skb->cb;
 389         info->urb = urb;
 390         info->dev = dev;
 391         urb->transfer_buffer = skb_tail_pointer(skb);
 392         urb->context = skb;
 393         skb_queue_tail(&priv->rx_queue, skb);
 394
 395         usb_anchor_urb(urb, &priv->anchored);
 396         if (usb_submit_urb(urb, GFP_ATOMIC)) {
 397                 usb_unanchor_urb(urb);
 398                 skb_unlink(skb, &priv->rx_queue);
 399                 dev_kfree_skb_irq(skb);
 400         }
 401 }
 402
 403 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 404 {
 405         struct rtl8187_priv *priv = dev->priv;
 406         struct urb *entry = NULL;
 407         struct sk_buff *skb;
 408         struct rtl8187_rx_info *info;
 409         int ret = 0;
 410
 411         while (skb_queue_len(&priv->rx_queue) < 16) {
 412                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 413                 if (!skb) {
 414                         ret = -ENOMEM;
 415                         goto err;
 416                 }
 417                 entry = usb_alloc_urb(0, GFP_KERNEL);
 418                 if (!entry) {
 419                         ret = -ENOMEM;
 420                         goto err;
 421                 }
 422                 usb_fill_bulk_urb(entry, priv->udev,
 423                                   usb_rcvbulkpipe(priv->udev,
 424                                   priv->is_rtl8187b ? 3 : 1),
 425                                   skb_tail_pointer(skb),
 426                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 427                 info = (struct rtl8187_rx_info *)skb->cb;
 428                 info->urb = entry;
 429                 info->dev = dev;
 430                 skb_queue_tail(&priv->rx_queue, skb);
 431                 usb_anchor_urb(entry, &priv->anchored);
 432                 ret = usb_submit_urb(entry, GFP_KERNEL);
 433                 if (ret) {
 434                         skb_unlink(skb, &priv->rx_queue);
 435                         usb_unanchor_urb(entry);
 436                         goto err;
 437                 }
 438                 usb_free_urb(entry);
 439         }
 440         return ret;
 441
 442 err:
 443         usb_free_urb(entry);
 444         kfree_skb(skb);
 445         usb_kill_anchored_urbs(&priv->anchored);
 446         return ret;
 447 }
 448
 449 static void rtl8187b_status_cb(struct urb *urb)
 450 {
 451         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 452         struct rtl8187_priv *priv = hw->priv;
 453         u64 val;
 454         unsigned int cmd_type;
 455
 456         if (unlikely(urb->status))
 457                 return;
 458
 459         /*
 460          * Read from status buffer:
 461          *
 462          * bits [30:31] = cmd type:
 463          * - 0 indicates tx beacon interrupt
 464          * - 1 indicates tx close descriptor
 465          *
 466          * In the case of tx beacon interrupt:
 467          * [0:9] = Last Beacon CW
 468          * [10:29] = reserved
 469          * [30:31] = 00b
 470          * [32:63] = Last Beacon TSF
 471          *
 472          * If it's tx close descriptor:
 473          * [0:7] = Packet Retry Count
 474          * [8:14] = RTS Retry Count
 475          * [15] = TOK
 476          * [16:27] = Sequence No
 477          * [28] = LS
 478          * [29] = FS
 479          * [30:31] = 01b
 480          * [32:47] = unused (reserved?)
 481          * [48:63] = MAC Used Time
 482          */
 483         val = le64_to_cpu(priv->b_tx_status.buf);
 484
 485         cmd_type = (val >> 30) & 0x3;
 486         if (cmd_type == 1) {
 487                 unsigned int pkt_rc, seq_no;
 488                 bool tok;
 489                 struct sk_buff *skb;
 490                 struct ieee80211_hdr *ieee80211hdr;
 491                 unsigned long flags;
 492
 493                 pkt_rc = val & 0xFF;
 494                 tok = val & (1 << 15);
 495                 seq_no = (val >> 16) & 0xFFF;
 496
 497                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 498                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 499                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 500
 501                         /*
 502                          * While testing, it was discovered that the seq_no
 503                          * doesn't actually contains the sequence number.
 504                          * Instead of returning just the 12 bits of sequence
 505                          * number, hardware is returning entire sequence control
 506                          * (fragment number plus sequence number) in a 12 bit
 507                          * only field overflowing after some time. As a
 508                          * workaround, just consider the lower bits, and expect
 509                          * it's unlikely we wrongly ack some sent data
 510                          */
 511                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 512                             & 0xFFF) == seq_no)
 513                                 break;
 514                 }
 515                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 516                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 517
 518                         __skb_unlink(skb, &priv->b_tx_status.queue);
 519                         if (tok)
 520                                 info->flags |= IEEE80211_TX_STAT_ACK;
 521                         info->status.rates[0].count = pkt_rc + 1;
 522
 523                         ieee80211_tx_status_irqsafe(hw, skb);
 524                 }
 525                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 526         }
 527
 528         usb_anchor_urb(urb, &priv->anchored);
 529         if (usb_submit_urb(urb, GFP_ATOMIC))
 530                 usb_unanchor_urb(urb);
 531 }
 532
 533 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 534 {
 535         struct rtl8187_priv *priv = dev->priv;
 536         struct urb *entry;
 537         int ret = 0;
 538
 539         entry = usb_alloc_urb(0, GFP_KERNEL);
 540         if (!entry)
 541                 return -ENOMEM;
 542
 543         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 544                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 545                           rtl8187b_status_cb, dev);
 546
 547         usb_anchor_urb(entry, &priv->anchored);
 548         ret = usb_submit_urb(entry, GFP_KERNEL);
 549         if (ret)
 550                 usb_unanchor_urb(entry);
 551         usb_free_urb(entry);
 552
 553         return ret;
 554 }
 555
 556 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 557 {
 558         struct rtl8187_priv *priv = dev->priv;
 559         u8 reg;
 560         int i;
 561
 562         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 563         reg &= (1 << 1);
 564         reg |= RTL818X_CMD_RESET;
 565         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 566
 567         i = 10;
 568         do {
 569                 msleep(2);
 570                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 571                       RTL818X_CMD_RESET))
 572                         break;
 573         } while (--i);
 574
 575         if (!i) {
 576                 wiphy_err(dev->wiphy, "Reset timeout!\n");
 577                 return -ETIMEDOUT;
 578         }
 579
 580         /* reload registers from eeprom */
 581         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 582
 583         i = 10;
 584         do {
 585                 msleep(4);
 586                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 587                       RTL818X_EEPROM_CMD_CONFIG))
 588                         break;
 589         } while (--i);
 590
 591         if (!i) {
 592                 wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
 593                 return -ETIMEDOUT;
 594         }
 595
 596         return 0;
 597 }
 598
 599 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 600 {
 601         struct rtl8187_priv *priv = dev->priv;
 602         u8 reg;
 603         int res;
 604
 605         /* reset */
 606         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 607                          RTL818X_EEPROM_CMD_CONFIG);
 608         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 609         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 610                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 611         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 612                           RTL8187_RTL8225_ANAPARAM_ON);
 613         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 614                           RTL8187_RTL8225_ANAPARAM2_ON);
 615         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 616                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 617         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 618                          RTL818X_EEPROM_CMD_NORMAL);
 619
 620         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 621
 622         msleep(200);
 623         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 624         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 625         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 626         msleep(200);
 627
 628         res = rtl8187_cmd_reset(dev);
 629         if (res)
 630                 return res;
 631
 632         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 633         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 634         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 635                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 636         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 637                           RTL8187_RTL8225_ANAPARAM_ON);
 638         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 639                           RTL8187_RTL8225_ANAPARAM2_ON);
 640         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 641                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 642         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 643
 644         /* setup card */
 645         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 646         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 647
 648         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 649         rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
 650         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 651
 652         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 653
 654         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 655         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 656         reg &= 0x3F;
 657         reg |= 0x80;
 658         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 659
 660         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 661
 662         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 663         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 664         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 665
 666         // TODO: set RESP_RATE and BRSR properly
 667         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 668         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 669
 670         /* host_usb_init */
 671         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 672         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 673         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 674         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 675         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 676         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
 677         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 678         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 679         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 680         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 681         msleep(100);
 682
 683         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 684         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 685         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 686         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 687                          RTL818X_EEPROM_CMD_CONFIG);
 688         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 689         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 690                          RTL818X_EEPROM_CMD_NORMAL);
 691         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 692         msleep(100);
 693
 694         priv->rf->init(dev);
 695
 696         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 697         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 698         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 699         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 700         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 701         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 702         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 703
 704         return 0;
 705 }
 706
 707 static const u8 rtl8187b_reg_table[][3] = {
 708         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 709         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 710         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 711         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 712
 713         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 714         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 715         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
 716         {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
 717         {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 718
 719         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 720         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 721         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 722         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 723         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 724         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 725         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
 726
 727         {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
 728         {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
 729         {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
 730         {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
 731         {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 732
 733         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 734         {0x8F, 0x00, 0}
 735 };
 736
 737 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 738 {
 739         struct rtl8187_priv *priv = dev->priv;
 740         int res, i;
 741         u8 reg;
 742
 743         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 744                          RTL818X_EEPROM_CMD_CONFIG);
 745         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 746         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 747         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 748         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 749                           RTL8187B_RTL8225_ANAPARAM2_ON);
 750         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 751                           RTL8187B_RTL8225_ANAPARAM_ON);
 752         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 753                          RTL8187B_RTL8225_ANAPARAM3_ON);
 754         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 755         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 756         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 757         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 758                          RTL818X_EEPROM_CMD_NORMAL);
 759
 760         /* Reset PLL sequence on 8187B. Realtek note: reduces power
 761          * consumption about 30 mA */
 762         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 763         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 764         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 765         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 766
 767         res = rtl8187_cmd_reset(dev);
 768         if (res)
 769                 return res;
 770
 771         /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
 772          * RESP_RATE on 8187L in Realtek sources: each bit should be each
 773          * one of the 12 rates, all are enabled */
 774         rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
 775
 776         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 777         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 778         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 779
 780         /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
 781         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 782         rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
 783
 784         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 785
 786         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 787                          RTL818X_EEPROM_CMD_CONFIG);
 788         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 789         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 790         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 791                          RTL818X_EEPROM_CMD_NORMAL);
 792
 793         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 794         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 795                 rtl818x_iowrite8_idx(priv,
 796                                      (u8 *)(uintptr_t)
 797                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 798                                      rtl8187b_reg_table[i][1],
 799                                      rtl8187b_reg_table[i][2]);
 800         }
 801
 802         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 803         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 804
 805         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 806         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 807         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 808
 809         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 810
 811         /* RFSW_CTRL register */
 812         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 813
 814         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 815                          RTL818X_EEPROM_CMD_CONFIG);
 816         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 817         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 818         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 819         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 820                          RTL818X_EEPROM_CMD_NORMAL);
 821
 822         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 823         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 824         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 825         msleep(100);
 826
 827         priv->rf->init(dev);
 828
 829         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 830         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 831         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 832
 833         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 834         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 835         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 836         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 837         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 838         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 839         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 840
 841         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 842         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 843         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 844         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 845         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 846         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 847         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 848         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 849         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 850         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 851         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 852         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 853         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 854
 855         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 856
 857         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 858
 859         priv->slot_time = 0x9;
 860         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 861         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 862         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 863         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 864         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 865
 866         /* ENEDCA flag must always be set, transmit issues? */
 867         rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
 868
 869         return 0;
 870 }
 871
 872 static void rtl8187_work(struct work_struct *work)
 873 {
 874         /* The RTL8187 returns the retry count through register 0xFFFA. In
 875          * addition, it appears to be a cumulative retry count, not the
 876          * value for the current TX packet. When multiple TX entries are
 877          * queued, the retry count will be valid for the last one in the queue.
 878          * The "error" should not matter for purposes of rate setting. */
 879         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 880                                     work.work);
 881         struct ieee80211_tx_info *info;
 882         struct ieee80211_hw *dev = priv->dev;
 883         static u16 retry;
 884         u16 tmp;
 885
 886         mutex_lock(&priv->conf_mutex);
 887         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 888         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 889                 struct sk_buff *old_skb;
 890
 891                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 892                 info = IEEE80211_SKB_CB(old_skb);
 893                 info->status.rates[0].count = tmp - retry + 1;
 894                 ieee80211_tx_status_irqsafe(dev, old_skb);
 895         }
 896         retry = tmp;
 897         mutex_unlock(&priv->conf_mutex);
 898 }
 899
 900 static int rtl8187_start(struct ieee80211_hw *dev)
 901 {
 902         struct rtl8187_priv *priv = dev->priv;
 903         u32 reg;
 904         int ret;
 905
 906         mutex_lock(&priv->conf_mutex);
 907
 908         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 909                                      rtl8187b_init_hw(dev);
 910         if (ret)
 911                 goto rtl8187_start_exit;
 912
 913         init_usb_anchor(&priv->anchored);
 914         priv->dev = dev;
 915
 916         if (priv->is_rtl8187b) {
 917                 reg = RTL818X_RX_CONF_MGMT |
 918                       RTL818X_RX_CONF_DATA |
 919                       RTL818X_RX_CONF_BROADCAST |
 920                       RTL818X_RX_CONF_NICMAC |
 921                       RTL818X_RX_CONF_BSSID |
 922                       (7 << 13 /* RX FIFO threshold NONE */) |
 923                       (7 << 10 /* MAX RX DMA */) |
 924                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 925                       RTL818X_RX_CONF_ONLYERLPKT |
 926                       RTL818X_RX_CONF_MULTICAST;
 927                 priv->rx_conf = reg;
 928                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 929
 930                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 931                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 932                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 933                 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 934                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 935
 936                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 937                                   RTL818X_TX_CONF_HW_SEQNUM |
 938                                   RTL818X_TX_CONF_DISREQQSIZE |
 939                                   (7 << 8  /* short retry limit */) |
 940                                   (7 << 0  /* long retry limit */) |
 941                                   (7 << 21 /* MAX TX DMA */));
 942                 rtl8187_init_urbs(dev);
 943                 rtl8187b_init_status_urb(dev);
 944                 goto rtl8187_start_exit;
 945         }
 946
 947         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 948
 949         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 950         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 951
 952         rtl8187_init_urbs(dev);
 953
 954         reg = RTL818X_RX_CONF_ONLYERLPKT |
 955               RTL818X_RX_CONF_RX_AUTORESETPHY |
 956               RTL818X_RX_CONF_BSSID |
 957               RTL818X_RX_CONF_MGMT |
 958               RTL818X_RX_CONF_DATA |
 959               (7 << 13 /* RX FIFO threshold NONE */) |
 960               (7 << 10 /* MAX RX DMA */) |
 961               RTL818X_RX_CONF_BROADCAST |
 962               RTL818X_RX_CONF_NICMAC;
 963
 964         priv->rx_conf = reg;
 965         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 966
 967         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 968         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 969         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 970         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 971
 972         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 973         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 974         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 975         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 976         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 977
 978         reg  = RTL818X_TX_CONF_CW_MIN |
 979                (7 << 21 /* MAX TX DMA */) |
 980                RTL818X_TX_CONF_NO_ICV;
 981         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 982
 983         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 984         reg |= RTL818X_CMD_TX_ENABLE;
 985         reg |= RTL818X_CMD_RX_ENABLE;
 986         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 987         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
 988
 989 rtl8187_start_exit:
 990         mutex_unlock(&priv->conf_mutex);
 991         return ret;
 992 }
 993
 994 static void rtl8187_stop(struct ieee80211_hw *dev)
 995 {
 996         struct rtl8187_priv *priv = dev->priv;
 997         struct sk_buff *skb;
 998         u32 reg;
 999
1000         mutex_lock(&priv->conf_mutex);
1001         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1002
1003         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1004         reg &= ~RTL818X_CMD_TX_ENABLE;
1005         reg &= ~RTL818X_CMD_RX_ENABLE;
1006         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1007
1008         priv->rf->stop(dev);
1009
1010         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1011         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1012         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1013         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1014
1015         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1016                 dev_kfree_skb_any(skb);
1017
1018         usb_kill_anchored_urbs(&priv->anchored);
1019         mutex_unlock(&priv->conf_mutex);
1020
1021         if (!priv->is_rtl8187b)
1022                 cancel_delayed_work_sync(&priv->work);
1023 }
1024
1025 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1026                                  struct ieee80211_vif *vif)
1027 {
1028         struct rtl8187_priv *priv = dev->priv;
1029         int i;
1030         int ret = -EOPNOTSUPP;
1031
1032         mutex_lock(&priv->conf_mutex);
1033         if (priv->vif)
1034                 goto exit;
1035
1036         switch (vif->type) {
1037         case NL80211_IFTYPE_STATION:
1038                 break;
1039         default:
1040                 goto exit;
1041         }
1042
1043         ret = 0;
1044         priv->vif = vif;
1045
1046         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1047         for (i = 0; i < ETH_ALEN; i++)
1048                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1049                                  ((u8 *)vif->addr)[i]);
1050         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1051
1052 exit:
1053         mutex_unlock(&priv->conf_mutex);
1054         return ret;
1055 }
1056
1057 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1058                                      struct ieee80211_vif *vif)
1059 {
1060         struct rtl8187_priv *priv = dev->priv;
1061         mutex_lock(&priv->conf_mutex);
1062         priv->vif = NULL;
1063         mutex_unlock(&priv->conf_mutex);
1064 }
1065
1066 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1067 {
1068         struct rtl8187_priv *priv = dev->priv;
1069         struct ieee80211_conf *conf = &dev->conf;
1070         u32 reg;
1071
1072         mutex_lock(&priv->conf_mutex);
1073         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1074         /* Enable TX loopback on MAC level to avoid TX during channel
1075          * changes, as this has be seen to causes problems and the
1076          * card will stop work until next reset
1077          */
1078         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1079                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1080         priv->rf->set_chan(dev, conf);
1081         msleep(10);
1082         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1083
1084         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1085         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1086         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1087         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1088         mutex_unlock(&priv->conf_mutex);
1089         return 0;
1090 }
1091
1092 /*
1093  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1094  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1095  */
1096 static __le32 *rtl8187b_ac_addr[4] = {
1097         (__le32 *) 0xFFF0, /* AC_VO */
1098         (__le32 *) 0xFFF4, /* AC_VI */
1099         (__le32 *) 0xFFFC, /* AC_BK */
1100         (__le32 *) 0xFFF8, /* AC_BE */
1101 };
1102
1103 #define SIFS_TIME 0xa
1104
1105 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1106                              bool use_short_preamble)
1107 {
1108         if (priv->is_rtl8187b) {
1109                 u8 difs, eifs;
1110                 u16 ack_timeout;
1111                 int queue;
1112
1113                 if (use_short_slot) {
1114                         priv->slot_time = 0x9;
1115                         difs = 0x1c;
1116                         eifs = 0x53;
1117                 } else {
1118                         priv->slot_time = 0x14;
1119                         difs = 0x32;
1120                         eifs = 0x5b;
1121                 }
1122                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1123                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1124                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1125
1126                 /*
1127                  * BRSR+1 on 8187B is in fact EIFS register
1128                  * Value in units of 4 us
1129                  */
1130                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1131
1132                 /*
1133                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1134                  * register. In units of 4 us like eifs register
1135                  * ack_timeout = ack duration + plcp + difs + preamble
1136                  */
1137                 ack_timeout = 112 + 48 + difs;
1138                 if (use_short_preamble)
1139                         ack_timeout += 72;
1140                 else
1141                         ack_timeout += 144;
1142                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1143                                  DIV_ROUND_UP(ack_timeout, 4));
1144
1145                 for (queue = 0; queue < 4; queue++)
1146                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1147                                          priv->aifsn[queue] * priv->slot_time +
1148                                          SIFS_TIME);
1149         } else {
1150                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1151                 if (use_short_slot) {
1152                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1153                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1154                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1155                 } else {
1156                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1157                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1158                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1159                 }
1160         }
1161 }
1162
1163 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1164                                      struct ieee80211_vif *vif,
1165                                      struct ieee80211_bss_conf *info,
1166                                      u32 changed)
1167 {
1168         struct rtl8187_priv *priv = dev->priv;
1169         int i;
1170         u8 reg;
1171
1172         if (changed & BSS_CHANGED_BSSID) {
1173                 mutex_lock(&priv->conf_mutex);
1174                 for (i = 0; i < ETH_ALEN; i++)
1175                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1176                                          info->bssid[i]);
1177
1178                 if (priv->is_rtl8187b)
1179                         reg = RTL818X_MSR_ENEDCA;
1180                 else
1181                         reg = 0;
1182
1183                 if (is_valid_ether_addr(info->bssid))
1184                         reg |= RTL818X_MSR_INFRA;
1185                 else
1186                         reg |= RTL818X_MSR_NO_LINK;
1187
1188                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1189
1190                 mutex_unlock(&priv->conf_mutex);
1191         }
1192
1193         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1194                 rtl8187_conf_erp(priv, info->use_short_slot,
1195                                  info->use_short_preamble);
1196 }
1197
1198 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1199                                      struct netdev_hw_addr_list *mc_list)
1200 {
1201         return netdev_hw_addr_list_count(mc_list);
1202 }
1203
1204 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1205                                      unsigned int changed_flags,
1206                                      unsigned int *total_flags,
1207                                      u64 multicast)
1208 {
1209         struct rtl8187_priv *priv = dev->priv;
1210
1211         if (changed_flags & FIF_FCSFAIL)
1212                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1213         if (changed_flags & FIF_CONTROL)
1214                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1215         if (changed_flags & FIF_OTHER_BSS)
1216                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1217         if (*total_flags & FIF_ALLMULTI || multicast > 0)
1218                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1219         else
1220                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1221
1222         *total_flags = 0;
1223
1224         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1225                 *total_flags |= FIF_FCSFAIL;
1226         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1227                 *total_flags |= FIF_CONTROL;
1228         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1229                 *total_flags |= FIF_OTHER_BSS;
1230         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1231                 *total_flags |= FIF_ALLMULTI;
1232
1233         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1234 }
1235
1236 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1237                            const struct ieee80211_tx_queue_params *params)
1238 {
1239         struct rtl8187_priv *priv = dev->priv;
1240         u8 cw_min, cw_max;
1241
1242         if (queue > 3)
1243                 return -EINVAL;
1244
1245         cw_min = fls(params->cw_min);
1246         cw_max = fls(params->cw_max);
1247
1248         if (priv->is_rtl8187b) {
1249                 priv->aifsn[queue] = params->aifs;
1250
1251                 /*
1252                  * This is the structure of AC_*_PARAM registers in 8187B:
1253                  * - TXOP limit field, bit offset = 16
1254                  * - ECWmax, bit offset = 12
1255                  * - ECWmin, bit offset = 8
1256                  * - AIFS, bit offset = 0
1257                  */
1258                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1259                                   (params->txop << 16) | (cw_max << 12) |
1260                                   (cw_min << 8) | (params->aifs *
1261                                   priv->slot_time + SIFS_TIME));
1262         } else {
1263                 if (queue != 0)
1264                         return -EINVAL;
1265
1266                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1267                                  cw_min | (cw_max << 4));
1268         }
1269         return 0;
1270 }
1271
1272 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev)
1273 {
1274         struct rtl8187_priv *priv = dev->priv;
1275
1276         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1277                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1278 }
1279
1280 static const struct ieee80211_ops rtl8187_ops = {
1281         .tx                     = rtl8187_tx,
1282         .start                  = rtl8187_start,
1283         .stop                   = rtl8187_stop,
1284         .add_interface          = rtl8187_add_interface,
1285         .remove_interface       = rtl8187_remove_interface,
1286         .config                 = rtl8187_config,
1287         .bss_info_changed       = rtl8187_bss_info_changed,
1288         .prepare_multicast      = rtl8187_prepare_multicast,
1289         .configure_filter       = rtl8187_configure_filter,
1290         .conf_tx                = rtl8187_conf_tx,
1291         .rfkill_poll            = rtl8187_rfkill_poll,
1292         .get_tsf                = rtl8187_get_tsf,
1293 };
1294
1295 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1296 {
1297         struct ieee80211_hw *dev = eeprom->data;
1298         struct rtl8187_priv *priv = dev->priv;
1299         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1300
1301         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1302         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1303         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1304         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1305 }
1306
1307 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1308 {
1309         struct ieee80211_hw *dev = eeprom->data;
1310         struct rtl8187_priv *priv = dev->priv;
1311         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1312
1313         if (eeprom->reg_data_in)
1314                 reg |= RTL818X_EEPROM_CMD_WRITE;
1315         if (eeprom->reg_data_out)
1316                 reg |= RTL818X_EEPROM_CMD_READ;
1317         if (eeprom->reg_data_clock)
1318                 reg |= RTL818X_EEPROM_CMD_CK;
1319         if (eeprom->reg_chip_select)
1320                 reg |= RTL818X_EEPROM_CMD_CS;
1321
1322         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1323         udelay(10);
1324 }
1325
1326 static int __devinit rtl8187_probe(struct usb_interface *intf,
1327                                    const struct usb_device_id *id)
1328 {
1329         struct usb_device *udev = interface_to_usbdev(intf);
1330         struct ieee80211_hw *dev;
1331         struct rtl8187_priv *priv;
1332         struct eeprom_93cx6 eeprom;
1333         struct ieee80211_channel *channel;
1334         const char *chip_name;
1335         u16 txpwr, reg;
1336         u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1337         int err, i;
1338         u8 mac_addr[ETH_ALEN];
1339
1340         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1341         if (!dev) {
1342                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1343                 return -ENOMEM;
1344         }
1345
1346         priv = dev->priv;
1347         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1348
1349         /* allocate "DMA aware" buffer for register accesses */
1350         priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1351         if (!priv->io_dmabuf) {
1352                 err = -ENOMEM;
1353                 goto err_free_dev;
1354         }
1355         mutex_init(&priv->io_mutex);
1356
1357         SET_IEEE80211_DEV(dev, &intf->dev);
1358         usb_set_intfdata(intf, dev);
1359         priv->udev = udev;
1360
1361         usb_get_dev(udev);
1362
1363         skb_queue_head_init(&priv->rx_queue);
1364
1365         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1366         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1367
1368         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1369         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1370         priv->map = (struct rtl818x_csr *)0xFF00;
1371
1372         priv->band.band = IEEE80211_BAND_2GHZ;
1373         priv->band.channels = priv->channels;
1374         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1375         priv->band.bitrates = priv->rates;
1376         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1377         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1378
1379
1380         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1381                      IEEE80211_HW_SIGNAL_DBM |
1382                      IEEE80211_HW_RX_INCLUDES_FCS;
1383
1384         eeprom.data = dev;
1385         eeprom.register_read = rtl8187_eeprom_register_read;
1386         eeprom.register_write = rtl8187_eeprom_register_write;
1387         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1388                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1389         else
1390                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1391
1392         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1393         udelay(10);
1394
1395         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1396                                (__le16 __force *)mac_addr, 3);
1397         if (!is_valid_ether_addr(mac_addr)) {
1398                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1399                        "generated MAC address\n");
1400                 random_ether_addr(mac_addr);
1401         }
1402         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1403
1404         channel = priv->channels;
1405         for (i = 0; i < 3; i++) {
1406                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1407                                   &txpwr);
1408                 (*channel++).hw_value = txpwr & 0xFF;
1409                 (*channel++).hw_value = txpwr >> 8;
1410         }
1411         for (i = 0; i < 2; i++) {
1412                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1413                                   &txpwr);
1414                 (*channel++).hw_value = txpwr & 0xFF;
1415                 (*channel++).hw_value = txpwr >> 8;
1416         }
1417
1418         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1419                           &priv->txpwr_base);
1420
1421         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1422         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1423         /* 0 means asic B-cut, we should use SW 3 wire
1424          * bit-by-bit banging for radio. 1 means we can use
1425          * USB specific request to write radio registers */
1426         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1427         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1428         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1429
1430         if (!priv->is_rtl8187b) {
1431                 u32 reg32;
1432                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1433                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1434                 switch (reg32) {
1435                 case RTL818X_TX_CONF_R8187vD_B:
1436                         /* Some RTL8187B devices have a USB ID of 0x8187
1437                          * detect them here */
1438                         chip_name = "RTL8187BvB(early)";
1439                         priv->is_rtl8187b = 1;
1440                         priv->hw_rev = RTL8187BvB;
1441                         break;
1442                 case RTL818X_TX_CONF_R8187vD:
1443                         chip_name = "RTL8187vD";
1444                         break;
1445                 default:
1446                         chip_name = "RTL8187vB (default)";
1447                 }
1448        } else {
1449                 /*
1450                  * Force USB request to write radio registers for 8187B, Realtek
1451                  * only uses it in their sources
1452                  */
1453                 /*if (priv->asic_rev == 0) {
1454                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1455                                "requests to write to radio registers\n");
1456                         priv->asic_rev = 1;
1457                 }*/
1458                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1459                 case RTL818X_R8187B_B:
1460                         chip_name = "RTL8187BvB";
1461                         priv->hw_rev = RTL8187BvB;
1462                         break;
1463                 case RTL818X_R8187B_D:
1464                         chip_name = "RTL8187BvD";
1465                         priv->hw_rev = RTL8187BvD;
1466                         break;
1467                 case RTL818X_R8187B_E:
1468                         chip_name = "RTL8187BvE";
1469                         priv->hw_rev = RTL8187BvE;
1470                         break;
1471                 default:
1472                         chip_name = "RTL8187BvB (default)";
1473                         priv->hw_rev = RTL8187BvB;
1474                 }
1475         }
1476
1477         if (!priv->is_rtl8187b) {
1478                 for (i = 0; i < 2; i++) {
1479                         eeprom_93cx6_read(&eeprom,
1480                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1481                                           &txpwr);
1482                         (*channel++).hw_value = txpwr & 0xFF;
1483                         (*channel++).hw_value = txpwr >> 8;
1484                 }
1485         } else {
1486                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1487                                   &txpwr);
1488                 (*channel++).hw_value = txpwr & 0xFF;
1489
1490                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1491                 (*channel++).hw_value = txpwr & 0xFF;
1492
1493                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1494                 (*channel++).hw_value = txpwr & 0xFF;
1495                 (*channel++).hw_value = txpwr >> 8;
1496         }
1497         /* Handle the differing rfkill GPIO bit in different models */
1498         priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1499         if (product_id == 0x8197 || product_id == 0x8198) {
1500                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1501                 if (reg & 0xFF00)
1502                         priv->rfkill_mask = RFKILL_MASK_8198;
1503         }
1504
1505         /*
1506          * XXX: Once this driver supports anything that requires
1507          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1508          */
1509         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1510
1511         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1512                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1513                        " info!\n");
1514
1515         priv->rf = rtl8187_detect_rf(dev);
1516         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1517                                   sizeof(struct rtl8187_tx_hdr) :
1518                                   sizeof(struct rtl8187b_tx_hdr);
1519         if (!priv->is_rtl8187b)
1520                 dev->queues = 1;
1521         else
1522                 dev->queues = 4;
1523
1524         err = ieee80211_register_hw(dev);
1525         if (err) {
1526                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1527                 goto err_free_dmabuf;
1528         }
1529         mutex_init(&priv->conf_mutex);
1530         skb_queue_head_init(&priv->b_tx_status.queue);
1531
1532         wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1533                    mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1534                    priv->rfkill_mask);
1535
1536 #ifdef CONFIG_RTL8187_LEDS
1537         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1538         reg &= 0xFF;
1539         rtl8187_leds_init(dev, reg);
1540 #endif
1541         rtl8187_rfkill_init(dev);
1542
1543         return 0;
1544
1545  err_free_dmabuf:
1546         kfree(priv->io_dmabuf);
1547  err_free_dev:
1548         ieee80211_free_hw(dev);
1549         usb_set_intfdata(intf, NULL);
1550         usb_put_dev(udev);
1551         return err;
1552 }
1553
1554 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1555 {
1556         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1557         struct rtl8187_priv *priv;
1558
1559         if (!dev)
1560                 return;
1561
1562 #ifdef CONFIG_RTL8187_LEDS
1563         rtl8187_leds_exit(dev);
1564 #endif
1565         rtl8187_rfkill_exit(dev);
1566         ieee80211_unregister_hw(dev);
1567
1568         priv = dev->priv;
1569         usb_reset_device(priv->udev);
1570         usb_put_dev(interface_to_usbdev(intf));
1571         kfree(priv->io_dmabuf);
1572         ieee80211_free_hw(dev);
1573 }
1574
1575 static struct usb_driver rtl8187_driver = {
1576         .name           = KBUILD_MODNAME,
1577         .id_table       = rtl8187_table,
1578         .probe          = rtl8187_probe,
1579         .disconnect     = __devexit_p(rtl8187_disconnect),
1580 };
1581
1582 static int __init rtl8187_init(void)
1583 {
1584         return usb_register(&rtl8187_driver);
1585 }
1586
1587 static void __exit rtl8187_exit(void)
1588 {
1589         usb_deregister(&rtl8187_driver);
1590 }
1591
1592 module_init(rtl8187_init);
1593 module_exit(rtl8187_exit);