drivers/net/wireless/rtl818x/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/usb.h>
  25 #include <linux/delay.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/eeprom_93cx6.h>
  28 #include <net/mac80211.h>
  29
  30 #include "rtl8187.h"
  31 #include "rtl8187_rtl8225.h"
  32 #ifdef CONFIG_RTL8187_LEDS
  33 #include "rtl8187_leds.h"
  34 #endif
  35
  36 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  37 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  38 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  39 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  40 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  41 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  42 MODULE_LICENSE("GPL");
  43
  44 static struct usb_device_id rtl8187_table[] __devinitdata = {
  45         /* Asus */
  46         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  47         /* Belkin */
  48         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  49         /* Realtek */
  50         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  51         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  52         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  53         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  54         /* Surecom */
  55         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  56         /* Logitech */
  57         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  58         /* Netgear */
  59         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  60         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  61         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  62         /* HP */
  63         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  64         /* Sitecom */
  65         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  66         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  67         /* Sphairon Access Systems GmbH */
  68         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  69         /* Dick Smith Electronics */
  70         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  71         /* Abocom */
  72         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  73         /* Qcom */
  74         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  75         /* AirLive */
  76         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  77         {}
  78 };
  79
  80 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  81
  82 static const struct ieee80211_rate rtl818x_rates[] = {
  83         { .bitrate = 10, .hw_value = 0, },
  84         { .bitrate = 20, .hw_value = 1, },
  85         { .bitrate = 55, .hw_value = 2, },
  86         { .bitrate = 110, .hw_value = 3, },
  87         { .bitrate = 60, .hw_value = 4, },
  88         { .bitrate = 90, .hw_value = 5, },
  89         { .bitrate = 120, .hw_value = 6, },
  90         { .bitrate = 180, .hw_value = 7, },
  91         { .bitrate = 240, .hw_value = 8, },
  92         { .bitrate = 360, .hw_value = 9, },
  93         { .bitrate = 480, .hw_value = 10, },
  94         { .bitrate = 540, .hw_value = 11, },
  95 };
  96
  97 static const struct ieee80211_channel rtl818x_channels[] = {
  98         { .center_freq = 2412 },
  99         { .center_freq = 2417 },
 100         { .center_freq = 2422 },
 101         { .center_freq = 2427 },
 102         { .center_freq = 2432 },
 103         { .center_freq = 2437 },
 104         { .center_freq = 2442 },
 105         { .center_freq = 2447 },
 106         { .center_freq = 2452 },
 107         { .center_freq = 2457 },
 108         { .center_freq = 2462 },
 109         { .center_freq = 2467 },
 110         { .center_freq = 2472 },
 111         { .center_freq = 2484 },
 112 };
 113
 114 static void rtl8187_iowrite_async_cb(struct urb *urb)
 115 {
 116         kfree(urb->context);
 117 }
 118
 119 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 120                                   void *data, u16 len)
 121 {
 122         struct usb_ctrlrequest *dr;
 123         struct urb *urb;
 124         struct rtl8187_async_write_data {
 125                 u8 data[4];
 126                 struct usb_ctrlrequest dr;
 127         } *buf;
 128         int rc;
 129
 130         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 131         if (!buf)
 132                 return;
 133
 134         urb = usb_alloc_urb(0, GFP_ATOMIC);
 135         if (!urb) {
 136                 kfree(buf);
 137                 return;
 138         }
 139
 140         dr = &buf->dr;
 141
 142         dr->bRequestType = RTL8187_REQT_WRITE;
 143         dr->bRequest = RTL8187_REQ_SET_REG;
 144         dr->wValue = addr;
 145         dr->wIndex = 0;
 146         dr->wLength = cpu_to_le16(len);
 147
 148         memcpy(buf, data, len);
 149
 150         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 151                              (unsigned char *)dr, buf, len,
 152                              rtl8187_iowrite_async_cb, buf);
 153         usb_anchor_urb(urb, &priv->anchored);
 154         rc = usb_submit_urb(urb, GFP_ATOMIC);
 155         if (rc < 0) {
 156                 kfree(buf);
 157                 usb_unanchor_urb(urb);
 158         }
 159         usb_free_urb(urb);
 160 }
 161
 162 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 163                                            __le32 *addr, u32 val)
 164 {
 165         __le32 buf = cpu_to_le32(val);
 166
 167         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 168                               &buf, sizeof(buf));
 169 }
 170
 171 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 172 {
 173         struct rtl8187_priv *priv = dev->priv;
 174
 175         data <<= 8;
 176         data |= addr | 0x80;
 177
 178         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 179         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 180         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 181         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 182 }
 183
 184 static void rtl8187_tx_cb(struct urb *urb)
 185 {
 186         struct sk_buff *skb = (struct sk_buff *)urb->context;
 187         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 188         struct ieee80211_hw *hw = info->rate_driver_data[0];
 189         struct rtl8187_priv *priv = hw->priv;
 190
 191         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 192                                           sizeof(struct rtl8187_tx_hdr));
 193         ieee80211_tx_info_clear_status(info);
 194
 195         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 196                 if (priv->is_rtl8187b) {
 197                         skb_queue_tail(&priv->b_tx_status.queue, skb);
 198
 199                         /* queue is "full", discard last items */
 200                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 201                                 struct sk_buff *old_skb;
 202
 203                                 dev_dbg(&priv->udev->dev,
 204                                         "transmit status queue full\n");
 205
 206                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 207                                 ieee80211_tx_status_irqsafe(hw, old_skb);
 208                         }
 209                         return;
 210                 } else {
 211                         info->flags |= IEEE80211_TX_STAT_ACK;
 212                 }
 213         }
 214         if (priv->is_rtl8187b)
 215                 ieee80211_tx_status_irqsafe(hw, skb);
 216         else {
 217                 /* Retry information for the RTI8187 is only available by
 218                  * reading a register in the device. We are in interrupt mode
 219                  * here, thus queue the skb and finish on a work queue. */
 220                 skb_queue_tail(&priv->b_tx_status.queue, skb);
 221                 queue_delayed_work(hw->workqueue, &priv->work, 0);
 222         }
 223 }
 224
 225 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 226 {
 227         struct rtl8187_priv *priv = dev->priv;
 228         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 229         unsigned int ep;
 230         void *buf;
 231         struct urb *urb;
 232         __le16 rts_dur = 0;
 233         u32 flags;
 234         int rc;
 235
 236         urb = usb_alloc_urb(0, GFP_ATOMIC);
 237         if (!urb) {
 238                 kfree_skb(skb);
 239                 return NETDEV_TX_OK;
 240         }
 241
 242         flags = skb->len;
 243         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 244
 245         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 246         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 247                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 248         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 249                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 250                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 251                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 252                                                  skb->len, info);
 253         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 254                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 255                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 256         }
 257
 258         if (!priv->is_rtl8187b) {
 259                 struct rtl8187_tx_hdr *hdr =
 260                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 261                 hdr->flags = cpu_to_le32(flags);
 262                 hdr->len = 0;
 263                 hdr->rts_duration = rts_dur;
 264                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 265                 buf = hdr;
 266
 267                 ep = 2;
 268         } else {
 269                 /* fc needs to be calculated before skb_push() */
 270                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 271                 struct ieee80211_hdr *tx_hdr =
 272                         (struct ieee80211_hdr *)(skb->data);
 273                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 274
 275                 struct rtl8187b_tx_hdr *hdr =
 276                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 277                 struct ieee80211_rate *txrate =
 278                         ieee80211_get_tx_rate(dev, info);
 279                 memset(hdr, 0, sizeof(*hdr));
 280                 hdr->flags = cpu_to_le32(flags);
 281                 hdr->rts_duration = rts_dur;
 282                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 283                 hdr->tx_duration =
 284                         ieee80211_generic_frame_duration(dev, priv->vif,
 285                                                          skb->len, txrate);
 286                 buf = hdr;
 287
 288                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 289                         ep = 12;
 290                 else
 291                         ep = epmap[skb_get_queue_mapping(skb)];
 292         }
 293
 294         info->rate_driver_data[0] = dev;
 295         info->rate_driver_data[1] = urb;
 296
 297         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 298                           buf, skb->len, rtl8187_tx_cb, skb);
 299         urb->transfer_flags |= URB_ZERO_PACKET;
 300         usb_anchor_urb(urb, &priv->anchored);
 301         rc = usb_submit_urb(urb, GFP_ATOMIC);
 302         if (rc < 0) {
 303                 usb_unanchor_urb(urb);
 304                 kfree_skb(skb);
 305         }
 306         usb_free_urb(urb);
 307
 308         return NETDEV_TX_OK;
 309 }
 310
 311 static void rtl8187_rx_cb(struct urb *urb)
 312 {
 313         struct sk_buff *skb = (struct sk_buff *)urb->context;
 314         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 315         struct ieee80211_hw *dev = info->dev;
 316         struct rtl8187_priv *priv = dev->priv;
 317         struct ieee80211_rx_status rx_status = { 0 };
 318         int rate, signal;
 319         u32 flags;
 320         u32 quality;
 321         unsigned long f;
 322
 323         spin_lock_irqsave(&priv->rx_queue.lock, f);
 324         if (skb->next)
 325                 __skb_unlink(skb, &priv->rx_queue);
 326         else {
 327                 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 328                 return;
 329         }
 330         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 331         skb_put(skb, urb->actual_length);
 332
 333         if (unlikely(urb->status)) {
 334                 dev_kfree_skb_irq(skb);
 335                 return;
 336         }
 337
 338         if (!priv->is_rtl8187b) {
 339                 struct rtl8187_rx_hdr *hdr =
 340                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 341                 flags = le32_to_cpu(hdr->flags);
 342                 /* As with the RTL8187B below, the AGC is used to calculate
 343                  * signal strength and quality. In this case, the scaling
 344                  * constants are derived from the output of p54usb.
 345                  */
 346                 quality = 130 - ((41 * hdr->agc) >> 6);
 347                 signal = -4 - ((27 * hdr->agc) >> 6);
 348                 rx_status.antenna = (hdr->signal >> 7) & 1;
 349                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 350         } else {
 351                 struct rtl8187b_rx_hdr *hdr =
 352                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 353                 /* The Realtek datasheet for the RTL8187B shows that the RX
 354                  * header contains the following quantities: signal quality,
 355                  * RSSI, AGC, the received power in dB, and the measured SNR.
 356                  * In testing, none of these quantities show qualitative
 357                  * agreement with AP signal strength, except for the AGC,
 358                  * which is inversely proportional to the strength of the
 359                  * signal. In the following, the quality and signal strength
 360                  * are derived from the AGC. The arbitrary scaling constants
 361                  * are chosen to make the results close to the values obtained
 362                  * for a BCM4312 using b43 as the driver. The noise is ignored
 363                  * for now.
 364                  */
 365                 flags = le32_to_cpu(hdr->flags);
 366                 quality = 170 - hdr->agc;
 367                 signal = 14 - hdr->agc / 2;
 368                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 369                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 370         }
 371
 372         if (quality > 100)
 373                 quality = 100;
 374         rx_status.qual = quality;
 375         priv->quality = quality;
 376         rx_status.signal = signal;
 377         priv->signal = signal;
 378         rate = (flags >> 20) & 0xF;
 379         skb_trim(skb, flags & 0x0FFF);
 380         rx_status.rate_idx = rate;
 381         rx_status.freq = dev->conf.channel->center_freq;
 382         rx_status.band = dev->conf.channel->band;
 383         rx_status.flag |= RX_FLAG_TSFT;
 384         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 385                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 386         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 387
 388         skb = dev_alloc_skb(RTL8187_MAX_RX);
 389         if (unlikely(!skb)) {
 390                 /* TODO check rx queue length and refill *somewhere* */
 391                 return;
 392         }
 393
 394         info = (struct rtl8187_rx_info *)skb->cb;
 395         info->urb = urb;
 396         info->dev = dev;
 397         urb->transfer_buffer = skb_tail_pointer(skb);
 398         urb->context = skb;
 399         skb_queue_tail(&priv->rx_queue, skb);
 400
 401         usb_anchor_urb(urb, &priv->anchored);
 402         if (usb_submit_urb(urb, GFP_ATOMIC)) {
 403                 usb_unanchor_urb(urb);
 404                 skb_unlink(skb, &priv->rx_queue);
 405                 dev_kfree_skb_irq(skb);
 406         }
 407 }
 408
 409 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 410 {
 411         struct rtl8187_priv *priv = dev->priv;
 412         struct urb *entry = NULL;
 413         struct sk_buff *skb;
 414         struct rtl8187_rx_info *info;
 415         int ret = 0;
 416
 417         while (skb_queue_len(&priv->rx_queue) < 16) {
 418                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 419                 if (!skb) {
 420                         ret = -ENOMEM;
 421                         goto err;
 422                 }
 423                 entry = usb_alloc_urb(0, GFP_KERNEL);
 424                 if (!entry) {
 425                         ret = -ENOMEM;
 426                         goto err;
 427                 }
 428                 usb_fill_bulk_urb(entry, priv->udev,
 429                                   usb_rcvbulkpipe(priv->udev,
 430                                   priv->is_rtl8187b ? 3 : 1),
 431                                   skb_tail_pointer(skb),
 432                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 433                 info = (struct rtl8187_rx_info *)skb->cb;
 434                 info->urb = entry;
 435                 info->dev = dev;
 436                 skb_queue_tail(&priv->rx_queue, skb);
 437                 usb_anchor_urb(entry, &priv->anchored);
 438                 ret = usb_submit_urb(entry, GFP_KERNEL);
 439                 if (ret) {
 440                         skb_unlink(skb, &priv->rx_queue);
 441                         usb_unanchor_urb(entry);
 442                         goto err;
 443                 }
 444                 usb_free_urb(entry);
 445         }
 446         return ret;
 447
 448 err:
 449         usb_free_urb(entry);
 450         kfree_skb(skb);
 451         usb_kill_anchored_urbs(&priv->anchored);
 452         return ret;
 453 }
 454
 455 static void rtl8187b_status_cb(struct urb *urb)
 456 {
 457         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 458         struct rtl8187_priv *priv = hw->priv;
 459         u64 val;
 460         unsigned int cmd_type;
 461
 462         if (unlikely(urb->status))
 463                 return;
 464
 465         /*
 466          * Read from status buffer:
 467          *
 468          * bits [30:31] = cmd type:
 469          * - 0 indicates tx beacon interrupt
 470          * - 1 indicates tx close descriptor
 471          *
 472          * In the case of tx beacon interrupt:
 473          * [0:9] = Last Beacon CW
 474          * [10:29] = reserved
 475          * [30:31] = 00b
 476          * [32:63] = Last Beacon TSF
 477          *
 478          * If it's tx close descriptor:
 479          * [0:7] = Packet Retry Count
 480          * [8:14] = RTS Retry Count
 481          * [15] = TOK
 482          * [16:27] = Sequence No
 483          * [28] = LS
 484          * [29] = FS
 485          * [30:31] = 01b
 486          * [32:47] = unused (reserved?)
 487          * [48:63] = MAC Used Time
 488          */
 489         val = le64_to_cpu(priv->b_tx_status.buf);
 490
 491         cmd_type = (val >> 30) & 0x3;
 492         if (cmd_type == 1) {
 493                 unsigned int pkt_rc, seq_no;
 494                 bool tok;
 495                 struct sk_buff *skb;
 496                 struct ieee80211_hdr *ieee80211hdr;
 497                 unsigned long flags;
 498
 499                 pkt_rc = val & 0xFF;
 500                 tok = val & (1 << 15);
 501                 seq_no = (val >> 16) & 0xFFF;
 502
 503                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 504                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 505                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 506
 507                         /*
 508                          * While testing, it was discovered that the seq_no
 509                          * doesn't actually contains the sequence number.
 510                          * Instead of returning just the 12 bits of sequence
 511                          * number, hardware is returning entire sequence control
 512                          * (fragment number plus sequence number) in a 12 bit
 513                          * only field overflowing after some time. As a
 514                          * workaround, just consider the lower bits, and expect
 515                          * it's unlikely we wrongly ack some sent data
 516                          */
 517                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 518                             & 0xFFF) == seq_no)
 519                                 break;
 520                 }
 521                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 522                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 523
 524                         __skb_unlink(skb, &priv->b_tx_status.queue);
 525                         if (tok)
 526                                 info->flags |= IEEE80211_TX_STAT_ACK;
 527                         info->status.rates[0].count = pkt_rc + 1;
 528
 529                         ieee80211_tx_status_irqsafe(hw, skb);
 530                 }
 531                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 532         }
 533
 534         usb_anchor_urb(urb, &priv->anchored);
 535         if (usb_submit_urb(urb, GFP_ATOMIC))
 536                 usb_unanchor_urb(urb);
 537 }
 538
 539 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 540 {
 541         struct rtl8187_priv *priv = dev->priv;
 542         struct urb *entry;
 543         int ret = 0;
 544
 545         entry = usb_alloc_urb(0, GFP_KERNEL);
 546         if (!entry)
 547                 return -ENOMEM;
 548
 549         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 550                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 551                           rtl8187b_status_cb, dev);
 552
 553         usb_anchor_urb(entry, &priv->anchored);
 554         ret = usb_submit_urb(entry, GFP_KERNEL);
 555         if (ret)
 556                 usb_unanchor_urb(entry);
 557         usb_free_urb(entry);
 558
 559         return ret;
 560 }
 561
 562 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 563 {
 564         struct rtl8187_priv *priv = dev->priv;
 565         u8 reg;
 566         int i;
 567
 568         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 569         reg &= (1 << 1);
 570         reg |= RTL818X_CMD_RESET;
 571         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 572
 573         i = 10;
 574         do {
 575                 msleep(2);
 576                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 577                       RTL818X_CMD_RESET))
 578                         break;
 579         } while (--i);
 580
 581         if (!i) {
 582                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 583                 return -ETIMEDOUT;
 584         }
 585
 586         /* reload registers from eeprom */
 587         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 588
 589         i = 10;
 590         do {
 591                 msleep(4);
 592                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 593                       RTL818X_EEPROM_CMD_CONFIG))
 594                         break;
 595         } while (--i);
 596
 597         if (!i) {
 598                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 599                        wiphy_name(dev->wiphy));
 600                 return -ETIMEDOUT;
 601         }
 602
 603         return 0;
 604 }
 605
 606 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 607 {
 608         struct rtl8187_priv *priv = dev->priv;
 609         u8 reg;
 610         int res;
 611
 612         /* reset */
 613         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 614                          RTL818X_EEPROM_CMD_CONFIG);
 615         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 616         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 617                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 618         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 619                           RTL8187_RTL8225_ANAPARAM_ON);
 620         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 621                           RTL8187_RTL8225_ANAPARAM2_ON);
 622         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 623                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 624         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 625                          RTL818X_EEPROM_CMD_NORMAL);
 626
 627         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 628
 629         msleep(200);
 630         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 631         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 632         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 633         msleep(200);
 634
 635         res = rtl8187_cmd_reset(dev);
 636         if (res)
 637                 return res;
 638
 639         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 640         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 641         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 642                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 643         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 644                           RTL8187_RTL8225_ANAPARAM_ON);
 645         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 646                           RTL8187_RTL8225_ANAPARAM2_ON);
 647         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 648                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 649         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 650
 651         /* setup card */
 652         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 653         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 654
 655         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 656         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 657         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 658
 659         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 660
 661         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 662         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 663         reg &= 0x3F;
 664         reg |= 0x80;
 665         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 666
 667         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 668
 669         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 670         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 671         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 672
 673         // TODO: set RESP_RATE and BRSR properly
 674         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 675         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 676
 677         /* host_usb_init */
 678         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 679         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 680         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 681         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 682         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 683         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 684         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 685         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 686         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 687         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 688         msleep(100);
 689
 690         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 691         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 692         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 693         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 694                          RTL818X_EEPROM_CMD_CONFIG);
 695         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 696         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 697                          RTL818X_EEPROM_CMD_NORMAL);
 698         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 699         msleep(100);
 700
 701         priv->rf->init(dev);
 702
 703         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 704         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 705         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 706         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 707         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 708         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 709         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 710
 711         return 0;
 712 }
 713
 714 static const u8 rtl8187b_reg_table[][3] = {
 715         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 716         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 717         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 718         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 719
 720         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 721         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 722         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 723         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 724         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 725         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 726
 727         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 728         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 729         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 730         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 731         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 732         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 733         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 734         {0x73, 0x9A, 2},
 735
 736         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 737         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 738         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 739         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 740         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 741
 742         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 743         {0x8F, 0x00, 0}
 744 };
 745
 746 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 747 {
 748         struct rtl8187_priv *priv = dev->priv;
 749         int res, i;
 750         u8 reg;
 751
 752         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 753                          RTL818X_EEPROM_CMD_CONFIG);
 754
 755         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 756         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 757         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 758         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 759                           RTL8187B_RTL8225_ANAPARAM2_ON);
 760         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 761                           RTL8187B_RTL8225_ANAPARAM_ON);
 762         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 763                          RTL8187B_RTL8225_ANAPARAM3_ON);
 764
 765         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 766         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 767         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 768         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 769
 770         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 771         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 772         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 773
 774         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 775                          RTL818X_EEPROM_CMD_NORMAL);
 776
 777         res = rtl8187_cmd_reset(dev);
 778         if (res)
 779                 return res;
 780
 781         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 782         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 783         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 784         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 785         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 786         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 787                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 788         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 789
 790         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 791
 792         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 793         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 794         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 795
 796         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 797                          RTL818X_EEPROM_CMD_CONFIG);
 798         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 799         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 800         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 801                          RTL818X_EEPROM_CMD_NORMAL);
 802
 803         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 804         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 805                 rtl818x_iowrite8_idx(priv,
 806                                      (u8 *)(uintptr_t)
 807                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 808                                      rtl8187b_reg_table[i][1],
 809                                      rtl8187b_reg_table[i][2]);
 810         }
 811
 812         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 813         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 814
 815         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 816         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 817         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 818
 819         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 820
 821         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 822
 823         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 824                          RTL818X_EEPROM_CMD_CONFIG);
 825         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 826         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 827         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 828         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 829                          RTL818X_EEPROM_CMD_NORMAL);
 830
 831         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 832         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 833         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 834         msleep(100);
 835
 836         priv->rf->init(dev);
 837
 838         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 839         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 840         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 841
 842         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 843         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 844         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 845         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 846         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 847         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 848         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 849
 850         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 851         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 852         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 853         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 854         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 855         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 856         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 857         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 858         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 859         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 860         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 861         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 862         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 863
 864         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 865
 866         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 867
 868         priv->slot_time = 0x9;
 869         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 870         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 871         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 872         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 873         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 874
 875         return 0;
 876 }
 877
 878 static void rtl8187_work(struct work_struct *work)
 879 {
 880         /* The RTL8187 returns the retry count through register 0xFFFA. In
 881          * addition, it appears to be a cumulative retry count, not the
 882          * value for the current TX packet. When multiple TX entries are
 883          * queued, the retry count will be valid for the last one in the queue.
 884          * The "error" should not matter for purposes of rate setting. */
 885         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 886                                     work.work);
 887         struct ieee80211_tx_info *info;
 888         struct ieee80211_hw *dev = priv->dev;
 889         static u16 retry;
 890         u16 tmp;
 891
 892         mutex_lock(&priv->conf_mutex);
 893         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 894         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 895                 struct sk_buff *old_skb;
 896
 897                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 898                 info = IEEE80211_SKB_CB(old_skb);
 899                 info->status.rates[0].count = tmp - retry + 1;
 900                 ieee80211_tx_status_irqsafe(dev, old_skb);
 901         }
 902         retry = tmp;
 903         mutex_unlock(&priv->conf_mutex);
 904 }
 905
 906 static int rtl8187_start(struct ieee80211_hw *dev)
 907 {
 908         struct rtl8187_priv *priv = dev->priv;
 909         u32 reg;
 910         int ret;
 911
 912         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 913                                      rtl8187b_init_hw(dev);
 914         if (ret)
 915                 return ret;
 916
 917         mutex_lock(&priv->conf_mutex);
 918
 919         init_usb_anchor(&priv->anchored);
 920         priv->dev = dev;
 921
 922         if (priv->is_rtl8187b) {
 923                 reg = RTL818X_RX_CONF_MGMT |
 924                       RTL818X_RX_CONF_DATA |
 925                       RTL818X_RX_CONF_BROADCAST |
 926                       RTL818X_RX_CONF_NICMAC |
 927                       RTL818X_RX_CONF_BSSID |
 928                       (7 << 13 /* RX FIFO threshold NONE */) |
 929                       (7 << 10 /* MAX RX DMA */) |
 930                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 931                       RTL818X_RX_CONF_ONLYERLPKT |
 932                       RTL818X_RX_CONF_MULTICAST;
 933                 priv->rx_conf = reg;
 934                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 935
 936                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 937                                   RTL818X_TX_CONF_HW_SEQNUM |
 938                                   RTL818X_TX_CONF_DISREQQSIZE |
 939                                   (7 << 8  /* short retry limit */) |
 940                                   (7 << 0  /* long retry limit */) |
 941                                   (7 << 21 /* MAX TX DMA */));
 942                 rtl8187_init_urbs(dev);
 943                 rtl8187b_init_status_urb(dev);
 944                 mutex_unlock(&priv->conf_mutex);
 945                 return 0;
 946         }
 947
 948         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 949
 950         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 951         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 952
 953         rtl8187_init_urbs(dev);
 954
 955         reg = RTL818X_RX_CONF_ONLYERLPKT |
 956               RTL818X_RX_CONF_RX_AUTORESETPHY |
 957               RTL818X_RX_CONF_BSSID |
 958               RTL818X_RX_CONF_MGMT |
 959               RTL818X_RX_CONF_DATA |
 960               (7 << 13 /* RX FIFO threshold NONE */) |
 961               (7 << 10 /* MAX RX DMA */) |
 962               RTL818X_RX_CONF_BROADCAST |
 963               RTL818X_RX_CONF_NICMAC;
 964
 965         priv->rx_conf = reg;
 966         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 967
 968         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 969         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 970         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 971         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 972
 973         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 974         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 975         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 976         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 977         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 978
 979         reg  = RTL818X_TX_CONF_CW_MIN |
 980                (7 << 21 /* MAX TX DMA */) |
 981                RTL818X_TX_CONF_NO_ICV;
 982         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 983
 984         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 985         reg |= RTL818X_CMD_TX_ENABLE;
 986         reg |= RTL818X_CMD_RX_ENABLE;
 987         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 988         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
 989         mutex_unlock(&priv->conf_mutex);
 990
 991         return 0;
 992 }
 993
 994 static void rtl8187_stop(struct ieee80211_hw *dev)
 995 {
 996         struct rtl8187_priv *priv = dev->priv;
 997         struct sk_buff *skb;
 998         u32 reg;
 999
1000         mutex_lock(&priv->conf_mutex);
1001         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1002
1003         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1004         reg &= ~RTL818X_CMD_TX_ENABLE;
1005         reg &= ~RTL818X_CMD_RX_ENABLE;
1006         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1007
1008         priv->rf->stop(dev);
1009
1010         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1011         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1012         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1013         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1014
1015         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1016                 dev_kfree_skb_any(skb);
1017
1018         usb_kill_anchored_urbs(&priv->anchored);
1019         if (!priv->is_rtl8187b)
1020                 cancel_delayed_work_sync(&priv->work);
1021         mutex_unlock(&priv->conf_mutex);
1022 }
1023
1024 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1025                                  struct ieee80211_if_init_conf *conf)
1026 {
1027         struct rtl8187_priv *priv = dev->priv;
1028         int i;
1029         int ret = -EOPNOTSUPP;
1030
1031         mutex_lock(&priv->conf_mutex);
1032         if (priv->mode != NL80211_IFTYPE_MONITOR)
1033                 goto exit;
1034
1035         switch (conf->type) {
1036         case NL80211_IFTYPE_STATION:
1037                 priv->mode = conf->type;
1038                 break;
1039         default:
1040                 goto exit;
1041         }
1042
1043         ret = 0;
1044         priv->vif = conf->vif;
1045
1046         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1047         for (i = 0; i < ETH_ALEN; i++)
1048                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1049                                  ((u8 *)conf->mac_addr)[i]);
1050         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1051
1052 exit:
1053         mutex_unlock(&priv->conf_mutex);
1054         return ret;
1055 }
1056
1057 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1058                                      struct ieee80211_if_init_conf *conf)
1059 {
1060         struct rtl8187_priv *priv = dev->priv;
1061         mutex_lock(&priv->conf_mutex);
1062         priv->mode = NL80211_IFTYPE_MONITOR;
1063         priv->vif = NULL;
1064         mutex_unlock(&priv->conf_mutex);
1065 }
1066
1067 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1068 {
1069         struct rtl8187_priv *priv = dev->priv;
1070         struct ieee80211_conf *conf = &dev->conf;
1071         u32 reg;
1072
1073         mutex_lock(&priv->conf_mutex);
1074         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1075         /* Enable TX loopback on MAC level to avoid TX during channel
1076          * changes, as this has be seen to causes problems and the
1077          * card will stop work until next reset
1078          */
1079         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1080                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1081         priv->rf->set_chan(dev, conf);
1082         msleep(10);
1083         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1084
1085         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1086         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1087         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1088         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1089         mutex_unlock(&priv->conf_mutex);
1090         return 0;
1091 }
1092
1093 static int rtl8187_config_interface(struct ieee80211_hw *dev,
1094                                     struct ieee80211_vif *vif,
1095                                     struct ieee80211_if_conf *conf)
1096 {
1097         struct rtl8187_priv *priv = dev->priv;
1098         int i;
1099         u8 reg;
1100
1101         mutex_lock(&priv->conf_mutex);
1102         for (i = 0; i < ETH_ALEN; i++)
1103                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
1104
1105         if (is_valid_ether_addr(conf->bssid)) {
1106                 reg = RTL818X_MSR_INFRA;
1107                 if (priv->is_rtl8187b)
1108                         reg |= RTL818X_MSR_ENEDCA;
1109                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1110         } else {
1111                 reg = RTL818X_MSR_NO_LINK;
1112                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1113         }
1114
1115         mutex_unlock(&priv->conf_mutex);
1116         return 0;
1117 }
1118
1119 /*
1120  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1121  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1122  */
1123 static __le32 *rtl8187b_ac_addr[4] = {
1124         (__le32 *) 0xFFF0, /* AC_VO */
1125         (__le32 *) 0xFFF4, /* AC_VI */
1126         (__le32 *) 0xFFFC, /* AC_BK */
1127         (__le32 *) 0xFFF8, /* AC_BE */
1128 };
1129
1130 #define SIFS_TIME 0xa
1131
1132 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1133                              bool use_short_preamble)
1134 {
1135         if (priv->is_rtl8187b) {
1136                 u8 difs, eifs;
1137                 u16 ack_timeout;
1138                 int queue;
1139
1140                 if (use_short_slot) {
1141                         priv->slot_time = 0x9;
1142                         difs = 0x1c;
1143                         eifs = 0x53;
1144                 } else {
1145                         priv->slot_time = 0x14;
1146                         difs = 0x32;
1147                         eifs = 0x5b;
1148                 }
1149                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1150                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1151                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1152
1153                 /*
1154                  * BRSR+1 on 8187B is in fact EIFS register
1155                  * Value in units of 4 us
1156                  */
1157                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1158
1159                 /*
1160                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1161                  * register. In units of 4 us like eifs register
1162                  * ack_timeout = ack duration + plcp + difs + preamble
1163                  */
1164                 ack_timeout = 112 + 48 + difs;
1165                 if (use_short_preamble)
1166                         ack_timeout += 72;
1167                 else
1168                         ack_timeout += 144;
1169                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1170                                  DIV_ROUND_UP(ack_timeout, 4));
1171
1172                 for (queue = 0; queue < 4; queue++)
1173                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1174                                          priv->aifsn[queue] * priv->slot_time +
1175                                          SIFS_TIME);
1176         } else {
1177                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1178                 if (use_short_slot) {
1179                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1180                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1181                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1182                 } else {
1183                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1184                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1185                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1186                 }
1187         }
1188 }
1189
1190 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1191                                      struct ieee80211_vif *vif,
1192                                      struct ieee80211_bss_conf *info,
1193                                      u32 changed)
1194 {
1195         struct rtl8187_priv *priv = dev->priv;
1196
1197         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1198                 rtl8187_conf_erp(priv, info->use_short_slot,
1199                                  info->use_short_preamble);
1200 }
1201
1202 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1203                                      unsigned int changed_flags,
1204                                      unsigned int *total_flags,
1205                                      int mc_count, struct dev_addr_list *mclist)
1206 {
1207         struct rtl8187_priv *priv = dev->priv;
1208
1209         if (changed_flags & FIF_FCSFAIL)
1210                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1211         if (changed_flags & FIF_CONTROL)
1212                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1213         if (changed_flags & FIF_OTHER_BSS)
1214                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1215         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
1216                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1217         else
1218                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1219
1220         *total_flags = 0;
1221
1222         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1223                 *total_flags |= FIF_FCSFAIL;
1224         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1225                 *total_flags |= FIF_CONTROL;
1226         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1227                 *total_flags |= FIF_OTHER_BSS;
1228         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1229                 *total_flags |= FIF_ALLMULTI;
1230
1231         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1232 }
1233
1234 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1235                            const struct ieee80211_tx_queue_params *params)
1236 {
1237         struct rtl8187_priv *priv = dev->priv;
1238         u8 cw_min, cw_max;
1239
1240         if (queue > 3)
1241                 return -EINVAL;
1242
1243         cw_min = fls(params->cw_min);
1244         cw_max = fls(params->cw_max);
1245
1246         if (priv->is_rtl8187b) {
1247                 priv->aifsn[queue] = params->aifs;
1248
1249                 /*
1250                  * This is the structure of AC_*_PARAM registers in 8187B:
1251                  * - TXOP limit field, bit offset = 16
1252                  * - ECWmax, bit offset = 12
1253                  * - ECWmin, bit offset = 8
1254                  * - AIFS, bit offset = 0
1255                  */
1256                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1257                                   (params->txop << 16) | (cw_max << 12) |
1258                                   (cw_min << 8) | (params->aifs *
1259                                   priv->slot_time + SIFS_TIME));
1260         } else {
1261                 if (queue != 0)
1262                         return -EINVAL;
1263
1264                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1265                                  cw_min | (cw_max << 4));
1266         }
1267         return 0;
1268 }
1269
1270 static const struct ieee80211_ops rtl8187_ops = {
1271         .tx                     = rtl8187_tx,
1272         .start                  = rtl8187_start,
1273         .stop                   = rtl8187_stop,
1274         .add_interface          = rtl8187_add_interface,
1275         .remove_interface       = rtl8187_remove_interface,
1276         .config                 = rtl8187_config,
1277         .config_interface       = rtl8187_config_interface,
1278         .bss_info_changed       = rtl8187_bss_info_changed,
1279         .configure_filter       = rtl8187_configure_filter,
1280         .conf_tx                = rtl8187_conf_tx
1281 };
1282
1283 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1284 {
1285         struct ieee80211_hw *dev = eeprom->data;
1286         struct rtl8187_priv *priv = dev->priv;
1287         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1288
1289         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1290         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1291         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1292         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1293 }
1294
1295 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1296 {
1297         struct ieee80211_hw *dev = eeprom->data;
1298         struct rtl8187_priv *priv = dev->priv;
1299         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1300
1301         if (eeprom->reg_data_in)
1302                 reg |= RTL818X_EEPROM_CMD_WRITE;
1303         if (eeprom->reg_data_out)
1304                 reg |= RTL818X_EEPROM_CMD_READ;
1305         if (eeprom->reg_data_clock)
1306                 reg |= RTL818X_EEPROM_CMD_CK;
1307         if (eeprom->reg_chip_select)
1308                 reg |= RTL818X_EEPROM_CMD_CS;
1309
1310         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1311         udelay(10);
1312 }
1313
1314 static int __devinit rtl8187_probe(struct usb_interface *intf,
1315                                    const struct usb_device_id *id)
1316 {
1317         struct usb_device *udev = interface_to_usbdev(intf);
1318         struct ieee80211_hw *dev;
1319         struct rtl8187_priv *priv;
1320         struct eeprom_93cx6 eeprom;
1321         struct ieee80211_channel *channel;
1322         const char *chip_name;
1323         u16 txpwr, reg;
1324         int err, i;
1325
1326         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1327         if (!dev) {
1328                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1329                 return -ENOMEM;
1330         }
1331
1332         priv = dev->priv;
1333         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1334
1335         SET_IEEE80211_DEV(dev, &intf->dev);
1336         usb_set_intfdata(intf, dev);
1337         priv->udev = udev;
1338
1339         usb_get_dev(udev);
1340
1341         skb_queue_head_init(&priv->rx_queue);
1342
1343         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1344         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1345
1346         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1347         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1348         priv->map = (struct rtl818x_csr *)0xFF00;
1349
1350         priv->band.band = IEEE80211_BAND_2GHZ;
1351         priv->band.channels = priv->channels;
1352         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1353         priv->band.bitrates = priv->rates;
1354         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1355         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1356
1357
1358         priv->mode = NL80211_IFTYPE_MONITOR;
1359         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1360                      IEEE80211_HW_SIGNAL_DBM |
1361                      IEEE80211_HW_RX_INCLUDES_FCS;
1362
1363         eeprom.data = dev;
1364         eeprom.register_read = rtl8187_eeprom_register_read;
1365         eeprom.register_write = rtl8187_eeprom_register_write;
1366         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1367                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1368         else
1369                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1370
1371         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1372         udelay(10);
1373
1374         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1375                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1376         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1377                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1378                        "generated MAC address\n");
1379                 random_ether_addr(dev->wiphy->perm_addr);
1380         }
1381
1382         channel = priv->channels;
1383         for (i = 0; i < 3; i++) {
1384                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1385                                   &txpwr);
1386                 (*channel++).hw_value = txpwr & 0xFF;
1387                 (*channel++).hw_value = txpwr >> 8;
1388         }
1389         for (i = 0; i < 2; i++) {
1390                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1391                                   &txpwr);
1392                 (*channel++).hw_value = txpwr & 0xFF;
1393                 (*channel++).hw_value = txpwr >> 8;
1394         }
1395
1396         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1397                           &priv->txpwr_base);
1398
1399         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1400         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1401         /* 0 means asic B-cut, we should use SW 3 wire
1402          * bit-by-bit banging for radio. 1 means we can use
1403          * USB specific request to write radio registers */
1404         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1405         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1406         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1407
1408         if (!priv->is_rtl8187b) {
1409                 u32 reg32;
1410                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1411                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1412                 switch (reg32) {
1413                 case RTL818X_TX_CONF_R8187vD_B:
1414                         /* Some RTL8187B devices have a USB ID of 0x8187
1415                          * detect them here */
1416                         chip_name = "RTL8187BvB(early)";
1417                         priv->is_rtl8187b = 1;
1418                         priv->hw_rev = RTL8187BvB;
1419                         break;
1420                 case RTL818X_TX_CONF_R8187vD:
1421                         chip_name = "RTL8187vD";
1422                         break;
1423                 default:
1424                         chip_name = "RTL8187vB (default)";
1425                 }
1426        } else {
1427                 /*
1428                  * Force USB request to write radio registers for 8187B, Realtek
1429                  * only uses it in their sources
1430                  */
1431                 /*if (priv->asic_rev == 0) {
1432                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1433                                "requests to write to radio registers\n");
1434                         priv->asic_rev = 1;
1435                 }*/
1436                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1437                 case RTL818X_R8187B_B:
1438                         chip_name = "RTL8187BvB";
1439                         priv->hw_rev = RTL8187BvB;
1440                         break;
1441                 case RTL818X_R8187B_D:
1442                         chip_name = "RTL8187BvD";
1443                         priv->hw_rev = RTL8187BvD;
1444                         break;
1445                 case RTL818X_R8187B_E:
1446                         chip_name = "RTL8187BvE";
1447                         priv->hw_rev = RTL8187BvE;
1448                         break;
1449                 default:
1450                         chip_name = "RTL8187BvB (default)";
1451                         priv->hw_rev = RTL8187BvB;
1452                 }
1453         }
1454
1455         if (!priv->is_rtl8187b) {
1456                 for (i = 0; i < 2; i++) {
1457                         eeprom_93cx6_read(&eeprom,
1458                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1459                                           &txpwr);
1460                         (*channel++).hw_value = txpwr & 0xFF;
1461                         (*channel++).hw_value = txpwr >> 8;
1462                 }
1463         } else {
1464                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1465                                   &txpwr);
1466                 (*channel++).hw_value = txpwr & 0xFF;
1467
1468                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1469                 (*channel++).hw_value = txpwr & 0xFF;
1470
1471                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1472                 (*channel++).hw_value = txpwr & 0xFF;
1473                 (*channel++).hw_value = txpwr >> 8;
1474         }
1475
1476         /*
1477          * XXX: Once this driver supports anything that requires
1478          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1479          */
1480         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1481
1482         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1483                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1484                        " info!\n");
1485
1486         priv->rf = rtl8187_detect_rf(dev);
1487         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1488                                   sizeof(struct rtl8187_tx_hdr) :
1489                                   sizeof(struct rtl8187b_tx_hdr);
1490         if (!priv->is_rtl8187b)
1491                 dev->queues = 1;
1492         else
1493                 dev->queues = 4;
1494
1495         err = ieee80211_register_hw(dev);
1496         if (err) {
1497                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1498                 goto err_free_dev;
1499         }
1500         mutex_init(&priv->conf_mutex);
1501         skb_queue_head_init(&priv->b_tx_status.queue);
1502
1503         printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1504                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1505                chip_name, priv->asic_rev, priv->rf->name);
1506
1507 #ifdef CONFIG_RTL8187_LEDS
1508         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1509         reg &= 0xFF;
1510         rtl8187_leds_init(dev, reg);
1511 #endif
1512
1513         return 0;
1514
1515  err_free_dev:
1516         ieee80211_free_hw(dev);
1517         usb_set_intfdata(intf, NULL);
1518         usb_put_dev(udev);
1519         return err;
1520 }
1521
1522 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1523 {
1524         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1525         struct rtl8187_priv *priv;
1526
1527         if (!dev)
1528                 return;
1529
1530 #ifdef CONFIG_RTL8187_LEDS
1531         rtl8187_leds_exit(dev);
1532 #endif
1533         ieee80211_unregister_hw(dev);
1534
1535         priv = dev->priv;
1536         usb_reset_device(priv->udev);
1537         usb_put_dev(interface_to_usbdev(intf));
1538         ieee80211_free_hw(dev);
1539 }
1540
1541 static struct usb_driver rtl8187_driver = {
1542         .name           = KBUILD_MODNAME,
1543         .id_table       = rtl8187_table,
1544         .probe          = rtl8187_probe,
1545         .disconnect     = __devexit_p(rtl8187_disconnect),
1546 };
1547
1548 static int __init rtl8187_init(void)
1549 {
1550         return usb_register(&rtl8187_driver);
1551 }
1552
1553 static void __exit rtl8187_exit(void)
1554 {
1555         usb_deregister(&rtl8187_driver);
1556 }
1557
1558 module_init(rtl8187_init);
1559 module_exit(rtl8187_exit);