drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/crc-itu-t.h>
  28 #include <linux/delay.h>
  29 #include <linux/etherdevice.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/usb.h>
  34
  35 #include "rt2x00.h"
  36 #include "rt2x00usb.h"
  37 #include "rt73usb.h"
  38
  39 /*
  40  * Register access.
  41  * All access to the CSR registers will go through the methods
  42  * rt73usb_register_read and rt73usb_register_write.
  43  * BBP and RF register require indirect register access,
  44  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  45  * These indirect registers work with busy bits,
  46  * and we will try maximal REGISTER_BUSY_COUNT times to access
  47  * the register while taking a REGISTER_BUSY_DELAY us delay
  48  * between each attampt. When the busy bit is still set at that time,
  49  * the access attempt is considered to have failed,
  50  * and we will print an error.
  51  * The _lock versions must be used if you already hold the usb_cache_mutex
  52  */
  53 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  54                                          const unsigned int offset, u32 *value)
  55 {
  56         __le32 reg;
  57         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58                                       USB_VENDOR_REQUEST_IN, offset,
  59                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  60         *value = le32_to_cpu(reg);
  61 }
  62
  63 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64                                               const unsigned int offset, u32 *value)
  65 {
  66         __le32 reg;
  67         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68                                        USB_VENDOR_REQUEST_IN, offset,
  69                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  70         *value = le32_to_cpu(reg);
  71 }
  72
  73 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74                                               const unsigned int offset,
  75                                               void *value, const u32 length)
  76 {
  77         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78                                       USB_VENDOR_REQUEST_IN, offset,
  79                                       value, length,
  80                                       REGISTER_TIMEOUT32(length));
  81 }
  82
  83 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  84                                           const unsigned int offset, u32 value)
  85 {
  86         __le32 reg = cpu_to_le32(value);
  87         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88                                       USB_VENDOR_REQUEST_OUT, offset,
  89                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  90 }
  91
  92 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  93                                                const unsigned int offset, u32 value)
  94 {
  95         __le32 reg = cpu_to_le32(value);
  96         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97                                        USB_VENDOR_REQUEST_OUT, offset,
  98                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  99 }
 100
 101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 102                                                const unsigned int offset,
 103                                                void *value, const u32 length)
 104 {
 105         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 106                                       USB_VENDOR_REQUEST_OUT, offset,
 107                                       value, length,
 108                                       REGISTER_TIMEOUT32(length));
 109 }
 110
 111 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 112 {
 113         u32 reg;
 114         unsigned int i;
 115
 116         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 117                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 118                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 119                         break;
 120                 udelay(REGISTER_BUSY_DELAY);
 121         }
 122
 123         return reg;
 124 }
 125
 126 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 127                               const unsigned int word, const u8 value)
 128 {
 129         u32 reg;
 130
 131         mutex_lock(&rt2x00dev->usb_cache_mutex);
 132
 133         /*
 134          * Wait until the BBP becomes ready.
 135          */
 136         reg = rt73usb_bbp_check(rt2x00dev);
 137         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 138                 goto exit_fail;
 139
 140         /*
 141          * Write the data into the BBP.
 142          */
 143         reg = 0;
 144         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 145         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 146         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 147         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 148
 149         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 150         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 151
 152         return;
 153
 154 exit_fail:
 155         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 156
 157         ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 158 }
 159
 160 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 161                              const unsigned int word, u8 *value)
 162 {
 163         u32 reg;
 164
 165         mutex_lock(&rt2x00dev->usb_cache_mutex);
 166
 167         /*
 168          * Wait until the BBP becomes ready.
 169          */
 170         reg = rt73usb_bbp_check(rt2x00dev);
 171         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 172                 goto exit_fail;
 173
 174         /*
 175          * Write the request into the BBP.
 176          */
 177         reg = 0;
 178         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 179         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 180         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 181
 182         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 183
 184         /*
 185          * Wait until the BBP becomes ready.
 186          */
 187         reg = rt73usb_bbp_check(rt2x00dev);
 188         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 189                 goto exit_fail;
 190
 191         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 192         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 193
 194         return;
 195
 196 exit_fail:
 197         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 198
 199         ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 200         *value = 0xff;
 201 }
 202
 203 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 204                              const unsigned int word, const u32 value)
 205 {
 206         u32 reg;
 207         unsigned int i;
 208
 209         if (!word)
 210                 return;
 211
 212         mutex_lock(&rt2x00dev->usb_cache_mutex);
 213
 214         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 215                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 216                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 217                         goto rf_write;
 218                 udelay(REGISTER_BUSY_DELAY);
 219         }
 220
 221         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 222         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 223         return;
 224
 225 rf_write:
 226         reg = 0;
 227         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 228
 229         /*
 230          * RF5225 and RF2527 contain 21 bits per RF register value,
 231          * all others contain 20 bits.
 232          */
 233         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 234                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 235                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 236         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 237         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 238
 239         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 240         rt2x00_rf_write(rt2x00dev, word, value);
 241         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 242 }
 243
 244 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 245 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 246
 247 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 248                              const unsigned int word, u32 *data)
 249 {
 250         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 251 }
 252
 253 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 254                               const unsigned int word, u32 data)
 255 {
 256         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 257 }
 258
 259 static const struct rt2x00debug rt73usb_rt2x00debug = {
 260         .owner  = THIS_MODULE,
 261         .csr    = {
 262                 .read           = rt73usb_read_csr,
 263                 .write          = rt73usb_write_csr,
 264                 .word_size      = sizeof(u32),
 265                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 266         },
 267         .eeprom = {
 268                 .read           = rt2x00_eeprom_read,
 269                 .write          = rt2x00_eeprom_write,
 270                 .word_size      = sizeof(u16),
 271                 .word_count     = EEPROM_SIZE / sizeof(u16),
 272         },
 273         .bbp    = {
 274                 .read           = rt73usb_bbp_read,
 275                 .write          = rt73usb_bbp_write,
 276                 .word_size      = sizeof(u8),
 277                 .word_count     = BBP_SIZE / sizeof(u8),
 278         },
 279         .rf     = {
 280                 .read           = rt2x00_rf_read,
 281                 .write          = rt73usb_rf_write,
 282                 .word_size      = sizeof(u32),
 283                 .word_count     = RF_SIZE / sizeof(u32),
 284         },
 285 };
 286 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 287
 288 #ifdef CONFIG_RT73USB_LEDS
 289 static void rt73usb_brightness_set(struct led_classdev *led_cdev,
 290                                    enum led_brightness brightness)
 291 {
 292         struct rt2x00_led *led =
 293            container_of(led_cdev, struct rt2x00_led, led_dev);
 294         unsigned int enabled = brightness != LED_OFF;
 295         unsigned int a_mode =
 296             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
 297         unsigned int bg_mode =
 298             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
 299
 300         if (led->type == LED_TYPE_RADIO) {
 301                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 302                                    MCU_LEDCS_RADIO_STATUS, enabled);
 303
 304                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 305                                             0, led->rt2x00dev->led_mcu_reg,
 306                                             REGISTER_TIMEOUT);
 307         } else if (led->type == LED_TYPE_ASSOC) {
 308                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 309                                    MCU_LEDCS_LINK_BG_STATUS, bg_mode);
 310                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 311                                    MCU_LEDCS_LINK_A_STATUS, a_mode);
 312
 313                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 314                                             0, led->rt2x00dev->led_mcu_reg,
 315                                             REGISTER_TIMEOUT);
 316         } else if (led->type == LED_TYPE_QUALITY) {
 317                 /*
 318                  * The brightness is divided into 6 levels (0 - 5),
 319                  * this means we need to convert the brightness
 320                  * argument into the matching level within that range.
 321                  */
 322                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 323                                             brightness / (LED_FULL / 6),
 324                                             led->rt2x00dev->led_mcu_reg,
 325                                             REGISTER_TIMEOUT);
 326         }
 327 }
 328
 329 static int rt73usb_blink_set(struct led_classdev *led_cdev,
 330                              unsigned long *delay_on,
 331                              unsigned long *delay_off)
 332 {
 333         struct rt2x00_led *led =
 334             container_of(led_cdev, struct rt2x00_led, led_dev);
 335         u32 reg;
 336
 337         rt73usb_register_read(led->rt2x00dev, MAC_CSR14, &reg);
 338         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, *delay_on);
 339         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, *delay_off);
 340         rt73usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
 341
 342         return 0;
 343 }
 344
 345 static void rt73usb_init_led(struct rt2x00_dev *rt2x00dev,
 346                              struct rt2x00_led *led,
 347                              enum led_type type)
 348 {
 349         led->rt2x00dev = rt2x00dev;
 350         led->type = type;
 351         led->led_dev.brightness_set = rt73usb_brightness_set;
 352         led->led_dev.blink_set = rt73usb_blink_set;
 353         led->flags = LED_INITIALIZED;
 354 }
 355 #endif /* CONFIG_RT73USB_LEDS */
 356
 357 /*
 358  * Configuration handlers.
 359  */
 360 static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
 361                                   const unsigned int filter_flags)
 362 {
 363         u32 reg;
 364
 365         /*
 366          * Start configuration steps.
 367          * Note that the version error will always be dropped
 368          * and broadcast frames will always be accepted since
 369          * there is no filter for it at this time.
 370          */
 371         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 372         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
 373                            !(filter_flags & FIF_FCSFAIL));
 374         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
 375                            !(filter_flags & FIF_PLCPFAIL));
 376         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
 377                            !(filter_flags & FIF_CONTROL));
 378         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
 379                            !(filter_flags & FIF_PROMISC_IN_BSS));
 380         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
 381                            !(filter_flags & FIF_PROMISC_IN_BSS) &&
 382                            !rt2x00dev->intf_ap_count);
 383         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
 384         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
 385                            !(filter_flags & FIF_ALLMULTI));
 386         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
 387         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS,
 388                            !(filter_flags & FIF_CONTROL));
 389         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 390 }
 391
 392 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
 393                                 struct rt2x00_intf *intf,
 394                                 struct rt2x00intf_conf *conf,
 395                                 const unsigned int flags)
 396 {
 397         unsigned int beacon_base;
 398         u32 reg;
 399
 400         if (flags & CONFIG_UPDATE_TYPE) {
 401                 /*
 402                  * Clear current synchronisation setup.
 403                  * For the Beacon base registers we only need to clear
 404                  * the first byte since that byte contains the VALID and OWNER
 405                  * bits which (when set to 0) will invalidate the entire beacon.
 406                  */
 407                 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
 408                 rt73usb_register_write(rt2x00dev, beacon_base, 0);
 409
 410                 /*
 411                  * Enable synchronisation.
 412                  */
 413                 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 414                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 415                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
 416                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 417                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 418         }
 419
 420         if (flags & CONFIG_UPDATE_MAC) {
 421                 reg = le32_to_cpu(conf->mac[1]);
 422                 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 423                 conf->mac[1] = cpu_to_le32(reg);
 424
 425                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
 426                                             conf->mac, sizeof(conf->mac));
 427         }
 428
 429         if (flags & CONFIG_UPDATE_BSSID) {
 430                 reg = le32_to_cpu(conf->bssid[1]);
 431                 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
 432                 conf->bssid[1] = cpu_to_le32(reg);
 433
 434                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
 435                                             conf->bssid, sizeof(conf->bssid));
 436         }
 437 }
 438
 439 static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
 440                                struct rt2x00lib_erp *erp)
 441 {
 442         u32 reg;
 443
 444         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 445         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
 446         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 447
 448         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 449         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 450                            !!erp->short_preamble);
 451         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 452 }
 453
 454 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 455                                    const int basic_rate_mask)
 456 {
 457         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 458 }
 459
 460 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 461                                    struct rf_channel *rf, const int txpower)
 462 {
 463         u8 r3;
 464         u8 r94;
 465         u8 smart;
 466
 467         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 468         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 469
 470         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 471                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 472
 473         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 474         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 475         rt73usb_bbp_write(rt2x00dev, 3, r3);
 476
 477         r94 = 6;
 478         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 479                 r94 += txpower - MAX_TXPOWER;
 480         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 481                 r94 += txpower;
 482         rt73usb_bbp_write(rt2x00dev, 94, r94);
 483
 484         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 485         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 486         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 487         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 488
 489         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 490         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 491         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 492         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 493
 494         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 495         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 496         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 497         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 498
 499         udelay(10);
 500 }
 501
 502 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 503                                    const int txpower)
 504 {
 505         struct rf_channel rf;
 506
 507         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 508         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 509         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 510         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 511
 512         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 513 }
 514
 515 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 516                                       struct antenna_setup *ant)
 517 {
 518         u8 r3;
 519         u8 r4;
 520         u8 r77;
 521         u8 temp;
 522
 523         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 524         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 525         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 526
 527         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 528
 529         /*
 530          * Configure the RX antenna.
 531          */
 532         switch (ant->rx) {
 533         case ANTENNA_HW_DIVERSITY:
 534                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 535                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 536                        && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
 537                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 538                 break;
 539         case ANTENNA_A:
 540                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 541                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 542                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 543                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 544                 else
 545                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 546                 break;
 547         case ANTENNA_B:
 548         default:
 549                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 550                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 551                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 552                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 553                 else
 554                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 555                 break;
 556         }
 557
 558         rt73usb_bbp_write(rt2x00dev, 77, r77);
 559         rt73usb_bbp_write(rt2x00dev, 3, r3);
 560         rt73usb_bbp_write(rt2x00dev, 4, r4);
 561 }
 562
 563 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 564                                       struct antenna_setup *ant)
 565 {
 566         u8 r3;
 567         u8 r4;
 568         u8 r77;
 569
 570         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 571         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 572         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 573
 574         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 575         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 576                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 577
 578         /*
 579          * Configure the RX antenna.
 580          */
 581         switch (ant->rx) {
 582         case ANTENNA_HW_DIVERSITY:
 583                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 584                 break;
 585         case ANTENNA_A:
 586                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 587                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 588                 break;
 589         case ANTENNA_B:
 590         default:
 591                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 592                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 593                 break;
 594         }
 595
 596         rt73usb_bbp_write(rt2x00dev, 77, r77);
 597         rt73usb_bbp_write(rt2x00dev, 3, r3);
 598         rt73usb_bbp_write(rt2x00dev, 4, r4);
 599 }
 600
 601 struct antenna_sel {
 602         u8 word;
 603         /*
 604          * value[0] -> non-LNA
 605          * value[1] -> LNA
 606          */
 607         u8 value[2];
 608 };
 609
 610 static const struct antenna_sel antenna_sel_a[] = {
 611         { 96,  { 0x58, 0x78 } },
 612         { 104, { 0x38, 0x48 } },
 613         { 75,  { 0xfe, 0x80 } },
 614         { 86,  { 0xfe, 0x80 } },
 615         { 88,  { 0xfe, 0x80 } },
 616         { 35,  { 0x60, 0x60 } },
 617         { 97,  { 0x58, 0x58 } },
 618         { 98,  { 0x58, 0x58 } },
 619 };
 620
 621 static const struct antenna_sel antenna_sel_bg[] = {
 622         { 96,  { 0x48, 0x68 } },
 623         { 104, { 0x2c, 0x3c } },
 624         { 75,  { 0xfe, 0x80 } },
 625         { 86,  { 0xfe, 0x80 } },
 626         { 88,  { 0xfe, 0x80 } },
 627         { 35,  { 0x50, 0x50 } },
 628         { 97,  { 0x48, 0x48 } },
 629         { 98,  { 0x48, 0x48 } },
 630 };
 631
 632 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 633                                    struct antenna_setup *ant)
 634 {
 635         const struct antenna_sel *sel;
 636         unsigned int lna;
 637         unsigned int i;
 638         u32 reg;
 639
 640         /*
 641          * We should never come here because rt2x00lib is supposed
 642          * to catch this and send us the correct antenna explicitely.
 643          */
 644         BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
 645                ant->tx == ANTENNA_SW_DIVERSITY);
 646
 647         if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
 648                 sel = antenna_sel_a;
 649                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 650         } else {
 651                 sel = antenna_sel_bg;
 652                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 653         }
 654
 655         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 656                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 657
 658         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 659
 660         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 661                            (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
 662         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 663                            (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
 664
 665         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 666
 667         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 668             rt2x00_rf(&rt2x00dev->chip, RF5225))
 669                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 670         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 671                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 672                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 673 }
 674
 675 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 676                                     struct rt2x00lib_conf *libconf)
 677 {
 678         u32 reg;
 679
 680         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 681         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 682         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 683
 684         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 685         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 686         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 687         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 688         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 689
 690         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 691         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 692         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 693
 694         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 695         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 696         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 697
 698         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 699         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 700                            libconf->conf->beacon_int * 16);
 701         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 702 }
 703
 704 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 705                            struct rt2x00lib_conf *libconf,
 706                            const unsigned int flags)
 707 {
 708         if (flags & CONFIG_UPDATE_PHYMODE)
 709                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 710         if (flags & CONFIG_UPDATE_CHANNEL)
 711                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 712                                        libconf->conf->power_level);
 713         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 714                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 715         if (flags & CONFIG_UPDATE_ANTENNA)
 716                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 717         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 718                 rt73usb_config_duration(rt2x00dev, libconf);
 719 }
 720
 721 /*
 722  * Link tuning
 723  */
 724 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 725                                struct link_qual *qual)
 726 {
 727         u32 reg;
 728
 729         /*
 730          * Update FCS error count from register.
 731          */
 732         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 733         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 734
 735         /*
 736          * Update False CCA count from register.
 737          */
 738         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 739         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 740 }
 741
 742 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 743 {
 744         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 745         rt2x00dev->link.vgc_level = 0x20;
 746 }
 747
 748 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 749 {
 750         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 751         u8 r17;
 752         u8 up_bound;
 753         u8 low_bound;
 754
 755         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 756
 757         /*
 758          * Determine r17 bounds.
 759          */
 760         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
 761                 low_bound = 0x28;
 762                 up_bound = 0x48;
 763
 764                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 765                         low_bound += 0x10;
 766                         up_bound += 0x10;
 767                 }
 768         } else {
 769                 if (rssi > -82) {
 770                         low_bound = 0x1c;
 771                         up_bound = 0x40;
 772                 } else if (rssi > -84) {
 773                         low_bound = 0x1c;
 774                         up_bound = 0x20;
 775                 } else {
 776                         low_bound = 0x1c;
 777                         up_bound = 0x1c;
 778                 }
 779
 780                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 781                         low_bound += 0x14;
 782                         up_bound += 0x10;
 783                 }
 784         }
 785
 786         /*
 787          * If we are not associated, we should go straight to the
 788          * dynamic CCA tuning.
 789          */
 790         if (!rt2x00dev->intf_associated)
 791                 goto dynamic_cca_tune;
 792
 793         /*
 794          * Special big-R17 for very short distance
 795          */
 796         if (rssi > -35) {
 797                 if (r17 != 0x60)
 798                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 799                 return;
 800         }
 801
 802         /*
 803          * Special big-R17 for short distance
 804          */
 805         if (rssi >= -58) {
 806                 if (r17 != up_bound)
 807                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 808                 return;
 809         }
 810
 811         /*
 812          * Special big-R17 for middle-short distance
 813          */
 814         if (rssi >= -66) {
 815                 low_bound += 0x10;
 816                 if (r17 != low_bound)
 817                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 818                 return;
 819         }
 820
 821         /*
 822          * Special mid-R17 for middle distance
 823          */
 824         if (rssi >= -74) {
 825                 if (r17 != (low_bound + 0x10))
 826                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 827                 return;
 828         }
 829
 830         /*
 831          * Special case: Change up_bound based on the rssi.
 832          * Lower up_bound when rssi is weaker then -74 dBm.
 833          */
 834         up_bound -= 2 * (-74 - rssi);
 835         if (low_bound > up_bound)
 836                 up_bound = low_bound;
 837
 838         if (r17 > up_bound) {
 839                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 840                 return;
 841         }
 842
 843 dynamic_cca_tune:
 844
 845         /*
 846          * r17 does not yet exceed upper limit, continue and base
 847          * the r17 tuning on the false CCA count.
 848          */
 849         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 850                 r17 += 4;
 851                 if (r17 > up_bound)
 852                         r17 = up_bound;
 853                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 854         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 855                 r17 -= 4;
 856                 if (r17 < low_bound)
 857                         r17 = low_bound;
 858                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 859         }
 860 }
 861
 862 /*
 863  * Firmware functions
 864  */
 865 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 866 {
 867         return FIRMWARE_RT2571;
 868 }
 869
 870 static u16 rt73usb_get_firmware_crc(void *data, const size_t len)
 871 {
 872         u16 crc;
 873
 874         /*
 875          * Use the crc itu-t algorithm.
 876          * The last 2 bytes in the firmware array are the crc checksum itself,
 877          * this means that we should never pass those 2 bytes to the crc
 878          * algorithm.
 879          */
 880         crc = crc_itu_t(0, data, len - 2);
 881         crc = crc_itu_t_byte(crc, 0);
 882         crc = crc_itu_t_byte(crc, 0);
 883
 884         return crc;
 885 }
 886
 887 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 888                                  const size_t len)
 889 {
 890         unsigned int i;
 891         int status;
 892         u32 reg;
 893         char *ptr = data;
 894         char *cache;
 895         int buflen;
 896
 897         /*
 898          * Wait for stable hardware.
 899          */
 900         for (i = 0; i < 100; i++) {
 901                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 902                 if (reg)
 903                         break;
 904                 msleep(1);
 905         }
 906
 907         if (!reg) {
 908                 ERROR(rt2x00dev, "Unstable hardware.\n");
 909                 return -EBUSY;
 910         }
 911
 912         /*
 913          * Write firmware to device.
 914          * We setup a seperate cache for this action,
 915          * since we are going to write larger chunks of data
 916          * then normally used cache size.
 917          */
 918         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 919         if (!cache) {
 920                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 921                 return -ENOMEM;
 922         }
 923
 924         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 925                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 926
 927                 memcpy(cache, ptr, buflen);
 928
 929                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 930                                          USB_VENDOR_REQUEST_OUT,
 931                                          FIRMWARE_IMAGE_BASE + i, 0,
 932                                          cache, buflen,
 933                                          REGISTER_TIMEOUT32(buflen));
 934
 935                 ptr += buflen;
 936         }
 937
 938         kfree(cache);
 939
 940         /*
 941          * Send firmware request to device to load firmware,
 942          * we need to specify a long timeout time.
 943          */
 944         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 945                                              0, USB_MODE_FIRMWARE,
 946                                              REGISTER_TIMEOUT_FIRMWARE);
 947         if (status < 0) {
 948                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 949                 return status;
 950         }
 951
 952         return 0;
 953 }
 954
 955 /*
 956  * Initialization functions.
 957  */
 958 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 959 {
 960         u32 reg;
 961
 962         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 963         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 964         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 965         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 966         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 967
 968         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 969         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 970         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 971         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 972         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 973         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 974         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 975         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 976         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 977         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 978
 979         /*
 980          * CCK TXD BBP registers
 981          */
 982         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 983         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 984         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 985         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 986         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 987         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 988         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 989         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 990         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 991         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 992
 993         /*
 994          * OFDM TXD BBP registers
 995          */
 996         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 997         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 998         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 999         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
1000         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
1001         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
1002         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
1003         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
1004
1005         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
1006         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
1007         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
1008         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
1009         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
1010         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
1011
1012         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
1013         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
1014         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
1015         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
1016         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
1017         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
1018
1019         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
1020
1021         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
1022         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
1023         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
1024
1025         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1026
1027         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1028                 return -EBUSY;
1029
1030         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1031
1032         /*
1033          * Invalidate all Shared Keys (SEC_CSR0),
1034          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1035          */
1036         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1037         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1038         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1039
1040         reg = 0x000023b0;
1041         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1042             rt2x00_rf(&rt2x00dev->chip, RF2527))
1043                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1044         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1045
1046         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1047         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1048         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1049
1050         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1051         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1052         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1053         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1054
1055         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1056         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1057         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1058         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1059
1060         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1061         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1062         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1063
1064         /*
1065          * Clear all beacons
1066          * For the Beacon base registers we only need to clear
1067          * the first byte since that byte contains the VALID and OWNER
1068          * bits which (when set to 0) will invalidate the entire beacon.
1069          */
1070         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1071         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1072         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1073         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1074
1075         /*
1076          * We must clear the error counters.
1077          * These registers are cleared on read,
1078          * so we may pass a useless variable to store the value.
1079          */
1080         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1081         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1082         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1083
1084         /*
1085          * Reset MAC and BBP registers.
1086          */
1087         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1088         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1089         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1090         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1091
1092         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1093         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1094         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1095         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1096
1097         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1098         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1099         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1100
1101         return 0;
1102 }
1103
1104 static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1105 {
1106         unsigned int i;
1107         u8 value;
1108
1109         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1110                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1111                 if ((value != 0xff) && (value != 0x00))
1112                         return 0;
1113                 udelay(REGISTER_BUSY_DELAY);
1114         }
1115
1116         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1117         return -EACCES;
1118 }
1119
1120 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1121 {
1122         unsigned int i;
1123         u16 eeprom;
1124         u8 reg_id;
1125         u8 value;
1126
1127         if (unlikely(rt73usb_wait_bbp_ready(rt2x00dev)))
1128                 return -EACCES;
1129
1130         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1131         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1132         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1133         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1134         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1135         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1136         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1137         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1138         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1139         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1140         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1141         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1142         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1143         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1144         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1145         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1146         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1147         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1148         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1149         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1150         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1151         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1152         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1153         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1154         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1155
1156         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1157                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1158
1159                 if (eeprom != 0xffff && eeprom != 0x0000) {
1160                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1161                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1162                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1163                 }
1164         }
1165
1166         return 0;
1167 }
1168
1169 /*
1170  * Device state switch handlers.
1171  */
1172 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1173                               enum dev_state state)
1174 {
1175         u32 reg;
1176
1177         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1178         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1179                            (state == STATE_RADIO_RX_OFF) ||
1180                            (state == STATE_RADIO_RX_OFF_LINK));
1181         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1182 }
1183
1184 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1185 {
1186         /*
1187          * Initialize all registers.
1188          */
1189         if (unlikely(rt73usb_init_registers(rt2x00dev) ||
1190                      rt73usb_init_bbp(rt2x00dev)))
1191                 return -EIO;
1192
1193         return 0;
1194 }
1195
1196 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1197 {
1198         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1199
1200         /*
1201          * Disable synchronisation.
1202          */
1203         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1204
1205         rt2x00usb_disable_radio(rt2x00dev);
1206 }
1207
1208 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1209 {
1210         u32 reg;
1211         unsigned int i;
1212         char put_to_sleep;
1213
1214         put_to_sleep = (state != STATE_AWAKE);
1215
1216         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1217         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1218         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1219         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1220
1221         /*
1222          * Device is not guaranteed to be in the requested state yet.
1223          * We must wait until the register indicates that the
1224          * device has entered the correct state.
1225          */
1226         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1227                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1228                 state = rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1229                 if (state == !put_to_sleep)
1230                         return 0;
1231                 msleep(10);
1232         }
1233
1234         return -EBUSY;
1235 }
1236
1237 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1238                                     enum dev_state state)
1239 {
1240         int retval = 0;
1241
1242         switch (state) {
1243         case STATE_RADIO_ON:
1244                 retval = rt73usb_enable_radio(rt2x00dev);
1245                 break;
1246         case STATE_RADIO_OFF:
1247                 rt73usb_disable_radio(rt2x00dev);
1248                 break;
1249         case STATE_RADIO_RX_ON:
1250         case STATE_RADIO_RX_ON_LINK:
1251         case STATE_RADIO_RX_OFF:
1252         case STATE_RADIO_RX_OFF_LINK:
1253                 rt73usb_toggle_rx(rt2x00dev, state);
1254                 break;
1255         case STATE_RADIO_IRQ_ON:
1256         case STATE_RADIO_IRQ_OFF:
1257                 /* No support, but no error either */
1258                 break;
1259         case STATE_DEEP_SLEEP:
1260         case STATE_SLEEP:
1261         case STATE_STANDBY:
1262         case STATE_AWAKE:
1263                 retval = rt73usb_set_state(rt2x00dev, state);
1264                 break;
1265         default:
1266                 retval = -ENOTSUPP;
1267                 break;
1268         }
1269
1270         if (unlikely(retval))
1271                 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1272                       state, retval);
1273
1274         return retval;
1275 }
1276
1277 /*
1278  * TX descriptor initialization
1279  */
1280 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1281                                     struct sk_buff *skb,
1282                                     struct txentry_desc *txdesc)
1283 {
1284         struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1285         __le32 *txd = skbdesc->desc;
1286         u32 word;
1287
1288         /*
1289          * Start writing the descriptor words.
1290          */
1291         rt2x00_desc_read(txd, 1, &word);
1292         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1293         rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1294         rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1295         rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1296         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1297         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1298         rt2x00_desc_write(txd, 1, word);
1299
1300         rt2x00_desc_read(txd, 2, &word);
1301         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1302         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1303         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1304         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1305         rt2x00_desc_write(txd, 2, word);
1306
1307         rt2x00_desc_read(txd, 5, &word);
1308         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1309                            TXPOWER_TO_DEV(rt2x00dev->tx_power));
1310         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1311         rt2x00_desc_write(txd, 5, word);
1312
1313         rt2x00_desc_read(txd, 0, &word);
1314         rt2x00_set_field32(&word, TXD_W0_BURST,
1315                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1316         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1317         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1318                            test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1319         rt2x00_set_field32(&word, TXD_W0_ACK,
1320                            test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1321         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1322                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1323         rt2x00_set_field32(&word, TXD_W0_OFDM,
1324                            test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1325         rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1326         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1327                            test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags));
1328         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1329         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT,
1330                            skb->len - skbdesc->desc_len);
1331         rt2x00_set_field32(&word, TXD_W0_BURST2,
1332                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1333         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1334         rt2x00_desc_write(txd, 0, word);
1335 }
1336
1337 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1338                                    struct sk_buff *skb)
1339 {
1340         int length;
1341
1342         /*
1343          * The length _must_ be a multiple of 4,
1344          * but it must _not_ be a multiple of the USB packet size.
1345          */
1346         length = roundup(skb->len, 4);
1347         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1348
1349         return length;
1350 }
1351
1352 /*
1353  * TX data initialization
1354  */
1355 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1356                                   const enum data_queue_qid queue)
1357 {
1358         u32 reg;
1359
1360         if (queue != QID_BEACON) {
1361                 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
1362                 return;
1363         }
1364
1365         /*
1366          * For Wi-Fi faily generated beacons between participating stations.
1367          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1368          */
1369         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1370
1371         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1372         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1373                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1374                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1375                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1376                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1377         }
1378 }
1379
1380 /*
1381  * RX control handlers
1382  */
1383 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1384 {
1385         u16 eeprom;
1386         u8 offset;
1387         u8 lna;
1388
1389         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1390         switch (lna) {
1391         case 3:
1392                 offset = 90;
1393                 break;
1394         case 2:
1395                 offset = 74;
1396                 break;
1397         case 1:
1398                 offset = 64;
1399                 break;
1400         default:
1401                 return 0;
1402         }
1403
1404         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1405                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1406                         if (lna == 3 || lna == 2)
1407                                 offset += 10;
1408                 } else {
1409                         if (lna == 3)
1410                                 offset += 6;
1411                         else if (lna == 2)
1412                                 offset += 8;
1413                 }
1414
1415                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1416                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1417         } else {
1418                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1419                         offset += 14;
1420
1421                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1422                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1423         }
1424
1425         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1426 }
1427
1428 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1429                                 struct rxdone_entry_desc *rxdesc)
1430 {
1431         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1432         __le32 *rxd = (__le32 *)entry->skb->data;
1433         u32 word0;
1434         u32 word1;
1435
1436         /*
1437          * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1438          * frame data in rt2x00usb.
1439          */
1440         memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1441         rxd = (__le32 *)skbdesc->desc;
1442
1443         /*
1444          * It is now safe to read the descriptor on all architectures.
1445          */
1446         rt2x00_desc_read(rxd, 0, &word0);
1447         rt2x00_desc_read(rxd, 1, &word1);
1448
1449         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1450                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1451
1452         /*
1453          * Obtain the status about this packet.
1454          * When frame was received with an OFDM bitrate,
1455          * the signal is the PLCP value. If it was received with
1456          * a CCK bitrate the signal is the rate in 100kbit/s.
1457          */
1458         rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1459         rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1460         rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1461
1462         if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1463                 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1464         if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1465                 rxdesc->dev_flags |= RXDONE_MY_BSS;
1466
1467         /*
1468          * Set skb pointers, and update frame information.
1469          */
1470         skb_pull(entry->skb, entry->queue->desc_size);
1471         skb_trim(entry->skb, rxdesc->size);
1472 }
1473
1474 /*
1475  * Device probe functions.
1476  */
1477 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1478 {
1479         u16 word;
1480         u8 *mac;
1481         s8 value;
1482
1483         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1484
1485         /*
1486          * Start validation of the data that has been read.
1487          */
1488         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1489         if (!is_valid_ether_addr(mac)) {
1490                 DECLARE_MAC_BUF(macbuf);
1491
1492                 random_ether_addr(mac);
1493                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1494         }
1495
1496         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1497         if (word == 0xffff) {
1498                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1499                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1500                                    ANTENNA_B);
1501                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1502                                    ANTENNA_B);
1503                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1504                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1505                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1506                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1507                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1508                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1509         }
1510
1511         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1512         if (word == 0xffff) {
1513                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1514                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1515                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1516         }
1517
1518         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1519         if (word == 0xffff) {
1520                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1521                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1522                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1523                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1524                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1525                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1526                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1527                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1528                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1529                                    LED_MODE_DEFAULT);
1530                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1531                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1532         }
1533
1534         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1535         if (word == 0xffff) {
1536                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1537                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1538                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1539                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1540         }
1541
1542         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1543         if (word == 0xffff) {
1544                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1545                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1546                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1547                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1548         } else {
1549                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1550                 if (value < -10 || value > 10)
1551                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1552                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1553                 if (value < -10 || value > 10)
1554                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1555                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1556         }
1557
1558         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1559         if (word == 0xffff) {
1560                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1561                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1562                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1563                 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1564         } else {
1565                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1566                 if (value < -10 || value > 10)
1567                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1568                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1569                 if (value < -10 || value > 10)
1570                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1571                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1572         }
1573
1574         return 0;
1575 }
1576
1577 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1578 {
1579         u32 reg;
1580         u16 value;
1581         u16 eeprom;
1582
1583         /*
1584          * Read EEPROM word for configuration.
1585          */
1586         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1587
1588         /*
1589          * Identify RF chipset.
1590          */
1591         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1592         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1593         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1594
1595         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1596                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1597                 return -ENODEV;
1598         }
1599
1600         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1601             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1602             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1603             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1604                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1605                 return -ENODEV;
1606         }
1607
1608         /*
1609          * Identify default antenna configuration.
1610          */
1611         rt2x00dev->default_ant.tx =
1612             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1613         rt2x00dev->default_ant.rx =
1614             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1615
1616         /*
1617          * Read the Frame type.
1618          */
1619         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1620                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1621
1622         /*
1623          * Read frequency offset.
1624          */
1625         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1626         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1627
1628         /*
1629          * Read external LNA informations.
1630          */
1631         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1632
1633         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1634                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1635                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1636         }
1637
1638         /*
1639          * Store led settings, for correct led behaviour.
1640          */
1641 #ifdef CONFIG_RT73USB_LEDS
1642         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1643
1644         rt73usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1645         rt73usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
1646         if (value == LED_MODE_SIGNAL_STRENGTH)
1647                 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1648                                  LED_TYPE_QUALITY);
1649
1650         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1651         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1652                            rt2x00_get_field16(eeprom,
1653                                               EEPROM_LED_POLARITY_GPIO_0));
1654         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1655                            rt2x00_get_field16(eeprom,
1656                                               EEPROM_LED_POLARITY_GPIO_1));
1657         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1658                            rt2x00_get_field16(eeprom,
1659                                               EEPROM_LED_POLARITY_GPIO_2));
1660         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1661                            rt2x00_get_field16(eeprom,
1662                                               EEPROM_LED_POLARITY_GPIO_3));
1663         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1664                            rt2x00_get_field16(eeprom,
1665                                               EEPROM_LED_POLARITY_GPIO_4));
1666         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1667                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1668         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1669                            rt2x00_get_field16(eeprom,
1670                                               EEPROM_LED_POLARITY_RDY_G));
1671         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1672                            rt2x00_get_field16(eeprom,
1673                                               EEPROM_LED_POLARITY_RDY_A));
1674 #endif /* CONFIG_RT73USB_LEDS */
1675
1676         return 0;
1677 }
1678
1679 /*
1680  * RF value list for RF2528
1681  * Supports: 2.4 GHz
1682  */
1683 static const struct rf_channel rf_vals_bg_2528[] = {
1684         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1685         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1686         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1687         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1688         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1689         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1690         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1691         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1692         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1693         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1694         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1695         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1696         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1697         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1698 };
1699
1700 /*
1701  * RF value list for RF5226
1702  * Supports: 2.4 GHz & 5.2 GHz
1703  */
1704 static const struct rf_channel rf_vals_5226[] = {
1705         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1706         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1707         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1708         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1709         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1710         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1711         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1712         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1713         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1714         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1715         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1716         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1717         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1718         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1719
1720         /* 802.11 UNI / HyperLan 2 */
1721         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1722         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1723         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1724         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1725         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1726         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1727         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1728         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1729
1730         /* 802.11 HyperLan 2 */
1731         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1732         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1733         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1734         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1735         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1736         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1737         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1738         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1739         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1740         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1741
1742         /* 802.11 UNII */
1743         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1744         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1745         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1746         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1747         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1748         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1749
1750         /* MMAC(Japan)J52 ch 34,38,42,46 */
1751         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1752         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1753         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1754         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1755 };
1756
1757 /*
1758  * RF value list for RF5225 & RF2527
1759  * Supports: 2.4 GHz & 5.2 GHz
1760  */
1761 static const struct rf_channel rf_vals_5225_2527[] = {
1762         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1763         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1764         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1765         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1766         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1767         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1768         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1769         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1770         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1771         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1772         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1773         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1774         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1775         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1776
1777         /* 802.11 UNI / HyperLan 2 */
1778         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1779         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1780         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1781         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1782         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1783         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1784         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1785         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1786
1787         /* 802.11 HyperLan 2 */
1788         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1789         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1790         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1791         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1792         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1793         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1794         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1795         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1796         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1797         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1798
1799         /* 802.11 UNII */
1800         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1801         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1802         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1803         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1804         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1805         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1806
1807         /* MMAC(Japan)J52 ch 34,38,42,46 */
1808         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1809         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1810         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1811         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1812 };
1813
1814
1815 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1816 {
1817         struct hw_mode_spec *spec = &rt2x00dev->spec;
1818         u8 *txpower;
1819         unsigned int i;
1820
1821         /*
1822          * Initialize all hw fields.
1823          */
1824         rt2x00dev->hw->flags =
1825             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1826             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1827             IEEE80211_HW_SIGNAL_DBM;
1828         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1829
1830         SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1831         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1832                                 rt2x00_eeprom_addr(rt2x00dev,
1833                                                    EEPROM_MAC_ADDR_0));
1834
1835         /*
1836          * Convert tx_power array in eeprom.
1837          */
1838         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1839         for (i = 0; i < 14; i++)
1840                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1841
1842         /*
1843          * Initialize hw_mode information.
1844          */
1845         spec->supported_bands = SUPPORT_BAND_2GHZ;
1846         spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1847         spec->tx_power_a = NULL;
1848         spec->tx_power_bg = txpower;
1849         spec->tx_power_default = DEFAULT_TXPOWER;
1850
1851         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1852                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1853                 spec->channels = rf_vals_bg_2528;
1854         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1855                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1856                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1857                 spec->channels = rf_vals_5226;
1858         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1859                 spec->num_channels = 14;
1860                 spec->channels = rf_vals_5225_2527;
1861         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1862                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1863                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1864                 spec->channels = rf_vals_5225_2527;
1865         }
1866
1867         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1868             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1869                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1870                 for (i = 0; i < 14; i++)
1871                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1872
1873                 spec->tx_power_a = txpower;
1874         }
1875 }
1876
1877 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1878 {
1879         int retval;
1880
1881         /*
1882          * Allocate eeprom data.
1883          */
1884         retval = rt73usb_validate_eeprom(rt2x00dev);
1885         if (retval)
1886                 return retval;
1887
1888         retval = rt73usb_init_eeprom(rt2x00dev);
1889         if (retval)
1890                 return retval;
1891
1892         /*
1893          * Initialize hw specifications.
1894          */
1895         rt73usb_probe_hw_mode(rt2x00dev);
1896
1897         /*
1898          * This device requires firmware.
1899          */
1900         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1901         __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1902
1903         /*
1904          * Set the rssi offset.
1905          */
1906         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1907
1908         return 0;
1909 }
1910
1911 /*
1912  * IEEE80211 stack callback functions.
1913  */
1914 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1915                                    u32 short_retry, u32 long_retry)
1916 {
1917         struct rt2x00_dev *rt2x00dev = hw->priv;
1918         u32 reg;
1919
1920         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1921         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1922         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1923         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1924
1925         return 0;
1926 }
1927
1928 #if 0
1929 /*
1930  * Mac80211 demands get_tsf must be atomic.
1931  * This is not possible for rt73usb since all register access
1932  * functions require sleeping. Untill mac80211 no longer needs
1933  * get_tsf to be atomic, this function should be disabled.
1934  */
1935 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1936 {
1937         struct rt2x00_dev *rt2x00dev = hw->priv;
1938         u64 tsf;
1939         u32 reg;
1940
1941         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1942         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1943         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1944         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1945
1946         return tsf;
1947 }
1948 #else
1949 #define rt73usb_get_tsf NULL
1950 #endif
1951
1952 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1953 {
1954         struct rt2x00_dev *rt2x00dev = hw->priv;
1955         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1956         struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
1957         struct skb_frame_desc *skbdesc;
1958         struct txentry_desc txdesc;
1959         unsigned int beacon_base;
1960         u32 reg;
1961
1962         if (unlikely(!intf->beacon))
1963                 return -ENOBUFS;
1964
1965         /*
1966          * Copy all TX descriptor information into txdesc,
1967          * after that we are free to use the skb->cb array
1968          * for our information.
1969          */
1970         intf->beacon->skb = skb;
1971         rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
1972
1973         /*
1974          * Add the descriptor in front of the skb.
1975          */
1976         skb_push(skb, intf->beacon->queue->desc_size);
1977         memset(skb->data, 0, intf->beacon->queue->desc_size);
1978
1979         /*
1980          * Fill in skb descriptor
1981          */
1982         skbdesc = get_skb_frame_desc(skb);
1983         memset(skbdesc, 0, sizeof(*skbdesc));
1984         skbdesc->desc = skb->data;
1985         skbdesc->desc_len = intf->beacon->queue->desc_size;
1986         skbdesc->entry = intf->beacon;
1987
1988         /*
1989          * Disable beaconing while we are reloading the beacon data,
1990          * otherwise we might be sending out invalid data.
1991          */
1992         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1993         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1994         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
1995         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
1996         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1997
1998         /*
1999          * Write entire beacon with descriptor to register,
2000          * and kick the beacon generator.
2001          */
2002         rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
2003         beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
2004         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2005                                  USB_VENDOR_REQUEST_OUT, beacon_base, 0,
2006                                  skb->data, skb->len,
2007                                  REGISTER_TIMEOUT32(skb->len));
2008         rt73usb_kick_tx_queue(rt2x00dev, QID_BEACON);
2009
2010         /*
2011          * Clean up the beacon skb.
2012          */
2013         dev_kfree_skb(skb);
2014         intf->beacon->skb = NULL;
2015
2016         return 0;
2017 }
2018
2019 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2020         .tx                     = rt2x00mac_tx,
2021         .start                  = rt2x00mac_start,
2022         .stop                   = rt2x00mac_stop,
2023         .add_interface          = rt2x00mac_add_interface,
2024         .remove_interface       = rt2x00mac_remove_interface,
2025         .config                 = rt2x00mac_config,
2026         .config_interface       = rt2x00mac_config_interface,
2027         .configure_filter       = rt2x00mac_configure_filter,
2028         .get_stats              = rt2x00mac_get_stats,
2029         .set_retry_limit        = rt73usb_set_retry_limit,
2030         .bss_info_changed       = rt2x00mac_bss_info_changed,
2031         .conf_tx                = rt2x00mac_conf_tx,
2032         .get_tx_stats           = rt2x00mac_get_tx_stats,
2033         .get_tsf                = rt73usb_get_tsf,
2034         .beacon_update          = rt73usb_beacon_update,
2035 };
2036
2037 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2038         .probe_hw               = rt73usb_probe_hw,
2039         .get_firmware_name      = rt73usb_get_firmware_name,
2040         .get_firmware_crc       = rt73usb_get_firmware_crc,
2041         .load_firmware          = rt73usb_load_firmware,
2042         .initialize             = rt2x00usb_initialize,
2043         .uninitialize           = rt2x00usb_uninitialize,
2044         .init_rxentry           = rt2x00usb_init_rxentry,
2045         .init_txentry           = rt2x00usb_init_txentry,
2046         .set_device_state       = rt73usb_set_device_state,
2047         .link_stats             = rt73usb_link_stats,
2048         .reset_tuner            = rt73usb_reset_tuner,
2049         .link_tuner             = rt73usb_link_tuner,
2050         .write_tx_desc          = rt73usb_write_tx_desc,
2051         .write_tx_data          = rt2x00usb_write_tx_data,
2052         .get_tx_data_len        = rt73usb_get_tx_data_len,
2053         .kick_tx_queue          = rt73usb_kick_tx_queue,
2054         .fill_rxdone            = rt73usb_fill_rxdone,
2055         .config_filter          = rt73usb_config_filter,
2056         .config_intf            = rt73usb_config_intf,
2057         .config_erp             = rt73usb_config_erp,
2058         .config                 = rt73usb_config,
2059 };
2060
2061 static const struct data_queue_desc rt73usb_queue_rx = {
2062         .entry_num              = RX_ENTRIES,
2063         .data_size              = DATA_FRAME_SIZE,
2064         .desc_size              = RXD_DESC_SIZE,
2065         .priv_size              = sizeof(struct queue_entry_priv_usb),
2066 };
2067
2068 static const struct data_queue_desc rt73usb_queue_tx = {
2069         .entry_num              = TX_ENTRIES,
2070         .data_size              = DATA_FRAME_SIZE,
2071         .desc_size              = TXD_DESC_SIZE,
2072         .priv_size              = sizeof(struct queue_entry_priv_usb),
2073 };
2074
2075 static const struct data_queue_desc rt73usb_queue_bcn = {
2076         .entry_num              = 4 * BEACON_ENTRIES,
2077         .data_size              = MGMT_FRAME_SIZE,
2078         .desc_size              = TXINFO_SIZE,
2079         .priv_size              = sizeof(struct queue_entry_priv_usb),
2080 };
2081
2082 static const struct rt2x00_ops rt73usb_ops = {
2083         .name           = KBUILD_MODNAME,
2084         .max_sta_intf   = 1,
2085         .max_ap_intf    = 4,
2086         .eeprom_size    = EEPROM_SIZE,
2087         .rf_size        = RF_SIZE,
2088         .tx_queues      = NUM_TX_QUEUES,
2089         .rx             = &rt73usb_queue_rx,
2090         .tx             = &rt73usb_queue_tx,
2091         .bcn            = &rt73usb_queue_bcn,
2092         .lib            = &rt73usb_rt2x00_ops,
2093         .hw             = &rt73usb_mac80211_ops,
2094 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2095         .debugfs        = &rt73usb_rt2x00debug,
2096 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2097 };
2098
2099 /*
2100  * rt73usb module information.
2101  */
2102 static struct usb_device_id rt73usb_device_table[] = {
2103         /* AboCom */
2104         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2105         /* Askey */
2106         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2107         /* ASUS */
2108         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2109         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2110         /* Belkin */
2111         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2112         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2113         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2115         /* Billionton */
2116         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2117         /* Buffalo */
2118         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2119         /* CNet */
2120         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2121         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2122         /* Conceptronic */
2123         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2124         /* Corega */
2125         { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
2126         /* D-Link */
2127         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2128         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2129         { USB_DEVICE(0x07d1, 0x3c06), USB_DEVICE_DATA(&rt73usb_ops) },
2130         { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
2131         /* Gemtek */
2132         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2133         /* Gigabyte */
2134         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2135         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2136         /* Huawei-3Com */
2137         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2138         /* Hercules */
2139         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2140         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2141         /* Linksys */
2142         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2143         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2144         /* MSI */
2145         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2146         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2147         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2148         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2149         /* Ralink */
2150         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2151         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2152         /* Qcom */
2153         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2154         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2155         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2156         /* Senao */
2157         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2158         /* Sitecom */
2159         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2160         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2161         /* Surecom */
2162         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2163         /* Planex */
2164         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2165         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2166         { 0, }
2167 };
2168
2169 MODULE_AUTHOR(DRV_PROJECT);
2170 MODULE_VERSION(DRV_VERSION);
2171 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2172 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2173 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2174 MODULE_FIRMWARE(FIRMWARE_RT2571);
2175 MODULE_LICENSE("GPL");
2176
2177 static struct usb_driver rt73usb_driver = {
2178         .name           = KBUILD_MODNAME,
2179         .id_table       = rt73usb_device_table,
2180         .probe          = rt2x00usb_probe,
2181         .disconnect     = rt2x00usb_disconnect,
2182         .suspend        = rt2x00usb_suspend,
2183         .resume         = rt2x00usb_resume,
2184 };
2185
2186 static int __init rt73usb_init(void)
2187 {
2188         return usb_register(&rt73usb_driver);
2189 }
2190
2191 static void __exit rt73usb_exit(void)
2192 {
2193         usb_deregister(&rt73usb_driver);
2194 }
2195
2196 module_init(rt73usb_init);
2197 module_exit(rt73usb_exit);