drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/crc-itu-t.h>
  28 #include <linux/delay.h>
  29 #include <linux/etherdevice.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/usb.h>
  34
  35 #include "rt2x00.h"
  36 #include "rt2x00usb.h"
  37 #include "rt73usb.h"
  38
  39 /*
  40  * Register access.
  41  * All access to the CSR registers will go through the methods
  42  * rt73usb_register_read and rt73usb_register_write.
  43  * BBP and RF register require indirect register access,
  44  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  45  * These indirect registers work with busy bits,
  46  * and we will try maximal REGISTER_BUSY_COUNT times to access
  47  * the register while taking a REGISTER_BUSY_DELAY us delay
  48  * between each attampt. When the busy bit is still set at that time,
  49  * the access attempt is considered to have failed,
  50  * and we will print an error.
  51  * The _lock versions must be used if you already hold the usb_cache_mutex
  52  */
  53 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  54                                          const unsigned int offset, u32 *value)
  55 {
  56         __le32 reg;
  57         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58                                       USB_VENDOR_REQUEST_IN, offset,
  59                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  60         *value = le32_to_cpu(reg);
  61 }
  62
  63 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64                                               const unsigned int offset, u32 *value)
  65 {
  66         __le32 reg;
  67         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68                                        USB_VENDOR_REQUEST_IN, offset,
  69                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  70         *value = le32_to_cpu(reg);
  71 }
  72
  73 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74                                               const unsigned int offset,
  75                                               void *value, const u32 length)
  76 {
  77         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  78         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  79                                       USB_VENDOR_REQUEST_IN, offset,
  80                                       value, length, timeout);
  81 }
  82
  83 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  84                                           const unsigned int offset, u32 value)
  85 {
  86         __le32 reg = cpu_to_le32(value);
  87         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88                                       USB_VENDOR_REQUEST_OUT, offset,
  89                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  90 }
  91
  92 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  93                                                const unsigned int offset, u32 value)
  94 {
  95         __le32 reg = cpu_to_le32(value);
  96         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97                                        USB_VENDOR_REQUEST_OUT, offset,
  98                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  99 }
 100
 101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 102                                                const unsigned int offset,
 103                                                void *value, const u32 length)
 104 {
 105         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
 106         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 107                                       USB_VENDOR_REQUEST_OUT, offset,
 108                                       value, length, timeout);
 109 }
 110
 111 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 112 {
 113         u32 reg;
 114         unsigned int i;
 115
 116         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 117                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 118                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 119                         break;
 120                 udelay(REGISTER_BUSY_DELAY);
 121         }
 122
 123         return reg;
 124 }
 125
 126 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 127                               const unsigned int word, const u8 value)
 128 {
 129         u32 reg;
 130
 131         mutex_lock(&rt2x00dev->usb_cache_mutex);
 132
 133         /*
 134          * Wait until the BBP becomes ready.
 135          */
 136         reg = rt73usb_bbp_check(rt2x00dev);
 137         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 138                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 139                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 140                 return;
 141         }
 142
 143         /*
 144          * Write the data into the BBP.
 145          */
 146         reg = 0;
 147         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 148         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 149         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 150         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 151
 152         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 153         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 154 }
 155
 156 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 157                              const unsigned int word, u8 *value)
 158 {
 159         u32 reg;
 160
 161         mutex_lock(&rt2x00dev->usb_cache_mutex);
 162
 163         /*
 164          * Wait until the BBP becomes ready.
 165          */
 166         reg = rt73usb_bbp_check(rt2x00dev);
 167         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 168                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 169                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 170                 return;
 171         }
 172
 173         /*
 174          * Write the request into the BBP.
 175          */
 176         reg = 0;
 177         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 178         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 179         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 180
 181         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 182
 183         /*
 184          * Wait until the BBP becomes ready.
 185          */
 186         reg = rt73usb_bbp_check(rt2x00dev);
 187         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 188                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 189                 *value = 0xff;
 190                 return;
 191         }
 192
 193         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 194         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 195 }
 196
 197 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 198                              const unsigned int word, const u32 value)
 199 {
 200         u32 reg;
 201         unsigned int i;
 202
 203         if (!word)
 204                 return;
 205
 206         mutex_lock(&rt2x00dev->usb_cache_mutex);
 207
 208         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 209                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 210                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 211                         goto rf_write;
 212                 udelay(REGISTER_BUSY_DELAY);
 213         }
 214
 215         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 216         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 217         return;
 218
 219 rf_write:
 220         reg = 0;
 221         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 222
 223         /*
 224          * RF5225 and RF2527 contain 21 bits per RF register value,
 225          * all others contain 20 bits.
 226          */
 227         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 228                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 229                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 230         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 231         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 232
 233         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 234         rt2x00_rf_write(rt2x00dev, word, value);
 235         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 236 }
 237
 238 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 239 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 240
 241 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 242                              const unsigned int word, u32 *data)
 243 {
 244         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 245 }
 246
 247 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 248                               const unsigned int word, u32 data)
 249 {
 250         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 251 }
 252
 253 static const struct rt2x00debug rt73usb_rt2x00debug = {
 254         .owner  = THIS_MODULE,
 255         .csr    = {
 256                 .read           = rt73usb_read_csr,
 257                 .write          = rt73usb_write_csr,
 258                 .word_size      = sizeof(u32),
 259                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 260         },
 261         .eeprom = {
 262                 .read           = rt2x00_eeprom_read,
 263                 .write          = rt2x00_eeprom_write,
 264                 .word_size      = sizeof(u16),
 265                 .word_count     = EEPROM_SIZE / sizeof(u16),
 266         },
 267         .bbp    = {
 268                 .read           = rt73usb_bbp_read,
 269                 .write          = rt73usb_bbp_write,
 270                 .word_size      = sizeof(u8),
 271                 .word_count     = BBP_SIZE / sizeof(u8),
 272         },
 273         .rf     = {
 274                 .read           = rt2x00_rf_read,
 275                 .write          = rt73usb_rf_write,
 276                 .word_size      = sizeof(u32),
 277                 .word_count     = RF_SIZE / sizeof(u32),
 278         },
 279 };
 280 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 281
 282 #ifdef CONFIG_RT73USB_LEDS
 283 static void rt73usb_brightness_set(struct led_classdev *led_cdev,
 284                                    enum led_brightness brightness)
 285 {
 286         struct rt2x00_led *led =
 287            container_of(led_cdev, struct rt2x00_led, led_dev);
 288         unsigned int enabled = brightness != LED_OFF;
 289         unsigned int a_mode =
 290             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
 291         unsigned int bg_mode =
 292             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
 293
 294         if (led->type == LED_TYPE_RADIO) {
 295                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 296                                    MCU_LEDCS_RADIO_STATUS, enabled);
 297
 298                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 299                                             0, led->rt2x00dev->led_mcu_reg,
 300                                             REGISTER_TIMEOUT);
 301         } else if (led->type == LED_TYPE_ASSOC) {
 302                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 303                                    MCU_LEDCS_LINK_BG_STATUS, bg_mode);
 304                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 305                                    MCU_LEDCS_LINK_A_STATUS, a_mode);
 306
 307                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 308                                             0, led->rt2x00dev->led_mcu_reg,
 309                                             REGISTER_TIMEOUT);
 310         } else if (led->type == LED_TYPE_QUALITY) {
 311                 /*
 312                  * The brightness is divided into 6 levels (0 - 5),
 313                  * this means we need to convert the brightness
 314                  * argument into the matching level within that range.
 315                  */
 316                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 317                                             brightness / (LED_FULL / 6),
 318                                             led->rt2x00dev->led_mcu_reg,
 319                                             REGISTER_TIMEOUT);
 320         }
 321 }
 322
 323 static int rt73usb_blink_set(struct led_classdev *led_cdev,
 324                              unsigned long *delay_on,
 325                              unsigned long *delay_off)
 326 {
 327         struct rt2x00_led *led =
 328             container_of(led_cdev, struct rt2x00_led, led_dev);
 329         u32 reg;
 330
 331         rt73usb_register_read(led->rt2x00dev, MAC_CSR14, &reg);
 332         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, *delay_on);
 333         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, *delay_off);
 334         rt73usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
 335
 336         return 0;
 337 }
 338 #endif /* CONFIG_RT73USB_LEDS */
 339
 340 /*
 341  * Configuration handlers.
 342  */
 343 static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
 344                                   const unsigned int filter_flags)
 345 {
 346         u32 reg;
 347
 348         /*
 349          * Start configuration steps.
 350          * Note that the version error will always be dropped
 351          * and broadcast frames will always be accepted since
 352          * there is no filter for it at this time.
 353          */
 354         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 355         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
 356                            !(filter_flags & FIF_FCSFAIL));
 357         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
 358                            !(filter_flags & FIF_PLCPFAIL));
 359         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
 360                            !(filter_flags & FIF_CONTROL));
 361         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
 362                            !(filter_flags & FIF_PROMISC_IN_BSS));
 363         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
 364                            !(filter_flags & FIF_PROMISC_IN_BSS) &&
 365                            !rt2x00dev->intf_ap_count);
 366         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
 367         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
 368                            !(filter_flags & FIF_ALLMULTI));
 369         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
 370         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS,
 371                            !(filter_flags & FIF_CONTROL));
 372         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 373 }
 374
 375 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
 376                                 struct rt2x00_intf *intf,
 377                                 struct rt2x00intf_conf *conf,
 378                                 const unsigned int flags)
 379 {
 380         unsigned int beacon_base;
 381         u32 reg;
 382
 383         if (flags & CONFIG_UPDATE_TYPE) {
 384                 /*
 385                  * Clear current synchronisation setup.
 386                  * For the Beacon base registers we only need to clear
 387                  * the first byte since that byte contains the VALID and OWNER
 388                  * bits which (when set to 0) will invalidate the entire beacon.
 389                  */
 390                 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
 391                 rt73usb_register_write(rt2x00dev, beacon_base, 0);
 392
 393                 /*
 394                  * Enable synchronisation.
 395                  */
 396                 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 397                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 398                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
 399                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 400                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 401         }
 402
 403         if (flags & CONFIG_UPDATE_MAC) {
 404                 reg = le32_to_cpu(conf->mac[1]);
 405                 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 406                 conf->mac[1] = cpu_to_le32(reg);
 407
 408                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
 409                                             conf->mac, sizeof(conf->mac));
 410         }
 411
 412         if (flags & CONFIG_UPDATE_BSSID) {
 413                 reg = le32_to_cpu(conf->bssid[1]);
 414                 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
 415                 conf->bssid[1] = cpu_to_le32(reg);
 416
 417                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
 418                                             conf->bssid, sizeof(conf->bssid));
 419         }
 420 }
 421
 422 static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
 423                                struct rt2x00lib_erp *erp)
 424 {
 425         u32 reg;
 426
 427         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 428         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
 429         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 430
 431         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 432         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 433                            !!erp->short_preamble);
 434         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 435 }
 436
 437 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 438                                    const int basic_rate_mask)
 439 {
 440         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 441 }
 442
 443 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 444                                    struct rf_channel *rf, const int txpower)
 445 {
 446         u8 r3;
 447         u8 r94;
 448         u8 smart;
 449
 450         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 451         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 452
 453         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 454                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 455
 456         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 457         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 458         rt73usb_bbp_write(rt2x00dev, 3, r3);
 459
 460         r94 = 6;
 461         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 462                 r94 += txpower - MAX_TXPOWER;
 463         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 464                 r94 += txpower;
 465         rt73usb_bbp_write(rt2x00dev, 94, r94);
 466
 467         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 468         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 469         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 470         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 471
 472         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 473         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 474         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 475         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 476
 477         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 478         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 479         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 480         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 481
 482         udelay(10);
 483 }
 484
 485 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 486                                    const int txpower)
 487 {
 488         struct rf_channel rf;
 489
 490         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 491         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 492         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 493         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 494
 495         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 496 }
 497
 498 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 499                                       struct antenna_setup *ant)
 500 {
 501         u8 r3;
 502         u8 r4;
 503         u8 r77;
 504         u8 temp;
 505
 506         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 507         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 508         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 509
 510         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 511
 512         /*
 513          * Configure the RX antenna.
 514          */
 515         switch (ant->rx) {
 516         case ANTENNA_HW_DIVERSITY:
 517                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 518                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 519                        && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
 520                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 521                 break;
 522         case ANTENNA_A:
 523                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 524                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 525                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 526                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 527                 else
 528                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 529                 break;
 530         case ANTENNA_B:
 531         default:
 532                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 533                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 534                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 535                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 536                 else
 537                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 538                 break;
 539         }
 540
 541         rt73usb_bbp_write(rt2x00dev, 77, r77);
 542         rt73usb_bbp_write(rt2x00dev, 3, r3);
 543         rt73usb_bbp_write(rt2x00dev, 4, r4);
 544 }
 545
 546 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 547                                       struct antenna_setup *ant)
 548 {
 549         u8 r3;
 550         u8 r4;
 551         u8 r77;
 552
 553         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 554         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 555         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 556
 557         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 558         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 559                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 560
 561         /*
 562          * Configure the RX antenna.
 563          */
 564         switch (ant->rx) {
 565         case ANTENNA_HW_DIVERSITY:
 566                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 567                 break;
 568         case ANTENNA_A:
 569                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 570                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 571                 break;
 572         case ANTENNA_B:
 573         default:
 574                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 575                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 576                 break;
 577         }
 578
 579         rt73usb_bbp_write(rt2x00dev, 77, r77);
 580         rt73usb_bbp_write(rt2x00dev, 3, r3);
 581         rt73usb_bbp_write(rt2x00dev, 4, r4);
 582 }
 583
 584 struct antenna_sel {
 585         u8 word;
 586         /*
 587          * value[0] -> non-LNA
 588          * value[1] -> LNA
 589          */
 590         u8 value[2];
 591 };
 592
 593 static const struct antenna_sel antenna_sel_a[] = {
 594         { 96,  { 0x58, 0x78 } },
 595         { 104, { 0x38, 0x48 } },
 596         { 75,  { 0xfe, 0x80 } },
 597         { 86,  { 0xfe, 0x80 } },
 598         { 88,  { 0xfe, 0x80 } },
 599         { 35,  { 0x60, 0x60 } },
 600         { 97,  { 0x58, 0x58 } },
 601         { 98,  { 0x58, 0x58 } },
 602 };
 603
 604 static const struct antenna_sel antenna_sel_bg[] = {
 605         { 96,  { 0x48, 0x68 } },
 606         { 104, { 0x2c, 0x3c } },
 607         { 75,  { 0xfe, 0x80 } },
 608         { 86,  { 0xfe, 0x80 } },
 609         { 88,  { 0xfe, 0x80 } },
 610         { 35,  { 0x50, 0x50 } },
 611         { 97,  { 0x48, 0x48 } },
 612         { 98,  { 0x48, 0x48 } },
 613 };
 614
 615 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 616                                    struct antenna_setup *ant)
 617 {
 618         const struct antenna_sel *sel;
 619         unsigned int lna;
 620         unsigned int i;
 621         u32 reg;
 622
 623         /*
 624          * We should never come here because rt2x00lib is supposed
 625          * to catch this and send us the correct antenna explicitely.
 626          */
 627         BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
 628                ant->tx == ANTENNA_SW_DIVERSITY);
 629
 630         if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
 631                 sel = antenna_sel_a;
 632                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 633         } else {
 634                 sel = antenna_sel_bg;
 635                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 636         }
 637
 638         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 639                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 640
 641         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 642
 643         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 644                            (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
 645         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 646                            (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
 647
 648         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 649
 650         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 651             rt2x00_rf(&rt2x00dev->chip, RF5225))
 652                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 653         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 654                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 655                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 656 }
 657
 658 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 659                                     struct rt2x00lib_conf *libconf)
 660 {
 661         u32 reg;
 662
 663         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 664         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 665         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 666
 667         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 668         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 669         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 670         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 671         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 672
 673         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 674         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 675         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 676
 677         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 678         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 679         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 680
 681         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 682         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 683                            libconf->conf->beacon_int * 16);
 684         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 685 }
 686
 687 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 688                            struct rt2x00lib_conf *libconf,
 689                            const unsigned int flags)
 690 {
 691         if (flags & CONFIG_UPDATE_PHYMODE)
 692                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 693         if (flags & CONFIG_UPDATE_CHANNEL)
 694                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 695                                        libconf->conf->power_level);
 696         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 697                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 698         if (flags & CONFIG_UPDATE_ANTENNA)
 699                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 700         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 701                 rt73usb_config_duration(rt2x00dev, libconf);
 702 }
 703
 704 /*
 705  * Link tuning
 706  */
 707 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 708                                struct link_qual *qual)
 709 {
 710         u32 reg;
 711
 712         /*
 713          * Update FCS error count from register.
 714          */
 715         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 716         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 717
 718         /*
 719          * Update False CCA count from register.
 720          */
 721         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 722         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 723 }
 724
 725 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 726 {
 727         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 728         rt2x00dev->link.vgc_level = 0x20;
 729 }
 730
 731 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 732 {
 733         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 734         u8 r17;
 735         u8 up_bound;
 736         u8 low_bound;
 737
 738         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 739
 740         /*
 741          * Determine r17 bounds.
 742          */
 743         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
 744                 low_bound = 0x28;
 745                 up_bound = 0x48;
 746
 747                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 748                         low_bound += 0x10;
 749                         up_bound += 0x10;
 750                 }
 751         } else {
 752                 if (rssi > -82) {
 753                         low_bound = 0x1c;
 754                         up_bound = 0x40;
 755                 } else if (rssi > -84) {
 756                         low_bound = 0x1c;
 757                         up_bound = 0x20;
 758                 } else {
 759                         low_bound = 0x1c;
 760                         up_bound = 0x1c;
 761                 }
 762
 763                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 764                         low_bound += 0x14;
 765                         up_bound += 0x10;
 766                 }
 767         }
 768
 769         /*
 770          * If we are not associated, we should go straight to the
 771          * dynamic CCA tuning.
 772          */
 773         if (!rt2x00dev->intf_associated)
 774                 goto dynamic_cca_tune;
 775
 776         /*
 777          * Special big-R17 for very short distance
 778          */
 779         if (rssi > -35) {
 780                 if (r17 != 0x60)
 781                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 782                 return;
 783         }
 784
 785         /*
 786          * Special big-R17 for short distance
 787          */
 788         if (rssi >= -58) {
 789                 if (r17 != up_bound)
 790                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 791                 return;
 792         }
 793
 794         /*
 795          * Special big-R17 for middle-short distance
 796          */
 797         if (rssi >= -66) {
 798                 low_bound += 0x10;
 799                 if (r17 != low_bound)
 800                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 801                 return;
 802         }
 803
 804         /*
 805          * Special mid-R17 for middle distance
 806          */
 807         if (rssi >= -74) {
 808                 if (r17 != (low_bound + 0x10))
 809                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 810                 return;
 811         }
 812
 813         /*
 814          * Special case: Change up_bound based on the rssi.
 815          * Lower up_bound when rssi is weaker then -74 dBm.
 816          */
 817         up_bound -= 2 * (-74 - rssi);
 818         if (low_bound > up_bound)
 819                 up_bound = low_bound;
 820
 821         if (r17 > up_bound) {
 822                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 823                 return;
 824         }
 825
 826 dynamic_cca_tune:
 827
 828         /*
 829          * r17 does not yet exceed upper limit, continue and base
 830          * the r17 tuning on the false CCA count.
 831          */
 832         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 833                 r17 += 4;
 834                 if (r17 > up_bound)
 835                         r17 = up_bound;
 836                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 837         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 838                 r17 -= 4;
 839                 if (r17 < low_bound)
 840                         r17 = low_bound;
 841                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 842         }
 843 }
 844
 845 /*
 846  * Firmware functions
 847  */
 848 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 849 {
 850         return FIRMWARE_RT2571;
 851 }
 852
 853 static u16 rt73usb_get_firmware_crc(void *data, const size_t len)
 854 {
 855         u16 crc;
 856
 857         /*
 858          * Use the crc itu-t algorithm.
 859          * The last 2 bytes in the firmware array are the crc checksum itself,
 860          * this means that we should never pass those 2 bytes to the crc
 861          * algorithm.
 862          */
 863         crc = crc_itu_t(0, data, len - 2);
 864         crc = crc_itu_t_byte(crc, 0);
 865         crc = crc_itu_t_byte(crc, 0);
 866
 867         return crc;
 868 }
 869
 870 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 871                                  const size_t len)
 872 {
 873         unsigned int i;
 874         int status;
 875         u32 reg;
 876         char *ptr = data;
 877         char *cache;
 878         int buflen;
 879         int timeout;
 880
 881         /*
 882          * Wait for stable hardware.
 883          */
 884         for (i = 0; i < 100; i++) {
 885                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 886                 if (reg)
 887                         break;
 888                 msleep(1);
 889         }
 890
 891         if (!reg) {
 892                 ERROR(rt2x00dev, "Unstable hardware.\n");
 893                 return -EBUSY;
 894         }
 895
 896         /*
 897          * Write firmware to device.
 898          * We setup a seperate cache for this action,
 899          * since we are going to write larger chunks of data
 900          * then normally used cache size.
 901          */
 902         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 903         if (!cache) {
 904                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 905                 return -ENOMEM;
 906         }
 907
 908         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 909                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 910                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 911
 912                 memcpy(cache, ptr, buflen);
 913
 914                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 915                                          USB_VENDOR_REQUEST_OUT,
 916                                          FIRMWARE_IMAGE_BASE + i, 0,
 917                                          cache, buflen, timeout);
 918
 919                 ptr += buflen;
 920         }
 921
 922         kfree(cache);
 923
 924         /*
 925          * Send firmware request to device to load firmware,
 926          * we need to specify a long timeout time.
 927          */
 928         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 929                                              0, USB_MODE_FIRMWARE,
 930                                              REGISTER_TIMEOUT_FIRMWARE);
 931         if (status < 0) {
 932                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 933                 return status;
 934         }
 935
 936         return 0;
 937 }
 938
 939 /*
 940  * Initialization functions.
 941  */
 942 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 943 {
 944         u32 reg;
 945
 946         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 947         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 948         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 949         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 950         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 951
 952         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 953         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 954         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 955         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 956         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 957         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 958         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 959         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 960         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 961         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 962
 963         /*
 964          * CCK TXD BBP registers
 965          */
 966         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 967         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 968         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 969         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 970         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 971         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 972         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 973         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 974         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 975         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 976
 977         /*
 978          * OFDM TXD BBP registers
 979          */
 980         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 981         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 982         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 983         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 984         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 985         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 986         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 987         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 988
 989         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 990         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 991         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 992         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 993         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 994         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 995
 996         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 997         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 998         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 999         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
1000         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
1001         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
1002
1003         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
1004
1005         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
1006         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
1007         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
1008
1009         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1010
1011         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1012                 return -EBUSY;
1013
1014         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1015
1016         /*
1017          * Invalidate all Shared Keys (SEC_CSR0),
1018          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1019          */
1020         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1021         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1022         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1023
1024         reg = 0x000023b0;
1025         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1026             rt2x00_rf(&rt2x00dev->chip, RF2527))
1027                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1028         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1029
1030         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1031         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1032         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1033
1034         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1035         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1036         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1037         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1038
1039         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1040         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1041         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1042         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1043
1044         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1045         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1046         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1047
1048         /*
1049          * Clear all beacons
1050          * For the Beacon base registers we only need to clear
1051          * the first byte since that byte contains the VALID and OWNER
1052          * bits which (when set to 0) will invalidate the entire beacon.
1053          */
1054         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1055         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1056         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1057         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1058
1059         /*
1060          * We must clear the error counters.
1061          * These registers are cleared on read,
1062          * so we may pass a useless variable to store the value.
1063          */
1064         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1065         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1066         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1067
1068         /*
1069          * Reset MAC and BBP registers.
1070          */
1071         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1072         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1073         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1074         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1075
1076         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1077         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1078         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1079         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1080
1081         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1082         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1083         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1084
1085         return 0;
1086 }
1087
1088 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1089 {
1090         unsigned int i;
1091         u16 eeprom;
1092         u8 reg_id;
1093         u8 value;
1094
1095         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1096                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1097                 if ((value != 0xff) && (value != 0x00))
1098                         goto continue_csr_init;
1099                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1100                 udelay(REGISTER_BUSY_DELAY);
1101         }
1102
1103         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1104         return -EACCES;
1105
1106 continue_csr_init:
1107         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1108         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1109         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1110         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1111         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1112         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1113         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1114         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1115         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1116         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1117         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1118         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1119         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1120         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1121         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1122         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1123         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1124         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1125         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1126         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1127         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1128         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1129         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1130         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1131         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1132
1133         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1134                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1135
1136                 if (eeprom != 0xffff && eeprom != 0x0000) {
1137                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1138                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1139                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1140                 }
1141         }
1142
1143         return 0;
1144 }
1145
1146 /*
1147  * Device state switch handlers.
1148  */
1149 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1150                               enum dev_state state)
1151 {
1152         u32 reg;
1153
1154         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1155         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1156                            state == STATE_RADIO_RX_OFF);
1157         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1158 }
1159
1160 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1161 {
1162         /*
1163          * Initialize all registers.
1164          */
1165         if (rt73usb_init_registers(rt2x00dev) ||
1166             rt73usb_init_bbp(rt2x00dev)) {
1167                 ERROR(rt2x00dev, "Register initialization failed.\n");
1168                 return -EIO;
1169         }
1170
1171         return 0;
1172 }
1173
1174 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1175 {
1176         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1177
1178         /*
1179          * Disable synchronisation.
1180          */
1181         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1182
1183         rt2x00usb_disable_radio(rt2x00dev);
1184 }
1185
1186 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1187 {
1188         u32 reg;
1189         unsigned int i;
1190         char put_to_sleep;
1191         char current_state;
1192
1193         put_to_sleep = (state != STATE_AWAKE);
1194
1195         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1196         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1197         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1198         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1199
1200         /*
1201          * Device is not guaranteed to be in the requested state yet.
1202          * We must wait until the register indicates that the
1203          * device has entered the correct state.
1204          */
1205         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1206                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1207                 current_state =
1208                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1209                 if (current_state == !put_to_sleep)
1210                         return 0;
1211                 msleep(10);
1212         }
1213
1214         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1215                "current device state %d.\n", !put_to_sleep, current_state);
1216
1217         return -EBUSY;
1218 }
1219
1220 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1221                                     enum dev_state state)
1222 {
1223         int retval = 0;
1224
1225         switch (state) {
1226         case STATE_RADIO_ON:
1227                 retval = rt73usb_enable_radio(rt2x00dev);
1228                 break;
1229         case STATE_RADIO_OFF:
1230                 rt73usb_disable_radio(rt2x00dev);
1231                 break;
1232         case STATE_RADIO_RX_ON:
1233         case STATE_RADIO_RX_ON_LINK:
1234                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1235                 break;
1236         case STATE_RADIO_RX_OFF:
1237         case STATE_RADIO_RX_OFF_LINK:
1238                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
1239                 break;
1240         case STATE_DEEP_SLEEP:
1241         case STATE_SLEEP:
1242         case STATE_STANDBY:
1243         case STATE_AWAKE:
1244                 retval = rt73usb_set_state(rt2x00dev, state);
1245                 break;
1246         default:
1247                 retval = -ENOTSUPP;
1248                 break;
1249         }
1250
1251         return retval;
1252 }
1253
1254 /*
1255  * TX descriptor initialization
1256  */
1257 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1258                                     struct sk_buff *skb,
1259                                     struct txentry_desc *txdesc,
1260                                     struct ieee80211_tx_control *control)
1261 {
1262         struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1263         __le32 *txd = skbdesc->desc;
1264         u32 word;
1265
1266         /*
1267          * Start writing the descriptor words.
1268          */
1269         rt2x00_desc_read(txd, 1, &word);
1270         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1271         rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1272         rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1273         rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1274         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1275         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1276         rt2x00_desc_write(txd, 1, word);
1277
1278         rt2x00_desc_read(txd, 2, &word);
1279         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1280         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1281         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1282         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1283         rt2x00_desc_write(txd, 2, word);
1284
1285         rt2x00_desc_read(txd, 5, &word);
1286         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1287                            TXPOWER_TO_DEV(rt2x00dev->tx_power));
1288         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1289         rt2x00_desc_write(txd, 5, word);
1290
1291         rt2x00_desc_read(txd, 0, &word);
1292         rt2x00_set_field32(&word, TXD_W0_BURST,
1293                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1294         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1295         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1296                            test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1297         rt2x00_set_field32(&word, TXD_W0_ACK,
1298                            test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1299         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1300                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1301         rt2x00_set_field32(&word, TXD_W0_OFDM,
1302                            test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1303         rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1304         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1305                            !!(control->flags &
1306                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1307         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1308         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
1309         rt2x00_set_field32(&word, TXD_W0_BURST2,
1310                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1311         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1312         rt2x00_desc_write(txd, 0, word);
1313 }
1314
1315 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1316                                    struct sk_buff *skb)
1317 {
1318         int length;
1319
1320         /*
1321          * The length _must_ be a multiple of 4,
1322          * but it must _not_ be a multiple of the USB packet size.
1323          */
1324         length = roundup(skb->len, 4);
1325         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1326
1327         return length;
1328 }
1329
1330 /*
1331  * TX data initialization
1332  */
1333 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1334                                   const unsigned int queue)
1335 {
1336         u32 reg;
1337
1338         if (queue != RT2X00_BCN_QUEUE_BEACON)
1339                 return;
1340
1341         /*
1342          * For Wi-Fi faily generated beacons between participating stations.
1343          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1344          */
1345         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1346
1347         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1348         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1349                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1350                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1351                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1352                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1353         }
1354 }
1355
1356 /*
1357  * RX control handlers
1358  */
1359 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1360 {
1361         u16 eeprom;
1362         u8 offset;
1363         u8 lna;
1364
1365         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1366         switch (lna) {
1367         case 3:
1368                 offset = 90;
1369                 break;
1370         case 2:
1371                 offset = 74;
1372                 break;
1373         case 1:
1374                 offset = 64;
1375                 break;
1376         default:
1377                 return 0;
1378         }
1379
1380         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1381                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1382                         if (lna == 3 || lna == 2)
1383                                 offset += 10;
1384                 } else {
1385                         if (lna == 3)
1386                                 offset += 6;
1387                         else if (lna == 2)
1388                                 offset += 8;
1389                 }
1390
1391                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1392                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1393         } else {
1394                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1395                         offset += 14;
1396
1397                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1398                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1399         }
1400
1401         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1402 }
1403
1404 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1405                                 struct rxdone_entry_desc *rxdesc)
1406 {
1407         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1408         __le32 *rxd = (__le32 *)entry->skb->data;
1409         unsigned int offset = entry->queue->desc_size + 2;
1410         u32 word0;
1411         u32 word1;
1412
1413         /*
1414          * Copy descriptor to the available headroom inside the skbuffer.
1415          */
1416         skb_push(entry->skb, offset);
1417         memcpy(entry->skb->data, rxd, entry->queue->desc_size);
1418         rxd = (__le32 *)entry->skb->data;
1419
1420         /*
1421          * The descriptor is now aligned to 4 bytes and thus it is
1422          * now safe to read it on all architectures.
1423          */
1424         rt2x00_desc_read(rxd, 0, &word0);
1425         rt2x00_desc_read(rxd, 1, &word1);
1426
1427         rxdesc->flags = 0;
1428         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1429                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1430
1431         /*
1432          * Obtain the status about this packet.
1433          * When frame was received with an OFDM bitrate,
1434          * the signal is the PLCP value. If it was received with
1435          * a CCK bitrate the signal is the rate in 100kbit/s.
1436          */
1437         rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1438         rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1439         rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1440
1441         rxdesc->dev_flags = 0;
1442         if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1443                 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1444         if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1445                 rxdesc->dev_flags |= RXDONE_MY_BSS;
1446
1447         /*
1448          * Adjust the skb memory window to the frame boundaries.
1449          */
1450         skb_pull(entry->skb, offset + entry->queue->desc_size);
1451         skb_trim(entry->skb, rxdesc->size);
1452
1453         /*
1454          * Set descriptor and data pointer.
1455          */
1456         skbdesc->data = entry->skb->data;
1457         skbdesc->data_len = rxdesc->size;
1458         skbdesc->desc = rxd;
1459         skbdesc->desc_len = entry->queue->desc_size;
1460 }
1461
1462 /*
1463  * Device probe functions.
1464  */
1465 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1466 {
1467         u16 word;
1468         u8 *mac;
1469         s8 value;
1470
1471         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1472
1473         /*
1474          * Start validation of the data that has been read.
1475          */
1476         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1477         if (!is_valid_ether_addr(mac)) {
1478                 DECLARE_MAC_BUF(macbuf);
1479
1480                 random_ether_addr(mac);
1481                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1482         }
1483
1484         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1485         if (word == 0xffff) {
1486                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1487                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1488                                    ANTENNA_B);
1489                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1490                                    ANTENNA_B);
1491                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1492                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1493                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1494                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1495                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1496                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1497         }
1498
1499         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1500         if (word == 0xffff) {
1501                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1502                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1503                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1504         }
1505
1506         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1507         if (word == 0xffff) {
1508                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1509                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1510                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1511                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1512                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1513                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1514                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1515                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1516                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1517                                    LED_MODE_DEFAULT);
1518                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1519                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1520         }
1521
1522         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1523         if (word == 0xffff) {
1524                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1525                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1526                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1527                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1528         }
1529
1530         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1531         if (word == 0xffff) {
1532                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1533                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1534                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1535                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1536         } else {
1537                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1538                 if (value < -10 || value > 10)
1539                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1540                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1541                 if (value < -10 || value > 10)
1542                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1543                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1544         }
1545
1546         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1547         if (word == 0xffff) {
1548                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1549                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1550                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1551                 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1552         } else {
1553                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1554                 if (value < -10 || value > 10)
1555                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1556                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1557                 if (value < -10 || value > 10)
1558                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1559                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1560         }
1561
1562         return 0;
1563 }
1564
1565 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1566 {
1567         u32 reg;
1568         u16 value;
1569         u16 eeprom;
1570
1571         /*
1572          * Read EEPROM word for configuration.
1573          */
1574         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1575
1576         /*
1577          * Identify RF chipset.
1578          */
1579         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1580         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1581         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1582
1583         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1584                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1585                 return -ENODEV;
1586         }
1587
1588         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1589             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1590             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1591             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1592                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1593                 return -ENODEV;
1594         }
1595
1596         /*
1597          * Identify default antenna configuration.
1598          */
1599         rt2x00dev->default_ant.tx =
1600             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1601         rt2x00dev->default_ant.rx =
1602             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1603
1604         /*
1605          * Read the Frame type.
1606          */
1607         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1608                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1609
1610         /*
1611          * Read frequency offset.
1612          */
1613         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1614         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1615
1616         /*
1617          * Read external LNA informations.
1618          */
1619         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1620
1621         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1622                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1623                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1624         }
1625
1626         /*
1627          * Store led settings, for correct led behaviour.
1628          */
1629 #ifdef CONFIG_RT73USB_LEDS
1630         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1631
1632         rt2x00dev->led_radio.rt2x00dev = rt2x00dev;
1633         rt2x00dev->led_radio.type = LED_TYPE_RADIO;
1634         rt2x00dev->led_radio.led_dev.brightness_set =
1635             rt73usb_brightness_set;
1636         rt2x00dev->led_radio.led_dev.blink_set =
1637             rt73usb_blink_set;
1638         rt2x00dev->led_radio.flags = LED_INITIALIZED;
1639
1640         rt2x00dev->led_assoc.rt2x00dev = rt2x00dev;
1641         rt2x00dev->led_assoc.type = LED_TYPE_ASSOC;
1642         rt2x00dev->led_assoc.led_dev.brightness_set =
1643             rt73usb_brightness_set;
1644         rt2x00dev->led_assoc.led_dev.blink_set =
1645             rt73usb_blink_set;
1646         rt2x00dev->led_assoc.flags = LED_INITIALIZED;
1647
1648         if (value == LED_MODE_SIGNAL_STRENGTH) {
1649                 rt2x00dev->led_qual.rt2x00dev = rt2x00dev;
1650                 rt2x00dev->led_qual.type = LED_TYPE_QUALITY;
1651                 rt2x00dev->led_qual.led_dev.brightness_set =
1652                     rt73usb_brightness_set;
1653                 rt2x00dev->led_qual.led_dev.blink_set =
1654                     rt73usb_blink_set;
1655                 rt2x00dev->led_qual.flags = LED_INITIALIZED;
1656         }
1657
1658         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1659         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1660                            rt2x00_get_field16(eeprom,
1661                                               EEPROM_LED_POLARITY_GPIO_0));
1662         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1663                            rt2x00_get_field16(eeprom,
1664                                               EEPROM_LED_POLARITY_GPIO_1));
1665         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1666                            rt2x00_get_field16(eeprom,
1667                                               EEPROM_LED_POLARITY_GPIO_2));
1668         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1669                            rt2x00_get_field16(eeprom,
1670                                               EEPROM_LED_POLARITY_GPIO_3));
1671         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1672                            rt2x00_get_field16(eeprom,
1673                                               EEPROM_LED_POLARITY_GPIO_4));
1674         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1675                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1676         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1677                            rt2x00_get_field16(eeprom,
1678                                               EEPROM_LED_POLARITY_RDY_G));
1679         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1680                            rt2x00_get_field16(eeprom,
1681                                               EEPROM_LED_POLARITY_RDY_A));
1682 #endif /* CONFIG_RT73USB_LEDS */
1683
1684         return 0;
1685 }
1686
1687 /*
1688  * RF value list for RF2528
1689  * Supports: 2.4 GHz
1690  */
1691 static const struct rf_channel rf_vals_bg_2528[] = {
1692         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1693         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1694         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1695         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1696         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1697         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1698         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1699         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1700         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1701         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1702         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1703         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1704         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1705         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1706 };
1707
1708 /*
1709  * RF value list for RF5226
1710  * Supports: 2.4 GHz & 5.2 GHz
1711  */
1712 static const struct rf_channel rf_vals_5226[] = {
1713         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1714         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1715         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1716         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1717         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1718         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1719         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1720         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1721         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1722         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1723         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1724         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1725         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1726         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1727
1728         /* 802.11 UNI / HyperLan 2 */
1729         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1730         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1731         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1732         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1733         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1734         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1735         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1736         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1737
1738         /* 802.11 HyperLan 2 */
1739         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1740         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1741         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1742         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1743         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1744         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1745         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1746         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1747         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1748         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1749
1750         /* 802.11 UNII */
1751         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1752         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1753         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1754         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1755         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1756         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1757
1758         /* MMAC(Japan)J52 ch 34,38,42,46 */
1759         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1760         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1761         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1762         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1763 };
1764
1765 /*
1766  * RF value list for RF5225 & RF2527
1767  * Supports: 2.4 GHz & 5.2 GHz
1768  */
1769 static const struct rf_channel rf_vals_5225_2527[] = {
1770         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1771         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1772         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1773         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1774         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1775         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1776         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1777         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1778         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1779         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1780         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1781         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1782         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1783         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1784
1785         /* 802.11 UNI / HyperLan 2 */
1786         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1787         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1788         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1789         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1790         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1791         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1792         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1793         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1794
1795         /* 802.11 HyperLan 2 */
1796         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1797         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1798         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1799         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1800         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1801         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1802         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1803         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1804         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1805         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1806
1807         /* 802.11 UNII */
1808         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1809         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1810         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1811         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1812         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1813         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1814
1815         /* MMAC(Japan)J52 ch 34,38,42,46 */
1816         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1817         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1818         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1819         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1820 };
1821
1822
1823 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1824 {
1825         struct hw_mode_spec *spec = &rt2x00dev->spec;
1826         u8 *txpower;
1827         unsigned int i;
1828
1829         /*
1830          * Initialize all hw fields.
1831          */
1832         rt2x00dev->hw->flags =
1833             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1834             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1835         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1836         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1837         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1838         rt2x00dev->hw->queues = 4;
1839
1840         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1841         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1842                                 rt2x00_eeprom_addr(rt2x00dev,
1843                                                    EEPROM_MAC_ADDR_0));
1844
1845         /*
1846          * Convert tx_power array in eeprom.
1847          */
1848         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1849         for (i = 0; i < 14; i++)
1850                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1851
1852         /*
1853          * Initialize hw_mode information.
1854          */
1855         spec->supported_bands = SUPPORT_BAND_2GHZ;
1856         spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1857         spec->tx_power_a = NULL;
1858         spec->tx_power_bg = txpower;
1859         spec->tx_power_default = DEFAULT_TXPOWER;
1860
1861         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1862                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1863                 spec->channels = rf_vals_bg_2528;
1864         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1865                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1866                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1867                 spec->channels = rf_vals_5226;
1868         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1869                 spec->num_channels = 14;
1870                 spec->channels = rf_vals_5225_2527;
1871         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1872                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1873                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1874                 spec->channels = rf_vals_5225_2527;
1875         }
1876
1877         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1878             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1879                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1880                 for (i = 0; i < 14; i++)
1881                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1882
1883                 spec->tx_power_a = txpower;
1884         }
1885 }
1886
1887 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1888 {
1889         int retval;
1890
1891         /*
1892          * Allocate eeprom data.
1893          */
1894         retval = rt73usb_validate_eeprom(rt2x00dev);
1895         if (retval)
1896                 return retval;
1897
1898         retval = rt73usb_init_eeprom(rt2x00dev);
1899         if (retval)
1900                 return retval;
1901
1902         /*
1903          * Initialize hw specifications.
1904          */
1905         rt73usb_probe_hw_mode(rt2x00dev);
1906
1907         /*
1908          * This device requires firmware.
1909          */
1910         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1911         __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1912
1913         /*
1914          * Set the rssi offset.
1915          */
1916         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1917
1918         return 0;
1919 }
1920
1921 /*
1922  * IEEE80211 stack callback functions.
1923  */
1924 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1925                                    u32 short_retry, u32 long_retry)
1926 {
1927         struct rt2x00_dev *rt2x00dev = hw->priv;
1928         u32 reg;
1929
1930         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1931         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1932         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1933         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1934
1935         return 0;
1936 }
1937
1938 #if 0
1939 /*
1940  * Mac80211 demands get_tsf must be atomic.
1941  * This is not possible for rt73usb since all register access
1942  * functions require sleeping. Untill mac80211 no longer needs
1943  * get_tsf to be atomic, this function should be disabled.
1944  */
1945 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1946 {
1947         struct rt2x00_dev *rt2x00dev = hw->priv;
1948         u64 tsf;
1949         u32 reg;
1950
1951         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1952         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1953         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1954         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1955
1956         return tsf;
1957 }
1958 #else
1959 #define rt73usb_get_tsf NULL
1960 #endif
1961
1962 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1963                                  struct ieee80211_tx_control *control)
1964 {
1965         struct rt2x00_dev *rt2x00dev = hw->priv;
1966         struct rt2x00_intf *intf = vif_to_intf(control->vif);
1967         struct skb_frame_desc *skbdesc;
1968         unsigned int beacon_base;
1969         unsigned int timeout;
1970         u32 reg;
1971
1972         if (unlikely(!intf->beacon))
1973                 return -ENOBUFS;
1974
1975         /*
1976          * Add the descriptor in front of the skb.
1977          */
1978         skb_push(skb, intf->beacon->queue->desc_size);
1979         memset(skb->data, 0, intf->beacon->queue->desc_size);
1980
1981         /*
1982          * Fill in skb descriptor
1983          */
1984         skbdesc = get_skb_frame_desc(skb);
1985         memset(skbdesc, 0, sizeof(*skbdesc));
1986         skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
1987         skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1988         skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
1989         skbdesc->desc = skb->data;
1990         skbdesc->desc_len = intf->beacon->queue->desc_size;
1991         skbdesc->entry = intf->beacon;
1992
1993         /*
1994          * Disable beaconing while we are reloading the beacon data,
1995          * otherwise we might be sending out invalid data.
1996          */
1997         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1998         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1999         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
2000         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
2001         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
2002
2003         /*
2004          * mac80211 doesn't provide the control->queue variable
2005          * for beacons. Set our own queue identification so
2006          * it can be used during descriptor initialization.
2007          */
2008         control->queue = RT2X00_BCN_QUEUE_BEACON;
2009         rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
2010
2011         /*
2012          * Write entire beacon with descriptor to register,
2013          * and kick the beacon generator.
2014          */
2015         beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
2016         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
2017         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2018                                  USB_VENDOR_REQUEST_OUT, beacon_base, 0,
2019                                  skb->data, skb->len, timeout);
2020         rt73usb_kick_tx_queue(rt2x00dev, control->queue);
2021
2022         return 0;
2023 }
2024
2025 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2026         .tx                     = rt2x00mac_tx,
2027         .start                  = rt2x00mac_start,
2028         .stop                   = rt2x00mac_stop,
2029         .add_interface          = rt2x00mac_add_interface,
2030         .remove_interface       = rt2x00mac_remove_interface,
2031         .config                 = rt2x00mac_config,
2032         .config_interface       = rt2x00mac_config_interface,
2033         .configure_filter       = rt2x00mac_configure_filter,
2034         .get_stats              = rt2x00mac_get_stats,
2035         .set_retry_limit        = rt73usb_set_retry_limit,
2036         .bss_info_changed       = rt2x00mac_bss_info_changed,
2037         .conf_tx                = rt2x00mac_conf_tx,
2038         .get_tx_stats           = rt2x00mac_get_tx_stats,
2039         .get_tsf                = rt73usb_get_tsf,
2040         .beacon_update          = rt73usb_beacon_update,
2041 };
2042
2043 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2044         .probe_hw               = rt73usb_probe_hw,
2045         .get_firmware_name      = rt73usb_get_firmware_name,
2046         .get_firmware_crc       = rt73usb_get_firmware_crc,
2047         .load_firmware          = rt73usb_load_firmware,
2048         .initialize             = rt2x00usb_initialize,
2049         .uninitialize           = rt2x00usb_uninitialize,
2050         .init_rxentry           = rt2x00usb_init_rxentry,
2051         .init_txentry           = rt2x00usb_init_txentry,
2052         .set_device_state       = rt73usb_set_device_state,
2053         .link_stats             = rt73usb_link_stats,
2054         .reset_tuner            = rt73usb_reset_tuner,
2055         .link_tuner             = rt73usb_link_tuner,
2056         .write_tx_desc          = rt73usb_write_tx_desc,
2057         .write_tx_data          = rt2x00usb_write_tx_data,
2058         .get_tx_data_len        = rt73usb_get_tx_data_len,
2059         .kick_tx_queue          = rt73usb_kick_tx_queue,
2060         .fill_rxdone            = rt73usb_fill_rxdone,
2061         .config_filter          = rt73usb_config_filter,
2062         .config_intf            = rt73usb_config_intf,
2063         .config_erp             = rt73usb_config_erp,
2064         .config                 = rt73usb_config,
2065 };
2066
2067 static const struct data_queue_desc rt73usb_queue_rx = {
2068         .entry_num              = RX_ENTRIES,
2069         .data_size              = DATA_FRAME_SIZE,
2070         .desc_size              = RXD_DESC_SIZE,
2071         .priv_size              = sizeof(struct queue_entry_priv_usb_rx),
2072 };
2073
2074 static const struct data_queue_desc rt73usb_queue_tx = {
2075         .entry_num              = TX_ENTRIES,
2076         .data_size              = DATA_FRAME_SIZE,
2077         .desc_size              = TXD_DESC_SIZE,
2078         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2079 };
2080
2081 static const struct data_queue_desc rt73usb_queue_bcn = {
2082         .entry_num              = 4 * BEACON_ENTRIES,
2083         .data_size              = MGMT_FRAME_SIZE,
2084         .desc_size              = TXINFO_SIZE,
2085         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2086 };
2087
2088 static const struct rt2x00_ops rt73usb_ops = {
2089         .name           = KBUILD_MODNAME,
2090         .max_sta_intf   = 1,
2091         .max_ap_intf    = 4,
2092         .eeprom_size    = EEPROM_SIZE,
2093         .rf_size        = RF_SIZE,
2094         .rx             = &rt73usb_queue_rx,
2095         .tx             = &rt73usb_queue_tx,
2096         .bcn            = &rt73usb_queue_bcn,
2097         .lib            = &rt73usb_rt2x00_ops,
2098         .hw             = &rt73usb_mac80211_ops,
2099 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2100         .debugfs        = &rt73usb_rt2x00debug,
2101 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2102 };
2103
2104 /*
2105  * rt73usb module information.
2106  */
2107 static struct usb_device_id rt73usb_device_table[] = {
2108         /* AboCom */
2109         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2110         /* Askey */
2111         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2112         /* ASUS */
2113         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2115         /* Belkin */
2116         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2117         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2118         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2119         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2120         /* Billionton */
2121         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2122         /* Buffalo */
2123         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2124         /* CNet */
2125         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2126         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2127         /* Conceptronic */
2128         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2129         /* Corega */
2130         { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
2131         /* D-Link */
2132         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2133         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2134         { USB_DEVICE(0x07d1, 0x3c06), USB_DEVICE_DATA(&rt73usb_ops) },
2135         { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
2136         /* Gemtek */
2137         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2138         /* Gigabyte */
2139         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2140         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2141         /* Huawei-3Com */
2142         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2143         /* Hercules */
2144         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2145         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2146         /* Linksys */
2147         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2148         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2149         /* MSI */
2150         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2151         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2152         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2153         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2154         /* Ralink */
2155         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2156         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2157         /* Qcom */
2158         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2159         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2160         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2161         /* Senao */
2162         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2163         /* Sitecom */
2164         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2165         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2166         /* Surecom */
2167         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2168         /* Planex */
2169         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2170         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2171         { 0, }
2172 };
2173
2174 MODULE_AUTHOR(DRV_PROJECT);
2175 MODULE_VERSION(DRV_VERSION);
2176 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2177 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2178 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2179 MODULE_FIRMWARE(FIRMWARE_RT2571);
2180 MODULE_LICENSE("GPL");
2181
2182 static struct usb_driver rt73usb_driver = {
2183         .name           = KBUILD_MODNAME,
2184         .id_table       = rt73usb_device_table,
2185         .probe          = rt2x00usb_probe,
2186         .disconnect     = rt2x00usb_disconnect,
2187         .suspend        = rt2x00usb_suspend,
2188         .resume         = rt2x00usb_resume,
2189 };
2190
2191 static int __init rt73usb_init(void)
2192 {
2193         return usb_register(&rt73usb_driver);
2194 }
2195
2196 static void __exit rt73usb_exit(void)
2197 {
2198         usb_deregister(&rt73usb_driver);
2199 }
2200
2201 module_init(rt73usb_init);
2202 module_exit(rt73usb_exit);