2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
32 /* Module parameters */
33 static unsigned ap_mode_default;
34 module_param(ap_mode_default, bool, 0);
35 MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
38 /* Register definitions */
39 #define MWL8K_HIU_GEN_PTR 0x00000c10
40 #define MWL8K_MODE_STA 0x0000005a
41 #define MWL8K_MODE_AP 0x000000a5
42 #define MWL8K_HIU_INT_CODE 0x00000c14
43 #define MWL8K_FWSTA_READY 0xf0f1f2f4
44 #define MWL8K_FWAP_READY 0xf1f2f4a5
45 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
46 #define MWL8K_HIU_SCRATCH 0x00000c40
48 /* Host->device communications */
49 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
54 #define MWL8K_H2A_INT_DUMMY (1 << 20)
55 #define MWL8K_H2A_INT_RESET (1 << 15)
56 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
57 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
59 /* Device->host communications */
60 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
65 #define MWL8K_A2H_INT_DUMMY (1 << 20)
66 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73 #define MWL8K_A2H_INT_RX_READY (1 << 1)
74 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
76 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
87 #define MWL8K_RX_QUEUES 1
88 #define MWL8K_TX_QUEUES 4
92 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
93 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
94 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
95 __le16 *qos, s8 *noise);
98 struct mwl8k_device_info {
103 struct rxd_ops *ap_rxd_ops;
107 struct mwl8k_rx_queue {
110 /* hw receives here */
113 /* refill descs here */
120 DEFINE_DMA_UNMAP_ADDR(dma);
124 struct mwl8k_tx_queue {
125 /* hw transmits here */
128 /* sw appends here */
132 struct mwl8k_tx_desc *txd;
134 struct sk_buff **skb;
138 struct ieee80211_hw *hw;
139 struct pci_dev *pdev;
141 struct mwl8k_device_info *device_info;
147 struct firmware *fw_helper;
148 struct firmware *fw_ucode;
150 /* hardware/firmware parameters */
152 struct rxd_ops *rxd_ops;
153 struct ieee80211_supported_band band_24;
154 struct ieee80211_channel channels_24[14];
155 struct ieee80211_rate rates_24[14];
156 struct ieee80211_supported_band band_50;
157 struct ieee80211_channel channels_50[4];
158 struct ieee80211_rate rates_50[9];
159 u32 ap_macids_supported;
160 u32 sta_macids_supported;
162 /* firmware access */
163 struct mutex fw_mutex;
164 struct task_struct *fw_mutex_owner;
166 struct completion *hostcmd_wait;
168 /* lock held over TX and TX reap */
171 /* TX quiesce completion, protected by fw_mutex and tx_lock */
172 struct completion *tx_wait;
174 /* List of interfaces. */
176 struct list_head vif_list;
178 /* power management status cookie from firmware */
180 dma_addr_t cookie_dma;
187 * Running count of TX packets in flight, to avoid
188 * iterating over the transmit rings each time.
192 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
193 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
196 bool radio_short_preamble;
197 bool sniffer_enabled;
200 /* XXX need to convert this to handle multiple interfaces */
202 u8 capture_bssid[ETH_ALEN];
203 struct sk_buff *beacon_skb;
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
211 struct work_struct finalize_join_worker;
213 /* Tasklet to perform TX reclaim. */
214 struct tasklet_struct poll_tx_task;
216 /* Tasklet to perform RX. */
217 struct tasklet_struct poll_rx_task;
219 /* Most recently reported noise in dBm */
223 * preserve the queue configurations so they can be restored if/when
224 * the firmware image is swapped.
226 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
228 /* async firmware loading state */
232 struct completion firmware_loading_complete;
235 /* Per interface specific private data */
237 struct list_head list;
238 struct ieee80211_vif *vif;
240 /* Firmware macid for this vif. */
243 /* Non AMPDU sequence number assigned by driver. */
246 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
249 /* Index into station database. Returned by UPDATE_STADB. */
252 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
254 static const struct ieee80211_channel mwl8k_channels_24[] = {
255 { .center_freq = 2412, .hw_value = 1, },
256 { .center_freq = 2417, .hw_value = 2, },
257 { .center_freq = 2422, .hw_value = 3, },
258 { .center_freq = 2427, .hw_value = 4, },
259 { .center_freq = 2432, .hw_value = 5, },
260 { .center_freq = 2437, .hw_value = 6, },
261 { .center_freq = 2442, .hw_value = 7, },
262 { .center_freq = 2447, .hw_value = 8, },
263 { .center_freq = 2452, .hw_value = 9, },
264 { .center_freq = 2457, .hw_value = 10, },
265 { .center_freq = 2462, .hw_value = 11, },
266 { .center_freq = 2467, .hw_value = 12, },
267 { .center_freq = 2472, .hw_value = 13, },
268 { .center_freq = 2484, .hw_value = 14, },
271 static const struct ieee80211_rate mwl8k_rates_24[] = {
272 { .bitrate = 10, .hw_value = 2, },
273 { .bitrate = 20, .hw_value = 4, },
274 { .bitrate = 55, .hw_value = 11, },
275 { .bitrate = 110, .hw_value = 22, },
276 { .bitrate = 220, .hw_value = 44, },
277 { .bitrate = 60, .hw_value = 12, },
278 { .bitrate = 90, .hw_value = 18, },
279 { .bitrate = 120, .hw_value = 24, },
280 { .bitrate = 180, .hw_value = 36, },
281 { .bitrate = 240, .hw_value = 48, },
282 { .bitrate = 360, .hw_value = 72, },
283 { .bitrate = 480, .hw_value = 96, },
284 { .bitrate = 540, .hw_value = 108, },
285 { .bitrate = 720, .hw_value = 144, },
288 static const struct ieee80211_channel mwl8k_channels_50[] = {
289 { .center_freq = 5180, .hw_value = 36, },
290 { .center_freq = 5200, .hw_value = 40, },
291 { .center_freq = 5220, .hw_value = 44, },
292 { .center_freq = 5240, .hw_value = 48, },
295 static const struct ieee80211_rate mwl8k_rates_50[] = {
296 { .bitrate = 60, .hw_value = 12, },
297 { .bitrate = 90, .hw_value = 18, },
298 { .bitrate = 120, .hw_value = 24, },
299 { .bitrate = 180, .hw_value = 36, },
300 { .bitrate = 240, .hw_value = 48, },
301 { .bitrate = 360, .hw_value = 72, },
302 { .bitrate = 480, .hw_value = 96, },
303 { .bitrate = 540, .hw_value = 108, },
304 { .bitrate = 720, .hw_value = 144, },
307 /* Set or get info from Firmware */
308 #define MWL8K_CMD_GET 0x0000
309 #define MWL8K_CMD_SET 0x0001
310 #define MWL8K_CMD_SET_LIST 0x0002
312 /* Firmware command codes */
313 #define MWL8K_CMD_CODE_DNLD 0x0001
314 #define MWL8K_CMD_GET_HW_SPEC 0x0003
315 #define MWL8K_CMD_SET_HW_SPEC 0x0004
316 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
317 #define MWL8K_CMD_GET_STAT 0x0014
318 #define MWL8K_CMD_RADIO_CONTROL 0x001c
319 #define MWL8K_CMD_RF_TX_POWER 0x001e
320 #define MWL8K_CMD_TX_POWER 0x001f
321 #define MWL8K_CMD_RF_ANTENNA 0x0020
322 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
323 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
324 #define MWL8K_CMD_SET_POST_SCAN 0x0108
325 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
326 #define MWL8K_CMD_SET_AID 0x010d
327 #define MWL8K_CMD_SET_RATE 0x0110
328 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
329 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
330 #define MWL8K_CMD_SET_SLOT 0x0114
331 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
332 #define MWL8K_CMD_SET_WMM_MODE 0x0123
333 #define MWL8K_CMD_MIMO_CONFIG 0x0125
334 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
335 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
336 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
337 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
338 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
339 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
340 #define MWL8K_CMD_UPDATE_STADB 0x1123
342 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
344 u16 command = le16_to_cpu(cmd);
346 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
347 snprintf(buf, bufsize, "%s", #x);\
350 switch (command & ~0x8000) {
351 MWL8K_CMDNAME(CODE_DNLD);
352 MWL8K_CMDNAME(GET_HW_SPEC);
353 MWL8K_CMDNAME(SET_HW_SPEC);
354 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
355 MWL8K_CMDNAME(GET_STAT);
356 MWL8K_CMDNAME(RADIO_CONTROL);
357 MWL8K_CMDNAME(RF_TX_POWER);
358 MWL8K_CMDNAME(TX_POWER);
359 MWL8K_CMDNAME(RF_ANTENNA);
360 MWL8K_CMDNAME(SET_BEACON);
361 MWL8K_CMDNAME(SET_PRE_SCAN);
362 MWL8K_CMDNAME(SET_POST_SCAN);
363 MWL8K_CMDNAME(SET_RF_CHANNEL);
364 MWL8K_CMDNAME(SET_AID);
365 MWL8K_CMDNAME(SET_RATE);
366 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
367 MWL8K_CMDNAME(RTS_THRESHOLD);
368 MWL8K_CMDNAME(SET_SLOT);
369 MWL8K_CMDNAME(SET_EDCA_PARAMS);
370 MWL8K_CMDNAME(SET_WMM_MODE);
371 MWL8K_CMDNAME(MIMO_CONFIG);
372 MWL8K_CMDNAME(USE_FIXED_RATE);
373 MWL8K_CMDNAME(ENABLE_SNIFFER);
374 MWL8K_CMDNAME(SET_MAC_ADDR);
375 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
376 MWL8K_CMDNAME(BSS_START);
377 MWL8K_CMDNAME(SET_NEW_STN);
378 MWL8K_CMDNAME(UPDATE_STADB);
380 snprintf(buf, bufsize, "0x%x", cmd);
387 /* Hardware and firmware reset */
388 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
390 iowrite32(MWL8K_H2A_INT_RESET,
391 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
392 iowrite32(MWL8K_H2A_INT_RESET,
393 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
397 /* Release fw image */
398 static void mwl8k_release_fw(struct firmware **fw)
402 release_firmware(*fw);
406 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
408 mwl8k_release_fw(&priv->fw_ucode);
409 mwl8k_release_fw(&priv->fw_helper);
412 /* states for asynchronous f/w loading */
413 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
416 FW_STATE_LOADING_PREF,
417 FW_STATE_LOADING_ALT,
421 /* Request fw image */
422 static int mwl8k_request_fw(struct mwl8k_priv *priv,
423 const char *fname, struct firmware **fw,
426 /* release current image */
428 mwl8k_release_fw(fw);
431 return request_firmware_nowait(THIS_MODULE, 1, fname,
432 &priv->pdev->dev, GFP_KERNEL,
433 priv, mwl8k_fw_state_machine);
435 return request_firmware((const struct firmware **)fw,
436 fname, &priv->pdev->dev);
439 static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
442 struct mwl8k_device_info *di = priv->device_info;
445 if (di->helper_image != NULL) {
447 rc = mwl8k_request_fw(priv, di->helper_image,
448 &priv->fw_helper, true);
450 rc = mwl8k_request_fw(priv, di->helper_image,
451 &priv->fw_helper, false);
453 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
454 pci_name(priv->pdev), di->helper_image);
462 * if we get here, no helper image is needed. Skip the
463 * FW_STATE_INIT state.
465 priv->fw_state = FW_STATE_LOADING_PREF;
466 rc = mwl8k_request_fw(priv, fw_image,
470 rc = mwl8k_request_fw(priv, fw_image,
471 &priv->fw_ucode, false);
473 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
474 pci_name(priv->pdev), fw_image);
475 mwl8k_release_fw(&priv->fw_helper);
482 struct mwl8k_cmd_pkt {
495 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
497 void __iomem *regs = priv->regs;
501 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
502 if (pci_dma_mapping_error(priv->pdev, dma_addr))
505 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
506 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
507 iowrite32(MWL8K_H2A_INT_DOORBELL,
508 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
509 iowrite32(MWL8K_H2A_INT_DUMMY,
510 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
516 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
517 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
518 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
526 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
528 return loops ? 0 : -ETIMEDOUT;
531 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
532 const u8 *data, size_t length)
534 struct mwl8k_cmd_pkt *cmd;
538 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
542 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
549 int block_size = length > 256 ? 256 : length;
551 memcpy(cmd->payload, data + done, block_size);
552 cmd->length = cpu_to_le16(block_size);
554 rc = mwl8k_send_fw_load_cmd(priv, cmd,
555 sizeof(*cmd) + block_size);
560 length -= block_size;
565 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
573 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
574 const u8 *data, size_t length)
576 unsigned char *buffer;
577 int may_continue, rc = 0;
578 u32 done, prev_block_size;
580 buffer = kmalloc(1024, GFP_KERNEL);
587 while (may_continue > 0) {
590 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
591 if (block_size & 1) {
595 done += prev_block_size;
596 length -= prev_block_size;
599 if (block_size > 1024 || block_size > length) {
609 if (block_size == 0) {
616 prev_block_size = block_size;
617 memcpy(buffer, data + done, block_size);
619 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
624 if (!rc && length != 0)
632 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
634 struct mwl8k_priv *priv = hw->priv;
635 struct firmware *fw = priv->fw_ucode;
639 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
640 struct firmware *helper = priv->fw_helper;
642 if (helper == NULL) {
643 printk(KERN_ERR "%s: helper image needed but none "
644 "given\n", pci_name(priv->pdev));
648 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
650 printk(KERN_ERR "%s: unable to load firmware "
651 "helper image\n", pci_name(priv->pdev));
656 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
658 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
662 printk(KERN_ERR "%s: unable to load firmware image\n",
663 pci_name(priv->pdev));
667 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
673 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
674 if (ready_code == MWL8K_FWAP_READY) {
677 } else if (ready_code == MWL8K_FWSTA_READY) {
686 return loops ? 0 : -ETIMEDOUT;
690 /* DMA header used by firmware and hardware. */
691 struct mwl8k_dma_data {
693 struct ieee80211_hdr wh;
697 /* Routines to add/remove DMA header from skb. */
698 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
700 struct mwl8k_dma_data *tr;
703 tr = (struct mwl8k_dma_data *)skb->data;
704 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
706 if (hdrlen != sizeof(tr->wh)) {
707 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
708 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
709 *((__le16 *)(tr->data - 2)) = qos;
711 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
715 if (hdrlen != sizeof(*tr))
716 skb_pull(skb, sizeof(*tr) - hdrlen);
719 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
721 struct ieee80211_hdr *wh;
723 struct mwl8k_dma_data *tr;
726 * Add a firmware DMA header; the firmware requires that we
727 * present a 2-byte payload length followed by a 4-address
728 * header (without QoS field), followed (optionally) by any
729 * WEP/ExtIV header (but only filled in for CCMP).
731 wh = (struct ieee80211_hdr *)skb->data;
733 hdrlen = ieee80211_hdrlen(wh->frame_control);
734 if (hdrlen != sizeof(*tr))
735 skb_push(skb, sizeof(*tr) - hdrlen);
737 if (ieee80211_is_data_qos(wh->frame_control))
740 tr = (struct mwl8k_dma_data *)skb->data;
742 memmove(&tr->wh, wh, hdrlen);
743 if (hdrlen != sizeof(tr->wh))
744 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
747 * Firmware length is the length of the fully formed "802.11
748 * payload". That is, everything except for the 802.11 header.
749 * This includes all crypto material including the MIC.
751 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
756 * Packet reception for 88w8366 AP firmware.
758 struct mwl8k_rxd_8366_ap {
762 __le32 pkt_phys_addr;
763 __le32 next_rxd_phys_addr;
767 __le32 hw_noise_floor_info;
776 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
777 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
778 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
780 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
782 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
784 struct mwl8k_rxd_8366_ap *rxd = _rxd;
786 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
787 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
790 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
792 struct mwl8k_rxd_8366_ap *rxd = _rxd;
794 rxd->pkt_len = cpu_to_le16(len);
795 rxd->pkt_phys_addr = cpu_to_le32(addr);
801 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
802 __le16 *qos, s8 *noise)
804 struct mwl8k_rxd_8366_ap *rxd = _rxd;
806 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
810 memset(status, 0, sizeof(*status));
812 status->signal = -rxd->rssi;
813 *noise = -rxd->noise_floor;
815 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
816 status->flag |= RX_FLAG_HT;
817 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
818 status->flag |= RX_FLAG_40MHZ;
819 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
823 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
824 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
825 status->rate_idx = i;
831 if (rxd->channel > 14) {
832 status->band = IEEE80211_BAND_5GHZ;
833 if (!(status->flag & RX_FLAG_HT))
834 status->rate_idx -= 5;
836 status->band = IEEE80211_BAND_2GHZ;
838 status->freq = ieee80211_channel_to_frequency(rxd->channel);
840 *qos = rxd->qos_control;
842 return le16_to_cpu(rxd->pkt_len);
845 static struct rxd_ops rxd_8366_ap_ops = {
846 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
847 .rxd_init = mwl8k_rxd_8366_ap_init,
848 .rxd_refill = mwl8k_rxd_8366_ap_refill,
849 .rxd_process = mwl8k_rxd_8366_ap_process,
853 * Packet reception for STA firmware.
855 struct mwl8k_rxd_sta {
859 __le32 pkt_phys_addr;
860 __le32 next_rxd_phys_addr;
872 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
873 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
874 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
875 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
876 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
877 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
879 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
881 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
883 struct mwl8k_rxd_sta *rxd = _rxd;
885 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
886 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
889 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
891 struct mwl8k_rxd_sta *rxd = _rxd;
893 rxd->pkt_len = cpu_to_le16(len);
894 rxd->pkt_phys_addr = cpu_to_le32(addr);
900 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
901 __le16 *qos, s8 *noise)
903 struct mwl8k_rxd_sta *rxd = _rxd;
906 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
910 rate_info = le16_to_cpu(rxd->rate_info);
912 memset(status, 0, sizeof(*status));
914 status->signal = -rxd->rssi;
915 *noise = -rxd->noise_level;
916 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
917 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
919 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
920 status->flag |= RX_FLAG_SHORTPRE;
921 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
922 status->flag |= RX_FLAG_40MHZ;
923 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
924 status->flag |= RX_FLAG_SHORT_GI;
925 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
926 status->flag |= RX_FLAG_HT;
928 if (rxd->channel > 14) {
929 status->band = IEEE80211_BAND_5GHZ;
930 if (!(status->flag & RX_FLAG_HT))
931 status->rate_idx -= 5;
933 status->band = IEEE80211_BAND_2GHZ;
935 status->freq = ieee80211_channel_to_frequency(rxd->channel);
937 *qos = rxd->qos_control;
939 return le16_to_cpu(rxd->pkt_len);
942 static struct rxd_ops rxd_sta_ops = {
943 .rxd_size = sizeof(struct mwl8k_rxd_sta),
944 .rxd_init = mwl8k_rxd_sta_init,
945 .rxd_refill = mwl8k_rxd_sta_refill,
946 .rxd_process = mwl8k_rxd_sta_process,
950 #define MWL8K_RX_DESCS 256
951 #define MWL8K_RX_MAXSZ 3800
953 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
955 struct mwl8k_priv *priv = hw->priv;
956 struct mwl8k_rx_queue *rxq = priv->rxq + index;
964 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
966 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
967 if (rxq->rxd == NULL) {
968 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
971 memset(rxq->rxd, 0, size);
973 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
974 if (rxq->buf == NULL) {
975 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
976 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
979 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
981 for (i = 0; i < MWL8K_RX_DESCS; i++) {
985 dma_addr_t next_dma_addr;
987 desc_size = priv->rxd_ops->rxd_size;
988 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
991 if (nexti == MWL8K_RX_DESCS)
993 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
995 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
1001 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1003 struct mwl8k_priv *priv = hw->priv;
1004 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1008 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
1009 struct sk_buff *skb;
1014 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1018 addr = pci_map_single(priv->pdev, skb->data,
1019 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
1023 if (rxq->tail == MWL8K_RX_DESCS)
1025 rxq->buf[rx].skb = skb;
1026 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
1028 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1029 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
1037 /* Must be called only when the card's reception is completely halted */
1038 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1040 struct mwl8k_priv *priv = hw->priv;
1041 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1044 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1045 if (rxq->buf[i].skb != NULL) {
1046 pci_unmap_single(priv->pdev,
1047 dma_unmap_addr(&rxq->buf[i], dma),
1048 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1049 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
1051 kfree_skb(rxq->buf[i].skb);
1052 rxq->buf[i].skb = NULL;
1059 pci_free_consistent(priv->pdev,
1060 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1061 rxq->rxd, rxq->rxd_dma);
1067 * Scan a list of BSSIDs to process for finalize join.
1068 * Allows for extension to process multiple BSSIDs.
1071 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1073 return priv->capture_beacon &&
1074 ieee80211_is_beacon(wh->frame_control) &&
1075 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1078 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1079 struct sk_buff *skb)
1081 struct mwl8k_priv *priv = hw->priv;
1083 priv->capture_beacon = false;
1084 memset(priv->capture_bssid, 0, ETH_ALEN);
1087 * Use GFP_ATOMIC as rxq_process is called from
1088 * the primary interrupt handler, memory allocation call
1091 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1092 if (priv->beacon_skb != NULL)
1093 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1096 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1098 struct mwl8k_priv *priv = hw->priv;
1099 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1103 while (rxq->rxd_count && limit--) {
1104 struct sk_buff *skb;
1107 struct ieee80211_rx_status status;
1110 skb = rxq->buf[rxq->head].skb;
1114 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1116 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1121 rxq->buf[rxq->head].skb = NULL;
1123 pci_unmap_single(priv->pdev,
1124 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1125 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1126 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1129 if (rxq->head == MWL8K_RX_DESCS)
1134 skb_put(skb, pkt_len);
1135 mwl8k_remove_dma_header(skb, qos);
1138 * Check for a pending join operation. Save a
1139 * copy of the beacon and schedule a tasklet to
1140 * send a FINALIZE_JOIN command to the firmware.
1142 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1143 mwl8k_save_beacon(hw, skb);
1145 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1146 ieee80211_rx_irqsafe(hw, skb);
1156 * Packet transmission.
1159 #define MWL8K_TXD_STATUS_OK 0x00000001
1160 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1161 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1162 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1163 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1165 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1166 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1167 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1168 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1169 #define MWL8K_QOS_EOSP 0x0010
1171 struct mwl8k_tx_desc {
1176 __le32 pkt_phys_addr;
1178 __u8 dest_MAC_addr[ETH_ALEN];
1179 __le32 next_txd_phys_addr;
1186 #define MWL8K_TX_DESCS 128
1188 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1190 struct mwl8k_priv *priv = hw->priv;
1191 struct mwl8k_tx_queue *txq = priv->txq + index;
1199 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1201 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1202 if (txq->txd == NULL) {
1203 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
1206 memset(txq->txd, 0, size);
1208 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1209 if (txq->skb == NULL) {
1210 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
1211 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1214 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1216 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1217 struct mwl8k_tx_desc *tx_desc;
1220 tx_desc = txq->txd + i;
1221 nexti = (i + 1) % MWL8K_TX_DESCS;
1223 tx_desc->status = 0;
1224 tx_desc->next_txd_phys_addr =
1225 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1231 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1233 iowrite32(MWL8K_H2A_INT_PPA_READY,
1234 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1235 iowrite32(MWL8K_H2A_INT_DUMMY,
1236 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1237 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1240 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1242 struct mwl8k_priv *priv = hw->priv;
1245 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1246 struct mwl8k_tx_queue *txq = priv->txq + i;
1252 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1253 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1256 status = le32_to_cpu(tx_desc->status);
1257 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1262 if (tx_desc->pkt_len == 0)
1266 wiphy_err(hw->wiphy,
1267 "txq[%d] len=%d head=%d tail=%d "
1268 "fw_owned=%d drv_owned=%d unused=%d\n",
1270 txq->len, txq->head, txq->tail,
1271 fw_owned, drv_owned, unused);
1276 * Must be called with priv->fw_mutex held and tx queues stopped.
1278 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1280 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1282 struct mwl8k_priv *priv = hw->priv;
1283 DECLARE_COMPLETION_ONSTACK(tx_wait);
1290 * The TX queues are stopped at this point, so this test
1291 * doesn't need to take ->tx_lock.
1293 if (!priv->pending_tx_pkts)
1299 spin_lock_bh(&priv->tx_lock);
1300 priv->tx_wait = &tx_wait;
1303 unsigned long timeout;
1305 oldcount = priv->pending_tx_pkts;
1307 spin_unlock_bh(&priv->tx_lock);
1308 timeout = wait_for_completion_timeout(&tx_wait,
1309 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1310 spin_lock_bh(&priv->tx_lock);
1313 WARN_ON(priv->pending_tx_pkts);
1315 wiphy_notice(hw->wiphy, "tx rings drained\n");
1320 if (priv->pending_tx_pkts < oldcount) {
1321 wiphy_notice(hw->wiphy,
1322 "waiting for tx rings to drain (%d -> %d pkts)\n",
1323 oldcount, priv->pending_tx_pkts);
1328 priv->tx_wait = NULL;
1330 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1331 MWL8K_TX_WAIT_TIMEOUT_MS);
1332 mwl8k_dump_tx_rings(hw);
1336 spin_unlock_bh(&priv->tx_lock);
1341 #define MWL8K_TXD_SUCCESS(status) \
1342 ((status) & (MWL8K_TXD_STATUS_OK | \
1343 MWL8K_TXD_STATUS_OK_RETRY | \
1344 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1347 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1349 struct mwl8k_priv *priv = hw->priv;
1350 struct mwl8k_tx_queue *txq = priv->txq + index;
1354 while (txq->len > 0 && limit--) {
1356 struct mwl8k_tx_desc *tx_desc;
1359 struct sk_buff *skb;
1360 struct ieee80211_tx_info *info;
1364 tx_desc = txq->txd + tx;
1366 status = le32_to_cpu(tx_desc->status);
1368 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1372 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1375 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1376 BUG_ON(txq->len == 0);
1378 priv->pending_tx_pkts--;
1380 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1381 size = le16_to_cpu(tx_desc->pkt_len);
1383 txq->skb[tx] = NULL;
1385 BUG_ON(skb == NULL);
1386 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1388 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1390 /* Mark descriptor as unused */
1391 tx_desc->pkt_phys_addr = 0;
1392 tx_desc->pkt_len = 0;
1394 info = IEEE80211_SKB_CB(skb);
1395 ieee80211_tx_info_clear_status(info);
1396 if (MWL8K_TXD_SUCCESS(status))
1397 info->flags |= IEEE80211_TX_STAT_ACK;
1399 ieee80211_tx_status_irqsafe(hw, skb);
1404 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1405 ieee80211_wake_queue(hw, index);
1410 /* must be called only when the card's transmit is completely halted */
1411 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1413 struct mwl8k_priv *priv = hw->priv;
1414 struct mwl8k_tx_queue *txq = priv->txq + index;
1416 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1421 pci_free_consistent(priv->pdev,
1422 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1423 txq->txd, txq->txd_dma);
1428 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1430 struct mwl8k_priv *priv = hw->priv;
1431 struct ieee80211_tx_info *tx_info;
1432 struct mwl8k_vif *mwl8k_vif;
1433 struct ieee80211_hdr *wh;
1434 struct mwl8k_tx_queue *txq;
1435 struct mwl8k_tx_desc *tx;
1441 wh = (struct ieee80211_hdr *)skb->data;
1442 if (ieee80211_is_data_qos(wh->frame_control))
1443 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1447 mwl8k_add_dma_header(skb);
1448 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1450 tx_info = IEEE80211_SKB_CB(skb);
1451 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1453 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1454 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1455 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1456 mwl8k_vif->seqno += 0x10;
1459 /* Setup firmware control bit fields for each frame type. */
1462 if (ieee80211_is_mgmt(wh->frame_control) ||
1463 ieee80211_is_ctl(wh->frame_control)) {
1465 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1466 } else if (ieee80211_is_data(wh->frame_control)) {
1468 if (is_multicast_ether_addr(wh->addr1))
1469 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1471 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1472 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1473 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1475 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1478 dma = pci_map_single(priv->pdev, skb->data,
1479 skb->len, PCI_DMA_TODEVICE);
1481 if (pci_dma_mapping_error(priv->pdev, dma)) {
1482 wiphy_debug(hw->wiphy,
1483 "failed to dma map skb, dropping TX frame.\n");
1485 return NETDEV_TX_OK;
1488 spin_lock_bh(&priv->tx_lock);
1490 txq = priv->txq + index;
1492 BUG_ON(txq->skb[txq->tail] != NULL);
1493 txq->skb[txq->tail] = skb;
1495 tx = txq->txd + txq->tail;
1496 tx->data_rate = txdatarate;
1497 tx->tx_priority = index;
1498 tx->qos_control = cpu_to_le16(qos);
1499 tx->pkt_phys_addr = cpu_to_le32(dma);
1500 tx->pkt_len = cpu_to_le16(skb->len);
1502 if (!priv->ap_fw && tx_info->control.sta != NULL)
1503 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1507 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1510 priv->pending_tx_pkts++;
1513 if (txq->tail == MWL8K_TX_DESCS)
1516 if (txq->head == txq->tail)
1517 ieee80211_stop_queue(hw, index);
1519 mwl8k_tx_start(priv);
1521 spin_unlock_bh(&priv->tx_lock);
1523 return NETDEV_TX_OK;
1530 * We have the following requirements for issuing firmware commands:
1531 * - Some commands require that the packet transmit path is idle when
1532 * the command is issued. (For simplicity, we'll just quiesce the
1533 * transmit path for every command.)
1534 * - There are certain sequences of commands that need to be issued to
1535 * the hardware sequentially, with no other intervening commands.
1537 * This leads to an implementation of a "firmware lock" as a mutex that
1538 * can be taken recursively, and which is taken by both the low-level
1539 * command submission function (mwl8k_post_cmd) as well as any users of
1540 * that function that require issuing of an atomic sequence of commands,
1541 * and quiesces the transmit path whenever it's taken.
1543 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1545 struct mwl8k_priv *priv = hw->priv;
1547 if (priv->fw_mutex_owner != current) {
1550 mutex_lock(&priv->fw_mutex);
1551 ieee80211_stop_queues(hw);
1553 rc = mwl8k_tx_wait_empty(hw);
1555 ieee80211_wake_queues(hw);
1556 mutex_unlock(&priv->fw_mutex);
1561 priv->fw_mutex_owner = current;
1564 priv->fw_mutex_depth++;
1569 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1571 struct mwl8k_priv *priv = hw->priv;
1573 if (!--priv->fw_mutex_depth) {
1574 ieee80211_wake_queues(hw);
1575 priv->fw_mutex_owner = NULL;
1576 mutex_unlock(&priv->fw_mutex);
1582 * Command processing.
1585 /* Timeout firmware commands after 10s */
1586 #define MWL8K_CMD_TIMEOUT_MS 10000
1588 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1590 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1591 struct mwl8k_priv *priv = hw->priv;
1592 void __iomem *regs = priv->regs;
1593 dma_addr_t dma_addr;
1594 unsigned int dma_size;
1596 unsigned long timeout = 0;
1599 cmd->result = (__force __le16) 0xffff;
1600 dma_size = le16_to_cpu(cmd->length);
1601 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1602 PCI_DMA_BIDIRECTIONAL);
1603 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1606 rc = mwl8k_fw_lock(hw);
1608 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1609 PCI_DMA_BIDIRECTIONAL);
1613 priv->hostcmd_wait = &cmd_wait;
1614 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1615 iowrite32(MWL8K_H2A_INT_DOORBELL,
1616 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1617 iowrite32(MWL8K_H2A_INT_DUMMY,
1618 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1620 timeout = wait_for_completion_timeout(&cmd_wait,
1621 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1623 priv->hostcmd_wait = NULL;
1625 mwl8k_fw_unlock(hw);
1627 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1628 PCI_DMA_BIDIRECTIONAL);
1631 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
1632 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1633 MWL8K_CMD_TIMEOUT_MS);
1638 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1640 rc = cmd->result ? -EINVAL : 0;
1642 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
1643 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1644 le16_to_cpu(cmd->result));
1646 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
1647 mwl8k_cmd_name(cmd->code,
1655 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1656 struct ieee80211_vif *vif,
1657 struct mwl8k_cmd_pkt *cmd)
1660 cmd->macid = MWL8K_VIF(vif)->macid;
1661 return mwl8k_post_cmd(hw, cmd);
1665 * Setup code shared between STA and AP firmware images.
1667 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1669 struct mwl8k_priv *priv = hw->priv;
1671 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1672 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1674 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1675 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1677 priv->band_24.band = IEEE80211_BAND_2GHZ;
1678 priv->band_24.channels = priv->channels_24;
1679 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1680 priv->band_24.bitrates = priv->rates_24;
1681 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1683 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1686 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1688 struct mwl8k_priv *priv = hw->priv;
1690 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1691 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1693 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1694 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1696 priv->band_50.band = IEEE80211_BAND_5GHZ;
1697 priv->band_50.channels = priv->channels_50;
1698 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1699 priv->band_50.bitrates = priv->rates_50;
1700 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1702 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1706 * CMD_GET_HW_SPEC (STA version).
1708 struct mwl8k_cmd_get_hw_spec_sta {
1709 struct mwl8k_cmd_pkt header;
1711 __u8 host_interface;
1713 __u8 perm_addr[ETH_ALEN];
1718 __u8 mcs_bitmap[16];
1719 __le32 rx_queue_ptr;
1720 __le32 num_tx_queues;
1721 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1723 __le32 num_tx_desc_per_queue;
1727 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1728 #define MWL8K_CAP_GREENFIELD 0x08000000
1729 #define MWL8K_CAP_AMPDU 0x04000000
1730 #define MWL8K_CAP_RX_STBC 0x01000000
1731 #define MWL8K_CAP_TX_STBC 0x00800000
1732 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1733 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1734 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1735 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1736 #define MWL8K_CAP_DELAY_BA 0x00003000
1737 #define MWL8K_CAP_MIMO 0x00000200
1738 #define MWL8K_CAP_40MHZ 0x00000100
1739 #define MWL8K_CAP_BAND_MASK 0x00000007
1740 #define MWL8K_CAP_5GHZ 0x00000004
1741 #define MWL8K_CAP_2GHZ4 0x00000001
1744 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1745 struct ieee80211_supported_band *band, u32 cap)
1750 band->ht_cap.ht_supported = 1;
1752 if (cap & MWL8K_CAP_MAX_AMSDU)
1753 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1754 if (cap & MWL8K_CAP_GREENFIELD)
1755 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1756 if (cap & MWL8K_CAP_AMPDU) {
1757 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1758 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1759 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1761 if (cap & MWL8K_CAP_RX_STBC)
1762 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1763 if (cap & MWL8K_CAP_TX_STBC)
1764 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1765 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1766 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1767 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1768 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1769 if (cap & MWL8K_CAP_DELAY_BA)
1770 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1771 if (cap & MWL8K_CAP_40MHZ)
1772 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1774 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1775 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1777 band->ht_cap.mcs.rx_mask[0] = 0xff;
1778 if (rx_streams >= 2)
1779 band->ht_cap.mcs.rx_mask[1] = 0xff;
1780 if (rx_streams >= 3)
1781 band->ht_cap.mcs.rx_mask[2] = 0xff;
1782 band->ht_cap.mcs.rx_mask[4] = 0x01;
1783 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1785 if (rx_streams != tx_streams) {
1786 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1787 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1788 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1793 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1795 struct mwl8k_priv *priv = hw->priv;
1797 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1798 mwl8k_setup_2ghz_band(hw);
1799 if (caps & MWL8K_CAP_MIMO)
1800 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1803 if (caps & MWL8K_CAP_5GHZ) {
1804 mwl8k_setup_5ghz_band(hw);
1805 if (caps & MWL8K_CAP_MIMO)
1806 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1810 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1812 struct mwl8k_priv *priv = hw->priv;
1813 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1817 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1821 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1822 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1824 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1825 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1826 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1827 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1828 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1829 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1830 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1831 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1833 rc = mwl8k_post_cmd(hw, &cmd->header);
1836 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1837 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1838 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1839 priv->hw_rev = cmd->hw_rev;
1840 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1841 priv->ap_macids_supported = 0x00000000;
1842 priv->sta_macids_supported = 0x00000001;
1850 * CMD_GET_HW_SPEC (AP version).
1852 struct mwl8k_cmd_get_hw_spec_ap {
1853 struct mwl8k_cmd_pkt header;
1855 __u8 host_interface;
1858 __u8 perm_addr[ETH_ALEN];
1869 __le32 fw_api_version;
1872 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1874 struct mwl8k_priv *priv = hw->priv;
1875 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1879 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1883 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1884 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1886 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1887 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1889 rc = mwl8k_post_cmd(hw, &cmd->header);
1894 api_version = le32_to_cpu(cmd->fw_api_version);
1895 if (priv->device_info->fw_api_ap != api_version) {
1896 printk(KERN_ERR "%s: Unsupported fw API version for %s."
1897 " Expected %d got %d.\n", MWL8K_NAME,
1898 priv->device_info->part_name,
1899 priv->device_info->fw_api_ap,
1904 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1905 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1906 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1907 priv->hw_rev = cmd->hw_rev;
1908 mwl8k_setup_2ghz_band(hw);
1909 priv->ap_macids_supported = 0x000000ff;
1910 priv->sta_macids_supported = 0x00000000;
1912 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1913 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
1915 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1916 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1918 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1919 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1921 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1922 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
1924 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1925 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
1927 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1928 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
1939 struct mwl8k_cmd_set_hw_spec {
1940 struct mwl8k_cmd_pkt header;
1942 __u8 host_interface;
1944 __u8 perm_addr[ETH_ALEN];
1949 __le32 rx_queue_ptr;
1950 __le32 num_tx_queues;
1951 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1953 __le32 num_tx_desc_per_queue;
1957 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1958 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1959 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1961 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1963 struct mwl8k_priv *priv = hw->priv;
1964 struct mwl8k_cmd_set_hw_spec *cmd;
1968 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1972 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1973 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1975 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1976 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1977 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1978 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1979 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1980 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1981 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1982 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1983 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1984 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1986 rc = mwl8k_post_cmd(hw, &cmd->header);
1993 * CMD_MAC_MULTICAST_ADR.
1995 struct mwl8k_cmd_mac_multicast_adr {
1996 struct mwl8k_cmd_pkt header;
1999 __u8 addr[0][ETH_ALEN];
2002 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
2003 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
2004 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2005 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
2007 static struct mwl8k_cmd_pkt *
2008 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
2009 struct netdev_hw_addr_list *mc_list)
2011 struct mwl8k_priv *priv = hw->priv;
2012 struct mwl8k_cmd_mac_multicast_adr *cmd;
2017 mc_count = netdev_hw_addr_list_count(mc_list);
2019 if (allmulti || mc_count > priv->num_mcaddrs) {
2024 size = sizeof(*cmd) + mc_count * ETH_ALEN;
2026 cmd = kzalloc(size, GFP_ATOMIC);
2030 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2031 cmd->header.length = cpu_to_le16(size);
2032 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2033 MWL8K_ENABLE_RX_BROADCAST);
2036 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2037 } else if (mc_count) {
2038 struct netdev_hw_addr *ha;
2041 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2042 cmd->numaddr = cpu_to_le16(mc_count);
2043 netdev_hw_addr_list_for_each(ha, mc_list) {
2044 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
2048 return &cmd->header;
2054 struct mwl8k_cmd_get_stat {
2055 struct mwl8k_cmd_pkt header;
2059 #define MWL8K_STAT_ACK_FAILURE 9
2060 #define MWL8K_STAT_RTS_FAILURE 12
2061 #define MWL8K_STAT_FCS_ERROR 24
2062 #define MWL8K_STAT_RTS_SUCCESS 11
2064 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2065 struct ieee80211_low_level_stats *stats)
2067 struct mwl8k_cmd_get_stat *cmd;
2070 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2074 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2075 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2077 rc = mwl8k_post_cmd(hw, &cmd->header);
2079 stats->dot11ACKFailureCount =
2080 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2081 stats->dot11RTSFailureCount =
2082 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2083 stats->dot11FCSErrorCount =
2084 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2085 stats->dot11RTSSuccessCount =
2086 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2094 * CMD_RADIO_CONTROL.
2096 struct mwl8k_cmd_radio_control {
2097 struct mwl8k_cmd_pkt header;
2104 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2106 struct mwl8k_priv *priv = hw->priv;
2107 struct mwl8k_cmd_radio_control *cmd;
2110 if (enable == priv->radio_on && !force)
2113 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2117 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2118 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2119 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2120 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2121 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2123 rc = mwl8k_post_cmd(hw, &cmd->header);
2127 priv->radio_on = enable;
2132 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2134 return mwl8k_cmd_radio_control(hw, 0, 0);
2137 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2139 return mwl8k_cmd_radio_control(hw, 1, 0);
2143 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2145 struct mwl8k_priv *priv = hw->priv;
2147 priv->radio_short_preamble = short_preamble;
2149 return mwl8k_cmd_radio_control(hw, 1, 1);
2155 #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
2157 struct mwl8k_cmd_rf_tx_power {
2158 struct mwl8k_cmd_pkt header;
2160 __le16 support_level;
2161 __le16 current_level;
2163 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
2166 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2168 struct mwl8k_cmd_rf_tx_power *cmd;
2171 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2175 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2176 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2177 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2178 cmd->support_level = cpu_to_le16(dBm);
2180 rc = mwl8k_post_cmd(hw, &cmd->header);
2189 #define MWL8K_TX_POWER_LEVEL_TOTAL 12
2191 struct mwl8k_cmd_tx_power {
2192 struct mwl8k_cmd_pkt header;
2198 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2199 } __attribute__((packed));
2201 static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2202 struct ieee80211_conf *conf,
2205 struct ieee80211_channel *channel = conf->channel;
2206 struct mwl8k_cmd_tx_power *cmd;
2210 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2214 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2215 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2216 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2218 if (channel->band == IEEE80211_BAND_2GHZ)
2219 cmd->band = cpu_to_le16(0x1);
2220 else if (channel->band == IEEE80211_BAND_5GHZ)
2221 cmd->band = cpu_to_le16(0x4);
2223 cmd->channel = channel->hw_value;
2225 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2226 conf->channel_type == NL80211_CHAN_HT20) {
2227 cmd->bw = cpu_to_le16(0x2);
2229 cmd->bw = cpu_to_le16(0x4);
2230 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2231 cmd->sub_ch = cpu_to_le16(0x3);
2232 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2233 cmd->sub_ch = cpu_to_le16(0x1);
2236 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2237 cmd->power_level_list[i] = cpu_to_le16(pwr);
2239 rc = mwl8k_post_cmd(hw, &cmd->header);
2248 struct mwl8k_cmd_rf_antenna {
2249 struct mwl8k_cmd_pkt header;
2254 #define MWL8K_RF_ANTENNA_RX 1
2255 #define MWL8K_RF_ANTENNA_TX 2
2258 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2260 struct mwl8k_cmd_rf_antenna *cmd;
2263 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2267 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2268 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2269 cmd->antenna = cpu_to_le16(antenna);
2270 cmd->mode = cpu_to_le16(mask);
2272 rc = mwl8k_post_cmd(hw, &cmd->header);
2281 struct mwl8k_cmd_set_beacon {
2282 struct mwl8k_cmd_pkt header;
2287 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2288 struct ieee80211_vif *vif, u8 *beacon, int len)
2290 struct mwl8k_cmd_set_beacon *cmd;
2293 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2297 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2298 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2299 cmd->beacon_len = cpu_to_le16(len);
2300 memcpy(cmd->beacon, beacon, len);
2302 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2311 struct mwl8k_cmd_set_pre_scan {
2312 struct mwl8k_cmd_pkt header;
2315 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2317 struct mwl8k_cmd_set_pre_scan *cmd;
2320 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2324 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2325 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2327 rc = mwl8k_post_cmd(hw, &cmd->header);
2334 * CMD_SET_POST_SCAN.
2336 struct mwl8k_cmd_set_post_scan {
2337 struct mwl8k_cmd_pkt header;
2339 __u8 bssid[ETH_ALEN];
2343 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2345 struct mwl8k_cmd_set_post_scan *cmd;
2348 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2352 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2353 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2355 memcpy(cmd->bssid, mac, ETH_ALEN);
2357 rc = mwl8k_post_cmd(hw, &cmd->header);
2364 * CMD_SET_RF_CHANNEL.
2366 struct mwl8k_cmd_set_rf_channel {
2367 struct mwl8k_cmd_pkt header;
2369 __u8 current_channel;
2370 __le32 channel_flags;
2373 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2374 struct ieee80211_conf *conf)
2376 struct ieee80211_channel *channel = conf->channel;
2377 struct mwl8k_cmd_set_rf_channel *cmd;
2380 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2384 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2385 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2386 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2387 cmd->current_channel = channel->hw_value;
2389 if (channel->band == IEEE80211_BAND_2GHZ)
2390 cmd->channel_flags |= cpu_to_le32(0x00000001);
2391 else if (channel->band == IEEE80211_BAND_5GHZ)
2392 cmd->channel_flags |= cpu_to_le32(0x00000004);
2394 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2395 conf->channel_type == NL80211_CHAN_HT20)
2396 cmd->channel_flags |= cpu_to_le32(0x00000080);
2397 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2398 cmd->channel_flags |= cpu_to_le32(0x000001900);
2399 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2400 cmd->channel_flags |= cpu_to_le32(0x000000900);
2402 rc = mwl8k_post_cmd(hw, &cmd->header);
2411 #define MWL8K_FRAME_PROT_DISABLED 0x00
2412 #define MWL8K_FRAME_PROT_11G 0x07
2413 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2414 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2416 struct mwl8k_cmd_update_set_aid {
2417 struct mwl8k_cmd_pkt header;
2420 /* AP's MAC address (BSSID) */
2421 __u8 bssid[ETH_ALEN];
2422 __le16 protection_mode;
2423 __u8 supp_rates[14];
2426 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2432 * Clear nonstandard rates 4 and 13.
2436 for (i = 0, j = 0; i < 14; i++) {
2437 if (mask & (1 << i))
2438 rates[j++] = mwl8k_rates_24[i].hw_value;
2443 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2444 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2446 struct mwl8k_cmd_update_set_aid *cmd;
2450 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2454 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2455 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2456 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2457 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2459 if (vif->bss_conf.use_cts_prot) {
2460 prot_mode = MWL8K_FRAME_PROT_11G;
2462 switch (vif->bss_conf.ht_operation_mode &
2463 IEEE80211_HT_OP_MODE_PROTECTION) {
2464 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2465 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2467 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2468 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2471 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2475 cmd->protection_mode = cpu_to_le16(prot_mode);
2477 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2479 rc = mwl8k_post_cmd(hw, &cmd->header);
2488 struct mwl8k_cmd_set_rate {
2489 struct mwl8k_cmd_pkt header;
2490 __u8 legacy_rates[14];
2492 /* Bitmap for supported MCS codes. */
2498 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2499 u32 legacy_rate_mask, u8 *mcs_rates)
2501 struct mwl8k_cmd_set_rate *cmd;
2504 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2508 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2509 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2510 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2511 memcpy(cmd->mcs_set, mcs_rates, 16);
2513 rc = mwl8k_post_cmd(hw, &cmd->header);
2520 * CMD_FINALIZE_JOIN.
2522 #define MWL8K_FJ_BEACON_MAXLEN 128
2524 struct mwl8k_cmd_finalize_join {
2525 struct mwl8k_cmd_pkt header;
2526 __le32 sleep_interval; /* Number of beacon periods to sleep */
2527 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2530 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2531 int framelen, int dtim)
2533 struct mwl8k_cmd_finalize_join *cmd;
2534 struct ieee80211_mgmt *payload = frame;
2538 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2542 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2543 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2544 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2546 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2547 if (payload_len < 0)
2549 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2550 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2552 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2554 rc = mwl8k_post_cmd(hw, &cmd->header);
2561 * CMD_SET_RTS_THRESHOLD.
2563 struct mwl8k_cmd_set_rts_threshold {
2564 struct mwl8k_cmd_pkt header;
2570 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2572 struct mwl8k_cmd_set_rts_threshold *cmd;
2575 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2579 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2580 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2581 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2582 cmd->threshold = cpu_to_le16(rts_thresh);
2584 rc = mwl8k_post_cmd(hw, &cmd->header);
2593 struct mwl8k_cmd_set_slot {
2594 struct mwl8k_cmd_pkt header;
2599 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2601 struct mwl8k_cmd_set_slot *cmd;
2604 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2608 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2609 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2610 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2611 cmd->short_slot = short_slot_time;
2613 rc = mwl8k_post_cmd(hw, &cmd->header);
2620 * CMD_SET_EDCA_PARAMS.
2622 struct mwl8k_cmd_set_edca_params {
2623 struct mwl8k_cmd_pkt header;
2625 /* See MWL8K_SET_EDCA_XXX below */
2628 /* TX opportunity in units of 32 us */
2633 /* Log exponent of max contention period: 0...15 */
2636 /* Log exponent of min contention period: 0...15 */
2639 /* Adaptive interframe spacing in units of 32us */
2642 /* TX queue to configure */
2646 /* Log exponent of max contention period: 0...15 */
2649 /* Log exponent of min contention period: 0...15 */
2652 /* Adaptive interframe spacing in units of 32us */
2655 /* TX queue to configure */
2661 #define MWL8K_SET_EDCA_CW 0x01
2662 #define MWL8K_SET_EDCA_TXOP 0x02
2663 #define MWL8K_SET_EDCA_AIFS 0x04
2665 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2666 MWL8K_SET_EDCA_TXOP | \
2667 MWL8K_SET_EDCA_AIFS)
2670 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2671 __u16 cw_min, __u16 cw_max,
2672 __u8 aifs, __u16 txop)
2674 struct mwl8k_priv *priv = hw->priv;
2675 struct mwl8k_cmd_set_edca_params *cmd;
2678 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2682 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2683 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2684 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2685 cmd->txop = cpu_to_le16(txop);
2687 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2688 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2689 cmd->ap.aifs = aifs;
2692 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2693 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2694 cmd->sta.aifs = aifs;
2695 cmd->sta.txq = qnum;
2698 rc = mwl8k_post_cmd(hw, &cmd->header);
2707 struct mwl8k_cmd_set_wmm_mode {
2708 struct mwl8k_cmd_pkt header;
2712 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2714 struct mwl8k_priv *priv = hw->priv;
2715 struct mwl8k_cmd_set_wmm_mode *cmd;
2718 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2722 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2723 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2724 cmd->action = cpu_to_le16(!!enable);
2726 rc = mwl8k_post_cmd(hw, &cmd->header);
2730 priv->wmm_enabled = enable;
2738 struct mwl8k_cmd_mimo_config {
2739 struct mwl8k_cmd_pkt header;
2741 __u8 rx_antenna_map;
2742 __u8 tx_antenna_map;
2745 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2747 struct mwl8k_cmd_mimo_config *cmd;
2750 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2754 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2755 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2756 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2757 cmd->rx_antenna_map = rx;
2758 cmd->tx_antenna_map = tx;
2760 rc = mwl8k_post_cmd(hw, &cmd->header);
2767 * CMD_USE_FIXED_RATE (STA version).
2769 struct mwl8k_cmd_use_fixed_rate_sta {
2770 struct mwl8k_cmd_pkt header;
2772 __le32 allow_rate_drop;
2776 __le32 enable_retry;
2785 #define MWL8K_USE_AUTO_RATE 0x0002
2786 #define MWL8K_UCAST_RATE 0
2788 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2790 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2793 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2797 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2798 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2799 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2800 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2802 rc = mwl8k_post_cmd(hw, &cmd->header);
2809 * CMD_USE_FIXED_RATE (AP version).
2811 struct mwl8k_cmd_use_fixed_rate_ap {
2812 struct mwl8k_cmd_pkt header;
2814 __le32 allow_rate_drop;
2816 struct mwl8k_rate_entry_ap {
2818 __le32 enable_retry;
2823 u8 multicast_rate_type;
2828 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2830 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2833 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2837 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2838 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2839 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2840 cmd->multicast_rate = mcast;
2841 cmd->management_rate = mgmt;
2843 rc = mwl8k_post_cmd(hw, &cmd->header);
2850 * CMD_ENABLE_SNIFFER.
2852 struct mwl8k_cmd_enable_sniffer {
2853 struct mwl8k_cmd_pkt header;
2857 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2859 struct mwl8k_cmd_enable_sniffer *cmd;
2862 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2866 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2867 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2868 cmd->action = cpu_to_le32(!!enable);
2870 rc = mwl8k_post_cmd(hw, &cmd->header);
2879 struct mwl8k_cmd_set_mac_addr {
2880 struct mwl8k_cmd_pkt header;
2884 __u8 mac_addr[ETH_ALEN];
2886 __u8 mac_addr[ETH_ALEN];
2890 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2891 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2892 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2893 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2895 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2896 struct ieee80211_vif *vif, u8 *mac)
2898 struct mwl8k_priv *priv = hw->priv;
2899 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2900 struct mwl8k_cmd_set_mac_addr *cmd;
2904 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2905 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2906 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2907 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2909 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2910 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2911 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2912 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2914 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2917 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2921 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2922 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2924 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2925 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2927 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2930 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2937 * CMD_SET_RATEADAPT_MODE.
2939 struct mwl8k_cmd_set_rate_adapt_mode {
2940 struct mwl8k_cmd_pkt header;
2945 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2947 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2950 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2954 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2955 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2956 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2957 cmd->mode = cpu_to_le16(mode);
2959 rc = mwl8k_post_cmd(hw, &cmd->header);
2968 struct mwl8k_cmd_bss_start {
2969 struct mwl8k_cmd_pkt header;
2973 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2974 struct ieee80211_vif *vif, int enable)
2976 struct mwl8k_cmd_bss_start *cmd;
2979 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2983 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2984 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2985 cmd->enable = cpu_to_le32(enable);
2987 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2996 struct mwl8k_cmd_set_new_stn {
2997 struct mwl8k_cmd_pkt header;
3003 __le32 legacy_rates;
3006 __le16 ht_capabilities_info;
3007 __u8 mac_ht_param_info;
3009 __u8 control_channel;
3018 #define MWL8K_STA_ACTION_ADD 0
3019 #define MWL8K_STA_ACTION_REMOVE 2
3021 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3022 struct ieee80211_vif *vif,
3023 struct ieee80211_sta *sta)
3025 struct mwl8k_cmd_set_new_stn *cmd;
3029 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3033 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3034 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3035 cmd->aid = cpu_to_le16(sta->aid);
3036 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3037 cmd->stn_id = cpu_to_le16(sta->aid);
3038 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
3039 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3040 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3042 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3043 cmd->legacy_rates = cpu_to_le32(rates);
3044 if (sta->ht_cap.ht_supported) {
3045 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3046 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3047 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3048 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3049 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3050 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3051 ((sta->ht_cap.ampdu_density & 7) << 2);
3052 cmd->is_qos_sta = 1;
3055 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3061 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3062 struct ieee80211_vif *vif)
3064 struct mwl8k_cmd_set_new_stn *cmd;
3067 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3071 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3072 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3073 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3075 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3081 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3082 struct ieee80211_vif *vif, u8 *addr)
3084 struct mwl8k_cmd_set_new_stn *cmd;
3087 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3091 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3092 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3093 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3094 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3096 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3105 struct ewc_ht_info {
3111 struct peer_capability_info {
3112 /* Peer type - AP vs. STA. */
3115 /* Basic 802.11 capabilities from assoc resp. */
3118 /* Set if peer supports 802.11n high throughput (HT). */
3121 /* Valid if HT is supported. */
3123 __u8 extended_ht_caps;
3124 struct ewc_ht_info ewc_info;
3126 /* Legacy rate table. Intersection of our rates and peer rates. */
3127 __u8 legacy_rates[12];
3129 /* HT rate table. Intersection of our rates and peer rates. */
3133 /* If set, interoperability mode, no proprietary extensions. */
3137 __le16 amsdu_enabled;
3140 struct mwl8k_cmd_update_stadb {
3141 struct mwl8k_cmd_pkt header;
3143 /* See STADB_ACTION_TYPE */
3146 /* Peer MAC address */
3147 __u8 peer_addr[ETH_ALEN];
3151 /* Peer info - valid during add/update. */
3152 struct peer_capability_info peer_info;
3155 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3156 #define MWL8K_STA_DB_DEL_ENTRY 2
3158 /* Peer Entry flags - used to define the type of the peer node */
3159 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3161 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3162 struct ieee80211_vif *vif,
3163 struct ieee80211_sta *sta)
3165 struct mwl8k_cmd_update_stadb *cmd;
3166 struct peer_capability_info *p;
3170 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3174 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3175 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3176 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3177 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3179 p = &cmd->peer_info;
3180 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3181 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3182 p->ht_support = sta->ht_cap.ht_supported;
3183 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
3184 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3185 ((sta->ht_cap.ampdu_density & 7) << 2);
3186 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3187 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3189 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3190 legacy_rate_mask_to_array(p->legacy_rates, rates);
3191 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3193 p->amsdu_enabled = 0;
3195 rc = mwl8k_post_cmd(hw, &cmd->header);
3198 return rc ? rc : p->station_id;
3201 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3202 struct ieee80211_vif *vif, u8 *addr)
3204 struct mwl8k_cmd_update_stadb *cmd;
3207 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3211 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3212 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3213 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3214 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3216 rc = mwl8k_post_cmd(hw, &cmd->header);
3224 * Interrupt handling.
3226 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3228 struct ieee80211_hw *hw = dev_id;
3229 struct mwl8k_priv *priv = hw->priv;
3232 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3236 if (status & MWL8K_A2H_INT_TX_DONE) {
3237 status &= ~MWL8K_A2H_INT_TX_DONE;
3238 tasklet_schedule(&priv->poll_tx_task);
3241 if (status & MWL8K_A2H_INT_RX_READY) {
3242 status &= ~MWL8K_A2H_INT_RX_READY;
3243 tasklet_schedule(&priv->poll_rx_task);
3247 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3249 if (status & MWL8K_A2H_INT_OPC_DONE) {
3250 if (priv->hostcmd_wait != NULL)
3251 complete(priv->hostcmd_wait);
3254 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3255 if (!mutex_is_locked(&priv->fw_mutex) &&
3256 priv->radio_on && priv->pending_tx_pkts)
3257 mwl8k_tx_start(priv);
3263 static void mwl8k_tx_poll(unsigned long data)
3265 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3266 struct mwl8k_priv *priv = hw->priv;
3272 spin_lock_bh(&priv->tx_lock);
3274 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3275 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3277 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3278 complete(priv->tx_wait);
3279 priv->tx_wait = NULL;
3282 spin_unlock_bh(&priv->tx_lock);
3285 writel(~MWL8K_A2H_INT_TX_DONE,
3286 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3288 tasklet_schedule(&priv->poll_tx_task);
3292 static void mwl8k_rx_poll(unsigned long data)
3294 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3295 struct mwl8k_priv *priv = hw->priv;
3299 limit -= rxq_process(hw, 0, limit);
3300 limit -= rxq_refill(hw, 0, limit);
3303 writel(~MWL8K_A2H_INT_RX_READY,
3304 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3306 tasklet_schedule(&priv->poll_rx_task);
3312 * Core driver operations.
3314 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3316 struct mwl8k_priv *priv = hw->priv;
3317 int index = skb_get_queue_mapping(skb);
3320 if (!priv->radio_on) {
3321 wiphy_debug(hw->wiphy,
3322 "dropped TX frame since radio disabled\n");
3324 return NETDEV_TX_OK;
3327 rc = mwl8k_txq_xmit(hw, index, skb);
3332 static int mwl8k_start(struct ieee80211_hw *hw)
3334 struct mwl8k_priv *priv = hw->priv;
3337 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3338 IRQF_SHARED, MWL8K_NAME, hw);
3340 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
3344 /* Enable TX reclaim and RX tasklets. */
3345 tasklet_enable(&priv->poll_tx_task);
3346 tasklet_enable(&priv->poll_rx_task);
3348 /* Enable interrupts */
3349 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3351 rc = mwl8k_fw_lock(hw);
3353 rc = mwl8k_cmd_radio_enable(hw);
3357 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3360 rc = mwl8k_cmd_set_pre_scan(hw);
3363 rc = mwl8k_cmd_set_post_scan(hw,
3364 "\x00\x00\x00\x00\x00\x00");
3368 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3371 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3373 mwl8k_fw_unlock(hw);
3377 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3378 free_irq(priv->pdev->irq, hw);
3379 tasklet_disable(&priv->poll_tx_task);
3380 tasklet_disable(&priv->poll_rx_task);
3386 static void mwl8k_stop(struct ieee80211_hw *hw)
3388 struct mwl8k_priv *priv = hw->priv;
3391 mwl8k_cmd_radio_disable(hw);
3393 ieee80211_stop_queues(hw);
3395 /* Disable interrupts */
3396 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3397 free_irq(priv->pdev->irq, hw);
3399 /* Stop finalize join worker */
3400 cancel_work_sync(&priv->finalize_join_worker);
3401 if (priv->beacon_skb != NULL)
3402 dev_kfree_skb(priv->beacon_skb);
3404 /* Stop TX reclaim and RX tasklets. */
3405 tasklet_disable(&priv->poll_tx_task);
3406 tasklet_disable(&priv->poll_rx_task);
3408 /* Return all skbs to mac80211 */
3409 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3410 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3413 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
3415 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3416 struct ieee80211_vif *vif)
3418 struct mwl8k_priv *priv = hw->priv;
3419 struct mwl8k_vif *mwl8k_vif;
3420 u32 macids_supported;
3422 struct mwl8k_device_info *di;
3425 * Reject interface creation if sniffer mode is active, as
3426 * STA operation is mutually exclusive with hardware sniffer
3427 * mode. (Sniffer mode is only used on STA firmware.)
3429 if (priv->sniffer_enabled) {
3430 wiphy_info(hw->wiphy,
3431 "unable to create STA interface because sniffer mode is enabled\n");
3435 di = priv->device_info;
3436 switch (vif->type) {
3437 case NL80211_IFTYPE_AP:
3438 if (!priv->ap_fw && di->fw_image_ap) {
3439 /* we must load the ap fw to meet this request */
3440 if (!list_empty(&priv->vif_list))
3442 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
3446 macids_supported = priv->ap_macids_supported;
3448 case NL80211_IFTYPE_STATION:
3449 if (priv->ap_fw && di->fw_image_sta) {
3450 /* we must load the sta fw to meet this request */
3451 if (!list_empty(&priv->vif_list))
3453 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
3457 macids_supported = priv->sta_macids_supported;
3463 macid = ffs(macids_supported & ~priv->macids_used);
3467 /* Setup driver private area. */
3468 mwl8k_vif = MWL8K_VIF(vif);
3469 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3470 mwl8k_vif->vif = vif;
3471 mwl8k_vif->macid = macid;
3472 mwl8k_vif->seqno = 0;
3474 /* Set the mac address. */
3475 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3478 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3480 priv->macids_used |= 1 << mwl8k_vif->macid;
3481 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3486 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3487 struct ieee80211_vif *vif)
3489 struct mwl8k_priv *priv = hw->priv;
3490 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3493 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3495 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3497 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3498 list_del(&mwl8k_vif->list);
3501 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3503 struct ieee80211_conf *conf = &hw->conf;
3504 struct mwl8k_priv *priv = hw->priv;
3507 if (conf->flags & IEEE80211_CONF_IDLE) {
3508 mwl8k_cmd_radio_disable(hw);
3512 rc = mwl8k_fw_lock(hw);
3516 rc = mwl8k_cmd_radio_enable(hw);
3520 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3524 if (conf->power_level > 18)
3525 conf->power_level = 18;
3528 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
3532 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3534 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3536 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3539 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3543 mwl8k_fw_unlock(hw);
3549 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3550 struct ieee80211_bss_conf *info, u32 changed)
3552 struct mwl8k_priv *priv = hw->priv;
3553 u32 ap_legacy_rates;
3554 u8 ap_mcs_rates[16];
3557 if (mwl8k_fw_lock(hw))
3561 * No need to capture a beacon if we're no longer associated.
3563 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3564 priv->capture_beacon = false;
3567 * Get the AP's legacy and MCS rates.
3569 if (vif->bss_conf.assoc) {
3570 struct ieee80211_sta *ap;
3574 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3580 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3581 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3584 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3586 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3591 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3592 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3596 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3601 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3602 rc = mwl8k_set_radio_preamble(hw,
3603 vif->bss_conf.use_short_preamble);
3608 if (changed & BSS_CHANGED_ERP_SLOT) {
3609 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3614 if (vif->bss_conf.assoc &&
3615 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3617 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3622 if (vif->bss_conf.assoc &&
3623 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3625 * Finalize the join. Tell rx handler to process
3626 * next beacon from our BSSID.
3628 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3629 priv->capture_beacon = true;
3633 mwl8k_fw_unlock(hw);
3637 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3638 struct ieee80211_bss_conf *info, u32 changed)
3642 if (mwl8k_fw_lock(hw))
3645 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3646 rc = mwl8k_set_radio_preamble(hw,
3647 vif->bss_conf.use_short_preamble);
3652 if (changed & BSS_CHANGED_BASIC_RATES) {
3657 * Use lowest supported basic rate for multicasts
3658 * and management frames (such as probe responses --
3659 * beacons will always go out at 1 Mb/s).
3661 idx = ffs(vif->bss_conf.basic_rates);
3665 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3666 rate = mwl8k_rates_24[idx].hw_value;
3668 rate = mwl8k_rates_50[idx].hw_value;
3670 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3673 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3674 struct sk_buff *skb;
3676 skb = ieee80211_beacon_get(hw, vif);
3678 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3683 if (changed & BSS_CHANGED_BEACON_ENABLED)
3684 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3687 mwl8k_fw_unlock(hw);
3691 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3692 struct ieee80211_bss_conf *info, u32 changed)
3694 struct mwl8k_priv *priv = hw->priv;
3697 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3699 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3702 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3703 struct netdev_hw_addr_list *mc_list)
3705 struct mwl8k_cmd_pkt *cmd;
3708 * Synthesize and return a command packet that programs the
3709 * hardware multicast address filter. At this point we don't
3710 * know whether FIF_ALLMULTI is being requested, but if it is,
3711 * we'll end up throwing this packet away and creating a new
3712 * one in mwl8k_configure_filter().
3714 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
3716 return (unsigned long)cmd;
3720 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3721 unsigned int changed_flags,
3722 unsigned int *total_flags)
3724 struct mwl8k_priv *priv = hw->priv;
3727 * Hardware sniffer mode is mutually exclusive with STA
3728 * operation, so refuse to enable sniffer mode if a STA
3729 * interface is active.
3731 if (!list_empty(&priv->vif_list)) {
3732 if (net_ratelimit())
3733 wiphy_info(hw->wiphy,
3734 "not enabling sniffer mode because STA interface is active\n");
3738 if (!priv->sniffer_enabled) {
3739 if (mwl8k_cmd_enable_sniffer(hw, 1))
3741 priv->sniffer_enabled = true;
3744 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3745 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3751 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3753 if (!list_empty(&priv->vif_list))
3754 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3759 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3760 unsigned int changed_flags,
3761 unsigned int *total_flags,
3764 struct mwl8k_priv *priv = hw->priv;
3765 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3768 * AP firmware doesn't allow fine-grained control over
3769 * the receive filter.
3772 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3778 * Enable hardware sniffer mode if FIF_CONTROL or
3779 * FIF_OTHER_BSS is requested.
3781 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3782 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3787 /* Clear unsupported feature flags */
3788 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3790 if (mwl8k_fw_lock(hw)) {
3795 if (priv->sniffer_enabled) {
3796 mwl8k_cmd_enable_sniffer(hw, 0);
3797 priv->sniffer_enabled = false;
3800 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3801 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3803 * Disable the BSS filter.
3805 mwl8k_cmd_set_pre_scan(hw);
3807 struct mwl8k_vif *mwl8k_vif;
3811 * Enable the BSS filter.
3813 * If there is an active STA interface, use that
3814 * interface's BSSID, otherwise use a dummy one
3815 * (where the OUI part needs to be nonzero for
3816 * the BSSID to be accepted by POST_SCAN).
3818 mwl8k_vif = mwl8k_first_vif(priv);
3819 if (mwl8k_vif != NULL)
3820 bssid = mwl8k_vif->vif->bss_conf.bssid;
3822 bssid = "\x01\x00\x00\x00\x00\x00";
3824 mwl8k_cmd_set_post_scan(hw, bssid);
3829 * If FIF_ALLMULTI is being requested, throw away the command
3830 * packet that ->prepare_multicast() built and replace it with
3831 * a command packet that enables reception of all multicast
3834 if (*total_flags & FIF_ALLMULTI) {
3836 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
3840 mwl8k_post_cmd(hw, cmd);
3844 mwl8k_fw_unlock(hw);
3847 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3849 return mwl8k_cmd_set_rts_threshold(hw, value);
3852 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3853 struct ieee80211_vif *vif,
3854 struct ieee80211_sta *sta)
3856 struct mwl8k_priv *priv = hw->priv;
3859 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3861 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3864 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3865 struct ieee80211_vif *vif,
3866 struct ieee80211_sta *sta)
3868 struct mwl8k_priv *priv = hw->priv;
3872 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3874 MWL8K_STA(sta)->peer_id = ret;
3881 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3884 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3885 const struct ieee80211_tx_queue_params *params)
3887 struct mwl8k_priv *priv = hw->priv;
3890 rc = mwl8k_fw_lock(hw);
3892 BUG_ON(queue > MWL8K_TX_QUEUES - 1);
3893 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
3895 if (!priv->wmm_enabled)
3896 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3899 rc = mwl8k_cmd_set_edca_params(hw, queue,
3905 mwl8k_fw_unlock(hw);
3911 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3912 struct ieee80211_low_level_stats *stats)
3914 return mwl8k_cmd_get_stat(hw, stats);
3917 static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
3918 struct survey_info *survey)
3920 struct mwl8k_priv *priv = hw->priv;
3921 struct ieee80211_conf *conf = &hw->conf;
3926 survey->channel = conf->channel;
3927 survey->filled = SURVEY_INFO_NOISE_DBM;
3928 survey->noise = priv->noise;
3934 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3935 enum ieee80211_ampdu_mlme_action action,
3936 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3939 case IEEE80211_AMPDU_RX_START:
3940 case IEEE80211_AMPDU_RX_STOP:
3941 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3949 static const struct ieee80211_ops mwl8k_ops = {
3951 .start = mwl8k_start,
3953 .add_interface = mwl8k_add_interface,
3954 .remove_interface = mwl8k_remove_interface,
3955 .config = mwl8k_config,
3956 .bss_info_changed = mwl8k_bss_info_changed,
3957 .prepare_multicast = mwl8k_prepare_multicast,
3958 .configure_filter = mwl8k_configure_filter,
3959 .set_rts_threshold = mwl8k_set_rts_threshold,
3960 .sta_add = mwl8k_sta_add,
3961 .sta_remove = mwl8k_sta_remove,
3962 .conf_tx = mwl8k_conf_tx,
3963 .get_stats = mwl8k_get_stats,
3964 .get_survey = mwl8k_get_survey,
3965 .ampdu_action = mwl8k_ampdu_action,
3968 static void mwl8k_finalize_join_worker(struct work_struct *work)
3970 struct mwl8k_priv *priv =
3971 container_of(work, struct mwl8k_priv, finalize_join_worker);
3972 struct sk_buff *skb = priv->beacon_skb;
3973 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3974 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3975 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3976 mgmt->u.beacon.variable, len);
3977 int dtim_period = 1;
3979 if (tim && tim[1] >= 2)
3980 dtim_period = tim[3];
3982 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3985 priv->beacon_skb = NULL;
3994 #define MWL8K_8366_AP_FW_API 1
3995 #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
3996 #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
3998 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
4000 .part_name = "88w8363",
4001 .helper_image = "mwl8k/helper_8363.fw",
4002 .fw_image_sta = "mwl8k/fmimage_8363.fw",
4005 .part_name = "88w8687",
4006 .helper_image = "mwl8k/helper_8687.fw",
4007 .fw_image_sta = "mwl8k/fmimage_8687.fw",
4010 .part_name = "88w8366",
4011 .helper_image = "mwl8k/helper_8366.fw",
4012 .fw_image_sta = "mwl8k/fmimage_8366.fw",
4013 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
4014 .fw_api_ap = MWL8K_8366_AP_FW_API,
4015 .ap_rxd_ops = &rxd_8366_ap_ops,
4019 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
4020 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
4021 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
4022 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
4023 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
4024 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
4025 MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
4027 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
4028 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
4029 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
4030 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
4031 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
4032 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
4033 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
4034 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
4037 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
4039 static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
4042 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
4043 "Trying alternative firmware %s\n", pci_name(priv->pdev),
4044 priv->fw_pref, priv->fw_alt);
4045 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
4047 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4048 pci_name(priv->pdev), priv->fw_alt);
4054 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
4055 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
4057 struct mwl8k_priv *priv = context;
4058 struct mwl8k_device_info *di = priv->device_info;
4061 switch (priv->fw_state) {
4064 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
4065 pci_name(priv->pdev), di->helper_image);
4068 priv->fw_helper = fw;
4069 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
4071 if (rc && priv->fw_alt) {
4072 rc = mwl8k_request_alt_fw(priv);
4075 priv->fw_state = FW_STATE_LOADING_ALT;
4079 priv->fw_state = FW_STATE_LOADING_PREF;
4082 case FW_STATE_LOADING_PREF:
4085 rc = mwl8k_request_alt_fw(priv);
4088 priv->fw_state = FW_STATE_LOADING_ALT;
4092 priv->fw_ucode = fw;
4093 rc = mwl8k_firmware_load_success(priv);
4097 complete(&priv->firmware_loading_complete);
4101 case FW_STATE_LOADING_ALT:
4103 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4104 pci_name(priv->pdev), di->helper_image);
4107 priv->fw_ucode = fw;
4108 rc = mwl8k_firmware_load_success(priv);
4112 complete(&priv->firmware_loading_complete);
4116 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
4117 MWL8K_NAME, priv->fw_state);
4124 priv->fw_state = FW_STATE_ERROR;
4125 complete(&priv->firmware_loading_complete);
4126 device_release_driver(&priv->pdev->dev);
4127 mwl8k_release_firmware(priv);
4130 static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
4133 struct mwl8k_priv *priv = hw->priv;
4136 /* Reset firmware and hardware */
4137 mwl8k_hw_reset(priv);
4139 /* Ask userland hotplug daemon for the device firmware */
4140 rc = mwl8k_request_firmware(priv, fw_image, nowait);
4142 wiphy_err(hw->wiphy, "Firmware files not found\n");
4149 /* Load firmware into hardware */
4150 rc = mwl8k_load_firmware(hw);
4152 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4154 /* Reclaim memory once firmware is successfully loaded */
4155 mwl8k_release_firmware(priv);
4160 /* initialize hw after successfully loading a firmware image */
4161 static int mwl8k_probe_hw(struct ieee80211_hw *hw)
4163 struct mwl8k_priv *priv = hw->priv;
4168 priv->rxd_ops = priv->device_info->ap_rxd_ops;
4169 if (priv->rxd_ops == NULL) {
4170 wiphy_err(hw->wiphy,
4171 "Driver does not have AP firmware image support for this hardware\n");
4172 goto err_stop_firmware;
4175 priv->rxd_ops = &rxd_sta_ops;
4178 priv->sniffer_enabled = false;
4179 priv->wmm_enabled = false;
4180 priv->pending_tx_pkts = 0;
4182 rc = mwl8k_rxq_init(hw, 0);
4184 goto err_stop_firmware;
4185 rxq_refill(hw, 0, INT_MAX);
4187 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4188 rc = mwl8k_txq_init(hw, i);
4190 goto err_free_queues;
4193 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4194 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4195 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4196 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4197 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4199 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4200 IRQF_SHARED, MWL8K_NAME, hw);
4202 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
4203 goto err_free_queues;
4207 * Temporarily enable interrupts. Initial firmware host
4208 * commands use interrupts and avoid polling. Disable
4209 * interrupts when done.
4211 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4213 /* Get config data, mac addrs etc */
4215 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4217 rc = mwl8k_cmd_set_hw_spec(hw);
4219 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4222 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
4226 /* Turn radio off */
4227 rc = mwl8k_cmd_radio_disable(hw);
4229 wiphy_err(hw->wiphy, "Cannot disable\n");
4233 /* Clear MAC address */
4234 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4236 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
4240 /* Disable interrupts */
4241 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4242 free_irq(priv->pdev->irq, hw);
4244 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4245 priv->device_info->part_name,
4246 priv->hw_rev, hw->wiphy->perm_addr,
4247 priv->ap_fw ? "AP" : "STA",
4248 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4249 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4254 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4255 free_irq(priv->pdev->irq, hw);
4258 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4259 mwl8k_txq_deinit(hw, i);
4260 mwl8k_rxq_deinit(hw, 0);
4263 mwl8k_hw_reset(priv);
4269 * invoke mwl8k_reload_firmware to change the firmware image after the device
4270 * has already been registered
4272 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
4275 struct mwl8k_priv *priv = hw->priv;
4278 mwl8k_rxq_deinit(hw, 0);
4280 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4281 mwl8k_txq_deinit(hw, i);
4283 rc = mwl8k_init_firmware(hw, fw_image, false);
4287 rc = mwl8k_probe_hw(hw);
4291 rc = mwl8k_start(hw);
4295 rc = mwl8k_config(hw, ~0);
4299 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4300 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
4308 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
4312 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
4314 struct ieee80211_hw *hw = priv->hw;
4317 rc = mwl8k_load_firmware(hw);
4318 mwl8k_release_firmware(priv);
4320 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4325 * Extra headroom is the size of the required DMA header
4326 * minus the size of the smallest 802.11 frame (CTS frame).
4328 hw->extra_tx_headroom =
4329 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4331 hw->channel_change_time = 10;
4333 hw->queues = MWL8K_TX_QUEUES;
4335 /* Set rssi values to dBm */
4336 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
4337 hw->vif_data_size = sizeof(struct mwl8k_vif);
4338 hw->sta_data_size = sizeof(struct mwl8k_sta);
4340 priv->macids_used = 0;
4341 INIT_LIST_HEAD(&priv->vif_list);
4343 /* Set default radio state and preamble */
4345 priv->radio_short_preamble = 0;
4347 /* Finalize join worker */
4348 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4350 /* TX reclaim and RX tasklets. */
4351 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4352 tasklet_disable(&priv->poll_tx_task);
4353 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4354 tasklet_disable(&priv->poll_rx_task);
4356 /* Power management cookie */
4357 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4358 if (priv->cookie == NULL)
4361 mutex_init(&priv->fw_mutex);
4362 priv->fw_mutex_owner = NULL;
4363 priv->fw_mutex_depth = 0;
4364 priv->hostcmd_wait = NULL;
4366 spin_lock_init(&priv->tx_lock);
4368 priv->tx_wait = NULL;
4370 rc = mwl8k_probe_hw(hw);
4372 goto err_free_cookie;
4374 hw->wiphy->interface_modes = 0;
4375 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
4376 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4377 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
4378 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4380 rc = ieee80211_register_hw(hw);
4382 wiphy_err(hw->wiphy, "Cannot register device\n");
4383 goto err_unprobe_hw;
4389 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4390 mwl8k_txq_deinit(hw, i);
4391 mwl8k_rxq_deinit(hw, 0);
4394 if (priv->cookie != NULL)
4395 pci_free_consistent(priv->pdev, 4,
4396 priv->cookie, priv->cookie_dma);
4400 static int __devinit mwl8k_probe(struct pci_dev *pdev,
4401 const struct pci_device_id *id)
4403 static int printed_version;
4404 struct ieee80211_hw *hw;
4405 struct mwl8k_priv *priv;
4406 struct mwl8k_device_info *di;
4409 if (!printed_version) {
4410 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
4411 printed_version = 1;
4415 rc = pci_enable_device(pdev);
4417 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
4422 rc = pci_request_regions(pdev, MWL8K_NAME);
4424 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
4426 goto err_disable_device;
4429 pci_set_master(pdev);
4432 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
4434 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
4439 SET_IEEE80211_DEV(hw, &pdev->dev);
4440 pci_set_drvdata(pdev, hw);
4445 priv->device_info = &mwl8k_info_tbl[id->driver_data];
4448 priv->sram = pci_iomap(pdev, 0, 0x10000);
4449 if (priv->sram == NULL) {
4450 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
4455 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
4456 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
4458 priv->regs = pci_iomap(pdev, 1, 0x10000);
4459 if (priv->regs == NULL) {
4460 priv->regs = pci_iomap(pdev, 2, 0x10000);
4461 if (priv->regs == NULL) {
4462 wiphy_err(hw->wiphy, "Cannot map device registers\n");
4468 * Choose the initial fw image depending on user input. If a second
4469 * image is available, make it the alternative image that will be
4470 * loaded if the first one fails.
4472 init_completion(&priv->firmware_loading_complete);
4473 di = priv->device_info;
4474 if (ap_mode_default && di->fw_image_ap) {
4475 priv->fw_pref = di->fw_image_ap;
4476 priv->fw_alt = di->fw_image_sta;
4477 } else if (!ap_mode_default && di->fw_image_sta) {
4478 priv->fw_pref = di->fw_image_sta;
4479 priv->fw_alt = di->fw_image_ap;
4480 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
4481 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
4482 priv->fw_pref = di->fw_image_sta;
4483 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
4484 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
4485 priv->fw_pref = di->fw_image_ap;
4487 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
4489 goto err_stop_firmware;
4493 mwl8k_hw_reset(priv);
4496 if (priv->regs != NULL)
4497 pci_iounmap(pdev, priv->regs);
4499 if (priv->sram != NULL)
4500 pci_iounmap(pdev, priv->sram);
4502 pci_set_drvdata(pdev, NULL);
4503 ieee80211_free_hw(hw);
4506 pci_release_regions(pdev);
4509 pci_disable_device(pdev);
4514 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4516 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4519 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4521 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4522 struct mwl8k_priv *priv;
4529 wait_for_completion(&priv->firmware_loading_complete);
4531 if (priv->fw_state == FW_STATE_ERROR) {
4532 mwl8k_hw_reset(priv);
4536 ieee80211_stop_queues(hw);
4538 ieee80211_unregister_hw(hw);
4540 /* Remove TX reclaim and RX tasklets. */
4541 tasklet_kill(&priv->poll_tx_task);
4542 tasklet_kill(&priv->poll_rx_task);
4545 mwl8k_hw_reset(priv);
4547 /* Return all skbs to mac80211 */
4548 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4549 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4551 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4552 mwl8k_txq_deinit(hw, i);
4554 mwl8k_rxq_deinit(hw, 0);
4556 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4559 pci_iounmap(pdev, priv->regs);
4560 pci_iounmap(pdev, priv->sram);
4561 pci_set_drvdata(pdev, NULL);
4562 ieee80211_free_hw(hw);
4563 pci_release_regions(pdev);
4564 pci_disable_device(pdev);
4567 static struct pci_driver mwl8k_driver = {
4569 .id_table = mwl8k_pci_id_table,
4570 .probe = mwl8k_probe,
4571 .remove = __devexit_p(mwl8k_remove),
4572 .shutdown = __devexit_p(mwl8k_shutdown),
4575 static int __init mwl8k_init(void)
4577 return pci_register_driver(&mwl8k_driver);
4580 static void __exit mwl8k_exit(void)
4582 pci_unregister_driver(&mwl8k_driver);
4585 module_init(mwl8k_init);
4586 module_exit(mwl8k_exit);
4588 MODULE_DESCRIPTION(MWL8K_DESC);
4589 MODULE_VERSION(MWL8K_VERSION);
4590 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4591 MODULE_LICENSE("GPL");