1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
47 #include <asm/div64.h>
49 #define DRV_NAME "iwl3945"
51 #include "iwl-3945-core.h"
52 #include "iwl-commands.h"
54 #include "iwl-3945-fh.h"
55 #include "iwl-helpers.h"
57 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
60 /******************************************************************************
64 ******************************************************************************/
66 /* module parameters */
67 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68 static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69 static int iwl3945_param_disable; /* def: 0 = enable radio */
70 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
71 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
75 * module name, copyright, version, etc.
78 #define DRV_DESCRIPTION \
79 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81 #ifdef CONFIG_IWL3945_DEBUG
87 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
93 #define IWLWIFI_VERSION "1.2.26k" VD VS
94 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
95 #define DRV_AUTHOR "<ilw@linux.intel.com>"
96 #define DRV_VERSION IWLWIFI_VERSION
99 MODULE_DESCRIPTION(DRV_DESCRIPTION);
100 MODULE_VERSION(DRV_VERSION);
101 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
102 MODULE_LICENSE("GPL");
104 static const struct ieee80211_supported_band *iwl3945_get_band(
105 struct iwl3945_priv *priv, enum ieee80211_band band)
107 return priv->hw->wiphy->bands[band];
110 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
113 * Theory of operation
115 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
116 * of buffer descriptors, each of which points to one or more data buffers for
117 * the device to read from or fill. Driver and device exchange status of each
118 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
119 * entries in each circular buffer, to protect against confusing empty and full
122 * The device reads or writes the data in the queues via the device's several
123 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
125 * For Tx queue, there are low mark and high mark limits. If, after queuing
126 * the packet for Tx, free space become < low mark, Tx queue stopped. When
127 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
130 * The 3945 operates with six queues: One receive queue, one transmit queue
131 * (#4) for sending commands to the device firmware, and four transmit queues
132 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
133 ***************************************************/
135 int iwl3945_queue_space(const struct iwl3945_queue *q)
137 int s = q->read_ptr - q->write_ptr;
139 if (q->read_ptr > q->write_ptr)
144 /* keep some reserve to not confuse empty and full situations */
151 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
153 return q->write_ptr > q->read_ptr ?
154 (i >= q->read_ptr && i < q->write_ptr) :
155 !(i < q->read_ptr && i >= q->write_ptr);
159 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
161 /* This is for scan command, the big buffer at end of command array */
163 return q->n_window; /* must be power of 2 */
165 /* Otherwise, use normal size buffers */
166 return index & (q->n_window - 1);
170 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
172 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
173 int count, int slots_num, u32 id)
176 q->n_window = slots_num;
179 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
180 * and iwl_queue_dec_wrap are broken. */
181 BUG_ON(!is_power_of_2(count));
183 /* slots_num must be power-of-two size, otherwise
184 * get_cmd_index is broken. */
185 BUG_ON(!is_power_of_2(slots_num));
187 q->low_mark = q->n_window / 4;
191 q->high_mark = q->n_window / 8;
192 if (q->high_mark < 2)
195 q->write_ptr = q->read_ptr = 0;
201 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
203 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
204 struct iwl3945_tx_queue *txq, u32 id)
206 struct pci_dev *dev = priv->pci_dev;
208 /* Driver private data, only for Tx (not command) queues,
209 * not shared with device. */
210 if (id != IWL_CMD_QUEUE_NUM) {
211 txq->txb = kmalloc(sizeof(txq->txb[0]) *
212 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
214 IWL_ERROR("kmalloc for auxiliary BD "
215 "structures failed\n");
221 /* Circular buffer of transmit frame descriptors (TFDs),
222 * shared with device */
223 txq->bd = pci_alloc_consistent(dev,
224 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
228 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
229 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
244 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
246 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
247 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
249 struct pci_dev *dev = priv->pci_dev;
254 * Alloc buffer array for commands (Tx or other types of commands).
255 * For the command queue (#4), allocate command space + one big
256 * command for scan, since scan command is very huge; the system will
257 * not have two scans at the same time, so only one is needed.
258 * For data Tx queues (all other queues), no super-size command
261 len = sizeof(struct iwl3945_cmd) * slots_num;
262 if (txq_id == IWL_CMD_QUEUE_NUM)
263 len += IWL_MAX_SCAN_SIZE;
264 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
268 /* Alloc driver data array and TFD circular buffer */
269 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
271 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
275 txq->need_update = 0;
277 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
278 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
279 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
281 /* Initialize queue high/low-water, head/tail indexes */
282 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
284 /* Tell device where to find queue, enable DMA channel. */
285 iwl3945_hw_tx_queue_init(priv, txq);
291 * iwl3945_tx_queue_free - Deallocate DMA queue.
292 * @txq: Transmit queue to deallocate.
294 * Empty queue by removing and destroying all BD's.
296 * 0-fill, but do not free "txq" descriptor structure.
298 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
300 struct iwl3945_queue *q = &txq->q;
301 struct pci_dev *dev = priv->pci_dev;
307 /* first, empty all BD's */
308 for (; q->write_ptr != q->read_ptr;
309 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
310 iwl3945_hw_txq_free_tfd(priv, txq);
312 len = sizeof(struct iwl3945_cmd) * q->n_window;
313 if (q->id == IWL_CMD_QUEUE_NUM)
314 len += IWL_MAX_SCAN_SIZE;
316 /* De-alloc array of command/tx buffers */
317 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
319 /* De-alloc circular buffer of TFDs */
321 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
322 txq->q.n_bd, txq->bd, txq->q.dma_addr);
324 /* De-alloc array of per-TFD driver data */
328 /* 0-fill queue descriptor structure */
329 memset(txq, 0, sizeof(*txq));
332 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
334 /*************** STATION TABLE MANAGEMENT ****
335 * mac80211 should be examined to determine if sta_info is duplicating
336 * the functionality provided here
339 /**************************************************************/
340 #if 0 /* temporary disable till we add real remove station */
342 * iwl3945_remove_station - Remove driver's knowledge of station.
344 * NOTE: This does not remove station from device's station table.
346 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
348 int index = IWL_INVALID_STATION;
352 spin_lock_irqsave(&priv->sta_lock, flags);
356 else if (is_broadcast_ether_addr(addr))
357 index = priv->hw_setting.bcast_sta_id;
359 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
360 if (priv->stations[i].used &&
361 !compare_ether_addr(priv->stations[i].sta.sta.addr,
367 if (unlikely(index == IWL_INVALID_STATION))
370 if (priv->stations[index].used) {
371 priv->stations[index].used = 0;
372 priv->num_stations--;
375 BUG_ON(priv->num_stations < 0);
378 spin_unlock_irqrestore(&priv->sta_lock, flags);
384 * iwl3945_clear_stations_table - Clear the driver's station table
386 * NOTE: This does not clear or otherwise alter the device's station table.
388 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
392 spin_lock_irqsave(&priv->sta_lock, flags);
394 priv->num_stations = 0;
395 memset(priv->stations, 0, sizeof(priv->stations));
397 spin_unlock_irqrestore(&priv->sta_lock, flags);
401 * iwl3945_add_station - Add station to station tables in driver and device
403 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
406 int index = IWL_INVALID_STATION;
407 struct iwl3945_station_entry *station;
408 unsigned long flags_spin;
411 spin_lock_irqsave(&priv->sta_lock, flags_spin);
414 else if (is_broadcast_ether_addr(addr))
415 index = priv->hw_setting.bcast_sta_id;
417 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
418 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
424 if (!priv->stations[i].used &&
425 index == IWL_INVALID_STATION)
429 /* These two conditions has the same outcome but keep them separate
430 since they have different meaning */
431 if (unlikely(index == IWL_INVALID_STATION)) {
432 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
436 if (priv->stations[index].used &&
437 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
438 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
442 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
443 station = &priv->stations[index];
445 priv->num_stations++;
447 /* Set up the REPLY_ADD_STA command to send to device */
448 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
449 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
450 station->sta.mode = 0;
451 station->sta.sta.sta_id = index;
452 station->sta.station_flags = 0;
454 if (priv->band == IEEE80211_BAND_5GHZ)
455 rate = IWL_RATE_6M_PLCP;
457 rate = IWL_RATE_1M_PLCP;
459 /* Turn on both antennas for the station... */
460 station->sta.rate_n_flags =
461 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
463 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
465 /* Add station to device's station table */
466 iwl3945_send_add_station(priv, &station->sta, flags);
471 /*************** DRIVER STATUS FUNCTIONS *****/
473 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
475 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
476 * set but EXIT_PENDING is not */
477 return test_bit(STATUS_READY, &priv->status) &&
478 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
479 !test_bit(STATUS_EXIT_PENDING, &priv->status);
482 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
484 return test_bit(STATUS_ALIVE, &priv->status);
487 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
489 return test_bit(STATUS_INIT, &priv->status);
492 static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv)
494 return test_bit(STATUS_RF_KILL_SW, &priv->status);
497 static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv)
499 return test_bit(STATUS_RF_KILL_HW, &priv->status);
502 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
504 return iwl3945_is_rfkill_hw(priv) ||
505 iwl3945_is_rfkill_sw(priv);
508 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
511 if (iwl3945_is_rfkill(priv))
514 return iwl3945_is_ready(priv);
517 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
519 #define IWL_CMD(x) case x: return #x
521 static const char *get_cmd_string(u8 cmd)
524 IWL_CMD(REPLY_ALIVE);
525 IWL_CMD(REPLY_ERROR);
527 IWL_CMD(REPLY_RXON_ASSOC);
528 IWL_CMD(REPLY_QOS_PARAM);
529 IWL_CMD(REPLY_RXON_TIMING);
530 IWL_CMD(REPLY_ADD_STA);
531 IWL_CMD(REPLY_REMOVE_STA);
532 IWL_CMD(REPLY_REMOVE_ALL_STA);
533 IWL_CMD(REPLY_3945_RX);
535 IWL_CMD(REPLY_RATE_SCALE);
536 IWL_CMD(REPLY_LEDS_CMD);
537 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
538 IWL_CMD(RADAR_NOTIFICATION);
539 IWL_CMD(REPLY_QUIET_CMD);
540 IWL_CMD(REPLY_CHANNEL_SWITCH);
541 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
542 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
543 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
544 IWL_CMD(POWER_TABLE_CMD);
545 IWL_CMD(PM_SLEEP_NOTIFICATION);
546 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
547 IWL_CMD(REPLY_SCAN_CMD);
548 IWL_CMD(REPLY_SCAN_ABORT_CMD);
549 IWL_CMD(SCAN_START_NOTIFICATION);
550 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
551 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
552 IWL_CMD(BEACON_NOTIFICATION);
553 IWL_CMD(REPLY_TX_BEACON);
554 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
555 IWL_CMD(QUIET_NOTIFICATION);
556 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
557 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
558 IWL_CMD(REPLY_BT_CONFIG);
559 IWL_CMD(REPLY_STATISTICS_CMD);
560 IWL_CMD(STATISTICS_NOTIFICATION);
561 IWL_CMD(REPLY_CARD_STATE_CMD);
562 IWL_CMD(CARD_STATE_NOTIFICATION);
563 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
570 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
573 * iwl3945_enqueue_hcmd - enqueue a uCode command
574 * @priv: device private data point
575 * @cmd: a point to the ucode command structure
577 * The function returns < 0 values to indicate the operation is
578 * failed. On success, it turns the index (> 0) of command in the
581 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
583 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
584 struct iwl3945_queue *q = &txq->q;
585 struct iwl3945_tfd_frame *tfd;
587 struct iwl3945_cmd *out_cmd;
589 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
590 dma_addr_t phys_addr;
596 /* If any of the command structures end up being larger than
597 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
598 * we will need to increase the size of the TFD entries */
599 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
600 !(cmd->meta.flags & CMD_SIZE_HUGE));
603 if (iwl3945_is_rfkill(priv)) {
604 IWL_DEBUG_INFO("Not sending command - RF KILL");
608 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
609 IWL_ERROR("No space for Tx\n");
613 spin_lock_irqsave(&priv->hcmd_lock, flags);
615 tfd = &txq->bd[q->write_ptr];
616 memset(tfd, 0, sizeof(*tfd));
618 control_flags = (u32 *) tfd;
620 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
621 out_cmd = &txq->cmd[idx];
623 out_cmd->hdr.cmd = cmd->id;
624 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
625 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
627 /* At this point, the out_cmd now has all of the incoming cmd
630 out_cmd->hdr.flags = 0;
631 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
632 INDEX_TO_SEQ(q->write_ptr));
633 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
634 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
636 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
637 offsetof(struct iwl3945_cmd, hdr);
638 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
640 pad = U32_PAD(cmd->len);
641 count = TFD_CTL_COUNT_GET(*control_flags);
642 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
644 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
645 "%d bytes at %d[%d]:%d\n",
646 get_cmd_string(out_cmd->hdr.cmd),
647 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
648 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
650 txq->need_update = 1;
652 /* Increment and update queue's write index */
653 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
654 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
656 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
657 return ret ? ret : idx;
660 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
664 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
666 /* An asynchronous command can not expect an SKB to be set. */
667 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
669 /* An asynchronous command MUST have a callback. */
670 BUG_ON(!cmd->meta.u.callback);
672 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
675 ret = iwl3945_enqueue_hcmd(priv, cmd);
677 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
678 get_cmd_string(cmd->id), ret);
684 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
689 BUG_ON(cmd->meta.flags & CMD_ASYNC);
691 /* A synchronous command can not have a callback set. */
692 BUG_ON(cmd->meta.u.callback != NULL);
694 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
695 IWL_ERROR("Error sending %s: Already sending a host command\n",
696 get_cmd_string(cmd->id));
701 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
703 if (cmd->meta.flags & CMD_WANT_SKB)
704 cmd->meta.source = &cmd->meta;
706 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
709 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
710 get_cmd_string(cmd->id), ret);
714 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
715 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
716 HOST_COMPLETE_TIMEOUT);
718 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
719 IWL_ERROR("Error sending %s: time out after %dms.\n",
720 get_cmd_string(cmd->id),
721 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
723 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
729 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
730 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
731 get_cmd_string(cmd->id));
735 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
736 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
737 get_cmd_string(cmd->id));
741 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
742 IWL_ERROR("Error: Response NULL in '%s'\n",
743 get_cmd_string(cmd->id));
752 if (cmd->meta.flags & CMD_WANT_SKB) {
753 struct iwl3945_cmd *qcmd;
755 /* Cancel the CMD_WANT_SKB flag for the cmd in the
756 * TX cmd queue. Otherwise in case the cmd comes
757 * in later, it will possibly set an invalid
758 * address (cmd->meta.source). */
759 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
760 qcmd->meta.flags &= ~CMD_WANT_SKB;
763 if (cmd->meta.u.skb) {
764 dev_kfree_skb_any(cmd->meta.u.skb);
765 cmd->meta.u.skb = NULL;
768 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
772 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
774 if (cmd->meta.flags & CMD_ASYNC)
775 return iwl3945_send_cmd_async(priv, cmd);
777 return iwl3945_send_cmd_sync(priv, cmd);
780 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
782 struct iwl3945_host_cmd cmd = {
788 return iwl3945_send_cmd_sync(priv, &cmd);
791 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
793 struct iwl3945_host_cmd cmd = {
799 return iwl3945_send_cmd_sync(priv, &cmd);
802 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
804 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
808 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
809 * @band: 2.4 or 5 GHz band
810 * @channel: Any channel valid for the requested band
812 * In addition to setting the staging RXON, priv->band is also set.
814 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
815 * in the staging RXON flag structure based on the band
817 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
818 enum ieee80211_band band,
821 if (!iwl3945_get_channel_info(priv, band, channel)) {
822 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
827 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
828 (priv->band == band))
831 priv->staging_rxon.channel = cpu_to_le16(channel);
832 if (band == IEEE80211_BAND_5GHZ)
833 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
835 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
839 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
845 * iwl3945_check_rxon_cmd - validate RXON structure is valid
847 * NOTE: This is really only useful during development and can eventually
848 * be #ifdef'd out once the driver is stable and folks aren't actively
851 static int iwl3945_check_rxon_cmd(struct iwl3945_priv *priv)
855 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
857 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
858 error |= le32_to_cpu(rxon->flags &
859 (RXON_FLG_TGJ_NARROW_BAND_MSK |
860 RXON_FLG_RADAR_DETECT_MSK));
862 IWL_WARNING("check 24G fields %d | %d\n",
865 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
866 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
868 IWL_WARNING("check 52 fields %d | %d\n",
870 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
872 IWL_WARNING("check 52 CCK %d | %d\n",
875 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
877 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
879 /* make sure basic rates 6Mbps and 1Mbps are supported */
880 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
881 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
883 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
885 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
887 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
889 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
890 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
892 IWL_WARNING("check CCK and short slot %d | %d\n",
895 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
896 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
898 IWL_WARNING("check CCK & auto detect %d | %d\n",
901 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
902 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
904 IWL_WARNING("check TGG and auto detect %d | %d\n",
907 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
908 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
909 RXON_FLG_ANT_A_MSK)) == 0);
911 IWL_WARNING("check antenna %d %d\n", counter++, error);
914 IWL_WARNING("Tuning to channel %d\n",
915 le16_to_cpu(rxon->channel));
918 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
925 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
926 * @priv: staging_rxon is compared to active_rxon
928 * If the RXON structure is changing enough to require a new tune,
929 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
930 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
932 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
935 /* These items are only settable from the full RXON command */
936 if (!(iwl3945_is_associated(priv)) ||
937 compare_ether_addr(priv->staging_rxon.bssid_addr,
938 priv->active_rxon.bssid_addr) ||
939 compare_ether_addr(priv->staging_rxon.node_addr,
940 priv->active_rxon.node_addr) ||
941 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
942 priv->active_rxon.wlap_bssid_addr) ||
943 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
944 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
945 (priv->staging_rxon.air_propagation !=
946 priv->active_rxon.air_propagation) ||
947 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
950 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
951 * be updated with the RXON_ASSOC command -- however only some
952 * flag transitions are allowed using RXON_ASSOC */
954 /* Check if we are not switching bands */
955 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
956 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
959 /* Check if we are switching association toggle */
960 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
961 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
967 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
970 struct iwl_rx_packet *res = NULL;
971 struct iwl3945_rxon_assoc_cmd rxon_assoc;
972 struct iwl3945_host_cmd cmd = {
973 .id = REPLY_RXON_ASSOC,
974 .len = sizeof(rxon_assoc),
975 .meta.flags = CMD_WANT_SKB,
978 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
979 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
981 if ((rxon1->flags == rxon2->flags) &&
982 (rxon1->filter_flags == rxon2->filter_flags) &&
983 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
984 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
985 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
989 rxon_assoc.flags = priv->staging_rxon.flags;
990 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
991 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
992 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
993 rxon_assoc.reserved = 0;
995 rc = iwl3945_send_cmd_sync(priv, &cmd);
999 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1000 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1001 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1005 priv->alloc_rxb_skb--;
1006 dev_kfree_skb_any(cmd.meta.u.skb);
1012 * iwl3945_commit_rxon - commit staging_rxon to hardware
1014 * The RXON command in staging_rxon is committed to the hardware and
1015 * the active_rxon structure is updated with the new data. This
1016 * function correctly transitions out of the RXON_ASSOC_MSK state if
1017 * a HW tune is required based on the RXON structure changes.
1019 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1021 /* cast away the const for active_rxon in this function */
1022 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1025 if (!iwl3945_is_alive(priv))
1028 /* always get timestamp with Rx frame */
1029 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1031 /* select antenna */
1032 priv->staging_rxon.flags &=
1033 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1034 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1036 rc = iwl3945_check_rxon_cmd(priv);
1038 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1042 /* If we don't need to send a full RXON, we can use
1043 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1044 * and other flags for the current radio configuration. */
1045 if (!iwl3945_full_rxon_required(priv)) {
1046 rc = iwl3945_send_rxon_assoc(priv);
1048 IWL_ERROR("Error setting RXON_ASSOC "
1049 "configuration (%d).\n", rc);
1053 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1058 /* If we are currently associated and the new config requires
1059 * an RXON_ASSOC and the new config wants the associated mask enabled,
1060 * we must clear the associated from the active configuration
1061 * before we apply the new config */
1062 if (iwl3945_is_associated(priv) &&
1063 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1064 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1065 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1067 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1068 sizeof(struct iwl3945_rxon_cmd),
1069 &priv->active_rxon);
1071 /* If the mask clearing failed then we set
1072 * active_rxon back to what it was previously */
1074 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1075 IWL_ERROR("Error clearing ASSOC_MSK on current "
1076 "configuration (%d).\n", rc);
1081 IWL_DEBUG_INFO("Sending RXON\n"
1082 "* with%s RXON_FILTER_ASSOC_MSK\n"
1085 ((priv->staging_rxon.filter_flags &
1086 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1087 le16_to_cpu(priv->staging_rxon.channel),
1088 priv->staging_rxon.bssid_addr);
1090 /* Apply the new configuration */
1091 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1092 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1094 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1098 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1100 iwl3945_clear_stations_table(priv);
1102 /* If we issue a new RXON command which required a tune then we must
1103 * send a new TXPOWER command or we won't be able to Tx any frames */
1104 rc = iwl3945_hw_reg_send_txpower(priv);
1106 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1110 /* Add the broadcast address so we can send broadcast frames */
1111 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1112 IWL_INVALID_STATION) {
1113 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1117 /* If we have set the ASSOC_MSK and we are in BSS mode then
1118 * add the IWL_AP_ID to the station rate table */
1119 if (iwl3945_is_associated(priv) &&
1120 (priv->iw_mode == NL80211_IFTYPE_STATION))
1121 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1122 == IWL_INVALID_STATION) {
1123 IWL_ERROR("Error adding AP address for transmit.\n");
1127 /* Init the hardware's rate fallback order based on the band */
1128 rc = iwl3945_init_hw_rate_table(priv);
1130 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1137 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1139 struct iwl_bt_cmd bt_cmd = {
1147 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1148 sizeof(bt_cmd), &bt_cmd);
1151 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1154 struct iwl_rx_packet *res;
1155 struct iwl3945_host_cmd cmd = {
1156 .id = REPLY_SCAN_ABORT_CMD,
1157 .meta.flags = CMD_WANT_SKB,
1160 /* If there isn't a scan actively going on in the hardware
1161 * then we are in between scan bands and not actually
1162 * actively scanning, so don't send the abort command */
1163 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1164 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1168 rc = iwl3945_send_cmd_sync(priv, &cmd);
1170 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1174 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1175 if (res->u.status != CAN_ABORT_STATUS) {
1176 /* The scan abort will return 1 for success or
1177 * 2 for "failure". A failure condition can be
1178 * due to simply not being in an active scan which
1179 * can occur if we send the scan abort before we
1180 * the microcode has notified us that a scan is
1182 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1183 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1184 clear_bit(STATUS_SCAN_HW, &priv->status);
1187 dev_kfree_skb_any(cmd.meta.u.skb);
1192 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1193 struct iwl3945_cmd *cmd,
1194 struct sk_buff *skb)
1202 * Use: Sets the device's internal card state to enable, disable, or halt
1204 * When in the 'enable' state the card operates as normal.
1205 * When in the 'disable' state, the card enters into a low power mode.
1206 * When in the 'halt' state, the card is shut down and must be fully
1207 * restarted to come back on.
1209 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1211 struct iwl3945_host_cmd cmd = {
1212 .id = REPLY_CARD_STATE_CMD,
1215 .meta.flags = meta_flag,
1218 if (meta_flag & CMD_ASYNC)
1219 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1221 return iwl3945_send_cmd(priv, &cmd);
1224 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1225 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1227 struct iwl_rx_packet *res = NULL;
1230 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1234 res = (struct iwl_rx_packet *)skb->data;
1235 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1236 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1241 switch (res->u.add_sta.status) {
1242 case ADD_STA_SUCCESS_MSK:
1248 /* We didn't cache the SKB; let the caller free it */
1252 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1253 struct iwl3945_addsta_cmd *sta, u8 flags)
1255 struct iwl_rx_packet *res = NULL;
1257 struct iwl3945_host_cmd cmd = {
1258 .id = REPLY_ADD_STA,
1259 .len = sizeof(struct iwl3945_addsta_cmd),
1260 .meta.flags = flags,
1264 if (flags & CMD_ASYNC)
1265 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1267 cmd.meta.flags |= CMD_WANT_SKB;
1269 rc = iwl3945_send_cmd(priv, &cmd);
1271 if (rc || (flags & CMD_ASYNC))
1274 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1275 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1276 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1282 switch (res->u.add_sta.status) {
1283 case ADD_STA_SUCCESS_MSK:
1284 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1288 IWL_WARNING("REPLY_ADD_STA failed\n");
1293 priv->alloc_rxb_skb--;
1294 dev_kfree_skb_any(cmd.meta.u.skb);
1299 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1300 struct ieee80211_key_conf *keyconf,
1303 unsigned long flags;
1304 __le16 key_flags = 0;
1306 switch (keyconf->alg) {
1308 key_flags |= STA_KEY_FLG_CCMP;
1309 key_flags |= cpu_to_le16(
1310 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1311 key_flags &= ~STA_KEY_FLG_INVALID;
1318 spin_lock_irqsave(&priv->sta_lock, flags);
1319 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1320 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1321 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1324 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1326 priv->stations[sta_id].sta.key.key_flags = key_flags;
1327 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1328 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1330 spin_unlock_irqrestore(&priv->sta_lock, flags);
1332 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1333 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1337 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1339 unsigned long flags;
1341 spin_lock_irqsave(&priv->sta_lock, flags);
1342 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1343 memset(&priv->stations[sta_id].sta.key, 0,
1344 sizeof(struct iwl4965_keyinfo));
1345 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1346 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1347 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1348 spin_unlock_irqrestore(&priv->sta_lock, flags);
1350 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1351 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1355 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1357 struct list_head *element;
1359 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1360 priv->frames_count);
1362 while (!list_empty(&priv->free_frames)) {
1363 element = priv->free_frames.next;
1365 kfree(list_entry(element, struct iwl3945_frame, list));
1366 priv->frames_count--;
1369 if (priv->frames_count) {
1370 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1371 priv->frames_count);
1372 priv->frames_count = 0;
1376 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1378 struct iwl3945_frame *frame;
1379 struct list_head *element;
1380 if (list_empty(&priv->free_frames)) {
1381 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1383 IWL_ERROR("Could not allocate frame!\n");
1387 priv->frames_count++;
1391 element = priv->free_frames.next;
1393 return list_entry(element, struct iwl3945_frame, list);
1396 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1398 memset(frame, 0, sizeof(*frame));
1399 list_add(&frame->list, &priv->free_frames);
1402 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1403 struct ieee80211_hdr *hdr,
1407 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1408 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1409 (priv->iw_mode != NL80211_IFTYPE_AP)))
1412 if (priv->ibss_beacon->len > left)
1415 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1417 return priv->ibss_beacon->len;
1420 static u8 iwl3945_rate_get_lowest_plcp(struct iwl3945_priv *priv)
1426 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1427 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1429 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1431 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1432 i = iwl3945_rates[i].next_ieee) {
1433 if (rate_mask & (1 << i))
1434 return iwl3945_rates[i].plcp;
1437 /* No valid rate was found. Assign the lowest one */
1438 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1439 return IWL_RATE_1M_PLCP;
1441 return IWL_RATE_6M_PLCP;
1444 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1446 struct iwl3945_frame *frame;
1447 unsigned int frame_size;
1451 frame = iwl3945_get_free_frame(priv);
1454 IWL_ERROR("Could not obtain free frame buffer for beacon "
1459 rate = iwl3945_rate_get_lowest_plcp(priv);
1461 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1463 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1466 iwl3945_free_frame(priv, frame);
1471 /******************************************************************************
1473 * EEPROM related functions
1475 ******************************************************************************/
1477 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1479 memcpy(mac, priv->eeprom.mac_address, 6);
1483 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1484 * embedded controller) as EEPROM reader; each read is a series of pulses
1485 * to/from the EEPROM chip, not a single event, so even reads could conflict
1486 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1487 * simply claims ownership, which should be safe when this function is called
1488 * (i.e. before loading uCode!).
1490 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1492 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1497 * iwl3945_eeprom_init - read EEPROM contents
1499 * Load the EEPROM contents from adapter into priv->eeprom
1501 * NOTE: This routine uses the non-debug IO access functions.
1503 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1505 u16 *e = (u16 *)&priv->eeprom;
1506 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1507 int sz = sizeof(priv->eeprom);
1511 /* The EEPROM structure has several padding buffers within it
1512 * and when adding new EEPROM maps is subject to programmer errors
1513 * which may be very difficult to identify without explicitly
1514 * checking the resulting size of the eeprom map. */
1515 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1517 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1518 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1522 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1523 ret = iwl3945_eeprom_acquire_semaphore(priv);
1525 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1529 /* eeprom is an array of 16bit values */
1530 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1533 _iwl3945_write32(priv, CSR_EEPROM_REG,
1534 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1535 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1536 ret = iwl3945_poll_direct_bit(priv, CSR_EEPROM_REG,
1537 CSR_EEPROM_REG_READ_VALID_MSK,
1538 IWL_EEPROM_ACCESS_TIMEOUT);
1540 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1544 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1545 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1551 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1553 if (priv->hw_setting.shared_virt)
1554 pci_free_consistent(priv->pci_dev,
1555 sizeof(struct iwl3945_shared),
1556 priv->hw_setting.shared_virt,
1557 priv->hw_setting.shared_phys);
1561 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1563 * return : set the bit for each supported rate insert in ie
1565 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1566 u16 basic_rate, int *left)
1568 u16 ret_rates = 0, bit;
1573 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1574 if (bit & supported_rate) {
1576 rates[*cnt] = iwl3945_rates[i].ieee |
1577 ((bit & basic_rate) ? 0x80 : 0x00);
1581 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1590 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1592 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1593 struct ieee80211_mgmt *frame,
1598 u16 active_rates, ret_rates, cck_rates;
1600 /* Make sure there is enough space for the probe request,
1601 * two mandatory IEs and the data */
1607 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1608 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1609 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1610 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1611 frame->seq_ctrl = 0;
1613 /* fill in our indirect SSID IE */
1620 pos = &(frame->u.probe_req.variable[0]);
1621 *pos++ = WLAN_EID_SSID;
1624 /* fill in supported rate */
1630 /* ... fill it in... */
1631 *pos++ = WLAN_EID_SUPP_RATES;
1634 priv->active_rate = priv->rates_mask;
1635 active_rates = priv->active_rate;
1636 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1638 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1639 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1640 priv->active_rate_basic, &left);
1641 active_rates &= ~ret_rates;
1643 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1644 priv->active_rate_basic, &left);
1645 active_rates &= ~ret_rates;
1649 if (active_rates == 0)
1652 /* fill in supported extended rate */
1657 /* ... fill it in... */
1658 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1660 iwl3945_supported_rate_to_ie(pos, active_rates,
1661 priv->active_rate_basic, &left);
1672 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1673 struct iwl_qosparam_cmd *qos)
1676 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1677 sizeof(struct iwl_qosparam_cmd), qos);
1680 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1686 unsigned long flags;
1689 spin_lock_irqsave(&priv->lock, flags);
1690 priv->qos_data.qos_active = 0;
1692 /* QoS always active in AP and ADHOC mode
1693 * In STA mode wait for association
1695 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1696 priv->iw_mode == NL80211_IFTYPE_AP)
1697 priv->qos_data.qos_active = 1;
1699 priv->qos_data.qos_active = 0;
1702 /* check for legacy mode */
1703 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1704 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1705 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1706 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1711 if (priv->qos_data.qos_active)
1714 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1715 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1716 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1717 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1718 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1720 if (priv->qos_data.qos_active) {
1722 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1723 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1724 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1725 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1726 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1729 priv->qos_data.def_qos_parm.ac[i].cw_min =
1730 cpu_to_le16((cw_min + 1) / 2 - 1);
1731 priv->qos_data.def_qos_parm.ac[i].cw_max =
1732 cpu_to_le16(cw_max);
1733 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1735 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1738 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1740 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1743 priv->qos_data.def_qos_parm.ac[i].cw_min =
1744 cpu_to_le16((cw_min + 1) / 4 - 1);
1745 priv->qos_data.def_qos_parm.ac[i].cw_max =
1746 cpu_to_le16((cw_max + 1) / 2 - 1);
1747 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1748 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1750 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1753 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1756 for (i = 1; i < 4; i++) {
1757 priv->qos_data.def_qos_parm.ac[i].cw_min =
1758 cpu_to_le16(cw_min);
1759 priv->qos_data.def_qos_parm.ac[i].cw_max =
1760 cpu_to_le16(cw_max);
1761 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1762 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1763 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1766 IWL_DEBUG_QOS("set QoS to default \n");
1768 spin_unlock_irqrestore(&priv->lock, flags);
1771 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1773 unsigned long flags;
1775 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1778 spin_lock_irqsave(&priv->lock, flags);
1779 priv->qos_data.def_qos_parm.qos_flags = 0;
1781 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1782 !priv->qos_data.qos_cap.q_AP.txop_request)
1783 priv->qos_data.def_qos_parm.qos_flags |=
1784 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1786 if (priv->qos_data.qos_active)
1787 priv->qos_data.def_qos_parm.qos_flags |=
1788 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1790 spin_unlock_irqrestore(&priv->lock, flags);
1792 if (force || iwl3945_is_associated(priv)) {
1793 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1794 priv->qos_data.qos_active);
1796 iwl3945_send_qos_params_command(priv,
1797 &(priv->qos_data.def_qos_parm));
1802 * Power management (not Tx power!) functions
1804 #define MSEC_TO_USEC 1024
1807 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1808 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1809 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1810 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1811 __constant_cpu_to_le32(X1), \
1812 __constant_cpu_to_le32(X2), \
1813 __constant_cpu_to_le32(X3), \
1814 __constant_cpu_to_le32(X4)}
1816 /* default power management (not Tx power) table values */
1818 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
1819 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1820 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1821 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1822 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1823 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1824 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1828 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
1829 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1830 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1831 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1832 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1833 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1834 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1835 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1836 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1837 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1838 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1841 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1844 struct iwl3945_power_mgr *pow_data;
1845 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
1848 IWL_DEBUG_POWER("Initialize power \n");
1850 pow_data = &(priv->power_data);
1852 memset(pow_data, 0, sizeof(*pow_data));
1854 pow_data->active_index = IWL_POWER_RANGE_0;
1855 pow_data->dtim_val = 0xffff;
1857 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1858 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1860 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1864 struct iwl_powertable_cmd *cmd;
1866 IWL_DEBUG_POWER("adjust power command flags\n");
1868 for (i = 0; i < IWL_POWER_AC; i++) {
1869 cmd = &pow_data->pwr_range_0[i].cmd;
1872 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1874 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1880 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1881 struct iwl_powertable_cmd *cmd, u32 mode)
1886 struct iwl3945_power_vec_entry *range;
1888 struct iwl3945_power_mgr *pow_data;
1890 if (mode > IWL_POWER_INDEX_5) {
1891 IWL_DEBUG_POWER("Error invalid power mode \n");
1894 pow_data = &(priv->power_data);
1896 if (pow_data->active_index == IWL_POWER_RANGE_0)
1897 range = &pow_data->pwr_range_0[0];
1899 range = &pow_data->pwr_range_1[1];
1901 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1903 #ifdef IWL_MAC80211_DISABLE
1904 if (priv->assoc_network != NULL) {
1905 unsigned long flags;
1907 period = priv->assoc_network->tim.tim_period;
1909 #endif /*IWL_MAC80211_DISABLE */
1910 skip = range[mode].no_dtim;
1919 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1921 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1922 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1923 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1926 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1927 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1928 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1931 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1932 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1933 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1934 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1935 le32_to_cpu(cmd->sleep_interval[0]),
1936 le32_to_cpu(cmd->sleep_interval[1]),
1937 le32_to_cpu(cmd->sleep_interval[2]),
1938 le32_to_cpu(cmd->sleep_interval[3]),
1939 le32_to_cpu(cmd->sleep_interval[4]));
1944 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
1946 u32 uninitialized_var(final_mode);
1948 struct iwl_powertable_cmd cmd;
1950 /* If on battery, set to 3,
1951 * if plugged into AC power, set to CAM ("continuously aware mode"),
1952 * else user level */
1954 case IWL_POWER_BATTERY:
1955 final_mode = IWL_POWER_INDEX_3;
1958 final_mode = IWL_POWER_MODE_CAM;
1965 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1967 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1968 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1969 sizeof(struct iwl3945_powertable_cmd), &cmd);
1971 if (final_mode == IWL_POWER_MODE_CAM)
1972 clear_bit(STATUS_POWER_PMI, &priv->status);
1974 set_bit(STATUS_POWER_PMI, &priv->status);
1980 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1982 * NOTE: priv->mutex is not required before calling this function
1984 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
1986 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1987 clear_bit(STATUS_SCANNING, &priv->status);
1991 if (test_bit(STATUS_SCANNING, &priv->status)) {
1992 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1993 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1994 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1995 queue_work(priv->workqueue, &priv->abort_scan);
1998 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2000 return test_bit(STATUS_SCANNING, &priv->status);
2007 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2008 * @ms: amount of time to wait (in milliseconds) for scan to abort
2010 * NOTE: priv->mutex must be held before calling this function
2012 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2014 unsigned long now = jiffies;
2017 ret = iwl3945_scan_cancel(priv);
2019 mutex_unlock(&priv->mutex);
2020 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2021 test_bit(STATUS_SCANNING, &priv->status))
2023 mutex_lock(&priv->mutex);
2025 return test_bit(STATUS_SCANNING, &priv->status);
2031 #define MAX_UCODE_BEACON_INTERVAL 1024
2032 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2034 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2037 u16 beacon_factor = 0;
2040 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2041 / MAX_UCODE_BEACON_INTERVAL;
2042 new_val = beacon_val / beacon_factor;
2044 return cpu_to_le16(new_val);
2047 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2049 u64 interval_tm_unit;
2051 unsigned long flags;
2052 struct ieee80211_conf *conf = NULL;
2055 conf = ieee80211_get_hw_conf(priv->hw);
2057 spin_lock_irqsave(&priv->lock, flags);
2058 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
2059 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2061 tsf = priv->timestamp;
2063 beacon_int = priv->beacon_int;
2064 spin_unlock_irqrestore(&priv->lock, flags);
2066 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
2067 if (beacon_int == 0) {
2068 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2069 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2071 priv->rxon_timing.beacon_interval =
2072 cpu_to_le16(beacon_int);
2073 priv->rxon_timing.beacon_interval =
2074 iwl3945_adjust_beacon_interval(
2075 le16_to_cpu(priv->rxon_timing.beacon_interval));
2078 priv->rxon_timing.atim_window = 0;
2080 priv->rxon_timing.beacon_interval =
2081 iwl3945_adjust_beacon_interval(conf->beacon_int);
2082 /* TODO: we need to get atim_window from upper stack
2083 * for now we set to 0 */
2084 priv->rxon_timing.atim_window = 0;
2088 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2089 result = do_div(tsf, interval_tm_unit);
2090 priv->rxon_timing.beacon_init_val =
2091 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2094 ("beacon interval %d beacon timer %d beacon tim %d\n",
2095 le16_to_cpu(priv->rxon_timing.beacon_interval),
2096 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2097 le16_to_cpu(priv->rxon_timing.atim_window));
2100 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2102 if (!iwl3945_is_ready_rf(priv)) {
2103 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2107 if (test_bit(STATUS_SCANNING, &priv->status)) {
2108 IWL_DEBUG_SCAN("Scan already in progress.\n");
2112 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2113 IWL_DEBUG_SCAN("Scan request while abort pending. "
2118 IWL_DEBUG_INFO("Starting scan...\n");
2119 if (priv->cfg->sku & IWL_SKU_G)
2120 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2121 if (priv->cfg->sku & IWL_SKU_A)
2122 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2123 set_bit(STATUS_SCANNING, &priv->status);
2124 priv->scan_start = jiffies;
2125 priv->scan_pass_start = priv->scan_start;
2127 queue_work(priv->workqueue, &priv->request_scan);
2132 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2134 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2137 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2139 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2144 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2145 enum ieee80211_band band)
2147 if (band == IEEE80211_BAND_5GHZ) {
2148 priv->staging_rxon.flags &=
2149 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2150 | RXON_FLG_CCK_MSK);
2151 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2153 /* Copied from iwl3945_bg_post_associate() */
2154 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2155 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2157 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2159 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2160 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2162 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2163 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2164 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2169 * initialize rxon structure with default values from eeprom
2171 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv,
2174 const struct iwl3945_channel_info *ch_info;
2176 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2179 case NL80211_IFTYPE_AP:
2180 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2183 case NL80211_IFTYPE_STATION:
2184 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2185 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2188 case NL80211_IFTYPE_ADHOC:
2189 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2190 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2191 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2192 RXON_FILTER_ACCEPT_GRP_MSK;
2195 case NL80211_IFTYPE_MONITOR:
2196 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2197 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2198 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2201 IWL_ERROR("Unsupported interface type %d\n", mode);
2206 /* TODO: Figure out when short_preamble would be set and cache from
2208 if (!hw_to_local(priv->hw)->short_preamble)
2209 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2211 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2214 ch_info = iwl3945_get_channel_info(priv, priv->band,
2215 le16_to_cpu(priv->active_rxon.channel));
2218 ch_info = &priv->channel_info[0];
2221 * in some case A channels are all non IBSS
2222 * in this case force B/G channel
2224 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2225 ch_info = &priv->channel_info[0];
2227 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2228 if (is_channel_a_band(ch_info))
2229 priv->band = IEEE80211_BAND_5GHZ;
2231 priv->band = IEEE80211_BAND_2GHZ;
2233 iwl3945_set_flags_for_phymode(priv, priv->band);
2235 priv->staging_rxon.ofdm_basic_rates =
2236 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2237 priv->staging_rxon.cck_basic_rates =
2238 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2241 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2243 if (mode == NL80211_IFTYPE_ADHOC) {
2244 const struct iwl3945_channel_info *ch_info;
2246 ch_info = iwl3945_get_channel_info(priv,
2248 le16_to_cpu(priv->staging_rxon.channel));
2250 if (!ch_info || !is_channel_ibss(ch_info)) {
2251 IWL_ERROR("channel %d not IBSS channel\n",
2252 le16_to_cpu(priv->staging_rxon.channel));
2257 iwl3945_connection_init_rx_config(priv, mode);
2258 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2260 iwl3945_clear_stations_table(priv);
2262 /* don't commit rxon if rf-kill is on*/
2263 if (!iwl3945_is_ready_rf(priv))
2266 cancel_delayed_work(&priv->scan_check);
2267 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2268 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2269 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2273 iwl3945_commit_rxon(priv);
2278 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2279 struct ieee80211_tx_info *info,
2280 struct iwl3945_cmd *cmd,
2281 struct sk_buff *skb_frag,
2284 struct iwl3945_hw_key *keyinfo =
2285 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
2287 switch (keyinfo->alg) {
2289 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2290 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2291 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2296 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2299 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2302 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2307 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2308 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2310 if (keyinfo->keylen == 13)
2311 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2313 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2315 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2316 "with key %d\n", info->control.hw_key->hw_key_idx);
2320 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2326 * handle build REPLY_TX command notification.
2328 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2329 struct iwl3945_cmd *cmd,
2330 struct ieee80211_tx_info *info,
2331 struct ieee80211_hdr *hdr,
2332 int is_unicast, u8 std_id)
2334 __le16 fc = hdr->frame_control;
2335 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2336 u8 rc_flags = info->control.rates[0].flags;
2338 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2339 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2340 tx_flags |= TX_CMD_FLG_ACK_MSK;
2341 if (ieee80211_is_mgmt(fc))
2342 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2343 if (ieee80211_is_probe_resp(fc) &&
2344 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2345 tx_flags |= TX_CMD_FLG_TSF_MSK;
2347 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2348 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2351 cmd->cmd.tx.sta_id = std_id;
2352 if (ieee80211_has_morefrags(fc))
2353 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2355 if (ieee80211_is_data_qos(fc)) {
2356 u8 *qc = ieee80211_get_qos_ctl(hdr);
2357 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2358 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2360 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2363 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2364 tx_flags |= TX_CMD_FLG_RTS_MSK;
2365 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2366 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2367 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2368 tx_flags |= TX_CMD_FLG_CTS_MSK;
2371 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2372 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2374 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2375 if (ieee80211_is_mgmt(fc)) {
2376 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2377 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2379 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2381 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2382 #ifdef CONFIG_IWL3945_LEDS
2383 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2387 cmd->cmd.tx.driver_txop = 0;
2388 cmd->cmd.tx.tx_flags = tx_flags;
2389 cmd->cmd.tx.next_frame_len = 0;
2393 * iwl3945_get_sta_id - Find station's index within station table
2395 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2398 u16 fc = le16_to_cpu(hdr->frame_control);
2400 /* If this frame is broadcast or management, use broadcast station id */
2401 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2402 is_multicast_ether_addr(hdr->addr1))
2403 return priv->hw_setting.bcast_sta_id;
2405 switch (priv->iw_mode) {
2407 /* If we are a client station in a BSS network, use the special
2408 * AP station entry (that's the only station we communicate with) */
2409 case NL80211_IFTYPE_STATION:
2412 /* If we are an AP, then find the station, or use BCAST */
2413 case NL80211_IFTYPE_AP:
2414 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2415 if (sta_id != IWL_INVALID_STATION)
2417 return priv->hw_setting.bcast_sta_id;
2419 /* If this frame is going out to an IBSS network, find the station,
2420 * or create a new station table entry */
2421 case NL80211_IFTYPE_ADHOC: {
2422 /* Create new station table entry */
2423 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2424 if (sta_id != IWL_INVALID_STATION)
2427 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2429 if (sta_id != IWL_INVALID_STATION)
2432 IWL_DEBUG_DROP("Station %pM not in station map. "
2433 "Defaulting to broadcast...\n",
2435 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2436 return priv->hw_setting.bcast_sta_id;
2438 /* If we are in monitor mode, use BCAST. This is required for
2439 * packet injection. */
2440 case NL80211_IFTYPE_MONITOR:
2441 return priv->hw_setting.bcast_sta_id;
2444 IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
2445 return priv->hw_setting.bcast_sta_id;
2450 * start REPLY_TX command process
2452 static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
2454 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2455 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2456 struct iwl3945_tfd_frame *tfd;
2458 int txq_id = skb_get_queue_mapping(skb);
2459 struct iwl3945_tx_queue *txq = NULL;
2460 struct iwl3945_queue *q = NULL;
2461 dma_addr_t phys_addr;
2462 dma_addr_t txcmd_phys;
2463 struct iwl3945_cmd *out_cmd = NULL;
2464 u16 len, idx, len_org, hdr_len;
2471 u8 wait_write_ptr = 0;
2473 unsigned long flags;
2476 spin_lock_irqsave(&priv->lock, flags);
2477 if (iwl3945_is_rfkill(priv)) {
2478 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2482 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2483 IWL_ERROR("ERROR: No TX rate available.\n");
2487 unicast = !is_multicast_ether_addr(hdr->addr1);
2490 fc = hdr->frame_control;
2492 #ifdef CONFIG_IWL3945_DEBUG
2493 if (ieee80211_is_auth(fc))
2494 IWL_DEBUG_TX("Sending AUTH frame\n");
2495 else if (ieee80211_is_assoc_req(fc))
2496 IWL_DEBUG_TX("Sending ASSOC frame\n");
2497 else if (ieee80211_is_reassoc_req(fc))
2498 IWL_DEBUG_TX("Sending REASSOC frame\n");
2501 /* drop all data frame if we are not associated */
2502 if (ieee80211_is_data(fc) &&
2503 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2504 (!iwl3945_is_associated(priv) ||
2505 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2506 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2510 spin_unlock_irqrestore(&priv->lock, flags);
2512 hdr_len = ieee80211_hdrlen(fc);
2514 /* Find (or create) index into station table for destination station */
2515 sta_id = iwl3945_get_sta_id(priv, hdr);
2516 if (sta_id == IWL_INVALID_STATION) {
2517 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2522 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2524 if (ieee80211_is_data_qos(fc)) {
2525 qc = ieee80211_get_qos_ctl(hdr);
2526 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2527 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2529 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2531 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2535 /* Descriptor for chosen Tx queue */
2536 txq = &priv->txq[txq_id];
2539 spin_lock_irqsave(&priv->lock, flags);
2541 /* Set up first empty TFD within this queue's circular TFD buffer */
2542 tfd = &txq->bd[q->write_ptr];
2543 memset(tfd, 0, sizeof(*tfd));
2544 control_flags = (u32 *) tfd;
2545 idx = get_cmd_index(q, q->write_ptr, 0);
2547 /* Set up driver data for this TFD */
2548 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2549 txq->txb[q->write_ptr].skb[0] = skb;
2551 /* Init first empty entry in queue's array of Tx/cmd buffers */
2552 out_cmd = &txq->cmd[idx];
2553 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2554 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2557 * Set up the Tx-command (not MAC!) header.
2558 * Store the chosen Tx queue and TFD index within the sequence field;
2559 * after Tx, uCode's Tx response will return this value so driver can
2560 * locate the frame within the tx queue and do post-tx processing.
2562 out_cmd->hdr.cmd = REPLY_TX;
2563 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2564 INDEX_TO_SEQ(q->write_ptr)));
2566 /* Copy MAC header from skb into command buffer */
2567 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2570 * Use the first empty entry in this queue's command buffer array
2571 * to contain the Tx command and MAC header concatenated together
2572 * (payload data will be in another buffer).
2573 * Size of this varies, due to varying MAC header length.
2574 * If end is not dword aligned, we'll have 2 extra bytes at the end
2575 * of the MAC header (device reads on dword boundaries).
2576 * We'll tell device about this padding later.
2578 len = priv->hw_setting.tx_cmd_len +
2579 sizeof(struct iwl_cmd_header) + hdr_len;
2582 len = (len + 3) & ~3;
2589 /* Physical address of this Tx command's header (not MAC header!),
2590 * within command buffer array. */
2591 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2592 offsetof(struct iwl3945_cmd, hdr);
2594 /* Add buffer containing Tx command and MAC(!) header to TFD's
2596 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2598 if (info->control.hw_key)
2599 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2601 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2602 * if any (802.11 null frames have no payload). */
2603 len = skb->len - hdr_len;
2605 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2606 len, PCI_DMA_TODEVICE);
2607 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2611 /* If there is no payload, then we use only one Tx buffer */
2612 *control_flags = TFD_CTL_COUNT_SET(1);
2614 /* Else use 2 buffers.
2615 * Tell 3945 about any padding after MAC header */
2616 *control_flags = TFD_CTL_COUNT_SET(2) |
2617 TFD_CTL_PAD_SET(U32_PAD(len));
2619 /* Total # bytes to be transmitted */
2620 len = (u16)skb->len;
2621 out_cmd->cmd.tx.len = cpu_to_le16(len);
2623 /* TODO need this for burst mode later on */
2624 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2626 /* set is_hcca to 0; it probably will never be implemented */
2627 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2629 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2630 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2632 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2633 txq->need_update = 1;
2635 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2638 txq->need_update = 0;
2641 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2642 sizeof(out_cmd->cmd.tx));
2644 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2645 ieee80211_hdrlen(fc));
2647 /* Tell device the write index *just past* this latest filled TFD */
2648 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2649 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2650 spin_unlock_irqrestore(&priv->lock, flags);
2655 if ((iwl3945_queue_space(q) < q->high_mark)
2656 && priv->mac80211_registered) {
2657 if (wait_write_ptr) {
2658 spin_lock_irqsave(&priv->lock, flags);
2659 txq->need_update = 1;
2660 iwl3945_tx_queue_update_write_ptr(priv, txq);
2661 spin_unlock_irqrestore(&priv->lock, flags);
2664 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2670 spin_unlock_irqrestore(&priv->lock, flags);
2675 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2677 const struct ieee80211_supported_band *sband = NULL;
2678 struct ieee80211_rate *rate;
2681 sband = iwl3945_get_band(priv, priv->band);
2683 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2687 priv->active_rate = 0;
2688 priv->active_rate_basic = 0;
2690 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2691 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2693 for (i = 0; i < sband->n_bitrates; i++) {
2694 rate = &sband->bitrates[i];
2695 if ((rate->hw_value < IWL_RATE_COUNT) &&
2696 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2697 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2698 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2699 priv->active_rate |= (1 << rate->hw_value);
2703 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2704 priv->active_rate, priv->active_rate_basic);
2707 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2708 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2711 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2712 priv->staging_rxon.cck_basic_rates =
2713 ((priv->active_rate_basic &
2714 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2716 priv->staging_rxon.cck_basic_rates =
2717 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2719 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2720 priv->staging_rxon.ofdm_basic_rates =
2721 ((priv->active_rate_basic &
2722 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2723 IWL_FIRST_OFDM_RATE) & 0xFF;
2725 priv->staging_rxon.ofdm_basic_rates =
2726 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2729 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2731 unsigned long flags;
2733 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2736 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2737 disable_radio ? "OFF" : "ON");
2739 if (disable_radio) {
2740 iwl3945_scan_cancel(priv);
2741 /* FIXME: This is a workaround for AP */
2742 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2743 spin_lock_irqsave(&priv->lock, flags);
2744 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2745 CSR_UCODE_SW_BIT_RFKILL);
2746 spin_unlock_irqrestore(&priv->lock, flags);
2747 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2748 set_bit(STATUS_RF_KILL_SW, &priv->status);
2753 spin_lock_irqsave(&priv->lock, flags);
2754 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2756 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2757 spin_unlock_irqrestore(&priv->lock, flags);
2762 spin_lock_irqsave(&priv->lock, flags);
2763 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2764 if (!iwl3945_grab_nic_access(priv))
2765 iwl3945_release_nic_access(priv);
2766 spin_unlock_irqrestore(&priv->lock, flags);
2768 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2769 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2770 "disabled by HW switch\n");
2775 queue_work(priv->workqueue, &priv->restart);
2779 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2780 u32 decrypt_res, struct ieee80211_rx_status *stats)
2783 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2785 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2788 if (!(fc & IEEE80211_FCTL_PROTECTED))
2791 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2792 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2793 case RX_RES_STATUS_SEC_TYPE_TKIP:
2794 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2795 RX_RES_STATUS_BAD_ICV_MIC)
2796 stats->flag |= RX_FLAG_MMIC_ERROR;
2797 case RX_RES_STATUS_SEC_TYPE_WEP:
2798 case RX_RES_STATUS_SEC_TYPE_CCMP:
2799 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2800 RX_RES_STATUS_DECRYPT_OK) {
2801 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2802 stats->flag |= RX_FLAG_DECRYPTED;
2811 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2813 #include "iwl-spectrum.h"
2815 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2816 #define BEACON_TIME_MASK_HIGH 0xFF000000
2817 #define TIME_UNIT 1024
2820 * extended beacon time format
2821 * time in usec will be changed into a 32-bit value in 8:24 format
2822 * the high 1 byte is the beacon counts
2823 * the lower 3 bytes is the time in usec within one beacon interval
2826 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2830 u32 interval = beacon_interval * 1024;
2832 if (!interval || !usec)
2835 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2836 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2838 return (quot << 24) + rem;
2841 /* base is usually what we get from ucode with each received frame,
2842 * the same as HW timer counter counting down
2845 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2847 u32 base_low = base & BEACON_TIME_MASK_LOW;
2848 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2849 u32 interval = beacon_interval * TIME_UNIT;
2850 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2851 (addon & BEACON_TIME_MASK_HIGH);
2853 if (base_low > addon_low)
2854 res += base_low - addon_low;
2855 else if (base_low < addon_low) {
2856 res += interval + base_low - addon_low;
2861 return cpu_to_le32(res);
2864 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
2865 struct ieee80211_measurement_params *params,
2868 struct iwl_spectrum_cmd spectrum;
2869 struct iwl_rx_packet *res;
2870 struct iwl3945_host_cmd cmd = {
2871 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2872 .data = (void *)&spectrum,
2873 .meta.flags = CMD_WANT_SKB,
2875 u32 add_time = le64_to_cpu(params->start_time);
2877 int spectrum_resp_status;
2878 int duration = le16_to_cpu(params->duration);
2880 if (iwl3945_is_associated(priv))
2882 iwl3945_usecs_to_beacons(
2883 le64_to_cpu(params->start_time) - priv->last_tsf,
2884 le16_to_cpu(priv->rxon_timing.beacon_interval));
2886 memset(&spectrum, 0, sizeof(spectrum));
2888 spectrum.channel_count = cpu_to_le16(1);
2890 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2891 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2892 cmd.len = sizeof(spectrum);
2893 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2895 if (iwl3945_is_associated(priv))
2896 spectrum.start_time =
2897 iwl3945_add_beacon_time(priv->last_beacon_time,
2899 le16_to_cpu(priv->rxon_timing.beacon_interval));
2901 spectrum.start_time = 0;
2903 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2904 spectrum.channels[0].channel = params->channel;
2905 spectrum.channels[0].type = type;
2906 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2907 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2908 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2910 rc = iwl3945_send_cmd_sync(priv, &cmd);
2914 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2915 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2916 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2920 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2921 switch (spectrum_resp_status) {
2922 case 0: /* Command will be handled */
2923 if (res->u.spectrum.id != 0xff) {
2924 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2925 res->u.spectrum.id);
2926 priv->measurement_status &= ~MEASUREMENT_READY;
2928 priv->measurement_status |= MEASUREMENT_ACTIVE;
2932 case 1: /* Command will not be handled */
2937 dev_kfree_skb_any(cmd.meta.u.skb);
2943 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
2944 struct iwl3945_rx_mem_buffer *rxb)
2946 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2947 struct iwl_alive_resp *palive;
2948 struct delayed_work *pwork;
2950 palive = &pkt->u.alive_frame;
2952 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2954 palive->is_valid, palive->ver_type,
2955 palive->ver_subtype);
2957 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2958 IWL_DEBUG_INFO("Initialization Alive received.\n");
2959 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2960 sizeof(struct iwl_alive_resp));
2961 pwork = &priv->init_alive_start;
2963 IWL_DEBUG_INFO("Runtime Alive received.\n");
2964 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2965 sizeof(struct iwl_alive_resp));
2966 pwork = &priv->alive_start;
2967 iwl3945_disable_events(priv);
2970 /* We delay the ALIVE response by 5ms to
2971 * give the HW RF Kill time to activate... */
2972 if (palive->is_valid == UCODE_VALID_OK)
2973 queue_delayed_work(priv->workqueue, pwork,
2974 msecs_to_jiffies(5));
2976 IWL_WARNING("uCode did not respond OK.\n");
2979 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
2980 struct iwl3945_rx_mem_buffer *rxb)
2982 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2984 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2988 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
2989 struct iwl3945_rx_mem_buffer *rxb)
2991 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2993 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2994 "seq 0x%04X ser 0x%08X\n",
2995 le32_to_cpu(pkt->u.err_resp.error_type),
2996 get_cmd_string(pkt->u.err_resp.cmd_id),
2997 pkt->u.err_resp.cmd_id,
2998 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2999 le32_to_cpu(pkt->u.err_resp.error_info));
3002 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3004 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3006 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3007 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3008 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
3009 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3010 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3011 rxon->channel = csa->channel;
3012 priv->staging_rxon.channel = csa->channel;
3015 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3016 struct iwl3945_rx_mem_buffer *rxb)
3018 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3019 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3020 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
3022 if (!report->state) {
3023 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3024 "Spectrum Measure Notification: Start\n");
3028 memcpy(&priv->measure_report, report, sizeof(*report));
3029 priv->measurement_status |= MEASUREMENT_READY;
3033 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3034 struct iwl3945_rx_mem_buffer *rxb)
3036 #ifdef CONFIG_IWL3945_DEBUG
3037 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3038 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
3039 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3040 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3044 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3045 struct iwl3945_rx_mem_buffer *rxb)
3047 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3048 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3049 "notification for %s:\n",
3050 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3051 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
3052 le32_to_cpu(pkt->len));
3055 static void iwl3945_bg_beacon_update(struct work_struct *work)
3057 struct iwl3945_priv *priv =
3058 container_of(work, struct iwl3945_priv, beacon_update);
3059 struct sk_buff *beacon;
3061 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3062 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
3065 IWL_ERROR("update beacon failed\n");
3069 mutex_lock(&priv->mutex);
3070 /* new beacon skb is allocated every time; dispose previous.*/
3071 if (priv->ibss_beacon)
3072 dev_kfree_skb(priv->ibss_beacon);
3074 priv->ibss_beacon = beacon;
3075 mutex_unlock(&priv->mutex);
3077 iwl3945_send_beacon_cmd(priv);
3080 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3081 struct iwl3945_rx_mem_buffer *rxb)
3083 #ifdef CONFIG_IWL3945_DEBUG
3084 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3085 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3086 u8 rate = beacon->beacon_notify_hdr.rate;
3088 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3089 "tsf %d %d rate %d\n",
3090 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3091 beacon->beacon_notify_hdr.failure_frame,
3092 le32_to_cpu(beacon->ibss_mgr_status),
3093 le32_to_cpu(beacon->high_tsf),
3094 le32_to_cpu(beacon->low_tsf), rate);
3097 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3098 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3099 queue_work(priv->workqueue, &priv->beacon_update);
3102 /* Service response to REPLY_SCAN_CMD (0x80) */
3103 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3104 struct iwl3945_rx_mem_buffer *rxb)
3106 #ifdef CONFIG_IWL3945_DEBUG
3107 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3108 struct iwl_scanreq_notification *notif =
3109 (struct iwl_scanreq_notification *)pkt->u.raw;
3111 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3115 /* Service SCAN_START_NOTIFICATION (0x82) */
3116 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3117 struct iwl3945_rx_mem_buffer *rxb)
3119 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3120 struct iwl_scanstart_notification *notif =
3121 (struct iwl_scanstart_notification *)pkt->u.raw;
3122 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3123 IWL_DEBUG_SCAN("Scan start: "
3125 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3127 notif->band ? "bg" : "a",
3129 notif->tsf_low, notif->status, notif->beacon_timer);
3132 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3133 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3134 struct iwl3945_rx_mem_buffer *rxb)
3136 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3137 struct iwl_scanresults_notification *notif =
3138 (struct iwl_scanresults_notification *)pkt->u.raw;
3140 IWL_DEBUG_SCAN("Scan ch.res: "
3142 "(TSF: 0x%08X:%08X) - %d "
3143 "elapsed=%lu usec (%dms since last)\n",
3145 notif->band ? "bg" : "a",
3146 le32_to_cpu(notif->tsf_high),
3147 le32_to_cpu(notif->tsf_low),
3148 le32_to_cpu(notif->statistics[0]),
3149 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3150 jiffies_to_msecs(elapsed_jiffies
3151 (priv->last_scan_jiffies, jiffies)));
3153 priv->last_scan_jiffies = jiffies;
3154 priv->next_scan_jiffies = 0;
3157 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3158 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3159 struct iwl3945_rx_mem_buffer *rxb)
3161 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3162 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3164 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3165 scan_notif->scanned_channels,
3166 scan_notif->tsf_low,
3167 scan_notif->tsf_high, scan_notif->status);
3169 /* The HW is no longer scanning */
3170 clear_bit(STATUS_SCAN_HW, &priv->status);
3172 /* The scan completion notification came in, so kill that timer... */
3173 cancel_delayed_work(&priv->scan_check);
3175 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3176 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3178 jiffies_to_msecs(elapsed_jiffies
3179 (priv->scan_pass_start, jiffies)));
3181 /* Remove this scanned band from the list of pending
3182 * bands to scan, band G precedes A in order of scanning
3183 * as seen in iwl3945_bg_request_scan */
3184 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3185 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3186 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3187 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3189 /* If a request to abort was given, or the scan did not succeed
3190 * then we reset the scan state machine and terminate,
3191 * re-queuing another scan if one has been requested */
3192 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3193 IWL_DEBUG_INFO("Aborted scan completed.\n");
3194 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3196 /* If there are more bands on this scan pass reschedule */
3197 if (priv->scan_bands > 0)
3201 priv->last_scan_jiffies = jiffies;
3202 priv->next_scan_jiffies = 0;
3203 IWL_DEBUG_INFO("Setting scan to off\n");
3205 clear_bit(STATUS_SCANNING, &priv->status);
3207 IWL_DEBUG_INFO("Scan took %dms\n",
3208 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3210 queue_work(priv->workqueue, &priv->scan_completed);
3215 priv->scan_pass_start = jiffies;
3216 queue_work(priv->workqueue, &priv->request_scan);
3219 /* Handle notification from uCode that card's power state is changing
3220 * due to software, hardware, or critical temperature RFKILL */
3221 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3222 struct iwl3945_rx_mem_buffer *rxb)
3224 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3225 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3226 unsigned long status = priv->status;
3228 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3229 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3230 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3232 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3233 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3235 if (flags & HW_CARD_DISABLED)
3236 set_bit(STATUS_RF_KILL_HW, &priv->status);
3238 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3241 if (flags & SW_CARD_DISABLED)
3242 set_bit(STATUS_RF_KILL_SW, &priv->status);
3244 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3246 iwl3945_scan_cancel(priv);
3248 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3249 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3250 (test_bit(STATUS_RF_KILL_SW, &status) !=
3251 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3252 queue_work(priv->workqueue, &priv->rf_kill);
3254 wake_up_interruptible(&priv->wait_command_queue);
3258 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3260 * Setup the RX handlers for each of the reply types sent from the uCode
3263 * This function chains into the hardware specific files for them to setup
3264 * any hardware specific handlers as well.
3266 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3268 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3269 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3270 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3271 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3272 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3273 iwl3945_rx_spectrum_measure_notif;
3274 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3275 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3276 iwl3945_rx_pm_debug_statistics_notif;
3277 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3280 * The same handler is used for both the REPLY to a discrete
3281 * statistics request from the host as well as for the periodic
3282 * statistics notifications (after received beacons) from the uCode.
3284 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3285 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3287 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3288 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3289 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3290 iwl3945_rx_scan_results_notif;
3291 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3292 iwl3945_rx_scan_complete_notif;
3293 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3295 /* Set up hardware specific Rx handlers */
3296 iwl3945_hw_rx_handler_setup(priv);
3300 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3301 * When FW advances 'R' index, all entries between old and new 'R' index
3302 * need to be reclaimed.
3304 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3305 int txq_id, int index)
3307 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3308 struct iwl3945_queue *q = &txq->q;
3311 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3312 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3313 "is out of range [0-%d] %d %d.\n", txq_id,
3314 index, q->n_bd, q->write_ptr, q->read_ptr);
3318 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3319 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3321 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3322 q->write_ptr, q->read_ptr);
3323 queue_work(priv->workqueue, &priv->restart);
3332 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3333 * @rxb: Rx buffer to reclaim
3335 * If an Rx buffer has an async callback associated with it the callback
3336 * will be executed. The attached skb (if present) will only be freed
3337 * if the callback returns 1
3339 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3340 struct iwl3945_rx_mem_buffer *rxb)
3342 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3343 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3344 int txq_id = SEQ_TO_QUEUE(sequence);
3345 int index = SEQ_TO_INDEX(sequence);
3346 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3348 struct iwl3945_cmd *cmd;
3350 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3352 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3353 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3355 /* Input error checking is done when commands are added to queue. */
3356 if (cmd->meta.flags & CMD_WANT_SKB) {
3357 cmd->meta.source->u.skb = rxb->skb;
3359 } else if (cmd->meta.u.callback &&
3360 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3363 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3365 if (!(cmd->meta.flags & CMD_ASYNC)) {
3366 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3367 wake_up_interruptible(&priv->wait_command_queue);
3371 /************************** RX-FUNCTIONS ****************************/
3373 * Rx theory of operation
3375 * The host allocates 32 DMA target addresses and passes the host address
3376 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3380 * The host/firmware share two index registers for managing the Rx buffers.
3382 * The READ index maps to the first position that the firmware may be writing
3383 * to -- the driver can read up to (but not including) this position and get
3385 * The READ index is managed by the firmware once the card is enabled.
3387 * The WRITE index maps to the last position the driver has read from -- the
3388 * position preceding WRITE is the last slot the firmware can place a packet.
3390 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3393 * During initialization, the host sets up the READ queue position to the first
3394 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3396 * When the firmware places a packet in a buffer, it will advance the READ index
3397 * and fire the RX interrupt. The driver can then query the READ index and
3398 * process as many packets as possible, moving the WRITE index forward as it
3399 * resets the Rx queue buffers with new memory.
3401 * The management in the driver is as follows:
3402 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3403 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3404 * to replenish the iwl->rxq->rx_free.
3405 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3406 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3407 * 'processed' and 'read' driver indexes as well)
3408 * + A received packet is processed and handed to the kernel network stack,
3409 * detached from the iwl->rxq. The driver 'processed' index is updated.
3410 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3411 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3412 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3413 * were enough free buffers and RX_STALLED is set it is cleared.
3418 * iwl3945_rx_queue_alloc() Allocates rx_free
3419 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3420 * iwl3945_rx_queue_restock
3421 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3422 * queue, updates firmware pointers, and updates
3423 * the WRITE index. If insufficient rx_free buffers
3424 * are available, schedules iwl3945_rx_replenish
3426 * -- enable interrupts --
3427 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3428 * READ INDEX, detaching the SKB from the pool.
3429 * Moves the packet buffer from queue to rx_used.
3430 * Calls iwl3945_rx_queue_restock to refill any empty
3437 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3439 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3441 int s = q->read - q->write;
3444 /* keep some buffer to not confuse full and empty queue */
3452 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3454 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3458 unsigned long flags;
3460 spin_lock_irqsave(&q->lock, flags);
3462 if (q->need_update == 0)
3465 /* If power-saving is in use, make sure device is awake */
3466 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3467 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3469 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3470 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3471 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3475 rc = iwl3945_grab_nic_access(priv);
3479 /* Device expects a multiple of 8 */
3480 iwl3945_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3482 iwl3945_release_nic_access(priv);
3484 /* Else device is assumed to be awake */
3486 /* Device expects a multiple of 8 */
3487 iwl3945_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3493 spin_unlock_irqrestore(&q->lock, flags);
3498 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3500 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3501 dma_addr_t dma_addr)
3503 return cpu_to_le32((u32)dma_addr);
3507 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3509 * If there are slots in the RX queue that need to be restocked,
3510 * and we have free pre-allocated buffers, fill the ranks as much
3511 * as we can, pulling from rx_free.
3513 * This moves the 'write' index forward to catch up with 'processed', and
3514 * also updates the memory address in the firmware to reference the new
3517 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3519 struct iwl3945_rx_queue *rxq = &priv->rxq;
3520 struct list_head *element;
3521 struct iwl3945_rx_mem_buffer *rxb;
3522 unsigned long flags;
3525 spin_lock_irqsave(&rxq->lock, flags);
3526 write = rxq->write & ~0x7;
3527 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3528 /* Get next free Rx buffer, remove from free list */
3529 element = rxq->rx_free.next;
3530 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3533 /* Point to Rx buffer via next RBD in circular buffer */
3534 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3535 rxq->queue[rxq->write] = rxb;
3536 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3539 spin_unlock_irqrestore(&rxq->lock, flags);
3540 /* If the pre-allocated buffer pool is dropping low, schedule to
3542 if (rxq->free_count <= RX_LOW_WATERMARK)
3543 queue_work(priv->workqueue, &priv->rx_replenish);
3546 /* If we've added more space for the firmware to place data, tell it.
3547 * Increment device's write pointer in multiples of 8. */
3548 if ((write != (rxq->write & ~0x7))
3549 || (abs(rxq->write - rxq->read) > 7)) {
3550 spin_lock_irqsave(&rxq->lock, flags);
3551 rxq->need_update = 1;
3552 spin_unlock_irqrestore(&rxq->lock, flags);
3553 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3562 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3564 * When moving to rx_free an SKB is allocated for the slot.
3566 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3567 * This is called as a scheduled work item (except for during initialization)
3569 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3571 struct iwl3945_rx_queue *rxq = &priv->rxq;
3572 struct list_head *element;
3573 struct iwl3945_rx_mem_buffer *rxb;
3574 unsigned long flags;
3575 spin_lock_irqsave(&rxq->lock, flags);
3576 while (!list_empty(&rxq->rx_used)) {
3577 element = rxq->rx_used.next;
3578 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3580 /* Alloc a new receive buffer */
3582 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3584 if (net_ratelimit())
3585 printk(KERN_CRIT DRV_NAME
3586 ": Can not allocate SKB buffers\n");
3587 /* We don't reschedule replenish work here -- we will
3588 * call the restock method and if it still needs
3589 * more buffers it will schedule replenish */
3593 /* If radiotap head is required, reserve some headroom here.
3594 * The physical head count is a variable rx_stats->phy_count.
3595 * We reserve 4 bytes here. Plus these extra bytes, the
3596 * headroom of the physical head should be enough for the
3597 * radiotap head that iwl3945 supported. See iwl3945_rt.
3599 skb_reserve(rxb->skb, 4);
3601 priv->alloc_rxb_skb++;
3604 /* Get physical address of RB/SKB */
3606 pci_map_single(priv->pci_dev, rxb->skb->data,
3607 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3608 list_add_tail(&rxb->list, &rxq->rx_free);
3611 spin_unlock_irqrestore(&rxq->lock, flags);
3615 * this should be called while priv->lock is locked
3617 static void __iwl3945_rx_replenish(void *data)
3619 struct iwl3945_priv *priv = data;
3621 iwl3945_rx_allocate(priv);
3622 iwl3945_rx_queue_restock(priv);
3626 void iwl3945_rx_replenish(void *data)
3628 struct iwl3945_priv *priv = data;
3629 unsigned long flags;
3631 iwl3945_rx_allocate(priv);
3633 spin_lock_irqsave(&priv->lock, flags);
3634 iwl3945_rx_queue_restock(priv);
3635 spin_unlock_irqrestore(&priv->lock, flags);
3638 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3639 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3640 * This free routine walks the list of POOL entries and if SKB is set to
3641 * non NULL it is unmapped and freed
3643 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3646 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3647 if (rxq->pool[i].skb != NULL) {
3648 pci_unmap_single(priv->pci_dev,
3649 rxq->pool[i].dma_addr,
3650 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3651 dev_kfree_skb(rxq->pool[i].skb);
3655 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3660 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3662 struct iwl3945_rx_queue *rxq = &priv->rxq;
3663 struct pci_dev *dev = priv->pci_dev;
3666 spin_lock_init(&rxq->lock);
3667 INIT_LIST_HEAD(&rxq->rx_free);
3668 INIT_LIST_HEAD(&rxq->rx_used);
3670 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3671 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3675 /* Fill the rx_used queue with _all_ of the Rx buffers */
3676 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3677 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3679 /* Set us so that we have processed and used all buffers, but have
3680 * not restocked the Rx queue with fresh buffers */
3681 rxq->read = rxq->write = 0;
3682 rxq->free_count = 0;
3683 rxq->need_update = 0;
3687 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3689 unsigned long flags;
3691 spin_lock_irqsave(&rxq->lock, flags);
3692 INIT_LIST_HEAD(&rxq->rx_free);
3693 INIT_LIST_HEAD(&rxq->rx_used);
3694 /* Fill the rx_used queue with _all_ of the Rx buffers */
3695 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3696 /* In the reset function, these buffers may have been allocated
3697 * to an SKB, so we need to unmap and free potential storage */
3698 if (rxq->pool[i].skb != NULL) {
3699 pci_unmap_single(priv->pci_dev,
3700 rxq->pool[i].dma_addr,
3701 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3702 priv->alloc_rxb_skb--;
3703 dev_kfree_skb(rxq->pool[i].skb);
3704 rxq->pool[i].skb = NULL;
3706 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3709 /* Set us so that we have processed and used all buffers, but have
3710 * not restocked the Rx queue with fresh buffers */
3711 rxq->read = rxq->write = 0;
3712 rxq->free_count = 0;
3713 spin_unlock_irqrestore(&rxq->lock, flags);
3716 /* Convert linear signal-to-noise ratio into dB */
3717 static u8 ratio2dB[100] = {
3718 /* 0 1 2 3 4 5 6 7 8 9 */
3719 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3720 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3721 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3722 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3723 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3724 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3725 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3726 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3727 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3728 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3731 /* Calculates a relative dB value from a ratio of linear
3732 * (i.e. not dB) signal levels.
3733 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3734 int iwl3945_calc_db_from_ratio(int sig_ratio)
3736 /* 1000:1 or higher just report as 60 dB */
3737 if (sig_ratio >= 1000)
3740 /* 100:1 or higher, divide by 10 and use table,
3741 * add 20 dB to make up for divide by 10 */
3742 if (sig_ratio >= 100)
3743 return 20 + (int)ratio2dB[sig_ratio/10];
3745 /* We shouldn't see this */
3749 /* Use table for ratios 1:1 - 99:1 */
3750 return (int)ratio2dB[sig_ratio];
3753 #define PERFECT_RSSI (-20) /* dBm */
3754 #define WORST_RSSI (-95) /* dBm */
3755 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3757 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3758 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3759 * about formulas used below. */
3760 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3763 int degradation = PERFECT_RSSI - rssi_dbm;
3765 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3766 * as indicator; formula is (signal dbm - noise dbm).
3767 * SNR at or above 40 is a great signal (100%).
3768 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3769 * Weakest usable signal is usually 10 - 15 dB SNR. */
3771 if (rssi_dbm - noise_dbm >= 40)
3773 else if (rssi_dbm < noise_dbm)
3775 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3777 /* Else use just the signal level.
3778 * This formula is a least squares fit of data points collected and
3779 * compared with a reference system that had a percentage (%) display
3780 * for signal quality. */
3782 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3783 (15 * RSSI_RANGE + 62 * degradation)) /
3784 (RSSI_RANGE * RSSI_RANGE);
3788 else if (sig_qual < 1)
3795 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3797 * Uses the priv->rx_handlers callback function array to invoke
3798 * the appropriate handlers, including command responses,
3799 * frame-received notifications, and other notifications.
3801 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3803 struct iwl3945_rx_mem_buffer *rxb;
3804 struct iwl_rx_packet *pkt;
3805 struct iwl3945_rx_queue *rxq = &priv->rxq;
3808 unsigned long flags;
3812 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3813 * buffer that the driver may process (last buffer filled by ucode). */
3814 r = iwl3945_hw_get_rx_read(priv);
3817 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3819 /* Rx interrupt, but nothing sent from uCode */
3821 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3824 rxb = rxq->queue[i];
3826 /* If an RXB doesn't have a Rx queue slot associated with it,
3827 * then a bug has been introduced in the queue refilling
3828 * routines -- catch it here */
3829 BUG_ON(rxb == NULL);
3831 rxq->queue[i] = NULL;
3833 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3835 PCI_DMA_FROMDEVICE);
3836 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3838 /* Reclaim a command buffer only if this packet is a response
3839 * to a (driver-originated) command.
3840 * If the packet (e.g. Rx frame) originated from uCode,
3841 * there is no command buffer to reclaim.
3842 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3843 * but apparently a few don't get set; catch them here. */
3844 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3845 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3846 (pkt->hdr.cmd != REPLY_TX);
3848 /* Based on type of command response or notification,
3849 * handle those that need handling via function in
3850 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3851 if (priv->rx_handlers[pkt->hdr.cmd]) {
3852 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3853 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3854 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3855 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3857 /* No handling needed */
3858 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3859 "r %d i %d No handler needed for %s, 0x%02x\n",
3860 r, i, get_cmd_string(pkt->hdr.cmd),
3865 /* Invoke any callbacks, transfer the skb to caller, and
3866 * fire off the (possibly) blocking iwl3945_send_cmd()
3867 * as we reclaim the driver command queue */
3868 if (rxb && rxb->skb)
3869 iwl3945_tx_cmd_complete(priv, rxb);
3871 IWL_WARNING("Claim null rxb?\n");
3874 /* For now we just don't re-use anything. We can tweak this
3875 * later to try and re-use notification packets and SKBs that
3876 * fail to Rx correctly */
3877 if (rxb->skb != NULL) {
3878 priv->alloc_rxb_skb--;
3879 dev_kfree_skb_any(rxb->skb);
3883 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
3884 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3885 spin_lock_irqsave(&rxq->lock, flags);
3886 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3887 spin_unlock_irqrestore(&rxq->lock, flags);
3888 i = (i + 1) & RX_QUEUE_MASK;
3889 /* If there are a lot of unused frames,
3890 * restock the Rx queue so ucode won't assert. */
3895 __iwl3945_rx_replenish(priv);
3901 /* Backtrack one entry */
3903 iwl3945_rx_queue_restock(priv);
3907 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3909 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
3910 struct iwl3945_tx_queue *txq)
3914 int txq_id = txq->q.id;
3916 if (txq->need_update == 0)
3919 /* if we're trying to save power */
3920 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3921 /* wake up nic if it's powered down ...
3922 * uCode will wake up, and interrupt us again, so next
3923 * time we'll skip this part. */
3924 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3926 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3927 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3928 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3929 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3933 /* restore this queue's parameters in nic hardware. */
3934 rc = iwl3945_grab_nic_access(priv);
3937 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
3938 txq->q.write_ptr | (txq_id << 8));
3939 iwl3945_release_nic_access(priv);
3941 /* else not in power-save mode, uCode will never sleep when we're
3942 * trying to tx (during RFKILL, we're not trying to tx). */
3944 iwl3945_write32(priv, HBUS_TARG_WRPTR,
3945 txq->q.write_ptr | (txq_id << 8));
3947 txq->need_update = 0;
3952 #ifdef CONFIG_IWL3945_DEBUG
3953 static void iwl3945_print_rx_config_cmd(struct iwl3945_priv *priv,
3954 struct iwl3945_rxon_cmd *rxon)
3956 IWL_DEBUG_RADIO("RX CONFIG:\n");
3957 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3958 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3959 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3960 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3961 le32_to_cpu(rxon->filter_flags));
3962 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3963 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3964 rxon->ofdm_basic_rates);
3965 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3966 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3967 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3968 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3972 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
3974 IWL_DEBUG_ISR("Enabling interrupts\n");
3975 set_bit(STATUS_INT_ENABLED, &priv->status);
3976 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3980 /* call this function to flush any scheduled tasklet */
3981 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
3983 /* wait to make sure we flush pending tasklet*/
3984 synchronize_irq(priv->pci_dev->irq);
3985 tasklet_kill(&priv->irq_tasklet);
3989 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
3991 clear_bit(STATUS_INT_ENABLED, &priv->status);
3993 /* disable interrupts from uCode/NIC to host */
3994 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
3996 /* acknowledge/clear/reset any interrupts still pending
3997 * from uCode or flow handler (Rx/Tx DMA) */
3998 iwl3945_write32(priv, CSR_INT, 0xffffffff);
3999 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4000 IWL_DEBUG_ISR("Disabled interrupts\n");
4003 static const char *desc_lookup(int i)
4011 return "BAD_CHECKSUM";
4013 return "NMI_INTERRUPT";
4017 return "FATAL_ERROR";
4023 #define ERROR_START_OFFSET (1 * sizeof(u32))
4024 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4026 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4029 u32 desc, time, count, base, data1;
4030 u32 blink1, blink2, ilink1, ilink2;
4033 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4035 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4036 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4040 rc = iwl3945_grab_nic_access(priv);
4042 IWL_WARNING("Can not read from adapter at this time.\n");
4046 count = iwl3945_read_targ_mem(priv, base);
4048 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4049 IWL_ERROR("Start IWL Error Log Dump:\n");
4050 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4053 IWL_ERROR("Desc Time asrtPC blink2 "
4054 "ilink1 nmiPC Line\n");
4055 for (i = ERROR_START_OFFSET;
4056 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4057 i += ERROR_ELEM_SIZE) {
4058 desc = iwl3945_read_targ_mem(priv, base + i);
4060 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4062 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4064 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4066 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4068 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4070 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4073 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4074 desc_lookup(desc), desc, time, blink1, blink2,
4075 ilink1, ilink2, data1);
4078 iwl3945_release_nic_access(priv);
4082 #define EVENT_START_OFFSET (6 * sizeof(u32))
4085 * iwl3945_print_event_log - Dump error event log to syslog
4087 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4089 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4090 u32 num_events, u32 mode)
4093 u32 base; /* SRAM byte address of event log header */
4094 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4095 u32 ptr; /* SRAM byte address of log data */
4096 u32 ev, time, data; /* event log data */
4098 if (num_events == 0)
4101 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4104 event_size = 2 * sizeof(u32);
4106 event_size = 3 * sizeof(u32);
4108 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4110 /* "time" is actually "data" for mode 0 (no timestamp).
4111 * place event id # at far right for easier visual parsing. */
4112 for (i = 0; i < num_events; i++) {
4113 ev = iwl3945_read_targ_mem(priv, ptr);
4115 time = iwl3945_read_targ_mem(priv, ptr);
4118 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4120 data = iwl3945_read_targ_mem(priv, ptr);
4122 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4127 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4130 u32 base; /* SRAM byte address of event log header */
4131 u32 capacity; /* event log capacity in # entries */
4132 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4133 u32 num_wraps; /* # times uCode wrapped to top of log */
4134 u32 next_entry; /* index of next entry to be written by uCode */
4135 u32 size; /* # entries that we'll print */
4137 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4138 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4139 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4143 rc = iwl3945_grab_nic_access(priv);
4145 IWL_WARNING("Can not read from adapter at this time.\n");
4149 /* event log header */
4150 capacity = iwl3945_read_targ_mem(priv, base);
4151 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4152 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4153 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4155 size = num_wraps ? capacity : next_entry;
4157 /* bail out if nothing in log */
4159 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4160 iwl3945_release_nic_access(priv);
4164 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4167 /* if uCode has wrapped back to top of log, start at the oldest entry,
4168 * i.e the next one that uCode would fill. */
4170 iwl3945_print_event_log(priv, next_entry,
4171 capacity - next_entry, mode);
4173 /* (then/else) start at top of log */
4174 iwl3945_print_event_log(priv, 0, next_entry, mode);
4176 iwl3945_release_nic_access(priv);
4180 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4182 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4184 /* Set the FW error flag -- cleared on iwl3945_down */
4185 set_bit(STATUS_FW_ERROR, &priv->status);
4187 /* Cancel currently queued command. */
4188 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4190 #ifdef CONFIG_IWL3945_DEBUG
4191 if (priv->debug_level & IWL_DL_FW_ERRORS) {
4192 iwl3945_dump_nic_error_log(priv);
4193 iwl3945_dump_nic_event_log(priv);
4194 iwl3945_print_rx_config_cmd(priv, &priv->staging_rxon);
4198 wake_up_interruptible(&priv->wait_command_queue);
4200 /* Keep the restart process from trying to send host
4201 * commands by clearing the INIT status bit */
4202 clear_bit(STATUS_READY, &priv->status);
4204 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4205 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4206 "Restarting adapter due to uCode error.\n");
4208 if (iwl3945_is_associated(priv)) {
4209 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4210 sizeof(priv->recovery_rxon));
4211 priv->error_recovering = 1;
4213 queue_work(priv->workqueue, &priv->restart);
4217 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4219 unsigned long flags;
4221 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4222 sizeof(priv->staging_rxon));
4223 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4224 iwl3945_commit_rxon(priv);
4226 iwl3945_add_station(priv, priv->bssid, 1, 0);
4228 spin_lock_irqsave(&priv->lock, flags);
4229 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4230 priv->error_recovering = 0;
4231 spin_unlock_irqrestore(&priv->lock, flags);
4234 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4236 u32 inta, handled = 0;
4238 unsigned long flags;
4239 #ifdef CONFIG_IWL3945_DEBUG
4243 spin_lock_irqsave(&priv->lock, flags);
4245 /* Ack/clear/reset pending uCode interrupts.
4246 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4247 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4248 inta = iwl3945_read32(priv, CSR_INT);
4249 iwl3945_write32(priv, CSR_INT, inta);
4251 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4252 * Any new interrupts that happen after this, either while we're
4253 * in this tasklet, or later, will show up in next ISR/tasklet. */
4254 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4255 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4257 #ifdef CONFIG_IWL3945_DEBUG
4258 if (priv->debug_level & IWL_DL_ISR) {
4259 /* just for debug */
4260 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4261 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4262 inta, inta_mask, inta_fh);
4266 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4267 * atomic, make sure that inta covers all the interrupts that
4268 * we've discovered, even if FH interrupt came in just after
4269 * reading CSR_INT. */
4270 if (inta_fh & CSR39_FH_INT_RX_MASK)
4271 inta |= CSR_INT_BIT_FH_RX;
4272 if (inta_fh & CSR39_FH_INT_TX_MASK)
4273 inta |= CSR_INT_BIT_FH_TX;
4275 /* Now service all interrupt bits discovered above. */
4276 if (inta & CSR_INT_BIT_HW_ERR) {
4277 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4279 /* Tell the device to stop sending interrupts */
4280 iwl3945_disable_interrupts(priv);
4282 iwl3945_irq_handle_error(priv);
4284 handled |= CSR_INT_BIT_HW_ERR;
4286 spin_unlock_irqrestore(&priv->lock, flags);
4291 #ifdef CONFIG_IWL3945_DEBUG
4292 if (priv->debug_level & (IWL_DL_ISR)) {
4293 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4294 if (inta & CSR_INT_BIT_SCD)
4295 IWL_DEBUG_ISR("Scheduler finished to transmit "
4296 "the frame/frames.\n");
4298 /* Alive notification via Rx interrupt will do the real work */
4299 if (inta & CSR_INT_BIT_ALIVE)
4300 IWL_DEBUG_ISR("Alive interrupt\n");
4303 /* Safely ignore these bits for debug checks below */
4304 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4306 /* Error detected by uCode */
4307 if (inta & CSR_INT_BIT_SW_ERR) {
4308 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4310 iwl3945_irq_handle_error(priv);
4311 handled |= CSR_INT_BIT_SW_ERR;
4314 /* uCode wakes up after power-down sleep */
4315 if (inta & CSR_INT_BIT_WAKEUP) {
4316 IWL_DEBUG_ISR("Wakeup interrupt\n");
4317 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4318 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4319 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4320 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4321 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4322 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4323 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4325 handled |= CSR_INT_BIT_WAKEUP;
4328 /* All uCode command responses, including Tx command responses,
4329 * Rx "responses" (frame-received notification), and other
4330 * notifications from uCode come through here*/
4331 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4332 iwl3945_rx_handle(priv);
4333 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4336 if (inta & CSR_INT_BIT_FH_TX) {
4337 IWL_DEBUG_ISR("Tx interrupt\n");
4339 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4340 if (!iwl3945_grab_nic_access(priv)) {
4341 iwl3945_write_direct32(priv, FH39_TCSR_CREDIT
4342 (FH39_SRVC_CHNL), 0x0);
4343 iwl3945_release_nic_access(priv);
4345 handled |= CSR_INT_BIT_FH_TX;
4348 if (inta & ~handled)
4349 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4351 if (inta & ~CSR_INI_SET_MASK) {
4352 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4353 inta & ~CSR_INI_SET_MASK);
4354 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4357 /* Re-enable all interrupts */
4358 /* only Re-enable if disabled by irq */
4359 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4360 iwl3945_enable_interrupts(priv);
4362 #ifdef CONFIG_IWL3945_DEBUG
4363 if (priv->debug_level & (IWL_DL_ISR)) {
4364 inta = iwl3945_read32(priv, CSR_INT);
4365 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4366 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4367 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4368 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4371 spin_unlock_irqrestore(&priv->lock, flags);
4374 static irqreturn_t iwl3945_isr(int irq, void *data)
4376 struct iwl3945_priv *priv = data;
4377 u32 inta, inta_mask;
4382 spin_lock(&priv->lock);
4384 /* Disable (but don't clear!) interrupts here to avoid
4385 * back-to-back ISRs and sporadic interrupts from our NIC.
4386 * If we have something to service, the tasklet will re-enable ints.
4387 * If we *don't* have something, we'll re-enable before leaving here. */
4388 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4389 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4391 /* Discover which interrupts are active/pending */
4392 inta = iwl3945_read32(priv, CSR_INT);
4393 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4395 /* Ignore interrupt if there's nothing in NIC to service.
4396 * This may be due to IRQ shared with another device,
4397 * or due to sporadic interrupts thrown from our NIC. */
4398 if (!inta && !inta_fh) {
4399 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4403 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4404 /* Hardware disappeared */
4405 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
4409 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4410 inta, inta_mask, inta_fh);
4412 inta &= ~CSR_INT_BIT_SCD;
4414 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4415 if (likely(inta || inta_fh))
4416 tasklet_schedule(&priv->irq_tasklet);
4418 spin_unlock(&priv->lock);
4423 /* re-enable interrupts here since we don't have anything to service. */
4424 /* only Re-enable if disabled by irq */
4425 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4426 iwl3945_enable_interrupts(priv);
4427 spin_unlock(&priv->lock);
4431 /************************** EEPROM BANDS ****************************
4433 * The iwl3945_eeprom_band definitions below provide the mapping from the
4434 * EEPROM contents to the specific channel number supported for each
4437 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4438 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4439 * The specific geography and calibration information for that channel
4440 * is contained in the eeprom map itself.
4442 * During init, we copy the eeprom information and channel map
4443 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4445 * channel_map_24/52 provides the index in the channel_info array for a
4446 * given channel. We have to have two separate maps as there is channel
4447 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4450 * A value of 0xff stored in the channel_map indicates that the channel
4451 * is not supported by the hardware at all.
4453 * A value of 0xfe in the channel_map indicates that the channel is not
4454 * valid for Tx with the current hardware. This means that
4455 * while the system can tune and receive on a given channel, it may not
4456 * be able to associate or transmit any frames on that
4457 * channel. There is no corresponding channel information for that
4460 *********************************************************************/
4463 static const u8 iwl3945_eeprom_band_1[14] = {
4464 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4468 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4469 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4472 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4473 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4476 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4477 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4480 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4481 145, 149, 153, 157, 161, 165
4484 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4485 int *eeprom_ch_count,
4486 const struct iwl3945_eeprom_channel
4488 const u8 **eeprom_ch_index)
4491 case 1: /* 2.4GHz band */
4492 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4493 *eeprom_ch_info = priv->eeprom.band_1_channels;
4494 *eeprom_ch_index = iwl3945_eeprom_band_1;
4496 case 2: /* 4.9GHz band */
4497 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4498 *eeprom_ch_info = priv->eeprom.band_2_channels;
4499 *eeprom_ch_index = iwl3945_eeprom_band_2;
4501 case 3: /* 5.2GHz band */
4502 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4503 *eeprom_ch_info = priv->eeprom.band_3_channels;
4504 *eeprom_ch_index = iwl3945_eeprom_band_3;
4506 case 4: /* 5.5GHz band */
4507 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4508 *eeprom_ch_info = priv->eeprom.band_4_channels;
4509 *eeprom_ch_index = iwl3945_eeprom_band_4;
4511 case 5: /* 5.7GHz band */
4512 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4513 *eeprom_ch_info = priv->eeprom.band_5_channels;
4514 *eeprom_ch_index = iwl3945_eeprom_band_5;
4523 * iwl3945_get_channel_info - Find driver's private channel info
4525 * Based on band and channel number.
4527 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4528 enum ieee80211_band band, u16 channel)
4533 case IEEE80211_BAND_5GHZ:
4534 for (i = 14; i < priv->channel_count; i++) {
4535 if (priv->channel_info[i].channel == channel)
4536 return &priv->channel_info[i];
4540 case IEEE80211_BAND_2GHZ:
4541 if (channel >= 1 && channel <= 14)
4542 return &priv->channel_info[channel - 1];
4544 case IEEE80211_NUM_BANDS:
4551 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4555 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4557 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4559 int eeprom_ch_count = 0;
4560 const u8 *eeprom_ch_index = NULL;
4561 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4563 struct iwl3945_channel_info *ch_info;
4565 if (priv->channel_count) {
4566 IWL_DEBUG_INFO("Channel map already initialized.\n");
4570 if (priv->eeprom.version < 0x2f) {
4571 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4572 priv->eeprom.version);
4576 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4578 priv->channel_count =
4579 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4580 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4581 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4582 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4583 ARRAY_SIZE(iwl3945_eeprom_band_5);
4585 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4587 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4588 priv->channel_count, GFP_KERNEL);
4589 if (!priv->channel_info) {
4590 IWL_ERROR("Could not allocate channel_info\n");
4591 priv->channel_count = 0;
4595 ch_info = priv->channel_info;
4597 /* Loop through the 5 EEPROM bands adding them in order to the
4598 * channel map we maintain (that contains additional information than
4599 * what just in the EEPROM) */
4600 for (band = 1; band <= 5; band++) {
4602 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4603 &eeprom_ch_info, &eeprom_ch_index);
4605 /* Loop through each band adding each of the channels */
4606 for (ch = 0; ch < eeprom_ch_count; ch++) {
4607 ch_info->channel = eeprom_ch_index[ch];
4608 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4609 IEEE80211_BAND_5GHZ;
4611 /* permanently store EEPROM's channel regulatory flags
4612 * and max power in channel info database. */
4613 ch_info->eeprom = eeprom_ch_info[ch];
4615 /* Copy the run-time flags so they are there even on
4616 * invalid channels */
4617 ch_info->flags = eeprom_ch_info[ch].flags;
4619 if (!(is_channel_valid(ch_info))) {
4620 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4624 is_channel_a_band(ch_info) ?
4630 /* Initialize regulatory-based run-time data */
4631 ch_info->max_power_avg = ch_info->curr_txpow =
4632 eeprom_ch_info[ch].max_power_avg;
4633 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4634 ch_info->min_power = 0;
4636 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4637 " %ddBm): Ad-Hoc %ssupported\n",
4639 is_channel_a_band(ch_info) ?
4641 CHECK_AND_PRINT(VALID),
4642 CHECK_AND_PRINT(IBSS),
4643 CHECK_AND_PRINT(ACTIVE),
4644 CHECK_AND_PRINT(RADAR),
4645 CHECK_AND_PRINT(WIDE),
4646 CHECK_AND_PRINT(DFS),
4647 eeprom_ch_info[ch].flags,
4648 eeprom_ch_info[ch].max_power_avg,
4649 ((eeprom_ch_info[ch].
4650 flags & EEPROM_CHANNEL_IBSS)
4651 && !(eeprom_ch_info[ch].
4652 flags & EEPROM_CHANNEL_RADAR))
4655 /* Set the user_txpower_limit to the highest power
4656 * supported by any channel */
4657 if (eeprom_ch_info[ch].max_power_avg >
4658 priv->user_txpower_limit)
4659 priv->user_txpower_limit =
4660 eeprom_ch_info[ch].max_power_avg;
4666 /* Set up txpower settings in driver for all channels */
4667 if (iwl3945_txpower_set_from_eeprom(priv))
4674 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4676 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4678 kfree(priv->channel_info);
4679 priv->channel_count = 0;
4682 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4683 * sending probe req. This should be set long enough to hear probe responses
4684 * from more than one AP. */
4685 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4686 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4688 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4689 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4691 /* For faster active scanning, scan will move to the next channel if fewer than
4692 * PLCP_QUIET_THRESH packets are heard on this channel within
4693 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4694 * time if it's a quiet channel (nothing responded to our probe, and there's
4695 * no other traffic).
4696 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4697 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4698 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4700 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4701 * Must be set longer than active dwell time.
4702 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4703 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4704 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4705 #define IWL_PASSIVE_DWELL_BASE (100)
4706 #define IWL_CHANNEL_TUNE_TIME 5
4708 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4710 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4711 enum ieee80211_band band,
4714 if (band == IEEE80211_BAND_5GHZ)
4715 return IWL_ACTIVE_DWELL_TIME_52 +
4716 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4718 return IWL_ACTIVE_DWELL_TIME_24 +
4719 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4722 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4723 enum ieee80211_band band)
4725 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4726 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4727 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4729 if (iwl3945_is_associated(priv)) {
4730 /* If we're associated, we clamp the maximum passive
4731 * dwell time to be 98% of the beacon interval (minus
4732 * 2 * channel tune time) */
4733 passive = priv->beacon_int;
4734 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4735 passive = IWL_PASSIVE_DWELL_BASE;
4736 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4742 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4743 enum ieee80211_band band,
4744 u8 is_active, u8 n_probes,
4745 struct iwl3945_scan_channel *scan_ch)
4747 const struct ieee80211_channel *channels = NULL;
4748 const struct ieee80211_supported_band *sband;
4749 const struct iwl3945_channel_info *ch_info;
4750 u16 passive_dwell = 0;
4751 u16 active_dwell = 0;
4754 sband = iwl3945_get_band(priv, band);
4758 channels = sband->channels;
4760 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4761 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4763 if (passive_dwell <= active_dwell)
4764 passive_dwell = active_dwell + 1;
4766 for (i = 0, added = 0; i < sband->n_channels; i++) {
4767 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4770 scan_ch->channel = channels[i].hw_value;
4772 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4773 if (!is_channel_valid(ch_info)) {
4774 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4779 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4780 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4781 /* If passive , set up for auto-switch
4782 * and use long active_dwell time.
4784 if (!is_active || is_channel_passive(ch_info) ||
4785 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4786 scan_ch->type = 0; /* passive */
4787 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4788 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4790 scan_ch->type = 1; /* active */
4793 /* Set direct probe bits. These may be used both for active
4794 * scan channels (probes gets sent right away),
4795 * or for passive channels (probes get se sent only after
4796 * hearing clear Rx packet).*/
4797 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4799 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4801 /* uCode v1 does not allow setting direct probe bits on
4802 * passive channel. */
4803 if ((scan_ch->type & 1) && n_probes)
4804 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4807 /* Set txpower levels to defaults */
4808 scan_ch->tpc.dsp_atten = 110;
4809 /* scan_pwr_info->tpc.dsp_atten; */
4811 /*scan_pwr_info->tpc.tx_gain; */
4812 if (band == IEEE80211_BAND_5GHZ)
4813 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4815 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4816 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4818 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4822 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4824 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4825 (scan_ch->type & 1) ?
4826 active_dwell : passive_dwell);
4832 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4836 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
4837 struct ieee80211_rate *rates)
4841 for (i = 0; i < IWL_RATE_COUNT; i++) {
4842 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4843 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4844 rates[i].hw_value_short = i;
4846 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4848 * If CCK != 1M then set short preamble rate flag.
4850 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4851 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4857 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4859 static int iwl3945_init_geos(struct iwl3945_priv *priv)
4861 struct iwl3945_channel_info *ch;
4862 struct ieee80211_supported_band *sband;
4863 struct ieee80211_channel *channels;
4864 struct ieee80211_channel *geo_ch;
4865 struct ieee80211_rate *rates;
4868 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4869 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4870 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4871 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4875 channels = kzalloc(sizeof(struct ieee80211_channel) *
4876 priv->channel_count, GFP_KERNEL);
4880 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4887 /* 5.2GHz channels start after the 2.4GHz channels */
4888 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4889 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4891 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4892 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4894 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4895 sband->channels = channels;
4897 sband->bitrates = rates;
4898 sband->n_bitrates = IWL_RATE_COUNT;
4900 priv->ieee_channels = channels;
4901 priv->ieee_rates = rates;
4903 iwl3945_init_hw_rates(priv, rates);
4905 for (i = 0; i < priv->channel_count; i++) {
4906 ch = &priv->channel_info[i];
4908 /* FIXME: might be removed if scan is OK*/
4909 if (!is_channel_valid(ch))
4912 if (is_channel_a_band(ch))
4913 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4915 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4917 geo_ch = &sband->channels[sband->n_channels++];
4919 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4920 geo_ch->max_power = ch->max_power_avg;
4921 geo_ch->max_antenna_gain = 0xff;
4922 geo_ch->hw_value = ch->channel;
4924 if (is_channel_valid(ch)) {
4925 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4926 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4928 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4929 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4931 if (ch->flags & EEPROM_CHANNEL_RADAR)
4932 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4934 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4935 priv->max_channel_txpower_limit =
4938 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4941 /* Save flags for reg domain usage */
4942 geo_ch->orig_flags = geo_ch->flags;
4944 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4945 ch->channel, geo_ch->center_freq,
4946 is_channel_a_band(ch) ? "5.2" : "2.4",
4947 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4948 "restricted" : "valid",
4952 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4953 priv->cfg->sku & IWL_SKU_A) {
4954 printk(KERN_INFO DRV_NAME
4955 ": Incorrectly detected BG card as ABG. Please send "
4956 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4957 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4958 priv->cfg->sku &= ~IWL_SKU_A;
4961 printk(KERN_INFO DRV_NAME
4962 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4963 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4964 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4966 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4967 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4968 &priv->bands[IEEE80211_BAND_2GHZ];
4969 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4970 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4971 &priv->bands[IEEE80211_BAND_5GHZ];
4973 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4979 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4981 static void iwl3945_free_geos(struct iwl3945_priv *priv)
4983 kfree(priv->ieee_channels);
4984 kfree(priv->ieee_rates);
4985 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4988 /******************************************************************************
4990 * uCode download functions
4992 ******************************************************************************/
4994 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
4996 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4997 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4998 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4999 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5000 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5001 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5005 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5006 * looking at all data.
5008 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len)
5015 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5017 rc = iwl3945_grab_nic_access(priv);
5021 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5024 for (; len > 0; len -= sizeof(u32), image++) {
5025 /* read data comes through single port, auto-incr addr */
5026 /* NOTE: Use the debugless read so we don't flood kernel log
5027 * if IWL_DL_IO is set */
5028 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5029 if (val != le32_to_cpu(*image)) {
5030 IWL_ERROR("uCode INST section is invalid at "
5031 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5032 save_len - len, val, le32_to_cpu(*image));
5040 iwl3945_release_nic_access(priv);
5043 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5050 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5051 * using sample data 100 bytes apart. If these sample points are good,
5052 * it's a pretty good bet that everything between them is good, too.
5054 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5061 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5063 rc = iwl3945_grab_nic_access(priv);
5067 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5068 /* read data comes through single port, auto-incr addr */
5069 /* NOTE: Use the debugless read so we don't flood kernel log
5070 * if IWL_DL_IO is set */
5071 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5072 i + RTC_INST_LOWER_BOUND);
5073 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5074 if (val != le32_to_cpu(*image)) {
5075 #if 0 /* Enable this if you want to see details */
5076 IWL_ERROR("uCode INST section is invalid at "
5077 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5087 iwl3945_release_nic_access(priv);
5094 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5095 * and verify its contents
5097 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5104 image = (__le32 *)priv->ucode_boot.v_addr;
5105 len = priv->ucode_boot.len;
5106 rc = iwl3945_verify_inst_sparse(priv, image, len);
5108 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5112 /* Try initialize */
5113 image = (__le32 *)priv->ucode_init.v_addr;
5114 len = priv->ucode_init.len;
5115 rc = iwl3945_verify_inst_sparse(priv, image, len);
5117 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5121 /* Try runtime/protocol */
5122 image = (__le32 *)priv->ucode_code.v_addr;
5123 len = priv->ucode_code.len;
5124 rc = iwl3945_verify_inst_sparse(priv, image, len);
5126 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5130 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5132 /* Since nothing seems to match, show first several data entries in
5133 * instruction SRAM, so maybe visual inspection will give a clue.
5134 * Selection of bootstrap image (vs. other images) is arbitrary. */
5135 image = (__le32 *)priv->ucode_boot.v_addr;
5136 len = priv->ucode_boot.len;
5137 rc = iwl3945_verify_inst_full(priv, image, len);
5143 /* check contents of special bootstrap uCode SRAM */
5144 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5146 __le32 *image = priv->ucode_boot.v_addr;
5147 u32 len = priv->ucode_boot.len;
5151 IWL_DEBUG_INFO("Begin verify bsm\n");
5153 /* verify BSM SRAM contents */
5154 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5155 for (reg = BSM_SRAM_LOWER_BOUND;
5156 reg < BSM_SRAM_LOWER_BOUND + len;
5157 reg += sizeof(u32), image++) {
5158 val = iwl3945_read_prph(priv, reg);
5159 if (val != le32_to_cpu(*image)) {
5160 IWL_ERROR("BSM uCode verification failed at "
5161 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5162 BSM_SRAM_LOWER_BOUND,
5163 reg - BSM_SRAM_LOWER_BOUND, len,
5164 val, le32_to_cpu(*image));
5169 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5175 * iwl3945_load_bsm - Load bootstrap instructions
5179 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5180 * in special SRAM that does not power down during RFKILL. When powering back
5181 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5182 * the bootstrap program into the on-board processor, and starts it.
5184 * The bootstrap program loads (via DMA) instructions and data for a new
5185 * program from host DRAM locations indicated by the host driver in the
5186 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5189 * When initializing the NIC, the host driver points the BSM to the
5190 * "initialize" uCode image. This uCode sets up some internal data, then
5191 * notifies host via "initialize alive" that it is complete.
5193 * The host then replaces the BSM_DRAM_* pointer values to point to the
5194 * normal runtime uCode instructions and a backup uCode data cache buffer
5195 * (filled initially with starting data values for the on-board processor),
5196 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5197 * which begins normal operation.
5199 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5200 * the backup data cache in DRAM before SRAM is powered down.
5202 * When powering back up, the BSM loads the bootstrap program. This reloads
5203 * the runtime uCode instructions and the backup data cache into SRAM,
5204 * and re-launches the runtime uCode from where it left off.
5206 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5208 __le32 *image = priv->ucode_boot.v_addr;
5209 u32 len = priv->ucode_boot.len;
5219 IWL_DEBUG_INFO("Begin load bsm\n");
5221 /* make sure bootstrap program is no larger than BSM's SRAM size */
5222 if (len > IWL_MAX_BSM_SIZE)
5225 /* Tell bootstrap uCode where to find the "Initialize" uCode
5226 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5227 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5228 * after the "initialize" uCode has run, to point to
5229 * runtime/protocol instructions and backup data cache. */
5230 pinst = priv->ucode_init.p_addr;
5231 pdata = priv->ucode_init_data.p_addr;
5232 inst_len = priv->ucode_init.len;
5233 data_len = priv->ucode_init_data.len;
5235 rc = iwl3945_grab_nic_access(priv);
5239 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5240 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5241 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5242 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5244 /* Fill BSM memory with bootstrap instructions */
5245 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5246 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5247 reg_offset += sizeof(u32), image++)
5248 _iwl3945_write_prph(priv, reg_offset,
5249 le32_to_cpu(*image));
5251 rc = iwl3945_verify_bsm(priv);
5253 iwl3945_release_nic_access(priv);
5257 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5258 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5259 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5260 RTC_INST_LOWER_BOUND);
5261 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5263 /* Load bootstrap code into instruction SRAM now,
5264 * to prepare to load "initialize" uCode */
5265 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5266 BSM_WR_CTRL_REG_BIT_START);
5268 /* Wait for load of bootstrap uCode to finish */
5269 for (i = 0; i < 100; i++) {
5270 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5271 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5276 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5278 IWL_ERROR("BSM write did not complete!\n");
5282 /* Enable future boot loads whenever power management unit triggers it
5283 * (e.g. when powering back up after power-save shutdown) */
5284 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5285 BSM_WR_CTRL_REG_BIT_START_EN);
5287 iwl3945_release_nic_access(priv);
5292 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5294 /* Remove all resets to allow NIC to operate */
5295 iwl3945_write32(priv, CSR_RESET, 0);
5299 * iwl3945_read_ucode - Read uCode images from disk file.
5301 * Copy into buffers for card to fetch via bus-mastering
5303 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5305 struct iwl3945_ucode *ucode;
5306 int ret = -EINVAL, index;
5307 const struct firmware *ucode_raw;
5308 /* firmware file name contains uCode/driver compatibility version */
5309 const char *name_pre = priv->cfg->fw_name_pre;
5310 const unsigned int api_max = priv->cfg->ucode_api_max;
5311 const unsigned int api_min = priv->cfg->ucode_api_min;
5315 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5317 /* Ask kernel firmware_class module to get the boot firmware off disk.
5318 * request_firmware() is synchronous, file is in memory on return. */
5319 for (index = api_max; index >= api_min; index--) {
5320 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5321 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5323 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5330 if (index < api_max)
5331 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
5333 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5334 buf, ucode_raw->size);
5342 /* Make sure that we got at least our header! */
5343 if (ucode_raw->size < sizeof(*ucode)) {
5344 IWL_ERROR("File size way too small!\n");
5349 /* Data from ucode file: header followed by uCode images */
5350 ucode = (void *)ucode_raw->data;
5352 priv->ucode_ver = le32_to_cpu(ucode->ver);
5353 api_ver = IWL_UCODE_API(priv->ucode_ver);
5354 inst_size = le32_to_cpu(ucode->inst_size);
5355 data_size = le32_to_cpu(ucode->data_size);
5356 init_size = le32_to_cpu(ucode->init_size);
5357 init_data_size = le32_to_cpu(ucode->init_data_size);
5358 boot_size = le32_to_cpu(ucode->boot_size);
5360 /* api_ver should match the api version forming part of the
5361 * firmware filename ... but we don't check for that and only rely
5362 * on the API version read from firware header from here on forward */
5364 if (api_ver < api_min || api_ver > api_max) {
5365 IWL_ERROR("Driver unable to support your firmware API. "
5366 "Driver supports v%u, firmware is v%u.\n",
5368 priv->ucode_ver = 0;
5372 if (api_ver != api_max)
5373 IWL_ERROR("Firmware has old API version. Expected %u, "
5374 "got %u. New firmware can be obtained "
5375 "from http://www.intellinuxwireless.org.\n",
5378 printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
5379 IWL_UCODE_MAJOR(priv->ucode_ver),
5380 IWL_UCODE_MINOR(priv->ucode_ver),
5381 IWL_UCODE_API(priv->ucode_ver),
5382 IWL_UCODE_SERIAL(priv->ucode_ver));
5383 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5385 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5386 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5387 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5388 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5389 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5392 /* Verify size of file vs. image size info in file's header */
5393 if (ucode_raw->size < sizeof(*ucode) +
5394 inst_size + data_size + init_size +
5395 init_data_size + boot_size) {
5397 IWL_DEBUG_INFO("uCode file size %d too small\n",
5398 (int)ucode_raw->size);
5403 /* Verify that uCode images will fit in card's SRAM */
5404 if (inst_size > IWL_MAX_INST_SIZE) {
5405 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5411 if (data_size > IWL_MAX_DATA_SIZE) {
5412 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5417 if (init_size > IWL_MAX_INST_SIZE) {
5418 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5423 if (init_data_size > IWL_MAX_DATA_SIZE) {
5424 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5429 if (boot_size > IWL_MAX_BSM_SIZE) {
5430 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5436 /* Allocate ucode buffers for card's bus-master loading ... */
5438 /* Runtime instructions and 2 copies of data:
5439 * 1) unmodified from disk
5440 * 2) backup cache for save/restore during power-downs */
5441 priv->ucode_code.len = inst_size;
5442 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5444 priv->ucode_data.len = data_size;
5445 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5447 priv->ucode_data_backup.len = data_size;
5448 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5450 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5451 !priv->ucode_data_backup.v_addr)
5454 /* Initialization instructions and data */
5455 if (init_size && init_data_size) {
5456 priv->ucode_init.len = init_size;
5457 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5459 priv->ucode_init_data.len = init_data_size;
5460 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5462 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5466 /* Bootstrap (instructions only, no data) */
5468 priv->ucode_boot.len = boot_size;
5469 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5471 if (!priv->ucode_boot.v_addr)
5475 /* Copy images into buffers for card's bus-master reads ... */
5477 /* Runtime instructions (first block of data in file) */
5478 src = &ucode->data[0];
5479 len = priv->ucode_code.len;
5480 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5481 memcpy(priv->ucode_code.v_addr, src, len);
5482 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5483 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5485 /* Runtime data (2nd block)
5486 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5487 src = &ucode->data[inst_size];
5488 len = priv->ucode_data.len;
5489 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5490 memcpy(priv->ucode_data.v_addr, src, len);
5491 memcpy(priv->ucode_data_backup.v_addr, src, len);
5493 /* Initialization instructions (3rd block) */
5495 src = &ucode->data[inst_size + data_size];
5496 len = priv->ucode_init.len;
5497 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5499 memcpy(priv->ucode_init.v_addr, src, len);
5502 /* Initialization data (4th block) */
5503 if (init_data_size) {
5504 src = &ucode->data[inst_size + data_size + init_size];
5505 len = priv->ucode_init_data.len;
5506 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5508 memcpy(priv->ucode_init_data.v_addr, src, len);
5511 /* Bootstrap instructions (5th block) */
5512 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5513 len = priv->ucode_boot.len;
5514 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5516 memcpy(priv->ucode_boot.v_addr, src, len);
5518 /* We have our copies now, allow OS release its copies */
5519 release_firmware(ucode_raw);
5523 IWL_ERROR("failed to allocate pci memory\n");
5525 iwl3945_dealloc_ucode_pci(priv);
5528 release_firmware(ucode_raw);
5536 * iwl3945_set_ucode_ptrs - Set uCode address location
5538 * Tell initialization uCode where to find runtime uCode.
5540 * BSM registers initially contain pointers to initialization uCode.
5541 * We need to replace them to load runtime uCode inst and data,
5542 * and to save runtime data when powering down.
5544 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5549 unsigned long flags;
5551 /* bits 31:0 for 3945 */
5552 pinst = priv->ucode_code.p_addr;
5553 pdata = priv->ucode_data_backup.p_addr;
5555 spin_lock_irqsave(&priv->lock, flags);
5556 rc = iwl3945_grab_nic_access(priv);
5558 spin_unlock_irqrestore(&priv->lock, flags);
5562 /* Tell bootstrap uCode where to find image to load */
5563 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5564 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5565 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5566 priv->ucode_data.len);
5568 /* Inst byte count must be last to set up, bit 31 signals uCode
5569 * that all new ptr/size info is in place */
5570 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5571 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5573 iwl3945_release_nic_access(priv);
5575 spin_unlock_irqrestore(&priv->lock, flags);
5577 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5583 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5585 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5587 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5589 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5591 /* Check alive response for "valid" sign from uCode */
5592 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5593 /* We had an error bringing up the hardware, so take it
5594 * all the way back down so we can try again */
5595 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5599 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5600 * This is a paranoid check, because we would not have gotten the
5601 * "initialize" alive if code weren't properly loaded. */
5602 if (iwl3945_verify_ucode(priv)) {
5603 /* Runtime instruction load was bad;
5604 * take it all the way back down so we can try again */
5605 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5609 /* Send pointers to protocol/runtime uCode image ... init code will
5610 * load and launch runtime uCode, which will send us another "Alive"
5612 IWL_DEBUG_INFO("Initialization Alive received.\n");
5613 if (iwl3945_set_ucode_ptrs(priv)) {
5614 /* Runtime instruction load won't happen;
5615 * take it all the way back down so we can try again */
5616 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5622 queue_work(priv->workqueue, &priv->restart);
5627 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5628 struct sk_buff *skb);
5631 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5632 * from protocol/runtime uCode (initialization uCode's
5633 * Alive gets handled by iwl3945_init_alive_start()).
5635 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5638 int thermal_spin = 0;
5641 IWL_DEBUG_INFO("Runtime Alive received.\n");
5643 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5644 /* We had an error bringing up the hardware, so take it
5645 * all the way back down so we can try again */
5646 IWL_DEBUG_INFO("Alive failed.\n");
5650 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5651 * This is a paranoid check, because we would not have gotten the
5652 * "runtime" alive if code weren't properly loaded. */
5653 if (iwl3945_verify_ucode(priv)) {
5654 /* Runtime instruction load was bad;
5655 * take it all the way back down so we can try again */
5656 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5660 iwl3945_clear_stations_table(priv);
5662 rc = iwl3945_grab_nic_access(priv);
5664 IWL_WARNING("Can not read RFKILL status from adapter\n");
5668 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5669 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5670 iwl3945_release_nic_access(priv);
5673 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5674 /* if RFKILL is not on, then wait for thermal
5675 * sensor in adapter to kick in */
5676 while (iwl3945_hw_get_temperature(priv) == 0) {
5682 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5685 set_bit(STATUS_RF_KILL_HW, &priv->status);
5687 /* After the ALIVE response, we can send commands to 3945 uCode */
5688 set_bit(STATUS_ALIVE, &priv->status);
5690 /* Clear out the uCode error bit if it is set */
5691 clear_bit(STATUS_FW_ERROR, &priv->status);
5693 if (iwl3945_is_rfkill(priv))
5696 ieee80211_wake_queues(priv->hw);
5698 priv->active_rate = priv->rates_mask;
5699 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5701 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5703 if (iwl3945_is_associated(priv)) {
5704 struct iwl3945_rxon_cmd *active_rxon =
5705 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5707 memcpy(&priv->staging_rxon, &priv->active_rxon,
5708 sizeof(priv->staging_rxon));
5709 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5711 /* Initialize our rx_config data */
5712 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5713 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5716 /* Configure Bluetooth device coexistence support */
5717 iwl3945_send_bt_config(priv);
5719 /* Configure the adapter for unassociated operation */
5720 iwl3945_commit_rxon(priv);
5722 iwl3945_reg_txpower_periodic(priv);
5724 iwl3945_led_register(priv);
5726 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5727 set_bit(STATUS_READY, &priv->status);
5728 wake_up_interruptible(&priv->wait_command_queue);
5730 if (priv->error_recovering)
5731 iwl3945_error_recovery(priv);
5733 /* reassociate for ADHOC mode */
5734 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5735 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5738 iwl3945_mac_beacon_update(priv->hw, beacon);
5744 queue_work(priv->workqueue, &priv->restart);
5747 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5749 static void __iwl3945_down(struct iwl3945_priv *priv)
5751 unsigned long flags;
5752 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5753 struct ieee80211_conf *conf = NULL;
5755 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5757 conf = ieee80211_get_hw_conf(priv->hw);
5760 set_bit(STATUS_EXIT_PENDING, &priv->status);
5762 iwl3945_led_unregister(priv);
5763 iwl3945_clear_stations_table(priv);
5765 /* Unblock any waiting calls */
5766 wake_up_interruptible_all(&priv->wait_command_queue);
5768 /* Wipe out the EXIT_PENDING status bit if we are not actually
5769 * exiting the module */
5771 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5773 /* stop and reset the on-board processor */
5774 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5776 /* tell the device to stop sending interrupts */
5777 spin_lock_irqsave(&priv->lock, flags);
5778 iwl3945_disable_interrupts(priv);
5779 spin_unlock_irqrestore(&priv->lock, flags);
5780 iwl_synchronize_irq(priv);
5782 if (priv->mac80211_registered)
5783 ieee80211_stop_queues(priv->hw);
5785 /* If we have not previously called iwl3945_init() then
5786 * clear all bits but the RF Kill and SUSPEND bits and return */
5787 if (!iwl3945_is_init(priv)) {
5788 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5790 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5792 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5793 STATUS_GEO_CONFIGURED |
5794 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5796 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5797 STATUS_EXIT_PENDING;
5801 /* ...otherwise clear out all the status bits but the RF Kill and
5802 * SUSPEND bits and continue taking the NIC down. */
5803 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5805 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5807 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5808 STATUS_GEO_CONFIGURED |
5809 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5811 test_bit(STATUS_FW_ERROR, &priv->status) <<
5813 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5814 STATUS_EXIT_PENDING;
5816 spin_lock_irqsave(&priv->lock, flags);
5817 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5818 spin_unlock_irqrestore(&priv->lock, flags);
5820 iwl3945_hw_txq_ctx_stop(priv);
5821 iwl3945_hw_rxq_stop(priv);
5823 spin_lock_irqsave(&priv->lock, flags);
5824 if (!iwl3945_grab_nic_access(priv)) {
5825 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5826 APMG_CLK_VAL_DMA_CLK_RQT);
5827 iwl3945_release_nic_access(priv);
5829 spin_unlock_irqrestore(&priv->lock, flags);
5833 iwl3945_hw_nic_stop_master(priv);
5834 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5835 iwl3945_hw_nic_reset(priv);
5838 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5840 if (priv->ibss_beacon)
5841 dev_kfree_skb(priv->ibss_beacon);
5842 priv->ibss_beacon = NULL;
5844 /* clear out any free frames */
5845 iwl3945_clear_free_frames(priv);
5848 static void iwl3945_down(struct iwl3945_priv *priv)
5850 mutex_lock(&priv->mutex);
5851 __iwl3945_down(priv);
5852 mutex_unlock(&priv->mutex);
5854 iwl3945_cancel_deferred_work(priv);
5857 #define MAX_HW_RESTARTS 5
5859 static int __iwl3945_up(struct iwl3945_priv *priv)
5863 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5864 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5868 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5869 IWL_WARNING("Radio disabled by SW RF kill (module "
5874 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5875 IWL_ERROR("ucode not available for device bring up\n");
5879 /* If platform's RF_KILL switch is NOT set to KILL */
5880 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5881 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5882 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5884 set_bit(STATUS_RF_KILL_HW, &priv->status);
5885 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5886 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5891 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5893 rc = iwl3945_hw_nic_init(priv);
5895 IWL_ERROR("Unable to int nic\n");
5899 /* make sure rfkill handshake bits are cleared */
5900 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5901 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5902 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5904 /* clear (again), then enable host interrupts */
5905 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5906 iwl3945_enable_interrupts(priv);
5908 /* really make sure rfkill handshake bits are cleared */
5909 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5910 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5912 /* Copy original ucode data image from disk into backup cache.
5913 * This will be used to initialize the on-board processor's
5914 * data SRAM for a clean start when the runtime program first loads. */
5915 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5916 priv->ucode_data.len);
5918 /* We return success when we resume from suspend and rf_kill is on. */
5919 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5922 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5924 iwl3945_clear_stations_table(priv);
5926 /* load bootstrap state machine,
5927 * load bootstrap program into processor's memory,
5928 * prepare to load the "initialize" uCode */
5929 rc = iwl3945_load_bsm(priv);
5932 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5936 /* start card; "initialize" will load runtime ucode */
5937 iwl3945_nic_start(priv);
5939 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5944 set_bit(STATUS_EXIT_PENDING, &priv->status);
5945 __iwl3945_down(priv);
5946 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5948 /* tried to restart and config the device for as long as our
5949 * patience could withstand */
5950 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5955 /*****************************************************************************
5957 * Workqueue callbacks
5959 *****************************************************************************/
5961 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5963 struct iwl3945_priv *priv =
5964 container_of(data, struct iwl3945_priv, init_alive_start.work);
5966 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5969 mutex_lock(&priv->mutex);
5970 iwl3945_init_alive_start(priv);
5971 mutex_unlock(&priv->mutex);
5974 static void iwl3945_bg_alive_start(struct work_struct *data)
5976 struct iwl3945_priv *priv =
5977 container_of(data, struct iwl3945_priv, alive_start.work);
5979 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5982 mutex_lock(&priv->mutex);
5983 iwl3945_alive_start(priv);
5984 mutex_unlock(&priv->mutex);
5987 static void iwl3945_bg_rf_kill(struct work_struct *work)
5989 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
5991 wake_up_interruptible(&priv->wait_command_queue);
5993 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5996 mutex_lock(&priv->mutex);
5998 if (!iwl3945_is_rfkill(priv)) {
5999 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6000 "HW and/or SW RF Kill no longer active, restarting "
6002 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6003 queue_work(priv->workqueue, &priv->restart);
6006 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6007 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6008 "disabled by SW switch\n");
6010 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6011 "Kill switch must be turned off for "
6012 "wireless networking to work.\n");
6015 mutex_unlock(&priv->mutex);
6016 iwl3945_rfkill_set_hw_state(priv);
6019 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6021 static void iwl3945_bg_scan_check(struct work_struct *data)
6023 struct iwl3945_priv *priv =
6024 container_of(data, struct iwl3945_priv, scan_check.work);
6026 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6029 mutex_lock(&priv->mutex);
6030 if (test_bit(STATUS_SCANNING, &priv->status) ||
6031 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6032 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6033 "Scan completion watchdog resetting adapter (%dms)\n",
6034 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6036 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6037 iwl3945_send_scan_abort(priv);
6039 mutex_unlock(&priv->mutex);
6042 static void iwl3945_bg_request_scan(struct work_struct *data)
6044 struct iwl3945_priv *priv =
6045 container_of(data, struct iwl3945_priv, request_scan);
6046 struct iwl3945_host_cmd cmd = {
6047 .id = REPLY_SCAN_CMD,
6048 .len = sizeof(struct iwl3945_scan_cmd),
6049 .meta.flags = CMD_SIZE_HUGE,
6052 struct iwl3945_scan_cmd *scan;
6053 struct ieee80211_conf *conf = NULL;
6055 enum ieee80211_band band;
6056 DECLARE_SSID_BUF(ssid);
6058 conf = ieee80211_get_hw_conf(priv->hw);
6060 mutex_lock(&priv->mutex);
6062 if (!iwl3945_is_ready(priv)) {
6063 IWL_WARNING("request scan called when driver not ready.\n");
6067 /* Make sure the scan wasn't canceled before this queued work
6068 * was given the chance to run... */
6069 if (!test_bit(STATUS_SCANNING, &priv->status))
6072 /* This should never be called or scheduled if there is currently
6073 * a scan active in the hardware. */
6074 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6075 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6076 "Ignoring second request.\n");
6081 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6082 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6086 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6087 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6091 if (iwl3945_is_rfkill(priv)) {
6092 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6096 if (!test_bit(STATUS_READY, &priv->status)) {
6097 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6101 if (!priv->scan_bands) {
6102 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6107 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6108 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6115 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6117 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6118 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6120 if (iwl3945_is_associated(priv)) {
6123 u32 suspend_time = 100;
6124 u32 scan_suspend_time = 100;
6125 unsigned long flags;
6127 IWL_DEBUG_INFO("Scanning while associated...\n");
6129 spin_lock_irqsave(&priv->lock, flags);
6130 interval = priv->beacon_int;
6131 spin_unlock_irqrestore(&priv->lock, flags);
6133 scan->suspend_time = 0;
6134 scan->max_out_time = cpu_to_le32(200 * 1024);
6136 interval = suspend_time;
6138 * suspend time format:
6139 * 0-19: beacon interval in usec (time before exec.)
6141 * 24-31: number of beacons (suspend between channels)
6144 extra = (suspend_time / interval) << 24;
6145 scan_suspend_time = 0xFF0FFFFF &
6146 (extra | ((suspend_time % interval) * 1024));
6148 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6149 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6150 scan_suspend_time, interval);
6153 /* We should add the ability for user to lock to PASSIVE ONLY */
6154 if (priv->one_direct_scan) {
6156 ("Kicking off one direct scan for '%s'\n",
6157 print_ssid(ssid, priv->direct_ssid,
6158 priv->direct_ssid_len));
6159 scan->direct_scan[0].id = WLAN_EID_SSID;
6160 scan->direct_scan[0].len = priv->direct_ssid_len;
6161 memcpy(scan->direct_scan[0].ssid,
6162 priv->direct_ssid, priv->direct_ssid_len);
6165 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6167 /* We don't build a direct scan probe request; the uCode will do
6168 * that based on the direct_mask added to each channel entry */
6169 scan->tx_cmd.len = cpu_to_le16(
6170 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6171 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6172 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6173 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6174 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6176 /* flags + rate selection */
6178 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6179 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6180 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6181 scan->good_CRC_th = 0;
6182 band = IEEE80211_BAND_2GHZ;
6183 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6184 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6185 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6186 band = IEEE80211_BAND_5GHZ;
6188 IWL_WARNING("Invalid scan band count\n");
6192 /* select Rx antennas */
6193 scan->flags |= iwl3945_get_antenna_flags(priv);
6195 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6196 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6198 scan->channel_count =
6199 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6201 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6203 if (scan->channel_count == 0) {
6204 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6208 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6209 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6211 scan->len = cpu_to_le16(cmd.len);
6213 set_bit(STATUS_SCAN_HW, &priv->status);
6214 rc = iwl3945_send_cmd_sync(priv, &cmd);
6218 queue_delayed_work(priv->workqueue, &priv->scan_check,
6219 IWL_SCAN_CHECK_WATCHDOG);
6221 mutex_unlock(&priv->mutex);
6225 /* can not perform scan make sure we clear scanning
6226 * bits from status so next scan request can be performed.
6227 * if we dont clear scanning status bit here all next scan
6230 clear_bit(STATUS_SCAN_HW, &priv->status);
6231 clear_bit(STATUS_SCANNING, &priv->status);
6233 /* inform mac80211 scan aborted */
6234 queue_work(priv->workqueue, &priv->scan_completed);
6235 mutex_unlock(&priv->mutex);
6238 static void iwl3945_bg_up(struct work_struct *data)
6240 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6242 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6245 mutex_lock(&priv->mutex);
6247 mutex_unlock(&priv->mutex);
6248 iwl3945_rfkill_set_hw_state(priv);
6251 static void iwl3945_bg_restart(struct work_struct *data)
6253 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6255 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6259 queue_work(priv->workqueue, &priv->up);
6262 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6264 struct iwl3945_priv *priv =
6265 container_of(data, struct iwl3945_priv, rx_replenish);
6267 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6270 mutex_lock(&priv->mutex);
6271 iwl3945_rx_replenish(priv);
6272 mutex_unlock(&priv->mutex);
6275 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6277 static void iwl3945_post_associate(struct iwl3945_priv *priv)
6280 struct ieee80211_conf *conf = NULL;
6282 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6283 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6288 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6289 priv->assoc_id, priv->active_rxon.bssid_addr);
6291 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6294 if (!priv->vif || !priv->is_open)
6297 iwl3945_scan_cancel_timeout(priv, 200);
6299 conf = ieee80211_get_hw_conf(priv->hw);
6301 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6302 iwl3945_commit_rxon(priv);
6304 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6305 iwl3945_setup_rxon_timing(priv);
6306 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6307 sizeof(priv->rxon_timing), &priv->rxon_timing);
6309 IWL_WARNING("REPLY_RXON_TIMING failed - "
6310 "Attempting to continue.\n");
6312 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6314 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6316 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6317 priv->assoc_id, priv->beacon_int);
6319 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6320 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6322 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6324 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6325 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6326 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6328 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6330 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6331 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6335 iwl3945_commit_rxon(priv);
6337 switch (priv->iw_mode) {
6338 case NL80211_IFTYPE_STATION:
6339 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6342 case NL80211_IFTYPE_ADHOC:
6345 iwl3945_add_station(priv, priv->bssid, 0, 0);
6346 iwl3945_sync_sta(priv, IWL_STA_ID,
6347 (priv->band == IEEE80211_BAND_5GHZ) ?
6348 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6350 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6351 iwl3945_send_beacon_cmd(priv);
6356 IWL_ERROR("%s Should not be called in %d mode\n",
6357 __func__, priv->iw_mode);
6361 iwl3945_activate_qos(priv, 0);
6363 /* we have just associated, don't start scan too early */
6364 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6367 static void iwl3945_bg_abort_scan(struct work_struct *work)
6369 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6371 if (!iwl3945_is_ready(priv))
6374 mutex_lock(&priv->mutex);
6376 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6377 iwl3945_send_scan_abort(priv);
6379 mutex_unlock(&priv->mutex);
6382 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6384 static void iwl3945_bg_scan_completed(struct work_struct *work)
6386 struct iwl3945_priv *priv =
6387 container_of(work, struct iwl3945_priv, scan_completed);
6389 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6391 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6394 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6395 iwl3945_mac_config(priv->hw, 0);
6397 ieee80211_scan_completed(priv->hw);
6399 /* Since setting the TXPOWER may have been deferred while
6400 * performing the scan, fire one off */
6401 mutex_lock(&priv->mutex);
6402 iwl3945_hw_reg_send_txpower(priv);
6403 mutex_unlock(&priv->mutex);
6406 /*****************************************************************************
6408 * mac80211 entry point functions
6410 *****************************************************************************/
6412 #define UCODE_READY_TIMEOUT (2 * HZ)
6414 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6416 struct iwl3945_priv *priv = hw->priv;
6419 IWL_DEBUG_MAC80211("enter\n");
6421 if (pci_enable_device(priv->pci_dev)) {
6422 IWL_ERROR("Fail to pci_enable_device\n");
6425 pci_restore_state(priv->pci_dev);
6426 pci_enable_msi(priv->pci_dev);
6428 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6431 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6432 goto out_disable_msi;
6435 /* we should be verifying the device is ready to be opened */
6436 mutex_lock(&priv->mutex);
6438 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6439 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6440 * ucode filename and max sizes are card-specific. */
6442 if (!priv->ucode_code.len) {
6443 ret = iwl3945_read_ucode(priv);
6445 IWL_ERROR("Could not read microcode: %d\n", ret);
6446 mutex_unlock(&priv->mutex);
6447 goto out_release_irq;
6451 ret = __iwl3945_up(priv);
6453 mutex_unlock(&priv->mutex);
6455 iwl3945_rfkill_set_hw_state(priv);
6458 goto out_release_irq;
6460 IWL_DEBUG_INFO("Start UP work.\n");
6462 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6465 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6466 * mac80211 will not be run successfully. */
6467 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6468 test_bit(STATUS_READY, &priv->status),
6469 UCODE_READY_TIMEOUT);
6471 if (!test_bit(STATUS_READY, &priv->status)) {
6472 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6473 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6475 goto out_release_irq;
6480 IWL_DEBUG_MAC80211("leave\n");
6484 free_irq(priv->pci_dev->irq, priv);
6486 pci_disable_msi(priv->pci_dev);
6487 pci_disable_device(priv->pci_dev);
6489 IWL_DEBUG_MAC80211("leave - failed\n");
6493 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6495 struct iwl3945_priv *priv = hw->priv;
6497 IWL_DEBUG_MAC80211("enter\n");
6499 if (!priv->is_open) {
6500 IWL_DEBUG_MAC80211("leave - skip\n");
6506 if (iwl3945_is_ready_rf(priv)) {
6507 /* stop mac, cancel any scan request and clear
6508 * RXON_FILTER_ASSOC_MSK BIT
6510 mutex_lock(&priv->mutex);
6511 iwl3945_scan_cancel_timeout(priv, 100);
6512 mutex_unlock(&priv->mutex);
6517 flush_workqueue(priv->workqueue);
6518 free_irq(priv->pci_dev->irq, priv);
6519 pci_disable_msi(priv->pci_dev);
6520 pci_save_state(priv->pci_dev);
6521 pci_disable_device(priv->pci_dev);
6523 IWL_DEBUG_MAC80211("leave\n");
6526 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6528 struct iwl3945_priv *priv = hw->priv;
6530 IWL_DEBUG_MAC80211("enter\n");
6532 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6533 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6535 if (iwl3945_tx_skb(priv, skb))
6536 dev_kfree_skb_any(skb);
6538 IWL_DEBUG_MAC80211("leave\n");
6539 return NETDEV_TX_OK;
6542 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6543 struct ieee80211_if_init_conf *conf)
6545 struct iwl3945_priv *priv = hw->priv;
6546 unsigned long flags;
6548 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6551 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6555 spin_lock_irqsave(&priv->lock, flags);
6556 priv->vif = conf->vif;
6557 priv->iw_mode = conf->type;
6559 spin_unlock_irqrestore(&priv->lock, flags);
6561 mutex_lock(&priv->mutex);
6563 if (conf->mac_addr) {
6564 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6565 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6568 if (iwl3945_is_ready(priv))
6569 iwl3945_set_mode(priv, conf->type);
6571 mutex_unlock(&priv->mutex);
6573 IWL_DEBUG_MAC80211("leave\n");
6578 * iwl3945_mac_config - mac80211 config callback
6580 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6581 * be set inappropriately and the driver currently sets the hardware up to
6582 * use it whenever needed.
6584 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6586 struct iwl3945_priv *priv = hw->priv;
6587 const struct iwl3945_channel_info *ch_info;
6588 struct ieee80211_conf *conf = &hw->conf;
6589 unsigned long flags;
6592 mutex_lock(&priv->mutex);
6593 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6595 if (!iwl3945_is_ready(priv)) {
6596 IWL_DEBUG_MAC80211("leave - not ready\n");
6601 if (unlikely(!iwl3945_param_disable_hw_scan &&
6602 test_bit(STATUS_SCANNING, &priv->status))) {
6603 IWL_DEBUG_MAC80211("leave - scanning\n");
6604 set_bit(STATUS_CONF_PENDING, &priv->status);
6605 mutex_unlock(&priv->mutex);
6609 spin_lock_irqsave(&priv->lock, flags);
6611 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6612 conf->channel->hw_value);
6613 if (!is_channel_valid(ch_info)) {
6614 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6615 conf->channel->hw_value, conf->channel->band);
6616 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6617 spin_unlock_irqrestore(&priv->lock, flags);
6622 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6624 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6626 /* The list of supported rates and rate mask can be different
6627 * for each phymode; since the phymode may have changed, reset
6628 * the rate mask to what mac80211 lists */
6629 iwl3945_set_rate(priv);
6631 spin_unlock_irqrestore(&priv->lock, flags);
6633 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6634 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6635 iwl3945_hw_channel_switch(priv, conf->channel);
6640 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6642 if (!conf->radio_enabled) {
6643 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6647 if (iwl3945_is_rfkill(priv)) {
6648 IWL_DEBUG_MAC80211("leave - RF kill\n");
6653 iwl3945_set_rate(priv);
6655 if (memcmp(&priv->active_rxon,
6656 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6657 iwl3945_commit_rxon(priv);
6659 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6661 IWL_DEBUG_MAC80211("leave\n");
6664 clear_bit(STATUS_CONF_PENDING, &priv->status);
6665 mutex_unlock(&priv->mutex);
6669 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6673 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6676 /* The following should be done only at AP bring up */
6677 if (!(iwl3945_is_associated(priv))) {
6679 /* RXON - unassoc (to set timing command) */
6680 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6681 iwl3945_commit_rxon(priv);
6684 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6685 iwl3945_setup_rxon_timing(priv);
6686 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6687 sizeof(priv->rxon_timing), &priv->rxon_timing);
6689 IWL_WARNING("REPLY_RXON_TIMING failed - "
6690 "Attempting to continue.\n");
6692 /* FIXME: what should be the assoc_id for AP? */
6693 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6694 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6695 priv->staging_rxon.flags |=
6696 RXON_FLG_SHORT_PREAMBLE_MSK;
6698 priv->staging_rxon.flags &=
6699 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6701 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6702 if (priv->assoc_capability &
6703 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6704 priv->staging_rxon.flags |=
6705 RXON_FLG_SHORT_SLOT_MSK;
6707 priv->staging_rxon.flags &=
6708 ~RXON_FLG_SHORT_SLOT_MSK;
6710 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6711 priv->staging_rxon.flags &=
6712 ~RXON_FLG_SHORT_SLOT_MSK;
6714 /* restore RXON assoc */
6715 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6716 iwl3945_commit_rxon(priv);
6717 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6719 iwl3945_send_beacon_cmd(priv);
6721 /* FIXME - we need to add code here to detect a totally new
6722 * configuration, reset the AP, unassoc, rxon timing, assoc,
6723 * clear sta table, add BCAST sta... */
6726 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6727 struct ieee80211_vif *vif,
6728 struct ieee80211_if_conf *conf)
6730 struct iwl3945_priv *priv = hw->priv;
6736 if (priv->vif != vif) {
6737 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6741 /* handle this temporarily here */
6742 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6743 conf->changed & IEEE80211_IFCC_BEACON) {
6744 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6747 mutex_lock(&priv->mutex);
6748 rc = iwl3945_mac_beacon_update(hw, beacon);
6749 mutex_unlock(&priv->mutex);
6754 if (!iwl3945_is_alive(priv))
6757 mutex_lock(&priv->mutex);
6760 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6763 * very dubious code was here; the probe filtering flag is never set:
6765 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6766 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6769 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6771 conf->bssid = priv->mac_addr;
6772 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6773 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6776 if (priv->ibss_beacon)
6777 dev_kfree_skb(priv->ibss_beacon);
6779 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6782 if (iwl3945_is_rfkill(priv))
6785 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6786 !is_multicast_ether_addr(conf->bssid)) {
6787 /* If there is currently a HW scan going on in the background
6788 * then we need to cancel it else the RXON below will fail. */
6789 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6790 IWL_WARNING("Aborted scan still in progress "
6792 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6793 mutex_unlock(&priv->mutex);
6796 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6798 /* TODO: Audit driver for usage of these members and see
6799 * if mac80211 deprecates them (priv->bssid looks like it
6800 * shouldn't be there, but I haven't scanned the IBSS code
6801 * to verify) - jpk */
6802 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6804 if (priv->iw_mode == NL80211_IFTYPE_AP)
6805 iwl3945_config_ap(priv);
6807 rc = iwl3945_commit_rxon(priv);
6808 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6809 iwl3945_add_station(priv,
6810 priv->active_rxon.bssid_addr, 1, 0);
6814 iwl3945_scan_cancel_timeout(priv, 100);
6815 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6816 iwl3945_commit_rxon(priv);
6820 IWL_DEBUG_MAC80211("leave\n");
6821 mutex_unlock(&priv->mutex);
6826 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6827 unsigned int changed_flags,
6828 unsigned int *total_flags,
6829 int mc_count, struct dev_addr_list *mc_list)
6831 struct iwl3945_priv *priv = hw->priv;
6832 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
6834 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6835 changed_flags, *total_flags);
6837 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6838 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6839 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6841 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6843 if (changed_flags & FIF_ALLMULTI) {
6844 if (*total_flags & FIF_ALLMULTI)
6845 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6847 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6849 if (changed_flags & FIF_CONTROL) {
6850 if (*total_flags & FIF_CONTROL)
6851 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6853 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6855 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6856 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6857 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6859 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6862 /* We avoid iwl_commit_rxon here to commit the new filter flags
6863 * since mac80211 will call ieee80211_hw_config immediately.
6864 * (mc_list is not supported at this time). Otherwise, we need to
6865 * queue a background iwl_commit_rxon work.
6868 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6869 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6872 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6873 struct ieee80211_if_init_conf *conf)
6875 struct iwl3945_priv *priv = hw->priv;
6877 IWL_DEBUG_MAC80211("enter\n");
6879 mutex_lock(&priv->mutex);
6881 if (iwl3945_is_ready_rf(priv)) {
6882 iwl3945_scan_cancel_timeout(priv, 100);
6883 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6884 iwl3945_commit_rxon(priv);
6886 if (priv->vif == conf->vif) {
6888 memset(priv->bssid, 0, ETH_ALEN);
6890 mutex_unlock(&priv->mutex);
6892 IWL_DEBUG_MAC80211("leave\n");
6895 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6897 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6898 struct ieee80211_vif *vif,
6899 struct ieee80211_bss_conf *bss_conf,
6902 struct iwl3945_priv *priv = hw->priv;
6904 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6906 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6907 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6908 bss_conf->use_short_preamble);
6909 if (bss_conf->use_short_preamble)
6910 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6912 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6915 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6916 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6917 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6918 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6920 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6923 if (changes & BSS_CHANGED_ASSOC) {
6924 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6925 /* This should never happen as this function should
6926 * never be called from interrupt context. */
6927 if (WARN_ON_ONCE(in_interrupt()))
6929 if (bss_conf->assoc) {
6930 priv->assoc_id = bss_conf->aid;
6931 priv->beacon_int = bss_conf->beacon_int;
6932 priv->timestamp = bss_conf->timestamp;
6933 priv->assoc_capability = bss_conf->assoc_capability;
6934 priv->next_scan_jiffies = jiffies +
6935 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6936 mutex_lock(&priv->mutex);
6937 iwl3945_post_associate(priv);
6938 mutex_unlock(&priv->mutex);
6941 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6943 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6944 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6945 iwl3945_send_rxon_assoc(priv);
6950 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6953 unsigned long flags;
6954 struct iwl3945_priv *priv = hw->priv;
6955 DECLARE_SSID_BUF(ssid_buf);
6957 IWL_DEBUG_MAC80211("enter\n");
6959 mutex_lock(&priv->mutex);
6960 spin_lock_irqsave(&priv->lock, flags);
6962 if (!iwl3945_is_ready_rf(priv)) {
6964 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6968 /* we don't schedule scan within next_scan_jiffies period */
6969 if (priv->next_scan_jiffies &&
6970 time_after(priv->next_scan_jiffies, jiffies)) {
6974 /* if we just finished scan ask for delay for a broadcast scan */
6975 if ((len == 0) && priv->last_scan_jiffies &&
6976 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6982 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6983 print_ssid(ssid_buf, ssid, len), (int)len);
6985 priv->one_direct_scan = 1;
6986 priv->direct_ssid_len = (u8)
6987 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6988 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6990 priv->one_direct_scan = 0;
6992 rc = iwl3945_scan_initiate(priv);
6994 IWL_DEBUG_MAC80211("leave\n");
6997 spin_unlock_irqrestore(&priv->lock, flags);
6998 mutex_unlock(&priv->mutex);
7003 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7004 const u8 *local_addr, const u8 *addr,
7005 struct ieee80211_key_conf *key)
7007 struct iwl3945_priv *priv = hw->priv;
7011 IWL_DEBUG_MAC80211("enter\n");
7013 if (!iwl3945_param_hwcrypto) {
7014 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7018 if (is_zero_ether_addr(addr))
7019 /* only support pairwise keys */
7022 sta_id = iwl3945_hw_find_station(priv, addr);
7023 if (sta_id == IWL_INVALID_STATION) {
7024 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
7029 mutex_lock(&priv->mutex);
7031 iwl3945_scan_cancel_timeout(priv, 100);
7035 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7037 iwl3945_set_rxon_hwcrypto(priv, 1);
7038 iwl3945_commit_rxon(priv);
7039 key->hw_key_idx = sta_id;
7040 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7041 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7045 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7047 iwl3945_set_rxon_hwcrypto(priv, 0);
7048 iwl3945_commit_rxon(priv);
7049 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7056 IWL_DEBUG_MAC80211("leave\n");
7057 mutex_unlock(&priv->mutex);
7062 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
7063 const struct ieee80211_tx_queue_params *params)
7065 struct iwl3945_priv *priv = hw->priv;
7066 unsigned long flags;
7069 IWL_DEBUG_MAC80211("enter\n");
7071 if (!iwl3945_is_ready_rf(priv)) {
7072 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7076 if (queue >= AC_NUM) {
7077 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7081 q = AC_NUM - 1 - queue;
7083 spin_lock_irqsave(&priv->lock, flags);
7085 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7086 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7087 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7088 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7089 cpu_to_le16((params->txop * 32));
7091 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7092 priv->qos_data.qos_active = 1;
7094 spin_unlock_irqrestore(&priv->lock, flags);
7096 mutex_lock(&priv->mutex);
7097 if (priv->iw_mode == NL80211_IFTYPE_AP)
7098 iwl3945_activate_qos(priv, 1);
7099 else if (priv->assoc_id && iwl3945_is_associated(priv))
7100 iwl3945_activate_qos(priv, 0);
7102 mutex_unlock(&priv->mutex);
7104 IWL_DEBUG_MAC80211("leave\n");
7108 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7109 struct ieee80211_tx_queue_stats *stats)
7111 struct iwl3945_priv *priv = hw->priv;
7113 struct iwl3945_tx_queue *txq;
7114 struct iwl3945_queue *q;
7115 unsigned long flags;
7117 IWL_DEBUG_MAC80211("enter\n");
7119 if (!iwl3945_is_ready_rf(priv)) {
7120 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7124 spin_lock_irqsave(&priv->lock, flags);
7126 for (i = 0; i < AC_NUM; i++) {
7127 txq = &priv->txq[i];
7129 avail = iwl3945_queue_space(q);
7131 stats[i].len = q->n_window - avail;
7132 stats[i].limit = q->n_window - q->high_mark;
7133 stats[i].count = q->n_window;
7136 spin_unlock_irqrestore(&priv->lock, flags);
7138 IWL_DEBUG_MAC80211("leave\n");
7143 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7144 struct ieee80211_low_level_stats *stats)
7149 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7151 struct iwl3945_priv *priv = hw->priv;
7152 unsigned long flags;
7154 mutex_lock(&priv->mutex);
7155 IWL_DEBUG_MAC80211("enter\n");
7157 iwl3945_reset_qos(priv);
7159 spin_lock_irqsave(&priv->lock, flags);
7161 priv->assoc_capability = 0;
7162 priv->call_post_assoc_from_beacon = 0;
7164 /* new association get rid of ibss beacon skb */
7165 if (priv->ibss_beacon)
7166 dev_kfree_skb(priv->ibss_beacon);
7168 priv->ibss_beacon = NULL;
7170 priv->beacon_int = priv->hw->conf.beacon_int;
7171 priv->timestamp = 0;
7172 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7173 priv->beacon_int = 0;
7175 spin_unlock_irqrestore(&priv->lock, flags);
7177 if (!iwl3945_is_ready_rf(priv)) {
7178 IWL_DEBUG_MAC80211("leave - not ready\n");
7179 mutex_unlock(&priv->mutex);
7183 /* we are restarting association process
7184 * clear RXON_FILTER_ASSOC_MSK bit
7186 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7187 iwl3945_scan_cancel_timeout(priv, 100);
7188 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7189 iwl3945_commit_rxon(priv);
7192 /* Per mac80211.h: This is only used in IBSS mode... */
7193 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7195 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7196 mutex_unlock(&priv->mutex);
7200 iwl3945_set_rate(priv);
7202 mutex_unlock(&priv->mutex);
7204 IWL_DEBUG_MAC80211("leave\n");
7208 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7210 struct iwl3945_priv *priv = hw->priv;
7211 unsigned long flags;
7213 IWL_DEBUG_MAC80211("enter\n");
7215 if (!iwl3945_is_ready_rf(priv)) {
7216 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7220 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7221 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7225 spin_lock_irqsave(&priv->lock, flags);
7227 if (priv->ibss_beacon)
7228 dev_kfree_skb(priv->ibss_beacon);
7230 priv->ibss_beacon = skb;
7234 IWL_DEBUG_MAC80211("leave\n");
7235 spin_unlock_irqrestore(&priv->lock, flags);
7237 iwl3945_reset_qos(priv);
7239 iwl3945_post_associate(priv);
7245 /*****************************************************************************
7249 *****************************************************************************/
7251 #ifdef CONFIG_IWL3945_DEBUG
7254 * The following adds a new attribute to the sysfs representation
7255 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7256 * used for controlling the debug level.
7258 * See the level definitions in iwl for details.
7260 static ssize_t show_debug_level(struct device *d,
7261 struct device_attribute *attr, char *buf)
7263 struct iwl3945_priv *priv = d->driver_data;
7265 return sprintf(buf, "0x%08X\n", priv->debug_level);
7267 static ssize_t store_debug_level(struct device *d,
7268 struct device_attribute *attr,
7269 const char *buf, size_t count)
7271 struct iwl3945_priv *priv = d->driver_data;
7275 ret = strict_strtoul(buf, 0, &val);
7277 printk(KERN_INFO DRV_NAME
7278 ": %s is not in hex or decimal form.\n", buf);
7280 priv->debug_level = val;
7282 return strnlen(buf, count);
7285 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7286 show_debug_level, store_debug_level);
7288 #endif /* CONFIG_IWL3945_DEBUG */
7290 static ssize_t show_temperature(struct device *d,
7291 struct device_attribute *attr, char *buf)
7293 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7295 if (!iwl3945_is_alive(priv))
7298 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7301 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7303 static ssize_t show_tx_power(struct device *d,
7304 struct device_attribute *attr, char *buf)
7306 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7307 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7310 static ssize_t store_tx_power(struct device *d,
7311 struct device_attribute *attr,
7312 const char *buf, size_t count)
7314 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7315 char *p = (char *)buf;
7318 val = simple_strtoul(p, &p, 10);
7320 printk(KERN_INFO DRV_NAME
7321 ": %s is not in decimal form.\n", buf);
7323 iwl3945_hw_reg_set_txpower(priv, val);
7328 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7330 static ssize_t show_flags(struct device *d,
7331 struct device_attribute *attr, char *buf)
7333 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7335 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7338 static ssize_t store_flags(struct device *d,
7339 struct device_attribute *attr,
7340 const char *buf, size_t count)
7342 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7343 u32 flags = simple_strtoul(buf, NULL, 0);
7345 mutex_lock(&priv->mutex);
7346 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7347 /* Cancel any currently running scans... */
7348 if (iwl3945_scan_cancel_timeout(priv, 100))
7349 IWL_WARNING("Could not cancel scan.\n");
7351 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7353 priv->staging_rxon.flags = cpu_to_le32(flags);
7354 iwl3945_commit_rxon(priv);
7357 mutex_unlock(&priv->mutex);
7362 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7364 static ssize_t show_filter_flags(struct device *d,
7365 struct device_attribute *attr, char *buf)
7367 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7369 return sprintf(buf, "0x%04X\n",
7370 le32_to_cpu(priv->active_rxon.filter_flags));
7373 static ssize_t store_filter_flags(struct device *d,
7374 struct device_attribute *attr,
7375 const char *buf, size_t count)
7377 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7378 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7380 mutex_lock(&priv->mutex);
7381 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7382 /* Cancel any currently running scans... */
7383 if (iwl3945_scan_cancel_timeout(priv, 100))
7384 IWL_WARNING("Could not cancel scan.\n");
7386 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7387 "0x%04X\n", filter_flags);
7388 priv->staging_rxon.filter_flags =
7389 cpu_to_le32(filter_flags);
7390 iwl3945_commit_rxon(priv);
7393 mutex_unlock(&priv->mutex);
7398 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7399 store_filter_flags);
7401 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7403 static ssize_t show_measurement(struct device *d,
7404 struct device_attribute *attr, char *buf)
7406 struct iwl3945_priv *priv = dev_get_drvdata(d);
7407 struct iwl_spectrum_notification measure_report;
7408 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7409 u8 *data = (u8 *)&measure_report;
7410 unsigned long flags;
7412 spin_lock_irqsave(&priv->lock, flags);
7413 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7414 spin_unlock_irqrestore(&priv->lock, flags);
7417 memcpy(&measure_report, &priv->measure_report, size);
7418 priv->measurement_status = 0;
7419 spin_unlock_irqrestore(&priv->lock, flags);
7421 while (size && (PAGE_SIZE - len)) {
7422 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7423 PAGE_SIZE - len, 1);
7425 if (PAGE_SIZE - len)
7429 size -= min(size, 16U);
7435 static ssize_t store_measurement(struct device *d,
7436 struct device_attribute *attr,
7437 const char *buf, size_t count)
7439 struct iwl3945_priv *priv = dev_get_drvdata(d);
7440 struct ieee80211_measurement_params params = {
7441 .channel = le16_to_cpu(priv->active_rxon.channel),
7442 .start_time = cpu_to_le64(priv->last_tsf),
7443 .duration = cpu_to_le16(1),
7445 u8 type = IWL_MEASURE_BASIC;
7451 strncpy(buffer, buf, min(sizeof(buffer), count));
7452 channel = simple_strtoul(p, NULL, 0);
7454 params.channel = channel;
7457 while (*p && *p != ' ')
7460 type = simple_strtoul(p + 1, NULL, 0);
7463 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7464 "channel %d (for '%s')\n", type, params.channel, buf);
7465 iwl3945_get_measurement(priv, ¶ms, type);
7470 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7471 show_measurement, store_measurement);
7472 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7474 static ssize_t store_retry_rate(struct device *d,
7475 struct device_attribute *attr,
7476 const char *buf, size_t count)
7478 struct iwl3945_priv *priv = dev_get_drvdata(d);
7480 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7481 if (priv->retry_rate <= 0)
7482 priv->retry_rate = 1;
7487 static ssize_t show_retry_rate(struct device *d,
7488 struct device_attribute *attr, char *buf)
7490 struct iwl3945_priv *priv = dev_get_drvdata(d);
7491 return sprintf(buf, "%d", priv->retry_rate);
7494 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7497 static ssize_t store_power_level(struct device *d,
7498 struct device_attribute *attr,
7499 const char *buf, size_t count)
7501 struct iwl3945_priv *priv = dev_get_drvdata(d);
7505 mode = simple_strtoul(buf, NULL, 0);
7506 mutex_lock(&priv->mutex);
7508 if (!iwl3945_is_ready(priv)) {
7513 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7514 mode = IWL_POWER_AC;
7516 mode |= IWL_POWER_ENABLED;
7518 if (mode != priv->power_mode) {
7519 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7521 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7524 priv->power_mode = mode;
7530 mutex_unlock(&priv->mutex);
7534 #define MAX_WX_STRING 80
7536 /* Values are in microsecond */
7537 static const s32 timeout_duration[] = {
7544 static const s32 period_duration[] = {
7552 static ssize_t show_power_level(struct device *d,
7553 struct device_attribute *attr, char *buf)
7555 struct iwl3945_priv *priv = dev_get_drvdata(d);
7556 int level = IWL_POWER_LEVEL(priv->power_mode);
7559 p += sprintf(p, "%d ", level);
7561 case IWL_POWER_MODE_CAM:
7563 p += sprintf(p, "(AC)");
7565 case IWL_POWER_BATTERY:
7566 p += sprintf(p, "(BATTERY)");
7570 "(Timeout %dms, Period %dms)",
7571 timeout_duration[level - 1] / 1000,
7572 period_duration[level - 1] / 1000);
7575 if (!(priv->power_mode & IWL_POWER_ENABLED))
7576 p += sprintf(p, " OFF\n");
7578 p += sprintf(p, " \n");
7584 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7587 static ssize_t show_channels(struct device *d,
7588 struct device_attribute *attr, char *buf)
7590 /* all this shit doesn't belong into sysfs anyway */
7594 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7596 static ssize_t show_statistics(struct device *d,
7597 struct device_attribute *attr, char *buf)
7599 struct iwl3945_priv *priv = dev_get_drvdata(d);
7600 u32 size = sizeof(struct iwl3945_notif_statistics);
7601 u32 len = 0, ofs = 0;
7602 u8 *data = (u8 *)&priv->statistics;
7605 if (!iwl3945_is_alive(priv))
7608 mutex_lock(&priv->mutex);
7609 rc = iwl3945_send_statistics_request(priv);
7610 mutex_unlock(&priv->mutex);
7614 "Error sending statistics request: 0x%08X\n", rc);
7618 while (size && (PAGE_SIZE - len)) {
7619 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7620 PAGE_SIZE - len, 1);
7622 if (PAGE_SIZE - len)
7626 size -= min(size, 16U);
7632 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7634 static ssize_t show_antenna(struct device *d,
7635 struct device_attribute *attr, char *buf)
7637 struct iwl3945_priv *priv = dev_get_drvdata(d);
7639 if (!iwl3945_is_alive(priv))
7642 return sprintf(buf, "%d\n", priv->antenna);
7645 static ssize_t store_antenna(struct device *d,
7646 struct device_attribute *attr,
7647 const char *buf, size_t count)
7650 struct iwl3945_priv *priv = dev_get_drvdata(d);
7655 if (sscanf(buf, "%1i", &ant) != 1) {
7656 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7660 if ((ant >= 0) && (ant <= 2)) {
7661 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7662 priv->antenna = (enum iwl3945_antenna)ant;
7664 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7670 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7672 static ssize_t show_status(struct device *d,
7673 struct device_attribute *attr, char *buf)
7675 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7676 if (!iwl3945_is_alive(priv))
7678 return sprintf(buf, "0x%08x\n", (int)priv->status);
7681 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7683 static ssize_t dump_error_log(struct device *d,
7684 struct device_attribute *attr,
7685 const char *buf, size_t count)
7687 char *p = (char *)buf;
7690 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7692 return strnlen(buf, count);
7695 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7697 static ssize_t dump_event_log(struct device *d,
7698 struct device_attribute *attr,
7699 const char *buf, size_t count)
7701 char *p = (char *)buf;
7704 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7706 return strnlen(buf, count);
7709 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7711 /*****************************************************************************
7713 * driver setup and tear down
7715 *****************************************************************************/
7717 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7719 priv->workqueue = create_workqueue(DRV_NAME);
7721 init_waitqueue_head(&priv->wait_command_queue);
7723 INIT_WORK(&priv->up, iwl3945_bg_up);
7724 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7725 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7726 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7727 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7728 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7729 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7730 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7731 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7732 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7733 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7735 iwl3945_hw_setup_deferred_work(priv);
7737 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7738 iwl3945_irq_tasklet, (unsigned long)priv);
7741 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7743 iwl3945_hw_cancel_deferred_work(priv);
7745 cancel_delayed_work_sync(&priv->init_alive_start);
7746 cancel_delayed_work(&priv->scan_check);
7747 cancel_delayed_work(&priv->alive_start);
7748 cancel_work_sync(&priv->beacon_update);
7751 static struct attribute *iwl3945_sysfs_entries[] = {
7752 &dev_attr_antenna.attr,
7753 &dev_attr_channels.attr,
7754 &dev_attr_dump_errors.attr,
7755 &dev_attr_dump_events.attr,
7756 &dev_attr_flags.attr,
7757 &dev_attr_filter_flags.attr,
7758 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7759 &dev_attr_measurement.attr,
7761 &dev_attr_power_level.attr,
7762 &dev_attr_retry_rate.attr,
7763 &dev_attr_statistics.attr,
7764 &dev_attr_status.attr,
7765 &dev_attr_temperature.attr,
7766 &dev_attr_tx_power.attr,
7767 #ifdef CONFIG_IWL3945_DEBUG
7768 &dev_attr_debug_level.attr,
7773 static struct attribute_group iwl3945_attribute_group = {
7774 .name = NULL, /* put in device directory */
7775 .attrs = iwl3945_sysfs_entries,
7778 static struct ieee80211_ops iwl3945_hw_ops = {
7779 .tx = iwl3945_mac_tx,
7780 .start = iwl3945_mac_start,
7781 .stop = iwl3945_mac_stop,
7782 .add_interface = iwl3945_mac_add_interface,
7783 .remove_interface = iwl3945_mac_remove_interface,
7784 .config = iwl3945_mac_config,
7785 .config_interface = iwl3945_mac_config_interface,
7786 .configure_filter = iwl3945_configure_filter,
7787 .set_key = iwl3945_mac_set_key,
7788 .get_stats = iwl3945_mac_get_stats,
7789 .get_tx_stats = iwl3945_mac_get_tx_stats,
7790 .conf_tx = iwl3945_mac_conf_tx,
7791 .reset_tsf = iwl3945_mac_reset_tsf,
7792 .bss_info_changed = iwl3945_bss_info_changed,
7793 .hw_scan = iwl3945_mac_hw_scan
7796 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7799 struct iwl3945_priv *priv;
7800 struct ieee80211_hw *hw;
7801 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7802 unsigned long flags;
7804 /***********************
7805 * 1. Allocating HW data
7806 * ********************/
7808 /* mac80211 allocates memory for this device instance, including
7809 * space for this driver's private structure */
7810 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7812 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7817 SET_IEEE80211_DEV(hw, &pdev->dev);
7821 priv->pci_dev = pdev;
7824 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7825 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7826 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7827 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7832 /* Disabling hardware scan means that mac80211 will perform scans
7833 * "the hard way", rather than using device's scan. */
7834 if (iwl3945_param_disable_hw_scan) {
7835 IWL_DEBUG_INFO("Disabling hw_scan\n");
7836 iwl3945_hw_ops.hw_scan = NULL;
7839 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7840 hw->rate_control_algorithm = "iwl-3945-rs";
7841 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7843 /* Select antenna (may be helpful if only one antenna is connected) */
7844 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7845 #ifdef CONFIG_IWL3945_DEBUG
7846 priv->debug_level = iwl3945_param_debug;
7847 atomic_set(&priv->restrict_refcnt, 0);
7850 /* Tell mac80211 our characteristics */
7851 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7852 IEEE80211_HW_NOISE_DBM;
7854 hw->wiphy->interface_modes =
7855 BIT(NL80211_IFTYPE_STATION) |
7856 BIT(NL80211_IFTYPE_ADHOC);
7858 hw->wiphy->fw_handles_regulatory = true;
7860 /* 4 EDCA QOS priorities */
7863 /***************************
7864 * 2. Initializing PCI bus
7865 * *************************/
7866 if (pci_enable_device(pdev)) {
7868 goto out_ieee80211_free_hw;
7871 pci_set_master(pdev);
7873 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7875 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7877 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
7878 goto out_pci_disable_device;
7881 pci_set_drvdata(pdev, priv);
7882 err = pci_request_regions(pdev, DRV_NAME);
7884 goto out_pci_disable_device;
7886 /***********************
7887 * 3. Read REV Register
7888 * ********************/
7889 priv->hw_base = pci_iomap(pdev, 0, 0);
7890 if (!priv->hw_base) {
7892 goto out_pci_release_regions;
7895 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7896 (unsigned long long) pci_resource_len(pdev, 0));
7897 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7899 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7900 * PCI Tx retries from interfering with C3 CPU state */
7901 pci_write_config_byte(pdev, 0x41, 0x00);
7904 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7905 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7907 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7908 err = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
7909 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7911 IWL_DEBUG_INFO("Failed to init the card\n");
7912 goto out_remove_sysfs;
7915 /***********************
7917 * ********************/
7918 /* Read the EEPROM */
7919 err = iwl3945_eeprom_init(priv);
7921 IWL_ERROR("Unable to init EEPROM\n");
7922 goto out_remove_sysfs;
7924 /* MAC Address location in EEPROM same for 3945/4965 */
7925 get_eeprom_mac(priv, priv->mac_addr);
7926 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7927 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7929 /***********************
7930 * 5. Setup HW Constants
7931 * ********************/
7932 /* Device-specific setup */
7933 if (iwl3945_hw_set_hw_setting(priv)) {
7934 IWL_ERROR("failed to set hw settings\n");
7938 /***********************
7940 * ********************/
7941 priv->retry_rate = 1;
7942 priv->ibss_beacon = NULL;
7944 spin_lock_init(&priv->lock);
7945 spin_lock_init(&priv->power_data.lock);
7946 spin_lock_init(&priv->sta_lock);
7947 spin_lock_init(&priv->hcmd_lock);
7949 INIT_LIST_HEAD(&priv->free_frames);
7950 mutex_init(&priv->mutex);
7952 /* Clear the driver's (not device's) station table */
7953 iwl3945_clear_stations_table(priv);
7955 priv->data_retry_limit = -1;
7956 priv->ieee_channels = NULL;
7957 priv->ieee_rates = NULL;
7958 priv->band = IEEE80211_BAND_2GHZ;
7960 priv->iw_mode = NL80211_IFTYPE_STATION;
7962 iwl3945_reset_qos(priv);
7964 priv->qos_data.qos_active = 0;
7965 priv->qos_data.qos_cap.val = 0;
7968 priv->rates_mask = IWL_RATES_MASK;
7969 /* If power management is turned on, default to AC mode */
7970 priv->power_mode = IWL_POWER_AC;
7971 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7973 err = iwl3945_init_channel_map(priv);
7975 IWL_ERROR("initializing regulatory failed: %d\n", err);
7976 goto out_release_irq;
7979 err = iwl3945_init_geos(priv);
7981 IWL_ERROR("initializing geos failed: %d\n", err);
7982 goto out_free_channel_map;
7985 printk(KERN_INFO DRV_NAME
7986 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7988 /***********************************
7989 * 7. Initialize Module Parameters
7990 * **********************************/
7992 /* Initialize module parameter values here */
7993 /* Disable radio (SW RF KILL) via parameter when loading driver */
7994 if (iwl3945_param_disable) {
7995 set_bit(STATUS_RF_KILL_SW, &priv->status);
7996 IWL_DEBUG_INFO("Radio disabled.\n");
8000 /***********************
8002 * ********************/
8004 spin_lock_irqsave(&priv->lock, flags);
8005 iwl3945_disable_interrupts(priv);
8006 spin_unlock_irqrestore(&priv->lock, flags);
8008 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8010 IWL_ERROR("failed to create sysfs device attributes\n");
8014 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8015 iwl3945_setup_deferred_work(priv);
8016 iwl3945_setup_rx_handlers(priv);
8018 /***********************
8020 * ********************/
8021 pci_save_state(pdev);
8022 pci_disable_device(pdev);
8024 /*********************************
8025 * 10. Setup and Register mac80211
8026 * *******************************/
8028 err = ieee80211_register_hw(priv->hw);
8030 IWL_ERROR("Failed to register network device (error %d)\n", err);
8031 goto out_remove_sysfs;
8034 priv->hw->conf.beacon_int = 100;
8035 priv->mac80211_registered = 1;
8038 err = iwl3945_rfkill_init(priv);
8040 IWL_ERROR("Unable to initialize RFKILL system. "
8041 "Ignoring error: %d\n", err);
8046 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8048 iwl3945_free_geos(priv);
8049 out_free_channel_map:
8050 iwl3945_free_channel_map(priv);
8054 destroy_workqueue(priv->workqueue);
8055 priv->workqueue = NULL;
8056 iwl3945_unset_hw_setting(priv);
8059 pci_iounmap(pdev, priv->hw_base);
8060 out_pci_release_regions:
8061 pci_release_regions(pdev);
8062 out_pci_disable_device:
8063 pci_disable_device(pdev);
8064 pci_set_drvdata(pdev, NULL);
8065 out_ieee80211_free_hw:
8066 ieee80211_free_hw(priv->hw);
8071 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8073 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8074 unsigned long flags;
8079 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8081 set_bit(STATUS_EXIT_PENDING, &priv->status);
8085 /* make sure we flush any pending irq or
8086 * tasklet for the driver
8088 spin_lock_irqsave(&priv->lock, flags);
8089 iwl3945_disable_interrupts(priv);
8090 spin_unlock_irqrestore(&priv->lock, flags);
8092 iwl_synchronize_irq(priv);
8094 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8096 iwl3945_rfkill_unregister(priv);
8097 iwl3945_dealloc_ucode_pci(priv);
8100 iwl3945_rx_queue_free(priv, &priv->rxq);
8101 iwl3945_hw_txq_ctx_free(priv);
8103 iwl3945_unset_hw_setting(priv);
8104 iwl3945_clear_stations_table(priv);
8106 if (priv->mac80211_registered)
8107 ieee80211_unregister_hw(priv->hw);
8109 /*netif_stop_queue(dev); */
8110 flush_workqueue(priv->workqueue);
8112 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8113 * priv->workqueue... so we can't take down the workqueue
8115 destroy_workqueue(priv->workqueue);
8116 priv->workqueue = NULL;
8118 pci_iounmap(pdev, priv->hw_base);
8119 pci_release_regions(pdev);
8120 pci_disable_device(pdev);
8121 pci_set_drvdata(pdev, NULL);
8123 iwl3945_free_channel_map(priv);
8124 iwl3945_free_geos(priv);
8126 if (priv->ibss_beacon)
8127 dev_kfree_skb(priv->ibss_beacon);
8129 ieee80211_free_hw(priv->hw);
8134 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8136 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8138 if (priv->is_open) {
8139 set_bit(STATUS_IN_SUSPEND, &priv->status);
8140 iwl3945_mac_stop(priv->hw);
8144 pci_set_power_state(pdev, PCI_D3hot);
8149 static int iwl3945_pci_resume(struct pci_dev *pdev)
8151 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8153 pci_set_power_state(pdev, PCI_D0);
8156 iwl3945_mac_start(priv->hw);
8158 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8162 #endif /* CONFIG_PM */
8164 /*************** RFKILL FUNCTIONS **********/
8165 #ifdef CONFIG_IWL3945_RFKILL
8166 /* software rf-kill from user */
8167 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8169 struct iwl3945_priv *priv = data;
8175 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8178 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8179 mutex_lock(&priv->mutex);
8182 case RFKILL_STATE_UNBLOCKED:
8183 if (iwl3945_is_rfkill_hw(priv)) {
8187 iwl3945_radio_kill_sw(priv, 0);
8189 case RFKILL_STATE_SOFT_BLOCKED:
8190 iwl3945_radio_kill_sw(priv, 1);
8193 IWL_WARNING("we received unexpected RFKILL state %d\n", state);
8197 mutex_unlock(&priv->mutex);
8202 int iwl3945_rfkill_init(struct iwl3945_priv *priv)
8204 struct device *device = wiphy_dev(priv->hw->wiphy);
8207 BUG_ON(device == NULL);
8209 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8210 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8211 if (!priv->rfkill) {
8212 IWL_ERROR("Unable to allocate rfkill device.\n");
8217 priv->rfkill->name = priv->cfg->name;
8218 priv->rfkill->data = priv;
8219 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8220 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8221 priv->rfkill->user_claim_unsupported = 1;
8223 priv->rfkill->dev.class->suspend = NULL;
8224 priv->rfkill->dev.class->resume = NULL;
8226 ret = rfkill_register(priv->rfkill);
8228 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8232 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8236 if (priv->rfkill != NULL)
8237 rfkill_free(priv->rfkill);
8238 priv->rfkill = NULL;
8241 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8245 void iwl3945_rfkill_unregister(struct iwl3945_priv *priv)
8248 rfkill_unregister(priv->rfkill);
8250 priv->rfkill = NULL;
8253 /* set rf-kill to the right state. */
8254 void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv)
8260 if (iwl3945_is_rfkill_hw(priv)) {
8261 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8265 if (!iwl3945_is_rfkill_sw(priv))
8266 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8268 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8272 /*****************************************************************************
8274 * driver and module entry point
8276 *****************************************************************************/
8278 static struct pci_driver iwl3945_driver = {
8280 .id_table = iwl3945_hw_card_ids,
8281 .probe = iwl3945_pci_probe,
8282 .remove = __devexit_p(iwl3945_pci_remove),
8284 .suspend = iwl3945_pci_suspend,
8285 .resume = iwl3945_pci_resume,
8289 static int __init iwl3945_init(void)
8293 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8294 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8296 ret = iwl3945_rate_control_register();
8298 printk(KERN_ERR DRV_NAME
8299 "Unable to register rate control algorithm: %d\n", ret);
8303 ret = pci_register_driver(&iwl3945_driver);
8305 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8306 goto error_register;
8312 iwl3945_rate_control_unregister();
8316 static void __exit iwl3945_exit(void)
8318 pci_unregister_driver(&iwl3945_driver);
8319 iwl3945_rate_control_unregister();
8322 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8324 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8325 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8326 module_param_named(disable, iwl3945_param_disable, int, 0444);
8327 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8328 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8329 MODULE_PARM_DESC(hwcrypto,
8330 "using hardware crypto engine (default 0 [software])\n");
8331 module_param_named(debug, iwl3945_param_debug, uint, 0444);
8332 MODULE_PARM_DESC(debug, "debug output mask");
8333 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8334 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8336 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8337 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8339 module_exit(iwl3945_exit);
8340 module_init(iwl3945_init);