Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[pandora-kernel.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/slab.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/sched.h>
38 #include <linux/skbuff.h>
39 #include <linux/netdevice.h>
40 #include <linux/wireless.h>
41 #include <linux/firmware.h>
42 #include <linux/etherdevice.h>
43 #include <linux/if_arp.h>
44
45 #include <net/ieee80211_radiotap.h>
46 #include <net/mac80211.h>
47
48 #include <asm/div64.h>
49
50 #define DRV_NAME        "iwl3945"
51
52 #include "iwl-fh.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-commands.h"
55 #include "iwl-sta.h"
56 #include "iwl-3945.h"
57 #include "iwl-core.h"
58 #include "iwl-helpers.h"
59 #include "iwl-dev.h"
60 #include "iwl-spectrum.h"
61
62 /*
63  * module name, copyright, version, etc.
64  */
65
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 /*
76  * add "s" to indicate spectrum measurement included.
77  * we add it here to be consistent with previous releases in which
78  * this was configurable.
79  */
80 #define DRV_VERSION  IWLWIFI_VERSION VD "s"
81 #define DRV_COPYRIGHT   "Copyright(c) 2003-2010 Intel Corporation"
82 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89  /* module parameters */
90 struct iwl_mod_params iwl3945_mod_params = {
91         .sw_crypto = 1,
92         .restart_fw = 1,
93         /* the rest are 0 by default */
94 };
95
96 /**
97  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
98  * @priv: eeprom and antenna fields are used to determine antenna flags
99  *
100  * priv->eeprom39  is used to determine if antenna AUX/MAIN are reversed
101  * iwl3945_mod_params.antenna specifies the antenna diversity mode:
102  *
103  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
104  * IWL_ANTENNA_MAIN      - Force MAIN antenna
105  * IWL_ANTENNA_AUX       - Force AUX antenna
106  */
107 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
108 {
109         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
110
111         switch (iwl3945_mod_params.antenna) {
112         case IWL_ANTENNA_DIVERSITY:
113                 return 0;
114
115         case IWL_ANTENNA_MAIN:
116                 if (eeprom->antenna_switch_type)
117                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
118                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
119
120         case IWL_ANTENNA_AUX:
121                 if (eeprom->antenna_switch_type)
122                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
124         }
125
126         /* bad antenna selector value */
127         IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
128                 iwl3945_mod_params.antenna);
129
130         return 0;               /* "diversity" is default if error */
131 }
132
133 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
134                                    struct ieee80211_key_conf *keyconf,
135                                    u8 sta_id)
136 {
137         unsigned long flags;
138         __le16 key_flags = 0;
139         int ret;
140
141         key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
142         key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
143
144         if (sta_id == priv->hw_params.bcast_sta_id)
145                 key_flags |= STA_KEY_MULTICAST_MSK;
146
147         keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
148         keyconf->hw_key_idx = keyconf->keyidx;
149         key_flags &= ~STA_KEY_FLG_INVALID;
150
151         spin_lock_irqsave(&priv->sta_lock, flags);
152         priv->stations[sta_id].keyinfo.alg = keyconf->alg;
153         priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
154         memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
155                keyconf->keylen);
156
157         memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
158                keyconf->keylen);
159
160         if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
161                         == STA_KEY_FLG_NO_ENC)
162                 priv->stations[sta_id].sta.key.key_offset =
163                                  iwl_get_free_ucode_key_index(priv);
164         /* else, we are overriding an existing key => no need to allocated room
165         * in uCode. */
166
167         WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
168                 "no space for a new key");
169
170         priv->stations[sta_id].sta.key.key_flags = key_flags;
171         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
172         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
173
174         IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
175
176         ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
177
178         spin_unlock_irqrestore(&priv->sta_lock, flags);
179
180         return ret;
181 }
182
183 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
184                                   struct ieee80211_key_conf *keyconf,
185                                   u8 sta_id)
186 {
187         return -EOPNOTSUPP;
188 }
189
190 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
191                                   struct ieee80211_key_conf *keyconf,
192                                   u8 sta_id)
193 {
194         return -EOPNOTSUPP;
195 }
196
197 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
198 {
199         unsigned long flags;
200
201         spin_lock_irqsave(&priv->sta_lock, flags);
202         memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
203         memset(&priv->stations[sta_id].sta.key, 0,
204                 sizeof(struct iwl4965_keyinfo));
205         priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
206         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
207         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
208         spin_unlock_irqrestore(&priv->sta_lock, flags);
209
210         IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
211         iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
212         return 0;
213 }
214
215 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
216                         struct ieee80211_key_conf *keyconf, u8 sta_id)
217 {
218         int ret = 0;
219
220         keyconf->hw_key_idx = HW_KEY_DYNAMIC;
221
222         switch (keyconf->alg) {
223         case ALG_CCMP:
224                 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
225                 break;
226         case ALG_TKIP:
227                 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
228                 break;
229         case ALG_WEP:
230                 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
231                 break;
232         default:
233                 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
234                 ret = -EINVAL;
235         }
236
237         IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
238                       keyconf->alg, keyconf->keylen, keyconf->keyidx,
239                       sta_id, ret);
240
241         return ret;
242 }
243
244 static int iwl3945_remove_static_key(struct iwl_priv *priv)
245 {
246         int ret = -EOPNOTSUPP;
247
248         return ret;
249 }
250
251 static int iwl3945_set_static_key(struct iwl_priv *priv,
252                                 struct ieee80211_key_conf *key)
253 {
254         if (key->alg == ALG_WEP)
255                 return -EOPNOTSUPP;
256
257         IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
258         return -EINVAL;
259 }
260
261 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
262 {
263         struct list_head *element;
264
265         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
266                        priv->frames_count);
267
268         while (!list_empty(&priv->free_frames)) {
269                 element = priv->free_frames.next;
270                 list_del(element);
271                 kfree(list_entry(element, struct iwl3945_frame, list));
272                 priv->frames_count--;
273         }
274
275         if (priv->frames_count) {
276                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
277                             priv->frames_count);
278                 priv->frames_count = 0;
279         }
280 }
281
282 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
283 {
284         struct iwl3945_frame *frame;
285         struct list_head *element;
286         if (list_empty(&priv->free_frames)) {
287                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
288                 if (!frame) {
289                         IWL_ERR(priv, "Could not allocate frame!\n");
290                         return NULL;
291                 }
292
293                 priv->frames_count++;
294                 return frame;
295         }
296
297         element = priv->free_frames.next;
298         list_del(element);
299         return list_entry(element, struct iwl3945_frame, list);
300 }
301
302 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
303 {
304         memset(frame, 0, sizeof(*frame));
305         list_add(&frame->list, &priv->free_frames);
306 }
307
308 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
309                                 struct ieee80211_hdr *hdr,
310                                 int left)
311 {
312
313         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
314             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
315              (priv->iw_mode != NL80211_IFTYPE_AP)))
316                 return 0;
317
318         if (priv->ibss_beacon->len > left)
319                 return 0;
320
321         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
322
323         return priv->ibss_beacon->len;
324 }
325
326 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
327 {
328         struct iwl3945_frame *frame;
329         unsigned int frame_size;
330         int rc;
331         u8 rate;
332
333         frame = iwl3945_get_free_frame(priv);
334
335         if (!frame) {
336                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
337                           "command.\n");
338                 return -ENOMEM;
339         }
340
341         rate = iwl_rate_get_lowest_plcp(priv);
342
343         frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
344
345         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
346                               &frame->u.cmd[0]);
347
348         iwl3945_free_frame(priv, frame);
349
350         return rc;
351 }
352
353 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
354 {
355         if (priv->shared_virt)
356                 dma_free_coherent(&priv->pci_dev->dev,
357                                   sizeof(struct iwl3945_shared),
358                                   priv->shared_virt,
359                                   priv->shared_phys);
360 }
361
362 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
363                                       struct ieee80211_tx_info *info,
364                                       struct iwl_device_cmd *cmd,
365                                       struct sk_buff *skb_frag,
366                                       int sta_id)
367 {
368         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
369         struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
370
371         switch (keyinfo->alg) {
372         case ALG_CCMP:
373                 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
374                 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
375                 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
376                 break;
377
378         case ALG_TKIP:
379                 break;
380
381         case ALG_WEP:
382                 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
383                     (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
384
385                 if (keyinfo->keylen == 13)
386                         tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
387
388                 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
389
390                 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
391                              "with key %d\n", info->control.hw_key->hw_key_idx);
392                 break;
393
394         default:
395                 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
396                 break;
397         }
398 }
399
400 /*
401  * handle build REPLY_TX command notification.
402  */
403 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
404                                   struct iwl_device_cmd *cmd,
405                                   struct ieee80211_tx_info *info,
406                                   struct ieee80211_hdr *hdr, u8 std_id)
407 {
408         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
409         __le32 tx_flags = tx_cmd->tx_flags;
410         __le16 fc = hdr->frame_control;
411
412         tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
413         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
414                 tx_flags |= TX_CMD_FLG_ACK_MSK;
415                 if (ieee80211_is_mgmt(fc))
416                         tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
417                 if (ieee80211_is_probe_resp(fc) &&
418                     !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
419                         tx_flags |= TX_CMD_FLG_TSF_MSK;
420         } else {
421                 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
422                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
423         }
424
425         tx_cmd->sta_id = std_id;
426         if (ieee80211_has_morefrags(fc))
427                 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
428
429         if (ieee80211_is_data_qos(fc)) {
430                 u8 *qc = ieee80211_get_qos_ctl(hdr);
431                 tx_cmd->tid_tspec = qc[0] & 0xf;
432                 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
433         } else {
434                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
435         }
436
437         priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
438
439         if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
440                 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
441
442         tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
443         if (ieee80211_is_mgmt(fc)) {
444                 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
445                         tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
446                 else
447                         tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
448         } else {
449                 tx_cmd->timeout.pm_frame_timeout = 0;
450         }
451
452         tx_cmd->driver_txop = 0;
453         tx_cmd->tx_flags = tx_flags;
454         tx_cmd->next_frame_len = 0;
455 }
456
457 /*
458  * start REPLY_TX command process
459  */
460 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
461 {
462         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
463         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
464         struct iwl3945_tx_cmd *tx_cmd;
465         struct iwl_tx_queue *txq = NULL;
466         struct iwl_queue *q = NULL;
467         struct iwl_device_cmd *out_cmd;
468         struct iwl_cmd_meta *out_meta;
469         dma_addr_t phys_addr;
470         dma_addr_t txcmd_phys;
471         int txq_id = skb_get_queue_mapping(skb);
472         u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
473         u8 id;
474         u8 unicast;
475         u8 sta_id;
476         u8 tid = 0;
477         u16 seq_number = 0;
478         __le16 fc;
479         u8 wait_write_ptr = 0;
480         u8 *qc = NULL;
481         unsigned long flags;
482
483         spin_lock_irqsave(&priv->lock, flags);
484         if (iwl_is_rfkill(priv)) {
485                 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
486                 goto drop_unlock;
487         }
488
489         if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
490                 IWL_ERR(priv, "ERROR: No TX rate available.\n");
491                 goto drop_unlock;
492         }
493
494         unicast = !is_multicast_ether_addr(hdr->addr1);
495         id = 0;
496
497         fc = hdr->frame_control;
498
499 #ifdef CONFIG_IWLWIFI_DEBUG
500         if (ieee80211_is_auth(fc))
501                 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
502         else if (ieee80211_is_assoc_req(fc))
503                 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
504         else if (ieee80211_is_reassoc_req(fc))
505                 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
506 #endif
507
508         /* drop all non-injected data frame if we are not associated */
509         if (ieee80211_is_data(fc) &&
510             !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
511             (!iwl_is_associated(priv) ||
512              ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
513                 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
514                 goto drop_unlock;
515         }
516
517         spin_unlock_irqrestore(&priv->lock, flags);
518
519         hdr_len = ieee80211_hdrlen(fc);
520
521         /* Find (or create) index into station table for destination station */
522         if (info->flags & IEEE80211_TX_CTL_INJECTED)
523                 sta_id = priv->hw_params.bcast_sta_id;
524         else
525                 sta_id = iwl_get_sta_id(priv, hdr);
526         if (sta_id == IWL_INVALID_STATION) {
527                 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
528                                hdr->addr1);
529                 goto drop;
530         }
531
532         IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
533
534         if (ieee80211_is_data_qos(fc)) {
535                 qc = ieee80211_get_qos_ctl(hdr);
536                 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
537                 if (unlikely(tid >= MAX_TID_COUNT))
538                         goto drop;
539                 seq_number = priv->stations[sta_id].tid[tid].seq_number &
540                                 IEEE80211_SCTL_SEQ;
541                 hdr->seq_ctrl = cpu_to_le16(seq_number) |
542                         (hdr->seq_ctrl &
543                                 cpu_to_le16(IEEE80211_SCTL_FRAG));
544                 seq_number += 0x10;
545         }
546
547         /* Descriptor for chosen Tx queue */
548         txq = &priv->txq[txq_id];
549         q = &txq->q;
550
551         if ((iwl_queue_space(q) < q->high_mark))
552                 goto drop;
553
554         spin_lock_irqsave(&priv->lock, flags);
555
556         idx = get_cmd_index(q, q->write_ptr, 0);
557
558         /* Set up driver data for this TFD */
559         memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
560         txq->txb[q->write_ptr].skb[0] = skb;
561
562         /* Init first empty entry in queue's array of Tx/cmd buffers */
563         out_cmd = txq->cmd[idx];
564         out_meta = &txq->meta[idx];
565         tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
566         memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
567         memset(tx_cmd, 0, sizeof(*tx_cmd));
568
569         /*
570          * Set up the Tx-command (not MAC!) header.
571          * Store the chosen Tx queue and TFD index within the sequence field;
572          * after Tx, uCode's Tx response will return this value so driver can
573          * locate the frame within the tx queue and do post-tx processing.
574          */
575         out_cmd->hdr.cmd = REPLY_TX;
576         out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
577                                 INDEX_TO_SEQ(q->write_ptr)));
578
579         /* Copy MAC header from skb into command buffer */
580         memcpy(tx_cmd->hdr, hdr, hdr_len);
581
582
583         if (info->control.hw_key)
584                 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
585
586         /* TODO need this for burst mode later on */
587         iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
588
589         /* set is_hcca to 0; it probably will never be implemented */
590         iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
591
592         /* Total # bytes to be transmitted */
593         len = (u16)skb->len;
594         tx_cmd->len = cpu_to_le16(len);
595
596         iwl_dbg_log_tx_data_frame(priv, len, hdr);
597         iwl_update_stats(priv, true, fc, len);
598         tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
599         tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
600
601         if (!ieee80211_has_morefrags(hdr->frame_control)) {
602                 txq->need_update = 1;
603                 if (qc)
604                         priv->stations[sta_id].tid[tid].seq_number = seq_number;
605         } else {
606                 wait_write_ptr = 1;
607                 txq->need_update = 0;
608         }
609
610         IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
611                      le16_to_cpu(out_cmd->hdr.sequence));
612         IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
613         iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
614         iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
615                            ieee80211_hdrlen(fc));
616
617         /*
618          * Use the first empty entry in this queue's command buffer array
619          * to contain the Tx command and MAC header concatenated together
620          * (payload data will be in another buffer).
621          * Size of this varies, due to varying MAC header length.
622          * If end is not dword aligned, we'll have 2 extra bytes at the end
623          * of the MAC header (device reads on dword boundaries).
624          * We'll tell device about this padding later.
625          */
626         len = sizeof(struct iwl3945_tx_cmd) +
627                         sizeof(struct iwl_cmd_header) + hdr_len;
628
629         len_org = len;
630         len = (len + 3) & ~3;
631
632         if (len_org != len)
633                 len_org = 1;
634         else
635                 len_org = 0;
636
637         /* Physical address of this Tx command's header (not MAC header!),
638          * within command buffer array. */
639         txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
640                                     len, PCI_DMA_TODEVICE);
641         /* we do not map meta data ... so we can safely access address to
642          * provide to unmap command*/
643         pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
644         pci_unmap_len_set(out_meta, len, len);
645
646         /* Add buffer containing Tx command and MAC(!) header to TFD's
647          * first entry */
648         priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
649                                                    txcmd_phys, len, 1, 0);
650
651
652         /* Set up TFD's 2nd entry to point directly to remainder of skb,
653          * if any (802.11 null frames have no payload). */
654         len = skb->len - hdr_len;
655         if (len) {
656                 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
657                                            len, PCI_DMA_TODEVICE);
658                 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
659                                                            phys_addr, len,
660                                                            0, U32_PAD(len));
661         }
662
663
664         /* Tell device the write index *just past* this latest filled TFD */
665         q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
666         iwl_txq_update_write_ptr(priv, txq);
667         spin_unlock_irqrestore(&priv->lock, flags);
668
669         if ((iwl_queue_space(q) < q->high_mark)
670             && priv->mac80211_registered) {
671                 if (wait_write_ptr) {
672                         spin_lock_irqsave(&priv->lock, flags);
673                         txq->need_update = 1;
674                         iwl_txq_update_write_ptr(priv, txq);
675                         spin_unlock_irqrestore(&priv->lock, flags);
676                 }
677
678                 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
679         }
680
681         return 0;
682
683 drop_unlock:
684         spin_unlock_irqrestore(&priv->lock, flags);
685 drop:
686         return -1;
687 }
688
689 #define BEACON_TIME_MASK_LOW    0x00FFFFFF
690 #define BEACON_TIME_MASK_HIGH   0xFF000000
691 #define TIME_UNIT               1024
692
693 /*
694  * extended beacon time format
695  * time in usec will be changed into a 32-bit value in 8:24 format
696  * the high 1 byte is the beacon counts
697  * the lower 3 bytes is the time in usec within one beacon interval
698  */
699
700 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
701 {
702         u32 quot;
703         u32 rem;
704         u32 interval = beacon_interval * 1024;
705
706         if (!interval || !usec)
707                 return 0;
708
709         quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
710         rem = (usec % interval) & BEACON_TIME_MASK_LOW;
711
712         return (quot << 24) + rem;
713 }
714
715 /* base is usually what we get from ucode with each received frame,
716  * the same as HW timer counter counting down
717  */
718
719 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
720 {
721         u32 base_low = base & BEACON_TIME_MASK_LOW;
722         u32 addon_low = addon & BEACON_TIME_MASK_LOW;
723         u32 interval = beacon_interval * TIME_UNIT;
724         u32 res = (base & BEACON_TIME_MASK_HIGH) +
725             (addon & BEACON_TIME_MASK_HIGH);
726
727         if (base_low > addon_low)
728                 res += base_low - addon_low;
729         else if (base_low < addon_low) {
730                 res += interval + base_low - addon_low;
731                 res += (1 << 24);
732         } else
733                 res += (1 << 24);
734
735         return cpu_to_le32(res);
736 }
737
738 static int iwl3945_get_measurement(struct iwl_priv *priv,
739                                struct ieee80211_measurement_params *params,
740                                u8 type)
741 {
742         struct iwl_spectrum_cmd spectrum;
743         struct iwl_rx_packet *pkt;
744         struct iwl_host_cmd cmd = {
745                 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
746                 .data = (void *)&spectrum,
747                 .flags = CMD_WANT_SKB,
748         };
749         u32 add_time = le64_to_cpu(params->start_time);
750         int rc;
751         int spectrum_resp_status;
752         int duration = le16_to_cpu(params->duration);
753
754         if (iwl_is_associated(priv))
755                 add_time =
756                     iwl3945_usecs_to_beacons(
757                         le64_to_cpu(params->start_time) - priv->last_tsf,
758                         le16_to_cpu(priv->rxon_timing.beacon_interval));
759
760         memset(&spectrum, 0, sizeof(spectrum));
761
762         spectrum.channel_count = cpu_to_le16(1);
763         spectrum.flags =
764             RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
765         spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
766         cmd.len = sizeof(spectrum);
767         spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
768
769         if (iwl_is_associated(priv))
770                 spectrum.start_time =
771                     iwl3945_add_beacon_time(priv->last_beacon_time,
772                                 add_time,
773                                 le16_to_cpu(priv->rxon_timing.beacon_interval));
774         else
775                 spectrum.start_time = 0;
776
777         spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
778         spectrum.channels[0].channel = params->channel;
779         spectrum.channels[0].type = type;
780         if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
781                 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
782                     RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
783
784         rc = iwl_send_cmd_sync(priv, &cmd);
785         if (rc)
786                 return rc;
787
788         pkt = (struct iwl_rx_packet *)cmd.reply_page;
789         if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
790                 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
791                 rc = -EIO;
792         }
793
794         spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
795         switch (spectrum_resp_status) {
796         case 0:         /* Command will be handled */
797                 if (pkt->u.spectrum.id != 0xff) {
798                         IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
799                                                 pkt->u.spectrum.id);
800                         priv->measurement_status &= ~MEASUREMENT_READY;
801                 }
802                 priv->measurement_status |= MEASUREMENT_ACTIVE;
803                 rc = 0;
804                 break;
805
806         case 1:         /* Command will not be handled */
807                 rc = -EAGAIN;
808                 break;
809         }
810
811         iwl_free_pages(priv, cmd.reply_page);
812
813         return rc;
814 }
815
816 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
817                                struct iwl_rx_mem_buffer *rxb)
818 {
819         struct iwl_rx_packet *pkt = rxb_addr(rxb);
820         struct iwl_alive_resp *palive;
821         struct delayed_work *pwork;
822
823         palive = &pkt->u.alive_frame;
824
825         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
826                        "0x%01X 0x%01X\n",
827                        palive->is_valid, palive->ver_type,
828                        palive->ver_subtype);
829
830         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
831                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
832                 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
833                        sizeof(struct iwl_alive_resp));
834                 pwork = &priv->init_alive_start;
835         } else {
836                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
837                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
838                        sizeof(struct iwl_alive_resp));
839                 pwork = &priv->alive_start;
840                 iwl3945_disable_events(priv);
841         }
842
843         /* We delay the ALIVE response by 5ms to
844          * give the HW RF Kill time to activate... */
845         if (palive->is_valid == UCODE_VALID_OK)
846                 queue_delayed_work(priv->workqueue, pwork,
847                                    msecs_to_jiffies(5));
848         else
849                 IWL_WARN(priv, "uCode did not respond OK.\n");
850 }
851
852 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
853                                  struct iwl_rx_mem_buffer *rxb)
854 {
855 #ifdef CONFIG_IWLWIFI_DEBUG
856         struct iwl_rx_packet *pkt = rxb_addr(rxb);
857 #endif
858
859         IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
860         return;
861 }
862
863 static void iwl3945_bg_beacon_update(struct work_struct *work)
864 {
865         struct iwl_priv *priv =
866                 container_of(work, struct iwl_priv, beacon_update);
867         struct sk_buff *beacon;
868
869         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
870         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
871
872         if (!beacon) {
873                 IWL_ERR(priv, "update beacon failed\n");
874                 return;
875         }
876
877         mutex_lock(&priv->mutex);
878         /* new beacon skb is allocated every time; dispose previous.*/
879         if (priv->ibss_beacon)
880                 dev_kfree_skb(priv->ibss_beacon);
881
882         priv->ibss_beacon = beacon;
883         mutex_unlock(&priv->mutex);
884
885         iwl3945_send_beacon_cmd(priv);
886 }
887
888 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
889                                 struct iwl_rx_mem_buffer *rxb)
890 {
891 #ifdef CONFIG_IWLWIFI_DEBUG
892         struct iwl_rx_packet *pkt = rxb_addr(rxb);
893         struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
894         u8 rate = beacon->beacon_notify_hdr.rate;
895
896         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
897                 "tsf %d %d rate %d\n",
898                 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
899                 beacon->beacon_notify_hdr.failure_frame,
900                 le32_to_cpu(beacon->ibss_mgr_status),
901                 le32_to_cpu(beacon->high_tsf),
902                 le32_to_cpu(beacon->low_tsf), rate);
903 #endif
904
905         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
906             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
907                 queue_work(priv->workqueue, &priv->beacon_update);
908 }
909
910 /* Handle notification from uCode that card's power state is changing
911  * due to software, hardware, or critical temperature RFKILL */
912 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
913                                     struct iwl_rx_mem_buffer *rxb)
914 {
915         struct iwl_rx_packet *pkt = rxb_addr(rxb);
916         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
917         unsigned long status = priv->status;
918
919         IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
920                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
921                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
922
923         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
924                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
925
926         if (flags & HW_CARD_DISABLED)
927                 set_bit(STATUS_RF_KILL_HW, &priv->status);
928         else
929                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
930
931
932         iwl_scan_cancel(priv);
933
934         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
935              test_bit(STATUS_RF_KILL_HW, &priv->status)))
936                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
937                                 test_bit(STATUS_RF_KILL_HW, &priv->status));
938         else
939                 wake_up_interruptible(&priv->wait_command_queue);
940 }
941
942 /**
943  * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
944  *
945  * Setup the RX handlers for each of the reply types sent from the uCode
946  * to the host.
947  *
948  * This function chains into the hardware specific files for them to setup
949  * any hardware specific handlers as well.
950  */
951 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
952 {
953         priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
954         priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
955         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
956         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
957         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
958                         iwl_rx_spectrum_measure_notif;
959         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
960         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
961             iwl_rx_pm_debug_statistics_notif;
962         priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
963
964         /*
965          * The same handler is used for both the REPLY to a discrete
966          * statistics request from the host as well as for the periodic
967          * statistics notifications (after received beacons) from the uCode.
968          */
969         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
970         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
971
972         iwl_setup_rx_scan_handlers(priv);
973         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
974
975         /* Set up hardware specific Rx handlers */
976         iwl3945_hw_rx_handler_setup(priv);
977 }
978
979 /************************** RX-FUNCTIONS ****************************/
980 /*
981  * Rx theory of operation
982  *
983  * The host allocates 32 DMA target addresses and passes the host address
984  * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
985  * 0 to 31
986  *
987  * Rx Queue Indexes
988  * The host/firmware share two index registers for managing the Rx buffers.
989  *
990  * The READ index maps to the first position that the firmware may be writing
991  * to -- the driver can read up to (but not including) this position and get
992  * good data.
993  * The READ index is managed by the firmware once the card is enabled.
994  *
995  * The WRITE index maps to the last position the driver has read from -- the
996  * position preceding WRITE is the last slot the firmware can place a packet.
997  *
998  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
999  * WRITE = READ.
1000  *
1001  * During initialization, the host sets up the READ queue position to the first
1002  * INDEX position, and WRITE to the last (READ - 1 wrapped)
1003  *
1004  * When the firmware places a packet in a buffer, it will advance the READ index
1005  * and fire the RX interrupt.  The driver can then query the READ index and
1006  * process as many packets as possible, moving the WRITE index forward as it
1007  * resets the Rx queue buffers with new memory.
1008  *
1009  * The management in the driver is as follows:
1010  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
1011  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1012  *   to replenish the iwl->rxq->rx_free.
1013  * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1014  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
1015  *   'processed' and 'read' driver indexes as well)
1016  * + A received packet is processed and handed to the kernel network stack,
1017  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
1018  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1019  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1020  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
1021  *   were enough free buffers and RX_STALLED is set it is cleared.
1022  *
1023  *
1024  * Driver sequence:
1025  *
1026  * iwl3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
1027  *                            iwl3945_rx_queue_restock
1028  * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1029  *                            queue, updates firmware pointers, and updates
1030  *                            the WRITE index.  If insufficient rx_free buffers
1031  *                            are available, schedules iwl3945_rx_replenish
1032  *
1033  * -- enable interrupts --
1034  * ISR - iwl3945_rx()         Detach iwl_rx_mem_buffers from pool up to the
1035  *                            READ INDEX, detaching the SKB from the pool.
1036  *                            Moves the packet buffer from queue to rx_used.
1037  *                            Calls iwl3945_rx_queue_restock to refill any empty
1038  *                            slots.
1039  * ...
1040  *
1041  */
1042
1043 /**
1044  * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1045  */
1046 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1047                                           dma_addr_t dma_addr)
1048 {
1049         return cpu_to_le32((u32)dma_addr);
1050 }
1051
1052 /**
1053  * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1054  *
1055  * If there are slots in the RX queue that need to be restocked,
1056  * and we have free pre-allocated buffers, fill the ranks as much
1057  * as we can, pulling from rx_free.
1058  *
1059  * This moves the 'write' index forward to catch up with 'processed', and
1060  * also updates the memory address in the firmware to reference the new
1061  * target buffer.
1062  */
1063 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1064 {
1065         struct iwl_rx_queue *rxq = &priv->rxq;
1066         struct list_head *element;
1067         struct iwl_rx_mem_buffer *rxb;
1068         unsigned long flags;
1069         int write;
1070
1071         spin_lock_irqsave(&rxq->lock, flags);
1072         write = rxq->write & ~0x7;
1073         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1074                 /* Get next free Rx buffer, remove from free list */
1075                 element = rxq->rx_free.next;
1076                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1077                 list_del(element);
1078
1079                 /* Point to Rx buffer via next RBD in circular buffer */
1080                 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1081                 rxq->queue[rxq->write] = rxb;
1082                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1083                 rxq->free_count--;
1084         }
1085         spin_unlock_irqrestore(&rxq->lock, flags);
1086         /* If the pre-allocated buffer pool is dropping low, schedule to
1087          * refill it */
1088         if (rxq->free_count <= RX_LOW_WATERMARK)
1089                 queue_work(priv->workqueue, &priv->rx_replenish);
1090
1091
1092         /* If we've added more space for the firmware to place data, tell it.
1093          * Increment device's write pointer in multiples of 8. */
1094         if ((rxq->write_actual != (rxq->write & ~0x7))
1095             || (abs(rxq->write - rxq->read) > 7)) {
1096                 spin_lock_irqsave(&rxq->lock, flags);
1097                 rxq->need_update = 1;
1098                 spin_unlock_irqrestore(&rxq->lock, flags);
1099                 iwl_rx_queue_update_write_ptr(priv, rxq);
1100         }
1101 }
1102
1103 /**
1104  * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1105  *
1106  * When moving to rx_free an SKB is allocated for the slot.
1107  *
1108  * Also restock the Rx queue via iwl3945_rx_queue_restock.
1109  * This is called as a scheduled work item (except for during initialization)
1110  */
1111 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1112 {
1113         struct iwl_rx_queue *rxq = &priv->rxq;
1114         struct list_head *element;
1115         struct iwl_rx_mem_buffer *rxb;
1116         struct page *page;
1117         unsigned long flags;
1118         gfp_t gfp_mask = priority;
1119
1120         while (1) {
1121                 spin_lock_irqsave(&rxq->lock, flags);
1122
1123                 if (list_empty(&rxq->rx_used)) {
1124                         spin_unlock_irqrestore(&rxq->lock, flags);
1125                         return;
1126                 }
1127                 spin_unlock_irqrestore(&rxq->lock, flags);
1128
1129                 if (rxq->free_count > RX_LOW_WATERMARK)
1130                         gfp_mask |= __GFP_NOWARN;
1131
1132                 if (priv->hw_params.rx_page_order > 0)
1133                         gfp_mask |= __GFP_COMP;
1134
1135                 /* Alloc a new receive buffer */
1136                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1137                 if (!page) {
1138                         if (net_ratelimit())
1139                                 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1140                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1141                             net_ratelimit())
1142                                 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1143                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
1144                                          rxq->free_count);
1145                         /* We don't reschedule replenish work here -- we will
1146                          * call the restock method and if it still needs
1147                          * more buffers it will schedule replenish */
1148                         break;
1149                 }
1150
1151                 spin_lock_irqsave(&rxq->lock, flags);
1152                 if (list_empty(&rxq->rx_used)) {
1153                         spin_unlock_irqrestore(&rxq->lock, flags);
1154                         __free_pages(page, priv->hw_params.rx_page_order);
1155                         return;
1156                 }
1157                 element = rxq->rx_used.next;
1158                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1159                 list_del(element);
1160                 spin_unlock_irqrestore(&rxq->lock, flags);
1161
1162                 rxb->page = page;
1163                 /* Get physical address of RB/SKB */
1164                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1165                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1166                                 PCI_DMA_FROMDEVICE);
1167
1168                 spin_lock_irqsave(&rxq->lock, flags);
1169
1170                 list_add_tail(&rxb->list, &rxq->rx_free);
1171                 rxq->free_count++;
1172                 priv->alloc_rxb_page++;
1173
1174                 spin_unlock_irqrestore(&rxq->lock, flags);
1175         }
1176 }
1177
1178 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1179 {
1180         unsigned long flags;
1181         int i;
1182         spin_lock_irqsave(&rxq->lock, flags);
1183         INIT_LIST_HEAD(&rxq->rx_free);
1184         INIT_LIST_HEAD(&rxq->rx_used);
1185         /* Fill the rx_used queue with _all_ of the Rx buffers */
1186         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1187                 /* In the reset function, these buffers may have been allocated
1188                  * to an SKB, so we need to unmap and free potential storage */
1189                 if (rxq->pool[i].page != NULL) {
1190                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1191                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1192                                 PCI_DMA_FROMDEVICE);
1193                         __iwl_free_pages(priv, rxq->pool[i].page);
1194                         rxq->pool[i].page = NULL;
1195                 }
1196                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1197         }
1198
1199         /* Set us so that we have processed and used all buffers, but have
1200          * not restocked the Rx queue with fresh buffers */
1201         rxq->read = rxq->write = 0;
1202         rxq->write_actual = 0;
1203         rxq->free_count = 0;
1204         spin_unlock_irqrestore(&rxq->lock, flags);
1205 }
1206
1207 void iwl3945_rx_replenish(void *data)
1208 {
1209         struct iwl_priv *priv = data;
1210         unsigned long flags;
1211
1212         iwl3945_rx_allocate(priv, GFP_KERNEL);
1213
1214         spin_lock_irqsave(&priv->lock, flags);
1215         iwl3945_rx_queue_restock(priv);
1216         spin_unlock_irqrestore(&priv->lock, flags);
1217 }
1218
1219 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1220 {
1221         iwl3945_rx_allocate(priv, GFP_ATOMIC);
1222
1223         iwl3945_rx_queue_restock(priv);
1224 }
1225
1226
1227 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1228  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1229  * This free routine walks the list of POOL entries and if SKB is set to
1230  * non NULL it is unmapped and freed
1231  */
1232 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1233 {
1234         int i;
1235         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1236                 if (rxq->pool[i].page != NULL) {
1237                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1238                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1239                                 PCI_DMA_FROMDEVICE);
1240                         __iwl_free_pages(priv, rxq->pool[i].page);
1241                         rxq->pool[i].page = NULL;
1242                 }
1243         }
1244
1245         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1246                           rxq->dma_addr);
1247         dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1248                           rxq->rb_stts, rxq->rb_stts_dma);
1249         rxq->bd = NULL;
1250         rxq->rb_stts  = NULL;
1251 }
1252
1253
1254 /* Convert linear signal-to-noise ratio into dB */
1255 static u8 ratio2dB[100] = {
1256 /*       0   1   2   3   4   5   6   7   8   9 */
1257          0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1258         20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1259         26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1260         29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1261         32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1262         34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1263         36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1264         37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1265         38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1266         39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
1267 };
1268
1269 /* Calculates a relative dB value from a ratio of linear
1270  *   (i.e. not dB) signal levels.
1271  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1272 int iwl3945_calc_db_from_ratio(int sig_ratio)
1273 {
1274         /* 1000:1 or higher just report as 60 dB */
1275         if (sig_ratio >= 1000)
1276                 return 60;
1277
1278         /* 100:1 or higher, divide by 10 and use table,
1279          *   add 20 dB to make up for divide by 10 */
1280         if (sig_ratio >= 100)
1281                 return 20 + (int)ratio2dB[sig_ratio/10];
1282
1283         /* We shouldn't see this */
1284         if (sig_ratio < 1)
1285                 return 0;
1286
1287         /* Use table for ratios 1:1 - 99:1 */
1288         return (int)ratio2dB[sig_ratio];
1289 }
1290
1291 /**
1292  * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1293  *
1294  * Uses the priv->rx_handlers callback function array to invoke
1295  * the appropriate handlers, including command responses,
1296  * frame-received notifications, and other notifications.
1297  */
1298 static void iwl3945_rx_handle(struct iwl_priv *priv)
1299 {
1300         struct iwl_rx_mem_buffer *rxb;
1301         struct iwl_rx_packet *pkt;
1302         struct iwl_rx_queue *rxq = &priv->rxq;
1303         u32 r, i;
1304         int reclaim;
1305         unsigned long flags;
1306         u8 fill_rx = 0;
1307         u32 count = 8;
1308         int total_empty = 0;
1309
1310         /* uCode's read index (stored in shared DRAM) indicates the last Rx
1311          * buffer that the driver may process (last buffer filled by ucode). */
1312         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1313         i = rxq->read;
1314
1315         /* calculate total frames need to be restock after handling RX */
1316         total_empty = r - rxq->write_actual;
1317         if (total_empty < 0)
1318                 total_empty += RX_QUEUE_SIZE;
1319
1320         if (total_empty > (RX_QUEUE_SIZE / 2))
1321                 fill_rx = 1;
1322         /* Rx interrupt, but nothing sent from uCode */
1323         if (i == r)
1324                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1325
1326         while (i != r) {
1327                 rxb = rxq->queue[i];
1328
1329                 /* If an RXB doesn't have a Rx queue slot associated with it,
1330                  * then a bug has been introduced in the queue refilling
1331                  * routines -- catch it here */
1332                 BUG_ON(rxb == NULL);
1333
1334                 rxq->queue[i] = NULL;
1335
1336                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1337                                PAGE_SIZE << priv->hw_params.rx_page_order,
1338                                PCI_DMA_FROMDEVICE);
1339                 pkt = rxb_addr(rxb);
1340
1341                 trace_iwlwifi_dev_rx(priv, pkt,
1342                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
1343
1344                 /* Reclaim a command buffer only if this packet is a response
1345                  *   to a (driver-originated) command.
1346                  * If the packet (e.g. Rx frame) originated from uCode,
1347                  *   there is no command buffer to reclaim.
1348                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1349                  *   but apparently a few don't get set; catch them here. */
1350                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1351                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1352                         (pkt->hdr.cmd != REPLY_TX);
1353
1354                 /* Based on type of command response or notification,
1355                  *   handle those that need handling via function in
1356                  *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
1357                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1358                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1359                                 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1360                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1361                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1362                 } else {
1363                         /* No handling needed */
1364                         IWL_DEBUG_RX(priv,
1365                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1366                                 r, i, get_cmd_string(pkt->hdr.cmd),
1367                                 pkt->hdr.cmd);
1368                 }
1369
1370                 /*
1371                  * XXX: After here, we should always check rxb->page
1372                  * against NULL before touching it or its virtual
1373                  * memory (pkt). Because some rx_handler might have
1374                  * already taken or freed the pages.
1375                  */
1376
1377                 if (reclaim) {
1378                         /* Invoke any callbacks, transfer the buffer to caller,
1379                          * and fire off the (possibly) blocking iwl_send_cmd()
1380                          * as we reclaim the driver command queue */
1381                         if (rxb->page)
1382                                 iwl_tx_cmd_complete(priv, rxb);
1383                         else
1384                                 IWL_WARN(priv, "Claim null rxb?\n");
1385                 }
1386
1387                 /* Reuse the page if possible. For notification packets and
1388                  * SKBs that fail to Rx correctly, add them back into the
1389                  * rx_free list for reuse later. */
1390                 spin_lock_irqsave(&rxq->lock, flags);
1391                 if (rxb->page != NULL) {
1392                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1393                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1394                                 PCI_DMA_FROMDEVICE);
1395                         list_add_tail(&rxb->list, &rxq->rx_free);
1396                         rxq->free_count++;
1397                 } else
1398                         list_add_tail(&rxb->list, &rxq->rx_used);
1399
1400                 spin_unlock_irqrestore(&rxq->lock, flags);
1401
1402                 i = (i + 1) & RX_QUEUE_MASK;
1403                 /* If there are a lot of unused frames,
1404                  * restock the Rx queue so ucode won't assert. */
1405                 if (fill_rx) {
1406                         count++;
1407                         if (count >= 8) {
1408                                 rxq->read = i;
1409                                 iwl3945_rx_replenish_now(priv);
1410                                 count = 0;
1411                         }
1412                 }
1413         }
1414
1415         /* Backtrack one entry */
1416         rxq->read = i;
1417         if (fill_rx)
1418                 iwl3945_rx_replenish_now(priv);
1419         else
1420                 iwl3945_rx_queue_restock(priv);
1421 }
1422
1423 /* call this function to flush any scheduled tasklet */
1424 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1425 {
1426         /* wait to make sure we flush pending tasklet*/
1427         synchronize_irq(priv->pci_dev->irq);
1428         tasklet_kill(&priv->irq_tasklet);
1429 }
1430
1431 static const char *desc_lookup(int i)
1432 {
1433         switch (i) {
1434         case 1:
1435                 return "FAIL";
1436         case 2:
1437                 return "BAD_PARAM";
1438         case 3:
1439                 return "BAD_CHECKSUM";
1440         case 4:
1441                 return "NMI_INTERRUPT";
1442         case 5:
1443                 return "SYSASSERT";
1444         case 6:
1445                 return "FATAL_ERROR";
1446         }
1447
1448         return "UNKNOWN";
1449 }
1450
1451 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1452 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1453
1454 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1455 {
1456         u32 i;
1457         u32 desc, time, count, base, data1;
1458         u32 blink1, blink2, ilink1, ilink2;
1459
1460         base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1461
1462         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1463                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1464                 return;
1465         }
1466
1467
1468         count = iwl_read_targ_mem(priv, base);
1469
1470         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1471                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1472                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1473                         priv->status, count);
1474         }
1475
1476         IWL_ERR(priv, "Desc       Time       asrtPC  blink2 "
1477                   "ilink1  nmiPC   Line\n");
1478         for (i = ERROR_START_OFFSET;
1479              i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1480              i += ERROR_ELEM_SIZE) {
1481                 desc = iwl_read_targ_mem(priv, base + i);
1482                 time =
1483                     iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1484                 blink1 =
1485                     iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1486                 blink2 =
1487                     iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1488                 ilink1 =
1489                     iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1490                 ilink2 =
1491                     iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1492                 data1 =
1493                     iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1494
1495                 IWL_ERR(priv,
1496                         "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1497                         desc_lookup(desc), desc, time, blink1, blink2,
1498                         ilink1, ilink2, data1);
1499                 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1500                                         0, blink1, blink2, ilink1, ilink2);
1501         }
1502 }
1503
1504 #define EVENT_START_OFFSET  (6 * sizeof(u32))
1505
1506 /**
1507  * iwl3945_print_event_log - Dump error event log to syslog
1508  *
1509  */
1510 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1511                                   u32 num_events, u32 mode,
1512                                   int pos, char **buf, size_t bufsz)
1513 {
1514         u32 i;
1515         u32 base;       /* SRAM byte address of event log header */
1516         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1517         u32 ptr;        /* SRAM byte address of log data */
1518         u32 ev, time, data; /* event log data */
1519         unsigned long reg_flags;
1520
1521         if (num_events == 0)
1522                 return pos;
1523
1524         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1525
1526         if (mode == 0)
1527                 event_size = 2 * sizeof(u32);
1528         else
1529                 event_size = 3 * sizeof(u32);
1530
1531         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1532
1533         /* Make sure device is powered up for SRAM reads */
1534         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1535         iwl_grab_nic_access(priv);
1536
1537         /* Set starting address; reads will auto-increment */
1538         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1539         rmb();
1540
1541         /* "time" is actually "data" for mode 0 (no timestamp).
1542          * place event id # at far right for easier visual parsing. */
1543         for (i = 0; i < num_events; i++) {
1544                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1545                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1546                 if (mode == 0) {
1547                         /* data, ev */
1548                         if (bufsz) {
1549                                 pos += scnprintf(*buf + pos, bufsz - pos,
1550                                                 "0x%08x:%04u\n",
1551                                                 time, ev);
1552                         } else {
1553                                 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1554                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1555                                                               time, ev);
1556                         }
1557                 } else {
1558                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1559                         if (bufsz) {
1560                                 pos += scnprintf(*buf + pos, bufsz - pos,
1561                                                 "%010u:0x%08x:%04u\n",
1562                                                  time, data, ev);
1563                         } else {
1564                                 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1565                                         time, data, ev);
1566                                 trace_iwlwifi_dev_ucode_event(priv, time,
1567                                                               data, ev);
1568                         }
1569                 }
1570         }
1571
1572         /* Allow device to power down */
1573         iwl_release_nic_access(priv);
1574         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1575         return pos;
1576 }
1577
1578 /**
1579  * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1580  */
1581 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1582                                       u32 num_wraps, u32 next_entry,
1583                                       u32 size, u32 mode,
1584                                       int pos, char **buf, size_t bufsz)
1585 {
1586         /*
1587          * display the newest DEFAULT_LOG_ENTRIES entries
1588          * i.e the entries just before the next ont that uCode would fill.
1589          */
1590         if (num_wraps) {
1591                 if (next_entry < size) {
1592                         pos = iwl3945_print_event_log(priv,
1593                                              capacity - (size - next_entry),
1594                                              size - next_entry, mode,
1595                                              pos, buf, bufsz);
1596                         pos = iwl3945_print_event_log(priv, 0,
1597                                                       next_entry, mode,
1598                                                       pos, buf, bufsz);
1599                 } else
1600                         pos = iwl3945_print_event_log(priv, next_entry - size,
1601                                                       size, mode,
1602                                                       pos, buf, bufsz);
1603         } else {
1604                 if (next_entry < size)
1605                         pos = iwl3945_print_event_log(priv, 0,
1606                                                       next_entry, mode,
1607                                                       pos, buf, bufsz);
1608                 else
1609                         pos = iwl3945_print_event_log(priv, next_entry - size,
1610                                                       size, mode,
1611                                                       pos, buf, bufsz);
1612         }
1613         return pos;
1614 }
1615
1616 /* For sanity check only.  Actual size is determined by uCode, typ. 512 */
1617 #define IWL3945_MAX_EVENT_LOG_SIZE (512)
1618
1619 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1620
1621 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1622                             char **buf, bool display)
1623 {
1624         u32 base;       /* SRAM byte address of event log header */
1625         u32 capacity;   /* event log capacity in # entries */
1626         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1627         u32 num_wraps;  /* # times uCode wrapped to top of log */
1628         u32 next_entry; /* index of next entry to be written by uCode */
1629         u32 size;       /* # entries that we'll print */
1630         int pos = 0;
1631         size_t bufsz = 0;
1632
1633         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1634         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1635                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1636                 return  -EINVAL;
1637         }
1638
1639         /* event log header */
1640         capacity = iwl_read_targ_mem(priv, base);
1641         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1642         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1643         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1644
1645         if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
1646                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1647                         capacity, IWL3945_MAX_EVENT_LOG_SIZE);
1648                 capacity = IWL3945_MAX_EVENT_LOG_SIZE;
1649         }
1650
1651         if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
1652                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1653                         next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
1654                 next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
1655         }
1656
1657         size = num_wraps ? capacity : next_entry;
1658
1659         /* bail out if nothing in log */
1660         if (size == 0) {
1661                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1662                 return pos;
1663         }
1664
1665 #ifdef CONFIG_IWLWIFI_DEBUG
1666         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1667                 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1668                         ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1669 #else
1670         size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1671                 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1672 #endif
1673
1674         IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1675                   size);
1676
1677 #ifdef CONFIG_IWLWIFI_DEBUG
1678         if (display) {
1679                 if (full_log)
1680                         bufsz = capacity * 48;
1681                 else
1682                         bufsz = size * 48;
1683                 *buf = kmalloc(bufsz, GFP_KERNEL);
1684                 if (!*buf)
1685                         return -ENOMEM;
1686         }
1687         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1688                 /* if uCode has wrapped back to top of log,
1689                  * start at the oldest entry,
1690                  * i.e the next one that uCode would fill.
1691                  */
1692                 if (num_wraps)
1693                         pos = iwl3945_print_event_log(priv, next_entry,
1694                                                 capacity - next_entry, mode,
1695                                                 pos, buf, bufsz);
1696
1697                 /* (then/else) start at top of log */
1698                 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1699                                               pos, buf, bufsz);
1700         } else
1701                 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1702                                                     next_entry, size, mode,
1703                                                     pos, buf, bufsz);
1704 #else
1705         pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1706                                             next_entry, size, mode,
1707                                             pos, buf, bufsz);
1708 #endif
1709         return pos;
1710 }
1711
1712 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1713 {
1714         u32 inta, handled = 0;
1715         u32 inta_fh;
1716         unsigned long flags;
1717 #ifdef CONFIG_IWLWIFI_DEBUG
1718         u32 inta_mask;
1719 #endif
1720
1721         spin_lock_irqsave(&priv->lock, flags);
1722
1723         /* Ack/clear/reset pending uCode interrupts.
1724          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1725          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1726         inta = iwl_read32(priv, CSR_INT);
1727         iwl_write32(priv, CSR_INT, inta);
1728
1729         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1730          * Any new interrupts that happen after this, either while we're
1731          * in this tasklet, or later, will show up in next ISR/tasklet. */
1732         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1733         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1734
1735 #ifdef CONFIG_IWLWIFI_DEBUG
1736         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1737                 /* just for debug */
1738                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1739                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1740                               inta, inta_mask, inta_fh);
1741         }
1742 #endif
1743
1744         spin_unlock_irqrestore(&priv->lock, flags);
1745
1746         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1747          * atomic, make sure that inta covers all the interrupts that
1748          * we've discovered, even if FH interrupt came in just after
1749          * reading CSR_INT. */
1750         if (inta_fh & CSR39_FH_INT_RX_MASK)
1751                 inta |= CSR_INT_BIT_FH_RX;
1752         if (inta_fh & CSR39_FH_INT_TX_MASK)
1753                 inta |= CSR_INT_BIT_FH_TX;
1754
1755         /* Now service all interrupt bits discovered above. */
1756         if (inta & CSR_INT_BIT_HW_ERR) {
1757                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1758
1759                 /* Tell the device to stop sending interrupts */
1760                 iwl_disable_interrupts(priv);
1761
1762                 priv->isr_stats.hw++;
1763                 iwl_irq_handle_error(priv);
1764
1765                 handled |= CSR_INT_BIT_HW_ERR;
1766
1767                 return;
1768         }
1769
1770 #ifdef CONFIG_IWLWIFI_DEBUG
1771         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1772                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1773                 if (inta & CSR_INT_BIT_SCD) {
1774                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1775                                       "the frame/frames.\n");
1776                         priv->isr_stats.sch++;
1777                 }
1778
1779                 /* Alive notification via Rx interrupt will do the real work */
1780                 if (inta & CSR_INT_BIT_ALIVE) {
1781                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1782                         priv->isr_stats.alive++;
1783                 }
1784         }
1785 #endif
1786         /* Safely ignore these bits for debug checks below */
1787         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1788
1789         /* Error detected by uCode */
1790         if (inta & CSR_INT_BIT_SW_ERR) {
1791                 IWL_ERR(priv, "Microcode SW error detected. "
1792                         "Restarting 0x%X.\n", inta);
1793                 priv->isr_stats.sw++;
1794                 priv->isr_stats.sw_err = inta;
1795                 iwl_irq_handle_error(priv);
1796                 handled |= CSR_INT_BIT_SW_ERR;
1797         }
1798
1799         /* uCode wakes up after power-down sleep */
1800         if (inta & CSR_INT_BIT_WAKEUP) {
1801                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1802                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1803                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1804                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1805                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1806                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1807                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1808                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1809
1810                 priv->isr_stats.wakeup++;
1811                 handled |= CSR_INT_BIT_WAKEUP;
1812         }
1813
1814         /* All uCode command responses, including Tx command responses,
1815          * Rx "responses" (frame-received notification), and other
1816          * notifications from uCode come through here*/
1817         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1818                 iwl3945_rx_handle(priv);
1819                 priv->isr_stats.rx++;
1820                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1821         }
1822
1823         if (inta & CSR_INT_BIT_FH_TX) {
1824                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1825                 priv->isr_stats.tx++;
1826
1827                 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1828                 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1829                                         (FH39_SRVC_CHNL), 0x0);
1830                 handled |= CSR_INT_BIT_FH_TX;
1831         }
1832
1833         if (inta & ~handled) {
1834                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1835                 priv->isr_stats.unhandled++;
1836         }
1837
1838         if (inta & ~priv->inta_mask) {
1839                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1840                          inta & ~priv->inta_mask);
1841                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1842         }
1843
1844         /* Re-enable all interrupts */
1845         /* only Re-enable if disabled by irq */
1846         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1847                 iwl_enable_interrupts(priv);
1848
1849 #ifdef CONFIG_IWLWIFI_DEBUG
1850         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1851                 inta = iwl_read32(priv, CSR_INT);
1852                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1853                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1854                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1855                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1856         }
1857 #endif
1858 }
1859
1860 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1861                                          enum ieee80211_band band,
1862                                      u8 is_active, u8 n_probes,
1863                                      struct iwl3945_scan_channel *scan_ch)
1864 {
1865         struct ieee80211_channel *chan;
1866         const struct ieee80211_supported_band *sband;
1867         const struct iwl_channel_info *ch_info;
1868         u16 passive_dwell = 0;
1869         u16 active_dwell = 0;
1870         int added, i;
1871
1872         sband = iwl_get_hw_mode(priv, band);
1873         if (!sband)
1874                 return 0;
1875
1876         active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1877         passive_dwell = iwl_get_passive_dwell_time(priv, band);
1878
1879         if (passive_dwell <= active_dwell)
1880                 passive_dwell = active_dwell + 1;
1881
1882         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1883                 chan = priv->scan_request->channels[i];
1884
1885                 if (chan->band != band)
1886                         continue;
1887
1888                 scan_ch->channel = chan->hw_value;
1889
1890                 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1891                 if (!is_channel_valid(ch_info)) {
1892                         IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1893                                        scan_ch->channel);
1894                         continue;
1895                 }
1896
1897                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1898                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1899                 /* If passive , set up for auto-switch
1900                  *  and use long active_dwell time.
1901                  */
1902                 if (!is_active || is_channel_passive(ch_info) ||
1903                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1904                         scan_ch->type = 0;      /* passive */
1905                         if (IWL_UCODE_API(priv->ucode_ver) == 1)
1906                                 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1907                 } else {
1908                         scan_ch->type = 1;      /* active */
1909                 }
1910
1911                 /* Set direct probe bits. These may be used both for active
1912                  * scan channels (probes gets sent right away),
1913                  * or for passive channels (probes get se sent only after
1914                  * hearing clear Rx packet).*/
1915                 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1916                         if (n_probes)
1917                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1918                 } else {
1919                         /* uCode v1 does not allow setting direct probe bits on
1920                          * passive channel. */
1921                         if ((scan_ch->type & 1) && n_probes)
1922                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1923                 }
1924
1925                 /* Set txpower levels to defaults */
1926                 scan_ch->tpc.dsp_atten = 110;
1927                 /* scan_pwr_info->tpc.dsp_atten; */
1928
1929                 /*scan_pwr_info->tpc.tx_gain; */
1930                 if (band == IEEE80211_BAND_5GHZ)
1931                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1932                 else {
1933                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1934                         /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1935                          * power level:
1936                          * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1937                          */
1938                 }
1939
1940                 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1941                                scan_ch->channel,
1942                                (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1943                                (scan_ch->type & 1) ?
1944                                active_dwell : passive_dwell);
1945
1946                 scan_ch++;
1947                 added++;
1948         }
1949
1950         IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
1951         return added;
1952 }
1953
1954 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1955                               struct ieee80211_rate *rates)
1956 {
1957         int i;
1958
1959         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1960                 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1961                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1962                 rates[i].hw_value_short = i;
1963                 rates[i].flags = 0;
1964                 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1965                         /*
1966                          * If CCK != 1M then set short preamble rate flag.
1967                          */
1968                         rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1969                                 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1970                 }
1971         }
1972 }
1973
1974 /******************************************************************************
1975  *
1976  * uCode download functions
1977  *
1978  ******************************************************************************/
1979
1980 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1981 {
1982         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1983         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1984         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1985         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1986         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1987         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1988 }
1989
1990 /**
1991  * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1992  *     looking at all data.
1993  */
1994 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1995 {
1996         u32 val;
1997         u32 save_len = len;
1998         int rc = 0;
1999         u32 errcnt;
2000
2001         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2002
2003         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2004                                IWL39_RTC_INST_LOWER_BOUND);
2005
2006         errcnt = 0;
2007         for (; len > 0; len -= sizeof(u32), image++) {
2008                 /* read data comes through single port, auto-incr addr */
2009                 /* NOTE: Use the debugless read so we don't flood kernel log
2010                  * if IWL_DL_IO is set */
2011                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2012                 if (val != le32_to_cpu(*image)) {
2013                         IWL_ERR(priv, "uCode INST section is invalid at "
2014                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2015                                   save_len - len, val, le32_to_cpu(*image));
2016                         rc = -EIO;
2017                         errcnt++;
2018                         if (errcnt >= 20)
2019                                 break;
2020                 }
2021         }
2022
2023
2024         if (!errcnt)
2025                 IWL_DEBUG_INFO(priv,
2026                         "ucode image in INSTRUCTION memory is good\n");
2027
2028         return rc;
2029 }
2030
2031
2032 /**
2033  * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2034  *   using sample data 100 bytes apart.  If these sample points are good,
2035  *   it's a pretty good bet that everything between them is good, too.
2036  */
2037 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2038 {
2039         u32 val;
2040         int rc = 0;
2041         u32 errcnt = 0;
2042         u32 i;
2043
2044         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2045
2046         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2047                 /* read data comes through single port, auto-incr addr */
2048                 /* NOTE: Use the debugless read so we don't flood kernel log
2049                  * if IWL_DL_IO is set */
2050                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2051                         i + IWL39_RTC_INST_LOWER_BOUND);
2052                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2053                 if (val != le32_to_cpu(*image)) {
2054 #if 0 /* Enable this if you want to see details */
2055                         IWL_ERR(priv, "uCode INST section is invalid at "
2056                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2057                                   i, val, *image);
2058 #endif
2059                         rc = -EIO;
2060                         errcnt++;
2061                         if (errcnt >= 3)
2062                                 break;
2063                 }
2064         }
2065
2066         return rc;
2067 }
2068
2069
2070 /**
2071  * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2072  *    and verify its contents
2073  */
2074 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2075 {
2076         __le32 *image;
2077         u32 len;
2078         int rc = 0;
2079
2080         /* Try bootstrap */
2081         image = (__le32 *)priv->ucode_boot.v_addr;
2082         len = priv->ucode_boot.len;
2083         rc = iwl3945_verify_inst_sparse(priv, image, len);
2084         if (rc == 0) {
2085                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2086                 return 0;
2087         }
2088
2089         /* Try initialize */
2090         image = (__le32 *)priv->ucode_init.v_addr;
2091         len = priv->ucode_init.len;
2092         rc = iwl3945_verify_inst_sparse(priv, image, len);
2093         if (rc == 0) {
2094                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2095                 return 0;
2096         }
2097
2098         /* Try runtime/protocol */
2099         image = (__le32 *)priv->ucode_code.v_addr;
2100         len = priv->ucode_code.len;
2101         rc = iwl3945_verify_inst_sparse(priv, image, len);
2102         if (rc == 0) {
2103                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2104                 return 0;
2105         }
2106
2107         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2108
2109         /* Since nothing seems to match, show first several data entries in
2110          * instruction SRAM, so maybe visual inspection will give a clue.
2111          * Selection of bootstrap image (vs. other images) is arbitrary. */
2112         image = (__le32 *)priv->ucode_boot.v_addr;
2113         len = priv->ucode_boot.len;
2114         rc = iwl3945_verify_inst_full(priv, image, len);
2115
2116         return rc;
2117 }
2118
2119 static void iwl3945_nic_start(struct iwl_priv *priv)
2120 {
2121         /* Remove all resets to allow NIC to operate */
2122         iwl_write32(priv, CSR_RESET, 0);
2123 }
2124
2125 /**
2126  * iwl3945_read_ucode - Read uCode images from disk file.
2127  *
2128  * Copy into buffers for card to fetch via bus-mastering
2129  */
2130 static int iwl3945_read_ucode(struct iwl_priv *priv)
2131 {
2132         const struct iwl_ucode_header *ucode;
2133         int ret = -EINVAL, index;
2134         const struct firmware *ucode_raw;
2135         /* firmware file name contains uCode/driver compatibility version */
2136         const char *name_pre = priv->cfg->fw_name_pre;
2137         const unsigned int api_max = priv->cfg->ucode_api_max;
2138         const unsigned int api_min = priv->cfg->ucode_api_min;
2139         char buf[25];
2140         u8 *src;
2141         size_t len;
2142         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2143
2144         /* Ask kernel firmware_class module to get the boot firmware off disk.
2145          * request_firmware() is synchronous, file is in memory on return. */
2146         for (index = api_max; index >= api_min; index--) {
2147                 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2148                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2149                 if (ret < 0) {
2150                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
2151                                   buf, ret);
2152                         if (ret == -ENOENT)
2153                                 continue;
2154                         else
2155                                 goto error;
2156                 } else {
2157                         if (index < api_max)
2158                                 IWL_ERR(priv, "Loaded firmware %s, "
2159                                         "which is deprecated. "
2160                                         " Please use API v%u instead.\n",
2161                                           buf, api_max);
2162                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2163                                        "(%zd bytes) from disk\n",
2164                                        buf, ucode_raw->size);
2165                         break;
2166                 }
2167         }
2168
2169         if (ret < 0)
2170                 goto error;
2171
2172         /* Make sure that we got at least our header! */
2173         if (ucode_raw->size <  priv->cfg->ops->ucode->get_header_size(1)) {
2174                 IWL_ERR(priv, "File size way too small!\n");
2175                 ret = -EINVAL;
2176                 goto err_release;
2177         }
2178
2179         /* Data from ucode file:  header followed by uCode images */
2180         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2181
2182         priv->ucode_ver = le32_to_cpu(ucode->ver);
2183         api_ver = IWL_UCODE_API(priv->ucode_ver);
2184         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2185         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2186         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2187         init_data_size =
2188                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2189         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2190         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
2191
2192         /* api_ver should match the api version forming part of the
2193          * firmware filename ... but we don't check for that and only rely
2194          * on the API version read from firmware header from here on forward */
2195
2196         if (api_ver < api_min || api_ver > api_max) {
2197                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2198                           "Driver supports v%u, firmware is v%u.\n",
2199                           api_max, api_ver);
2200                 priv->ucode_ver = 0;
2201                 ret = -EINVAL;
2202                 goto err_release;
2203         }
2204         if (api_ver != api_max)
2205                 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2206                           "got %u. New firmware can be obtained "
2207                           "from http://www.intellinuxwireless.org.\n",
2208                           api_max, api_ver);
2209
2210         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2211                 IWL_UCODE_MAJOR(priv->ucode_ver),
2212                 IWL_UCODE_MINOR(priv->ucode_ver),
2213                 IWL_UCODE_API(priv->ucode_ver),
2214                 IWL_UCODE_SERIAL(priv->ucode_ver));
2215
2216         snprintf(priv->hw->wiphy->fw_version,
2217                  sizeof(priv->hw->wiphy->fw_version),
2218                  "%u.%u.%u.%u",
2219                  IWL_UCODE_MAJOR(priv->ucode_ver),
2220                  IWL_UCODE_MINOR(priv->ucode_ver),
2221                  IWL_UCODE_API(priv->ucode_ver),
2222                  IWL_UCODE_SERIAL(priv->ucode_ver));
2223
2224         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2225                        priv->ucode_ver);
2226         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2227                        inst_size);
2228         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2229                        data_size);
2230         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2231                        init_size);
2232         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2233                        init_data_size);
2234         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2235                        boot_size);
2236
2237
2238         /* Verify size of file vs. image size info in file's header */
2239         if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
2240                 inst_size + data_size + init_size +
2241                 init_data_size + boot_size) {
2242
2243                 IWL_DEBUG_INFO(priv,
2244                         "uCode file size %zd does not match expected size\n",
2245                         ucode_raw->size);
2246                 ret = -EINVAL;
2247                 goto err_release;
2248         }
2249
2250         /* Verify that uCode images will fit in card's SRAM */
2251         if (inst_size > IWL39_MAX_INST_SIZE) {
2252                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2253                                inst_size);
2254                 ret = -EINVAL;
2255                 goto err_release;
2256         }
2257
2258         if (data_size > IWL39_MAX_DATA_SIZE) {
2259                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2260                                data_size);
2261                 ret = -EINVAL;
2262                 goto err_release;
2263         }
2264         if (init_size > IWL39_MAX_INST_SIZE) {
2265                 IWL_DEBUG_INFO(priv,
2266                                 "uCode init instr len %d too large to fit in\n",
2267                                 init_size);
2268                 ret = -EINVAL;
2269                 goto err_release;
2270         }
2271         if (init_data_size > IWL39_MAX_DATA_SIZE) {
2272                 IWL_DEBUG_INFO(priv,
2273                                 "uCode init data len %d too large to fit in\n",
2274                                 init_data_size);
2275                 ret = -EINVAL;
2276                 goto err_release;
2277         }
2278         if (boot_size > IWL39_MAX_BSM_SIZE) {
2279                 IWL_DEBUG_INFO(priv,
2280                                 "uCode boot instr len %d too large to fit in\n",
2281                                 boot_size);
2282                 ret = -EINVAL;
2283                 goto err_release;
2284         }
2285
2286         /* Allocate ucode buffers for card's bus-master loading ... */
2287
2288         /* Runtime instructions and 2 copies of data:
2289          * 1) unmodified from disk
2290          * 2) backup cache for save/restore during power-downs */
2291         priv->ucode_code.len = inst_size;
2292         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2293
2294         priv->ucode_data.len = data_size;
2295         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2296
2297         priv->ucode_data_backup.len = data_size;
2298         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2299
2300         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2301             !priv->ucode_data_backup.v_addr)
2302                 goto err_pci_alloc;
2303
2304         /* Initialization instructions and data */
2305         if (init_size && init_data_size) {
2306                 priv->ucode_init.len = init_size;
2307                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2308
2309                 priv->ucode_init_data.len = init_data_size;
2310                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2311
2312                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2313                         goto err_pci_alloc;
2314         }
2315
2316         /* Bootstrap (instructions only, no data) */
2317         if (boot_size) {
2318                 priv->ucode_boot.len = boot_size;
2319                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2320
2321                 if (!priv->ucode_boot.v_addr)
2322                         goto err_pci_alloc;
2323         }
2324
2325         /* Copy images into buffers for card's bus-master reads ... */
2326
2327         /* Runtime instructions (first block of data in file) */
2328         len = inst_size;
2329         IWL_DEBUG_INFO(priv,
2330                 "Copying (but not loading) uCode instr len %zd\n", len);
2331         memcpy(priv->ucode_code.v_addr, src, len);
2332         src += len;
2333
2334         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2335                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2336
2337         /* Runtime data (2nd block)
2338          * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
2339         len = data_size;
2340         IWL_DEBUG_INFO(priv,
2341                 "Copying (but not loading) uCode data len %zd\n", len);
2342         memcpy(priv->ucode_data.v_addr, src, len);
2343         memcpy(priv->ucode_data_backup.v_addr, src, len);
2344         src += len;
2345
2346         /* Initialization instructions (3rd block) */
2347         if (init_size) {
2348                 len = init_size;
2349                 IWL_DEBUG_INFO(priv,
2350                         "Copying (but not loading) init instr len %zd\n", len);
2351                 memcpy(priv->ucode_init.v_addr, src, len);
2352                 src += len;
2353         }
2354
2355         /* Initialization data (4th block) */
2356         if (init_data_size) {
2357                 len = init_data_size;
2358                 IWL_DEBUG_INFO(priv,
2359                         "Copying (but not loading) init data len %zd\n", len);
2360                 memcpy(priv->ucode_init_data.v_addr, src, len);
2361                 src += len;
2362         }
2363
2364         /* Bootstrap instructions (5th block) */
2365         len = boot_size;
2366         IWL_DEBUG_INFO(priv,
2367                 "Copying (but not loading) boot instr len %zd\n", len);
2368         memcpy(priv->ucode_boot.v_addr, src, len);
2369
2370         /* We have our copies now, allow OS release its copies */
2371         release_firmware(ucode_raw);
2372         return 0;
2373
2374  err_pci_alloc:
2375         IWL_ERR(priv, "failed to allocate pci memory\n");
2376         ret = -ENOMEM;
2377         iwl3945_dealloc_ucode_pci(priv);
2378
2379  err_release:
2380         release_firmware(ucode_raw);
2381
2382  error:
2383         return ret;
2384 }
2385
2386
2387 /**
2388  * iwl3945_set_ucode_ptrs - Set uCode address location
2389  *
2390  * Tell initialization uCode where to find runtime uCode.
2391  *
2392  * BSM registers initially contain pointers to initialization uCode.
2393  * We need to replace them to load runtime uCode inst and data,
2394  * and to save runtime data when powering down.
2395  */
2396 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2397 {
2398         dma_addr_t pinst;
2399         dma_addr_t pdata;
2400
2401         /* bits 31:0 for 3945 */
2402         pinst = priv->ucode_code.p_addr;
2403         pdata = priv->ucode_data_backup.p_addr;
2404
2405         /* Tell bootstrap uCode where to find image to load */
2406         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2407         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2408         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2409                                  priv->ucode_data.len);
2410
2411         /* Inst byte count must be last to set up, bit 31 signals uCode
2412          *   that all new ptr/size info is in place */
2413         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2414                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2415
2416         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2417
2418         return 0;
2419 }
2420
2421 /**
2422  * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2423  *
2424  * Called after REPLY_ALIVE notification received from "initialize" uCode.
2425  *
2426  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2427  */
2428 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2429 {
2430         /* Check alive response for "valid" sign from uCode */
2431         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2432                 /* We had an error bringing up the hardware, so take it
2433                  * all the way back down so we can try again */
2434                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2435                 goto restart;
2436         }
2437
2438         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2439          * This is a paranoid check, because we would not have gotten the
2440          * "initialize" alive if code weren't properly loaded.  */
2441         if (iwl3945_verify_ucode(priv)) {
2442                 /* Runtime instruction load was bad;
2443                  * take it all the way back down so we can try again */
2444                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2445                 goto restart;
2446         }
2447
2448         /* Send pointers to protocol/runtime uCode image ... init code will
2449          * load and launch runtime uCode, which will send us another "Alive"
2450          * notification. */
2451         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2452         if (iwl3945_set_ucode_ptrs(priv)) {
2453                 /* Runtime instruction load won't happen;
2454                  * take it all the way back down so we can try again */
2455                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2456                 goto restart;
2457         }
2458         return;
2459
2460  restart:
2461         queue_work(priv->workqueue, &priv->restart);
2462 }
2463
2464 /**
2465  * iwl3945_alive_start - called after REPLY_ALIVE notification received
2466  *                   from protocol/runtime uCode (initialization uCode's
2467  *                   Alive gets handled by iwl3945_init_alive_start()).
2468  */
2469 static void iwl3945_alive_start(struct iwl_priv *priv)
2470 {
2471         int thermal_spin = 0;
2472         u32 rfkill;
2473
2474         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2475
2476         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2477                 /* We had an error bringing up the hardware, so take it
2478                  * all the way back down so we can try again */
2479                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2480                 goto restart;
2481         }
2482
2483         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2484          * This is a paranoid check, because we would not have gotten the
2485          * "runtime" alive if code weren't properly loaded.  */
2486         if (iwl3945_verify_ucode(priv)) {
2487                 /* Runtime instruction load was bad;
2488                  * take it all the way back down so we can try again */
2489                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2490                 goto restart;
2491         }
2492
2493         iwl_clear_stations_table(priv);
2494
2495         rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2496         IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2497
2498         if (rfkill & 0x1) {
2499                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2500                 /* if RFKILL is not on, then wait for thermal
2501                  * sensor in adapter to kick in */
2502                 while (iwl3945_hw_get_temperature(priv) == 0) {
2503                         thermal_spin++;
2504                         udelay(10);
2505                 }
2506
2507                 if (thermal_spin)
2508                         IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2509                                        thermal_spin * 10);
2510         } else
2511                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2512
2513         /* After the ALIVE response, we can send commands to 3945 uCode */
2514         set_bit(STATUS_ALIVE, &priv->status);
2515
2516         if (iwl_is_rfkill(priv))
2517                 return;
2518
2519         ieee80211_wake_queues(priv->hw);
2520
2521         priv->active_rate = priv->rates_mask;
2522         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2523
2524         iwl_power_update_mode(priv, true);
2525
2526         if (iwl_is_associated(priv)) {
2527                 struct iwl3945_rxon_cmd *active_rxon =
2528                                 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2529
2530                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2531                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2532         } else {
2533                 /* Initialize our rx_config data */
2534                 iwl_connection_init_rx_config(priv, priv->iw_mode);
2535         }
2536
2537         /* Configure Bluetooth device coexistence support */
2538         iwl_send_bt_config(priv);
2539
2540         /* Configure the adapter for unassociated operation */
2541         iwlcore_commit_rxon(priv);
2542
2543         iwl3945_reg_txpower_periodic(priv);
2544
2545         iwl_leds_init(priv);
2546
2547         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2548         set_bit(STATUS_READY, &priv->status);
2549         wake_up_interruptible(&priv->wait_command_queue);
2550
2551         /* reassociate for ADHOC mode */
2552         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2553                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2554                                                                 priv->vif);
2555                 if (beacon)
2556                         iwl_mac_beacon_update(priv->hw, beacon);
2557         }
2558
2559         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2560                 iwl_set_mode(priv, priv->iw_mode);
2561
2562         return;
2563
2564  restart:
2565         queue_work(priv->workqueue, &priv->restart);
2566 }
2567
2568 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2569
2570 static void __iwl3945_down(struct iwl_priv *priv)
2571 {
2572         unsigned long flags;
2573         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2574         struct ieee80211_conf *conf = NULL;
2575
2576         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2577
2578         conf = ieee80211_get_hw_conf(priv->hw);
2579
2580         if (!exit_pending)
2581                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2582
2583         iwl_clear_stations_table(priv);
2584
2585         /* Unblock any waiting calls */
2586         wake_up_interruptible_all(&priv->wait_command_queue);
2587
2588         /* Wipe out the EXIT_PENDING status bit if we are not actually
2589          * exiting the module */
2590         if (!exit_pending)
2591                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2592
2593         /* stop and reset the on-board processor */
2594         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2595
2596         /* tell the device to stop sending interrupts */
2597         spin_lock_irqsave(&priv->lock, flags);
2598         iwl_disable_interrupts(priv);
2599         spin_unlock_irqrestore(&priv->lock, flags);
2600         iwl_synchronize_irq(priv);
2601
2602         if (priv->mac80211_registered)
2603                 ieee80211_stop_queues(priv->hw);
2604
2605         /* If we have not previously called iwl3945_init() then
2606          * clear all bits but the RF Kill bits and return */
2607         if (!iwl_is_init(priv)) {
2608                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2609                                         STATUS_RF_KILL_HW |
2610                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2611                                         STATUS_GEO_CONFIGURED |
2612                                 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2613                                         STATUS_EXIT_PENDING;
2614                 goto exit;
2615         }
2616
2617         /* ...otherwise clear out all the status bits but the RF Kill
2618          * bit and continue taking the NIC down. */
2619         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2620                                 STATUS_RF_KILL_HW |
2621                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2622                                 STATUS_GEO_CONFIGURED |
2623                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2624                                 STATUS_FW_ERROR |
2625                         test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2626                                 STATUS_EXIT_PENDING;
2627
2628         iwl3945_hw_txq_ctx_stop(priv);
2629         iwl3945_hw_rxq_stop(priv);
2630
2631         /* Power-down device's busmaster DMA clocks */
2632         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2633         udelay(5);
2634
2635         /* Stop the device, and put it in low power state */
2636         priv->cfg->ops->lib->apm_ops.stop(priv);
2637
2638  exit:
2639         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2640
2641         if (priv->ibss_beacon)
2642                 dev_kfree_skb(priv->ibss_beacon);
2643         priv->ibss_beacon = NULL;
2644
2645         /* clear out any free frames */
2646         iwl3945_clear_free_frames(priv);
2647 }
2648
2649 static void iwl3945_down(struct iwl_priv *priv)
2650 {
2651         mutex_lock(&priv->mutex);
2652         __iwl3945_down(priv);
2653         mutex_unlock(&priv->mutex);
2654
2655         iwl3945_cancel_deferred_work(priv);
2656 }
2657
2658 #define MAX_HW_RESTARTS 5
2659
2660 static int __iwl3945_up(struct iwl_priv *priv)
2661 {
2662         int rc, i;
2663
2664         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2665                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2666                 return -EIO;
2667         }
2668
2669         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2670                 IWL_ERR(priv, "ucode not available for device bring up\n");
2671                 return -EIO;
2672         }
2673
2674         /* If platform's RF_KILL switch is NOT set to KILL */
2675         if (iwl_read32(priv, CSR_GP_CNTRL) &
2676                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2677                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2678         else {
2679                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2680                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2681                 return -ENODEV;
2682         }
2683
2684         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2685
2686         rc = iwl3945_hw_nic_init(priv);
2687         if (rc) {
2688                 IWL_ERR(priv, "Unable to int nic\n");
2689                 return rc;
2690         }
2691
2692         /* make sure rfkill handshake bits are cleared */
2693         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2694         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2695                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2696
2697         /* clear (again), then enable host interrupts */
2698         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2699         iwl_enable_interrupts(priv);
2700
2701         /* really make sure rfkill handshake bits are cleared */
2702         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2703         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2704
2705         /* Copy original ucode data image from disk into backup cache.
2706          * This will be used to initialize the on-board processor's
2707          * data SRAM for a clean start when the runtime program first loads. */
2708         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2709                priv->ucode_data.len);
2710
2711         /* We return success when we resume from suspend and rf_kill is on. */
2712         if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2713                 return 0;
2714
2715         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2716
2717                 iwl_clear_stations_table(priv);
2718
2719                 /* load bootstrap state machine,
2720                  * load bootstrap program into processor's memory,
2721                  * prepare to load the "initialize" uCode */
2722                 priv->cfg->ops->lib->load_ucode(priv);
2723
2724                 if (rc) {
2725                         IWL_ERR(priv,
2726                                 "Unable to set up bootstrap uCode: %d\n", rc);
2727                         continue;
2728                 }
2729
2730                 /* start card; "initialize" will load runtime ucode */
2731                 iwl3945_nic_start(priv);
2732
2733                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2734
2735                 return 0;
2736         }
2737
2738         set_bit(STATUS_EXIT_PENDING, &priv->status);
2739         __iwl3945_down(priv);
2740         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2741
2742         /* tried to restart and config the device for as long as our
2743          * patience could withstand */
2744         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2745         return -EIO;
2746 }
2747
2748
2749 /*****************************************************************************
2750  *
2751  * Workqueue callbacks
2752  *
2753  *****************************************************************************/
2754
2755 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2756 {
2757         struct iwl_priv *priv =
2758             container_of(data, struct iwl_priv, init_alive_start.work);
2759
2760         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2761                 return;
2762
2763         mutex_lock(&priv->mutex);
2764         iwl3945_init_alive_start(priv);
2765         mutex_unlock(&priv->mutex);
2766 }
2767
2768 static void iwl3945_bg_alive_start(struct work_struct *data)
2769 {
2770         struct iwl_priv *priv =
2771             container_of(data, struct iwl_priv, alive_start.work);
2772
2773         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2774                 return;
2775
2776         mutex_lock(&priv->mutex);
2777         iwl3945_alive_start(priv);
2778         mutex_unlock(&priv->mutex);
2779 }
2780
2781 /*
2782  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2783  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
2784  * *is* readable even when device has been SW_RESET into low power mode
2785  * (e.g. during RF KILL).
2786  */
2787 static void iwl3945_rfkill_poll(struct work_struct *data)
2788 {
2789         struct iwl_priv *priv =
2790             container_of(data, struct iwl_priv, rfkill_poll.work);
2791         bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2792         bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2793                         & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2794
2795         if (new_rfkill != old_rfkill) {
2796                 if (new_rfkill)
2797                         set_bit(STATUS_RF_KILL_HW, &priv->status);
2798                 else
2799                         clear_bit(STATUS_RF_KILL_HW, &priv->status);
2800
2801                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2802
2803                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2804                                 new_rfkill ? "disable radio" : "enable radio");
2805         }
2806
2807         /* Keep this running, even if radio now enabled.  This will be
2808          * cancelled in mac_start() if system decides to start again */
2809         queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2810                            round_jiffies_relative(2 * HZ));
2811
2812 }
2813
2814 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2815 static void iwl3945_bg_request_scan(struct work_struct *data)
2816 {
2817         struct iwl_priv *priv =
2818             container_of(data, struct iwl_priv, request_scan);
2819         struct iwl_host_cmd cmd = {
2820                 .id = REPLY_SCAN_CMD,
2821                 .len = sizeof(struct iwl3945_scan_cmd),
2822                 .flags = CMD_SIZE_HUGE,
2823         };
2824         int rc = 0;
2825         struct iwl3945_scan_cmd *scan;
2826         struct ieee80211_conf *conf = NULL;
2827         u8 n_probes = 0;
2828         enum ieee80211_band band;
2829         bool is_active = false;
2830
2831         conf = ieee80211_get_hw_conf(priv->hw);
2832
2833         mutex_lock(&priv->mutex);
2834
2835         cancel_delayed_work(&priv->scan_check);
2836
2837         if (!iwl_is_ready(priv)) {
2838                 IWL_WARN(priv, "request scan called when driver not ready.\n");
2839                 goto done;
2840         }
2841
2842         /* Make sure the scan wasn't canceled before this queued work
2843          * was given the chance to run... */
2844         if (!test_bit(STATUS_SCANNING, &priv->status))
2845                 goto done;
2846
2847         /* This should never be called or scheduled if there is currently
2848          * a scan active in the hardware. */
2849         if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2850                 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests  "
2851                                 "Ignoring second request.\n");
2852                 rc = -EIO;
2853                 goto done;
2854         }
2855
2856         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2857                 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2858                 goto done;
2859         }
2860
2861         if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2862                 IWL_DEBUG_HC(priv,
2863                         "Scan request while abort pending. Queuing.\n");
2864                 goto done;
2865         }
2866
2867         if (iwl_is_rfkill(priv)) {
2868                 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2869                 goto done;
2870         }
2871
2872         if (!test_bit(STATUS_READY, &priv->status)) {
2873                 IWL_DEBUG_HC(priv,
2874                         "Scan request while uninitialized. Queuing.\n");
2875                 goto done;
2876         }
2877
2878         if (!priv->scan_bands) {
2879                 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2880                 goto done;
2881         }
2882
2883         if (!priv->scan) {
2884                 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2885                                      IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2886                 if (!priv->scan) {
2887                         rc = -ENOMEM;
2888                         goto done;
2889                 }
2890         }
2891         scan = priv->scan;
2892         memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2893
2894         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2895         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2896
2897         if (iwl_is_associated(priv)) {
2898                 u16 interval = 0;
2899                 u32 extra;
2900                 u32 suspend_time = 100;
2901                 u32 scan_suspend_time = 100;
2902                 unsigned long flags;
2903
2904                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2905
2906                 spin_lock_irqsave(&priv->lock, flags);
2907                 interval = priv->beacon_int;
2908                 spin_unlock_irqrestore(&priv->lock, flags);
2909
2910                 scan->suspend_time = 0;
2911                 scan->max_out_time = cpu_to_le32(200 * 1024);
2912                 if (!interval)
2913                         interval = suspend_time;
2914                 /*
2915                  * suspend time format:
2916                  *  0-19: beacon interval in usec (time before exec.)
2917                  * 20-23: 0
2918                  * 24-31: number of beacons (suspend between channels)
2919                  */
2920
2921                 extra = (suspend_time / interval) << 24;
2922                 scan_suspend_time = 0xFF0FFFFF &
2923                     (extra | ((suspend_time % interval) * 1024));
2924