1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #ifndef __iwl_helpers_h__
31 #define __iwl_helpers_h__
33 #include <linux/ctype.h>
34 #include <net/mac80211.h>
38 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
41 static inline struct ieee80211_conf *ieee80211_get_hw_conf(
42 struct ieee80211_hw *hw)
47 static inline unsigned long elapsed_jiffies(unsigned long start,
53 return end + (MAX_JIFFY_OFFSET - start) + 1;
57 * iwl_queue_inc_wrap - increment queue index, wrap back to beginning
58 * @index -- current index
59 * @n_bd -- total number of entries in queue (must be power of 2)
61 static inline int iwl_queue_inc_wrap(int index, int n_bd)
63 return ++index & (n_bd - 1);
67 * iwl_queue_dec_wrap - decrement queue index, wrap back to end
68 * @index -- current index
69 * @n_bd -- total number of entries in queue (must be power of 2)
71 static inline int iwl_queue_dec_wrap(int index, int n_bd)
73 return --index & (n_bd - 1);
76 /* TODO: Move fw_desc functions to iwl-pci.ko */
77 static inline void iwl_free_fw_desc(struct pci_dev *pci_dev,
81 dma_free_coherent(&pci_dev->dev, desc->len,
82 desc->v_addr, desc->p_addr);
87 static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev,
95 desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len,
96 &desc->p_addr, GFP_KERNEL);
97 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
101 * we have 8 bits used like this:
105 * | | | | | | +-+-------- AC queue (0-3)
107 * | +-+-+-+-+------------ HW A-MPDU queue
109 * +---------------------- indicates agg queue
111 static inline u8 iwl_virtual_agg_queue_num(u8 ac, u8 hwq)
113 BUG_ON(ac > 3); /* only have 2 bits */
114 BUG_ON(hwq > 31); /* only have 5 bits */
116 return 0x80 | (hwq << 2) | ac;
119 static inline void iwl_wake_queue(struct iwl_priv *priv, u8 queue)
126 hwq = (queue >> 2) & 0x1f;
129 if (test_and_clear_bit(hwq, priv->queue_stopped))
130 if (atomic_dec_return(&priv->queue_stop_count[ac]) <= 0)
131 ieee80211_wake_queue(priv->hw, ac);
134 static inline void iwl_stop_queue(struct iwl_priv *priv, u8 queue)
141 hwq = (queue >> 2) & 0x1f;
144 if (!test_and_set_bit(hwq, priv->queue_stopped))
145 if (atomic_inc_return(&priv->queue_stop_count[ac]) > 0)
146 ieee80211_stop_queue(priv->hw, ac);
149 #define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
150 #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
152 static inline void iwl_disable_interrupts(struct iwl_priv *priv)
154 clear_bit(STATUS_INT_ENABLED, &priv->status);
156 /* disable interrupts from uCode/NIC to host */
157 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
159 /* acknowledge/clear/reset any interrupts still pending
160 * from uCode or flow handler (Rx/Tx DMA) */
161 iwl_write32(priv, CSR_INT, 0xffffffff);
162 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
163 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
166 static inline void iwl_enable_interrupts(struct iwl_priv *priv)
168 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
169 set_bit(STATUS_INT_ENABLED, &priv->status);
170 iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
174 * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
175 * @priv -- pointer to iwl_priv data structure
176 * @tsf_bits -- number of bits need to shift for masking)
178 static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,
181 return (1 << tsf_bits) - 1;
185 * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
186 * @priv -- pointer to iwl_priv data structure
187 * @tsf_bits -- number of bits need to shift for masking)
189 static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,
192 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
195 #endif /* __iwl_helpers_h__ */