drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-agn-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88
  89 static int iwlagn_ant_coupling;
  90 static bool iwlagn_bt_ch_announce = 1;
  91
  92 void iwl_update_chain_flags(struct iwl_priv *priv)
  93 {
  94         struct iwl_rxon_context *ctx;
  95
  96         if (priv->cfg->ops->hcmd->set_rxon_chain) {
  97                 for_each_context(priv, ctx) {
  98                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  99                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
 100                                 iwlcore_commit_rxon(priv, ctx);
 101                 }
 102         }
 103 }
 104
 105 static void iwl_clear_free_frames(struct iwl_priv *priv)
 106 {
 107         struct list_head *element;
 108
 109         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 110                        priv->frames_count);
 111
 112         while (!list_empty(&priv->free_frames)) {
 113                 element = priv->free_frames.next;
 114                 list_del(element);
 115                 kfree(list_entry(element, struct iwl_frame, list));
 116                 priv->frames_count--;
 117         }
 118
 119         if (priv->frames_count) {
 120                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 121                             priv->frames_count);
 122                 priv->frames_count = 0;
 123         }
 124 }
 125
 126 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 127 {
 128         struct iwl_frame *frame;
 129         struct list_head *element;
 130         if (list_empty(&priv->free_frames)) {
 131                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 132                 if (!frame) {
 133                         IWL_ERR(priv, "Could not allocate frame!\n");
 134                         return NULL;
 135                 }
 136
 137                 priv->frames_count++;
 138                 return frame;
 139         }
 140
 141         element = priv->free_frames.next;
 142         list_del(element);
 143         return list_entry(element, struct iwl_frame, list);
 144 }
 145
 146 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 147 {
 148         memset(frame, 0, sizeof(*frame));
 149         list_add(&frame->list, &priv->free_frames);
 150 }
 151
 152 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 153                                  struct ieee80211_hdr *hdr,
 154                                  int left)
 155 {
 156         lockdep_assert_held(&priv->mutex);
 157
 158         if (!priv->beacon_skb)
 159                 return 0;
 160
 161         if (priv->beacon_skb->len > left)
 162                 return 0;
 163
 164         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
 165
 166         return priv->beacon_skb->len;
 167 }
 168
 169 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 170 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 171                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 172                                u8 *beacon, u32 frame_size)
 173 {
 174         u16 tim_idx;
 175         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 176
 177         /*
 178          * The index is relative to frame start but we start looking at the
 179          * variable-length part of the beacon.
 180          */
 181         tim_idx = mgmt->u.beacon.variable - beacon;
 182
 183         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 184         while ((tim_idx < (frame_size - 2)) &&
 185                         (beacon[tim_idx] != WLAN_EID_TIM))
 186                 tim_idx += beacon[tim_idx+1] + 2;
 187
 188         /* If TIM field was found, set variables */
 189         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 190                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 191                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 192         } else
 193                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 194 }
 195
 196 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 197                                        struct iwl_frame *frame)
 198 {
 199         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 200         u32 frame_size;
 201         u32 rate_flags;
 202         u32 rate;
 203         /*
 204          * We have to set up the TX command, the TX Beacon command, and the
 205          * beacon contents.
 206          */
 207
 208         lockdep_assert_held(&priv->mutex);
 209
 210         if (!priv->beacon_ctx) {
 211                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 212                 return 0;
 213         }
 214
 215         /* Initialize memory */
 216         tx_beacon_cmd = &frame->u.beacon;
 217         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 218
 219         /* Set up TX beacon contents */
 220         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 221                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 222         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 223                 return 0;
 224         if (!frame_size)
 225                 return 0;
 226
 227         /* Set up TX command fields */
 228         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 229         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 230         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 231         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 232                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 233
 234         /* Set up TX beacon command fields */
 235         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 236                            frame_size);
 237
 238         /* Set up packet rate and flags */
 239         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
 240         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 241                                               priv->hw_params.valid_tx_ant);
 242         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 243         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 244                 rate_flags |= RATE_MCS_CCK_MSK;
 245         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 246                         rate_flags);
 247
 248         return sizeof(*tx_beacon_cmd) + frame_size;
 249 }
 250
 251 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
 252 {
 253         struct iwl_frame *frame;
 254         unsigned int frame_size;
 255         int rc;
 256         struct iwl_host_cmd cmd = {
 257                 .id = REPLY_TX_BEACON,
 258                 .flags = CMD_SIZE_HUGE,
 259         };
 260
 261         frame = iwl_get_free_frame(priv);
 262         if (!frame) {
 263                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 264                           "command.\n");
 265                 return -ENOMEM;
 266         }
 267
 268         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 269         if (!frame_size) {
 270                 IWL_ERR(priv, "Error configuring the beacon command\n");
 271                 iwl_free_frame(priv, frame);
 272                 return -EINVAL;
 273         }
 274
 275         cmd.len = frame_size;
 276         cmd.data = &frame->u.cmd[0];
 277
 278         rc = iwl_send_cmd_sync(priv, &cmd);
 279
 280         iwl_free_frame(priv, frame);
 281
 282         return rc;
 283 }
 284
 285 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 286 {
 287         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 288
 289         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 290         if (sizeof(dma_addr_t) > sizeof(u32))
 291                 addr |=
 292                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 293
 294         return addr;
 295 }
 296
 297 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 298 {
 299         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 300
 301         return le16_to_cpu(tb->hi_n_len) >> 4;
 302 }
 303
 304 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 305                                   dma_addr_t addr, u16 len)
 306 {
 307         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 308         u16 hi_n_len = len << 4;
 309
 310         put_unaligned_le32(addr, &tb->lo);
 311         if (sizeof(dma_addr_t) > sizeof(u32))
 312                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 313
 314         tb->hi_n_len = cpu_to_le16(hi_n_len);
 315
 316         tfd->num_tbs = idx + 1;
 317 }
 318
 319 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 320 {
 321         return tfd->num_tbs & 0x1f;
 322 }
 323
 324 /**
 325  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 326  * @priv - driver private data
 327  * @txq - tx queue
 328  *
 329  * Does NOT advance any TFD circular buffer read/write indexes
 330  * Does NOT free the TFD itself (which is within circular buffer)
 331  */
 332 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 333 {
 334         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 335         struct iwl_tfd *tfd;
 336         struct pci_dev *dev = priv->pci_dev;
 337         int index = txq->q.read_ptr;
 338         int i;
 339         int num_tbs;
 340
 341         tfd = &tfd_tmp[index];
 342
 343         /* Sanity check on number of chunks */
 344         num_tbs = iwl_tfd_get_num_tbs(tfd);
 345
 346         if (num_tbs >= IWL_NUM_OF_TBS) {
 347                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 348                 /* @todo issue fatal error, it is quite serious situation */
 349                 return;
 350         }
 351
 352         /* Unmap tx_cmd */
 353         if (num_tbs)
 354                 pci_unmap_single(dev,
 355                                 dma_unmap_addr(&txq->meta[index], mapping),
 356                                 dma_unmap_len(&txq->meta[index], len),
 357                                 PCI_DMA_BIDIRECTIONAL);
 358
 359         /* Unmap chunks, if any. */
 360         for (i = 1; i < num_tbs; i++)
 361                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 362                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 363
 364         /* free SKB */
 365         if (txq->txb) {
 366                 struct sk_buff *skb;
 367
 368                 skb = txq->txb[txq->q.read_ptr].skb;
 369
 370                 /* can be called from irqs-disabled context */
 371                 if (skb) {
 372                         dev_kfree_skb_any(skb);
 373                         txq->txb[txq->q.read_ptr].skb = NULL;
 374                 }
 375         }
 376 }
 377
 378 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 379                                  struct iwl_tx_queue *txq,
 380                                  dma_addr_t addr, u16 len,
 381                                  u8 reset, u8 pad)
 382 {
 383         struct iwl_queue *q;
 384         struct iwl_tfd *tfd, *tfd_tmp;
 385         u32 num_tbs;
 386
 387         q = &txq->q;
 388         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 389         tfd = &tfd_tmp[q->write_ptr];
 390
 391         if (reset)
 392                 memset(tfd, 0, sizeof(*tfd));
 393
 394         num_tbs = iwl_tfd_get_num_tbs(tfd);
 395
 396         /* Each TFD can point to a maximum 20 Tx buffers */
 397         if (num_tbs >= IWL_NUM_OF_TBS) {
 398                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 399                           IWL_NUM_OF_TBS);
 400                 return -EINVAL;
 401         }
 402
 403         if (WARN_ON(addr & ~DMA_BIT_MASK(36)))
 404                 return -EINVAL;
 405
 406         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 407                 IWL_ERR(priv, "Unaligned address = %llx\n",
 408                           (unsigned long long)addr);
 409
 410         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 411
 412         return 0;
 413 }
 414
 415 /*
 416  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 417  * given Tx queue, and enable the DMA channel used for that queue.
 418  *
 419  * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 420  * channels supported in hardware.
 421  */
 422 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 423                          struct iwl_tx_queue *txq)
 424 {
 425         int txq_id = txq->q.id;
 426
 427         /* Circular buffer (TFD queue in DRAM) physical base address */
 428         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 429                              txq->q.dma_addr >> 8);
 430
 431         return 0;
 432 }
 433
 434 static void iwl_bg_beacon_update(struct work_struct *work)
 435 {
 436         struct iwl_priv *priv =
 437                 container_of(work, struct iwl_priv, beacon_update);
 438         struct sk_buff *beacon;
 439
 440         mutex_lock(&priv->mutex);
 441         if (!priv->beacon_ctx) {
 442                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
 443                 goto out;
 444         }
 445
 446         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
 447                 /*
 448                  * The ucode will send beacon notifications even in
 449                  * IBSS mode, but we don't want to process them. But
 450                  * we need to defer the type check to here due to
 451                  * requiring locking around the beacon_ctx access.
 452                  */
 453                 goto out;
 454         }
 455
 456         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 457         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
 458         if (!beacon) {
 459                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
 460                 goto out;
 461         }
 462
 463         /* new beacon skb is allocated every time; dispose previous.*/
 464         dev_kfree_skb(priv->beacon_skb);
 465
 466         priv->beacon_skb = beacon;
 467
 468         iwlagn_send_beacon_cmd(priv);
 469  out:
 470         mutex_unlock(&priv->mutex);
 471 }
 472
 473 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 474 {
 475         struct iwl_priv *priv =
 476                 container_of(work, struct iwl_priv, bt_runtime_config);
 477
 478         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 479                 return;
 480
 481         /* dont send host command if rf-kill is on */
 482         if (!iwl_is_ready_rf(priv))
 483                 return;
 484         priv->cfg->ops->hcmd->send_bt_config(priv);
 485 }
 486
 487 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 488 {
 489         struct iwl_priv *priv =
 490                 container_of(work, struct iwl_priv, bt_full_concurrency);
 491         struct iwl_rxon_context *ctx;
 492
 493         mutex_lock(&priv->mutex);
 494
 495         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 496                 goto out;
 497
 498         /* dont send host command if rf-kill is on */
 499         if (!iwl_is_ready_rf(priv))
 500                 goto out;
 501
 502         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 503                        priv->bt_full_concurrent ?
 504                        "full concurrency" : "3-wire");
 505
 506         /*
 507          * LQ & RXON updated cmds must be sent before BT Config cmd
 508          * to avoid 3-wire collisions
 509          */
 510         for_each_context(priv, ctx) {
 511                 if (priv->cfg->ops->hcmd->set_rxon_chain)
 512                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 513                 iwlcore_commit_rxon(priv, ctx);
 514         }
 515
 516         priv->cfg->ops->hcmd->send_bt_config(priv);
 517 out:
 518         mutex_unlock(&priv->mutex);
 519 }
 520
 521 /**
 522  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 523  *
 524  * This callback is provided in order to send a statistics request.
 525  *
 526  * This timer function is continually reset to execute within
 527  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 528  * was received.  We need to ensure we receive the statistics in order
 529  * to update the temperature used for calibrating the TXPOWER.
 530  */
 531 static void iwl_bg_statistics_periodic(unsigned long data)
 532 {
 533         struct iwl_priv *priv = (struct iwl_priv *)data;
 534
 535         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 536                 return;
 537
 538         /* dont send host command if rf-kill is on */
 539         if (!iwl_is_ready_rf(priv))
 540                 return;
 541
 542         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 543 }
 544
 545
 546 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 547                                         u32 start_idx, u32 num_events,
 548                                         u32 mode)
 549 {
 550         u32 i;
 551         u32 ptr;        /* SRAM byte address of log data */
 552         u32 ev, time, data; /* event log data */
 553         unsigned long reg_flags;
 554
 555         if (mode == 0)
 556                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 557         else
 558                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 559
 560         /* Make sure device is powered up for SRAM reads */
 561         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 562         if (iwl_grab_nic_access(priv)) {
 563                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 564                 return;
 565         }
 566
 567         /* Set starting address; reads will auto-increment */
 568         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
 569         rmb();
 570
 571         /*
 572          * "time" is actually "data" for mode 0 (no timestamp).
 573          * place event id # at far right for easier visual parsing.
 574          */
 575         for (i = 0; i < num_events; i++) {
 576                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 577                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 578                 if (mode == 0) {
 579                         trace_iwlwifi_dev_ucode_cont_event(priv,
 580                                                         0, time, ev);
 581                 } else {
 582                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 583                         trace_iwlwifi_dev_ucode_cont_event(priv,
 584                                                 time, data, ev);
 585                 }
 586         }
 587         /* Allow device to power down */
 588         iwl_release_nic_access(priv);
 589         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 590 }
 591
 592 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 593 {
 594         u32 capacity;   /* event log capacity in # entries */
 595         u32 base;       /* SRAM byte address of event log header */
 596         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 597         u32 num_wraps;  /* # times uCode wrapped to top of log */
 598         u32 next_entry; /* index of next entry to be written by uCode */
 599
 600         base = priv->device_pointers.error_event_table;
 601         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 602                 capacity = iwl_read_targ_mem(priv, base);
 603                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 604                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 605                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 606         } else
 607                 return;
 608
 609         if (num_wraps == priv->event_log.num_wraps) {
 610                 iwl_print_cont_event_trace(priv,
 611                                        base, priv->event_log.next_entry,
 612                                        next_entry - priv->event_log.next_entry,
 613                                        mode);
 614                 priv->event_log.non_wraps_count++;
 615         } else {
 616                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 617                         priv->event_log.wraps_more_count++;
 618                 else
 619                         priv->event_log.wraps_once_count++;
 620                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 621                                 num_wraps - priv->event_log.num_wraps,
 622                                 next_entry, priv->event_log.next_entry);
 623                 if (next_entry < priv->event_log.next_entry) {
 624                         iwl_print_cont_event_trace(priv, base,
 625                                priv->event_log.next_entry,
 626                                capacity - priv->event_log.next_entry,
 627                                mode);
 628
 629                         iwl_print_cont_event_trace(priv, base, 0,
 630                                 next_entry, mode);
 631                 } else {
 632                         iwl_print_cont_event_trace(priv, base,
 633                                next_entry, capacity - next_entry,
 634                                mode);
 635
 636                         iwl_print_cont_event_trace(priv, base, 0,
 637                                 next_entry, mode);
 638                 }
 639         }
 640         priv->event_log.num_wraps = num_wraps;
 641         priv->event_log.next_entry = next_entry;
 642 }
 643
 644 /**
 645  * iwl_bg_ucode_trace - Timer callback to log ucode event
 646  *
 647  * The timer is continually set to execute every
 648  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 649  * this function is to perform continuous uCode event logging operation
 650  * if enabled
 651  */
 652 static void iwl_bg_ucode_trace(unsigned long data)
 653 {
 654         struct iwl_priv *priv = (struct iwl_priv *)data;
 655
 656         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 657                 return;
 658
 659         if (priv->event_log.ucode_trace) {
 660                 iwl_continuous_event_trace(priv);
 661                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 662                 mod_timer(&priv->ucode_trace,
 663                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 664         }
 665 }
 666
 667 static void iwl_bg_tx_flush(struct work_struct *work)
 668 {
 669         struct iwl_priv *priv =
 670                 container_of(work, struct iwl_priv, tx_flush);
 671
 672         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 673                 return;
 674
 675         /* do nothing if rf-kill is on */
 676         if (!iwl_is_ready_rf(priv))
 677                 return;
 678
 679         if (priv->cfg->ops->lib->txfifo_flush) {
 680                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 681                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 682         }
 683 }
 684
 685 /**
 686  * iwl_rx_handle - Main entry function for receiving responses from uCode
 687  *
 688  * Uses the priv->rx_handlers callback function array to invoke
 689  * the appropriate handlers, including command responses,
 690  * frame-received notifications, and other notifications.
 691  */
 692 static void iwl_rx_handle(struct iwl_priv *priv)
 693 {
 694         struct iwl_rx_mem_buffer *rxb;
 695         struct iwl_rx_packet *pkt;
 696         struct iwl_rx_queue *rxq = &priv->rxq;
 697         u32 r, i;
 698         int reclaim;
 699         unsigned long flags;
 700         u8 fill_rx = 0;
 701         u32 count = 8;
 702         int total_empty;
 703
 704         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 705          * buffer that the driver may process (last buffer filled by ucode). */
 706         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 707         i = rxq->read;
 708
 709         /* Rx interrupt, but nothing sent from uCode */
 710         if (i == r)
 711                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 712
 713         /* calculate total frames need to be restock after handling RX */
 714         total_empty = r - rxq->write_actual;
 715         if (total_empty < 0)
 716                 total_empty += RX_QUEUE_SIZE;
 717
 718         if (total_empty > (RX_QUEUE_SIZE / 2))
 719                 fill_rx = 1;
 720
 721         while (i != r) {
 722                 int len;
 723
 724                 rxb = rxq->queue[i];
 725
 726                 /* If an RXB doesn't have a Rx queue slot associated with it,
 727                  * then a bug has been introduced in the queue refilling
 728                  * routines -- catch it here */
 729                 if (WARN_ON(rxb == NULL)) {
 730                         i = (i + 1) & RX_QUEUE_MASK;
 731                         continue;
 732                 }
 733
 734                 rxq->queue[i] = NULL;
 735
 736                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 737                                PAGE_SIZE << priv->hw_params.rx_page_order,
 738                                PCI_DMA_FROMDEVICE);
 739                 pkt = rxb_addr(rxb);
 740
 741                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 742                 len += sizeof(u32); /* account for status word */
 743                 trace_iwlwifi_dev_rx(priv, pkt, len);
 744
 745                 /* Reclaim a command buffer only if this packet is a response
 746                  *   to a (driver-originated) command.
 747                  * If the packet (e.g. Rx frame) originated from uCode,
 748                  *   there is no command buffer to reclaim.
 749                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 750                  *   but apparently a few don't get set; catch them here. */
 751                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 752                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 753                         (pkt->hdr.cmd != REPLY_RX) &&
 754                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 755                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 756                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 757                         (pkt->hdr.cmd != REPLY_TX);
 758
 759                 /*
 760                  * Do the notification wait before RX handlers so
 761                  * even if the RX handler consumes the RXB we have
 762                  * access to it in the notification wait entry.
 763                  */
 764                 if (!list_empty(&priv->_agn.notif_waits)) {
 765                         struct iwl_notification_wait *w;
 766
 767                         spin_lock(&priv->_agn.notif_wait_lock);
 768                         list_for_each_entry(w, &priv->_agn.notif_waits, list) {
 769                                 if (w->cmd == pkt->hdr.cmd) {
 770                                         w->triggered = true;
 771                                         if (w->fn)
 772                                                 w->fn(priv, pkt, w->fn_data);
 773                                 }
 774                         }
 775                         spin_unlock(&priv->_agn.notif_wait_lock);
 776
 777                         wake_up_all(&priv->_agn.notif_waitq);
 778                 }
 779
 780                 /* Based on type of command response or notification,
 781                  *   handle those that need handling via function in
 782                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 783                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 784                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 785                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 786                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 787                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 788                 } else {
 789                         /* No handling needed */
 790                         IWL_DEBUG_RX(priv,
 791                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 792                                 r, i, get_cmd_string(pkt->hdr.cmd),
 793                                 pkt->hdr.cmd);
 794                 }
 795
 796                 /*
 797                  * XXX: After here, we should always check rxb->page
 798                  * against NULL before touching it or its virtual
 799                  * memory (pkt). Because some rx_handler might have
 800                  * already taken or freed the pages.
 801                  */
 802
 803                 if (reclaim) {
 804                         /* Invoke any callbacks, transfer the buffer to caller,
 805                          * and fire off the (possibly) blocking iwl_send_cmd()
 806                          * as we reclaim the driver command queue */
 807                         if (rxb->page)
 808                                 iwl_tx_cmd_complete(priv, rxb);
 809                         else
 810                                 IWL_WARN(priv, "Claim null rxb?\n");
 811                 }
 812
 813                 /* Reuse the page if possible. For notification packets and
 814                  * SKBs that fail to Rx correctly, add them back into the
 815                  * rx_free list for reuse later. */
 816                 spin_lock_irqsave(&rxq->lock, flags);
 817                 if (rxb->page != NULL) {
 818                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 819                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 820                                 PCI_DMA_FROMDEVICE);
 821                         list_add_tail(&rxb->list, &rxq->rx_free);
 822                         rxq->free_count++;
 823                 } else
 824                         list_add_tail(&rxb->list, &rxq->rx_used);
 825
 826                 spin_unlock_irqrestore(&rxq->lock, flags);
 827
 828                 i = (i + 1) & RX_QUEUE_MASK;
 829                 /* If there are a lot of unused frames,
 830                  * restock the Rx queue so ucode wont assert. */
 831                 if (fill_rx) {
 832                         count++;
 833                         if (count >= 8) {
 834                                 rxq->read = i;
 835                                 iwlagn_rx_replenish_now(priv);
 836                                 count = 0;
 837                         }
 838                 }
 839         }
 840
 841         /* Backtrack one entry */
 842         rxq->read = i;
 843         if (fill_rx)
 844                 iwlagn_rx_replenish_now(priv);
 845         else
 846                 iwlagn_rx_queue_restock(priv);
 847 }
 848
 849 /* tasklet for iwlagn interrupt */
 850 static void iwl_irq_tasklet(struct iwl_priv *priv)
 851 {
 852         u32 inta = 0;
 853         u32 handled = 0;
 854         unsigned long flags;
 855         u32 i;
 856 #ifdef CONFIG_IWLWIFI_DEBUG
 857         u32 inta_mask;
 858 #endif
 859
 860         spin_lock_irqsave(&priv->lock, flags);
 861
 862         /* Ack/clear/reset pending uCode interrupts.
 863          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 864          */
 865         /* There is a hardware bug in the interrupt mask function that some
 866          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
 867          * they are disabled in the CSR_INT_MASK register. Furthermore the
 868          * ICT interrupt handling mechanism has another bug that might cause
 869          * these unmasked interrupts fail to be detected. We workaround the
 870          * hardware bugs here by ACKing all the possible interrupts so that
 871          * interrupt coalescing can still be achieved.
 872          */
 873         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
 874
 875         inta = priv->_agn.inta;
 876
 877 #ifdef CONFIG_IWLWIFI_DEBUG
 878         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 879                 /* just for debug */
 880                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 881                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
 882                                 inta, inta_mask);
 883         }
 884 #endif
 885
 886         spin_unlock_irqrestore(&priv->lock, flags);
 887
 888         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
 889         priv->_agn.inta = 0;
 890
 891         /* Now service all interrupt bits discovered above. */
 892         if (inta & CSR_INT_BIT_HW_ERR) {
 893                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 894
 895                 /* Tell the device to stop sending interrupts */
 896                 iwl_disable_interrupts(priv);
 897
 898                 priv->isr_stats.hw++;
 899                 iwl_irq_handle_error(priv);
 900
 901                 handled |= CSR_INT_BIT_HW_ERR;
 902
 903                 return;
 904         }
 905
 906 #ifdef CONFIG_IWLWIFI_DEBUG
 907         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 908                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 909                 if (inta & CSR_INT_BIT_SCD) {
 910                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 911                                       "the frame/frames.\n");
 912                         priv->isr_stats.sch++;
 913                 }
 914
 915                 /* Alive notification via Rx interrupt will do the real work */
 916                 if (inta & CSR_INT_BIT_ALIVE) {
 917                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 918                         priv->isr_stats.alive++;
 919                 }
 920         }
 921 #endif
 922         /* Safely ignore these bits for debug checks below */
 923         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 924
 925         /* HW RF KILL switch toggled */
 926         if (inta & CSR_INT_BIT_RF_KILL) {
 927                 int hw_rf_kill = 0;
 928                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 929                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 930                         hw_rf_kill = 1;
 931
 932                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 933                                 hw_rf_kill ? "disable radio" : "enable radio");
 934
 935                 priv->isr_stats.rfkill++;
 936
 937                 /* driver only loads ucode once setting the interface up.
 938                  * the driver allows loading the ucode even if the radio
 939                  * is killed. Hence update the killswitch state here. The
 940                  * rfkill handler will care about restarting if needed.
 941                  */
 942                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 943                         if (hw_rf_kill)
 944                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 945                         else
 946                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 947                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 948                 }
 949
 950                 handled |= CSR_INT_BIT_RF_KILL;
 951         }
 952
 953         /* Chip got too hot and stopped itself */
 954         if (inta & CSR_INT_BIT_CT_KILL) {
 955                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
 956                 priv->isr_stats.ctkill++;
 957                 handled |= CSR_INT_BIT_CT_KILL;
 958         }
 959
 960         /* Error detected by uCode */
 961         if (inta & CSR_INT_BIT_SW_ERR) {
 962                 IWL_ERR(priv, "Microcode SW error detected. "
 963                         " Restarting 0x%X.\n", inta);
 964                 priv->isr_stats.sw++;
 965                 iwl_irq_handle_error(priv);
 966                 handled |= CSR_INT_BIT_SW_ERR;
 967         }
 968
 969         /* uCode wakes up after power-down sleep */
 970         if (inta & CSR_INT_BIT_WAKEUP) {
 971                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
 972                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
 973                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
 974                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
 975
 976                 priv->isr_stats.wakeup++;
 977
 978                 handled |= CSR_INT_BIT_WAKEUP;
 979         }
 980
 981         /* All uCode command responses, including Tx command responses,
 982          * Rx "responses" (frame-received notification), and other
 983          * notifications from uCode come through here*/
 984         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
 985                         CSR_INT_BIT_RX_PERIODIC)) {
 986                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
 987                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
 988                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
 989                         iwl_write32(priv, CSR_FH_INT_STATUS,
 990                                         CSR_FH_INT_RX_MASK);
 991                 }
 992                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
 993                         handled |= CSR_INT_BIT_RX_PERIODIC;
 994                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
 995                 }
 996                 /* Sending RX interrupt require many steps to be done in the
 997                  * the device:
 998                  * 1- write interrupt to current index in ICT table.
 999                  * 2- dma RX frame.
1000                  * 3- update RX shared data to indicate last write index.
1001                  * 4- send interrupt.
1002                  * This could lead to RX race, driver could receive RX interrupt
1003                  * but the shared data changes does not reflect this;
1004                  * periodic interrupt will detect any dangling Rx activity.
1005                  */
1006
1007                 /* Disable periodic interrupt; we use it as just a one-shot. */
1008                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1009                             CSR_INT_PERIODIC_DIS);
1010                 iwl_rx_handle(priv);
1011
1012                 /*
1013                  * Enable periodic interrupt in 8 msec only if we received
1014                  * real RX interrupt (instead of just periodic int), to catch
1015                  * any dangling Rx interrupt.  If it was just the periodic
1016                  * interrupt, there was no dangling Rx activity, and no need
1017                  * to extend the periodic interrupt; one-shot is enough.
1018                  */
1019                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1020                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1021                                     CSR_INT_PERIODIC_ENA);
1022
1023                 priv->isr_stats.rx++;
1024         }
1025
1026         /* This "Tx" DMA channel is used only for loading uCode */
1027         if (inta & CSR_INT_BIT_FH_TX) {
1028                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
1029                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1030                 priv->isr_stats.tx++;
1031                 handled |= CSR_INT_BIT_FH_TX;
1032                 /* Wake up uCode load routine, now that load is complete */
1033                 priv->ucode_write_complete = 1;
1034                 wake_up_interruptible(&priv->wait_command_queue);
1035         }
1036
1037         if (inta & ~handled) {
1038                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1039                 priv->isr_stats.unhandled++;
1040         }
1041
1042         if (inta & ~(priv->inta_mask)) {
1043                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1044                          inta & ~priv->inta_mask);
1045         }
1046
1047         /* Re-enable all interrupts */
1048         /* only Re-enable if disabled by irq */
1049         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1050                 iwl_enable_interrupts(priv);
1051         /* Re-enable RF_KILL if it occurred */
1052         else if (handled & CSR_INT_BIT_RF_KILL)
1053                 iwl_enable_rfkill_int(priv);
1054 }
1055
1056 /*****************************************************************************
1057  *
1058  * sysfs attributes
1059  *
1060  *****************************************************************************/
1061
1062 #ifdef CONFIG_IWLWIFI_DEBUG
1063
1064 /*
1065  * The following adds a new attribute to the sysfs representation
1066  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1067  * used for controlling the debug level.
1068  *
1069  * See the level definitions in iwl for details.
1070  *
1071  * The debug_level being managed using sysfs below is a per device debug
1072  * level that is used instead of the global debug level if it (the per
1073  * device debug level) is set.
1074  */
1075 static ssize_t show_debug_level(struct device *d,
1076                                 struct device_attribute *attr, char *buf)
1077 {
1078         struct iwl_priv *priv = dev_get_drvdata(d);
1079         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1080 }
1081 static ssize_t store_debug_level(struct device *d,
1082                                 struct device_attribute *attr,
1083                                  const char *buf, size_t count)
1084 {
1085         struct iwl_priv *priv = dev_get_drvdata(d);
1086         unsigned long val;
1087         int ret;
1088
1089         ret = strict_strtoul(buf, 0, &val);
1090         if (ret)
1091                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1092         else {
1093                 priv->debug_level = val;
1094                 if (iwl_alloc_traffic_mem(priv))
1095                         IWL_ERR(priv,
1096                                 "Not enough memory to generate traffic log\n");
1097         }
1098         return strnlen(buf, count);
1099 }
1100
1101 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1102                         show_debug_level, store_debug_level);
1103
1104
1105 #endif /* CONFIG_IWLWIFI_DEBUG */
1106
1107
1108 static ssize_t show_temperature(struct device *d,
1109                                 struct device_attribute *attr, char *buf)
1110 {
1111         struct iwl_priv *priv = dev_get_drvdata(d);
1112
1113         if (!iwl_is_alive(priv))
1114                 return -EAGAIN;
1115
1116         return sprintf(buf, "%d\n", priv->temperature);
1117 }
1118
1119 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1120
1121 static ssize_t show_tx_power(struct device *d,
1122                              struct device_attribute *attr, char *buf)
1123 {
1124         struct iwl_priv *priv = dev_get_drvdata(d);
1125
1126         if (!iwl_is_ready_rf(priv))
1127                 return sprintf(buf, "off\n");
1128         else
1129                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1130 }
1131
1132 static ssize_t store_tx_power(struct device *d,
1133                               struct device_attribute *attr,
1134                               const char *buf, size_t count)
1135 {
1136         struct iwl_priv *priv = dev_get_drvdata(d);
1137         unsigned long val;
1138         int ret;
1139
1140         ret = strict_strtoul(buf, 10, &val);
1141         if (ret)
1142                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1143         else {
1144                 ret = iwl_set_tx_power(priv, val, false);
1145                 if (ret)
1146                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1147                                 ret);
1148                 else
1149                         ret = count;
1150         }
1151         return ret;
1152 }
1153
1154 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1155
1156 static struct attribute *iwl_sysfs_entries[] = {
1157         &dev_attr_temperature.attr,
1158         &dev_attr_tx_power.attr,
1159 #ifdef CONFIG_IWLWIFI_DEBUG
1160         &dev_attr_debug_level.attr,
1161 #endif
1162         NULL
1163 };
1164
1165 static struct attribute_group iwl_attribute_group = {
1166         .name = NULL,           /* put in device directory */
1167         .attrs = iwl_sysfs_entries,
1168 };
1169
1170 /******************************************************************************
1171  *
1172  * uCode download functions
1173  *
1174  ******************************************************************************/
1175
1176 static void iwl_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
1177 {
1178         if (desc->v_addr)
1179                 dma_free_coherent(&pci_dev->dev, desc->len,
1180                                   desc->v_addr, desc->p_addr);
1181         desc->v_addr = NULL;
1182         desc->len = 0;
1183 }
1184
1185 static void iwl_free_fw_img(struct pci_dev *pci_dev, struct fw_img *img)
1186 {
1187         iwl_free_fw_desc(pci_dev, &img->code);
1188         iwl_free_fw_desc(pci_dev, &img->data);
1189 }
1190
1191 static int iwl_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc,
1192                              const void *data, size_t len)
1193 {
1194         if (!len) {
1195                 desc->v_addr = NULL;
1196                 return -EINVAL;
1197         }
1198
1199         desc->v_addr = dma_alloc_coherent(&pci_dev->dev, len,
1200                                           &desc->p_addr, GFP_KERNEL);
1201         if (!desc->v_addr)
1202                 return -ENOMEM;
1203         desc->len = len;
1204         memcpy(desc->v_addr, data, len);
1205         return 0;
1206 }
1207
1208 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1209 {
1210         iwl_free_fw_img(priv->pci_dev, &priv->ucode_rt);
1211         iwl_free_fw_img(priv->pci_dev, &priv->ucode_init);
1212 }
1213
1214 struct iwlagn_ucode_capabilities {
1215         u32 max_probe_length;
1216         u32 standard_phy_calibration_size;
1217         u32 flags;
1218 };
1219
1220 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1221 static int iwl_mac_setup_register(struct iwl_priv *priv,
1222                                   struct iwlagn_ucode_capabilities *capa);
1223
1224 #define UCODE_EXPERIMENTAL_INDEX        100
1225 #define UCODE_EXPERIMENTAL_TAG          "exp"
1226
1227 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1228 {
1229         const char *name_pre = priv->cfg->fw_name_pre;
1230         char tag[8];
1231
1232         if (first) {
1233 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1234                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1235                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1236         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1237 #endif
1238                 priv->fw_index = priv->cfg->ucode_api_max;
1239                 sprintf(tag, "%d", priv->fw_index);
1240         } else {
1241                 priv->fw_index--;
1242                 sprintf(tag, "%d", priv->fw_index);
1243         }
1244
1245         if (priv->fw_index < priv->cfg->ucode_api_min) {
1246                 IWL_ERR(priv, "no suitable firmware found!\n");
1247                 return -ENOENT;
1248         }
1249
1250         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1251
1252         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1253                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1254                                 ? "EXPERIMENTAL " : "",
1255                        priv->firmware_name);
1256
1257         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1258                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1259                                        iwl_ucode_callback);
1260 }
1261
1262 struct iwlagn_firmware_pieces {
1263         const void *inst, *data, *init, *init_data;
1264         size_t inst_size, data_size, init_size, init_data_size;
1265
1266         u32 build;
1267
1268         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1269         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1270 };
1271
1272 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1273                                        const struct firmware *ucode_raw,
1274                                        struct iwlagn_firmware_pieces *pieces)
1275 {
1276         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1277         u32 api_ver, hdr_size;
1278         const u8 *src;
1279
1280         priv->ucode_ver = le32_to_cpu(ucode->ver);
1281         api_ver = IWL_UCODE_API(priv->ucode_ver);
1282
1283         switch (api_ver) {
1284         default:
1285                 hdr_size = 28;
1286                 if (ucode_raw->size < hdr_size) {
1287                         IWL_ERR(priv, "File size too small!\n");
1288                         return -EINVAL;
1289                 }
1290                 pieces->build = le32_to_cpu(ucode->u.v2.build);
1291                 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1292                 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1293                 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1294                 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1295                 src = ucode->u.v2.data;
1296                 break;
1297         case 0:
1298         case 1:
1299         case 2:
1300                 hdr_size = 24;
1301                 if (ucode_raw->size < hdr_size) {
1302                         IWL_ERR(priv, "File size too small!\n");
1303                         return -EINVAL;
1304                 }
1305                 pieces->build = 0;
1306                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1307                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1308                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1309                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1310                 src = ucode->u.v1.data;
1311                 break;
1312         }
1313
1314         /* Verify size of file vs. image size info in file's header */
1315         if (ucode_raw->size != hdr_size + pieces->inst_size +
1316                                 pieces->data_size + pieces->init_size +
1317                                 pieces->init_data_size) {
1318
1319                 IWL_ERR(priv,
1320                         "uCode file size %d does not match expected size\n",
1321                         (int)ucode_raw->size);
1322                 return -EINVAL;
1323         }
1324
1325         pieces->inst = src;
1326         src += pieces->inst_size;
1327         pieces->data = src;
1328         src += pieces->data_size;
1329         pieces->init = src;
1330         src += pieces->init_size;
1331         pieces->init_data = src;
1332         src += pieces->init_data_size;
1333
1334         return 0;
1335 }
1336
1337 static int iwlagn_wanted_ucode_alternative = 1;
1338
1339 static int iwlagn_load_firmware(struct iwl_priv *priv,
1340                                 const struct firmware *ucode_raw,
1341                                 struct iwlagn_firmware_pieces *pieces,
1342                                 struct iwlagn_ucode_capabilities *capa)
1343 {
1344         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1345         struct iwl_ucode_tlv *tlv;
1346         size_t len = ucode_raw->size;
1347         const u8 *data;
1348         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1349         u64 alternatives;
1350         u32 tlv_len;
1351         enum iwl_ucode_tlv_type tlv_type;
1352         const u8 *tlv_data;
1353
1354         if (len < sizeof(*ucode)) {
1355                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1356                 return -EINVAL;
1357         }
1358
1359         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1360                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1361                         le32_to_cpu(ucode->magic));
1362                 return -EINVAL;
1363         }
1364
1365         /*
1366          * Check which alternatives are present, and "downgrade"
1367          * when the chosen alternative is not present, warning
1368          * the user when that happens. Some files may not have
1369          * any alternatives, so don't warn in that case.
1370          */
1371         alternatives = le64_to_cpu(ucode->alternatives);
1372         tmp = wanted_alternative;
1373         if (wanted_alternative > 63)
1374                 wanted_alternative = 63;
1375         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1376                 wanted_alternative--;
1377         if (wanted_alternative && wanted_alternative != tmp)
1378                 IWL_WARN(priv,
1379                          "uCode alternative %d not available, choosing %d\n",
1380                          tmp, wanted_alternative);
1381
1382         priv->ucode_ver = le32_to_cpu(ucode->ver);
1383         pieces->build = le32_to_cpu(ucode->build);
1384         data = ucode->data;
1385
1386         len -= sizeof(*ucode);
1387
1388         while (len >= sizeof(*tlv)) {
1389                 u16 tlv_alt;
1390
1391                 len -= sizeof(*tlv);
1392                 tlv = (void *)data;
1393
1394                 tlv_len = le32_to_cpu(tlv->length);
1395                 tlv_type = le16_to_cpu(tlv->type);
1396                 tlv_alt = le16_to_cpu(tlv->alternative);
1397                 tlv_data = tlv->data;
1398
1399                 if (len < tlv_len) {
1400                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1401                                 len, tlv_len);
1402                         return -EINVAL;
1403                 }
1404                 len -= ALIGN(tlv_len, 4);
1405                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1406
1407                 /*
1408                  * Alternative 0 is always valid.
1409                  *
1410                  * Skip alternative TLVs that are not selected.
1411                  */
1412                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1413                         continue;
1414
1415                 switch (tlv_type) {
1416                 case IWL_UCODE_TLV_INST:
1417                         pieces->inst = tlv_data;
1418                         pieces->inst_size = tlv_len;
1419                         break;
1420                 case IWL_UCODE_TLV_DATA:
1421                         pieces->data = tlv_data;
1422                         pieces->data_size = tlv_len;
1423                         break;
1424                 case IWL_UCODE_TLV_INIT:
1425                         pieces->init = tlv_data;
1426                         pieces->init_size = tlv_len;
1427                         break;
1428                 case IWL_UCODE_TLV_INIT_DATA:
1429                         pieces->init_data = tlv_data;
1430                         pieces->init_data_size = tlv_len;
1431                         break;
1432                 case IWL_UCODE_TLV_BOOT:
1433                         IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1434                         break;
1435                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1436                         if (tlv_len != sizeof(u32))
1437                                 goto invalid_tlv_len;
1438                         capa->max_probe_length =
1439                                         le32_to_cpup((__le32 *)tlv_data);
1440                         break;
1441                 case IWL_UCODE_TLV_PAN:
1442                         if (tlv_len)
1443                                 goto invalid_tlv_len;
1444                         capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1445                         break;
1446                 case IWL_UCODE_TLV_FLAGS:
1447                         /* must be at least one u32 */
1448                         if (tlv_len < sizeof(u32))
1449                                 goto invalid_tlv_len;
1450                         /* and a proper number of u32s */
1451                         if (tlv_len % sizeof(u32))
1452                                 goto invalid_tlv_len;
1453                         /*
1454                          * This driver only reads the first u32 as
1455                          * right now no more features are defined,
1456                          * if that changes then either the driver
1457                          * will not work with the new firmware, or
1458                          * it'll not take advantage of new features.
1459                          */
1460                         capa->flags = le32_to_cpup((__le32 *)tlv_data);
1461                         break;
1462                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1463                         if (tlv_len != sizeof(u32))
1464                                 goto invalid_tlv_len;
1465                         pieces->init_evtlog_ptr =
1466                                         le32_to_cpup((__le32 *)tlv_data);
1467                         break;
1468                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1469                         if (tlv_len != sizeof(u32))
1470                                 goto invalid_tlv_len;
1471                         pieces->init_evtlog_size =
1472                                         le32_to_cpup((__le32 *)tlv_data);
1473                         break;
1474                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1475                         if (tlv_len != sizeof(u32))
1476                                 goto invalid_tlv_len;
1477                         pieces->init_errlog_ptr =
1478                                         le32_to_cpup((__le32 *)tlv_data);
1479                         break;
1480                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1481                         if (tlv_len != sizeof(u32))
1482                                 goto invalid_tlv_len;
1483                         pieces->inst_evtlog_ptr =
1484                                         le32_to_cpup((__le32 *)tlv_data);
1485                         break;
1486                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1487                         if (tlv_len != sizeof(u32))
1488                                 goto invalid_tlv_len;
1489                         pieces->inst_evtlog_size =
1490                                         le32_to_cpup((__le32 *)tlv_data);
1491                         break;
1492                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1493                         if (tlv_len != sizeof(u32))
1494                                 goto invalid_tlv_len;
1495                         pieces->inst_errlog_ptr =
1496                                         le32_to_cpup((__le32 *)tlv_data);
1497                         break;
1498                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1499                         if (tlv_len)
1500                                 goto invalid_tlv_len;
1501                         priv->enhance_sensitivity_table = true;
1502                         break;
1503                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1504                         if (tlv_len != sizeof(u32))
1505                                 goto invalid_tlv_len;
1506                         capa->standard_phy_calibration_size =
1507                                         le32_to_cpup((__le32 *)tlv_data);
1508                         break;
1509                 default:
1510                         IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
1511                         break;
1512                 }
1513         }
1514
1515         if (len) {
1516                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1517                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1518                 return -EINVAL;
1519         }
1520
1521         return 0;
1522
1523  invalid_tlv_len:
1524         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1525         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1526
1527         return -EINVAL;
1528 }
1529
1530 /**
1531  * iwl_ucode_callback - callback when firmware was loaded
1532  *
1533  * If loaded successfully, copies the firmware into buffers
1534  * for the card to fetch (via DMA).
1535  */
1536 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1537 {
1538         struct iwl_priv *priv = context;
1539         struct iwl_ucode_header *ucode;
1540         int err;
1541         struct iwlagn_firmware_pieces pieces;
1542         const unsigned int api_max = priv->cfg->ucode_api_max;
1543         const unsigned int api_min = priv->cfg->ucode_api_min;
1544         u32 api_ver;
1545         char buildstr[25];
1546         u32 build;
1547         struct iwlagn_ucode_capabilities ucode_capa = {
1548                 .max_probe_length = 200,
1549                 .standard_phy_calibration_size =
1550                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1551         };
1552
1553         memset(&pieces, 0, sizeof(pieces));
1554
1555         if (!ucode_raw) {
1556                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1557                         IWL_ERR(priv,
1558                                 "request for firmware file '%s' failed.\n",
1559                                 priv->firmware_name);
1560                 goto try_again;
1561         }
1562
1563         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1564                        priv->firmware_name, ucode_raw->size);
1565
1566         /* Make sure that we got at least the API version number */
1567         if (ucode_raw->size < 4) {
1568                 IWL_ERR(priv, "File size way too small!\n");
1569                 goto try_again;
1570         }
1571
1572         /* Data from ucode file:  header followed by uCode images */
1573         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1574
1575         if (ucode->ver)
1576                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1577         else
1578                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1579                                            &ucode_capa);
1580
1581         if (err)
1582                 goto try_again;
1583
1584         api_ver = IWL_UCODE_API(priv->ucode_ver);
1585         build = pieces.build;
1586
1587         /*
1588          * api_ver should match the api version forming part of the
1589          * firmware filename ... but we don't check for that and only rely
1590          * on the API version read from firmware header from here on forward
1591          */
1592         /* no api version check required for experimental uCode */
1593         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1594                 if (api_ver < api_min || api_ver > api_max) {
1595                         IWL_ERR(priv,
1596                                 "Driver unable to support your firmware API. "
1597                                 "Driver supports v%u, firmware is v%u.\n",
1598                                 api_max, api_ver);
1599                         goto try_again;
1600                 }
1601
1602                 if (api_ver != api_max)
1603                         IWL_ERR(priv,
1604                                 "Firmware has old API version. Expected v%u, "
1605                                 "got v%u. New firmware can be obtained "
1606                                 "from http://www.intellinuxwireless.org.\n",
1607                                 api_max, api_ver);
1608         }
1609
1610         if (build)
1611                 sprintf(buildstr, " build %u%s", build,
1612                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1613                                 ? " (EXP)" : "");
1614         else
1615                 buildstr[0] = '\0';
1616
1617         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1618                  IWL_UCODE_MAJOR(priv->ucode_ver),
1619                  IWL_UCODE_MINOR(priv->ucode_ver),
1620                  IWL_UCODE_API(priv->ucode_ver),
1621                  IWL_UCODE_SERIAL(priv->ucode_ver),
1622                  buildstr);
1623
1624         snprintf(priv->hw->wiphy->fw_version,
1625                  sizeof(priv->hw->wiphy->fw_version),
1626                  "%u.%u.%u.%u%s",
1627                  IWL_UCODE_MAJOR(priv->ucode_ver),
1628                  IWL_UCODE_MINOR(priv->ucode_ver),
1629                  IWL_UCODE_API(priv->ucode_ver),
1630                  IWL_UCODE_SERIAL(priv->ucode_ver),
1631                  buildstr);
1632
1633         /*
1634          * For any of the failures below (before allocating pci memory)
1635          * we will try to load a version with a smaller API -- maybe the
1636          * user just got a corrupted version of the latest API.
1637          */
1638
1639         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1640                        priv->ucode_ver);
1641         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1642                        pieces.inst_size);
1643         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1644                        pieces.data_size);
1645         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1646                        pieces.init_size);
1647         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1648                        pieces.init_data_size);
1649
1650         /* Verify that uCode images will fit in card's SRAM */
1651         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1652                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1653                         pieces.inst_size);
1654                 goto try_again;
1655         }
1656
1657         if (pieces.data_size > priv->hw_params.max_data_size) {
1658                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1659                         pieces.data_size);
1660                 goto try_again;
1661         }
1662
1663         if (pieces.init_size > priv->hw_params.max_inst_size) {
1664                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1665                         pieces.init_size);
1666                 goto try_again;
1667         }
1668
1669         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1670                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1671                         pieces.init_data_size);
1672                 goto try_again;
1673         }
1674
1675         /* Allocate ucode buffers for card's bus-master loading ... */
1676
1677         /* Runtime instructions and 2 copies of data:
1678          * 1) unmodified from disk
1679          * 2) backup cache for save/restore during power-downs */
1680         if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.code,
1681                               pieces.inst, pieces.inst_size))
1682                 goto err_pci_alloc;
1683         if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.data,
1684                               pieces.data, pieces.data_size))
1685                 goto err_pci_alloc;
1686
1687         /* Initialization instructions and data */
1688         if (pieces.init_size && pieces.init_data_size) {
1689                 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.code,
1690                                       pieces.init, pieces.init_size))
1691                         goto err_pci_alloc;
1692                 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.data,
1693                                       pieces.init_data, pieces.init_data_size))
1694                         goto err_pci_alloc;
1695         }
1696
1697         /* Now that we can no longer fail, copy information */
1698
1699         /*
1700          * The (size - 16) / 12 formula is based on the information recorded
1701          * for each event, which is of mode 1 (including timestamp) for all
1702          * new microcodes that include this information.
1703          */
1704         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1705         if (pieces.init_evtlog_size)
1706                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1707         else
1708                 priv->_agn.init_evtlog_size =
1709                         priv->cfg->base_params->max_event_log_size;
1710         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1711         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1712         if (pieces.inst_evtlog_size)
1713                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1714         else
1715                 priv->_agn.inst_evtlog_size =
1716                         priv->cfg->base_params->max_event_log_size;
1717         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1718
1719         priv->new_scan_threshold_behaviour =
1720                 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
1721
1722         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1723                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1724                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1725         } else
1726                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1727
1728         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1729                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1730         else
1731                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1732
1733         /*
1734          * figure out the offset of chain noise reset and gain commands
1735          * base on the size of standard phy calibration commands table size
1736          */
1737         if (ucode_capa.standard_phy_calibration_size >
1738             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1739                 ucode_capa.standard_phy_calibration_size =
1740                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1741
1742         priv->_agn.phy_calib_chain_noise_reset_cmd =
1743                 ucode_capa.standard_phy_calibration_size;
1744         priv->_agn.phy_calib_chain_noise_gain_cmd =
1745                 ucode_capa.standard_phy_calibration_size + 1;
1746
1747         /**************************************************
1748          * This is still part of probe() in a sense...
1749          *
1750          * 9. Setup and register with mac80211 and debugfs
1751          **************************************************/
1752         err = iwl_mac_setup_register(priv, &ucode_capa);
1753         if (err)
1754                 goto out_unbind;
1755
1756         err = iwl_dbgfs_register(priv, DRV_NAME);
1757         if (err)
1758                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1759
1760         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1761                                         &iwl_attribute_group);
1762         if (err) {
1763                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1764                 goto out_unbind;
1765         }
1766
1767         /* We have our copies now, allow OS release its copies */
1768         release_firmware(ucode_raw);
1769         complete(&priv->_agn.firmware_loading_complete);
1770         return;
1771
1772  try_again:
1773         /* try next, if any */
1774         if (iwl_request_firmware(priv, false))
1775                 goto out_unbind;
1776         release_firmware(ucode_raw);
1777         return;
1778
1779  err_pci_alloc:
1780         IWL_ERR(priv, "failed to allocate pci memory\n");
1781         iwl_dealloc_ucode_pci(priv);
1782  out_unbind:
1783         complete(&priv->_agn.firmware_loading_complete);
1784         device_release_driver(&priv->pci_dev->dev);
1785         release_firmware(ucode_raw);
1786 }
1787
1788 static const char *desc_lookup_text[] = {
1789         "OK",
1790         "FAIL",
1791         "BAD_PARAM",
1792         "BAD_CHECKSUM",
1793         "NMI_INTERRUPT_WDG",
1794         "SYSASSERT",
1795         "FATAL_ERROR",
1796         "BAD_COMMAND",
1797         "HW_ERROR_TUNE_LOCK",
1798         "HW_ERROR_TEMPERATURE",
1799         "ILLEGAL_CHAN_FREQ",
1800         "VCC_NOT_STABLE",
1801         "FH_ERROR",
1802         "NMI_INTERRUPT_HOST",
1803         "NMI_INTERRUPT_ACTION_PT",
1804         "NMI_INTERRUPT_UNKNOWN",
1805         "UCODE_VERSION_MISMATCH",
1806         "HW_ERROR_ABS_LOCK",
1807         "HW_ERROR_CAL_LOCK_FAIL",
1808         "NMI_INTERRUPT_INST_ACTION_PT",
1809         "NMI_INTERRUPT_DATA_ACTION_PT",
1810         "NMI_TRM_HW_ER",
1811         "NMI_INTERRUPT_TRM",
1812         "NMI_INTERRUPT_BREAK_POINT"
1813         "DEBUG_0",
1814         "DEBUG_1",
1815         "DEBUG_2",
1816         "DEBUG_3",
1817 };
1818
1819 static struct { char *name; u8 num; } advanced_lookup[] = {
1820         { "NMI_INTERRUPT_WDG", 0x34 },
1821         { "SYSASSERT", 0x35 },
1822         { "UCODE_VERSION_MISMATCH", 0x37 },
1823         { "BAD_COMMAND", 0x38 },
1824         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1825         { "FATAL_ERROR", 0x3D },
1826         { "NMI_TRM_HW_ERR", 0x46 },
1827         { "NMI_INTERRUPT_TRM", 0x4C },
1828         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1829         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1830         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1831         { "NMI_INTERRUPT_HOST", 0x66 },
1832         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1833         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1834         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1835         { "ADVANCED_SYSASSERT", 0 },
1836 };
1837
1838 static const char *desc_lookup(u32 num)
1839 {
1840         int i;
1841         int max = ARRAY_SIZE(desc_lookup_text);
1842
1843         if (num < max)
1844                 return desc_lookup_text[num];
1845
1846         max = ARRAY_SIZE(advanced_lookup) - 1;
1847         for (i = 0; i < max; i++) {
1848                 if (advanced_lookup[i].num == num)
1849                         break;;
1850         }
1851         return advanced_lookup[i].name;
1852 }
1853
1854 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1855 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1856
1857 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1858 {
1859         u32 data2, line;
1860         u32 desc, time, count, base, data1;
1861         u32 blink1, blink2, ilink1, ilink2;
1862         u32 pc, hcmd;
1863         struct iwl_error_event_table table;
1864
1865         base = priv->device_pointers.error_event_table;
1866         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1867                 if (!base)
1868                         base = priv->_agn.init_errlog_ptr;
1869         } else {
1870                 if (!base)
1871                         base = priv->_agn.inst_errlog_ptr;
1872         }
1873
1874         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1875                 IWL_ERR(priv,
1876                         "Not valid error log pointer 0x%08X for %s uCode\n",
1877                         base,
1878                         (priv->ucode_type == UCODE_SUBTYPE_INIT)
1879                                         ? "Init" : "RT");
1880                 return;
1881         }
1882
1883         iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
1884
1885         count = table.valid;
1886
1887         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1888                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1889                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1890                         priv->status, count);
1891         }
1892
1893         desc = table.error_id;
1894         priv->isr_stats.err_code = desc;
1895         pc = table.pc;
1896         blink1 = table.blink1;
1897         blink2 = table.blink2;
1898         ilink1 = table.ilink1;
1899         ilink2 = table.ilink2;
1900         data1 = table.data1;
1901         data2 = table.data2;
1902         line = table.line;
1903         time = table.tsf_low;
1904         hcmd = table.hcmd;
1905
1906         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1907                                       blink1, blink2, ilink1, ilink2);
1908
1909         IWL_ERR(priv, "Desc                                  Time       "
1910                 "data1      data2      line\n");
1911         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1912                 desc_lookup(desc), desc, time, data1, data2, line);
1913         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1914         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1915                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1916 }
1917
1918 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1919
1920 /**
1921  * iwl_print_event_log - Dump error event log to syslog
1922  *
1923  */
1924 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1925                                u32 num_events, u32 mode,
1926                                int pos, char **buf, size_t bufsz)
1927 {
1928         u32 i;
1929         u32 base;       /* SRAM byte address of event log header */
1930         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1931         u32 ptr;        /* SRAM byte address of log data */
1932         u32 ev, time, data; /* event log data */
1933         unsigned long reg_flags;
1934
1935         if (num_events == 0)
1936                 return pos;
1937
1938         base = priv->device_pointers.log_event_table;
1939         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1940                 if (!base)
1941                         base = priv->_agn.init_evtlog_ptr;
1942         } else {
1943                 if (!base)
1944                         base = priv->_agn.inst_evtlog_ptr;
1945         }
1946
1947         if (mode == 0)
1948                 event_size = 2 * sizeof(u32);
1949         else
1950                 event_size = 3 * sizeof(u32);
1951
1952         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1953
1954         /* Make sure device is powered up for SRAM reads */
1955         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1956         iwl_grab_nic_access(priv);
1957
1958         /* Set starting address; reads will auto-increment */
1959         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
1960         rmb();
1961
1962         /* "time" is actually "data" for mode 0 (no timestamp).
1963         * place event id # at far right for easier visual parsing. */
1964         for (i = 0; i < num_events; i++) {
1965                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1966                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1967                 if (mode == 0) {
1968                         /* data, ev */
1969                         if (bufsz) {
1970                                 pos += scnprintf(*buf + pos, bufsz - pos,
1971                                                 "EVT_LOG:0x%08x:%04u\n",
1972                                                 time, ev);
1973                         } else {
1974                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1975                                         time, ev);
1976                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1977                                         time, ev);
1978                         }
1979                 } else {
1980                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1981                         if (bufsz) {
1982                                 pos += scnprintf(*buf + pos, bufsz - pos,
1983                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1984                                                  time, data, ev);
1985                         } else {
1986                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1987                                         time, data, ev);
1988                                 trace_iwlwifi_dev_ucode_event(priv, time,
1989                                         data, ev);
1990                         }
1991                 }
1992         }
1993
1994         /* Allow device to power down */
1995         iwl_release_nic_access(priv);
1996         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1997         return pos;
1998 }
1999
2000 /**
2001  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2002  */
2003 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2004                                     u32 num_wraps, u32 next_entry,
2005                                     u32 size, u32 mode,
2006                                     int pos, char **buf, size_t bufsz)
2007 {
2008         /*
2009          * display the newest DEFAULT_LOG_ENTRIES entries
2010          * i.e the entries just before the next ont that uCode would fill.
2011          */
2012         if (num_wraps) {
2013                 if (next_entry < size) {
2014                         pos = iwl_print_event_log(priv,
2015                                                 capacity - (size - next_entry),
2016                                                 size - next_entry, mode,
2017                                                 pos, buf, bufsz);
2018                         pos = iwl_print_event_log(priv, 0,
2019                                                   next_entry, mode,
2020                                                   pos, buf, bufsz);
2021                 } else
2022                         pos = iwl_print_event_log(priv, next_entry - size,
2023                                                   size, mode, pos, buf, bufsz);
2024         } else {
2025                 if (next_entry < size) {
2026                         pos = iwl_print_event_log(priv, 0, next_entry,
2027                                                   mode, pos, buf, bufsz);
2028                 } else {
2029                         pos = iwl_print_event_log(priv, next_entry - size,
2030                                                   size, mode, pos, buf, bufsz);
2031                 }
2032         }
2033         return pos;
2034 }
2035
2036 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2037
2038 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2039                             char **buf, bool display)
2040 {
2041         u32 base;       /* SRAM byte address of event log header */
2042         u32 capacity;   /* event log capacity in # entries */
2043         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2044         u32 num_wraps;  /* # times uCode wrapped to top of log */
2045         u32 next_entry; /* index of next entry to be written by uCode */
2046         u32 size;       /* # entries that we'll print */
2047         u32 logsize;
2048         int pos = 0;
2049         size_t bufsz = 0;
2050
2051         base = priv->device_pointers.log_event_table;
2052         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2053                 logsize = priv->_agn.init_evtlog_size;
2054                 if (!base)
2055                         base = priv->_agn.init_evtlog_ptr;
2056         } else {
2057                 logsize = priv->_agn.inst_evtlog_size;
2058                 if (!base)
2059                         base = priv->_agn.inst_evtlog_ptr;
2060         }
2061
2062         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2063                 IWL_ERR(priv,
2064                         "Invalid event log pointer 0x%08X for %s uCode\n",
2065                         base,
2066                         (priv->ucode_type == UCODE_SUBTYPE_INIT)
2067                                         ? "Init" : "RT");
2068                 return -EINVAL;
2069         }
2070
2071         /* event log header */
2072         capacity = iwl_read_targ_mem(priv, base);
2073         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2074         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2075         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2076
2077         if (capacity > logsize) {
2078                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2079                         capacity, logsize);
2080                 capacity = logsize;
2081         }
2082
2083         if (next_entry > logsize) {
2084                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2085                         next_entry, logsize);
2086                 next_entry = logsize;
2087         }
2088
2089         size = num_wraps ? capacity : next_entry;
2090
2091         /* bail out if nothing in log */
2092         if (size == 0) {
2093                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2094                 return pos;
2095         }
2096
2097         /* enable/disable bt channel inhibition */
2098         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2099
2100 #ifdef CONFIG_IWLWIFI_DEBUG
2101         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2102                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2103                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2104 #else
2105         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2106                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2107 #endif
2108         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2109                 size);
2110
2111 #ifdef CONFIG_IWLWIFI_DEBUG
2112         if (display) {
2113                 if (full_log)
2114                         bufsz = capacity * 48;
2115                 else
2116                         bufsz = size * 48;
2117                 *buf = kmalloc(bufsz, GFP_KERNEL);
2118                 if (!*buf)
2119                         return -ENOMEM;
2120         }
2121         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2122                 /*
2123                  * if uCode has wrapped back to top of log,
2124                  * start at the oldest entry,
2125                  * i.e the next one that uCode would fill.
2126                  */
2127                 if (num_wraps)
2128                         pos = iwl_print_event_log(priv, next_entry,
2129                                                 capacity - next_entry, mode,
2130                                                 pos, buf, bufsz);
2131                 /* (then/else) start at top of log */
2132                 pos = iwl_print_event_log(priv, 0,
2133                                           next_entry, mode, pos, buf, bufsz);
2134         } else
2135                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2136                                                 next_entry, size, mode,
2137                                                 pos, buf, bufsz);
2138 #else
2139         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2140                                         next_entry, size, mode,
2141                                         pos, buf, bufsz);
2142 #endif
2143         return pos;
2144 }
2145
2146 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2147 {
2148         struct iwl_ct_kill_config cmd;
2149         struct iwl_ct_kill_throttling_config adv_cmd;
2150         unsigned long flags;
2151         int ret = 0;
2152
2153         spin_lock_irqsave(&priv->lock, flags);
2154         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2155                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2156         spin_unlock_irqrestore(&priv->lock, flags);
2157         priv->thermal_throttle.ct_kill_toggle = false;
2158
2159         if (priv->cfg->base_params->support_ct_kill_exit) {
2160                 adv_cmd.critical_temperature_enter =
2161                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2162                 adv_cmd.critical_temperature_exit =
2163                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2164
2165                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2166                                        sizeof(adv_cmd), &adv_cmd);
2167                 if (ret)
2168                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2169                 else
2170                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2171                                         "succeeded, "
2172                                         "critical temperature enter is %d,"
2173                                         "exit is %d\n",
2174                                        priv->hw_params.ct_kill_threshold,
2175                                        priv->hw_params.ct_kill_exit_threshold);
2176         } else {
2177                 cmd.critical_temperature_R =
2178                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2179
2180                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2181                                        sizeof(cmd), &cmd);
2182                 if (ret)
2183                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2184                 else
2185                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2186                                         "succeeded, "
2187                                         "critical temperature is %d\n",
2188                                         priv->hw_params.ct_kill_threshold);
2189         }
2190 }
2191
2192 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2193 {
2194         struct iwl_calib_cfg_cmd calib_cfg_cmd;
2195         struct iwl_host_cmd cmd = {
2196                 .id = CALIBRATION_CFG_CMD,
2197                 .len = sizeof(struct iwl_calib_cfg_cmd),
2198                 .data = &calib_cfg_cmd,
2199         };
2200
2201         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
2202         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
2203         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
2204
2205         return iwl_send_cmd(priv, &cmd);
2206 }
2207
2208
2209 /**
2210  * iwl_alive_start - called after REPLY_ALIVE notification received
2211  *                   from protocol/runtime uCode (initialization uCode's
2212  *                   Alive gets handled by iwl_init_alive_start()).
2213  */
2214 static int iwl_alive_start(struct iwl_priv *priv)
2215 {
2216         int ret = 0;
2217         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2218
2219         iwl_reset_ict(priv);
2220
2221         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2222
2223         /* After the ALIVE response, we can send host commands to the uCode */
2224         set_bit(STATUS_ALIVE, &priv->status);
2225
2226         /* Enable watchdog to monitor the driver tx queues */
2227         iwl_setup_watchdog(priv);
2228
2229         if (iwl_is_rfkill(priv))
2230                 return -ERFKILL;
2231
2232         /* download priority table before any calibration request */
2233         if (priv->cfg->bt_params &&
2234             priv->cfg->bt_params->advanced_bt_coexist) {
2235                 /* Configure Bluetooth device coexistence support */
2236                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2237                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2238                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2239                 priv->cfg->ops->hcmd->send_bt_config(priv);
2240                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2241                 iwlagn_send_prio_tbl(priv);
2242
2243                 /* FIXME: w/a to force change uCode BT state machine */
2244                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2245                                          BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2246                 if (ret)
2247                         return ret;
2248                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2249                                          BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2250                 if (ret)
2251                         return ret;
2252         }
2253         if (priv->hw_params.calib_rt_cfg)
2254                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2255
2256         ieee80211_wake_queues(priv->hw);
2257
2258         priv->active_rate = IWL_RATES_MASK;
2259
2260         /* Configure Tx antenna selection based on H/W config */
2261         if (priv->cfg->ops->hcmd->set_tx_ant)
2262                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2263
2264         if (iwl_is_associated_ctx(ctx)) {
2265                 struct iwl_rxon_cmd *active_rxon =
2266                                 (struct iwl_rxon_cmd *)&ctx->active;
2267                 /* apply any changes in staging */
2268                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2269                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2270         } else {
2271                 struct iwl_rxon_context *tmp;
2272                 /* Initialize our rx_config data */
2273                 for_each_context(priv, tmp)
2274                         iwl_connection_init_rx_config(priv, tmp);
2275
2276                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2277                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2278         }
2279
2280         if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2281             !priv->cfg->bt_params->advanced_bt_coexist)) {
2282                 /*
2283                  * default is 2-wire BT coexexistence support
2284                  */
2285                 priv->cfg->ops->hcmd->send_bt_config(priv);
2286         }
2287
2288         iwl_reset_run_time_calib(priv);
2289
2290         set_bit(STATUS_READY, &priv->status);
2291
2292         /* Configure the adapter for unassociated operation */
2293         ret = iwlcore_commit_rxon(priv, ctx);
2294         if (ret)
2295                 return ret;
2296
2297         /* At this point, the NIC is initialized and operational */
2298         iwl_rf_kill_ct_config(priv);
2299
2300         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2301
2302         return iwl_power_update_mode(priv, true);
2303 }
2304
2305 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2306
2307 static void __iwl_down(struct iwl_priv *priv)
2308 {
2309         int exit_pending;
2310
2311         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2312
2313         iwl_scan_cancel_timeout(priv, 200);
2314
2315         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2316
2317         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2318          * to prevent rearm timer */
2319         del_timer_sync(&priv->watchdog);
2320
2321         iwl_clear_ucode_stations(priv, NULL);
2322         iwl_dealloc_bcast_stations(priv);
2323         iwl_clear_driver_stations(priv);
2324
2325         /* reset BT coex data */
2326         priv->bt_status = 0;
2327         if (priv->cfg->bt_params)
2328                 priv->bt_traffic_load =
2329                          priv->cfg->bt_params->bt_init_traffic_load;
2330         else
2331                 priv->bt_traffic_load = 0;
2332         priv->bt_full_concurrent = false;
2333         priv->bt_ci_compliance = 0;
2334
2335         /* Wipe out the EXIT_PENDING status bit if we are not actually
2336          * exiting the module */
2337         if (!exit_pending)
2338                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2339
2340         if (priv->mac80211_registered)
2341                 ieee80211_stop_queues(priv->hw);
2342
2343         /* Clear out all status bits but a few that are stable across reset */
2344         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2345                                 STATUS_RF_KILL_HW |
2346                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2347                                 STATUS_GEO_CONFIGURED |
2348                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2349                                 STATUS_FW_ERROR |
2350                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2351                                 STATUS_EXIT_PENDING;
2352
2353         iwlagn_stop_device(priv);
2354
2355         dev_kfree_skb(priv->beacon_skb);
2356         priv->beacon_skb = NULL;
2357
2358         /* clear out any free frames */
2359         iwl_clear_free_frames(priv);
2360 }
2361
2362 static void iwl_down(struct iwl_priv *priv)
2363 {
2364         mutex_lock(&priv->mutex);
2365         __iwl_down(priv);
2366         mutex_unlock(&priv->mutex);
2367
2368         iwl_cancel_deferred_work(priv);
2369 }
2370
2371 #define HW_READY_TIMEOUT (50)
2372
2373 /* Note: returns poll_bit return value, which is >= 0 if success */
2374 static int iwl_set_hw_ready(struct iwl_priv *priv)
2375 {
2376         int ret;
2377
2378         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2379                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2380
2381         /* See if we got it */
2382         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2383                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2384                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2385                                 HW_READY_TIMEOUT);
2386
2387         IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
2388         return ret;
2389 }
2390
2391 /* Note: returns standard 0/-ERROR code */
2392 int iwl_prepare_card_hw(struct iwl_priv *priv)
2393 {
2394         int ret;
2395
2396         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2397
2398         ret = iwl_set_hw_ready(priv);
2399         if (ret >= 0)
2400                 return 0;
2401
2402         /* If HW is not ready, prepare the conditions to check again */
2403         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2404                         CSR_HW_IF_CONFIG_REG_PREPARE);
2405
2406         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2407                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2408                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2409
2410         if (ret < 0)
2411                 return ret;
2412
2413         /* HW should be ready by now, check again. */
2414         ret = iwl_set_hw_ready(priv);
2415         if (ret >= 0)
2416                 return 0;
2417         return ret;
2418 }
2419
2420 #define MAX_HW_RESTARTS 5
2421
2422 static int __iwl_up(struct iwl_priv *priv)
2423 {
2424         struct iwl_rxon_context *ctx;
2425         int ret;
2426
2427         lockdep_assert_held(&priv->mutex);
2428
2429         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2430                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2431                 return -EIO;
2432         }
2433
2434         for_each_context(priv, ctx) {
2435                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2436                 if (ret) {
2437                         iwl_dealloc_bcast_stations(priv);
2438                         return ret;
2439                 }
2440         }
2441
2442         ret = iwlagn_run_init_ucode(priv);
2443         if (ret) {
2444                 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
2445                 goto error;
2446         }
2447
2448         ret = iwlagn_load_ucode_wait_alive(priv,
2449                                            &priv->ucode_rt,
2450                                            UCODE_SUBTYPE_REGULAR,
2451                                            UCODE_SUBTYPE_REGULAR_NEW);
2452         if (ret) {
2453                 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
2454                 goto error;
2455         }
2456
2457         ret = iwl_alive_start(priv);
2458         if (ret)
2459                 goto error;
2460         return 0;
2461
2462  error:
2463         set_bit(STATUS_EXIT_PENDING, &priv->status);
2464         __iwl_down(priv);
2465         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2466
2467         IWL_ERR(priv, "Unable to initialize device.\n");
2468         return ret;
2469 }
2470
2471
2472 /*****************************************************************************
2473  *
2474  * Workqueue callbacks
2475  *
2476  *****************************************************************************/
2477
2478 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2479 {
2480         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2481                         run_time_calib_work);
2482
2483         mutex_lock(&priv->mutex);
2484
2485         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2486             test_bit(STATUS_SCANNING, &priv->status)) {
2487                 mutex_unlock(&priv->mutex);
2488                 return;
2489         }
2490
2491         if (priv->start_calib) {
2492                 iwl_chain_noise_calibration(priv);
2493                 iwl_sensitivity_calibration(priv);
2494         }
2495
2496         mutex_unlock(&priv->mutex);
2497 }
2498
2499 static void iwlagn_prepare_restart(struct iwl_priv *priv)
2500 {
2501         struct iwl_rxon_context *ctx;
2502         bool bt_full_concurrent;
2503         u8 bt_ci_compliance;
2504         u8 bt_load;
2505         u8 bt_status;
2506
2507         lockdep_assert_held(&priv->mutex);
2508
2509         for_each_context(priv, ctx)
2510                 ctx->vif = NULL;
2511         priv->is_open = 0;
2512
2513         /*
2514          * __iwl_down() will clear the BT status variables,
2515          * which is correct, but when we restart we really
2516          * want to keep them so restore them afterwards.
2517          *
2518          * The restart process will later pick them up and
2519          * re-configure the hw when we reconfigure the BT
2520          * command.
2521          */
2522         bt_full_concurrent = priv->bt_full_concurrent;
2523         bt_ci_compliance = priv->bt_ci_compliance;
2524         bt_load = priv->bt_traffic_load;
2525         bt_status = priv->bt_status;
2526
2527         __iwl_down(priv);
2528
2529         priv->bt_full_concurrent = bt_full_concurrent;
2530         priv->bt_ci_compliance = bt_ci_compliance;
2531         priv->bt_traffic_load = bt_load;
2532         priv->bt_status = bt_status;
2533 }
2534
2535 static void iwl_bg_restart(struct work_struct *data)
2536 {
2537         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2538
2539         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2540                 return;
2541
2542         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2543                 mutex_lock(&priv->mutex);
2544                 iwlagn_prepare_restart(priv);
2545                 mutex_unlock(&priv->mutex);
2546                 iwl_cancel_deferred_work(priv);
2547                 ieee80211_restart_hw(priv->hw);
2548         } else {
2549                 WARN_ON(1);
2550         }
2551 }
2552
2553 static void iwl_bg_rx_replenish(struct work_struct *data)
2554 {
2555         struct iwl_priv *priv =
2556             container_of(data, struct iwl_priv, rx_replenish);
2557
2558         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2559                 return;
2560
2561         mutex_lock(&priv->mutex);
2562         iwlagn_rx_replenish(priv);
2563         mutex_unlock(&priv->mutex);
2564 }
2565
2566 static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2567                                  struct ieee80211_channel *chan,
2568                                  enum nl80211_channel_type channel_type,
2569                                  unsigned int wait)
2570 {
2571         struct iwl_priv *priv = hw->priv;
2572         int ret;
2573
2574         /* Not supported if we don't have PAN */
2575         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
2576                 ret = -EOPNOTSUPP;
2577                 goto free;
2578         }
2579
2580         /* Not supported on pre-P2P firmware */
2581         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2582                                         BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2583                 ret = -EOPNOTSUPP;
2584                 goto free;
2585         }
2586
2587         mutex_lock(&priv->mutex);
2588
2589         if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2590                 /*
2591                  * If the PAN context is free, use the normal
2592                  * way of doing remain-on-channel offload + TX.
2593                  */
2594                 ret = 1;
2595                 goto out;
2596         }
2597
2598         /* TODO: queue up if scanning? */
2599         if (test_bit(STATUS_SCANNING, &priv->status) ||
2600             priv->_agn.offchan_tx_skb) {
2601                 ret = -EBUSY;
2602                 goto out;
2603         }
2604
2605         /*
2606          * max_scan_ie_len doesn't include the blank SSID or the header,
2607          * so need to add that again here.
2608          */
2609         if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2610                 ret = -ENOBUFS;
2611                 goto out;
2612         }
2613
2614         priv->_agn.offchan_tx_skb = skb;
2615         priv->_agn.offchan_tx_timeout = wait;
2616         priv->_agn.offchan_tx_chan = chan;
2617
2618         ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2619                                 IWL_SCAN_OFFCH_TX, chan->band);
2620         if (ret)
2621                 priv->_agn.offchan_tx_skb = NULL;
2622  out:
2623         mutex_unlock(&priv->mutex);
2624  free:
2625         if (ret < 0)
2626                 kfree_skb(skb);
2627
2628         return ret;
2629 }
2630
2631 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2632 {
2633         struct iwl_priv *priv = hw->priv;
2634         int ret;
2635
2636         mutex_lock(&priv->mutex);
2637
2638         if (!priv->_agn.offchan_tx_skb) {
2639                 ret = -EINVAL;
2640                 goto unlock;
2641         }
2642
2643         priv->_agn.offchan_tx_skb = NULL;
2644
2645         ret = iwl_scan_cancel_timeout(priv, 200);
2646         if (ret)
2647                 ret = -EIO;
2648 unlock:
2649         mutex_unlock(&priv->mutex);
2650
2651         return ret;
2652 }
2653
2654 /*****************************************************************************
2655  *
2656  * mac80211 entry point functions
2657  *
2658  *****************************************************************************/
2659
2660 /*
2661  * Not a mac80211 entry point function, but it fits in with all the
2662  * other mac80211 functions grouped here.
2663  */
2664 static int iwl_mac_setup_register(struct iwl_priv *priv,
2665                                   struct iwlagn_ucode_capabilities *capa)
2666 {
2667         int ret;
2668         struct ieee80211_hw *hw = priv->hw;
2669         struct iwl_rxon_context *ctx;
2670
2671         hw->rate_control_algorithm = "iwl-agn-rs";
2672
2673         /* Tell mac80211 our characteristics */
2674         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2675                     IEEE80211_HW_AMPDU_AGGREGATION |
2676                     IEEE80211_HW_NEED_DTIM_PERIOD |
2677                     IEEE80211_HW_SPECTRUM_MGMT |
2678                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2679
2680         hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2681
2682         hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2683                      IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2684
2685         if (priv->cfg->sku & IWL_SKU_N)
2686                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2687                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2688
2689         if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2690                 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2691
2692         hw->sta_data_size = sizeof(struct iwl_station_priv);
2693         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2694
2695         for_each_context(priv, ctx) {
2696                 hw->wiphy->interface_modes |= ctx->interface_modes;
2697                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2698         }
2699
2700         hw->wiphy->max_remain_on_channel_duration = 1000;
2701
2702         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2703                             WIPHY_FLAG_DISABLE_BEACON_HINTS |
2704                             WIPHY_FLAG_IBSS_RSN;
2705
2706         /*
2707          * For now, disable PS by default because it affects
2708          * RX performance significantly.
2709          */
2710         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2711
2712         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2713         /* we create the 802.11 header and a zero-length SSID element */
2714         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2715
2716         /* Default value; 4 EDCA QOS priorities */
2717         hw->queues = 4;
2718
2719         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2720
2721         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2722                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2723                         &priv->bands[IEEE80211_BAND_2GHZ];
2724         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2725                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2726                         &priv->bands[IEEE80211_BAND_5GHZ];
2727
2728         iwl_leds_init(priv);
2729
2730         ret = ieee80211_register_hw(priv->hw);
2731         if (ret) {
2732                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2733                 return ret;
2734         }
2735         priv->mac80211_registered = 1;
2736
2737         return 0;
2738 }
2739
2740
2741 static int iwlagn_mac_start(struct ieee80211_hw *hw)
2742 {
2743         struct iwl_priv *priv = hw->priv;
2744         int ret;
2745
2746         IWL_DEBUG_MAC80211(priv, "enter\n");
2747
2748         /* we should be verifying the device is ready to be opened */
2749         mutex_lock(&priv->mutex);
2750         ret = __iwl_up(priv);
2751         mutex_unlock(&priv->mutex);
2752         if (ret)
2753                 return ret;
2754
2755         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2756
2757         /* Now we should be done, and the READY bit should be set. */
2758         if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
2759                 ret = -EIO;
2760
2761         iwlagn_led_enable(priv);
2762
2763         priv->is_open = 1;
2764         IWL_DEBUG_MAC80211(priv, "leave\n");
2765         return 0;
2766 }
2767
2768 static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2769 {
2770         struct iwl_priv *priv = hw->priv;
2771
2772         IWL_DEBUG_MAC80211(priv, "enter\n");
2773
2774         if (!priv->is_open)
2775                 return;
2776
2777         priv->is_open = 0;
2778
2779         iwl_down(priv);
2780
2781         flush_workqueue(priv->workqueue);
2782
2783         /* User space software may expect getting rfkill changes
2784          * even if interface is down */
2785         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2786         iwl_enable_rfkill_int(priv);
2787
2788         IWL_DEBUG_MAC80211(priv, "leave\n");
2789 }
2790
2791 static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2792 {
2793         struct iwl_priv *priv = hw->priv;
2794
2795         IWL_DEBUG_MACDUMP(priv, "enter\n");
2796
2797         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2798                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2799
2800         if (iwlagn_tx_skb(priv, skb))
2801                 dev_kfree_skb_any(skb);
2802
2803         IWL_DEBUG_MACDUMP(priv, "leave\n");
2804 }
2805
2806 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2807                                        struct ieee80211_vif *vif,
2808                                        struct ieee80211_key_conf *keyconf,
2809                                        struct ieee80211_sta *sta,
2810                                        u32 iv32, u16 *phase1key)
2811 {
2812         struct iwl_priv *priv = hw->priv;
2813         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2814
2815         IWL_DEBUG_MAC80211(priv, "enter\n");
2816
2817         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2818                             iv32, phase1key);
2819
2820         IWL_DEBUG_MAC80211(priv, "leave\n");
2821 }
2822
2823 static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2824                               struct ieee80211_vif *vif,
2825                               struct ieee80211_sta *sta,
2826                               struct ieee80211_key_conf *key)
2827 {
2828         struct iwl_priv *priv = hw->priv;
2829         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2830         struct iwl_rxon_context *ctx = vif_priv->ctx;
2831         int ret;
2832         u8 sta_id;
2833         bool is_default_wep_key = false;
2834
2835         IWL_DEBUG_MAC80211(priv, "enter\n");
2836
2837         if (iwlagn_mod_params.sw_crypto) {
2838                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2839                 return -EOPNOTSUPP;
2840         }
2841
2842         /*
2843          * To support IBSS RSN, don't program group keys in IBSS, the
2844          * hardware will then not attempt to decrypt the frames.
2845          */
2846         if (vif->type == NL80211_IFTYPE_ADHOC &&
2847             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2848                 return -EOPNOTSUPP;
2849
2850         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
2851         if (sta_id == IWL_INVALID_STATION)
2852                 return -EINVAL;
2853
2854         mutex_lock(&priv->mutex);
2855         iwl_scan_cancel_timeout(priv, 100);
2856
2857         /*
2858          * If we are getting WEP group key and we didn't receive any key mapping
2859          * so far, we are in legacy wep mode (group key only), otherwise we are
2860          * in 1X mode.
2861          * In legacy wep mode, we use another host command to the uCode.
2862          */
2863         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2864              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2865             !sta) {
2866                 if (cmd == SET_KEY)
2867                         is_default_wep_key = !ctx->key_mapping_keys;
2868                 else
2869                         is_default_wep_key =
2870                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2871         }
2872
2873         switch (cmd) {
2874         case SET_KEY:
2875                 if (is_default_wep_key)
2876                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
2877                 else
2878                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
2879                                                   key, sta_id);
2880
2881                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2882                 break;
2883         case DISABLE_KEY:
2884                 if (is_default_wep_key)
2885                         ret = iwl_remove_default_wep_key(priv, ctx, key);
2886                 else
2887                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
2888
2889                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2890                 break;
2891         default:
2892                 ret = -EINVAL;
2893         }
2894
2895         mutex_unlock(&priv->mutex);
2896         IWL_DEBUG_MAC80211(priv, "leave\n");
2897
2898         return ret;
2899 }
2900
2901 static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
2902                                    struct ieee80211_vif *vif,
2903                                    enum ieee80211_ampdu_mlme_action action,
2904                                    struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2905                                    u8 buf_size)
2906 {
2907         struct iwl_priv *priv = hw->priv;
2908         int ret = -EINVAL;
2909         struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
2910
2911         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2912                      sta->addr, tid);
2913
2914         if (!(priv->cfg->sku & IWL_SKU_N))
2915                 return -EACCES;
2916
2917         mutex_lock(&priv->mutex);
2918
2919         switch (action) {
2920         case IEEE80211_AMPDU_RX_START:
2921                 IWL_DEBUG_HT(priv, "start Rx\n");
2922                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
2923                 break;
2924         case IEEE80211_AMPDU_RX_STOP:
2925                 IWL_DEBUG_HT(priv, "stop Rx\n");
2926                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
2927                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2928                         ret = 0;
2929                 break;
2930         case IEEE80211_AMPDU_TX_START:
2931                 IWL_DEBUG_HT(priv, "start Tx\n");
2932                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
2933                 if (ret == 0) {
2934                         priv->_agn.agg_tids_count++;
2935                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2936                                      priv->_agn.agg_tids_count);
2937                 }
2938                 break;
2939         case IEEE80211_AMPDU_TX_STOP:
2940                 IWL_DEBUG_HT(priv, "stop Tx\n");
2941                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
2942                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2943                         priv->_agn.agg_tids_count--;
2944                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2945                                      priv->_agn.agg_tids_count);
2946                 }
2947                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2948                         ret = 0;
2949                 if (priv->cfg->ht_params &&
2950                     priv->cfg->ht_params->use_rts_for_aggregation) {
2951                         struct iwl_station_priv *sta_priv =
2952                                 (void *) sta->drv_priv;
2953                         /*
2954                          * switch off RTS/CTS if it was previously enabled
2955                          */
2956
2957                         sta_priv->lq_sta.lq.general_params.flags &=
2958                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
2959                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2960                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
2961                 }
2962                 break;
2963         case IEEE80211_AMPDU_TX_OPERATIONAL:
2964                 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
2965
2966                 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
2967
2968                 /*
2969                  * If the limit is 0, then it wasn't initialised yet,
2970                  * use the default. We can do that since we take the
2971                  * minimum below, and we don't want to go above our
2972                  * default due to hardware restrictions.
2973                  */
2974                 if (sta_priv->max_agg_bufsize == 0)
2975                         sta_priv->max_agg_bufsize =
2976                                 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2977
2978                 /*
2979                  * Even though in theory the peer could have different
2980                  * aggregation reorder buffer sizes for different sessions,
2981                  * our ucode doesn't allow for that and has a global limit
2982                  * for each station. Therefore, use the minimum of all the
2983                  * aggregation sessions and our default value.
2984                  */
2985                 sta_priv->max_agg_bufsize =
2986                         min(sta_priv->max_agg_bufsize, buf_size);
2987
2988                 if (priv->cfg->ht_params &&
2989                     priv->cfg->ht_params->use_rts_for_aggregation) {
2990                         /*
2991                          * switch to RTS/CTS if it is the prefer protection
2992                          * method for HT traffic
2993                          */
2994
2995                         sta_priv->lq_sta.lq.general_params.flags |=
2996                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
2997                 }
2998
2999                 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
3000                         sta_priv->max_agg_bufsize;
3001
3002                 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3003                                 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3004                 ret = 0;
3005                 break;
3006         }
3007         mutex_unlock(&priv->mutex);
3008
3009         return ret;
3010 }
3011
3012 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3013                               struct ieee80211_vif *vif,
3014                               struct ieee80211_sta *sta)
3015 {
3016         struct iwl_priv *priv = hw->priv;
3017         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3018         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3019         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3020         int ret;
3021         u8 sta_id;
3022
3023         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3024                         sta->addr);
3025         mutex_lock(&priv->mutex);
3026         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3027                         sta->addr);
3028         sta_priv->common.sta_id = IWL_INVALID_STATION;
3029
3030         atomic_set(&sta_priv->pending_frames, 0);
3031         if (vif->type == NL80211_IFTYPE_AP)
3032                 sta_priv->client = true;
3033
3034         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3035                                      is_ap, sta, &sta_id);
3036         if (ret) {
3037                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3038                         sta->addr, ret);
3039                 /* Should we return success if return code is EEXIST ? */
3040                 mutex_unlock(&priv->mutex);
3041                 return ret;
3042         }
3043
3044         sta_priv->common.sta_id = sta_id;
3045
3046         /* Initialize rate scaling */
3047         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3048                        sta->addr);
3049         iwl_rs_rate_init(priv, sta, sta_id);
3050         mutex_unlock(&priv->mutex);
3051
3052         return 0;
3053 }
3054
3055 static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3056                                 struct ieee80211_channel_switch *ch_switch)
3057 {
3058         struct iwl_priv *priv = hw->priv;
3059         const struct iwl_channel_info *ch_info;
3060         struct ieee80211_conf *conf = &hw->conf;
3061         struct ieee80211_channel *channel = ch_switch->channel;
3062         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3063         /*
3064          * MULTI-FIXME
3065          * When we add support for multiple interfaces, we need to
3066          * revisit this. The channel switch command in the device
3067          * only affects the BSS context, but what does that really
3068          * mean? And what if we get a CSA on the second interface?
3069          * This needs a lot of work.
3070          */
3071         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3072         u16 ch;
3073         unsigned long flags = 0;
3074
3075         IWL_DEBUG_MAC80211(priv, "enter\n");
3076
3077         mutex_lock(&priv->mutex);
3078
3079         if (iwl_is_rfkill(priv))
3080                 goto out;
3081
3082         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3083             test_bit(STATUS_SCANNING, &priv->status))
3084                 goto out;
3085
3086         if (!iwl_is_associated_ctx(ctx))
3087                 goto out;
3088
3089         /* channel switch in progress */
3090         if (priv->switch_rxon.switch_in_progress == true)
3091                 goto out;
3092
3093         if (priv->cfg->ops->lib->set_channel_switch) {
3094
3095                 ch = channel->hw_value;
3096                 if (le16_to_cpu(ctx->active.channel) != ch) {
3097                         ch_info = iwl_get_channel_info(priv,
3098                                                        channel->band,
3099                                                        ch);
3100                         if (!is_channel_valid(ch_info)) {
3101                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3102                                 goto out;
3103                         }
3104                         spin_lock_irqsave(&priv->lock, flags);
3105
3106                         priv->current_ht_config.smps = conf->smps_mode;
3107
3108                         /* Configure HT40 channels */
3109                         ctx->ht.enabled = conf_is_ht(conf);
3110                         if (ctx->ht.enabled) {
3111                                 if (conf_is_ht40_minus(conf)) {
3112                                         ctx->ht.extension_chan_offset =
3113                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3114                                         ctx->ht.is_40mhz = true;
3115                                 } else if (conf_is_ht40_plus(conf)) {
3116                                         ctx->ht.extension_chan_offset =
3117                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3118                                         ctx->ht.is_40mhz = true;
3119                                 } else {
3120                                         ctx->ht.extension_chan_offset =
3121                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3122                                         ctx->ht.is_40mhz = false;
3123                                 }
3124                         } else
3125                                 ctx->ht.is_40mhz = false;
3126
3127                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3128                                 ctx->staging.flags = 0;
3129
3130                         iwl_set_rxon_channel(priv, channel, ctx);
3131                         iwl_set_rxon_ht(priv, ht_conf);
3132                         iwl_set_flags_for_band(priv, ctx, channel->band,
3133                                                ctx->vif);
3134                         spin_unlock_irqrestore(&priv->lock, flags);
3135
3136                         iwl_set_rate(priv);
3137                         /*
3138                          * at this point, staging_rxon has the
3139                          * configuration for channel switch
3140                          */
3141                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3142                                                                     ch_switch))
3143                                 priv->switch_rxon.switch_in_progress = false;
3144                 }
3145         }
3146 out:
3147         mutex_unlock(&priv->mutex);
3148         if (!priv->switch_rxon.switch_in_progress)
3149                 ieee80211_chswitch_done(ctx->vif, false);
3150         IWL_DEBUG_MAC80211(priv, "leave\n");
3151 }
3152
3153 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3154                                     unsigned int changed_flags,
3155                                     unsigned int *total_flags,
3156                                     u64 multicast)
3157 {
3158         struct iwl_priv *priv = hw->priv;
3159         __le32 filter_or = 0, filter_nand = 0;
3160         struct iwl_rxon_context *ctx;
3161
3162 #define CHK(test, flag) do { \
3163         if (*total_flags & (test))              \
3164                 filter_or |= (flag);            \
3165         else                                    \
3166                 filter_nand |= (flag);          \
3167         } while (0)
3168
3169         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3170                         changed_flags, *total_flags);
3171
3172         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3173         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
3174         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
3175         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3176
3177 #undef CHK
3178
3179         mutex_lock(&priv->mutex);
3180
3181         for_each_context(priv, ctx) {
3182                 ctx->staging.filter_flags &= ~filter_nand;
3183                 ctx->staging.filter_flags |= filter_or;
3184
3185                 /*
3186                  * Not committing directly because hardware can perform a scan,
3187                  * but we'll eventually commit the filter flags change anyway.
3188                  */
3189         }
3190
3191         mutex_unlock(&priv->mutex);
3192
3193         /*
3194          * Receiving all multicast frames is always enabled by the
3195          * default flags setup in iwl_connection_init_rx_config()
3196          * since we currently do not support programming multicast
3197          * filters into the device.
3198          */
3199         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3200                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3201 }
3202
3203 static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3204 {
3205         struct iwl_priv *priv = hw->priv;
3206
3207         mutex_lock(&priv->mutex);
3208         IWL_DEBUG_MAC80211(priv, "enter\n");
3209
3210         /* do not support "flush" */
3211         if (!priv->cfg->ops->lib->txfifo_flush)
3212                 goto done;
3213
3214         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3215                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3216                 goto done;
3217         }
3218         if (iwl_is_rfkill(priv)) {
3219                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3220                 goto done;
3221         }
3222
3223         /*
3224          * mac80211 will not push any more frames for transmit
3225          * until the flush is completed
3226          */
3227         if (drop) {
3228                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3229                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3230                         IWL_ERR(priv, "flush request fail\n");
3231                         goto done;
3232                 }
3233         }
3234         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3235         iwlagn_wait_tx_queue_empty(priv);
3236 done:
3237         mutex_unlock(&priv->mutex);
3238         IWL_DEBUG_MAC80211(priv, "leave\n");
3239 }
3240
3241 static void iwlagn_disable_roc(struct iwl_priv *priv)
3242 {
3243         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3244         struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3245
3246         lockdep_assert_held(&priv->mutex);
3247
3248         if (!ctx->is_active)
3249                 return;
3250
3251         ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3252         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3253         iwl_set_rxon_channel(priv, chan, ctx);
3254         iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3255
3256         priv->_agn.hw_roc_channel = NULL;
3257
3258         iwlcore_commit_rxon(priv, ctx);
3259
3260         ctx->is_active = false;
3261 }
3262
3263 static void iwlagn_bg_roc_done(struct work_struct *work)
3264 {
3265         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3266                                              _agn.hw_roc_work.work);
3267
3268         mutex_lock(&priv->mutex);
3269         ieee80211_remain_on_channel_expired(priv->hw);
3270         iwlagn_disable_roc(priv);
3271         mutex_unlock(&priv->mutex);
3272 }
3273
3274 static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3275                                      struct ieee80211_channel *channel,
3276                                      enum nl80211_channel_type channel_type,
3277                                      int duration)
3278 {
3279         struct iwl_priv *priv = hw->priv;
3280         int err = 0;
3281
3282         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3283                 return -EOPNOTSUPP;
3284
3285         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3286                                         BIT(NL80211_IFTYPE_P2P_CLIENT)))
3287                 return -EOPNOTSUPP;
3288
3289         mutex_lock(&priv->mutex);
3290
3291         if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3292             test_bit(STATUS_SCAN_HW, &priv->status)) {
3293                 err = -EBUSY;
3294                 goto out;
3295         }
3296
3297         priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3298         priv->_agn.hw_roc_channel = channel;
3299         priv->_agn.hw_roc_chantype = channel_type;
3300         priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3301         iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3302         queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3303                            msecs_to_jiffies(duration + 20));
3304
3305         msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3306         ieee80211_ready_on_channel(priv->hw);
3307
3308  out:
3309         mutex_unlock(&priv->mutex);
3310
3311         return err;
3312 }
3313
3314 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3315 {
3316         struct iwl_priv *priv = hw->priv;
3317
3318         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3319                 return -EOPNOTSUPP;
3320
3321         cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3322
3323         mutex_lock(&priv->mutex);
3324         iwlagn_disable_roc(priv);
3325         mutex_unlock(&priv->mutex);
3326
3327         return 0;
3328 }
3329
3330 /*****************************************************************************
3331  *
3332  * driver setup and teardown
3333  *
3334  *****************************************************************************/
3335
3336 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3337 {
3338         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3339
3340         init_waitqueue_head(&priv->wait_command_queue);
3341
3342         INIT_WORK(&priv->restart, iwl_bg_restart);
3343         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3344         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3345         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3346         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3347         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3348         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3349         INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3350
3351         iwl_setup_scan_deferred_work(priv);
3352
3353         if (priv->cfg->ops->lib->setup_deferred_work)
3354                 priv->cfg->ops->lib->setup_deferred_work(priv);
3355
3356         init_timer(&priv->statistics_periodic);
3357         priv->statistics_periodic.data = (unsigned long)priv;
3358         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3359
3360         init_timer(&priv->ucode_trace);
3361         priv->ucode_trace.data = (unsigned long)priv;
3362         priv->ucode_trace.function = iwl_bg_ucode_trace;
3363
3364         init_timer(&priv->watchdog);
3365         priv->watchdog.data = (unsigned long)priv;
3366         priv->watchdog.function = iwl_bg_watchdog;
3367
3368         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3369                 iwl_irq_tasklet, (unsigned long)priv);
3370 }
3371
3372 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3373 {
3374         if (priv->cfg->ops->lib->cancel_deferred_work)
3375                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3376
3377         cancel_work_sync(&priv->run_time_calib_work);
3378         cancel_work_sync(&priv->beacon_update);
3379
3380         iwl_cancel_scan_deferred_work(priv);
3381
3382         cancel_work_sync(&priv->bt_full_concurrency);
3383         cancel_work_sync(&priv->bt_runtime_config);
3384
3385         del_timer_sync(&priv->statistics_periodic);
3386         del_timer_sync(&priv->ucode_trace);
3387 }
3388
3389 static void iwl_init_hw_rates(struct iwl_priv *priv,
3390                               struct ieee80211_rate *rates)
3391 {
3392         int i;
3393
3394         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3395                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3396                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3397                 rates[i].hw_value_short = i;
3398                 rates[i].flags = 0;
3399                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3400                         /*
3401                          * If CCK != 1M then set short preamble rate flag.
3402                          */
3403                         rates[i].flags |=
3404                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3405                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3406                 }
3407         }
3408 }
3409
3410 static int iwl_init_drv(struct iwl_priv *priv)
3411 {
3412         int ret;
3413
3414         spin_lock_init(&priv->sta_lock);
3415         spin_lock_init(&priv->hcmd_lock);
3416
3417         INIT_LIST_HEAD(&priv->free_frames);
3418
3419         mutex_init(&priv->mutex);
3420
3421         priv->ieee_channels = NULL;
3422         priv->ieee_rates = NULL;
3423         priv->band = IEEE80211_BAND_2GHZ;
3424
3425         priv->iw_mode = NL80211_IFTYPE_STATION;
3426         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3427         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3428         priv->_agn.agg_tids_count = 0;
3429
3430         /* initialize force reset */
3431         priv->force_reset[IWL_RF_RESET].reset_duration =
3432                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3433         priv->force_reset[IWL_FW_RESET].reset_duration =
3434                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3435
3436         priv->rx_statistics_jiffies = jiffies;
3437
3438         /* Choose which receivers/antennas to use */
3439         if (priv->cfg->ops->hcmd->set_rxon_chain)
3440                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3441                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3442
3443         iwl_init_scan_params(priv);
3444
3445         /* init bt coex */
3446         if (priv->cfg->bt_params &&
3447             priv->cfg->bt_params->advanced_bt_coexist) {
3448                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3449                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3450                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3451                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3452                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3453                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3454         }
3455
3456         ret = iwl_init_channel_map(priv);
3457         if (ret) {
3458                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3459                 goto err;
3460         }
3461
3462         ret = iwlcore_init_geos(priv);
3463         if (ret) {
3464                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3465                 goto err_free_channel_map;
3466         }
3467         iwl_init_hw_rates(priv, priv->ieee_rates);
3468
3469         return 0;
3470
3471 err_free_channel_map:
3472         iwl_free_channel_map(priv);
3473 err:
3474         return ret;
3475 }
3476
3477 static void iwl_uninit_drv(struct iwl_priv *priv)
3478 {
3479         iwl_calib_free_results(priv);
3480         iwlcore_free_geos(priv);
3481         iwl_free_channel_map(priv);
3482         kfree(priv->scan_cmd);
3483 }
3484
3485 struct ieee80211_ops iwlagn_hw_ops = {
3486         .tx = iwlagn_mac_tx,
3487         .start = iwlagn_mac_start,
3488         .stop = iwlagn_mac_stop,
3489         .add_interface = iwl_mac_add_interface,
3490         .remove_interface = iwl_mac_remove_interface,
3491         .change_interface = iwl_mac_change_interface,
3492         .config = iwlagn_mac_config,
3493         .configure_filter = iwlagn_configure_filter,
3494         .set_key = iwlagn_mac_set_key,
3495         .update_tkip_key = iwlagn_mac_update_tkip_key,
3496         .conf_tx = iwl_mac_conf_tx,
3497         .bss_info_changed = iwlagn_bss_info_changed,
3498         .ampdu_action = iwlagn_mac_ampdu_action,
3499         .hw_scan = iwl_mac_hw_scan,
3500         .sta_notify = iwlagn_mac_sta_notify,
3501         .sta_add = iwlagn_mac_sta_add,
3502         .sta_remove = iwl_mac_sta_remove,
3503         .channel_switch = iwlagn_mac_channel_switch,
3504         .flush = iwlagn_mac_flush,
3505         .tx_last_beacon = iwl_mac_tx_last_beacon,
3506         .remain_on_channel = iwl_mac_remain_on_channel,
3507         .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3508         .offchannel_tx = iwl_mac_offchannel_tx,
3509         .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3510 };
3511
3512 static u32 iwl_hw_detect(struct iwl_priv *priv)
3513 {
3514         u8 rev_id;
3515
3516         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
3517         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
3518         return iwl_read32(priv, CSR_HW_REV);
3519 }
3520
3521 static int iwl_set_hw_params(struct iwl_priv *priv)
3522 {
3523         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3524         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3525         if (iwlagn_mod_params.amsdu_size_8K)
3526                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3527         else
3528                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3529
3530         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3531
3532         if (iwlagn_mod_params.disable_11n)
3533                 priv->cfg->sku &= ~IWL_SKU_N;
3534
3535         /* Device-specific setup */
3536         return priv->cfg->ops->lib->set_hw_params(priv);
3537 }
3538
3539 static const u8 iwlagn_bss_ac_to_fifo[] = {
3540         IWL_TX_FIFO_VO,
3541         IWL_TX_FIFO_VI,
3542         IWL_TX_FIFO_BE,
3543         IWL_TX_FIFO_BK,
3544 };
3545
3546 static const u8 iwlagn_bss_ac_to_queue[] = {
3547         0, 1, 2, 3,
3548 };
3549
3550 static const u8 iwlagn_pan_ac_to_fifo[] = {
3551         IWL_TX_FIFO_VO_IPAN,
3552         IWL_TX_FIFO_VI_IPAN,
3553         IWL_TX_FIFO_BE_IPAN,
3554         IWL_TX_FIFO_BK_IPAN,
3555 };
3556
3557 static const u8 iwlagn_pan_ac_to_queue[] = {
3558         7, 6, 5, 4,
3559 };
3560
3561 /* This function both allocates and initializes hw and priv. */
3562 static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
3563 {
3564         struct iwl_priv *priv;
3565         /* mac80211 allocates memory for this device instance, including
3566          *   space for this driver's private structure */
3567         struct ieee80211_hw *hw;
3568
3569         hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
3570         if (hw == NULL) {
3571                 pr_err("%s: Can not allocate network device\n",
3572                        cfg->name);
3573                 goto out;
3574         }
3575
3576         priv = hw->priv;
3577         priv->hw = hw;
3578
3579 out:
3580         return hw;
3581 }
3582
3583 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3584 {
3585         int err = 0, i;
3586         struct iwl_priv *priv;
3587         struct ieee80211_hw *hw;
3588         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3589         unsigned long flags;
3590         u16 pci_cmd, num_mac;
3591         u32 hw_rev;
3592
3593         /************************
3594          * 1. Allocating HW data
3595          ************************/
3596
3597         hw = iwl_alloc_all(cfg);
3598         if (!hw) {
3599                 err = -ENOMEM;
3600                 goto out;
3601         }
3602         priv = hw->priv;
3603         /* At this point both hw and priv are allocated. */
3604
3605         priv->ucode_type = UCODE_SUBTYPE_NONE_LOADED;
3606
3607         /*
3608          * The default context is always valid,
3609          * more may be discovered when firmware
3610          * is loaded.
3611          */
3612         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3613
3614         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3615                 priv->contexts[i].ctxid = i;
3616
3617         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3618         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3619         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3620         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3621         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3622         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3623         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3624         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3625         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3626         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3627         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3628                 BIT(NL80211_IFTYPE_ADHOC);
3629         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3630                 BIT(NL80211_IFTYPE_STATION);
3631         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3632         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3633         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3634         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3635
3636         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3637         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3638         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3639         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3640         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3641         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3642         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3643         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3644         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3645         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3646         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3647         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3648                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3649 #ifdef CONFIG_IWL_P2P
3650         priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3651                 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3652 #endif
3653         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3654         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3655         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3656
3657         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3658
3659         SET_IEEE80211_DEV(hw, &pdev->dev);
3660
3661         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3662         priv->cfg = cfg;
3663         priv->pci_dev = pdev;
3664         priv->inta_mask = CSR_INI_SET_MASK;
3665
3666         /* is antenna coupling more than 35dB ? */
3667         priv->bt_ant_couple_ok =
3668                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3669                 true : false;
3670
3671         /* enable/disable bt channel inhibition */
3672         priv->bt_ch_announce = iwlagn_bt_ch_announce;
3673         IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3674                        (priv->bt_ch_announce) ? "On" : "Off");
3675
3676         if (iwl_alloc_traffic_mem(priv))
3677                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3678
3679         /**************************
3680          * 2. Initializing PCI bus
3681          **************************/
3682         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3683                                 PCIE_LINK_STATE_CLKPM);
3684
3685         if (pci_enable_device(pdev)) {
3686                 err = -ENODEV;
3687                 goto out_ieee80211_free_hw;
3688         }
3689
3690         pci_set_master(pdev);
3691
3692         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3693         if (!err)
3694                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3695         if (err) {
3696                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3697                 if (!err)
3698                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3699                 /* both attempts failed: */
3700                 if (err) {
3701                         IWL_WARN(priv, "No suitable DMA available.\n");
3702                         goto out_pci_disable_device;
3703                 }
3704         }
3705
3706         err = pci_request_regions(pdev, DRV_NAME);
3707         if (err)
3708                 goto out_pci_disable_device;
3709
3710         pci_set_drvdata(pdev, priv);
3711
3712
3713         /***********************
3714          * 3. Read REV register
3715          ***********************/
3716         priv->hw_base = pci_iomap(pdev, 0, 0);
3717         if (!priv->hw_base) {
3718                 err = -ENODEV;
3719                 goto out_pci_release_regions;
3720         }
3721
3722         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3723                 (unsigned long long) pci_resource_len(pdev, 0));
3724         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3725
3726         /* these spin locks will be used in apm_ops.init and EEPROM access
3727          * we should init now
3728          */
3729         spin_lock_init(&priv->reg_lock);
3730         spin_lock_init(&priv->lock);
3731
3732         /*
3733          * stop and reset the on-board processor just in case it is in a
3734          * strange state ... like being left stranded by a primary kernel
3735          * and this is now the kdump kernel trying to start up
3736          */
3737         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3738
3739         hw_rev = iwl_hw_detect(priv);
3740         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3741                 priv->cfg->name, hw_rev);
3742
3743         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3744          * PCI Tx retries from interfering with C3 CPU state */
3745         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3746
3747         if (iwl_prepare_card_hw(priv)) {
3748                 IWL_WARN(priv, "Failed, HW not ready\n");
3749                 goto out_iounmap;
3750         }
3751
3752         /*****************
3753          * 4. Read EEPROM
3754          *****************/
3755         /* Read the EEPROM */
3756         err = iwl_eeprom_init(priv, hw_rev);
3757         if (err) {
3758                 IWL_ERR(priv, "Unable to init EEPROM\n");
3759                 goto out_iounmap;
3760         }
3761         err = iwl_eeprom_check_version(priv);
3762         if (err)
3763                 goto out_free_eeprom;
3764
3765         err = iwl_eeprom_check_sku(priv);
3766         if (err)
3767                 goto out_free_eeprom;
3768
3769         /* extract MAC Address */
3770         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3771         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3772         priv->hw->wiphy->addresses = priv->addresses;
3773         priv->hw->wiphy->n_addresses = 1;
3774         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3775         if (num_mac > 1) {
3776                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3777                        ETH_ALEN);
3778                 priv->addresses[1].addr[5]++;
3779                 priv->hw->wiphy->n_addresses++;
3780         }
3781
3782         /************************
3783          * 5. Setup HW constants
3784          ************************/
3785         if (iwl_set_hw_params(priv)) {
3786                 IWL_ERR(priv, "failed to set hw parameters\n");
3787                 goto out_free_eeprom;
3788         }
3789
3790         /*******************
3791          * 6. Setup priv
3792          *******************/
3793
3794         err = iwl_init_drv(priv);
3795         if (err)
3796                 goto out_free_eeprom;
3797         /* At this point both hw and priv are initialized. */
3798
3799         /********************
3800          * 7. Setup services
3801          ********************/
3802         spin_lock_irqsave(&priv->lock, flags);
3803         iwl_disable_interrupts(priv);
3804         spin_unlock_irqrestore(&priv->lock, flags);
3805
3806         pci_enable_msi(priv->pci_dev);
3807
3808         iwl_alloc_isr_ict(priv);
3809
3810         err = request_irq(priv->pci_dev->irq, iwl_isr_ict,
3811                           IRQF_SHARED, DRV_NAME, priv);
3812         if (err) {
3813                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3814                 goto out_disable_msi;
3815         }
3816
3817         iwl_setup_deferred_work(priv);
3818         iwl_setup_rx_handlers(priv);
3819
3820         /*********************************************
3821          * 8. Enable interrupts and read RFKILL state
3822          *********************************************/
3823
3824         /* enable rfkill interrupt: hw bug w/a */
3825         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3826         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3827                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3828                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3829         }
3830
3831         iwl_enable_rfkill_int(priv);
3832
3833         /* If platform's RF_KILL switch is NOT set to KILL */
3834         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3835                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3836         else
3837                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3838
3839         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3840                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3841
3842         iwl_power_initialize(priv);
3843         iwl_tt_initialize(priv);
3844
3845         init_completion(&priv->_agn.firmware_loading_complete);
3846
3847         err = iwl_request_firmware(priv, true);
3848         if (err)
3849                 goto out_destroy_workqueue;
3850
3851         return 0;
3852
3853  out_destroy_workqueue:
3854         destroy_workqueue(priv->workqueue);
3855         priv->workqueue = NULL;
3856         free_irq(priv->pci_dev->irq, priv);
3857         iwl_free_isr_ict(priv);
3858  out_disable_msi:
3859         pci_disable_msi(priv->pci_dev);
3860         iwl_uninit_drv(priv);
3861  out_free_eeprom:
3862         iwl_eeprom_free(priv);
3863  out_iounmap:
3864         pci_iounmap(pdev, priv->hw_base);
3865  out_pci_release_regions:
3866         pci_set_drvdata(pdev, NULL);
3867         pci_release_regions(pdev);
3868  out_pci_disable_device:
3869         pci_disable_device(pdev);
3870  out_ieee80211_free_hw:
3871         iwl_free_traffic_mem(priv);
3872         ieee80211_free_hw(priv->hw);
3873  out:
3874         return err;
3875 }
3876
3877 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3878 {
3879         struct iwl_priv *priv = pci_get_drvdata(pdev);
3880         unsigned long flags;
3881
3882         if (!priv)
3883                 return;
3884
3885         wait_for_completion(&priv->_agn.firmware_loading_complete);
3886
3887         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3888
3889         iwl_dbgfs_unregister(priv);
3890         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3891
3892         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3893          * to be called and iwl_down since we are removing the device
3894          * we need to set STATUS_EXIT_PENDING bit.
3895          */
3896         set_bit(STATUS_EXIT_PENDING, &priv->status);
3897
3898         iwl_leds_exit(priv);
3899
3900         if (priv->mac80211_registered) {
3901                 ieee80211_unregister_hw(priv->hw);
3902                 priv->mac80211_registered = 0;
3903         }
3904
3905         /* Reset to low power before unloading driver. */
3906         iwl_apm_stop(priv);
3907
3908         iwl_tt_exit(priv);
3909
3910         /* make sure we flush any pending irq or
3911          * tasklet for the driver
3912          */
3913         spin_lock_irqsave(&priv->lock, flags);
3914         iwl_disable_interrupts(priv);
3915         spin_unlock_irqrestore(&priv->lock, flags);
3916
3917         iwl_synchronize_irq(priv);
3918
3919         iwl_dealloc_ucode_pci(priv);
3920
3921         if (priv->rxq.bd)
3922                 iwlagn_rx_queue_free(priv, &priv->rxq);
3923         iwlagn_hw_txq_ctx_free(priv);
3924
3925         iwl_eeprom_free(priv);
3926
3927
3928         /*netif_stop_queue(dev); */
3929         flush_workqueue(priv->workqueue);
3930
3931         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3932          * priv->workqueue... so we can't take down the workqueue
3933          * until now... */
3934         destroy_workqueue(priv->workqueue);
3935         priv->workqueue = NULL;
3936         iwl_free_traffic_mem(priv);
3937
3938         free_irq(priv->pci_dev->irq, priv);
3939         pci_disable_msi(priv->pci_dev);
3940         pci_iounmap(pdev, priv->hw_base);
3941         pci_release_regions(pdev);
3942         pci_disable_device(pdev);
3943         pci_set_drvdata(pdev, NULL);
3944
3945         iwl_uninit_drv(priv);
3946
3947         iwl_free_isr_ict(priv);
3948
3949         dev_kfree_skb(priv->beacon_skb);
3950
3951         ieee80211_free_hw(priv->hw);
3952 }
3953
3954
3955 /*****************************************************************************
3956  *
3957  * driver and module entry point
3958  *
3959  *****************************************************************************/
3960
3961 /* Hardware specific file defines the PCI IDs table for that hardware module */
3962 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3963         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3964         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3965         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3966         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3967         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3968         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3969         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3970         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3971         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3972         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3973         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3974         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3975         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3976         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3977         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3978         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3979         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3980         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3981         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3982         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3983         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3984         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3985         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3986         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3987
3988 /* 5300 Series WiFi */
3989         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3990         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3991         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3992         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3993         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3994         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3995         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3996         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3997         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3998         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3999         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4000         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4001
4002 /* 5350 Series WiFi/WiMax */
4003         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4004         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4005         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4006
4007 /* 5150 Series Wifi/WiMax */
4008         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4009         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4010         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4011         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4012         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4013         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4014
4015         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4016         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4017         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4018         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4019
4020 /* 6x00 Series */
4021         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4022         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4023         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4024         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4025         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4026         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4027         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4028         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4029         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4030         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4031
4032 /* 6x05 Series */
4033         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
4034         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
4035         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
4036         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
4037         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
4038         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
4039         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
4040
4041 /* 6x30 Series */
4042         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
4043         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
4044         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
4045         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
4046         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
4047         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
4048         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
4049         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
4050         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
4051         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
4052         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
4053         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
4054         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
4055         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
4056         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
4057         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
4058
4059 /* 6x50 WiFi/WiMax Series */
4060         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4061         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4062         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4063         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4064         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4065         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4066
4067 /* 6150 WiFi/WiMax Series */
4068         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
4069         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6150_bgn_cfg)},
4070         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
4071         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6150_bgn_cfg)},
4072         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
4073         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6150_bgn_cfg)},
4074
4075 /* 1000 Series WiFi */
4076         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4077         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4078         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4079         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4080         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4081         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4082         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4083         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4084         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4085         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4086         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4087         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4088
4089 /* 100 Series WiFi */
4090         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
4091         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
4092         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
4093         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
4094         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
4095         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
4096
4097 /* 130 Series WiFi */
4098         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
4099         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
4100         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
4101         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
4102         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
4103         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
4104
4105 /* 2x00 Series */
4106         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
4107         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
4108         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
4109         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
4110         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
4111         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
4112
4113 /* 2x30 Series */
4114         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
4115         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
4116         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
4117         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
4118         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
4119         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
4120
4121 /* 6x35 Series */
4122         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
4123         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
4124         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
4125         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
4126         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
4127         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
4128         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
4129         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
4130         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
4131
4132 /* 105 Series */
4133         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
4134         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
4135         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
4136         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
4137         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
4138         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
4139
4140 /* 135 Series */
4141         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
4142         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
4143         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
4144         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
4145         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
4146         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
4147
4148         {0}
4149 };
4150 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4151
4152 static struct pci_driver iwl_driver = {
4153         .name = DRV_NAME,
4154         .id_table = iwl_hw_card_ids,
4155         .probe = iwl_pci_probe,
4156         .remove = __devexit_p(iwl_pci_remove),
4157         .driver.pm = IWL_PM_OPS,
4158 };
4159
4160 static int __init iwl_init(void)
4161 {
4162
4163         int ret;
4164         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4165         pr_info(DRV_COPYRIGHT "\n");
4166
4167         ret = iwlagn_rate_control_register();
4168         if (ret) {
4169                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4170                 return ret;
4171         }
4172
4173         ret = pci_register_driver(&iwl_driver);
4174         if (ret) {
4175                 pr_err("Unable to initialize PCI module\n");
4176                 goto error_register;
4177         }
4178
4179         return ret;
4180
4181 error_register:
4182         iwlagn_rate_control_unregister();
4183         return ret;
4184 }
4185
4186 static void __exit iwl_exit(void)
4187 {
4188         pci_unregister_driver(&iwl_driver);
4189         iwlagn_rate_control_unregister();
4190 }
4191
4192 module_exit(iwl_exit);
4193 module_init(iwl_init);
4194
4195 #ifdef CONFIG_IWLWIFI_DEBUG
4196 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4197 MODULE_PARM_DESC(debug, "debug output mask");
4198 #endif
4199
4200 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4201 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4202 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4203 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4204 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4205 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4206 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4207                    int, S_IRUGO);
4208 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4209 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4210 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4211
4212 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4213                    S_IRUGO);
4214 MODULE_PARM_DESC(ucode_alternative,
4215                  "specify ucode alternative to use from ucode file");
4216
4217 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4218 MODULE_PARM_DESC(antenna_coupling,
4219                  "specify antenna coupling in dB (defualt: 0 dB)");
4220
4221 module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
4222 MODULE_PARM_DESC(bt_ch_inhibition,
4223                  "Disable BT channel inhibition (default: enable)");
4224
4225 module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
4226 MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
4227
4228 module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
4229 MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");