drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57 #include "iwl-agn.h"
  58
  59
  60 /******************************************************************************
  61  *
  62  * module boiler plate
  63  *
  64  ******************************************************************************/
  65
  66 /*
  67  * module name, copyright, version, etc.
  68  */
  69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  70
  71 #ifdef CONFIG_IWLWIFI_DEBUG
  72 #define VD "d"
  73 #else
  74 #define VD
  75 #endif
  76
  77 #define DRV_VERSION     IWLWIFI_VERSION VD
  78
  79
  80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  81 MODULE_VERSION(DRV_VERSION);
  82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  83 MODULE_LICENSE("GPL");
  84 MODULE_ALIAS("iwl4965");
  85
  86 /**
  87  * iwl_commit_rxon - commit staging_rxon to hardware
  88  *
  89  * The RXON command in staging_rxon is committed to the hardware and
  90  * the active_rxon structure is updated with the new data.  This
  91  * function correctly transitions out of the RXON_ASSOC_MSK state if
  92  * a HW tune is required based on the RXON structure changes.
  93  */
  94 int iwl_commit_rxon(struct iwl_priv *priv)
  95 {
  96         /* cast away the const for active_rxon in this function */
  97         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  98         int ret;
  99         bool new_assoc =
 100                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 101
 102         if (!iwl_is_alive(priv))
 103                 return -EBUSY;
 104
 105         /* always get timestamp with Rx frame */
 106         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 107
 108         ret = iwl_check_rxon_cmd(priv);
 109         if (ret) {
 110                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 111                 return -EINVAL;
 112         }
 113
 114         /*
 115          * receive commit_rxon request
 116          * abort any previous channel switch if still in process
 117          */
 118         if (priv->switch_rxon.switch_in_progress &&
 119             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 120                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 121                       le16_to_cpu(priv->switch_rxon.channel));
 122                 priv->switch_rxon.switch_in_progress = false;
 123         }
 124
 125         /* If we don't need to send a full RXON, we can use
 126          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 127          * and other flags for the current radio configuration. */
 128         if (!iwl_full_rxon_required(priv)) {
 129                 ret = iwl_send_rxon_assoc(priv);
 130                 if (ret) {
 131                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 132                         return ret;
 133                 }
 134
 135                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 136                 iwl_print_rx_config_cmd(priv);
 137                 return 0;
 138         }
 139
 140         /* If we are currently associated and the new config requires
 141          * an RXON_ASSOC and the new config wants the associated mask enabled,
 142          * we must clear the associated from the active configuration
 143          * before we apply the new config */
 144         if (iwl_is_associated(priv) && new_assoc) {
 145                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 146                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 147
 148                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 149                                       sizeof(struct iwl_rxon_cmd),
 150                                       &priv->active_rxon);
 151
 152                 /* If the mask clearing failed then we set
 153                  * active_rxon back to what it was previously */
 154                 if (ret) {
 155                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 156                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 157                         return ret;
 158                 }
 159                 iwl_clear_ucode_stations(priv, false);
 160                 iwl_restore_stations(priv);
 161                 ret = iwl_restore_default_wep_keys(priv);
 162                 if (ret) {
 163                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 164                         return ret;
 165                 }
 166         }
 167
 168         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 169                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 170                        "* channel = %d\n"
 171                        "* bssid = %pM\n",
 172                        (new_assoc ? "" : "out"),
 173                        le16_to_cpu(priv->staging_rxon.channel),
 174                        priv->staging_rxon.bssid_addr);
 175
 176         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 177
 178         /* Apply the new configuration
 179          * RXON unassoc clears the station table in uCode so restoration of
 180          * stations is needed after it (the RXON command) completes
 181          */
 182         if (!new_assoc) {
 183                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 184                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 185                 if (ret) {
 186                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 187                         return ret;
 188                 }
 189                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 190                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 191                 iwl_clear_ucode_stations(priv, false);
 192                 iwl_restore_stations(priv);
 193                 ret = iwl_restore_default_wep_keys(priv);
 194                 if (ret) {
 195                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 196                         return ret;
 197                 }
 198         }
 199
 200         priv->start_calib = 0;
 201         if (new_assoc) {
 202                 /*
 203                  * allow CTS-to-self if possible for new association.
 204                  * this is relevant only for 5000 series and up,
 205                  * but will not damage 4965
 206                  */
 207                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 208
 209                 /* Apply the new configuration
 210                  * RXON assoc doesn't clear the station table in uCode,
 211                  */
 212                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 213                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 214                 if (ret) {
 215                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 216                         return ret;
 217                 }
 218                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 219         }
 220         iwl_print_rx_config_cmd(priv);
 221
 222         iwl_init_sensitivity(priv);
 223
 224         /* If we issue a new RXON command which required a tune then we must
 225          * send a new TXPOWER command or we won't be able to Tx any frames */
 226         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 227         if (ret) {
 228                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 229                 return ret;
 230         }
 231
 232         return 0;
 233 }
 234
 235 void iwl_update_chain_flags(struct iwl_priv *priv)
 236 {
 237
 238         if (priv->cfg->ops->hcmd->set_rxon_chain)
 239                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 240         iwlcore_commit_rxon(priv);
 241 }
 242
 243 static void iwl_clear_free_frames(struct iwl_priv *priv)
 244 {
 245         struct list_head *element;
 246
 247         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 248                        priv->frames_count);
 249
 250         while (!list_empty(&priv->free_frames)) {
 251                 element = priv->free_frames.next;
 252                 list_del(element);
 253                 kfree(list_entry(element, struct iwl_frame, list));
 254                 priv->frames_count--;
 255         }
 256
 257         if (priv->frames_count) {
 258                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 259                             priv->frames_count);
 260                 priv->frames_count = 0;
 261         }
 262 }
 263
 264 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 265 {
 266         struct iwl_frame *frame;
 267         struct list_head *element;
 268         if (list_empty(&priv->free_frames)) {
 269                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 270                 if (!frame) {
 271                         IWL_ERR(priv, "Could not allocate frame!\n");
 272                         return NULL;
 273                 }
 274
 275                 priv->frames_count++;
 276                 return frame;
 277         }
 278
 279         element = priv->free_frames.next;
 280         list_del(element);
 281         return list_entry(element, struct iwl_frame, list);
 282 }
 283
 284 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 285 {
 286         memset(frame, 0, sizeof(*frame));
 287         list_add(&frame->list, &priv->free_frames);
 288 }
 289
 290 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 291                                           struct ieee80211_hdr *hdr,
 292                                           int left)
 293 {
 294         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 295             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 296              (priv->iw_mode != NL80211_IFTYPE_AP)))
 297                 return 0;
 298
 299         if (priv->ibss_beacon->len > left)
 300                 return 0;
 301
 302         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 303
 304         return priv->ibss_beacon->len;
 305 }
 306
 307 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 308 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 309                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 310                 u8 *beacon, u32 frame_size)
 311 {
 312         u16 tim_idx;
 313         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 314
 315         /*
 316          * The index is relative to frame start but we start looking at the
 317          * variable-length part of the beacon.
 318          */
 319         tim_idx = mgmt->u.beacon.variable - beacon;
 320
 321         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 322         while ((tim_idx < (frame_size - 2)) &&
 323                         (beacon[tim_idx] != WLAN_EID_TIM))
 324                 tim_idx += beacon[tim_idx+1] + 2;
 325
 326         /* If TIM field was found, set variables */
 327         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 328                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 329                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 330         } else
 331                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 332 }
 333
 334 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 335                                        struct iwl_frame *frame)
 336 {
 337         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 338         u32 frame_size;
 339         u32 rate_flags;
 340         u32 rate;
 341         /*
 342          * We have to set up the TX command, the TX Beacon command, and the
 343          * beacon contents.
 344          */
 345
 346         /* Initialize memory */
 347         tx_beacon_cmd = &frame->u.beacon;
 348         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 349
 350         /* Set up TX beacon contents */
 351         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 352                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 353         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 354                 return 0;
 355
 356         /* Set up TX command fields */
 357         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 358         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 359         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 360         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 361                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 362
 363         /* Set up TX beacon command fields */
 364         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 365                         frame_size);
 366
 367         /* Set up packet rate and flags */
 368         rate = iwl_rate_get_lowest_plcp(priv);
 369         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 370         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 371         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 372                 rate_flags |= RATE_MCS_CCK_MSK;
 373         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 374                         rate_flags);
 375
 376         return sizeof(*tx_beacon_cmd) + frame_size;
 377 }
 378 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 379 {
 380         struct iwl_frame *frame;
 381         unsigned int frame_size;
 382         int rc;
 383
 384         frame = iwl_get_free_frame(priv);
 385         if (!frame) {
 386                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 387                           "command.\n");
 388                 return -ENOMEM;
 389         }
 390
 391         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 392         if (!frame_size) {
 393                 IWL_ERR(priv, "Error configuring the beacon command\n");
 394                 iwl_free_frame(priv, frame);
 395                 return -EINVAL;
 396         }
 397
 398         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 399                               &frame->u.cmd[0]);
 400
 401         iwl_free_frame(priv, frame);
 402
 403         return rc;
 404 }
 405
 406 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 407 {
 408         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 409
 410         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 411         if (sizeof(dma_addr_t) > sizeof(u32))
 412                 addr |=
 413                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 414
 415         return addr;
 416 }
 417
 418 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 419 {
 420         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 421
 422         return le16_to_cpu(tb->hi_n_len) >> 4;
 423 }
 424
 425 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 426                                   dma_addr_t addr, u16 len)
 427 {
 428         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 429         u16 hi_n_len = len << 4;
 430
 431         put_unaligned_le32(addr, &tb->lo);
 432         if (sizeof(dma_addr_t) > sizeof(u32))
 433                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 434
 435         tb->hi_n_len = cpu_to_le16(hi_n_len);
 436
 437         tfd->num_tbs = idx + 1;
 438 }
 439
 440 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 441 {
 442         return tfd->num_tbs & 0x1f;
 443 }
 444
 445 /**
 446  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 447  * @priv - driver private data
 448  * @txq - tx queue
 449  *
 450  * Does NOT advance any TFD circular buffer read/write indexes
 451  * Does NOT free the TFD itself (which is within circular buffer)
 452  */
 453 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 454 {
 455         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 456         struct iwl_tfd *tfd;
 457         struct pci_dev *dev = priv->pci_dev;
 458         int index = txq->q.read_ptr;
 459         int i;
 460         int num_tbs;
 461
 462         tfd = &tfd_tmp[index];
 463
 464         /* Sanity check on number of chunks */
 465         num_tbs = iwl_tfd_get_num_tbs(tfd);
 466
 467         if (num_tbs >= IWL_NUM_OF_TBS) {
 468                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 469                 /* @todo issue fatal error, it is quite serious situation */
 470                 return;
 471         }
 472
 473         /* Unmap tx_cmd */
 474         if (num_tbs)
 475                 pci_unmap_single(dev,
 476                                 pci_unmap_addr(&txq->meta[index], mapping),
 477                                 pci_unmap_len(&txq->meta[index], len),
 478                                 PCI_DMA_BIDIRECTIONAL);
 479
 480         /* Unmap chunks, if any. */
 481         for (i = 1; i < num_tbs; i++) {
 482                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 483                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 484
 485                 if (txq->txb) {
 486                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 487                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 488                 }
 489         }
 490 }
 491
 492 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 493                                  struct iwl_tx_queue *txq,
 494                                  dma_addr_t addr, u16 len,
 495                                  u8 reset, u8 pad)
 496 {
 497         struct iwl_queue *q;
 498         struct iwl_tfd *tfd, *tfd_tmp;
 499         u32 num_tbs;
 500
 501         q = &txq->q;
 502         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 503         tfd = &tfd_tmp[q->write_ptr];
 504
 505         if (reset)
 506                 memset(tfd, 0, sizeof(*tfd));
 507
 508         num_tbs = iwl_tfd_get_num_tbs(tfd);
 509
 510         /* Each TFD can point to a maximum 20 Tx buffers */
 511         if (num_tbs >= IWL_NUM_OF_TBS) {
 512                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 513                           IWL_NUM_OF_TBS);
 514                 return -EINVAL;
 515         }
 516
 517         BUG_ON(addr & ~DMA_BIT_MASK(36));
 518         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 519                 IWL_ERR(priv, "Unaligned address = %llx\n",
 520                           (unsigned long long)addr);
 521
 522         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 523
 524         return 0;
 525 }
 526
 527 /*
 528  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 529  * given Tx queue, and enable the DMA channel used for that queue.
 530  *
 531  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 532  * channels supported in hardware.
 533  */
 534 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 535                          struct iwl_tx_queue *txq)
 536 {
 537         int txq_id = txq->q.id;
 538
 539         /* Circular buffer (TFD queue in DRAM) physical base address */
 540         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 541                              txq->q.dma_addr >> 8);
 542
 543         return 0;
 544 }
 545
 546 /******************************************************************************
 547  *
 548  * Generic RX handler implementations
 549  *
 550  ******************************************************************************/
 551 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 552                                 struct iwl_rx_mem_buffer *rxb)
 553 {
 554         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 555         struct iwl_alive_resp *palive;
 556         struct delayed_work *pwork;
 557
 558         palive = &pkt->u.alive_frame;
 559
 560         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 561                        "0x%01X 0x%01X\n",
 562                        palive->is_valid, palive->ver_type,
 563                        palive->ver_subtype);
 564
 565         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 566                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 567                 memcpy(&priv->card_alive_init,
 568                        &pkt->u.alive_frame,
 569                        sizeof(struct iwl_init_alive_resp));
 570                 pwork = &priv->init_alive_start;
 571         } else {
 572                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 573                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 574                        sizeof(struct iwl_alive_resp));
 575                 pwork = &priv->alive_start;
 576         }
 577
 578         /* We delay the ALIVE response by 5ms to
 579          * give the HW RF Kill time to activate... */
 580         if (palive->is_valid == UCODE_VALID_OK)
 581                 queue_delayed_work(priv->workqueue, pwork,
 582                                    msecs_to_jiffies(5));
 583         else
 584                 IWL_WARN(priv, "uCode did not respond OK.\n");
 585 }
 586
 587 static void iwl_bg_beacon_update(struct work_struct *work)
 588 {
 589         struct iwl_priv *priv =
 590                 container_of(work, struct iwl_priv, beacon_update);
 591         struct sk_buff *beacon;
 592
 593         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 594         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 595
 596         if (!beacon) {
 597                 IWL_ERR(priv, "update beacon failed\n");
 598                 return;
 599         }
 600
 601         mutex_lock(&priv->mutex);
 602         /* new beacon skb is allocated every time; dispose previous.*/
 603         if (priv->ibss_beacon)
 604                 dev_kfree_skb(priv->ibss_beacon);
 605
 606         priv->ibss_beacon = beacon;
 607         mutex_unlock(&priv->mutex);
 608
 609         iwl_send_beacon_cmd(priv);
 610 }
 611
 612 /**
 613  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 614  *
 615  * This callback is provided in order to send a statistics request.
 616  *
 617  * This timer function is continually reset to execute within
 618  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 619  * was received.  We need to ensure we receive the statistics in order
 620  * to update the temperature used for calibrating the TXPOWER.
 621  */
 622 static void iwl_bg_statistics_periodic(unsigned long data)
 623 {
 624         struct iwl_priv *priv = (struct iwl_priv *)data;
 625
 626         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 627                 return;
 628
 629         /* dont send host command if rf-kill is on */
 630         if (!iwl_is_ready_rf(priv))
 631                 return;
 632
 633         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 634 }
 635
 636
 637 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 638                                         u32 start_idx, u32 num_events,
 639                                         u32 mode)
 640 {
 641         u32 i;
 642         u32 ptr;        /* SRAM byte address of log data */
 643         u32 ev, time, data; /* event log data */
 644         unsigned long reg_flags;
 645
 646         if (mode == 0)
 647                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 648         else
 649                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 650
 651         /* Make sure device is powered up for SRAM reads */
 652         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 653         if (iwl_grab_nic_access(priv)) {
 654                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 655                 return;
 656         }
 657
 658         /* Set starting address; reads will auto-increment */
 659         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 660         rmb();
 661
 662         /*
 663          * "time" is actually "data" for mode 0 (no timestamp).
 664          * place event id # at far right for easier visual parsing.
 665          */
 666         for (i = 0; i < num_events; i++) {
 667                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 668                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 669                 if (mode == 0) {
 670                         trace_iwlwifi_dev_ucode_cont_event(priv,
 671                                                         0, time, ev);
 672                 } else {
 673                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 674                         trace_iwlwifi_dev_ucode_cont_event(priv,
 675                                                 time, data, ev);
 676                 }
 677         }
 678         /* Allow device to power down */
 679         iwl_release_nic_access(priv);
 680         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 681 }
 682
 683 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 684 {
 685         u32 capacity;   /* event log capacity in # entries */
 686         u32 base;       /* SRAM byte address of event log header */
 687         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 688         u32 num_wraps;  /* # times uCode wrapped to top of log */
 689         u32 next_entry; /* index of next entry to be written by uCode */
 690
 691         if (priv->ucode_type == UCODE_INIT)
 692                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 693         else
 694                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 695         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 696                 capacity = iwl_read_targ_mem(priv, base);
 697                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 698                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 699                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 700         } else
 701                 return;
 702
 703         if (num_wraps == priv->event_log.num_wraps) {
 704                 iwl_print_cont_event_trace(priv,
 705                                        base, priv->event_log.next_entry,
 706                                        next_entry - priv->event_log.next_entry,
 707                                        mode);
 708                 priv->event_log.non_wraps_count++;
 709         } else {
 710                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 711                         priv->event_log.wraps_more_count++;
 712                 else
 713                         priv->event_log.wraps_once_count++;
 714                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 715                                 num_wraps - priv->event_log.num_wraps,
 716                                 next_entry, priv->event_log.next_entry);
 717                 if (next_entry < priv->event_log.next_entry) {
 718                         iwl_print_cont_event_trace(priv, base,
 719                                priv->event_log.next_entry,
 720                                capacity - priv->event_log.next_entry,
 721                                mode);
 722
 723                         iwl_print_cont_event_trace(priv, base, 0,
 724                                 next_entry, mode);
 725                 } else {
 726                         iwl_print_cont_event_trace(priv, base,
 727                                next_entry, capacity - next_entry,
 728                                mode);
 729
 730                         iwl_print_cont_event_trace(priv, base, 0,
 731                                 next_entry, mode);
 732                 }
 733         }
 734         priv->event_log.num_wraps = num_wraps;
 735         priv->event_log.next_entry = next_entry;
 736 }
 737
 738 /**
 739  * iwl_bg_ucode_trace - Timer callback to log ucode event
 740  *
 741  * The timer is continually set to execute every
 742  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 743  * this function is to perform continuous uCode event logging operation
 744  * if enabled
 745  */
 746 static void iwl_bg_ucode_trace(unsigned long data)
 747 {
 748         struct iwl_priv *priv = (struct iwl_priv *)data;
 749
 750         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 751                 return;
 752
 753         if (priv->event_log.ucode_trace) {
 754                 iwl_continuous_event_trace(priv);
 755                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 756                 mod_timer(&priv->ucode_trace,
 757                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 758         }
 759 }
 760
 761 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 762                                 struct iwl_rx_mem_buffer *rxb)
 763 {
 764 #ifdef CONFIG_IWLWIFI_DEBUG
 765         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 766         struct iwl4965_beacon_notif *beacon =
 767                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 768         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 769
 770         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 771                 "tsf %d %d rate %d\n",
 772                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 773                 beacon->beacon_notify_hdr.failure_frame,
 774                 le32_to_cpu(beacon->ibss_mgr_status),
 775                 le32_to_cpu(beacon->high_tsf),
 776                 le32_to_cpu(beacon->low_tsf), rate);
 777 #endif
 778
 779         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 780             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 781                 queue_work(priv->workqueue, &priv->beacon_update);
 782 }
 783
 784 /* Handle notification from uCode that card's power state is changing
 785  * due to software, hardware, or critical temperature RFKILL */
 786 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 787                                     struct iwl_rx_mem_buffer *rxb)
 788 {
 789         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 790         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 791         unsigned long status = priv->status;
 792
 793         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 794                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 795                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 796                           (flags & CT_CARD_DISABLED) ?
 797                           "Reached" : "Not reached");
 798
 799         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 800                      CT_CARD_DISABLED)) {
 801
 802                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 803                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 804
 805                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 806                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 807
 808                 if (!(flags & RXON_CARD_DISABLED)) {
 809                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 810                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 811                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 812                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 813                 }
 814                 if (flags & CT_CARD_DISABLED)
 815                         iwl_tt_enter_ct_kill(priv);
 816         }
 817         if (!(flags & CT_CARD_DISABLED))
 818                 iwl_tt_exit_ct_kill(priv);
 819
 820         if (flags & HW_CARD_DISABLED)
 821                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 822         else
 823                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 824
 825
 826         if (!(flags & RXON_CARD_DISABLED))
 827                 iwl_scan_cancel(priv);
 828
 829         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 830              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 831                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 832                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 833         else
 834                 wake_up_interruptible(&priv->wait_command_queue);
 835 }
 836
 837 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 838 {
 839         if (src == IWL_PWR_SRC_VAUX) {
 840                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 841                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 842                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 843                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 844         } else {
 845                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 846                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 847                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 848         }
 849
 850         return 0;
 851 }
 852
 853 /**
 854  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 855  *
 856  * Setup the RX handlers for each of the reply types sent from the uCode
 857  * to the host.
 858  *
 859  * This function chains into the hardware specific files for them to setup
 860  * any hardware specific handlers as well.
 861  */
 862 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 863 {
 864         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 865         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 866         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 867         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 868                         iwl_rx_spectrum_measure_notif;
 869         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 870         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 871             iwl_rx_pm_debug_statistics_notif;
 872         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 873
 874         /*
 875          * The same handler is used for both the REPLY to a discrete
 876          * statistics request from the host as well as for the periodic
 877          * statistics notifications (after received beacons) from the uCode.
 878          */
 879         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 880         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 881
 882         iwl_setup_rx_scan_handlers(priv);
 883
 884         /* status change handler */
 885         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 886
 887         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 888             iwl_rx_missed_beacon_notif;
 889         /* Rx handlers */
 890         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 891         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 892         /* block ack */
 893         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 894         /* Set up hardware specific Rx handlers */
 895         priv->cfg->ops->lib->rx_handler_setup(priv);
 896 }
 897
 898 /**
 899  * iwl_rx_handle - Main entry function for receiving responses from uCode
 900  *
 901  * Uses the priv->rx_handlers callback function array to invoke
 902  * the appropriate handlers, including command responses,
 903  * frame-received notifications, and other notifications.
 904  */
 905 void iwl_rx_handle(struct iwl_priv *priv)
 906 {
 907         struct iwl_rx_mem_buffer *rxb;
 908         struct iwl_rx_packet *pkt;
 909         struct iwl_rx_queue *rxq = &priv->rxq;
 910         u32 r, i;
 911         int reclaim;
 912         unsigned long flags;
 913         u8 fill_rx = 0;
 914         u32 count = 8;
 915         int total_empty;
 916
 917         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 918          * buffer that the driver may process (last buffer filled by ucode). */
 919         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 920         i = rxq->read;
 921
 922         /* Rx interrupt, but nothing sent from uCode */
 923         if (i == r)
 924                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 925
 926         /* calculate total frames need to be restock after handling RX */
 927         total_empty = r - rxq->write_actual;
 928         if (total_empty < 0)
 929                 total_empty += RX_QUEUE_SIZE;
 930
 931         if (total_empty > (RX_QUEUE_SIZE / 2))
 932                 fill_rx = 1;
 933
 934         while (i != r) {
 935                 rxb = rxq->queue[i];
 936
 937                 /* If an RXB doesn't have a Rx queue slot associated with it,
 938                  * then a bug has been introduced in the queue refilling
 939                  * routines -- catch it here */
 940                 BUG_ON(rxb == NULL);
 941
 942                 rxq->queue[i] = NULL;
 943
 944                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 945                                PAGE_SIZE << priv->hw_params.rx_page_order,
 946                                PCI_DMA_FROMDEVICE);
 947                 pkt = rxb_addr(rxb);
 948
 949                 trace_iwlwifi_dev_rx(priv, pkt,
 950                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 951
 952                 /* Reclaim a command buffer only if this packet is a response
 953                  *   to a (driver-originated) command.
 954                  * If the packet (e.g. Rx frame) originated from uCode,
 955                  *   there is no command buffer to reclaim.
 956                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 957                  *   but apparently a few don't get set; catch them here. */
 958                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 959                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 960                         (pkt->hdr.cmd != REPLY_RX) &&
 961                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 962                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 963                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 964                         (pkt->hdr.cmd != REPLY_TX);
 965
 966                 /* Based on type of command response or notification,
 967                  *   handle those that need handling via function in
 968                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 969                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 970                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 971                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 972                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 973                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 974                 } else {
 975                         /* No handling needed */
 976                         IWL_DEBUG_RX(priv,
 977                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 978                                 r, i, get_cmd_string(pkt->hdr.cmd),
 979                                 pkt->hdr.cmd);
 980                 }
 981
 982                 /*
 983                  * XXX: After here, we should always check rxb->page
 984                  * against NULL before touching it or its virtual
 985                  * memory (pkt). Because some rx_handler might have
 986                  * already taken or freed the pages.
 987                  */
 988
 989                 if (reclaim) {
 990                         /* Invoke any callbacks, transfer the buffer to caller,
 991                          * and fire off the (possibly) blocking iwl_send_cmd()
 992                          * as we reclaim the driver command queue */
 993                         if (rxb->page)
 994                                 iwl_tx_cmd_complete(priv, rxb);
 995                         else
 996                                 IWL_WARN(priv, "Claim null rxb?\n");
 997                 }
 998
 999                 /* Reuse the page if possible. For notification packets and
1000                  * SKBs that fail to Rx correctly, add them back into the
1001                  * rx_free list for reuse later. */
1002                 spin_lock_irqsave(&rxq->lock, flags);
1003                 if (rxb->page != NULL) {
1004                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1005                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1006                                 PCI_DMA_FROMDEVICE);
1007                         list_add_tail(&rxb->list, &rxq->rx_free);
1008                         rxq->free_count++;
1009                 } else
1010                         list_add_tail(&rxb->list, &rxq->rx_used);
1011
1012                 spin_unlock_irqrestore(&rxq->lock, flags);
1013
1014                 i = (i + 1) & RX_QUEUE_MASK;
1015                 /* If there are a lot of unused frames,
1016                  * restock the Rx queue so ucode wont assert. */
1017                 if (fill_rx) {
1018                         count++;
1019                         if (count >= 8) {
1020                                 rxq->read = i;
1021                                 iwlagn_rx_replenish_now(priv);
1022                                 count = 0;
1023                         }
1024                 }
1025         }
1026
1027         /* Backtrack one entry */
1028         rxq->read = i;
1029         if (fill_rx)
1030                 iwlagn_rx_replenish_now(priv);
1031         else
1032                 iwlagn_rx_queue_restock(priv);
1033 }
1034
1035 /* call this function to flush any scheduled tasklet */
1036 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1037 {
1038         /* wait to make sure we flush pending tasklet*/
1039         synchronize_irq(priv->pci_dev->irq);
1040         tasklet_kill(&priv->irq_tasklet);
1041 }
1042
1043 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1044 {
1045         u32 inta, handled = 0;
1046         u32 inta_fh;
1047         unsigned long flags;
1048         u32 i;
1049 #ifdef CONFIG_IWLWIFI_DEBUG
1050         u32 inta_mask;
1051 #endif
1052
1053         spin_lock_irqsave(&priv->lock, flags);
1054
1055         /* Ack/clear/reset pending uCode interrupts.
1056          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1057          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1058         inta = iwl_read32(priv, CSR_INT);
1059         iwl_write32(priv, CSR_INT, inta);
1060
1061         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1062          * Any new interrupts that happen after this, either while we're
1063          * in this tasklet, or later, will show up in next ISR/tasklet. */
1064         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1065         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1066
1067 #ifdef CONFIG_IWLWIFI_DEBUG
1068         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1069                 /* just for debug */
1070                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1071                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1072                               inta, inta_mask, inta_fh);
1073         }
1074 #endif
1075
1076         spin_unlock_irqrestore(&priv->lock, flags);
1077
1078         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1079          * atomic, make sure that inta covers all the interrupts that
1080          * we've discovered, even if FH interrupt came in just after
1081          * reading CSR_INT. */
1082         if (inta_fh & CSR49_FH_INT_RX_MASK)
1083                 inta |= CSR_INT_BIT_FH_RX;
1084         if (inta_fh & CSR49_FH_INT_TX_MASK)
1085                 inta |= CSR_INT_BIT_FH_TX;
1086
1087         /* Now service all interrupt bits discovered above. */
1088         if (inta & CSR_INT_BIT_HW_ERR) {
1089                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1090
1091                 /* Tell the device to stop sending interrupts */
1092                 iwl_disable_interrupts(priv);
1093
1094                 priv->isr_stats.hw++;
1095                 iwl_irq_handle_error(priv);
1096
1097                 handled |= CSR_INT_BIT_HW_ERR;
1098
1099                 return;
1100         }
1101
1102 #ifdef CONFIG_IWLWIFI_DEBUG
1103         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1104                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1105                 if (inta & CSR_INT_BIT_SCD) {
1106                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1107                                       "the frame/frames.\n");
1108                         priv->isr_stats.sch++;
1109                 }
1110
1111                 /* Alive notification via Rx interrupt will do the real work */
1112                 if (inta & CSR_INT_BIT_ALIVE) {
1113                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1114                         priv->isr_stats.alive++;
1115                 }
1116         }
1117 #endif
1118         /* Safely ignore these bits for debug checks below */
1119         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1120
1121         /* HW RF KILL switch toggled */
1122         if (inta & CSR_INT_BIT_RF_KILL) {
1123                 int hw_rf_kill = 0;
1124                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1125                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1126                         hw_rf_kill = 1;
1127
1128                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1129                                 hw_rf_kill ? "disable radio" : "enable radio");
1130
1131                 priv->isr_stats.rfkill++;
1132
1133                 /* driver only loads ucode once setting the interface up.
1134                  * the driver allows loading the ucode even if the radio
1135                  * is killed. Hence update the killswitch state here. The
1136                  * rfkill handler will care about restarting if needed.
1137                  */
1138                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1139                         if (hw_rf_kill)
1140                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1141                         else
1142                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1143                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1144                 }
1145
1146                 handled |= CSR_INT_BIT_RF_KILL;
1147         }
1148
1149         /* Chip got too hot and stopped itself */
1150         if (inta & CSR_INT_BIT_CT_KILL) {
1151                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1152                 priv->isr_stats.ctkill++;
1153                 handled |= CSR_INT_BIT_CT_KILL;
1154         }
1155
1156         /* Error detected by uCode */
1157         if (inta & CSR_INT_BIT_SW_ERR) {
1158                 IWL_ERR(priv, "Microcode SW error detected. "
1159                         " Restarting 0x%X.\n", inta);
1160                 priv->isr_stats.sw++;
1161                 priv->isr_stats.sw_err = inta;
1162                 iwl_irq_handle_error(priv);
1163                 handled |= CSR_INT_BIT_SW_ERR;
1164         }
1165
1166         /*
1167          * uCode wakes up after power-down sleep.
1168          * Tell device about any new tx or host commands enqueued,
1169          * and about any Rx buffers made available while asleep.
1170          */
1171         if (inta & CSR_INT_BIT_WAKEUP) {
1172                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1173                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1174                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1175                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1176                 priv->isr_stats.wakeup++;
1177                 handled |= CSR_INT_BIT_WAKEUP;
1178         }
1179
1180         /* All uCode command responses, including Tx command responses,
1181          * Rx "responses" (frame-received notification), and other
1182          * notifications from uCode come through here*/
1183         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1184                 iwl_rx_handle(priv);
1185                 priv->isr_stats.rx++;
1186                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1187         }
1188
1189         /* This "Tx" DMA channel is used only for loading uCode */
1190         if (inta & CSR_INT_BIT_FH_TX) {
1191                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1192                 priv->isr_stats.tx++;
1193                 handled |= CSR_INT_BIT_FH_TX;
1194                 /* Wake up uCode load routine, now that load is complete */
1195                 priv->ucode_write_complete = 1;
1196                 wake_up_interruptible(&priv->wait_command_queue);
1197         }
1198
1199         if (inta & ~handled) {
1200                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1201                 priv->isr_stats.unhandled++;
1202         }
1203
1204         if (inta & ~(priv->inta_mask)) {
1205                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1206                          inta & ~priv->inta_mask);
1207                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1208         }
1209
1210         /* Re-enable all interrupts */
1211         /* only Re-enable if diabled by irq */
1212         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1213                 iwl_enable_interrupts(priv);
1214
1215 #ifdef CONFIG_IWLWIFI_DEBUG
1216         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1217                 inta = iwl_read32(priv, CSR_INT);
1218                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1219                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1220                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1221                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1222         }
1223 #endif
1224 }
1225
1226 /* tasklet for iwlagn interrupt */
1227 static void iwl_irq_tasklet(struct iwl_priv *priv)
1228 {
1229         u32 inta = 0;
1230         u32 handled = 0;
1231         unsigned long flags;
1232         u32 i;
1233 #ifdef CONFIG_IWLWIFI_DEBUG
1234         u32 inta_mask;
1235 #endif
1236
1237         spin_lock_irqsave(&priv->lock, flags);
1238
1239         /* Ack/clear/reset pending uCode interrupts.
1240          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1241          */
1242         /* There is a hardware bug in the interrupt mask function that some
1243          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1244          * they are disabled in the CSR_INT_MASK register. Furthermore the
1245          * ICT interrupt handling mechanism has another bug that might cause
1246          * these unmasked interrupts fail to be detected. We workaround the
1247          * hardware bugs here by ACKing all the possible interrupts so that
1248          * interrupt coalescing can still be achieved.
1249          */
1250         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1251
1252         inta = priv->_agn.inta;
1253
1254 #ifdef CONFIG_IWLWIFI_DEBUG
1255         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1256                 /* just for debug */
1257                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1258                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1259                                 inta, inta_mask);
1260         }
1261 #endif
1262
1263         spin_unlock_irqrestore(&priv->lock, flags);
1264
1265         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1266         priv->_agn.inta = 0;
1267
1268         /* Now service all interrupt bits discovered above. */
1269         if (inta & CSR_INT_BIT_HW_ERR) {
1270                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1271
1272                 /* Tell the device to stop sending interrupts */
1273                 iwl_disable_interrupts(priv);
1274
1275                 priv->isr_stats.hw++;
1276                 iwl_irq_handle_error(priv);
1277
1278                 handled |= CSR_INT_BIT_HW_ERR;
1279
1280                 return;
1281         }
1282
1283 #ifdef CONFIG_IWLWIFI_DEBUG
1284         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1285                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1286                 if (inta & CSR_INT_BIT_SCD) {
1287                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1288                                       "the frame/frames.\n");
1289                         priv->isr_stats.sch++;
1290                 }
1291
1292                 /* Alive notification via Rx interrupt will do the real work */
1293                 if (inta & CSR_INT_BIT_ALIVE) {
1294                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1295                         priv->isr_stats.alive++;
1296                 }
1297         }
1298 #endif
1299         /* Safely ignore these bits for debug checks below */
1300         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1301
1302         /* HW RF KILL switch toggled */
1303         if (inta & CSR_INT_BIT_RF_KILL) {
1304                 int hw_rf_kill = 0;
1305                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1306                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1307                         hw_rf_kill = 1;
1308
1309                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1310                                 hw_rf_kill ? "disable radio" : "enable radio");
1311
1312                 priv->isr_stats.rfkill++;
1313
1314                 /* driver only loads ucode once setting the interface up.
1315                  * the driver allows loading the ucode even if the radio
1316                  * is killed. Hence update the killswitch state here. The
1317                  * rfkill handler will care about restarting if needed.
1318                  */
1319                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1320                         if (hw_rf_kill)
1321                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1322                         else
1323                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1324                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1325                 }
1326
1327                 handled |= CSR_INT_BIT_RF_KILL;
1328         }
1329
1330         /* Chip got too hot and stopped itself */
1331         if (inta & CSR_INT_BIT_CT_KILL) {
1332                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1333                 priv->isr_stats.ctkill++;
1334                 handled |= CSR_INT_BIT_CT_KILL;
1335         }
1336
1337         /* Error detected by uCode */
1338         if (inta & CSR_INT_BIT_SW_ERR) {
1339                 IWL_ERR(priv, "Microcode SW error detected. "
1340                         " Restarting 0x%X.\n", inta);
1341                 priv->isr_stats.sw++;
1342                 priv->isr_stats.sw_err = inta;
1343                 iwl_irq_handle_error(priv);
1344                 handled |= CSR_INT_BIT_SW_ERR;
1345         }
1346
1347         /* uCode wakes up after power-down sleep */
1348         if (inta & CSR_INT_BIT_WAKEUP) {
1349                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1350                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1351                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1352                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1353
1354                 priv->isr_stats.wakeup++;
1355
1356                 handled |= CSR_INT_BIT_WAKEUP;
1357         }
1358
1359         /* All uCode command responses, including Tx command responses,
1360          * Rx "responses" (frame-received notification), and other
1361          * notifications from uCode come through here*/
1362         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1363                         CSR_INT_BIT_RX_PERIODIC)) {
1364                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1365                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1366                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1367                         iwl_write32(priv, CSR_FH_INT_STATUS,
1368                                         CSR49_FH_INT_RX_MASK);
1369                 }
1370                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1371                         handled |= CSR_INT_BIT_RX_PERIODIC;
1372                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1373                 }
1374                 /* Sending RX interrupt require many steps to be done in the
1375                  * the device:
1376                  * 1- write interrupt to current index in ICT table.
1377                  * 2- dma RX frame.
1378                  * 3- update RX shared data to indicate last write index.
1379                  * 4- send interrupt.
1380                  * This could lead to RX race, driver could receive RX interrupt
1381                  * but the shared data changes does not reflect this;
1382                  * periodic interrupt will detect any dangling Rx activity.
1383                  */
1384
1385                 /* Disable periodic interrupt; we use it as just a one-shot. */
1386                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1387                             CSR_INT_PERIODIC_DIS);
1388                 iwl_rx_handle(priv);
1389
1390                 /*
1391                  * Enable periodic interrupt in 8 msec only if we received
1392                  * real RX interrupt (instead of just periodic int), to catch
1393                  * any dangling Rx interrupt.  If it was just the periodic
1394                  * interrupt, there was no dangling Rx activity, and no need
1395                  * to extend the periodic interrupt; one-shot is enough.
1396                  */
1397                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1398                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1399                                     CSR_INT_PERIODIC_ENA);
1400
1401                 priv->isr_stats.rx++;
1402         }
1403
1404         /* This "Tx" DMA channel is used only for loading uCode */
1405         if (inta & CSR_INT_BIT_FH_TX) {
1406                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1407                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1408                 priv->isr_stats.tx++;
1409                 handled |= CSR_INT_BIT_FH_TX;
1410                 /* Wake up uCode load routine, now that load is complete */
1411                 priv->ucode_write_complete = 1;
1412                 wake_up_interruptible(&priv->wait_command_queue);
1413         }
1414
1415         if (inta & ~handled) {
1416                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1417                 priv->isr_stats.unhandled++;
1418         }
1419
1420         if (inta & ~(priv->inta_mask)) {
1421                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1422                          inta & ~priv->inta_mask);
1423         }
1424
1425         /* Re-enable all interrupts */
1426         /* only Re-enable if diabled by irq */
1427         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1428                 iwl_enable_interrupts(priv);
1429 }
1430
1431 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1432 #define ACK_CNT_RATIO (50)
1433 #define BA_TIMEOUT_CNT (5)
1434 #define BA_TIMEOUT_MAX (16)
1435
1436 /**
1437  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1438  *
1439  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1440  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1441  * operation state.
1442  */
1443 bool iwl_good_ack_health(struct iwl_priv *priv,
1444                                 struct iwl_rx_packet *pkt)
1445 {
1446         bool rc = true;
1447         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1448         int ba_timeout_delta;
1449
1450         actual_ack_cnt_delta =
1451                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1452                 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1453         expected_ack_cnt_delta =
1454                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1455                 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1456         ba_timeout_delta =
1457                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1458                 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1459         if ((priv->_agn.agg_tids_count > 0) &&
1460             (expected_ack_cnt_delta > 0) &&
1461             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1462                 < ACK_CNT_RATIO) &&
1463             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1464                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1465                                 " expected_ack_cnt = %d\n",
1466                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1467
1468 #ifdef CONFIG_IWLWIFI_DEBUG
1469                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1470                                 priv->delta_statistics.tx.rx_detected_cnt);
1471                 IWL_DEBUG_RADIO(priv,
1472                                 "ack_or_ba_timeout_collision delta = %d\n",
1473                                 priv->delta_statistics.tx.
1474                                 ack_or_ba_timeout_collision);
1475 #endif
1476                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1477                                 ba_timeout_delta);
1478                 if (!actual_ack_cnt_delta &&
1479                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1480                         rc = false;
1481         }
1482         return rc;
1483 }
1484
1485
1486 /******************************************************************************
1487  *
1488  * uCode download functions
1489  *
1490  ******************************************************************************/
1491
1492 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1493 {
1494         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1495         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1496         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1497         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1498         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1499         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1500 }
1501
1502 static void iwl_nic_start(struct iwl_priv *priv)
1503 {
1504         /* Remove all resets to allow NIC to operate */
1505         iwl_write32(priv, CSR_RESET, 0);
1506 }
1507
1508
1509 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1510 static int iwl_mac_setup_register(struct iwl_priv *priv);
1511
1512 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1513 {
1514         const char *name_pre = priv->cfg->fw_name_pre;
1515
1516         if (first)
1517                 priv->fw_index = priv->cfg->ucode_api_max;
1518         else
1519                 priv->fw_index--;
1520
1521         if (priv->fw_index < priv->cfg->ucode_api_min) {
1522                 IWL_ERR(priv, "no suitable firmware found!\n");
1523                 return -ENOENT;
1524         }
1525
1526         sprintf(priv->firmware_name, "%s%d%s",
1527                 name_pre, priv->fw_index, ".ucode");
1528
1529         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1530                        priv->firmware_name);
1531
1532         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1533                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1534                                        iwl_ucode_callback);
1535 }
1536
1537 /**
1538  * iwl_ucode_callback - callback when firmware was loaded
1539  *
1540  * If loaded successfully, copies the firmware into buffers
1541  * for the card to fetch (via DMA).
1542  */
1543 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1544 {
1545         struct iwl_priv *priv = context;
1546         struct iwl_ucode_header *ucode;
1547         const unsigned int api_max = priv->cfg->ucode_api_max;
1548         const unsigned int api_min = priv->cfg->ucode_api_min;
1549         u8 *src;
1550         size_t len;
1551         u32 api_ver, build;
1552         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1553         int err;
1554         u16 eeprom_ver;
1555
1556         if (!ucode_raw) {
1557                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1558                         priv->firmware_name);
1559                 goto try_again;
1560         }
1561
1562         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1563                        priv->firmware_name, ucode_raw->size);
1564
1565         /* Make sure that we got at least the v1 header! */
1566         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1567                 IWL_ERR(priv, "File size way too small!\n");
1568                 goto try_again;
1569         }
1570
1571         /* Data from ucode file:  header followed by uCode images */
1572         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1573
1574         priv->ucode_ver = le32_to_cpu(ucode->ver);
1575         api_ver = IWL_UCODE_API(priv->ucode_ver);
1576         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1577         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1578         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1579         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1580         init_data_size =
1581                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1582         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1583         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1584
1585         /* api_ver should match the api version forming part of the
1586          * firmware filename ... but we don't check for that and only rely
1587          * on the API version read from firmware header from here on forward */
1588
1589         if (api_ver < api_min || api_ver > api_max) {
1590                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1591                           "Driver supports v%u, firmware is v%u.\n",
1592                           api_max, api_ver);
1593                 goto try_again;
1594         }
1595
1596         if (api_ver != api_max)
1597                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1598                           "got v%u. New firmware can be obtained "
1599                           "from http://www.intellinuxwireless.org.\n",
1600                           api_max, api_ver);
1601
1602         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1603                IWL_UCODE_MAJOR(priv->ucode_ver),
1604                IWL_UCODE_MINOR(priv->ucode_ver),
1605                IWL_UCODE_API(priv->ucode_ver),
1606                IWL_UCODE_SERIAL(priv->ucode_ver));
1607
1608         snprintf(priv->hw->wiphy->fw_version,
1609                  sizeof(priv->hw->wiphy->fw_version),
1610                  "%u.%u.%u.%u",
1611                  IWL_UCODE_MAJOR(priv->ucode_ver),
1612                  IWL_UCODE_MINOR(priv->ucode_ver),
1613                  IWL_UCODE_API(priv->ucode_ver),
1614                  IWL_UCODE_SERIAL(priv->ucode_ver));
1615
1616         if (build)
1617                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1618
1619         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1620         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1621                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1622                        ? "OTP" : "EEPROM", eeprom_ver);
1623
1624         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1625                        priv->ucode_ver);
1626         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1627                        inst_size);
1628         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1629                        data_size);
1630         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1631                        init_size);
1632         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1633                        init_data_size);
1634         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1635                        boot_size);
1636
1637         /*
1638          * For any of the failures below (before allocating pci memory)
1639          * we will try to load a version with a smaller API -- maybe the
1640          * user just got a corrupted version of the latest API.
1641          */
1642
1643         /* Verify size of file vs. image size info in file's header */
1644         if (ucode_raw->size !=
1645                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1646                 inst_size + data_size + init_size +
1647                 init_data_size + boot_size) {
1648
1649                 IWL_DEBUG_INFO(priv,
1650                         "uCode file size %d does not match expected size\n",
1651                         (int)ucode_raw->size);
1652                 goto try_again;
1653         }
1654
1655         /* Verify that uCode images will fit in card's SRAM */
1656         if (inst_size > priv->hw_params.max_inst_size) {
1657                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1658                                inst_size);
1659                 goto try_again;
1660         }
1661
1662         if (data_size > priv->hw_params.max_data_size) {
1663                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1664                                 data_size);
1665                 goto try_again;
1666         }
1667         if (init_size > priv->hw_params.max_inst_size) {
1668                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1669                         init_size);
1670                 goto try_again;
1671         }
1672         if (init_data_size > priv->hw_params.max_data_size) {
1673                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1674                       init_data_size);
1675                 goto try_again;
1676         }
1677         if (boot_size > priv->hw_params.max_bsm_size) {
1678                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1679                         boot_size);
1680                 goto try_again;
1681         }
1682
1683         /* Allocate ucode buffers for card's bus-master loading ... */
1684
1685         /* Runtime instructions and 2 copies of data:
1686          * 1) unmodified from disk
1687          * 2) backup cache for save/restore during power-downs */
1688         priv->ucode_code.len = inst_size;
1689         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1690
1691         priv->ucode_data.len = data_size;
1692         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1693
1694         priv->ucode_data_backup.len = data_size;
1695         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1696
1697         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1698             !priv->ucode_data_backup.v_addr)
1699                 goto err_pci_alloc;
1700
1701         /* Initialization instructions and data */
1702         if (init_size && init_data_size) {
1703                 priv->ucode_init.len = init_size;
1704                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1705
1706                 priv->ucode_init_data.len = init_data_size;
1707                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1708
1709                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1710                         goto err_pci_alloc;
1711         }
1712
1713         /* Bootstrap (instructions only, no data) */
1714         if (boot_size) {
1715                 priv->ucode_boot.len = boot_size;
1716                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1717
1718                 if (!priv->ucode_boot.v_addr)
1719                         goto err_pci_alloc;
1720         }
1721
1722         /* Copy images into buffers for card's bus-master reads ... */
1723
1724         /* Runtime instructions (first block of data in file) */
1725         len = inst_size;
1726         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1727         memcpy(priv->ucode_code.v_addr, src, len);
1728         src += len;
1729
1730         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1731                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1732
1733         /* Runtime data (2nd block)
1734          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1735         len = data_size;
1736         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1737         memcpy(priv->ucode_data.v_addr, src, len);
1738         memcpy(priv->ucode_data_backup.v_addr, src, len);
1739         src += len;
1740
1741         /* Initialization instructions (3rd block) */
1742         if (init_size) {
1743                 len = init_size;
1744                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1745                                 len);
1746                 memcpy(priv->ucode_init.v_addr, src, len);
1747                 src += len;
1748         }
1749
1750         /* Initialization data (4th block) */
1751         if (init_data_size) {
1752                 len = init_data_size;
1753                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1754                                len);
1755                 memcpy(priv->ucode_init_data.v_addr, src, len);
1756                 src += len;
1757         }
1758
1759         /* Bootstrap instructions (5th block) */
1760         len = boot_size;
1761         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1762         memcpy(priv->ucode_boot.v_addr, src, len);
1763
1764         /**************************************************
1765          * This is still part of probe() in a sense...
1766          *
1767          * 9. Setup and register with mac80211 and debugfs
1768          **************************************************/
1769         err = iwl_mac_setup_register(priv);
1770         if (err)
1771                 goto out_unbind;
1772
1773         err = iwl_dbgfs_register(priv, DRV_NAME);
1774         if (err)
1775                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1776
1777         /* We have our copies now, allow OS release its copies */
1778         release_firmware(ucode_raw);
1779         complete(&priv->_agn.firmware_loading_complete);
1780         return;
1781
1782  try_again:
1783         /* try next, if any */
1784         if (iwl_request_firmware(priv, false))
1785                 goto out_unbind;
1786         release_firmware(ucode_raw);
1787         return;
1788
1789  err_pci_alloc:
1790         IWL_ERR(priv, "failed to allocate pci memory\n");
1791         iwl_dealloc_ucode_pci(priv);
1792  out_unbind:
1793         complete(&priv->_agn.firmware_loading_complete);
1794         device_release_driver(&priv->pci_dev->dev);
1795         release_firmware(ucode_raw);
1796 }
1797
1798 static const char *desc_lookup_text[] = {
1799         "OK",
1800         "FAIL",
1801         "BAD_PARAM",
1802         "BAD_CHECKSUM",
1803         "NMI_INTERRUPT_WDG",
1804         "SYSASSERT",
1805         "FATAL_ERROR",
1806         "BAD_COMMAND",
1807         "HW_ERROR_TUNE_LOCK",
1808         "HW_ERROR_TEMPERATURE",
1809         "ILLEGAL_CHAN_FREQ",
1810         "VCC_NOT_STABLE",
1811         "FH_ERROR",
1812         "NMI_INTERRUPT_HOST",
1813         "NMI_INTERRUPT_ACTION_PT",
1814         "NMI_INTERRUPT_UNKNOWN",
1815         "UCODE_VERSION_MISMATCH",
1816         "HW_ERROR_ABS_LOCK",
1817         "HW_ERROR_CAL_LOCK_FAIL",
1818         "NMI_INTERRUPT_INST_ACTION_PT",
1819         "NMI_INTERRUPT_DATA_ACTION_PT",
1820         "NMI_TRM_HW_ER",
1821         "NMI_INTERRUPT_TRM",
1822         "NMI_INTERRUPT_BREAK_POINT"
1823         "DEBUG_0",
1824         "DEBUG_1",
1825         "DEBUG_2",
1826         "DEBUG_3",
1827         "ADVANCED SYSASSERT"
1828 };
1829
1830 static const char *desc_lookup(int i)
1831 {
1832         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1833
1834         if (i < 0 || i > max)
1835                 i = max;
1836
1837         return desc_lookup_text[i];
1838 }
1839
1840 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1841 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1842
1843 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1844 {
1845         u32 data2, line;
1846         u32 desc, time, count, base, data1;
1847         u32 blink1, blink2, ilink1, ilink2;
1848         u32 pc, hcmd;
1849
1850         if (priv->ucode_type == UCODE_INIT)
1851                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1852         else
1853                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1854
1855         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1856                 IWL_ERR(priv,
1857                         "Not valid error log pointer 0x%08X for %s uCode\n",
1858                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1859                 return;
1860         }
1861
1862         count = iwl_read_targ_mem(priv, base);
1863
1864         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1865                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1866                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1867                         priv->status, count);
1868         }
1869
1870         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1871         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
1872         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1873         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1874         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1875         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1876         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1877         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1878         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1879         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1880         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
1881
1882         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1883                                       blink1, blink2, ilink1, ilink2);
1884
1885         IWL_ERR(priv, "Desc                               Time       "
1886                 "data1      data2      line\n");
1887         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1888                 desc_lookup(desc), desc, time, data1, data2, line);
1889         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1890         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1891                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1892 }
1893
1894 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1895
1896 /**
1897  * iwl_print_event_log - Dump error event log to syslog
1898  *
1899  */
1900 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1901                                u32 num_events, u32 mode,
1902                                int pos, char **buf, size_t bufsz)
1903 {
1904         u32 i;
1905         u32 base;       /* SRAM byte address of event log header */
1906         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1907         u32 ptr;        /* SRAM byte address of log data */
1908         u32 ev, time, data; /* event log data */
1909         unsigned long reg_flags;
1910
1911         if (num_events == 0)
1912                 return pos;
1913         if (priv->ucode_type == UCODE_INIT)
1914                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1915         else
1916                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1917
1918         if (mode == 0)
1919                 event_size = 2 * sizeof(u32);
1920         else
1921                 event_size = 3 * sizeof(u32);
1922
1923         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1924
1925         /* Make sure device is powered up for SRAM reads */
1926         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1927         iwl_grab_nic_access(priv);
1928
1929         /* Set starting address; reads will auto-increment */
1930         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1931         rmb();
1932
1933         /* "time" is actually "data" for mode 0 (no timestamp).
1934         * place event id # at far right for easier visual parsing. */
1935         for (i = 0; i < num_events; i++) {
1936                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1937                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1938                 if (mode == 0) {
1939                         /* data, ev */
1940                         if (bufsz) {
1941                                 pos += scnprintf(*buf + pos, bufsz - pos,
1942                                                 "EVT_LOG:0x%08x:%04u\n",
1943                                                 time, ev);
1944                         } else {
1945                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1946                                         time, ev);
1947                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1948                                         time, ev);
1949                         }
1950                 } else {
1951                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1952                         if (bufsz) {
1953                                 pos += scnprintf(*buf + pos, bufsz - pos,
1954                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1955                                                  time, data, ev);
1956                         } else {
1957                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1958                                         time, data, ev);
1959                                 trace_iwlwifi_dev_ucode_event(priv, time,
1960                                         data, ev);
1961                         }
1962                 }
1963         }
1964
1965         /* Allow device to power down */
1966         iwl_release_nic_access(priv);
1967         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1968         return pos;
1969 }
1970
1971 /**
1972  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1973  */
1974 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1975                                     u32 num_wraps, u32 next_entry,
1976                                     u32 size, u32 mode,
1977                                     int pos, char **buf, size_t bufsz)
1978 {
1979         /*
1980          * display the newest DEFAULT_LOG_ENTRIES entries
1981          * i.e the entries just before the next ont that uCode would fill.
1982          */
1983         if (num_wraps) {
1984                 if (next_entry < size) {
1985                         pos = iwl_print_event_log(priv,
1986                                                 capacity - (size - next_entry),
1987                                                 size - next_entry, mode,
1988                                                 pos, buf, bufsz);
1989                         pos = iwl_print_event_log(priv, 0,
1990                                                   next_entry, mode,
1991                                                   pos, buf, bufsz);
1992                 } else
1993                         pos = iwl_print_event_log(priv, next_entry - size,
1994                                                   size, mode, pos, buf, bufsz);
1995         } else {
1996                 if (next_entry < size) {
1997                         pos = iwl_print_event_log(priv, 0, next_entry,
1998                                                   mode, pos, buf, bufsz);
1999                 } else {
2000                         pos = iwl_print_event_log(priv, next_entry - size,
2001                                                   size, mode, pos, buf, bufsz);
2002                 }
2003         }
2004         return pos;
2005 }
2006
2007 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2008
2009 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2010                             char **buf, bool display)
2011 {
2012         u32 base;       /* SRAM byte address of event log header */
2013         u32 capacity;   /* event log capacity in # entries */
2014         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2015         u32 num_wraps;  /* # times uCode wrapped to top of log */
2016         u32 next_entry; /* index of next entry to be written by uCode */
2017         u32 size;       /* # entries that we'll print */
2018         int pos = 0;
2019         size_t bufsz = 0;
2020
2021         if (priv->ucode_type == UCODE_INIT)
2022                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2023         else
2024                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2025
2026         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2027                 IWL_ERR(priv,
2028                         "Invalid event log pointer 0x%08X for %s uCode\n",
2029                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2030                 return -EINVAL;
2031         }
2032
2033         /* event log header */
2034         capacity = iwl_read_targ_mem(priv, base);
2035         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2036         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2037         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2038
2039         if (capacity > priv->cfg->max_event_log_size) {
2040                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2041                         capacity, priv->cfg->max_event_log_size);
2042                 capacity = priv->cfg->max_event_log_size;
2043         }
2044
2045         if (next_entry > priv->cfg->max_event_log_size) {
2046                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2047                         next_entry, priv->cfg->max_event_log_size);
2048                 next_entry = priv->cfg->max_event_log_size;
2049         }
2050
2051         size = num_wraps ? capacity : next_entry;
2052
2053         /* bail out if nothing in log */
2054         if (size == 0) {
2055                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2056                 return pos;
2057         }
2058
2059 #ifdef CONFIG_IWLWIFI_DEBUG
2060         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2061                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2062                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2063 #else
2064         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2065                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2066 #endif
2067         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2068                 size);
2069
2070 #ifdef CONFIG_IWLWIFI_DEBUG
2071         if (display) {
2072                 if (full_log)
2073                         bufsz = capacity * 48;
2074                 else
2075                         bufsz = size * 48;
2076                 *buf = kmalloc(bufsz, GFP_KERNEL);
2077                 if (!*buf)
2078                         return -ENOMEM;
2079         }
2080         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2081                 /*
2082                  * if uCode has wrapped back to top of log,
2083                  * start at the oldest entry,
2084                  * i.e the next one that uCode would fill.
2085                  */
2086                 if (num_wraps)
2087                         pos = iwl_print_event_log(priv, next_entry,
2088                                                 capacity - next_entry, mode,
2089                                                 pos, buf, bufsz);
2090                 /* (then/else) start at top of log */
2091                 pos = iwl_print_event_log(priv, 0,
2092                                           next_entry, mode, pos, buf, bufsz);
2093         } else
2094                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2095                                                 next_entry, size, mode,
2096                                                 pos, buf, bufsz);
2097 #else
2098         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2099                                         next_entry, size, mode,
2100                                         pos, buf, bufsz);
2101 #endif
2102         return pos;
2103 }
2104
2105 /**
2106  * iwl_alive_start - called after REPLY_ALIVE notification received
2107  *                   from protocol/runtime uCode (initialization uCode's
2108  *                   Alive gets handled by iwl_init_alive_start()).
2109  */
2110 static void iwl_alive_start(struct iwl_priv *priv)
2111 {
2112         int ret = 0;
2113
2114         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2115
2116         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2117                 /* We had an error bringing up the hardware, so take it
2118                  * all the way back down so we can try again */
2119                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2120                 goto restart;
2121         }
2122
2123         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2124          * This is a paranoid check, because we would not have gotten the
2125          * "runtime" alive if code weren't properly loaded.  */
2126         if (iwl_verify_ucode(priv)) {
2127                 /* Runtime instruction load was bad;
2128                  * take it all the way back down so we can try again */
2129                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2130                 goto restart;
2131         }
2132
2133         ret = priv->cfg->ops->lib->alive_notify(priv);
2134         if (ret) {
2135                 IWL_WARN(priv,
2136                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2137                 goto restart;
2138         }
2139
2140         /* After the ALIVE response, we can send host commands to the uCode */
2141         set_bit(STATUS_ALIVE, &priv->status);
2142
2143         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2144                 /* Enable timer to monitor the driver queues */
2145                 mod_timer(&priv->monitor_recover,
2146                         jiffies +
2147                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2148         }
2149
2150         if (iwl_is_rfkill(priv))
2151                 return;
2152
2153         ieee80211_wake_queues(priv->hw);
2154
2155         priv->active_rate = IWL_RATES_MASK;
2156
2157         /* Configure Tx antenna selection based on H/W config */
2158         if (priv->cfg->ops->hcmd->set_tx_ant)
2159                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2160
2161         if (iwl_is_associated(priv)) {
2162                 struct iwl_rxon_cmd *active_rxon =
2163                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2164                 /* apply any changes in staging */
2165                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2166                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2167         } else {
2168                 /* Initialize our rx_config data */
2169                 iwl_connection_init_rx_config(priv, priv->iw_mode);
2170
2171                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2172                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2173
2174                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2175         }
2176
2177         /* Configure Bluetooth device coexistence support */
2178         priv->cfg->ops->hcmd->send_bt_config(priv);
2179
2180         iwl_reset_run_time_calib(priv);
2181
2182         /* Configure the adapter for unassociated operation */
2183         iwlcore_commit_rxon(priv);
2184
2185         /* At this point, the NIC is initialized and operational */
2186         iwl_rf_kill_ct_config(priv);
2187
2188         iwl_leds_init(priv);
2189
2190         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2191         set_bit(STATUS_READY, &priv->status);
2192         wake_up_interruptible(&priv->wait_command_queue);
2193
2194         iwl_power_update_mode(priv, true);
2195         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2196
2197
2198         return;
2199
2200  restart:
2201         queue_work(priv->workqueue, &priv->restart);
2202 }
2203
2204 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2205
2206 static void __iwl_down(struct iwl_priv *priv)
2207 {
2208         unsigned long flags;
2209         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2210
2211         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2212
2213         if (!exit_pending)
2214                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2215
2216         iwl_clear_ucode_stations(priv, true);
2217
2218         /* Unblock any waiting calls */
2219         wake_up_interruptible_all(&priv->wait_command_queue);
2220
2221         /* Wipe out the EXIT_PENDING status bit if we are not actually
2222          * exiting the module */
2223         if (!exit_pending)
2224                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2225
2226         /* stop and reset the on-board processor */
2227         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2228
2229         /* tell the device to stop sending interrupts */
2230         spin_lock_irqsave(&priv->lock, flags);
2231         iwl_disable_interrupts(priv);
2232         spin_unlock_irqrestore(&priv->lock, flags);
2233         iwl_synchronize_irq(priv);
2234
2235         if (priv->mac80211_registered)
2236                 ieee80211_stop_queues(priv->hw);
2237
2238         /* If we have not previously called iwl_init() then
2239          * clear all bits but the RF Kill bit and return */
2240         if (!iwl_is_init(priv)) {
2241                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2242                                         STATUS_RF_KILL_HW |
2243                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2244                                         STATUS_GEO_CONFIGURED |
2245                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2246                                         STATUS_EXIT_PENDING;
2247                 goto exit;
2248         }
2249
2250         /* ...otherwise clear out all the status bits but the RF Kill
2251          * bit and continue taking the NIC down. */
2252         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2253                                 STATUS_RF_KILL_HW |
2254                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2255                                 STATUS_GEO_CONFIGURED |
2256                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2257                                 STATUS_FW_ERROR |
2258                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2259                                 STATUS_EXIT_PENDING;
2260
2261         /* device going down, Stop using ICT table */
2262         iwl_disable_ict(priv);
2263
2264         iwlagn_txq_ctx_stop(priv);
2265         iwlagn_rxq_stop(priv);
2266
2267         /* Power-down device's busmaster DMA clocks */
2268         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2269         udelay(5);
2270
2271         /* Make sure (redundant) we've released our request to stay awake */
2272         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2273
2274         /* Stop the device, and put it in low power state */
2275         priv->cfg->ops->lib->apm_ops.stop(priv);
2276
2277  exit:
2278         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2279
2280         if (priv->ibss_beacon)
2281                 dev_kfree_skb(priv->ibss_beacon);
2282         priv->ibss_beacon = NULL;
2283
2284         /* clear out any free frames */
2285         iwl_clear_free_frames(priv);
2286 }
2287
2288 static void iwl_down(struct iwl_priv *priv)
2289 {
2290         mutex_lock(&priv->mutex);
2291         __iwl_down(priv);
2292         mutex_unlock(&priv->mutex);
2293
2294         iwl_cancel_deferred_work(priv);
2295 }
2296
2297 #define HW_READY_TIMEOUT (50)
2298
2299 static int iwl_set_hw_ready(struct iwl_priv *priv)
2300 {
2301         int ret = 0;
2302
2303         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2304                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2305
2306         /* See if we got it */
2307         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2308                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2309                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2310                                 HW_READY_TIMEOUT);
2311         if (ret != -ETIMEDOUT)
2312                 priv->hw_ready = true;
2313         else
2314                 priv->hw_ready = false;
2315
2316         IWL_DEBUG_INFO(priv, "hardware %s\n",
2317                       (priv->hw_ready == 1) ? "ready" : "not ready");
2318         return ret;
2319 }
2320
2321 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2322 {
2323         int ret = 0;
2324
2325         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2326
2327         ret = iwl_set_hw_ready(priv);
2328         if (priv->hw_ready)
2329                 return ret;
2330
2331         /* If HW is not ready, prepare the conditions to check again */
2332         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2333                         CSR_HW_IF_CONFIG_REG_PREPARE);
2334
2335         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2336                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2337                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2338
2339         /* HW should be ready by now, check again. */
2340         if (ret != -ETIMEDOUT)
2341                 iwl_set_hw_ready(priv);
2342
2343         return ret;
2344 }
2345
2346 #define MAX_HW_RESTARTS 5
2347
2348 static int __iwl_up(struct iwl_priv *priv)
2349 {
2350         int i;
2351         int ret;
2352
2353         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2354                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2355                 return -EIO;
2356         }
2357
2358         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2359                 IWL_ERR(priv, "ucode not available for device bringup\n");
2360                 return -EIO;
2361         }
2362
2363         iwl_prepare_card_hw(priv);
2364
2365         if (!priv->hw_ready) {
2366                 IWL_WARN(priv, "Exit HW not ready\n");
2367                 return -EIO;
2368         }
2369
2370         /* If platform's RF_KILL switch is NOT set to KILL */
2371         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2372                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2373         else
2374                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2375
2376         if (iwl_is_rfkill(priv)) {
2377                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2378
2379                 iwl_enable_interrupts(priv);
2380                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2381                 return 0;
2382         }
2383
2384         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2385
2386         ret = iwlagn_hw_nic_init(priv);
2387         if (ret) {
2388                 IWL_ERR(priv, "Unable to init nic\n");
2389                 return ret;
2390         }
2391
2392         /* make sure rfkill handshake bits are cleared */
2393         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2394         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2395                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2396
2397         /* clear (again), then enable host interrupts */
2398         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2399         iwl_enable_interrupts(priv);
2400
2401         /* really make sure rfkill handshake bits are cleared */
2402         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2403         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2404
2405         /* Copy original ucode data image from disk into backup cache.
2406          * This will be used to initialize the on-board processor's
2407          * data SRAM for a clean start when the runtime program first loads. */
2408         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2409                priv->ucode_data.len);
2410
2411         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2412
2413                 /* load bootstrap state machine,
2414                  * load bootstrap program into processor's memory,
2415                  * prepare to load the "initialize" uCode */
2416                 ret = priv->cfg->ops->lib->load_ucode(priv);
2417
2418                 if (ret) {
2419                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2420                                 ret);
2421                         continue;
2422                 }
2423
2424                 /* start card; "initialize" will load runtime ucode */
2425                 iwl_nic_start(priv);
2426
2427                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2428
2429                 return 0;
2430         }
2431
2432         set_bit(STATUS_EXIT_PENDING, &priv->status);
2433         __iwl_down(priv);
2434         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2435
2436         /* tried to restart and config the device for as long as our
2437          * patience could withstand */
2438         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2439         return -EIO;
2440 }
2441
2442
2443 /*****************************************************************************
2444  *
2445  * Workqueue callbacks
2446  *
2447  *****************************************************************************/
2448
2449 static void iwl_bg_init_alive_start(struct work_struct *data)
2450 {
2451         struct iwl_priv *priv =
2452             container_of(data, struct iwl_priv, init_alive_start.work);
2453
2454         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2455                 return;
2456
2457         mutex_lock(&priv->mutex);
2458         priv->cfg->ops->lib->init_alive_start(priv);
2459         mutex_unlock(&priv->mutex);
2460 }
2461
2462 static void iwl_bg_alive_start(struct work_struct *data)
2463 {
2464         struct iwl_priv *priv =
2465             container_of(data, struct iwl_priv, alive_start.work);
2466
2467         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2468                 return;
2469
2470         /* enable dram interrupt */
2471         iwl_reset_ict(priv);
2472
2473         mutex_lock(&priv->mutex);
2474         iwl_alive_start(priv);
2475         mutex_unlock(&priv->mutex);
2476 }
2477
2478 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2479 {
2480         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2481                         run_time_calib_work);
2482
2483         mutex_lock(&priv->mutex);
2484
2485         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2486             test_bit(STATUS_SCANNING, &priv->status)) {
2487                 mutex_unlock(&priv->mutex);
2488                 return;
2489         }
2490
2491         if (priv->start_calib) {
2492                 iwl_chain_noise_calibration(priv, &priv->statistics);
2493
2494                 iwl_sensitivity_calibration(priv, &priv->statistics);
2495         }
2496
2497         mutex_unlock(&priv->mutex);
2498         return;
2499 }
2500
2501 static void iwl_bg_restart(struct work_struct *data)
2502 {
2503         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2504
2505         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2506                 return;
2507
2508         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2509                 mutex_lock(&priv->mutex);
2510                 priv->vif = NULL;
2511                 priv->is_open = 0;
2512                 mutex_unlock(&priv->mutex);
2513                 iwl_down(priv);
2514                 ieee80211_restart_hw(priv->hw);
2515         } else {
2516                 iwl_down(priv);
2517
2518                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2519                         return;
2520
2521                 mutex_lock(&priv->mutex);
2522                 __iwl_up(priv);
2523                 mutex_unlock(&priv->mutex);
2524         }
2525 }
2526
2527 static void iwl_bg_rx_replenish(struct work_struct *data)
2528 {
2529         struct iwl_priv *priv =
2530             container_of(data, struct iwl_priv, rx_replenish);
2531
2532         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2533                 return;
2534
2535         mutex_lock(&priv->mutex);
2536         iwlagn_rx_replenish(priv);
2537         mutex_unlock(&priv->mutex);
2538 }
2539
2540 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2541
2542 void iwl_post_associate(struct iwl_priv *priv)
2543 {
2544         struct ieee80211_conf *conf = NULL;
2545         int ret = 0;
2546
2547         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2548                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2549                 return;
2550         }
2551
2552         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2553                 return;
2554
2555
2556         if (!priv->vif || !priv->is_open)
2557                 return;
2558
2559         iwl_scan_cancel_timeout(priv, 200);
2560
2561         conf = ieee80211_get_hw_conf(priv->hw);
2562
2563         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2564         iwlcore_commit_rxon(priv);
2565
2566         iwl_setup_rxon_timing(priv);
2567         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2568                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2569         if (ret)
2570                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2571                             "Attempting to continue.\n");
2572
2573         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2574
2575         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2576
2577         if (priv->cfg->ops->hcmd->set_rxon_chain)
2578                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2579
2580         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2581
2582         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2583                         priv->assoc_id, priv->beacon_int);
2584
2585         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2586                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2587         else
2588                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2589
2590         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2591                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2592                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2593                 else
2594                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2595
2596                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2597                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2598
2599         }
2600
2601         iwlcore_commit_rxon(priv);
2602
2603         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2604                         priv->assoc_id, priv->active_rxon.bssid_addr);
2605
2606         switch (priv->iw_mode) {
2607         case NL80211_IFTYPE_STATION:
2608                 break;
2609         case NL80211_IFTYPE_ADHOC:
2610                 /* assume default assoc id */
2611                 priv->assoc_id = 1;
2612                 iwl_send_beacon_cmd(priv);
2613                 break;
2614         default:
2615                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2616                           __func__, priv->iw_mode);
2617                 break;
2618         }
2619
2620         /* the chain noise calibration will enabled PM upon completion
2621          * If chain noise has already been run, then we need to enable
2622          * power management here */
2623         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2624                 iwl_power_update_mode(priv, false);
2625
2626         /* Enable Rx differential gain and sensitivity calibrations */
2627         iwl_chain_noise_reset(priv);
2628         priv->start_calib = 1;
2629
2630 }
2631
2632 /*****************************************************************************
2633  *
2634  * mac80211 entry point functions
2635  *
2636  *****************************************************************************/
2637
2638 #define UCODE_READY_TIMEOUT     (4 * HZ)
2639
2640 /*
2641  * Not a mac80211 entry point function, but it fits in with all the
2642  * other mac80211 functions grouped here.
2643  */
2644 static int iwl_mac_setup_register(struct iwl_priv *priv)
2645 {
2646         int ret;
2647         struct ieee80211_hw *hw = priv->hw;
2648         hw->rate_control_algorithm = "iwl-agn-rs";
2649
2650         /* Tell mac80211 our characteristics */
2651         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2652                     IEEE80211_HW_AMPDU_AGGREGATION |
2653                     IEEE80211_HW_SPECTRUM_MGMT;
2654
2655         if (!priv->cfg->broken_powersave)
2656                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2657                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2658
2659         if (priv->cfg->sku & IWL_SKU_N)
2660                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2661                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2662
2663         hw->sta_data_size = sizeof(struct iwl_station_priv);
2664         hw->wiphy->interface_modes =
2665                 BIT(NL80211_IFTYPE_STATION) |
2666                 BIT(NL80211_IFTYPE_ADHOC);
2667
2668         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2669                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2670
2671         /*
2672          * For now, disable PS by default because it affects
2673          * RX performance significantly.
2674          */
2675         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2676
2677         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2678         /* we create the 802.11 header and a zero-length SSID element */
2679         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2680
2681         /* Default value; 4 EDCA QOS priorities */
2682         hw->queues = 4;
2683
2684         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2685
2686         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2687                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2688                         &priv->bands[IEEE80211_BAND_2GHZ];
2689         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2690                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2691                         &priv->bands[IEEE80211_BAND_5GHZ];
2692
2693         ret = ieee80211_register_hw(priv->hw);
2694         if (ret) {
2695                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2696                 return ret;
2697         }
2698         priv->mac80211_registered = 1;
2699
2700         return 0;
2701 }
2702
2703
2704 static int iwl_mac_start(struct ieee80211_hw *hw)
2705 {
2706         struct iwl_priv *priv = hw->priv;
2707         int ret;
2708
2709         IWL_DEBUG_MAC80211(priv, "enter\n");
2710
2711         /* we should be verifying the device is ready to be opened */
2712         mutex_lock(&priv->mutex);
2713         ret = __iwl_up(priv);
2714         mutex_unlock(&priv->mutex);
2715
2716         if (ret)
2717                 return ret;
2718
2719         if (iwl_is_rfkill(priv))
2720                 goto out;
2721
2722         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2723
2724         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2725          * mac80211 will not be run successfully. */
2726         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2727                         test_bit(STATUS_READY, &priv->status),
2728                         UCODE_READY_TIMEOUT);
2729         if (!ret) {
2730                 if (!test_bit(STATUS_READY, &priv->status)) {
2731                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2732                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2733                         return -ETIMEDOUT;
2734                 }
2735         }
2736
2737         iwl_led_start(priv);
2738
2739 out:
2740         priv->is_open = 1;
2741         IWL_DEBUG_MAC80211(priv, "leave\n");
2742         return 0;
2743 }
2744
2745 static void iwl_mac_stop(struct ieee80211_hw *hw)
2746 {
2747         struct iwl_priv *priv = hw->priv;
2748
2749         IWL_DEBUG_MAC80211(priv, "enter\n");
2750
2751         if (!priv->is_open)
2752                 return;
2753
2754         priv->is_open = 0;
2755
2756         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2757                 /* stop mac, cancel any scan request and clear
2758                  * RXON_FILTER_ASSOC_MSK BIT
2759                  */
2760                 mutex_lock(&priv->mutex);
2761                 iwl_scan_cancel_timeout(priv, 100);
2762                 mutex_unlock(&priv->mutex);
2763         }
2764
2765         iwl_down(priv);
2766
2767         flush_workqueue(priv->workqueue);
2768
2769         /* enable interrupts again in order to receive rfkill changes */
2770         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2771         iwl_enable_interrupts(priv);
2772
2773         IWL_DEBUG_MAC80211(priv, "leave\n");
2774 }
2775
2776 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2777 {
2778         struct iwl_priv *priv = hw->priv;
2779
2780         IWL_DEBUG_MACDUMP(priv, "enter\n");
2781
2782         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2783                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2784
2785         if (iwlagn_tx_skb(priv, skb))
2786                 dev_kfree_skb_any(skb);
2787
2788         IWL_DEBUG_MACDUMP(priv, "leave\n");
2789         return NETDEV_TX_OK;
2790 }
2791
2792 void iwl_config_ap(struct iwl_priv *priv)
2793 {
2794         int ret = 0;
2795
2796         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2797                 return;
2798
2799         /* The following should be done only at AP bring up */
2800         if (!iwl_is_associated(priv)) {
2801
2802                 /* RXON - unassoc (to set timing command) */
2803                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2804                 iwlcore_commit_rxon(priv);
2805
2806                 /* RXON Timing */
2807                 iwl_setup_rxon_timing(priv);
2808                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2809                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2810                 if (ret)
2811                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2812                                         "Attempting to continue.\n");
2813
2814                 /* AP has all antennas */
2815                 priv->chain_noise_data.active_chains =
2816                         priv->hw_params.valid_rx_ant;
2817                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2818                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2819                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2820
2821                 /* FIXME: what should be the assoc_id for AP? */
2822                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2823                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2824                         priv->staging_rxon.flags |=
2825                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2826                 else
2827                         priv->staging_rxon.flags &=
2828                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2829
2830                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2831                         if (priv->assoc_capability &
2832                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2833                                 priv->staging_rxon.flags |=
2834                                         RXON_FLG_SHORT_SLOT_MSK;
2835                         else
2836                                 priv->staging_rxon.flags &=
2837                                         ~RXON_FLG_SHORT_SLOT_MSK;
2838
2839                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2840                                 priv->staging_rxon.flags &=
2841                                         ~RXON_FLG_SHORT_SLOT_MSK;
2842                 }
2843                 /* restore RXON assoc */
2844                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2845                 iwlcore_commit_rxon(priv);
2846                 iwl_add_bcast_station(priv);
2847         }
2848         iwl_send_beacon_cmd(priv);
2849
2850         /* FIXME - we need to add code here to detect a totally new
2851          * configuration, reset the AP, unassoc, rxon timing, assoc,
2852          * clear sta table, add BCAST sta... */
2853 }
2854
2855 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2856                                     struct ieee80211_vif *vif,
2857                                     struct ieee80211_key_conf *keyconf,
2858                                     struct ieee80211_sta *sta,
2859                                     u32 iv32, u16 *phase1key)
2860 {
2861
2862         struct iwl_priv *priv = hw->priv;
2863         IWL_DEBUG_MAC80211(priv, "enter\n");
2864
2865         iwl_update_tkip_key(priv, keyconf,
2866                             sta ? sta->addr : iwl_bcast_addr,
2867                             iv32, phase1key);
2868
2869         IWL_DEBUG_MAC80211(priv, "leave\n");
2870 }
2871
2872 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2873                            struct ieee80211_vif *vif,
2874                            struct ieee80211_sta *sta,
2875                            struct ieee80211_key_conf *key)
2876 {
2877         struct iwl_priv *priv = hw->priv;
2878         const u8 *addr;
2879         int ret;
2880         u8 sta_id;
2881         bool is_default_wep_key = false;
2882
2883         IWL_DEBUG_MAC80211(priv, "enter\n");
2884
2885         if (priv->cfg->mod_params->sw_crypto) {
2886                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2887                 return -EOPNOTSUPP;
2888         }
2889         addr = sta ? sta->addr : iwl_bcast_addr;
2890         sta_id = iwl_find_station(priv, addr);
2891         if (sta_id == IWL_INVALID_STATION) {
2892                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2893                                    addr);
2894                 return -EINVAL;
2895
2896         }
2897
2898         mutex_lock(&priv->mutex);
2899         iwl_scan_cancel_timeout(priv, 100);
2900
2901         /*
2902          * If we are getting WEP group key and we didn't receive any key mapping
2903          * so far, we are in legacy wep mode (group key only), otherwise we are
2904          * in 1X mode.
2905          * In legacy wep mode, we use another host command to the uCode.
2906          */
2907         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
2908                 if (cmd == SET_KEY)
2909                         is_default_wep_key = !priv->key_mapping_key;
2910                 else
2911                         is_default_wep_key =
2912                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2913         }
2914
2915         switch (cmd) {
2916         case SET_KEY:
2917                 if (is_default_wep_key)
2918                         ret = iwl_set_default_wep_key(priv, key);
2919                 else
2920                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2921
2922                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2923                 break;
2924         case DISABLE_KEY:
2925                 if (is_default_wep_key)
2926                         ret = iwl_remove_default_wep_key(priv, key);
2927                 else
2928                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2929
2930                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2931                 break;
2932         default:
2933                 ret = -EINVAL;
2934         }
2935
2936         mutex_unlock(&priv->mutex);
2937         IWL_DEBUG_MAC80211(priv, "leave\n");
2938
2939         return ret;
2940 }
2941
2942 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2943                                 struct ieee80211_vif *vif,
2944                              enum ieee80211_ampdu_mlme_action action,
2945                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2946 {
2947         struct iwl_priv *priv = hw->priv;
2948         int ret;
2949
2950         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2951                      sta->addr, tid);
2952
2953         if (!(priv->cfg->sku & IWL_SKU_N))
2954                 return -EACCES;
2955
2956         switch (action) {
2957         case IEEE80211_AMPDU_RX_START:
2958                 IWL_DEBUG_HT(priv, "start Rx\n");
2959                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2960         case IEEE80211_AMPDU_RX_STOP:
2961                 IWL_DEBUG_HT(priv, "stop Rx\n");
2962                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2963                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2964                         return 0;
2965                 else
2966                         return ret;
2967         case IEEE80211_AMPDU_TX_START:
2968                 IWL_DEBUG_HT(priv, "start Tx\n");
2969                 ret = iwlagn_tx_agg_start(priv, sta->addr, tid, ssn);
2970                 if (ret == 0) {
2971                         priv->_agn.agg_tids_count++;
2972                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2973                                      priv->_agn.agg_tids_count);
2974                 }
2975                 return ret;
2976         case IEEE80211_AMPDU_TX_STOP:
2977                 IWL_DEBUG_HT(priv, "stop Tx\n");
2978                 ret = iwlagn_tx_agg_stop(priv, sta->addr, tid);
2979                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2980                         priv->_agn.agg_tids_count--;
2981                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2982                                      priv->_agn.agg_tids_count);
2983                 }
2984                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2985                         return 0;
2986                 else
2987                         return ret;
2988         case IEEE80211_AMPDU_TX_OPERATIONAL:
2989                 /* do nothing */
2990                 return -EOPNOTSUPP;
2991         default:
2992                 IWL_DEBUG_HT(priv, "unknown\n");
2993                 return -EINVAL;
2994                 break;
2995         }
2996         return 0;
2997 }
2998
2999 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3000                                struct ieee80211_vif *vif,
3001                                enum sta_notify_cmd cmd,
3002                                struct ieee80211_sta *sta)
3003 {
3004         struct iwl_priv *priv = hw->priv;
3005         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3006         int sta_id;
3007
3008         switch (cmd) {
3009         case STA_NOTIFY_SLEEP:
3010                 WARN_ON(!sta_priv->client);
3011                 sta_priv->asleep = true;
3012                 if (atomic_read(&sta_priv->pending_frames) > 0)
3013                         ieee80211_sta_block_awake(hw, sta, true);
3014                 break;
3015         case STA_NOTIFY_AWAKE:
3016                 WARN_ON(!sta_priv->client);
3017                 if (!sta_priv->asleep)
3018                         break;
3019                 sta_priv->asleep = false;
3020                 sta_id = iwl_find_station(priv, sta->addr);
3021                 if (sta_id != IWL_INVALID_STATION)
3022                         iwl_sta_modify_ps_wake(priv, sta_id);
3023                 break;
3024         default:
3025                 break;
3026         }
3027 }
3028
3029 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3030                               struct ieee80211_vif *vif,
3031                               struct ieee80211_sta *sta)
3032 {
3033         struct iwl_priv *priv = hw->priv;
3034         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3035         bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3036         int ret;
3037         u8 sta_id;
3038
3039         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3040                         sta->addr);
3041
3042         atomic_set(&sta_priv->pending_frames, 0);
3043         if (vif->type == NL80211_IFTYPE_AP)
3044                 sta_priv->client = true;
3045
3046         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3047                                      &sta_id);
3048         if (ret) {
3049                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3050                         sta->addr, ret);
3051                 /* Should we return success if return code is EEXIST ? */
3052                 return ret;
3053         }
3054
3055         /* Initialize rate scaling */
3056         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3057                        sta->addr);
3058         iwl_rs_rate_init(priv, sta, sta_id);
3059
3060         return ret;
3061 }
3062
3063 /*****************************************************************************
3064  *
3065  * sysfs attributes
3066  *
3067  *****************************************************************************/
3068
3069 #ifdef CONFIG_IWLWIFI_DEBUG
3070
3071 /*
3072  * The following adds a new attribute to the sysfs representation
3073  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3074  * used for controlling the debug level.
3075  *
3076  * See the level definitions in iwl for details.
3077  *
3078  * The debug_level being managed using sysfs below is a per device debug
3079  * level that is used instead of the global debug level if it (the per
3080  * device debug level) is set.
3081  */
3082 static ssize_t show_debug_level(struct device *d,
3083                                 struct device_attribute *attr, char *buf)
3084 {
3085         struct iwl_priv *priv = dev_get_drvdata(d);
3086         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3087 }
3088 static ssize_t store_debug_level(struct device *d,
3089                                 struct device_attribute *attr,
3090                                  const char *buf, size_t count)
3091 {
3092         struct iwl_priv *priv = dev_get_drvdata(d);
3093         unsigned long val;
3094         int ret;
3095
3096         ret = strict_strtoul(buf, 0, &val);
3097         if (ret)
3098                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3099         else {
3100                 priv->debug_level = val;
3101                 if (iwl_alloc_traffic_mem(priv))
3102                         IWL_ERR(priv,
3103                                 "Not enough memory to generate traffic log\n");
3104         }
3105         return strnlen(buf, count);
3106 }
3107
3108 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3109                         show_debug_level, store_debug_level);
3110
3111
3112 #endif /* CONFIG_IWLWIFI_DEBUG */
3113
3114
3115 static ssize_t show_temperature(struct device *d,
3116                                 struct device_attribute *attr, char *buf)
3117 {
3118         struct iwl_priv *priv = dev_get_drvdata(d);
3119
3120         if (!iwl_is_alive(priv))
3121                 return -EAGAIN;
3122
3123         return sprintf(buf, "%d\n", priv->temperature);
3124 }
3125
3126 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3127
3128 static ssize_t show_tx_power(struct device *d,
3129                              struct device_attribute *attr, char *buf)
3130 {
3131         struct iwl_priv *priv = dev_get_drvdata(d);
3132
3133         if (!iwl_is_ready_rf(priv))
3134                 return sprintf(buf, "off\n");
3135         else
3136                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3137 }
3138
3139 static ssize_t store_tx_power(struct device *d,
3140                               struct device_attribute *attr,
3141                               const char *buf, size_t count)
3142 {
3143         struct iwl_priv *priv = dev_get_drvdata(d);
3144         unsigned long val;
3145         int ret;
3146
3147         ret = strict_strtoul(buf, 10, &val);
3148         if (ret)
3149                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3150         else {
3151                 ret = iwl_set_tx_power(priv, val, false);
3152                 if (ret)
3153                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3154                                 ret);
3155                 else
3156                         ret = count;
3157         }
3158         return ret;
3159 }
3160
3161 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3162
3163 static ssize_t show_rts_ht_protection(struct device *d,
3164                              struct device_attribute *attr, char *buf)
3165 {
3166         struct iwl_priv *priv = dev_get_drvdata(d);
3167
3168         return sprintf(buf, "%s\n",
3169                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3170 }
3171
3172 static ssize_t store_rts_ht_protection(struct device *d,
3173                               struct device_attribute *attr,
3174                               const char *buf, size_t count)
3175 {
3176         struct iwl_priv *priv = dev_get_drvdata(d);
3177         unsigned long val;
3178         int ret;
3179
3180         ret = strict_strtoul(buf, 10, &val);
3181         if (ret)
3182                 IWL_INFO(priv, "Input is not in decimal form.\n");
3183         else {
3184                 if (!iwl_is_associated(priv))
3185                         priv->cfg->use_rts_for_ht = val ? true : false;
3186                 else
3187                         IWL_ERR(priv, "Sta associated with AP - "
3188                                 "Change protection mechanism is not allowed\n");
3189                 ret = count;
3190         }
3191         return ret;
3192 }
3193
3194 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3195                         show_rts_ht_protection, store_rts_ht_protection);
3196
3197
3198 /*****************************************************************************
3199  *
3200  * driver setup and teardown
3201  *
3202  *****************************************************************************/
3203
3204 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3205 {
3206         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3207
3208         init_waitqueue_head(&priv->wait_command_queue);
3209
3210         INIT_WORK(&priv->restart, iwl_bg_restart);
3211         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3212         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3213         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3214         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3215         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3216
3217         iwl_setup_scan_deferred_work(priv);
3218
3219         if (priv->cfg->ops->lib->setup_deferred_work)
3220                 priv->cfg->ops->lib->setup_deferred_work(priv);
3221
3222         init_timer(&priv->statistics_periodic);
3223         priv->statistics_periodic.data = (unsigned long)priv;
3224         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3225
3226         init_timer(&priv->ucode_trace);
3227         priv->ucode_trace.data = (unsigned long)priv;
3228         priv->ucode_trace.function = iwl_bg_ucode_trace;
3229
3230         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3231                 init_timer(&priv->monitor_recover);
3232                 priv->monitor_recover.data = (unsigned long)priv;
3233                 priv->monitor_recover.function =
3234                         priv->cfg->ops->lib->recover_from_tx_stall;
3235         }
3236
3237         if (!priv->cfg->use_isr_legacy)
3238                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3239                         iwl_irq_tasklet, (unsigned long)priv);
3240         else
3241                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3242                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3243 }
3244
3245 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3246 {
3247         if (priv->cfg->ops->lib->cancel_deferred_work)
3248                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3249
3250         cancel_delayed_work_sync(&priv->init_alive_start);
3251         cancel_delayed_work(&priv->scan_check);
3252         cancel_work_sync(&priv->start_internal_scan);
3253         cancel_delayed_work(&priv->alive_start);
3254         cancel_work_sync(&priv->beacon_update);
3255         del_timer_sync(&priv->statistics_periodic);
3256         del_timer_sync(&priv->ucode_trace);
3257         if (priv->cfg->ops->lib->recover_from_tx_stall)
3258                 del_timer_sync(&priv->monitor_recover);
3259 }
3260
3261 static void iwl_init_hw_rates(struct iwl_priv *priv,
3262                               struct ieee80211_rate *rates)
3263 {
3264         int i;
3265
3266         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3267                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3268                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3269                 rates[i].hw_value_short = i;
3270                 rates[i].flags = 0;
3271                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3272                         /*
3273                          * If CCK != 1M then set short preamble rate flag.
3274                          */
3275                         rates[i].flags |=
3276                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3277                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3278                 }
3279         }
3280 }
3281
3282 static int iwl_init_drv(struct iwl_priv *priv)
3283 {
3284         int ret;
3285
3286         priv->ibss_beacon = NULL;
3287
3288         spin_lock_init(&priv->sta_lock);
3289         spin_lock_init(&priv->hcmd_lock);
3290
3291         INIT_LIST_HEAD(&priv->free_frames);
3292
3293         mutex_init(&priv->mutex);
3294         mutex_init(&priv->sync_cmd_mutex);
3295
3296         priv->ieee_channels = NULL;
3297         priv->ieee_rates = NULL;
3298         priv->band = IEEE80211_BAND_2GHZ;
3299
3300         priv->iw_mode = NL80211_IFTYPE_STATION;
3301         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3302         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3303         priv->_agn.agg_tids_count = 0;
3304
3305         /* initialize force reset */
3306         priv->force_reset[IWL_RF_RESET].reset_duration =
3307                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3308         priv->force_reset[IWL_FW_RESET].reset_duration =
3309                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3310
3311         /* Choose which receivers/antennas to use */
3312         if (priv->cfg->ops->hcmd->set_rxon_chain)
3313                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3314
3315         iwl_init_scan_params(priv);
3316
3317         /* Set the tx_power_user_lmt to the lowest power level
3318          * this value will get overwritten by channel max power avg
3319          * from eeprom */
3320         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3321
3322         ret = iwl_init_channel_map(priv);
3323         if (ret) {
3324                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3325                 goto err;
3326         }
3327
3328         ret = iwlcore_init_geos(priv);
3329         if (ret) {
3330                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3331                 goto err_free_channel_map;
3332         }
3333         iwl_init_hw_rates(priv, priv->ieee_rates);
3334
3335         return 0;
3336
3337 err_free_channel_map:
3338         iwl_free_channel_map(priv);
3339 err:
3340         return ret;
3341 }
3342
3343 static void iwl_uninit_drv(struct iwl_priv *priv)
3344 {
3345         iwl_calib_free_results(priv);
3346         iwlcore_free_geos(priv);
3347         iwl_free_channel_map(priv);
3348         kfree(priv->scan_cmd);
3349 }
3350
3351 static struct attribute *iwl_sysfs_entries[] = {
3352         &dev_attr_temperature.attr,
3353         &dev_attr_tx_power.attr,
3354         &dev_attr_rts_ht_protection.attr,
3355 #ifdef CONFIG_IWLWIFI_DEBUG
3356         &dev_attr_debug_level.attr,
3357 #endif
3358         NULL
3359 };
3360
3361 static struct attribute_group iwl_attribute_group = {
3362         .name = NULL,           /* put in device directory */
3363         .attrs = iwl_sysfs_entries,
3364 };
3365
3366 static struct ieee80211_ops iwl_hw_ops = {
3367         .tx = iwl_mac_tx,
3368         .start = iwl_mac_start,
3369         .stop = iwl_mac_stop,
3370         .add_interface = iwl_mac_add_interface,
3371         .remove_interface = iwl_mac_remove_interface,
3372         .config = iwl_mac_config,
3373         .configure_filter = iwl_configure_filter,
3374         .set_key = iwl_mac_set_key,
3375         .update_tkip_key = iwl_mac_update_tkip_key,
3376         .conf_tx = iwl_mac_conf_tx,
3377         .reset_tsf = iwl_mac_reset_tsf,
3378         .bss_info_changed = iwl_bss_info_changed,
3379         .ampdu_action = iwl_mac_ampdu_action,
3380         .hw_scan = iwl_mac_hw_scan,
3381         .sta_notify = iwl_mac_sta_notify,
3382         .sta_add = iwlagn_mac_sta_add,
3383         .sta_remove = iwl_mac_sta_remove,
3384 };
3385
3386 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3387 {
3388         int err = 0;
3389         struct iwl_priv *priv;
3390         struct ieee80211_hw *hw;
3391         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3392         unsigned long flags;
3393         u16 pci_cmd;
3394
3395         /************************
3396          * 1. Allocating HW data
3397          ************************/
3398
3399         /* Disabling hardware scan means that mac80211 will perform scans
3400          * "the hard way", rather than using device's scan. */
3401         if (cfg->mod_params->disable_hw_scan) {
3402                 if (iwl_debug_level & IWL_DL_INFO)
3403                         dev_printk(KERN_DEBUG, &(pdev->dev),
3404                                    "Disabling hw_scan\n");
3405                 iwl_hw_ops.hw_scan = NULL;
3406         }
3407
3408         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3409         if (!hw) {
3410                 err = -ENOMEM;
3411                 goto out;
3412         }
3413         priv = hw->priv;
3414         /* At this point both hw and priv are allocated. */
3415
3416         SET_IEEE80211_DEV(hw, &pdev->dev);
3417
3418         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3419         priv->cfg = cfg;
3420         priv->pci_dev = pdev;
3421         priv->inta_mask = CSR_INI_SET_MASK;
3422
3423 #ifdef CONFIG_IWLWIFI_DEBUG
3424         atomic_set(&priv->restrict_refcnt, 0);
3425 #endif
3426         if (iwl_alloc_traffic_mem(priv))
3427                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3428
3429         /**************************
3430          * 2. Initializing PCI bus
3431          **************************/
3432         if (pci_enable_device(pdev)) {
3433                 err = -ENODEV;
3434                 goto out_ieee80211_free_hw;
3435         }
3436
3437         pci_set_master(pdev);
3438
3439         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3440         if (!err)
3441                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3442         if (err) {
3443                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3444                 if (!err)
3445                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3446                 /* both attempts failed: */
3447                 if (err) {
3448                         IWL_WARN(priv, "No suitable DMA available.\n");
3449                         goto out_pci_disable_device;
3450                 }
3451         }
3452
3453         err = pci_request_regions(pdev, DRV_NAME);
3454         if (err)
3455                 goto out_pci_disable_device;
3456
3457         pci_set_drvdata(pdev, priv);
3458
3459
3460         /***********************
3461          * 3. Read REV register
3462          ***********************/
3463         priv->hw_base = pci_iomap(pdev, 0, 0);
3464         if (!priv->hw_base) {
3465                 err = -ENODEV;
3466                 goto out_pci_release_regions;
3467         }
3468
3469         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3470                 (unsigned long long) pci_resource_len(pdev, 0));
3471         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3472
3473         /* these spin locks will be used in apm_ops.init and EEPROM access
3474          * we should init now
3475          */
3476         spin_lock_init(&priv->reg_lock);
3477         spin_lock_init(&priv->lock);
3478
3479         /*
3480          * stop and reset the on-board processor just in case it is in a
3481          * strange state ... like being left stranded by a primary kernel
3482          * and this is now the kdump kernel trying to start up
3483          */
3484         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3485
3486         iwl_hw_detect(priv);
3487         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3488                 priv->cfg->name, priv->hw_rev);
3489
3490         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3491          * PCI Tx retries from interfering with C3 CPU state */
3492         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3493
3494         iwl_prepare_card_hw(priv);
3495         if (!priv->hw_ready) {
3496                 IWL_WARN(priv, "Failed, HW not ready\n");
3497                 goto out_iounmap;
3498         }
3499
3500         /*****************
3501          * 4. Read EEPROM
3502          *****************/
3503         /* Read the EEPROM */
3504         err = iwl_eeprom_init(priv);
3505         if (err) {
3506                 IWL_ERR(priv, "Unable to init EEPROM\n");
3507                 goto out_iounmap;
3508         }
3509         err = iwl_eeprom_check_version(priv);
3510         if (err)
3511                 goto out_free_eeprom;
3512
3513         /* extract MAC Address */
3514         iwl_eeprom_get_mac(priv, priv->mac_addr);
3515         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3516         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3517
3518         /************************
3519          * 5. Setup HW constants
3520          ************************/
3521         if (iwl_set_hw_params(priv)) {
3522                 IWL_ERR(priv, "failed to set hw parameters\n");
3523                 goto out_free_eeprom;
3524         }
3525
3526         /*******************
3527          * 6. Setup priv
3528          *******************/
3529
3530         err = iwl_init_drv(priv);
3531         if (err)
3532                 goto out_free_eeprom;
3533         /* At this point both hw and priv are initialized. */
3534
3535         /********************
3536          * 7. Setup services
3537          ********************/
3538         spin_lock_irqsave(&priv->lock, flags);
3539         iwl_disable_interrupts(priv);
3540         spin_unlock_irqrestore(&priv->lock, flags);
3541
3542         pci_enable_msi(priv->pci_dev);
3543
3544         iwl_alloc_isr_ict(priv);
3545         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3546                           IRQF_SHARED, DRV_NAME, priv);
3547         if (err) {
3548                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3549                 goto out_disable_msi;
3550         }
3551         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3552         if (err) {
3553                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3554                 goto out_free_irq;
3555         }
3556
3557         iwl_setup_deferred_work(priv);
3558         iwl_setup_rx_handlers(priv);
3559
3560         /*********************************************
3561          * 8. Enable interrupts and read RFKILL state
3562          *********************************************/
3563
3564         /* enable interrupts if needed: hw bug w/a */
3565         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3566         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3567                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3568                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3569         }
3570
3571         iwl_enable_interrupts(priv);
3572
3573         /* If platform's RF_KILL switch is NOT set to KILL */
3574         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3575                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3576         else
3577                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3578
3579         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3580                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3581
3582         iwl_power_initialize(priv);
3583         iwl_tt_initialize(priv);
3584
3585         init_completion(&priv->_agn.firmware_loading_complete);
3586
3587         err = iwl_request_firmware(priv, true);
3588         if (err)
3589                 goto out_remove_sysfs;
3590
3591         return 0;
3592
3593  out_remove_sysfs:
3594         destroy_workqueue(priv->workqueue);
3595         priv->workqueue = NULL;
3596         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3597  out_free_irq:
3598         free_irq(priv->pci_dev->irq, priv);
3599         iwl_free_isr_ict(priv);
3600  out_disable_msi:
3601         pci_disable_msi(priv->pci_dev);
3602         iwl_uninit_drv(priv);
3603  out_free_eeprom:
3604         iwl_eeprom_free(priv);
3605  out_iounmap:
3606         pci_iounmap(pdev, priv->hw_base);
3607  out_pci_release_regions:
3608         pci_set_drvdata(pdev, NULL);
3609         pci_release_regions(pdev);
3610  out_pci_disable_device:
3611         pci_disable_device(pdev);
3612  out_ieee80211_free_hw:
3613         iwl_free_traffic_mem(priv);
3614         ieee80211_free_hw(priv->hw);
3615  out:
3616         return err;
3617 }
3618
3619 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3620 {
3621         struct iwl_priv *priv = pci_get_drvdata(pdev);
3622         unsigned long flags;
3623
3624         if (!priv)
3625                 return;
3626
3627         wait_for_completion(&priv->_agn.firmware_loading_complete);
3628
3629         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3630
3631         iwl_dbgfs_unregister(priv);
3632         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3633
3634         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3635          * to be called and iwl_down since we are removing the device
3636          * we need to set STATUS_EXIT_PENDING bit.
3637          */
3638         set_bit(STATUS_EXIT_PENDING, &priv->status);
3639         if (priv->mac80211_registered) {
3640                 ieee80211_unregister_hw(priv->hw);
3641                 priv->mac80211_registered = 0;
3642         } else {
3643                 iwl_down(priv);
3644         }
3645
3646         /*
3647          * Make sure device is reset to low power before unloading driver.
3648          * This may be redundant with iwl_down(), but there are paths to
3649          * run iwl_down() without calling apm_ops.stop(), and there are
3650          * paths to avoid running iwl_down() at all before leaving driver.
3651          * This (inexpensive) call *makes sure* device is reset.
3652          */
3653         priv->cfg->ops->lib->apm_ops.stop(priv);
3654
3655         iwl_tt_exit(priv);
3656
3657         /* make sure we flush any pending irq or
3658          * tasklet for the driver
3659          */
3660         spin_lock_irqsave(&priv->lock, flags);
3661         iwl_disable_interrupts(priv);
3662         spin_unlock_irqrestore(&priv->lock, flags);
3663
3664         iwl_synchronize_irq(priv);
3665
3666         iwl_dealloc_ucode_pci(priv);
3667
3668         if (priv->rxq.bd)
3669                 iwlagn_rx_queue_free(priv, &priv->rxq);
3670         iwlagn_hw_txq_ctx_free(priv);
3671
3672         iwl_eeprom_free(priv);
3673
3674
3675         /*netif_stop_queue(dev); */
3676         flush_workqueue(priv->workqueue);
3677
3678         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3679          * priv->workqueue... so we can't take down the workqueue
3680          * until now... */
3681         destroy_workqueue(priv->workqueue);
3682         priv->workqueue = NULL;
3683         iwl_free_traffic_mem(priv);
3684
3685         free_irq(priv->pci_dev->irq, priv);
3686         pci_disable_msi(priv->pci_dev);
3687         pci_iounmap(pdev, priv->hw_base);
3688         pci_release_regions(pdev);
3689         pci_disable_device(pdev);
3690         pci_set_drvdata(pdev, NULL);
3691
3692         iwl_uninit_drv(priv);
3693
3694         iwl_free_isr_ict(priv);
3695
3696         if (priv->ibss_beacon)
3697                 dev_kfree_skb(priv->ibss_beacon);
3698
3699         ieee80211_free_hw(priv->hw);
3700 }
3701
3702
3703 /*****************************************************************************
3704  *
3705  * driver and module entry point
3706  *
3707  *****************************************************************************/
3708
3709 /* Hardware specific file defines the PCI IDs table for that hardware module */
3710 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3711 #ifdef CONFIG_IWL4965
3712         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3713         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3714 #endif /* CONFIG_IWL4965 */
3715 #ifdef CONFIG_IWL5000
3716 /* 5100 Series WiFi */
3717         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3718         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3719         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3720         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3721         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3722         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3723         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3724         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3725         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3726         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3727         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3728         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3729         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3730         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3731         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3732         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3733         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3734         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3735         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3736         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3737         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3738         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3739         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3740         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3741
3742 /* 5300 Series WiFi */
3743         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3744         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3745         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3746         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3747         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3748         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3749         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3750         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3751         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3752         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3753         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3754         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3755
3756 /* 5350 Series WiFi/WiMax */
3757         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3758         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3759         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3760
3761 /* 5150 Series Wifi/WiMax */
3762         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3763         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3764         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3765         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3766         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3767         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3768
3769         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3770         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3771         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3772         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3773
3774 /* 6x00 Series */
3775         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3776         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3777         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3778         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3779         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3780         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3781         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3782         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3783         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3784         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3785
3786 /* 6x00 Series Gen2a */
3787         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
3788         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
3789         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
3790
3791 /* 6x50 WiFi/WiMax Series */
3792         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3793         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3794         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3795         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3796         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3797         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3798
3799 /* 1000 Series WiFi */
3800         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3801         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3802         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3803         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3804         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3805         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3806         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3807         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3808         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3809         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3810         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3811         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3812 #endif /* CONFIG_IWL5000 */
3813
3814         {0}
3815 };
3816 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3817
3818 static struct pci_driver iwl_driver = {
3819         .name = DRV_NAME,
3820         .id_table = iwl_hw_card_ids,
3821         .probe = iwl_pci_probe,
3822         .remove = __devexit_p(iwl_pci_remove),
3823 #ifdef CONFIG_PM
3824         .suspend = iwl_pci_suspend,
3825         .resume = iwl_pci_resume,
3826 #endif
3827 };
3828
3829 static int __init iwl_init(void)
3830 {
3831
3832         int ret;
3833         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3834         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3835
3836         ret = iwlagn_rate_control_register();
3837         if (ret) {
3838                 printk(KERN_ERR DRV_NAME
3839                        "Unable to register rate control algorithm: %d\n", ret);
3840                 return ret;
3841         }
3842
3843         ret = pci_register_driver(&iwl_driver);
3844         if (ret) {
3845                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3846                 goto error_register;
3847         }
3848
3849         return ret;
3850
3851 error_register:
3852         iwlagn_rate_control_unregister();
3853         return ret;
3854 }
3855
3856 static void __exit iwl_exit(void)
3857 {
3858         pci_unregister_driver(&iwl_driver);
3859         iwlagn_rate_control_unregister();
3860 }
3861
3862 module_exit(iwl_exit);
3863 module_init(iwl_init);
3864
3865 #ifdef CONFIG_IWLWIFI_DEBUG
3866 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3867 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3868 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3869 MODULE_PARM_DESC(debug, "debug output mask");
3870 #endif
3871
3872 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
3873 MODULE_PARM_DESC(swcrypto50,
3874                  "using crypto in software (default 0 [hardware]) (deprecated)");
3875 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3876 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3877 module_param_named(queues_num50,
3878                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3879 MODULE_PARM_DESC(queues_num50,
3880                  "number of hw queues in 50xx series (deprecated)");
3881 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3882 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3883 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3884 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
3885 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3886 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3887 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
3888                    int, S_IRUGO);
3889 MODULE_PARM_DESC(amsdu_size_8K50,
3890                  "enable 8K amsdu size in 50XX series (deprecated)");
3891 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3892                    int, S_IRUGO);
3893 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3894 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3895 MODULE_PARM_DESC(fw_restart50,
3896                  "restart firmware in case of error (deprecated)");
3897 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3898 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3899 module_param_named(
3900         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
3901 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");