drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-agn-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88
  89 static int iwlagn_ant_coupling;
  90 static bool iwlagn_bt_ch_announce = 1;
  91
  92 void iwl_update_chain_flags(struct iwl_priv *priv)
  93 {
  94         struct iwl_rxon_context *ctx;
  95
  96         if (priv->cfg->ops->hcmd->set_rxon_chain) {
  97                 for_each_context(priv, ctx) {
  98                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  99                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
 100                                 iwlcore_commit_rxon(priv, ctx);
 101                 }
 102         }
 103 }
 104
 105 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 106 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 107                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 108                                u8 *beacon, u32 frame_size)
 109 {
 110         u16 tim_idx;
 111         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 112
 113         /*
 114          * The index is relative to frame start but we start looking at the
 115          * variable-length part of the beacon.
 116          */
 117         tim_idx = mgmt->u.beacon.variable - beacon;
 118
 119         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 120         while ((tim_idx < (frame_size - 2)) &&
 121                         (beacon[tim_idx] != WLAN_EID_TIM))
 122                 tim_idx += beacon[tim_idx+1] + 2;
 123
 124         /* If TIM field was found, set variables */
 125         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 126                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 127                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 128         } else
 129                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 130 }
 131
 132 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
 133 {
 134         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 135         struct iwl_host_cmd cmd = {
 136                 .id = REPLY_TX_BEACON,
 137         };
 138         u32 frame_size;
 139         u32 rate_flags;
 140         u32 rate;
 141
 142         /*
 143          * We have to set up the TX command, the TX Beacon command, and the
 144          * beacon contents.
 145          */
 146
 147         lockdep_assert_held(&priv->mutex);
 148
 149         if (!priv->beacon_ctx) {
 150                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 151                 return 0;
 152         }
 153
 154         if (WARN_ON(!priv->beacon_skb))
 155                 return -EINVAL;
 156
 157         /* Allocate beacon command */
 158         if (!priv->beacon_cmd)
 159                 priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL);
 160         tx_beacon_cmd = priv->beacon_cmd;
 161         if (!tx_beacon_cmd)
 162                 return -ENOMEM;
 163
 164         frame_size = priv->beacon_skb->len;
 165
 166         /* Set up TX command fields */
 167         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 168         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 169         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 170         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 171                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 172
 173         /* Set up TX beacon command fields */
 174         iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data,
 175                            frame_size);
 176
 177         /* Set up packet rate and flags */
 178         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
 179         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 180                                               priv->hw_params.valid_tx_ant);
 181         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 182         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 183                 rate_flags |= RATE_MCS_CCK_MSK;
 184         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 185                         rate_flags);
 186
 187         /* Submit command */
 188         cmd.len[0] = sizeof(*tx_beacon_cmd);
 189         cmd.data[0] = tx_beacon_cmd;
 190         cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
 191         cmd.len[1] = frame_size;
 192         cmd.data[1] = priv->beacon_skb->data;
 193         cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
 194
 195         return iwl_send_cmd_sync(priv, &cmd);
 196 }
 197
 198 static void iwl_bg_beacon_update(struct work_struct *work)
 199 {
 200         struct iwl_priv *priv =
 201                 container_of(work, struct iwl_priv, beacon_update);
 202         struct sk_buff *beacon;
 203
 204         mutex_lock(&priv->mutex);
 205         if (!priv->beacon_ctx) {
 206                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
 207                 goto out;
 208         }
 209
 210         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
 211                 /*
 212                  * The ucode will send beacon notifications even in
 213                  * IBSS mode, but we don't want to process them. But
 214                  * we need to defer the type check to here due to
 215                  * requiring locking around the beacon_ctx access.
 216                  */
 217                 goto out;
 218         }
 219
 220         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 221         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
 222         if (!beacon) {
 223                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
 224                 goto out;
 225         }
 226
 227         /* new beacon skb is allocated every time; dispose previous.*/
 228         dev_kfree_skb(priv->beacon_skb);
 229
 230         priv->beacon_skb = beacon;
 231
 232         iwlagn_send_beacon_cmd(priv);
 233  out:
 234         mutex_unlock(&priv->mutex);
 235 }
 236
 237 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 238 {
 239         struct iwl_priv *priv =
 240                 container_of(work, struct iwl_priv, bt_runtime_config);
 241
 242         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 243                 return;
 244
 245         /* dont send host command if rf-kill is on */
 246         if (!iwl_is_ready_rf(priv))
 247                 return;
 248         priv->cfg->ops->hcmd->send_bt_config(priv);
 249 }
 250
 251 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 252 {
 253         struct iwl_priv *priv =
 254                 container_of(work, struct iwl_priv, bt_full_concurrency);
 255         struct iwl_rxon_context *ctx;
 256
 257         mutex_lock(&priv->mutex);
 258
 259         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 260                 goto out;
 261
 262         /* dont send host command if rf-kill is on */
 263         if (!iwl_is_ready_rf(priv))
 264                 goto out;
 265
 266         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 267                        priv->bt_full_concurrent ?
 268                        "full concurrency" : "3-wire");
 269
 270         /*
 271          * LQ & RXON updated cmds must be sent before BT Config cmd
 272          * to avoid 3-wire collisions
 273          */
 274         for_each_context(priv, ctx) {
 275                 if (priv->cfg->ops->hcmd->set_rxon_chain)
 276                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 277                 iwlcore_commit_rxon(priv, ctx);
 278         }
 279
 280         priv->cfg->ops->hcmd->send_bt_config(priv);
 281 out:
 282         mutex_unlock(&priv->mutex);
 283 }
 284
 285 /**
 286  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 287  *
 288  * This callback is provided in order to send a statistics request.
 289  *
 290  * This timer function is continually reset to execute within
 291  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 292  * was received.  We need to ensure we receive the statistics in order
 293  * to update the temperature used for calibrating the TXPOWER.
 294  */
 295 static void iwl_bg_statistics_periodic(unsigned long data)
 296 {
 297         struct iwl_priv *priv = (struct iwl_priv *)data;
 298
 299         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 300                 return;
 301
 302         /* dont send host command if rf-kill is on */
 303         if (!iwl_is_ready_rf(priv))
 304                 return;
 305
 306         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 307 }
 308
 309
 310 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 311                                         u32 start_idx, u32 num_events,
 312                                         u32 mode)
 313 {
 314         u32 i;
 315         u32 ptr;        /* SRAM byte address of log data */
 316         u32 ev, time, data; /* event log data */
 317         unsigned long reg_flags;
 318
 319         if (mode == 0)
 320                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 321         else
 322                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 323
 324         /* Make sure device is powered up for SRAM reads */
 325         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 326         if (iwl_grab_nic_access(priv)) {
 327                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 328                 return;
 329         }
 330
 331         /* Set starting address; reads will auto-increment */
 332         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
 333         rmb();
 334
 335         /*
 336          * "time" is actually "data" for mode 0 (no timestamp).
 337          * place event id # at far right for easier visual parsing.
 338          */
 339         for (i = 0; i < num_events; i++) {
 340                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 341                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 342                 if (mode == 0) {
 343                         trace_iwlwifi_dev_ucode_cont_event(priv,
 344                                                         0, time, ev);
 345                 } else {
 346                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 347                         trace_iwlwifi_dev_ucode_cont_event(priv,
 348                                                 time, data, ev);
 349                 }
 350         }
 351         /* Allow device to power down */
 352         iwl_release_nic_access(priv);
 353         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 354 }
 355
 356 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 357 {
 358         u32 capacity;   /* event log capacity in # entries */
 359         u32 base;       /* SRAM byte address of event log header */
 360         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 361         u32 num_wraps;  /* # times uCode wrapped to top of log */
 362         u32 next_entry; /* index of next entry to be written by uCode */
 363
 364         base = priv->device_pointers.error_event_table;
 365         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 366                 capacity = iwl_read_targ_mem(priv, base);
 367                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 368                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 369                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 370         } else
 371                 return;
 372
 373         if (num_wraps == priv->event_log.num_wraps) {
 374                 iwl_print_cont_event_trace(priv,
 375                                        base, priv->event_log.next_entry,
 376                                        next_entry - priv->event_log.next_entry,
 377                                        mode);
 378                 priv->event_log.non_wraps_count++;
 379         } else {
 380                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 381                         priv->event_log.wraps_more_count++;
 382                 else
 383                         priv->event_log.wraps_once_count++;
 384                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 385                                 num_wraps - priv->event_log.num_wraps,
 386                                 next_entry, priv->event_log.next_entry);
 387                 if (next_entry < priv->event_log.next_entry) {
 388                         iwl_print_cont_event_trace(priv, base,
 389                                priv->event_log.next_entry,
 390                                capacity - priv->event_log.next_entry,
 391                                mode);
 392
 393                         iwl_print_cont_event_trace(priv, base, 0,
 394                                 next_entry, mode);
 395                 } else {
 396                         iwl_print_cont_event_trace(priv, base,
 397                                next_entry, capacity - next_entry,
 398                                mode);
 399
 400                         iwl_print_cont_event_trace(priv, base, 0,
 401                                 next_entry, mode);
 402                 }
 403         }
 404         priv->event_log.num_wraps = num_wraps;
 405         priv->event_log.next_entry = next_entry;
 406 }
 407
 408 /**
 409  * iwl_bg_ucode_trace - Timer callback to log ucode event
 410  *
 411  * The timer is continually set to execute every
 412  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 413  * this function is to perform continuous uCode event logging operation
 414  * if enabled
 415  */
 416 static void iwl_bg_ucode_trace(unsigned long data)
 417 {
 418         struct iwl_priv *priv = (struct iwl_priv *)data;
 419
 420         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 421                 return;
 422
 423         if (priv->event_log.ucode_trace) {
 424                 iwl_continuous_event_trace(priv);
 425                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 426                 mod_timer(&priv->ucode_trace,
 427                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 428         }
 429 }
 430
 431 static void iwl_bg_tx_flush(struct work_struct *work)
 432 {
 433         struct iwl_priv *priv =
 434                 container_of(work, struct iwl_priv, tx_flush);
 435
 436         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 437                 return;
 438
 439         /* do nothing if rf-kill is on */
 440         if (!iwl_is_ready_rf(priv))
 441                 return;
 442
 443         if (priv->cfg->ops->lib->txfifo_flush) {
 444                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 445                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 446         }
 447 }
 448
 449 /**
 450  * iwl_rx_handle - Main entry function for receiving responses from uCode
 451  *
 452  * Uses the priv->rx_handlers callback function array to invoke
 453  * the appropriate handlers, including command responses,
 454  * frame-received notifications, and other notifications.
 455  */
 456 static void iwl_rx_handle(struct iwl_priv *priv)
 457 {
 458         struct iwl_rx_mem_buffer *rxb;
 459         struct iwl_rx_packet *pkt;
 460         struct iwl_rx_queue *rxq = &priv->rxq;
 461         u32 r, i;
 462         int reclaim;
 463         unsigned long flags;
 464         u8 fill_rx = 0;
 465         u32 count = 8;
 466         int total_empty;
 467
 468         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 469          * buffer that the driver may process (last buffer filled by ucode). */
 470         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 471         i = rxq->read;
 472
 473         /* Rx interrupt, but nothing sent from uCode */
 474         if (i == r)
 475                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 476
 477         /* calculate total frames need to be restock after handling RX */
 478         total_empty = r - rxq->write_actual;
 479         if (total_empty < 0)
 480                 total_empty += RX_QUEUE_SIZE;
 481
 482         if (total_empty > (RX_QUEUE_SIZE / 2))
 483                 fill_rx = 1;
 484
 485         while (i != r) {
 486                 int len;
 487
 488                 rxb = rxq->queue[i];
 489
 490                 /* If an RXB doesn't have a Rx queue slot associated with it,
 491                  * then a bug has been introduced in the queue refilling
 492                  * routines -- catch it here */
 493                 if (WARN_ON(rxb == NULL)) {
 494                         i = (i + 1) & RX_QUEUE_MASK;
 495                         continue;
 496                 }
 497
 498                 rxq->queue[i] = NULL;
 499
 500                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 501                                PAGE_SIZE << priv->hw_params.rx_page_order,
 502                                PCI_DMA_FROMDEVICE);
 503                 pkt = rxb_addr(rxb);
 504
 505                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 506                 len += sizeof(u32); /* account for status word */
 507                 trace_iwlwifi_dev_rx(priv, pkt, len);
 508
 509                 /* Reclaim a command buffer only if this packet is a response
 510                  *   to a (driver-originated) command.
 511                  * If the packet (e.g. Rx frame) originated from uCode,
 512                  *   there is no command buffer to reclaim.
 513                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 514                  *   but apparently a few don't get set; catch them here. */
 515                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 516                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 517                         (pkt->hdr.cmd != REPLY_RX) &&
 518                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 519                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 520                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 521                         (pkt->hdr.cmd != REPLY_TX);
 522
 523                 /*
 524                  * Do the notification wait before RX handlers so
 525                  * even if the RX handler consumes the RXB we have
 526                  * access to it in the notification wait entry.
 527                  */
 528                 if (!list_empty(&priv->_agn.notif_waits)) {
 529                         struct iwl_notification_wait *w;
 530
 531                         spin_lock(&priv->_agn.notif_wait_lock);
 532                         list_for_each_entry(w, &priv->_agn.notif_waits, list) {
 533                                 if (w->cmd == pkt->hdr.cmd) {
 534                                         w->triggered = true;
 535                                         if (w->fn)
 536                                                 w->fn(priv, pkt, w->fn_data);
 537                                 }
 538                         }
 539                         spin_unlock(&priv->_agn.notif_wait_lock);
 540
 541                         wake_up_all(&priv->_agn.notif_waitq);
 542                 }
 543                 if (priv->pre_rx_handler)
 544                         priv->pre_rx_handler(priv, rxb);
 545
 546                 /* Based on type of command response or notification,
 547                  *   handle those that need handling via function in
 548                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 549                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 550                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 551                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 552                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 553                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 554                 } else {
 555                         /* No handling needed */
 556                         IWL_DEBUG_RX(priv,
 557                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 558                                 r, i, get_cmd_string(pkt->hdr.cmd),
 559                                 pkt->hdr.cmd);
 560                 }
 561
 562                 /*
 563                  * XXX: After here, we should always check rxb->page
 564                  * against NULL before touching it or its virtual
 565                  * memory (pkt). Because some rx_handler might have
 566                  * already taken or freed the pages.
 567                  */
 568
 569                 if (reclaim) {
 570                         /* Invoke any callbacks, transfer the buffer to caller,
 571                          * and fire off the (possibly) blocking iwl_send_cmd()
 572                          * as we reclaim the driver command queue */
 573                         if (rxb->page)
 574                                 iwl_tx_cmd_complete(priv, rxb);
 575                         else
 576                                 IWL_WARN(priv, "Claim null rxb?\n");
 577                 }
 578
 579                 /* Reuse the page if possible. For notification packets and
 580                  * SKBs that fail to Rx correctly, add them back into the
 581                  * rx_free list for reuse later. */
 582                 spin_lock_irqsave(&rxq->lock, flags);
 583                 if (rxb->page != NULL) {
 584                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 585                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 586                                 PCI_DMA_FROMDEVICE);
 587                         list_add_tail(&rxb->list, &rxq->rx_free);
 588                         rxq->free_count++;
 589                 } else
 590                         list_add_tail(&rxb->list, &rxq->rx_used);
 591
 592                 spin_unlock_irqrestore(&rxq->lock, flags);
 593
 594                 i = (i + 1) & RX_QUEUE_MASK;
 595                 /* If there are a lot of unused frames,
 596                  * restock the Rx queue so ucode wont assert. */
 597                 if (fill_rx) {
 598                         count++;
 599                         if (count >= 8) {
 600                                 rxq->read = i;
 601                                 iwlagn_rx_replenish_now(priv);
 602                                 count = 0;
 603                         }
 604                 }
 605         }
 606
 607         /* Backtrack one entry */
 608         rxq->read = i;
 609         if (fill_rx)
 610                 iwlagn_rx_replenish_now(priv);
 611         else
 612                 iwlagn_rx_queue_restock(priv);
 613 }
 614
 615 /* tasklet for iwlagn interrupt */
 616 static void iwl_irq_tasklet(struct iwl_priv *priv)
 617 {
 618         u32 inta = 0;
 619         u32 handled = 0;
 620         unsigned long flags;
 621         u32 i;
 622 #ifdef CONFIG_IWLWIFI_DEBUG
 623         u32 inta_mask;
 624 #endif
 625
 626         spin_lock_irqsave(&priv->lock, flags);
 627
 628         /* Ack/clear/reset pending uCode interrupts.
 629          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 630          */
 631         /* There is a hardware bug in the interrupt mask function that some
 632          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
 633          * they are disabled in the CSR_INT_MASK register. Furthermore the
 634          * ICT interrupt handling mechanism has another bug that might cause
 635          * these unmasked interrupts fail to be detected. We workaround the
 636          * hardware bugs here by ACKing all the possible interrupts so that
 637          * interrupt coalescing can still be achieved.
 638          */
 639         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
 640
 641         inta = priv->_agn.inta;
 642
 643 #ifdef CONFIG_IWLWIFI_DEBUG
 644         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 645                 /* just for debug */
 646                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 647                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
 648                                 inta, inta_mask);
 649         }
 650 #endif
 651
 652         spin_unlock_irqrestore(&priv->lock, flags);
 653
 654         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
 655         priv->_agn.inta = 0;
 656
 657         /* Now service all interrupt bits discovered above. */
 658         if (inta & CSR_INT_BIT_HW_ERR) {
 659                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 660
 661                 /* Tell the device to stop sending interrupts */
 662                 iwl_disable_interrupts(priv);
 663
 664                 priv->isr_stats.hw++;
 665                 iwl_irq_handle_error(priv);
 666
 667                 handled |= CSR_INT_BIT_HW_ERR;
 668
 669                 return;
 670         }
 671
 672 #ifdef CONFIG_IWLWIFI_DEBUG
 673         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 674                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 675                 if (inta & CSR_INT_BIT_SCD) {
 676                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 677                                       "the frame/frames.\n");
 678                         priv->isr_stats.sch++;
 679                 }
 680
 681                 /* Alive notification via Rx interrupt will do the real work */
 682                 if (inta & CSR_INT_BIT_ALIVE) {
 683                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 684                         priv->isr_stats.alive++;
 685                 }
 686         }
 687 #endif
 688         /* Safely ignore these bits for debug checks below */
 689         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 690
 691         /* HW RF KILL switch toggled */
 692         if (inta & CSR_INT_BIT_RF_KILL) {
 693                 int hw_rf_kill = 0;
 694                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 695                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 696                         hw_rf_kill = 1;
 697
 698                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 699                                 hw_rf_kill ? "disable radio" : "enable radio");
 700
 701                 priv->isr_stats.rfkill++;
 702
 703                 /* driver only loads ucode once setting the interface up.
 704                  * the driver allows loading the ucode even if the radio
 705                  * is killed. Hence update the killswitch state here. The
 706                  * rfkill handler will care about restarting if needed.
 707                  */
 708                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 709                         if (hw_rf_kill)
 710                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 711                         else
 712                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 713                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 714                 }
 715
 716                 handled |= CSR_INT_BIT_RF_KILL;
 717         }
 718
 719         /* Chip got too hot and stopped itself */
 720         if (inta & CSR_INT_BIT_CT_KILL) {
 721                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
 722                 priv->isr_stats.ctkill++;
 723                 handled |= CSR_INT_BIT_CT_KILL;
 724         }
 725
 726         /* Error detected by uCode */
 727         if (inta & CSR_INT_BIT_SW_ERR) {
 728                 IWL_ERR(priv, "Microcode SW error detected. "
 729                         " Restarting 0x%X.\n", inta);
 730                 priv->isr_stats.sw++;
 731                 iwl_irq_handle_error(priv);
 732                 handled |= CSR_INT_BIT_SW_ERR;
 733         }
 734
 735         /* uCode wakes up after power-down sleep */
 736         if (inta & CSR_INT_BIT_WAKEUP) {
 737                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
 738                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
 739                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
 740                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
 741
 742                 priv->isr_stats.wakeup++;
 743
 744                 handled |= CSR_INT_BIT_WAKEUP;
 745         }
 746
 747         /* All uCode command responses, including Tx command responses,
 748          * Rx "responses" (frame-received notification), and other
 749          * notifications from uCode come through here*/
 750         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
 751                         CSR_INT_BIT_RX_PERIODIC)) {
 752                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
 753                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
 754                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
 755                         iwl_write32(priv, CSR_FH_INT_STATUS,
 756                                         CSR_FH_INT_RX_MASK);
 757                 }
 758                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
 759                         handled |= CSR_INT_BIT_RX_PERIODIC;
 760                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
 761                 }
 762                 /* Sending RX interrupt require many steps to be done in the
 763                  * the device:
 764                  * 1- write interrupt to current index in ICT table.
 765                  * 2- dma RX frame.
 766                  * 3- update RX shared data to indicate last write index.
 767                  * 4- send interrupt.
 768                  * This could lead to RX race, driver could receive RX interrupt
 769                  * but the shared data changes does not reflect this;
 770                  * periodic interrupt will detect any dangling Rx activity.
 771                  */
 772
 773                 /* Disable periodic interrupt; we use it as just a one-shot. */
 774                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
 775                             CSR_INT_PERIODIC_DIS);
 776                 iwl_rx_handle(priv);
 777
 778                 /*
 779                  * Enable periodic interrupt in 8 msec only if we received
 780                  * real RX interrupt (instead of just periodic int), to catch
 781                  * any dangling Rx interrupt.  If it was just the periodic
 782                  * interrupt, there was no dangling Rx activity, and no need
 783                  * to extend the periodic interrupt; one-shot is enough.
 784                  */
 785                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
 786                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
 787                                     CSR_INT_PERIODIC_ENA);
 788
 789                 priv->isr_stats.rx++;
 790         }
 791
 792         /* This "Tx" DMA channel is used only for loading uCode */
 793         if (inta & CSR_INT_BIT_FH_TX) {
 794                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
 795                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
 796                 priv->isr_stats.tx++;
 797                 handled |= CSR_INT_BIT_FH_TX;
 798                 /* Wake up uCode load routine, now that load is complete */
 799                 priv->ucode_write_complete = 1;
 800                 wake_up_interruptible(&priv->wait_command_queue);
 801         }
 802
 803         if (inta & ~handled) {
 804                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
 805                 priv->isr_stats.unhandled++;
 806         }
 807
 808         if (inta & ~(priv->inta_mask)) {
 809                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
 810                          inta & ~priv->inta_mask);
 811         }
 812
 813         /* Re-enable all interrupts */
 814         /* only Re-enable if disabled by irq */
 815         if (test_bit(STATUS_INT_ENABLED, &priv->status))
 816                 iwl_enable_interrupts(priv);
 817         /* Re-enable RF_KILL if it occurred */
 818         else if (handled & CSR_INT_BIT_RF_KILL)
 819                 iwl_enable_rfkill_int(priv);
 820 }
 821
 822 /*****************************************************************************
 823  *
 824  * sysfs attributes
 825  *
 826  *****************************************************************************/
 827
 828 #ifdef CONFIG_IWLWIFI_DEBUG
 829
 830 /*
 831  * The following adds a new attribute to the sysfs representation
 832  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
 833  * used for controlling the debug level.
 834  *
 835  * See the level definitions in iwl for details.
 836  *
 837  * The debug_level being managed using sysfs below is a per device debug
 838  * level that is used instead of the global debug level if it (the per
 839  * device debug level) is set.
 840  */
 841 static ssize_t show_debug_level(struct device *d,
 842                                 struct device_attribute *attr, char *buf)
 843 {
 844         struct iwl_priv *priv = dev_get_drvdata(d);
 845         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
 846 }
 847 static ssize_t store_debug_level(struct device *d,
 848                                 struct device_attribute *attr,
 849                                  const char *buf, size_t count)
 850 {
 851         struct iwl_priv *priv = dev_get_drvdata(d);
 852         unsigned long val;
 853         int ret;
 854
 855         ret = strict_strtoul(buf, 0, &val);
 856         if (ret)
 857                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
 858         else {
 859                 priv->debug_level = val;
 860                 if (iwl_alloc_traffic_mem(priv))
 861                         IWL_ERR(priv,
 862                                 "Not enough memory to generate traffic log\n");
 863         }
 864         return strnlen(buf, count);
 865 }
 866
 867 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
 868                         show_debug_level, store_debug_level);
 869
 870
 871 #endif /* CONFIG_IWLWIFI_DEBUG */
 872
 873
 874 static ssize_t show_temperature(struct device *d,
 875                                 struct device_attribute *attr, char *buf)
 876 {
 877         struct iwl_priv *priv = dev_get_drvdata(d);
 878
 879         if (!iwl_is_alive(priv))
 880                 return -EAGAIN;
 881
 882         return sprintf(buf, "%d\n", priv->temperature);
 883 }
 884
 885 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
 886
 887 static ssize_t show_tx_power(struct device *d,
 888                              struct device_attribute *attr, char *buf)
 889 {
 890         struct iwl_priv *priv = dev_get_drvdata(d);
 891
 892         if (!iwl_is_ready_rf(priv))
 893                 return sprintf(buf, "off\n");
 894         else
 895                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
 896 }
 897
 898 static ssize_t store_tx_power(struct device *d,
 899                               struct device_attribute *attr,
 900                               const char *buf, size_t count)
 901 {
 902         struct iwl_priv *priv = dev_get_drvdata(d);
 903         unsigned long val;
 904         int ret;
 905
 906         ret = strict_strtoul(buf, 10, &val);
 907         if (ret)
 908                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
 909         else {
 910                 ret = iwl_set_tx_power(priv, val, false);
 911                 if (ret)
 912                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
 913                                 ret);
 914                 else
 915                         ret = count;
 916         }
 917         return ret;
 918 }
 919
 920 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
 921
 922 static struct attribute *iwl_sysfs_entries[] = {
 923         &dev_attr_temperature.attr,
 924         &dev_attr_tx_power.attr,
 925 #ifdef CONFIG_IWLWIFI_DEBUG
 926         &dev_attr_debug_level.attr,
 927 #endif
 928         NULL
 929 };
 930
 931 static struct attribute_group iwl_attribute_group = {
 932         .name = NULL,           /* put in device directory */
 933         .attrs = iwl_sysfs_entries,
 934 };
 935
 936 /******************************************************************************
 937  *
 938  * uCode download functions
 939  *
 940  ******************************************************************************/
 941
 942 static void iwl_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
 943 {
 944         if (desc->v_addr)
 945                 dma_free_coherent(&pci_dev->dev, desc->len,
 946                                   desc->v_addr, desc->p_addr);
 947         desc->v_addr = NULL;
 948         desc->len = 0;
 949 }
 950
 951 static void iwl_free_fw_img(struct pci_dev *pci_dev, struct fw_img *img)
 952 {
 953         iwl_free_fw_desc(pci_dev, &img->code);
 954         iwl_free_fw_desc(pci_dev, &img->data);
 955 }
 956
 957 static int iwl_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc,
 958                              const void *data, size_t len)
 959 {
 960         if (!len) {
 961                 desc->v_addr = NULL;
 962                 return -EINVAL;
 963         }
 964
 965         desc->v_addr = dma_alloc_coherent(&pci_dev->dev, len,
 966                                           &desc->p_addr, GFP_KERNEL);
 967         if (!desc->v_addr)
 968                 return -ENOMEM;
 969         desc->len = len;
 970         memcpy(desc->v_addr, data, len);
 971         return 0;
 972 }
 973
 974 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
 975 {
 976         iwl_free_fw_img(priv->pci_dev, &priv->ucode_rt);
 977         iwl_free_fw_img(priv->pci_dev, &priv->ucode_init);
 978 }
 979
 980 struct iwlagn_ucode_capabilities {
 981         u32 max_probe_length;
 982         u32 standard_phy_calibration_size;
 983         u32 flags;
 984 };
 985
 986 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
 987 static int iwl_mac_setup_register(struct iwl_priv *priv,
 988                                   struct iwlagn_ucode_capabilities *capa);
 989
 990 #define UCODE_EXPERIMENTAL_INDEX        100
 991 #define UCODE_EXPERIMENTAL_TAG          "exp"
 992
 993 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
 994 {
 995         const char *name_pre = priv->cfg->fw_name_pre;
 996         char tag[8];
 997
 998         if (first) {
 999 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1000                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1001                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1002         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1003 #endif
1004                 priv->fw_index = priv->cfg->ucode_api_max;
1005                 sprintf(tag, "%d", priv->fw_index);
1006         } else {
1007                 priv->fw_index--;
1008                 sprintf(tag, "%d", priv->fw_index);
1009         }
1010
1011         if (priv->fw_index < priv->cfg->ucode_api_min) {
1012                 IWL_ERR(priv, "no suitable firmware found!\n");
1013                 return -ENOENT;
1014         }
1015
1016         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1017
1018         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1019                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1020                                 ? "EXPERIMENTAL " : "",
1021                        priv->firmware_name);
1022
1023         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1024                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1025                                        iwl_ucode_callback);
1026 }
1027
1028 struct iwlagn_firmware_pieces {
1029         const void *inst, *data, *init, *init_data;
1030         size_t inst_size, data_size, init_size, init_data_size;
1031
1032         u32 build;
1033
1034         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1035         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1036 };
1037
1038 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1039                                        const struct firmware *ucode_raw,
1040                                        struct iwlagn_firmware_pieces *pieces)
1041 {
1042         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1043         u32 api_ver, hdr_size;
1044         const u8 *src;
1045
1046         priv->ucode_ver = le32_to_cpu(ucode->ver);
1047         api_ver = IWL_UCODE_API(priv->ucode_ver);
1048
1049         switch (api_ver) {
1050         default:
1051                 hdr_size = 28;
1052                 if (ucode_raw->size < hdr_size) {
1053                         IWL_ERR(priv, "File size too small!\n");
1054                         return -EINVAL;
1055                 }
1056                 pieces->build = le32_to_cpu(ucode->u.v2.build);
1057                 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1058                 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1059                 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1060                 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1061                 src = ucode->u.v2.data;
1062                 break;
1063         case 0:
1064         case 1:
1065         case 2:
1066                 hdr_size = 24;
1067                 if (ucode_raw->size < hdr_size) {
1068                         IWL_ERR(priv, "File size too small!\n");
1069                         return -EINVAL;
1070                 }
1071                 pieces->build = 0;
1072                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1073                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1074                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1075                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1076                 src = ucode->u.v1.data;
1077                 break;
1078         }
1079
1080         /* Verify size of file vs. image size info in file's header */
1081         if (ucode_raw->size != hdr_size + pieces->inst_size +
1082                                 pieces->data_size + pieces->init_size +
1083                                 pieces->init_data_size) {
1084
1085                 IWL_ERR(priv,
1086                         "uCode file size %d does not match expected size\n",
1087                         (int)ucode_raw->size);
1088                 return -EINVAL;
1089         }
1090
1091         pieces->inst = src;
1092         src += pieces->inst_size;
1093         pieces->data = src;
1094         src += pieces->data_size;
1095         pieces->init = src;
1096         src += pieces->init_size;
1097         pieces->init_data = src;
1098         src += pieces->init_data_size;
1099
1100         return 0;
1101 }
1102
1103 static int iwlagn_wanted_ucode_alternative = 1;
1104
1105 static int iwlagn_load_firmware(struct iwl_priv *priv,
1106                                 const struct firmware *ucode_raw,
1107                                 struct iwlagn_firmware_pieces *pieces,
1108                                 struct iwlagn_ucode_capabilities *capa)
1109 {
1110         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1111         struct iwl_ucode_tlv *tlv;
1112         size_t len = ucode_raw->size;
1113         const u8 *data;
1114         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1115         u64 alternatives;
1116         u32 tlv_len;
1117         enum iwl_ucode_tlv_type tlv_type;
1118         const u8 *tlv_data;
1119
1120         if (len < sizeof(*ucode)) {
1121                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1122                 return -EINVAL;
1123         }
1124
1125         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1126                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1127                         le32_to_cpu(ucode->magic));
1128                 return -EINVAL;
1129         }
1130
1131         /*
1132          * Check which alternatives are present, and "downgrade"
1133          * when the chosen alternative is not present, warning
1134          * the user when that happens. Some files may not have
1135          * any alternatives, so don't warn in that case.
1136          */
1137         alternatives = le64_to_cpu(ucode->alternatives);
1138         tmp = wanted_alternative;
1139         if (wanted_alternative > 63)
1140                 wanted_alternative = 63;
1141         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1142                 wanted_alternative--;
1143         if (wanted_alternative && wanted_alternative != tmp)
1144                 IWL_WARN(priv,
1145                          "uCode alternative %d not available, choosing %d\n",
1146                          tmp, wanted_alternative);
1147
1148         priv->ucode_ver = le32_to_cpu(ucode->ver);
1149         pieces->build = le32_to_cpu(ucode->build);
1150         data = ucode->data;
1151
1152         len -= sizeof(*ucode);
1153
1154         while (len >= sizeof(*tlv)) {
1155                 u16 tlv_alt;
1156
1157                 len -= sizeof(*tlv);
1158                 tlv = (void *)data;
1159
1160                 tlv_len = le32_to_cpu(tlv->length);
1161                 tlv_type = le16_to_cpu(tlv->type);
1162                 tlv_alt = le16_to_cpu(tlv->alternative);
1163                 tlv_data = tlv->data;
1164
1165                 if (len < tlv_len) {
1166                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1167                                 len, tlv_len);
1168                         return -EINVAL;
1169                 }
1170                 len -= ALIGN(tlv_len, 4);
1171                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1172
1173                 /*
1174                  * Alternative 0 is always valid.
1175                  *
1176                  * Skip alternative TLVs that are not selected.
1177                  */
1178                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1179                         continue;
1180
1181                 switch (tlv_type) {
1182                 case IWL_UCODE_TLV_INST:
1183                         pieces->inst = tlv_data;
1184                         pieces->inst_size = tlv_len;
1185                         break;
1186                 case IWL_UCODE_TLV_DATA:
1187                         pieces->data = tlv_data;
1188                         pieces->data_size = tlv_len;
1189                         break;
1190                 case IWL_UCODE_TLV_INIT:
1191                         pieces->init = tlv_data;
1192                         pieces->init_size = tlv_len;
1193                         break;
1194                 case IWL_UCODE_TLV_INIT_DATA:
1195                         pieces->init_data = tlv_data;
1196                         pieces->init_data_size = tlv_len;
1197                         break;
1198                 case IWL_UCODE_TLV_BOOT:
1199                         IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1200                         break;
1201                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1202                         if (tlv_len != sizeof(u32))
1203                                 goto invalid_tlv_len;
1204                         capa->max_probe_length =
1205                                         le32_to_cpup((__le32 *)tlv_data);
1206                         break;
1207                 case IWL_UCODE_TLV_PAN:
1208                         if (tlv_len)
1209                                 goto invalid_tlv_len;
1210                         capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1211                         break;
1212                 case IWL_UCODE_TLV_FLAGS:
1213                         /* must be at least one u32 */
1214                         if (tlv_len < sizeof(u32))
1215                                 goto invalid_tlv_len;
1216                         /* and a proper number of u32s */
1217                         if (tlv_len % sizeof(u32))
1218                                 goto invalid_tlv_len;
1219                         /*
1220                          * This driver only reads the first u32 as
1221                          * right now no more features are defined,
1222                          * if that changes then either the driver
1223                          * will not work with the new firmware, or
1224                          * it'll not take advantage of new features.
1225                          */
1226                         capa->flags = le32_to_cpup((__le32 *)tlv_data);
1227                         break;
1228                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1229                         if (tlv_len != sizeof(u32))
1230                                 goto invalid_tlv_len;
1231                         pieces->init_evtlog_ptr =
1232                                         le32_to_cpup((__le32 *)tlv_data);
1233                         break;
1234                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1235                         if (tlv_len != sizeof(u32))
1236                                 goto invalid_tlv_len;
1237                         pieces->init_evtlog_size =
1238                                         le32_to_cpup((__le32 *)tlv_data);
1239                         break;
1240                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1241                         if (tlv_len != sizeof(u32))
1242                                 goto invalid_tlv_len;
1243                         pieces->init_errlog_ptr =
1244                                         le32_to_cpup((__le32 *)tlv_data);
1245                         break;
1246                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1247                         if (tlv_len != sizeof(u32))
1248                                 goto invalid_tlv_len;
1249                         pieces->inst_evtlog_ptr =
1250                                         le32_to_cpup((__le32 *)tlv_data);
1251                         break;
1252                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1253                         if (tlv_len != sizeof(u32))
1254                                 goto invalid_tlv_len;
1255                         pieces->inst_evtlog_size =
1256                                         le32_to_cpup((__le32 *)tlv_data);
1257                         break;
1258                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1259                         if (tlv_len != sizeof(u32))
1260                                 goto invalid_tlv_len;
1261                         pieces->inst_errlog_ptr =
1262                                         le32_to_cpup((__le32 *)tlv_data);
1263                         break;
1264                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1265                         if (tlv_len)
1266                                 goto invalid_tlv_len;
1267                         priv->enhance_sensitivity_table = true;
1268                         break;
1269                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1270                         if (tlv_len != sizeof(u32))
1271                                 goto invalid_tlv_len;
1272                         capa->standard_phy_calibration_size =
1273                                         le32_to_cpup((__le32 *)tlv_data);
1274                         break;
1275                 default:
1276                         IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
1277                         break;
1278                 }
1279         }
1280
1281         if (len) {
1282                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1283                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1284                 return -EINVAL;
1285         }
1286
1287         return 0;
1288
1289  invalid_tlv_len:
1290         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1291         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1292
1293         return -EINVAL;
1294 }
1295
1296 /**
1297  * iwl_ucode_callback - callback when firmware was loaded
1298  *
1299  * If loaded successfully, copies the firmware into buffers
1300  * for the card to fetch (via DMA).
1301  */
1302 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1303 {
1304         struct iwl_priv *priv = context;
1305         struct iwl_ucode_header *ucode;
1306         int err;
1307         struct iwlagn_firmware_pieces pieces;
1308         const unsigned int api_max = priv->cfg->ucode_api_max;
1309         const unsigned int api_min = priv->cfg->ucode_api_min;
1310         u32 api_ver;
1311         char buildstr[25];
1312         u32 build;
1313         struct iwlagn_ucode_capabilities ucode_capa = {
1314                 .max_probe_length = 200,
1315                 .standard_phy_calibration_size =
1316                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1317         };
1318
1319         memset(&pieces, 0, sizeof(pieces));
1320
1321         if (!ucode_raw) {
1322                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1323                         IWL_ERR(priv,
1324                                 "request for firmware file '%s' failed.\n",
1325                                 priv->firmware_name);
1326                 goto try_again;
1327         }
1328
1329         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1330                        priv->firmware_name, ucode_raw->size);
1331
1332         /* Make sure that we got at least the API version number */
1333         if (ucode_raw->size < 4) {
1334                 IWL_ERR(priv, "File size way too small!\n");
1335                 goto try_again;
1336         }
1337
1338         /* Data from ucode file:  header followed by uCode images */
1339         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1340
1341         if (ucode->ver)
1342                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1343         else
1344                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1345                                            &ucode_capa);
1346
1347         if (err)
1348                 goto try_again;
1349
1350         api_ver = IWL_UCODE_API(priv->ucode_ver);
1351         build = pieces.build;
1352
1353         /*
1354          * api_ver should match the api version forming part of the
1355          * firmware filename ... but we don't check for that and only rely
1356          * on the API version read from firmware header from here on forward
1357          */
1358         /* no api version check required for experimental uCode */
1359         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1360                 if (api_ver < api_min || api_ver > api_max) {
1361                         IWL_ERR(priv,
1362                                 "Driver unable to support your firmware API. "
1363                                 "Driver supports v%u, firmware is v%u.\n",
1364                                 api_max, api_ver);
1365                         goto try_again;
1366                 }
1367
1368                 if (api_ver != api_max)
1369                         IWL_ERR(priv,
1370                                 "Firmware has old API version. Expected v%u, "
1371                                 "got v%u. New firmware can be obtained "
1372                                 "from http://www.intellinuxwireless.org.\n",
1373                                 api_max, api_ver);
1374         }
1375
1376         if (build)
1377                 sprintf(buildstr, " build %u%s", build,
1378                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1379                                 ? " (EXP)" : "");
1380         else
1381                 buildstr[0] = '\0';
1382
1383         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1384                  IWL_UCODE_MAJOR(priv->ucode_ver),
1385                  IWL_UCODE_MINOR(priv->ucode_ver),
1386                  IWL_UCODE_API(priv->ucode_ver),
1387                  IWL_UCODE_SERIAL(priv->ucode_ver),
1388                  buildstr);
1389
1390         snprintf(priv->hw->wiphy->fw_version,
1391                  sizeof(priv->hw->wiphy->fw_version),
1392                  "%u.%u.%u.%u%s",
1393                  IWL_UCODE_MAJOR(priv->ucode_ver),
1394                  IWL_UCODE_MINOR(priv->ucode_ver),
1395                  IWL_UCODE_API(priv->ucode_ver),
1396                  IWL_UCODE_SERIAL(priv->ucode_ver),
1397                  buildstr);
1398
1399         /*
1400          * For any of the failures below (before allocating pci memory)
1401          * we will try to load a version with a smaller API -- maybe the
1402          * user just got a corrupted version of the latest API.
1403          */
1404
1405         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1406                        priv->ucode_ver);
1407         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1408                        pieces.inst_size);
1409         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1410                        pieces.data_size);
1411         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1412                        pieces.init_size);
1413         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1414                        pieces.init_data_size);
1415
1416         /* Verify that uCode images will fit in card's SRAM */
1417         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1418                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1419                         pieces.inst_size);
1420                 goto try_again;
1421         }
1422
1423         if (pieces.data_size > priv->hw_params.max_data_size) {
1424                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1425                         pieces.data_size);
1426                 goto try_again;
1427         }
1428
1429         if (pieces.init_size > priv->hw_params.max_inst_size) {
1430                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1431                         pieces.init_size);
1432                 goto try_again;
1433         }
1434
1435         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1436                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1437                         pieces.init_data_size);
1438                 goto try_again;
1439         }
1440
1441         /* Allocate ucode buffers for card's bus-master loading ... */
1442
1443         /* Runtime instructions and 2 copies of data:
1444          * 1) unmodified from disk
1445          * 2) backup cache for save/restore during power-downs */
1446         if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.code,
1447                               pieces.inst, pieces.inst_size))
1448                 goto err_pci_alloc;
1449         if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.data,
1450                               pieces.data, pieces.data_size))
1451                 goto err_pci_alloc;
1452
1453         /* Initialization instructions and data */
1454         if (pieces.init_size && pieces.init_data_size) {
1455                 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.code,
1456                                       pieces.init, pieces.init_size))
1457                         goto err_pci_alloc;
1458                 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.data,
1459                                       pieces.init_data, pieces.init_data_size))
1460                         goto err_pci_alloc;
1461         }
1462
1463         /* Now that we can no longer fail, copy information */
1464
1465         /*
1466          * The (size - 16) / 12 formula is based on the information recorded
1467          * for each event, which is of mode 1 (including timestamp) for all
1468          * new microcodes that include this information.
1469          */
1470         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1471         if (pieces.init_evtlog_size)
1472                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1473         else
1474                 priv->_agn.init_evtlog_size =
1475                         priv->cfg->base_params->max_event_log_size;
1476         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1477         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1478         if (pieces.inst_evtlog_size)
1479                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1480         else
1481                 priv->_agn.inst_evtlog_size =
1482                         priv->cfg->base_params->max_event_log_size;
1483         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1484
1485         priv->new_scan_threshold_behaviour =
1486                 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
1487
1488         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1489                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1490                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1491         } else
1492                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1493
1494         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1495                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1496         else
1497                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1498
1499         /*
1500          * figure out the offset of chain noise reset and gain commands
1501          * base on the size of standard phy calibration commands table size
1502          */
1503         if (ucode_capa.standard_phy_calibration_size >
1504             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1505                 ucode_capa.standard_phy_calibration_size =
1506                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1507
1508         priv->_agn.phy_calib_chain_noise_reset_cmd =
1509                 ucode_capa.standard_phy_calibration_size;
1510         priv->_agn.phy_calib_chain_noise_gain_cmd =
1511                 ucode_capa.standard_phy_calibration_size + 1;
1512
1513         /**************************************************
1514          * This is still part of probe() in a sense...
1515          *
1516          * 9. Setup and register with mac80211 and debugfs
1517          **************************************************/
1518         err = iwl_mac_setup_register(priv, &ucode_capa);
1519         if (err)
1520                 goto out_unbind;
1521
1522         err = iwl_dbgfs_register(priv, DRV_NAME);
1523         if (err)
1524                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1525
1526         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1527                                         &iwl_attribute_group);
1528         if (err) {
1529                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1530                 goto out_unbind;
1531         }
1532
1533         /* We have our copies now, allow OS release its copies */
1534         release_firmware(ucode_raw);
1535         complete(&priv->_agn.firmware_loading_complete);
1536         return;
1537
1538  try_again:
1539         /* try next, if any */
1540         if (iwl_request_firmware(priv, false))
1541                 goto out_unbind;
1542         release_firmware(ucode_raw);
1543         return;
1544
1545  err_pci_alloc:
1546         IWL_ERR(priv, "failed to allocate pci memory\n");
1547         iwl_dealloc_ucode_pci(priv);
1548  out_unbind:
1549         complete(&priv->_agn.firmware_loading_complete);
1550         device_release_driver(&priv->pci_dev->dev);
1551         release_firmware(ucode_raw);
1552 }
1553
1554 static const char *desc_lookup_text[] = {
1555         "OK",
1556         "FAIL",
1557         "BAD_PARAM",
1558         "BAD_CHECKSUM",
1559         "NMI_INTERRUPT_WDG",
1560         "SYSASSERT",
1561         "FATAL_ERROR",
1562         "BAD_COMMAND",
1563         "HW_ERROR_TUNE_LOCK",
1564         "HW_ERROR_TEMPERATURE",
1565         "ILLEGAL_CHAN_FREQ",
1566         "VCC_NOT_STABLE",
1567         "FH_ERROR",
1568         "NMI_INTERRUPT_HOST",
1569         "NMI_INTERRUPT_ACTION_PT",
1570         "NMI_INTERRUPT_UNKNOWN",
1571         "UCODE_VERSION_MISMATCH",
1572         "HW_ERROR_ABS_LOCK",
1573         "HW_ERROR_CAL_LOCK_FAIL",
1574         "NMI_INTERRUPT_INST_ACTION_PT",
1575         "NMI_INTERRUPT_DATA_ACTION_PT",
1576         "NMI_TRM_HW_ER",
1577         "NMI_INTERRUPT_TRM",
1578         "NMI_INTERRUPT_BREAK_POINT"
1579         "DEBUG_0",
1580         "DEBUG_1",
1581         "DEBUG_2",
1582         "DEBUG_3",
1583 };
1584
1585 static struct { char *name; u8 num; } advanced_lookup[] = {
1586         { "NMI_INTERRUPT_WDG", 0x34 },
1587         { "SYSASSERT", 0x35 },
1588         { "UCODE_VERSION_MISMATCH", 0x37 },
1589         { "BAD_COMMAND", 0x38 },
1590         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1591         { "FATAL_ERROR", 0x3D },
1592         { "NMI_TRM_HW_ERR", 0x46 },
1593         { "NMI_INTERRUPT_TRM", 0x4C },
1594         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1595         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1596         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1597         { "NMI_INTERRUPT_HOST", 0x66 },
1598         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1599         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1600         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1601         { "ADVANCED_SYSASSERT", 0 },
1602 };
1603
1604 static const char *desc_lookup(u32 num)
1605 {
1606         int i;
1607         int max = ARRAY_SIZE(desc_lookup_text);
1608
1609         if (num < max)
1610                 return desc_lookup_text[num];
1611
1612         max = ARRAY_SIZE(advanced_lookup) - 1;
1613         for (i = 0; i < max; i++) {
1614                 if (advanced_lookup[i].num == num)
1615                         break;
1616         }
1617         return advanced_lookup[i].name;
1618 }
1619
1620 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1621 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1622
1623 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1624 {
1625         u32 base;
1626         struct iwl_error_event_table table;
1627
1628         base = priv->device_pointers.error_event_table;
1629         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1630                 if (!base)
1631                         base = priv->_agn.init_errlog_ptr;
1632         } else {
1633                 if (!base)
1634                         base = priv->_agn.inst_errlog_ptr;
1635         }
1636
1637         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1638                 IWL_ERR(priv,
1639                         "Not valid error log pointer 0x%08X for %s uCode\n",
1640                         base,
1641                         (priv->ucode_type == UCODE_SUBTYPE_INIT)
1642                                         ? "Init" : "RT");
1643                 return;
1644         }
1645
1646         iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
1647
1648         if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
1649                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1650                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1651                         priv->status, table.valid);
1652         }
1653
1654         priv->isr_stats.err_code = table.error_id;
1655
1656         trace_iwlwifi_dev_ucode_error(priv, table.error_id, table.tsf_low,
1657                                       table.data1, table.data2, table.line,
1658                                       table.blink1, table.blink2, table.ilink1,
1659                                       table.ilink2, table.bcon_time, table.gp1,
1660                                       table.gp2, table.gp3, table.ucode_ver,
1661                                       table.hw_ver, table.brd_ver);
1662         IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,
1663                 desc_lookup(table.error_id));
1664         IWL_ERR(priv, "0x%08X | uPc\n", table.pc);
1665         IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);
1666         IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);
1667         IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);
1668         IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);
1669         IWL_ERR(priv, "0x%08X | data1\n", table.data1);
1670         IWL_ERR(priv, "0x%08X | data2\n", table.data2);
1671         IWL_ERR(priv, "0x%08X | line\n", table.line);
1672         IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);
1673         IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);
1674         IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);
1675         IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);
1676         IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);
1677         IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);
1678         IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);
1679         IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);
1680         IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);
1681         IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);
1682 }
1683
1684 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1685
1686 /**
1687  * iwl_print_event_log - Dump error event log to syslog
1688  *
1689  */
1690 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1691                                u32 num_events, u32 mode,
1692                                int pos, char **buf, size_t bufsz)
1693 {
1694         u32 i;
1695         u32 base;       /* SRAM byte address of event log header */
1696         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1697         u32 ptr;        /* SRAM byte address of log data */
1698         u32 ev, time, data; /* event log data */
1699         unsigned long reg_flags;
1700
1701         if (num_events == 0)
1702                 return pos;
1703
1704         base = priv->device_pointers.log_event_table;
1705         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1706                 if (!base)
1707                         base = priv->_agn.init_evtlog_ptr;
1708         } else {
1709                 if (!base)
1710                         base = priv->_agn.inst_evtlog_ptr;
1711         }
1712
1713         if (mode == 0)
1714                 event_size = 2 * sizeof(u32);
1715         else
1716                 event_size = 3 * sizeof(u32);
1717
1718         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1719
1720         /* Make sure device is powered up for SRAM reads */
1721         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1722         iwl_grab_nic_access(priv);
1723
1724         /* Set starting address; reads will auto-increment */
1725         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
1726         rmb();
1727
1728         /* "time" is actually "data" for mode 0 (no timestamp).
1729         * place event id # at far right for easier visual parsing. */
1730         for (i = 0; i < num_events; i++) {
1731                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1732                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1733                 if (mode == 0) {
1734                         /* data, ev */
1735                         if (bufsz) {
1736                                 pos += scnprintf(*buf + pos, bufsz - pos,
1737                                                 "EVT_LOG:0x%08x:%04u\n",
1738                                                 time, ev);
1739                         } else {
1740                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1741                                         time, ev);
1742                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1743                                         time, ev);
1744                         }
1745                 } else {
1746                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1747                         if (bufsz) {
1748                                 pos += scnprintf(*buf + pos, bufsz - pos,
1749                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1750                                                  time, data, ev);
1751                         } else {
1752                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1753                                         time, data, ev);
1754                                 trace_iwlwifi_dev_ucode_event(priv, time,
1755                                         data, ev);
1756                         }
1757                 }
1758         }
1759
1760         /* Allow device to power down */
1761         iwl_release_nic_access(priv);
1762         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1763         return pos;
1764 }
1765
1766 /**
1767  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1768  */
1769 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1770                                     u32 num_wraps, u32 next_entry,
1771                                     u32 size, u32 mode,
1772                                     int pos, char **buf, size_t bufsz)
1773 {
1774         /*
1775          * display the newest DEFAULT_LOG_ENTRIES entries
1776          * i.e the entries just before the next ont that uCode would fill.
1777          */
1778         if (num_wraps) {
1779                 if (next_entry < size) {
1780                         pos = iwl_print_event_log(priv,
1781                                                 capacity - (size - next_entry),
1782                                                 size - next_entry, mode,
1783                                                 pos, buf, bufsz);
1784                         pos = iwl_print_event_log(priv, 0,
1785                                                   next_entry, mode,
1786                                                   pos, buf, bufsz);
1787                 } else
1788                         pos = iwl_print_event_log(priv, next_entry - size,
1789                                                   size, mode, pos, buf, bufsz);
1790         } else {
1791                 if (next_entry < size) {
1792                         pos = iwl_print_event_log(priv, 0, next_entry,
1793                                                   mode, pos, buf, bufsz);
1794                 } else {
1795                         pos = iwl_print_event_log(priv, next_entry - size,
1796                                                   size, mode, pos, buf, bufsz);
1797                 }
1798         }
1799         return pos;
1800 }
1801
1802 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1803
1804 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1805                             char **buf, bool display)
1806 {
1807         u32 base;       /* SRAM byte address of event log header */
1808         u32 capacity;   /* event log capacity in # entries */
1809         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1810         u32 num_wraps;  /* # times uCode wrapped to top of log */
1811         u32 next_entry; /* index of next entry to be written by uCode */
1812         u32 size;       /* # entries that we'll print */
1813         u32 logsize;
1814         int pos = 0;
1815         size_t bufsz = 0;
1816
1817         base = priv->device_pointers.log_event_table;
1818         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1819                 logsize = priv->_agn.init_evtlog_size;
1820                 if (!base)
1821                         base = priv->_agn.init_evtlog_ptr;
1822         } else {
1823                 logsize = priv->_agn.inst_evtlog_size;
1824                 if (!base)
1825                         base = priv->_agn.inst_evtlog_ptr;
1826         }
1827
1828         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1829                 IWL_ERR(priv,
1830                         "Invalid event log pointer 0x%08X for %s uCode\n",
1831                         base,
1832                         (priv->ucode_type == UCODE_SUBTYPE_INIT)
1833                                         ? "Init" : "RT");
1834                 return -EINVAL;
1835         }
1836
1837         /* event log header */
1838         capacity = iwl_read_targ_mem(priv, base);
1839         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1840         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1841         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1842
1843         if (capacity > logsize) {
1844                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1845                         capacity, logsize);
1846                 capacity = logsize;
1847         }
1848
1849         if (next_entry > logsize) {
1850                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1851                         next_entry, logsize);
1852                 next_entry = logsize;
1853         }
1854
1855         size = num_wraps ? capacity : next_entry;
1856
1857         /* bail out if nothing in log */
1858         if (size == 0) {
1859                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1860                 return pos;
1861         }
1862
1863         /* enable/disable bt channel inhibition */
1864         priv->bt_ch_announce = iwlagn_bt_ch_announce;
1865
1866 #ifdef CONFIG_IWLWIFI_DEBUG
1867         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1868                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1869                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1870 #else
1871         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1872                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1873 #endif
1874         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1875                 size);
1876
1877 #ifdef CONFIG_IWLWIFI_DEBUG
1878         if (display) {
1879                 if (full_log)
1880                         bufsz = capacity * 48;
1881                 else
1882                         bufsz = size * 48;
1883                 *buf = kmalloc(bufsz, GFP_KERNEL);
1884                 if (!*buf)
1885                         return -ENOMEM;
1886         }
1887         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1888                 /*
1889                  * if uCode has wrapped back to top of log,
1890                  * start at the oldest entry,
1891                  * i.e the next one that uCode would fill.
1892                  */
1893                 if (num_wraps)
1894                         pos = iwl_print_event_log(priv, next_entry,
1895                                                 capacity - next_entry, mode,
1896                                                 pos, buf, bufsz);
1897                 /* (then/else) start at top of log */
1898                 pos = iwl_print_event_log(priv, 0,
1899                                           next_entry, mode, pos, buf, bufsz);
1900         } else
1901                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
1902                                                 next_entry, size, mode,
1903                                                 pos, buf, bufsz);
1904 #else
1905         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
1906                                         next_entry, size, mode,
1907                                         pos, buf, bufsz);
1908 #endif
1909         return pos;
1910 }
1911
1912 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1913 {
1914         struct iwl_ct_kill_config cmd;
1915         struct iwl_ct_kill_throttling_config adv_cmd;
1916         unsigned long flags;
1917         int ret = 0;
1918
1919         spin_lock_irqsave(&priv->lock, flags);
1920         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1921                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1922         spin_unlock_irqrestore(&priv->lock, flags);
1923         priv->thermal_throttle.ct_kill_toggle = false;
1924
1925         if (priv->cfg->base_params->support_ct_kill_exit) {
1926                 adv_cmd.critical_temperature_enter =
1927                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
1928                 adv_cmd.critical_temperature_exit =
1929                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1930
1931                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1932                                        sizeof(adv_cmd), &adv_cmd);
1933                 if (ret)
1934                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1935                 else
1936                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1937                                         "succeeded, "
1938                                         "critical temperature enter is %d,"
1939                                         "exit is %d\n",
1940                                        priv->hw_params.ct_kill_threshold,
1941                                        priv->hw_params.ct_kill_exit_threshold);
1942         } else {
1943                 cmd.critical_temperature_R =
1944                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
1945
1946                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1947                                        sizeof(cmd), &cmd);
1948                 if (ret)
1949                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1950                 else
1951                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1952                                         "succeeded, "
1953                                         "critical temperature is %d\n",
1954                                         priv->hw_params.ct_kill_threshold);
1955         }
1956 }
1957
1958 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
1959 {
1960         struct iwl_calib_cfg_cmd calib_cfg_cmd;
1961         struct iwl_host_cmd cmd = {
1962                 .id = CALIBRATION_CFG_CMD,
1963                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
1964                 .data = { &calib_cfg_cmd, },
1965         };
1966
1967         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
1968         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
1969         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
1970
1971         return iwl_send_cmd(priv, &cmd);
1972 }
1973
1974
1975 /**
1976  * iwl_alive_start - called after REPLY_ALIVE notification received
1977  *                   from protocol/runtime uCode (initialization uCode's
1978  *                   Alive gets handled by iwl_init_alive_start()).
1979  */
1980 int iwl_alive_start(struct iwl_priv *priv)
1981 {
1982         int ret = 0;
1983         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1984
1985         iwl_reset_ict(priv);
1986
1987         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1988
1989         /* After the ALIVE response, we can send host commands to the uCode */
1990         set_bit(STATUS_ALIVE, &priv->status);
1991
1992         /* Enable watchdog to monitor the driver tx queues */
1993         iwl_setup_watchdog(priv);
1994
1995         if (iwl_is_rfkill(priv))
1996                 return -ERFKILL;
1997
1998         /* download priority table before any calibration request */
1999         if (priv->cfg->bt_params &&
2000             priv->cfg->bt_params->advanced_bt_coexist) {
2001                 /* Configure Bluetooth device coexistence support */
2002                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2003                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2004                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2005                 priv->cfg->ops->hcmd->send_bt_config(priv);
2006                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2007                 iwlagn_send_prio_tbl(priv);
2008
2009                 /* FIXME: w/a to force change uCode BT state machine */
2010                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2011                                          BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2012                 if (ret)
2013                         return ret;
2014                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2015                                          BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2016                 if (ret)
2017                         return ret;
2018         }
2019         if (priv->hw_params.calib_rt_cfg)
2020                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2021
2022         ieee80211_wake_queues(priv->hw);
2023
2024         priv->active_rate = IWL_RATES_MASK;
2025
2026         /* Configure Tx antenna selection based on H/W config */
2027         if (priv->cfg->ops->hcmd->set_tx_ant)
2028                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2029
2030         if (iwl_is_associated_ctx(ctx)) {
2031                 struct iwl_rxon_cmd *active_rxon =
2032                                 (struct iwl_rxon_cmd *)&ctx->active;
2033                 /* apply any changes in staging */
2034                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2035                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2036         } else {
2037                 struct iwl_rxon_context *tmp;
2038                 /* Initialize our rx_config data */
2039                 for_each_context(priv, tmp)
2040                         iwl_connection_init_rx_config(priv, tmp);
2041
2042                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2043                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2044         }
2045
2046         if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2047             !priv->cfg->bt_params->advanced_bt_coexist)) {
2048                 /*
2049                  * default is 2-wire BT coexexistence support
2050                  */
2051                 priv->cfg->ops->hcmd->send_bt_config(priv);
2052         }
2053
2054         iwl_reset_run_time_calib(priv);
2055
2056         set_bit(STATUS_READY, &priv->status);
2057
2058         /* Configure the adapter for unassociated operation */
2059         ret = iwlcore_commit_rxon(priv, ctx);
2060         if (ret)
2061                 return ret;
2062
2063         /* At this point, the NIC is initialized and operational */
2064         iwl_rf_kill_ct_config(priv);
2065
2066         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2067
2068         return iwl_power_update_mode(priv, true);
2069 }
2070
2071 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2072
2073 static void __iwl_down(struct iwl_priv *priv)
2074 {
2075         int exit_pending;
2076
2077         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2078
2079         iwl_scan_cancel_timeout(priv, 200);
2080
2081         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2082
2083         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2084          * to prevent rearm timer */
2085         del_timer_sync(&priv->watchdog);
2086
2087         iwl_clear_ucode_stations(priv, NULL);
2088         iwl_dealloc_bcast_stations(priv);
2089         iwl_clear_driver_stations(priv);
2090
2091         /* reset BT coex data */
2092         priv->bt_status = 0;
2093         if (priv->cfg->bt_params)
2094                 priv->bt_traffic_load =
2095                          priv->cfg->bt_params->bt_init_traffic_load;
2096         else
2097                 priv->bt_traffic_load = 0;
2098         priv->bt_full_concurrent = false;
2099         priv->bt_ci_compliance = 0;
2100
2101         /* Wipe out the EXIT_PENDING status bit if we are not actually
2102          * exiting the module */
2103         if (!exit_pending)
2104                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2105
2106         if (priv->mac80211_registered)
2107                 ieee80211_stop_queues(priv->hw);
2108
2109         /* Clear out all status bits but a few that are stable across reset */
2110         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2111                                 STATUS_RF_KILL_HW |
2112                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2113                                 STATUS_GEO_CONFIGURED |
2114                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2115                                 STATUS_FW_ERROR |
2116                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2117                                 STATUS_EXIT_PENDING;
2118
2119         iwlagn_stop_device(priv);
2120
2121         dev_kfree_skb(priv->beacon_skb);
2122         priv->beacon_skb = NULL;
2123 }
2124
2125 static void iwl_down(struct iwl_priv *priv)
2126 {
2127         mutex_lock(&priv->mutex);
2128         __iwl_down(priv);
2129         mutex_unlock(&priv->mutex);
2130
2131         iwl_cancel_deferred_work(priv);
2132 }
2133
2134 #define HW_READY_TIMEOUT (50)
2135
2136 /* Note: returns poll_bit return value, which is >= 0 if success */
2137 static int iwl_set_hw_ready(struct iwl_priv *priv)
2138 {
2139         int ret;
2140
2141         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2142                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2143
2144         /* See if we got it */
2145         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2146                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2147                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2148                                 HW_READY_TIMEOUT);
2149
2150         IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
2151         return ret;
2152 }
2153
2154 /* Note: returns standard 0/-ERROR code */
2155 int iwl_prepare_card_hw(struct iwl_priv *priv)
2156 {
2157         int ret;
2158
2159         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2160
2161         ret = iwl_set_hw_ready(priv);
2162         if (ret >= 0)
2163                 return 0;
2164
2165         /* If HW is not ready, prepare the conditions to check again */
2166         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2167                         CSR_HW_IF_CONFIG_REG_PREPARE);
2168
2169         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2170                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2171                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2172
2173         if (ret < 0)
2174                 return ret;
2175
2176         /* HW should be ready by now, check again. */
2177         ret = iwl_set_hw_ready(priv);
2178         if (ret >= 0)
2179                 return 0;
2180         return ret;
2181 }
2182
2183 #define MAX_HW_RESTARTS 5
2184
2185 static int __iwl_up(struct iwl_priv *priv)
2186 {
2187         struct iwl_rxon_context *ctx;
2188         int ret;
2189
2190         lockdep_assert_held(&priv->mutex);
2191
2192         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2193                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2194                 return -EIO;
2195         }
2196
2197         for_each_context(priv, ctx) {
2198                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2199                 if (ret) {
2200                         iwl_dealloc_bcast_stations(priv);
2201                         return ret;
2202                 }
2203         }
2204
2205         ret = iwlagn_run_init_ucode(priv);
2206         if (ret) {
2207                 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
2208                 goto error;
2209         }
2210
2211         ret = iwlagn_load_ucode_wait_alive(priv,
2212                                            &priv->ucode_rt,
2213                                            UCODE_SUBTYPE_REGULAR,
2214                                            UCODE_SUBTYPE_REGULAR_NEW);
2215         if (ret) {
2216                 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
2217                 goto error;
2218         }
2219
2220         ret = iwl_alive_start(priv);
2221         if (ret)
2222                 goto error;
2223         return 0;
2224
2225  error:
2226         set_bit(STATUS_EXIT_PENDING, &priv->status);
2227         __iwl_down(priv);
2228         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2229
2230         IWL_ERR(priv, "Unable to initialize device.\n");
2231         return ret;
2232 }
2233
2234
2235 /*****************************************************************************
2236  *
2237  * Workqueue callbacks
2238  *
2239  *****************************************************************************/
2240
2241 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2242 {
2243         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2244                         run_time_calib_work);
2245
2246         mutex_lock(&priv->mutex);
2247
2248         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2249             test_bit(STATUS_SCANNING, &priv->status)) {
2250                 mutex_unlock(&priv->mutex);
2251                 return;
2252         }
2253
2254         if (priv->start_calib) {
2255                 iwl_chain_noise_calibration(priv);
2256                 iwl_sensitivity_calibration(priv);
2257         }
2258
2259         mutex_unlock(&priv->mutex);
2260 }
2261
2262 static void iwlagn_prepare_restart(struct iwl_priv *priv)
2263 {
2264         struct iwl_rxon_context *ctx;
2265         bool bt_full_concurrent;
2266         u8 bt_ci_compliance;
2267         u8 bt_load;
2268         u8 bt_status;
2269
2270         lockdep_assert_held(&priv->mutex);
2271
2272         for_each_context(priv, ctx)
2273                 ctx->vif = NULL;
2274         priv->is_open = 0;
2275
2276         /*
2277          * __iwl_down() will clear the BT status variables,
2278          * which is correct, but when we restart we really
2279          * want to keep them so restore them afterwards.
2280          *
2281          * The restart process will later pick them up and
2282          * re-configure the hw when we reconfigure the BT
2283          * command.
2284          */
2285         bt_full_concurrent = priv->bt_full_concurrent;
2286         bt_ci_compliance = priv->bt_ci_compliance;
2287         bt_load = priv->bt_traffic_load;
2288         bt_status = priv->bt_status;
2289
2290         __iwl_down(priv);
2291
2292         priv->bt_full_concurrent = bt_full_concurrent;
2293         priv->bt_ci_compliance = bt_ci_compliance;
2294         priv->bt_traffic_load = bt_load;
2295         priv->bt_status = bt_status;
2296 }
2297
2298 static void iwl_bg_restart(struct work_struct *data)
2299 {
2300         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2301
2302         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2303                 return;
2304
2305         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2306                 mutex_lock(&priv->mutex);
2307                 iwlagn_prepare_restart(priv);
2308                 mutex_unlock(&priv->mutex);
2309                 iwl_cancel_deferred_work(priv);
2310                 ieee80211_restart_hw(priv->hw);
2311         } else {
2312                 WARN_ON(1);
2313         }
2314 }
2315
2316 static void iwl_bg_rx_replenish(struct work_struct *data)
2317 {
2318         struct iwl_priv *priv =
2319             container_of(data, struct iwl_priv, rx_replenish);
2320
2321         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2322                 return;
2323
2324         mutex_lock(&priv->mutex);
2325         iwlagn_rx_replenish(priv);
2326         mutex_unlock(&priv->mutex);
2327 }
2328
2329 static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2330                                  struct ieee80211_channel *chan,
2331                                  enum nl80211_channel_type channel_type,
2332                                  unsigned int wait)
2333 {
2334         struct iwl_priv *priv = hw->priv;
2335         int ret;
2336
2337         /* Not supported if we don't have PAN */
2338         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
2339                 ret = -EOPNOTSUPP;
2340                 goto free;
2341         }
2342
2343         /* Not supported on pre-P2P firmware */
2344         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2345                                         BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2346                 ret = -EOPNOTSUPP;
2347                 goto free;
2348         }
2349
2350         mutex_lock(&priv->mutex);
2351
2352         if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2353                 /*
2354                  * If the PAN context is free, use the normal
2355                  * way of doing remain-on-channel offload + TX.
2356                  */
2357                 ret = 1;
2358                 goto out;
2359         }
2360
2361         /* TODO: queue up if scanning? */
2362         if (test_bit(STATUS_SCANNING, &priv->status) ||
2363             priv->_agn.offchan_tx_skb) {
2364                 ret = -EBUSY;
2365                 goto out;
2366         }
2367
2368         /*
2369          * max_scan_ie_len doesn't include the blank SSID or the header,
2370          * so need to add that again here.
2371          */
2372         if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2373                 ret = -ENOBUFS;
2374                 goto out;
2375         }
2376
2377         priv->_agn.offchan_tx_skb = skb;
2378         priv->_agn.offchan_tx_timeout = wait;
2379         priv->_agn.offchan_tx_chan = chan;
2380
2381         ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2382                                 IWL_SCAN_OFFCH_TX, chan->band);
2383         if (ret)
2384                 priv->_agn.offchan_tx_skb = NULL;
2385  out:
2386         mutex_unlock(&priv->mutex);
2387  free:
2388         if (ret < 0)
2389                 kfree_skb(skb);
2390
2391         return ret;
2392 }
2393
2394 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2395 {
2396         struct iwl_priv *priv = hw->priv;
2397         int ret;
2398
2399         mutex_lock(&priv->mutex);
2400
2401         if (!priv->_agn.offchan_tx_skb) {
2402                 ret = -EINVAL;
2403                 goto unlock;
2404         }
2405
2406         priv->_agn.offchan_tx_skb = NULL;
2407
2408         ret = iwl_scan_cancel_timeout(priv, 200);
2409         if (ret)
2410                 ret = -EIO;
2411 unlock:
2412         mutex_unlock(&priv->mutex);
2413
2414         return ret;
2415 }
2416
2417 /*****************************************************************************
2418  *
2419  * mac80211 entry point functions
2420  *
2421  *****************************************************************************/
2422
2423 /*
2424  * Not a mac80211 entry point function, but it fits in with all the
2425  * other mac80211 functions grouped here.
2426  */
2427 static int iwl_mac_setup_register(struct iwl_priv *priv,
2428                                   struct iwlagn_ucode_capabilities *capa)
2429 {
2430         int ret;
2431         struct ieee80211_hw *hw = priv->hw;
2432         struct iwl_rxon_context *ctx;
2433
2434         hw->rate_control_algorithm = "iwl-agn-rs";
2435
2436         /* Tell mac80211 our characteristics */
2437         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2438                     IEEE80211_HW_AMPDU_AGGREGATION |
2439                     IEEE80211_HW_NEED_DTIM_PERIOD |
2440                     IEEE80211_HW_SPECTRUM_MGMT |
2441                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2442
2443         hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2444
2445         hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2446                      IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2447
2448         if (priv->cfg->sku & IWL_SKU_N)
2449                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2450                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2451
2452         if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2453                 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2454
2455         hw->sta_data_size = sizeof(struct iwl_station_priv);
2456         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2457
2458         for_each_context(priv, ctx) {
2459                 hw->wiphy->interface_modes |= ctx->interface_modes;
2460                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2461         }
2462
2463         hw->wiphy->max_remain_on_channel_duration = 1000;
2464
2465         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2466                             WIPHY_FLAG_DISABLE_BEACON_HINTS |
2467                             WIPHY_FLAG_IBSS_RSN;
2468
2469         /*
2470          * For now, disable PS by default because it affects
2471          * RX performance significantly.
2472          */
2473         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2474
2475         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2476         /* we create the 802.11 header and a zero-length SSID element */
2477         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2478
2479         /* Default value; 4 EDCA QOS priorities */
2480         hw->queues = 4;
2481
2482         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2483
2484         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2485                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2486                         &priv->bands[IEEE80211_BAND_2GHZ];
2487         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2488                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2489                         &priv->bands[IEEE80211_BAND_5GHZ];
2490
2491         iwl_leds_init(priv);
2492
2493         ret = ieee80211_register_hw(priv->hw);
2494         if (ret) {
2495                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2496                 return ret;
2497         }
2498         priv->mac80211_registered = 1;
2499
2500         return 0;
2501 }
2502
2503
2504 static int iwlagn_mac_start(struct ieee80211_hw *hw)
2505 {
2506         struct iwl_priv *priv = hw->priv;
2507         int ret;
2508
2509         IWL_DEBUG_MAC80211(priv, "enter\n");
2510
2511         /* we should be verifying the device is ready to be opened */
2512         mutex_lock(&priv->mutex);
2513         ret = __iwl_up(priv);
2514         mutex_unlock(&priv->mutex);
2515         if (ret)
2516                 return ret;
2517
2518         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2519
2520         /* Now we should be done, and the READY bit should be set. */
2521         if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
2522                 ret = -EIO;
2523
2524         iwlagn_led_enable(priv);
2525
2526         priv->is_open = 1;
2527         IWL_DEBUG_MAC80211(priv, "leave\n");
2528         return 0;
2529 }
2530
2531 static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2532 {
2533         struct iwl_priv *priv = hw->priv;
2534
2535         IWL_DEBUG_MAC80211(priv, "enter\n");
2536
2537         if (!priv->is_open)
2538                 return;
2539
2540         priv->is_open = 0;
2541
2542         iwl_down(priv);
2543
2544         flush_workqueue(priv->workqueue);
2545
2546         /* User space software may expect getting rfkill changes
2547          * even if interface is down */
2548         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2549         iwl_enable_rfkill_int(priv);
2550
2551         IWL_DEBUG_MAC80211(priv, "leave\n");
2552 }
2553
2554 static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2555 {
2556         struct iwl_priv *priv = hw->priv;
2557
2558         IWL_DEBUG_MACDUMP(priv, "enter\n");
2559
2560         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2561                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2562
2563         if (iwlagn_tx_skb(priv, skb))
2564                 dev_kfree_skb_any(skb);
2565
2566         IWL_DEBUG_MACDUMP(priv, "leave\n");
2567 }
2568
2569 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2570                                        struct ieee80211_vif *vif,
2571                                        struct ieee80211_key_conf *keyconf,
2572                                        struct ieee80211_sta *sta,
2573                                        u32 iv32, u16 *phase1key)
2574 {
2575         struct iwl_priv *priv = hw->priv;
2576         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2577
2578         IWL_DEBUG_MAC80211(priv, "enter\n");
2579
2580         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2581                             iv32, phase1key);
2582
2583         IWL_DEBUG_MAC80211(priv, "leave\n");
2584 }
2585
2586 static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2587                               struct ieee80211_vif *vif,
2588                               struct ieee80211_sta *sta,
2589                               struct ieee80211_key_conf *key)
2590 {
2591         struct iwl_priv *priv = hw->priv;
2592         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2593         struct iwl_rxon_context *ctx = vif_priv->ctx;
2594         int ret;
2595         u8 sta_id;
2596         bool is_default_wep_key = false;
2597
2598         IWL_DEBUG_MAC80211(priv, "enter\n");
2599
2600         if (iwlagn_mod_params.sw_crypto) {
2601                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2602                 return -EOPNOTSUPP;
2603         }
2604
2605         /*
2606          * To support IBSS RSN, don't program group keys in IBSS, the
2607          * hardware will then not attempt to decrypt the frames.
2608          */
2609         if (vif->type == NL80211_IFTYPE_ADHOC &&
2610             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2611                 return -EOPNOTSUPP;
2612
2613         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
2614         if (sta_id == IWL_INVALID_STATION)
2615                 return -EINVAL;
2616
2617         mutex_lock(&priv->mutex);
2618         iwl_scan_cancel_timeout(priv, 100);
2619
2620         /*
2621          * If we are getting WEP group key and we didn't receive any key mapping
2622          * so far, we are in legacy wep mode (group key only), otherwise we are
2623          * in 1X mode.
2624          * In legacy wep mode, we use another host command to the uCode.
2625          */
2626         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2627              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2628             !sta) {
2629                 if (cmd == SET_KEY)
2630                         is_default_wep_key = !ctx->key_mapping_keys;
2631                 else
2632                         is_default_wep_key =
2633                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2634         }
2635
2636         switch (cmd) {
2637         case SET_KEY:
2638                 if (is_default_wep_key)
2639                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
2640                 else
2641                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
2642                                                   key, sta_id);
2643
2644                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2645                 break;
2646         case DISABLE_KEY:
2647                 if (is_default_wep_key)
2648                         ret = iwl_remove_default_wep_key(priv, ctx, key);
2649                 else
2650                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
2651
2652                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2653                 break;
2654         default:
2655                 ret = -EINVAL;
2656         }
2657
2658         mutex_unlock(&priv->mutex);
2659         IWL_DEBUG_MAC80211(priv, "leave\n");
2660
2661         return ret;
2662 }
2663
2664 static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
2665                                    struct ieee80211_vif *vif,
2666                                    enum ieee80211_ampdu_mlme_action action,
2667                                    struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2668                                    u8 buf_size)
2669 {
2670         struct iwl_priv *priv = hw->priv;
2671         int ret = -EINVAL;
2672         struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
2673
2674         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2675                      sta->addr, tid);
2676
2677         if (!(priv->cfg->sku & IWL_SKU_N))
2678                 return -EACCES;
2679
2680         mutex_lock(&priv->mutex);
2681
2682         switch (action) {
2683         case IEEE80211_AMPDU_RX_START:
2684                 IWL_DEBUG_HT(priv, "start Rx\n");
2685                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
2686                 break;
2687         case IEEE80211_AMPDU_RX_STOP:
2688                 IWL_DEBUG_HT(priv, "stop Rx\n");
2689                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
2690                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2691                         ret = 0;
2692                 break;
2693         case IEEE80211_AMPDU_TX_START:
2694                 IWL_DEBUG_HT(priv, "start Tx\n");
2695                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
2696                 if (ret == 0) {
2697                         priv->_agn.agg_tids_count++;
2698                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2699                                      priv->_agn.agg_tids_count);
2700                 }
2701                 break;
2702         case IEEE80211_AMPDU_TX_STOP:
2703                 IWL_DEBUG_HT(priv, "stop Tx\n");
2704                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
2705                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2706                         priv->_agn.agg_tids_count--;
2707                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2708                                      priv->_agn.agg_tids_count);
2709                 }
2710                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2711                         ret = 0;
2712                 if (priv->cfg->ht_params &&
2713                     priv->cfg->ht_params->use_rts_for_aggregation) {
2714                         struct iwl_station_priv *sta_priv =
2715                                 (void *) sta->drv_priv;
2716                         /*
2717                          * switch off RTS/CTS if it was previously enabled
2718                          */
2719
2720                         sta_priv->lq_sta.lq.general_params.flags &=
2721                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
2722                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2723                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
2724                 }
2725                 break;
2726         case IEEE80211_AMPDU_TX_OPERATIONAL:
2727                 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
2728
2729                 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
2730
2731                 /*
2732                  * If the limit is 0, then it wasn't initialised yet,
2733                  * use the default. We can do that since we take the
2734                  * minimum below, and we don't want to go above our
2735                  * default due to hardware restrictions.
2736                  */
2737                 if (sta_priv->max_agg_bufsize == 0)
2738                         sta_priv->max_agg_bufsize =
2739                                 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2740
2741                 /*
2742                  * Even though in theory the peer could have different
2743                  * aggregation reorder buffer sizes for different sessions,
2744                  * our ucode doesn't allow for that and has a global limit
2745                  * for each station. Therefore, use the minimum of all the
2746                  * aggregation sessions and our default value.
2747                  */
2748                 sta_priv->max_agg_bufsize =
2749                         min(sta_priv->max_agg_bufsize, buf_size);
2750
2751                 if (priv->cfg->ht_params &&
2752                     priv->cfg->ht_params->use_rts_for_aggregation) {
2753                         /*
2754                          * switch to RTS/CTS if it is the prefer protection
2755                          * method for HT traffic
2756                          */
2757
2758                         sta_priv->lq_sta.lq.general_params.flags |=
2759                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
2760                 }
2761
2762                 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
2763                         sta_priv->max_agg_bufsize;
2764
2765                 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2766                                 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
2767                 ret = 0;
2768                 break;
2769         }
2770         mutex_unlock(&priv->mutex);
2771
2772         return ret;
2773 }
2774
2775 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
2776                               struct ieee80211_vif *vif,
2777                               struct ieee80211_sta *sta)
2778 {
2779         struct iwl_priv *priv = hw->priv;
2780         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2781         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2782         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2783         int ret;
2784         u8 sta_id;
2785
2786         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
2787                         sta->addr);
2788         mutex_lock(&priv->mutex);
2789         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
2790                         sta->addr);
2791         sta_priv->common.sta_id = IWL_INVALID_STATION;
2792
2793         atomic_set(&sta_priv->pending_frames, 0);
2794         if (vif->type == NL80211_IFTYPE_AP)
2795                 sta_priv->client = true;
2796
2797         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
2798                                      is_ap, sta, &sta_id);
2799         if (ret) {
2800                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
2801                         sta->addr, ret);
2802                 /* Should we return success if return code is EEXIST ? */
2803                 mutex_unlock(&priv->mutex);
2804                 return ret;
2805         }
2806
2807         sta_priv->common.sta_id = sta_id;
2808
2809         /* Initialize rate scaling */
2810         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
2811                        sta->addr);
2812         iwl_rs_rate_init(priv, sta, sta_id);
2813         mutex_unlock(&priv->mutex);
2814
2815         return 0;
2816 }
2817
2818 static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
2819                                 struct ieee80211_channel_switch *ch_switch)
2820 {
2821         struct iwl_priv *priv = hw->priv;
2822         const struct iwl_channel_info *ch_info;
2823         struct ieee80211_conf *conf = &hw->conf;
2824         struct ieee80211_channel *channel = ch_switch->channel;
2825         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2826         /*
2827          * MULTI-FIXME
2828          * When we add support for multiple interfaces, we need to
2829          * revisit this. The channel switch command in the device
2830          * only affects the BSS context, but what does that really
2831          * mean? And what if we get a CSA on the second interface?
2832          * This needs a lot of work.
2833          */
2834         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2835         u16 ch;
2836         unsigned long flags = 0;
2837
2838         IWL_DEBUG_MAC80211(priv, "enter\n");
2839
2840         mutex_lock(&priv->mutex);
2841
2842         if (iwl_is_rfkill(priv))
2843                 goto out;
2844
2845         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2846             test_bit(STATUS_SCANNING, &priv->status) ||
2847             test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
2848                 goto out;
2849
2850         if (!iwl_is_associated_ctx(ctx))
2851                 goto out;
2852
2853         if (priv->cfg->ops->lib->set_channel_switch) {
2854
2855                 ch = channel->hw_value;
2856                 if (le16_to_cpu(ctx->active.channel) != ch) {
2857                         ch_info = iwl_get_channel_info(priv,
2858                                                        channel->band,
2859                                                        ch);
2860                         if (!is_channel_valid(ch_info)) {
2861                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
2862                                 goto out;
2863                         }
2864                         spin_lock_irqsave(&priv->lock, flags);
2865
2866                         priv->current_ht_config.smps = conf->smps_mode;
2867
2868                         /* Configure HT40 channels */
2869                         ctx->ht.enabled = conf_is_ht(conf);
2870                         if (ctx->ht.enabled) {
2871                                 if (conf_is_ht40_minus(conf)) {
2872                                         ctx->ht.extension_chan_offset =
2873                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2874                                         ctx->ht.is_40mhz = true;
2875                                 } else if (conf_is_ht40_plus(conf)) {
2876                                         ctx->ht.extension_chan_offset =
2877                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2878                                         ctx->ht.is_40mhz = true;
2879                                 } else {
2880                                         ctx->ht.extension_chan_offset =
2881                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2882                                         ctx->ht.is_40mhz = false;
2883                                 }
2884                         } else
2885                                 ctx->ht.is_40mhz = false;
2886
2887                         if ((le16_to_cpu(ctx->staging.channel) != ch))
2888                                 ctx->staging.flags = 0;
2889
2890                         iwl_set_rxon_channel(priv, channel, ctx);
2891                         iwl_set_rxon_ht(priv, ht_conf);
2892                         iwl_set_flags_for_band(priv, ctx, channel->band,
2893                                                ctx->vif);
2894                         spin_unlock_irqrestore(&priv->lock, flags);
2895
2896                         iwl_set_rate(priv);
2897                         /*
2898                          * at this point, staging_rxon has the
2899                          * configuration for channel switch
2900                          */
2901                         set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
2902                         priv->switch_channel = cpu_to_le16(ch);
2903                         if (priv->cfg->ops->lib->set_channel_switch(priv,
2904                                                                     ch_switch)) {
2905                                 clear_bit(STATUS_CHANNEL_SWITCH_PENDING,
2906                                           &priv->status);
2907                                 priv->switch_channel = 0;
2908                                 ieee80211_chswitch_done(ctx->vif, false);
2909                         }
2910                 }
2911         }
2912 out:
2913         mutex_unlock(&priv->mutex);
2914         IWL_DEBUG_MAC80211(priv, "leave\n");
2915 }
2916
2917 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
2918                                     unsigned int changed_flags,
2919                                     unsigned int *total_flags,
2920                                     u64 multicast)
2921 {
2922         struct iwl_priv *priv = hw->priv;
2923         __le32 filter_or = 0, filter_nand = 0;
2924         struct iwl_rxon_context *ctx;
2925
2926 #define CHK(test, flag) do { \
2927         if (*total_flags & (test))              \
2928                 filter_or |= (flag);            \
2929         else                                    \
2930                 filter_nand |= (flag);          \
2931         } while (0)
2932
2933         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
2934                         changed_flags, *total_flags);
2935
2936         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
2937         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
2938         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
2939         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
2940
2941 #undef CHK
2942
2943         mutex_lock(&priv->mutex);
2944
2945         for_each_context(priv, ctx) {
2946                 ctx->staging.filter_flags &= ~filter_nand;
2947                 ctx->staging.filter_flags |= filter_or;
2948
2949                 /*
2950                  * Not committing directly because hardware can perform a scan,
2951                  * but we'll eventually commit the filter flags change anyway.
2952                  */
2953         }
2954
2955         mutex_unlock(&priv->mutex);
2956
2957         /*
2958          * Receiving all multicast frames is always enabled by the
2959          * default flags setup in iwl_connection_init_rx_config()
2960          * since we currently do not support programming multicast
2961          * filters into the device.
2962          */
2963         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
2964                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
2965 }
2966
2967 static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
2968 {
2969         struct iwl_priv *priv = hw->priv;
2970
2971         mutex_lock(&priv->mutex);
2972         IWL_DEBUG_MAC80211(priv, "enter\n");
2973
2974         /* do not support "flush" */
2975         if (!priv->cfg->ops->lib->txfifo_flush)
2976                 goto done;
2977
2978         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2979                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
2980                 goto done;
2981         }
2982         if (iwl_is_rfkill(priv)) {
2983                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
2984                 goto done;
2985         }
2986
2987         /*
2988          * mac80211 will not push any more frames for transmit
2989          * until the flush is completed
2990          */
2991         if (drop) {
2992                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
2993                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
2994                         IWL_ERR(priv, "flush request fail\n");
2995                         goto done;
2996                 }
2997         }
2998         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
2999         iwlagn_wait_tx_queue_empty(priv);
3000 done:
3001         mutex_unlock(&priv->mutex);
3002         IWL_DEBUG_MAC80211(priv, "leave\n");
3003 }
3004
3005 static void iwlagn_disable_roc(struct iwl_priv *priv)
3006 {
3007         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3008         struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3009
3010         lockdep_assert_held(&priv->mutex);
3011
3012         if (!ctx->is_active)
3013                 return;
3014
3015         ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3016         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3017         iwl_set_rxon_channel(priv, chan, ctx);
3018         iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3019
3020         priv->_agn.hw_roc_channel = NULL;
3021
3022         iwlcore_commit_rxon(priv, ctx);
3023
3024         ctx->is_active = false;
3025 }
3026
3027 static void iwlagn_bg_roc_done(struct work_struct *work)
3028 {
3029         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3030                                              _agn.hw_roc_work.work);
3031
3032         mutex_lock(&priv->mutex);
3033         ieee80211_remain_on_channel_expired(priv->hw);
3034         iwlagn_disable_roc(priv);
3035         mutex_unlock(&priv->mutex);
3036 }
3037
3038 static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3039                                      struct ieee80211_channel *channel,
3040                                      enum nl80211_channel_type channel_type,
3041                                      int duration)
3042 {
3043         struct iwl_priv *priv = hw->priv;
3044         int err = 0;
3045
3046         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3047                 return -EOPNOTSUPP;
3048
3049         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3050                                         BIT(NL80211_IFTYPE_P2P_CLIENT)))
3051                 return -EOPNOTSUPP;
3052
3053         mutex_lock(&priv->mutex);
3054
3055         if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3056             test_bit(STATUS_SCAN_HW, &priv->status)) {
3057                 err = -EBUSY;
3058                 goto out;
3059         }
3060
3061         priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3062         priv->_agn.hw_roc_channel = channel;
3063         priv->_agn.hw_roc_chantype = channel_type;
3064         priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3065         iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3066         queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3067                            msecs_to_jiffies(duration + 20));
3068
3069         msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3070         ieee80211_ready_on_channel(priv->hw);
3071
3072  out:
3073         mutex_unlock(&priv->mutex);
3074
3075         return err;
3076 }
3077
3078 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3079 {
3080         struct iwl_priv *priv = hw->priv;
3081
3082         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3083                 return -EOPNOTSUPP;
3084
3085         cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3086
3087         mutex_lock(&priv->mutex);
3088         iwlagn_disable_roc(priv);
3089         mutex_unlock(&priv->mutex);
3090
3091         return 0;
3092 }
3093
3094 /*****************************************************************************
3095  *
3096  * driver setup and teardown
3097  *
3098  *****************************************************************************/
3099
3100 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3101 {
3102         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3103
3104         init_waitqueue_head(&priv->wait_command_queue);
3105
3106         INIT_WORK(&priv->restart, iwl_bg_restart);
3107         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3108         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3109         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3110         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3111         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3112         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3113         INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3114
3115         iwl_setup_scan_deferred_work(priv);
3116
3117         if (priv->cfg->ops->lib->setup_deferred_work)
3118                 priv->cfg->ops->lib->setup_deferred_work(priv);
3119
3120         init_timer(&priv->statistics_periodic);
3121         priv->statistics_periodic.data = (unsigned long)priv;
3122         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3123
3124         init_timer(&priv->ucode_trace);
3125         priv->ucode_trace.data = (unsigned long)priv;
3126         priv->ucode_trace.function = iwl_bg_ucode_trace;
3127
3128         init_timer(&priv->watchdog);
3129         priv->watchdog.data = (unsigned long)priv;
3130         priv->watchdog.function = iwl_bg_watchdog;
3131
3132         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3133                 iwl_irq_tasklet, (unsigned long)priv);
3134 }
3135
3136 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3137 {
3138         if (priv->cfg->ops->lib->cancel_deferred_work)
3139                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3140
3141         cancel_work_sync(&priv->run_time_calib_work);
3142         cancel_work_sync(&priv->beacon_update);
3143
3144         iwl_cancel_scan_deferred_work(priv);
3145
3146         cancel_work_sync(&priv->bt_full_concurrency);
3147         cancel_work_sync(&priv->bt_runtime_config);
3148
3149         del_timer_sync(&priv->statistics_periodic);
3150         del_timer_sync(&priv->ucode_trace);
3151 }
3152
3153 static void iwl_init_hw_rates(struct iwl_priv *priv,
3154                               struct ieee80211_rate *rates)
3155 {
3156         int i;
3157
3158         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3159                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3160                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3161                 rates[i].hw_value_short = i;
3162                 rates[i].flags = 0;
3163                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3164                         /*
3165                          * If CCK != 1M then set short preamble rate flag.
3166                          */
3167                         rates[i].flags |=
3168                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3169                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3170                 }
3171         }
3172 }
3173
3174 static int iwl_init_drv(struct iwl_priv *priv)
3175 {
3176         int ret;
3177
3178         spin_lock_init(&priv->sta_lock);
3179         spin_lock_init(&priv->hcmd_lock);
3180
3181         mutex_init(&priv->mutex);
3182
3183         priv->ieee_channels = NULL;
3184         priv->ieee_rates = NULL;
3185         priv->band = IEEE80211_BAND_2GHZ;
3186
3187         priv->iw_mode = NL80211_IFTYPE_STATION;
3188         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3189         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3190         priv->_agn.agg_tids_count = 0;
3191
3192         /* initialize force reset */
3193         priv->force_reset[IWL_RF_RESET].reset_duration =
3194                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3195         priv->force_reset[IWL_FW_RESET].reset_duration =
3196                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3197
3198         priv->rx_statistics_jiffies = jiffies;
3199
3200         /* Choose which receivers/antennas to use */
3201         if (priv->cfg->ops->hcmd->set_rxon_chain)
3202                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3203                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3204
3205         iwl_init_scan_params(priv);
3206
3207         /* init bt coex */
3208         if (priv->cfg->bt_params &&
3209             priv->cfg->bt_params->advanced_bt_coexist) {
3210                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3211                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3212                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3213                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3214                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3215                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3216         }
3217
3218         ret = iwl_init_channel_map(priv);
3219         if (ret) {
3220                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3221                 goto err;
3222         }
3223
3224         ret = iwlcore_init_geos(priv);
3225         if (ret) {
3226                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3227                 goto err_free_channel_map;
3228         }
3229         iwl_init_hw_rates(priv, priv->ieee_rates);
3230
3231         return 0;
3232
3233 err_free_channel_map:
3234         iwl_free_channel_map(priv);
3235 err:
3236         return ret;
3237 }
3238
3239 static void iwl_uninit_drv(struct iwl_priv *priv)
3240 {
3241         iwl_calib_free_results(priv);
3242         iwlcore_free_geos(priv);
3243         iwl_free_channel_map(priv);
3244         kfree(priv->scan_cmd);
3245         kfree(priv->beacon_cmd);
3246 }
3247
3248 struct ieee80211_ops iwlagn_hw_ops = {
3249         .tx = iwlagn_mac_tx,
3250         .start = iwlagn_mac_start,
3251         .stop = iwlagn_mac_stop,
3252         .add_interface = iwl_mac_add_interface,
3253         .remove_interface = iwl_mac_remove_interface,
3254         .change_interface = iwl_mac_change_interface,
3255         .config = iwlagn_mac_config,
3256         .configure_filter = iwlagn_configure_filter,
3257         .set_key = iwlagn_mac_set_key,
3258         .update_tkip_key = iwlagn_mac_update_tkip_key,
3259         .conf_tx = iwl_mac_conf_tx,
3260         .bss_info_changed = iwlagn_bss_info_changed,
3261         .ampdu_action = iwlagn_mac_ampdu_action,
3262         .hw_scan = iwl_mac_hw_scan,
3263         .sta_notify = iwlagn_mac_sta_notify,
3264         .sta_add = iwlagn_mac_sta_add,
3265         .sta_remove = iwl_mac_sta_remove,
3266         .channel_switch = iwlagn_mac_channel_switch,
3267         .flush = iwlagn_mac_flush,
3268         .tx_last_beacon = iwl_mac_tx_last_beacon,
3269         .remain_on_channel = iwl_mac_remain_on_channel,
3270         .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3271         .offchannel_tx = iwl_mac_offchannel_tx,
3272         .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3273         CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
3274 };
3275
3276 static u32 iwl_hw_detect(struct iwl_priv *priv)
3277 {
3278         u8 rev_id;
3279
3280         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
3281         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
3282         return iwl_read32(priv, CSR_HW_REV);
3283 }
3284
3285 static int iwl_set_hw_params(struct iwl_priv *priv)
3286 {
3287         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3288         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3289         if (iwlagn_mod_params.amsdu_size_8K)
3290                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3291         else
3292                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3293
3294         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3295
3296         if (iwlagn_mod_params.disable_11n)
3297                 priv->cfg->sku &= ~IWL_SKU_N;
3298
3299         /* Device-specific setup */
3300         return priv->cfg->ops->lib->set_hw_params(priv);
3301 }
3302
3303 static const u8 iwlagn_bss_ac_to_fifo[] = {
3304         IWL_TX_FIFO_VO,
3305         IWL_TX_FIFO_VI,
3306         IWL_TX_FIFO_BE,
3307         IWL_TX_FIFO_BK,
3308 };
3309
3310 static const u8 iwlagn_bss_ac_to_queue[] = {
3311         0, 1, 2, 3,
3312 };
3313
3314 static const u8 iwlagn_pan_ac_to_fifo[] = {
3315         IWL_TX_FIFO_VO_IPAN,
3316         IWL_TX_FIFO_VI_IPAN,
3317         IWL_TX_FIFO_BE_IPAN,
3318         IWL_TX_FIFO_BK_IPAN,
3319 };
3320
3321 static const u8 iwlagn_pan_ac_to_queue[] = {
3322         7, 6, 5, 4,
3323 };
3324
3325 /* This function both allocates and initializes hw and priv. */
3326 static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
3327 {
3328         struct iwl_priv *priv;
3329         /* mac80211 allocates memory for this device instance, including
3330          *   space for this driver's private structure */
3331         struct ieee80211_hw *hw;
3332
3333         hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
3334         if (hw == NULL) {
3335                 pr_err("%s: Can not allocate network device\n",
3336                        cfg->name);
3337                 goto out;
3338         }
3339
3340         priv = hw->priv;
3341         priv->hw = hw;
3342
3343 out:
3344         return hw;
3345 }
3346
3347 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3348 {
3349         int err = 0, i;
3350         struct iwl_priv *priv;
3351         struct ieee80211_hw *hw;
3352         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3353         unsigned long flags;
3354         u16 pci_cmd, num_mac;
3355         u32 hw_rev;
3356
3357         /************************
3358          * 1. Allocating HW data
3359          ************************/
3360
3361         hw = iwl_alloc_all(cfg);
3362         if (!hw) {
3363                 err = -ENOMEM;
3364                 goto out;
3365         }
3366         priv = hw->priv;
3367         /* At this point both hw and priv are allocated. */
3368
3369         priv->ucode_type = UCODE_SUBTYPE_NONE_LOADED;
3370
3371         /*
3372          * The default context is always valid,
3373          * more may be discovered when firmware
3374          * is loaded.
3375          */
3376         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3377
3378         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3379                 priv->contexts[i].ctxid = i;
3380
3381         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3382         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3383         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3384         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3385         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3386         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3387         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3388         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3389         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3390         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3391         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3392                 BIT(NL80211_IFTYPE_ADHOC);
3393         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3394                 BIT(NL80211_IFTYPE_STATION);
3395         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3396         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3397         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3398         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3399
3400         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3401         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3402         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3403         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3404         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3405         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3406         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3407         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3408         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3409         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3410         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3411         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3412                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3413 #ifdef CONFIG_IWL_P2P
3414         priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3415                 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3416 #endif
3417         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3418         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3419         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3420
3421         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3422
3423         SET_IEEE80211_DEV(hw, &pdev->dev);
3424
3425         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3426         priv->cfg = cfg;
3427         priv->pci_dev = pdev;
3428         priv->inta_mask = CSR_INI_SET_MASK;
3429
3430         /* is antenna coupling more than 35dB ? */
3431         priv->bt_ant_couple_ok =
3432                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3433                 true : false;
3434
3435         /* enable/disable bt channel inhibition */
3436         priv->bt_ch_announce = iwlagn_bt_ch_announce;
3437         IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3438                        (priv->bt_ch_announce) ? "On" : "Off");
3439
3440         if (iwl_alloc_traffic_mem(priv))
3441                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3442
3443         /**************************
3444          * 2. Initializing PCI bus
3445          **************************/
3446         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3447                                 PCIE_LINK_STATE_CLKPM);
3448
3449         if (pci_enable_device(pdev)) {
3450                 err = -ENODEV;
3451                 goto out_ieee80211_free_hw;
3452         }
3453
3454         pci_set_master(pdev);
3455
3456         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3457         if (!err)
3458                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3459         if (err) {
3460                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3461                 if (!err)
3462                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3463                 /* both attempts failed: */
3464                 if (err) {
3465                         IWL_WARN(priv, "No suitable DMA available.\n");
3466                         goto out_pci_disable_device;
3467                 }
3468         }
3469
3470         err = pci_request_regions(pdev, DRV_NAME);
3471         if (err)
3472                 goto out_pci_disable_device;
3473
3474         pci_set_drvdata(pdev, priv);
3475
3476
3477         /***********************
3478          * 3. Read REV register
3479          ***********************/
3480         priv->hw_base = pci_iomap(pdev, 0, 0);
3481         if (!priv->hw_base) {
3482                 err = -ENODEV;
3483                 goto out_pci_release_regions;
3484         }
3485
3486         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3487                 (unsigned long long) pci_resource_len(pdev, 0));
3488         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3489
3490         /* these spin locks will be used in apm_ops.init and EEPROM access
3491          * we should init now
3492          */
3493         spin_lock_init(&priv->reg_lock);
3494         spin_lock_init(&priv->lock);
3495
3496         /*
3497          * stop and reset the on-board processor just in case it is in a
3498          * strange state ... like being left stranded by a primary kernel
3499          * and this is now the kdump kernel trying to start up
3500          */
3501         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3502
3503         hw_rev = iwl_hw_detect(priv);
3504         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3505                 priv->cfg->name, hw_rev);
3506
3507         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3508          * PCI Tx retries from interfering with C3 CPU state */
3509         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3510
3511         if (iwl_prepare_card_hw(priv)) {
3512                 IWL_WARN(priv, "Failed, HW not ready\n");
3513                 goto out_iounmap;
3514         }
3515
3516         /*****************
3517          * 4. Read EEPROM
3518          *****************/
3519         /* Read the EEPROM */
3520         err = iwl_eeprom_init(priv, hw_rev);
3521         if (err) {
3522                 IWL_ERR(priv, "Unable to init EEPROM\n");
3523                 goto out_iounmap;
3524         }
3525         err = iwl_eeprom_check_version(priv);
3526         if (err)
3527                 goto out_free_eeprom;
3528
3529         err = iwl_eeprom_check_sku(priv);
3530         if (err)
3531                 goto out_free_eeprom;
3532
3533         /* extract MAC Address */
3534         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3535         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3536         priv->hw->wiphy->addresses = priv->addresses;
3537         priv->hw->wiphy->n_addresses = 1;
3538         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3539         if (num_mac > 1) {
3540                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3541                        ETH_ALEN);
3542                 priv->addresses[1].addr[5]++;
3543                 priv->hw->wiphy->n_addresses++;
3544         }
3545
3546         /************************
3547          * 5. Setup HW constants
3548          ************************/
3549         if (iwl_set_hw_params(priv)) {
3550                 IWL_ERR(priv, "failed to set hw parameters\n");
3551                 goto out_free_eeprom;
3552         }
3553
3554         /*******************
3555          * 6. Setup priv
3556          *******************/
3557
3558         err = iwl_init_drv(priv);
3559         if (err)
3560                 goto out_free_eeprom;
3561         /* At this point both hw and priv are initialized. */
3562
3563         /********************
3564          * 7. Setup services
3565          ********************/
3566         spin_lock_irqsave(&priv->lock, flags);
3567         iwl_disable_interrupts(priv);
3568         spin_unlock_irqrestore(&priv->lock, flags);
3569
3570         pci_enable_msi(priv->pci_dev);
3571
3572         iwl_alloc_isr_ict(priv);
3573
3574         err = request_irq(priv->pci_dev->irq, iwl_isr_ict,
3575                           IRQF_SHARED, DRV_NAME, priv);
3576         if (err) {
3577                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3578                 goto out_disable_msi;
3579         }
3580
3581         iwl_setup_deferred_work(priv);
3582         iwl_setup_rx_handlers(priv);
3583         iwl_testmode_init(priv);
3584
3585         /*********************************************
3586          * 8. Enable interrupts and read RFKILL state
3587          *********************************************/
3588
3589         /* enable rfkill interrupt: hw bug w/a */
3590         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3591         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3592                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3593                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3594         }
3595
3596         iwl_enable_rfkill_int(priv);
3597
3598         /* If platform's RF_KILL switch is NOT set to KILL */
3599         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3600                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3601         else
3602                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3603
3604         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3605                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3606
3607         iwl_power_initialize(priv);
3608         iwl_tt_initialize(priv);
3609
3610         init_completion(&priv->_agn.firmware_loading_complete);
3611
3612         err = iwl_request_firmware(priv, true);
3613         if (err)
3614                 goto out_destroy_workqueue;
3615
3616         return 0;
3617
3618  out_destroy_workqueue:
3619         destroy_workqueue(priv->workqueue);
3620         priv->workqueue = NULL;
3621         free_irq(priv->pci_dev->irq, priv);
3622         iwl_free_isr_ict(priv);
3623  out_disable_msi:
3624         pci_disable_msi(priv->pci_dev);
3625         iwl_uninit_drv(priv);
3626  out_free_eeprom:
3627         iwl_eeprom_free(priv);
3628  out_iounmap:
3629         pci_iounmap(pdev, priv->hw_base);
3630  out_pci_release_regions:
3631         pci_set_drvdata(pdev, NULL);
3632         pci_release_regions(pdev);
3633  out_pci_disable_device:
3634         pci_disable_device(pdev);
3635  out_ieee80211_free_hw:
3636         iwl_free_traffic_mem(priv);
3637         ieee80211_free_hw(priv->hw);
3638  out:
3639         return err;
3640 }
3641
3642 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3643 {
3644         struct iwl_priv *priv = pci_get_drvdata(pdev);
3645         unsigned long flags;
3646
3647         if (!priv)
3648                 return;
3649
3650         wait_for_completion(&priv->_agn.firmware_loading_complete);
3651
3652         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3653
3654         iwl_dbgfs_unregister(priv);
3655         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3656
3657         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3658          * to be called and iwl_down since we are removing the device
3659          * we need to set STATUS_EXIT_PENDING bit.
3660          */
3661         set_bit(STATUS_EXIT_PENDING, &priv->status);
3662
3663         iwl_testmode_cleanup(priv);
3664         iwl_leds_exit(priv);
3665
3666         if (priv->mac80211_registered) {
3667                 ieee80211_unregister_hw(priv->hw);
3668                 priv->mac80211_registered = 0;
3669         }
3670
3671         /* Reset to low power before unloading driver. */
3672         iwl_apm_stop(priv);
3673
3674         iwl_tt_exit(priv);
3675
3676         /* make sure we flush any pending irq or
3677          * tasklet for the driver
3678          */
3679         spin_lock_irqsave(&priv->lock, flags);
3680         iwl_disable_interrupts(priv);
3681         spin_unlock_irqrestore(&priv->lock, flags);
3682
3683         iwl_synchronize_irq(priv);
3684
3685         iwl_dealloc_ucode_pci(priv);
3686
3687         if (priv->rxq.bd)
3688                 iwlagn_rx_queue_free(priv, &priv->rxq);
3689         iwlagn_hw_txq_ctx_free(priv);
3690
3691         iwl_eeprom_free(priv);
3692
3693
3694         /*netif_stop_queue(dev); */
3695         flush_workqueue(priv->workqueue);
3696
3697         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3698          * priv->workqueue... so we can't take down the workqueue
3699          * until now... */
3700         destroy_workqueue(priv->workqueue);
3701         priv->workqueue = NULL;
3702         iwl_free_traffic_mem(priv);
3703
3704         free_irq(priv->pci_dev->irq, priv);
3705         pci_disable_msi(priv->pci_dev);
3706         pci_iounmap(pdev, priv->hw_base);
3707         pci_release_regions(pdev);
3708         pci_disable_device(pdev);
3709         pci_set_drvdata(pdev, NULL);
3710
3711         iwl_uninit_drv(priv);
3712
3713         iwl_free_isr_ict(priv);
3714
3715         dev_kfree_skb(priv->beacon_skb);
3716
3717         ieee80211_free_hw(priv->hw);
3718 }
3719
3720
3721 /*****************************************************************************
3722  *
3723  * driver and module entry point
3724  *
3725  *****************************************************************************/
3726
3727 /* Hardware specific file defines the PCI IDs table for that hardware module */
3728 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3729         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3730         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3731         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3732         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3733         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3734         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3735         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3736         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3737         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3738         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3739         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3740         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3741         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3742         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3743         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3744         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3745         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3746         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3747         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3748         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3749         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3750         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3751         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3752         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3753
3754 /* 5300 Series WiFi */
3755         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3756         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3757         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3758         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3759         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3760         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3761         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3762         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3763         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3764         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3765         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3766         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3767
3768 /* 5350 Series WiFi/WiMax */
3769         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3770         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3771         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3772
3773 /* 5150 Series Wifi/WiMax */
3774         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3775         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3776         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3777         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3778         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3779         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3780
3781         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3782         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3783         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3784         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3785
3786 /* 6x00 Series */
3787         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3788         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3789         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3790         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3791         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3792         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3793         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3794         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3795         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3796         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3797
3798 /* 6x05 Series */
3799         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
3800         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
3801         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
3802         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
3803         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
3804         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
3805         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
3806
3807 /* 6x30 Series */
3808         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
3809         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
3810         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
3811         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
3812         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
3813         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
3814         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
3815         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
3816         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
3817         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
3818         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
3819         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
3820         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
3821         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
3822         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
3823         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
3824
3825 /* 6x50 WiFi/WiMax Series */
3826         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3827         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3828         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3829         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3830         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3831         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3832
3833 /* 6150 WiFi/WiMax Series */
3834         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
3835         {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
3836         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
3837         {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
3838         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
3839         {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
3840
3841 /* 1000 Series WiFi */
3842         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3843         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3844         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3845         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3846         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3847         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3848         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3849         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3850         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3851         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3852         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3853         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3854
3855 /* 100 Series WiFi */
3856         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
3857         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
3858         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
3859         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
3860         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
3861         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
3862
3863 /* 130 Series WiFi */
3864         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
3865         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
3866         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
3867         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
3868         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
3869         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
3870
3871 /* 2x00 Series */
3872         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
3873         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
3874         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
3875         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
3876         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
3877         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
3878
3879 /* 2x30 Series */
3880         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
3881         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
3882         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
3883         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
3884         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
3885         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
3886
3887 /* 6x35 Series */
3888         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
3889         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
3890         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
3891         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
3892         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
3893         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
3894         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
3895         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
3896         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
3897
3898 /* 105 Series */
3899         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
3900         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
3901         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
3902         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
3903         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
3904         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
3905
3906 /* 135 Series */
3907         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
3908         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
3909         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
3910         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
3911         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
3912         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
3913
3914         {0}
3915 };
3916 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3917
3918 static struct pci_driver iwl_driver = {
3919         .name = DRV_NAME,
3920         .id_table = iwl_hw_card_ids,
3921         .probe = iwl_pci_probe,
3922         .remove = __devexit_p(iwl_pci_remove),
3923         .driver.pm = IWL_PM_OPS,
3924 };
3925
3926 static int __init iwl_init(void)
3927 {
3928
3929         int ret;
3930         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3931         pr_info(DRV_COPYRIGHT "\n");
3932
3933         ret = iwlagn_rate_control_register();
3934         if (ret) {
3935                 pr_err("Unable to register rate control algorithm: %d\n", ret);
3936                 return ret;
3937         }
3938
3939         ret = pci_register_driver(&iwl_driver);
3940         if (ret) {
3941                 pr_err("Unable to initialize PCI module\n");
3942                 goto error_register;
3943         }
3944
3945         return ret;
3946
3947 error_register:
3948         iwlagn_rate_control_unregister();
3949         return ret;
3950 }
3951
3952 static void __exit iwl_exit(void)
3953 {
3954         pci_unregister_driver(&iwl_driver);
3955         iwlagn_rate_control_unregister();
3956 }
3957
3958 module_exit(iwl_exit);
3959 module_init(iwl_init);
3960
3961 #ifdef CONFIG_IWLWIFI_DEBUG
3962 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3963 MODULE_PARM_DESC(debug, "debug output mask");
3964 #endif
3965
3966 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3967 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3968 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3969 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3970 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3971 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3972 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3973                    int, S_IRUGO);
3974 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3975 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3976 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3977
3978 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
3979                    S_IRUGO);
3980 MODULE_PARM_DESC(ucode_alternative,
3981                  "specify ucode alternative to use from ucode file");
3982
3983 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
3984 MODULE_PARM_DESC(antenna_coupling,
3985                  "specify antenna coupling in dB (defualt: 0 dB)");
3986
3987 module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
3988 MODULE_PARM_DESC(bt_ch_inhibition,
3989                  "Disable BT channel inhibition (default: enable)");
3990
3991 module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
3992 MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
3993
3994 module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
3995 MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");