drivers/net/wireless/iwlwifi/iwl-agn-lib.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29 #include <linux/etherdevice.h>
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-helpers.h"
  39 #include "iwl-agn-hw.h"
  40 #include "iwl-agn.h"
  41 #include "iwl-sta.h"
  42 #include "iwl-trans.h"
  43
  44 static inline u32 iwlagn_get_scd_ssn(struct iwlagn_tx_resp *tx_resp)
  45 {
  46         return le32_to_cpup((__le32 *)&tx_resp->status +
  47                             tx_resp->frame_count) & MAX_SN;
  48 }
  49
  50 static void iwlagn_count_tx_err_status(struct iwl_priv *priv, u16 status)
  51 {
  52         status &= TX_STATUS_MSK;
  53
  54         switch (status) {
  55         case TX_STATUS_POSTPONE_DELAY:
  56                 priv->_agn.reply_tx_stats.pp_delay++;
  57                 break;
  58         case TX_STATUS_POSTPONE_FEW_BYTES:
  59                 priv->_agn.reply_tx_stats.pp_few_bytes++;
  60                 break;
  61         case TX_STATUS_POSTPONE_BT_PRIO:
  62                 priv->_agn.reply_tx_stats.pp_bt_prio++;
  63                 break;
  64         case TX_STATUS_POSTPONE_QUIET_PERIOD:
  65                 priv->_agn.reply_tx_stats.pp_quiet_period++;
  66                 break;
  67         case TX_STATUS_POSTPONE_CALC_TTAK:
  68                 priv->_agn.reply_tx_stats.pp_calc_ttak++;
  69                 break;
  70         case TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY:
  71                 priv->_agn.reply_tx_stats.int_crossed_retry++;
  72                 break;
  73         case TX_STATUS_FAIL_SHORT_LIMIT:
  74                 priv->_agn.reply_tx_stats.short_limit++;
  75                 break;
  76         case TX_STATUS_FAIL_LONG_LIMIT:
  77                 priv->_agn.reply_tx_stats.long_limit++;
  78                 break;
  79         case TX_STATUS_FAIL_FIFO_UNDERRUN:
  80                 priv->_agn.reply_tx_stats.fifo_underrun++;
  81                 break;
  82         case TX_STATUS_FAIL_DRAIN_FLOW:
  83                 priv->_agn.reply_tx_stats.drain_flow++;
  84                 break;
  85         case TX_STATUS_FAIL_RFKILL_FLUSH:
  86                 priv->_agn.reply_tx_stats.rfkill_flush++;
  87                 break;
  88         case TX_STATUS_FAIL_LIFE_EXPIRE:
  89                 priv->_agn.reply_tx_stats.life_expire++;
  90                 break;
  91         case TX_STATUS_FAIL_DEST_PS:
  92                 priv->_agn.reply_tx_stats.dest_ps++;
  93                 break;
  94         case TX_STATUS_FAIL_HOST_ABORTED:
  95                 priv->_agn.reply_tx_stats.host_abort++;
  96                 break;
  97         case TX_STATUS_FAIL_BT_RETRY:
  98                 priv->_agn.reply_tx_stats.bt_retry++;
  99                 break;
 100         case TX_STATUS_FAIL_STA_INVALID:
 101                 priv->_agn.reply_tx_stats.sta_invalid++;
 102                 break;
 103         case TX_STATUS_FAIL_FRAG_DROPPED:
 104                 priv->_agn.reply_tx_stats.frag_drop++;
 105                 break;
 106         case TX_STATUS_FAIL_TID_DISABLE:
 107                 priv->_agn.reply_tx_stats.tid_disable++;
 108                 break;
 109         case TX_STATUS_FAIL_FIFO_FLUSHED:
 110                 priv->_agn.reply_tx_stats.fifo_flush++;
 111                 break;
 112         case TX_STATUS_FAIL_INSUFFICIENT_CF_POLL:
 113                 priv->_agn.reply_tx_stats.insuff_cf_poll++;
 114                 break;
 115         case TX_STATUS_FAIL_PASSIVE_NO_RX:
 116                 priv->_agn.reply_tx_stats.fail_hw_drop++;
 117                 break;
 118         case TX_STATUS_FAIL_NO_BEACON_ON_RADAR:
 119                 priv->_agn.reply_tx_stats.sta_color_mismatch++;
 120                 break;
 121         default:
 122                 priv->_agn.reply_tx_stats.unknown++;
 123                 break;
 124         }
 125 }
 126
 127 static void iwlagn_count_agg_tx_err_status(struct iwl_priv *priv, u16 status)
 128 {
 129         status &= AGG_TX_STATUS_MSK;
 130
 131         switch (status) {
 132         case AGG_TX_STATE_UNDERRUN_MSK:
 133                 priv->_agn.reply_agg_tx_stats.underrun++;
 134                 break;
 135         case AGG_TX_STATE_BT_PRIO_MSK:
 136                 priv->_agn.reply_agg_tx_stats.bt_prio++;
 137                 break;
 138         case AGG_TX_STATE_FEW_BYTES_MSK:
 139                 priv->_agn.reply_agg_tx_stats.few_bytes++;
 140                 break;
 141         case AGG_TX_STATE_ABORT_MSK:
 142                 priv->_agn.reply_agg_tx_stats.abort++;
 143                 break;
 144         case AGG_TX_STATE_LAST_SENT_TTL_MSK:
 145                 priv->_agn.reply_agg_tx_stats.last_sent_ttl++;
 146                 break;
 147         case AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK:
 148                 priv->_agn.reply_agg_tx_stats.last_sent_try++;
 149                 break;
 150         case AGG_TX_STATE_LAST_SENT_BT_KILL_MSK:
 151                 priv->_agn.reply_agg_tx_stats.last_sent_bt_kill++;
 152                 break;
 153         case AGG_TX_STATE_SCD_QUERY_MSK:
 154                 priv->_agn.reply_agg_tx_stats.scd_query++;
 155                 break;
 156         case AGG_TX_STATE_TEST_BAD_CRC32_MSK:
 157                 priv->_agn.reply_agg_tx_stats.bad_crc32++;
 158                 break;
 159         case AGG_TX_STATE_RESPONSE_MSK:
 160                 priv->_agn.reply_agg_tx_stats.response++;
 161                 break;
 162         case AGG_TX_STATE_DUMP_TX_MSK:
 163                 priv->_agn.reply_agg_tx_stats.dump_tx++;
 164                 break;
 165         case AGG_TX_STATE_DELAY_TX_MSK:
 166                 priv->_agn.reply_agg_tx_stats.delay_tx++;
 167                 break;
 168         default:
 169                 priv->_agn.reply_agg_tx_stats.unknown++;
 170                 break;
 171         }
 172 }
 173
 174 static void iwlagn_set_tx_status(struct iwl_priv *priv,
 175                                  struct ieee80211_tx_info *info,
 176                                  struct iwl_rxon_context *ctx,
 177                                  struct iwlagn_tx_resp *tx_resp,
 178                                  int txq_id, bool is_agg)
 179 {
 180         u16  status = le16_to_cpu(tx_resp->status.status);
 181
 182         info->status.rates[0].count = tx_resp->failure_frame + 1;
 183         if (is_agg)
 184                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
 185         info->flags |= iwl_tx_status_to_mac80211(status);
 186         iwlagn_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
 187                                     info);
 188         if (!iwl_is_tx_success(status))
 189                 iwlagn_count_tx_err_status(priv, status);
 190
 191         if (status == TX_STATUS_FAIL_PASSIVE_NO_RX &&
 192             iwl_is_associated_ctx(ctx) && ctx->vif &&
 193             ctx->vif->type == NL80211_IFTYPE_STATION) {
 194                 ctx->last_tx_rejected = true;
 195                 iwl_stop_queue(priv, &priv->txq[txq_id]);
 196         }
 197
 198         IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
 199                            "0x%x retries %d\n",
 200                            txq_id,
 201                            iwl_get_tx_fail_reason(status), status,
 202                            le32_to_cpu(tx_resp->rate_n_flags),
 203                            tx_resp->failure_frame);
 204 }
 205
 206 #ifdef CONFIG_IWLWIFI_DEBUG
 207 #define AGG_TX_STATE_FAIL(x) case AGG_TX_STATE_ ## x: return #x
 208
 209 const char *iwl_get_agg_tx_fail_reason(u16 status)
 210 {
 211         status &= AGG_TX_STATUS_MSK;
 212         switch (status) {
 213         case AGG_TX_STATE_TRANSMITTED:
 214                 return "SUCCESS";
 215                 AGG_TX_STATE_FAIL(UNDERRUN_MSK);
 216                 AGG_TX_STATE_FAIL(BT_PRIO_MSK);
 217                 AGG_TX_STATE_FAIL(FEW_BYTES_MSK);
 218                 AGG_TX_STATE_FAIL(ABORT_MSK);
 219                 AGG_TX_STATE_FAIL(LAST_SENT_TTL_MSK);
 220                 AGG_TX_STATE_FAIL(LAST_SENT_TRY_CNT_MSK);
 221                 AGG_TX_STATE_FAIL(LAST_SENT_BT_KILL_MSK);
 222                 AGG_TX_STATE_FAIL(SCD_QUERY_MSK);
 223                 AGG_TX_STATE_FAIL(TEST_BAD_CRC32_MSK);
 224                 AGG_TX_STATE_FAIL(RESPONSE_MSK);
 225                 AGG_TX_STATE_FAIL(DUMP_TX_MSK);
 226                 AGG_TX_STATE_FAIL(DELAY_TX_MSK);
 227         }
 228
 229         return "UNKNOWN";
 230 }
 231 #endif /* CONFIG_IWLWIFI_DEBUG */
 232
 233 static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv,
 234                                       struct iwl_ht_agg *agg,
 235                                       struct iwlagn_tx_resp *tx_resp,
 236                                       int txq_id, u16 start_idx)
 237 {
 238         u16 status;
 239         struct agg_tx_status *frame_status = &tx_resp->status;
 240         struct ieee80211_hdr *hdr = NULL;
 241         int i, sh, idx;
 242         u16 seq;
 243
 244         if (agg->wait_for_ba)
 245                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
 246
 247         agg->frame_count = tx_resp->frame_count;
 248         agg->start_idx = start_idx;
 249         agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
 250         agg->bitmap = 0;
 251
 252         /* # frames attempted by Tx command */
 253         if (agg->frame_count == 1) {
 254                 struct iwl_tx_info *txb;
 255
 256                 /* Only one frame was attempted; no block-ack will arrive */
 257                 idx = start_idx;
 258
 259                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
 260                                    agg->frame_count, agg->start_idx, idx);
 261                 txb = &priv->txq[txq_id].txb[idx];
 262                 iwlagn_set_tx_status(priv, IEEE80211_SKB_CB(txb->skb),
 263                                      txb->ctx, tx_resp, txq_id, true);
 264                 agg->wait_for_ba = 0;
 265         } else {
 266                 /* Two or more frames were attempted; expect block-ack */
 267                 u64 bitmap = 0;
 268
 269                 /*
 270                  * Start is the lowest frame sent. It may not be the first
 271                  * frame in the batch; we figure this out dynamically during
 272                  * the following loop.
 273                  */
 274                 int start = agg->start_idx;
 275
 276                 /* Construct bit-map of pending frames within Tx window */
 277                 for (i = 0; i < agg->frame_count; i++) {
 278                         u16 sc;
 279                         status = le16_to_cpu(frame_status[i].status);
 280                         seq  = le16_to_cpu(frame_status[i].sequence);
 281                         idx = SEQ_TO_INDEX(seq);
 282                         txq_id = SEQ_TO_QUEUE(seq);
 283
 284                         if (status & AGG_TX_STATUS_MSK)
 285                                 iwlagn_count_agg_tx_err_status(priv, status);
 286
 287                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
 288                                       AGG_TX_STATE_ABORT_MSK))
 289                                 continue;
 290
 291                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
 292                                            agg->frame_count, txq_id, idx);
 293                         IWL_DEBUG_TX_REPLY(priv, "status %s (0x%08x), "
 294                                            "try-count (0x%08x)\n",
 295                                            iwl_get_agg_tx_fail_reason(status),
 296                                            status & AGG_TX_STATUS_MSK,
 297                                            status & AGG_TX_TRY_MSK);
 298
 299                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
 300                         if (!hdr) {
 301                                 IWL_ERR(priv,
 302                                         "BUG_ON idx doesn't point to valid skb"
 303                                         " idx=%d, txq_id=%d\n", idx, txq_id);
 304                                 return -1;
 305                         }
 306
 307                         sc = le16_to_cpu(hdr->seq_ctrl);
 308                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
 309                                 IWL_ERR(priv,
 310                                         "BUG_ON idx doesn't match seq control"
 311                                         " idx=%d, seq_idx=%d, seq=%d\n",
 312                                           idx, SEQ_TO_SN(sc),
 313                                           hdr->seq_ctrl);
 314                                 return -1;
 315                         }
 316
 317                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
 318                                            i, idx, SEQ_TO_SN(sc));
 319
 320                         /*
 321                          * sh -> how many frames ahead of the starting frame is
 322                          * the current one?
 323                          *
 324                          * Note that all frames sent in the batch must be in a
 325                          * 64-frame window, so this number should be in [0,63].
 326                          * If outside of this window, then we've found a new
 327                          * "first" frame in the batch and need to change start.
 328                          */
 329                         sh = idx - start;
 330
 331                         /*
 332                          * If >= 64, out of window. start must be at the front
 333                          * of the circular buffer, idx must be near the end of
 334                          * the buffer, and idx is the new "first" frame. Shift
 335                          * the indices around.
 336                          */
 337                         if (sh >= 64) {
 338                                 /* Shift bitmap by start - idx, wrapped */
 339                                 sh = 0x100 - idx + start;
 340                                 bitmap = bitmap << sh;
 341                                 /* Now idx is the new start so sh = 0 */
 342                                 sh = 0;
 343                                 start = idx;
 344                         /*
 345                          * If <= -64 then wraps the 256-pkt circular buffer
 346                          * (e.g., start = 255 and idx = 0, sh should be 1)
 347                          */
 348                         } else if (sh <= -64) {
 349                                 sh  = 0x100 - start + idx;
 350                         /*
 351                          * If < 0 but > -64, out of window. idx is before start
 352                          * but not wrapped. Shift the indices around.
 353                          */
 354                         } else if (sh < 0) {
 355                                 /* Shift by how far start is ahead of idx */
 356                                 sh = start - idx;
 357                                 bitmap = bitmap << sh;
 358                                 /* Now idx is the new start so sh = 0 */
 359                                 start = idx;
 360                                 sh = 0;
 361                         }
 362                         /* Sequence number start + sh was sent in this batch */
 363                         bitmap |= 1ULL << sh;
 364                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
 365                                            start, (unsigned long long)bitmap);
 366                 }
 367
 368                 /*
 369                  * Store the bitmap and possibly the new start, if we wrapped
 370                  * the buffer above
 371                  */
 372                 agg->bitmap = bitmap;
 373                 agg->start_idx = start;
 374                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
 375                                    agg->frame_count, agg->start_idx,
 376                                    (unsigned long long)agg->bitmap);
 377
 378                 if (bitmap)
 379                         agg->wait_for_ba = 1;
 380         }
 381         return 0;
 382 }
 383
 384 void iwl_check_abort_status(struct iwl_priv *priv,
 385                             u8 frame_count, u32 status)
 386 {
 387         if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
 388                 IWL_ERR(priv, "Tx flush command to flush out all frames\n");
 389                 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
 390                         queue_work(priv->workqueue, &priv->tx_flush);
 391         }
 392 }
 393
 394 static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
 395                                 struct iwl_rx_mem_buffer *rxb)
 396 {
 397         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 398         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 399         int txq_id = SEQ_TO_QUEUE(sequence);
 400         int index = SEQ_TO_INDEX(sequence);
 401         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 402         struct ieee80211_tx_info *info;
 403         struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 404         struct iwl_tx_info *txb;
 405         u32 status = le16_to_cpu(tx_resp->status.status);
 406         int tid;
 407         int sta_id;
 408         int freed;
 409         unsigned long flags;
 410
 411         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
 412                 IWL_ERR(priv, "%s: Read index for DMA queue txq_id (%d) "
 413                           "index %d is out of range [0-%d] %d %d\n", __func__,
 414                           txq_id, index, txq->q.n_bd, txq->q.write_ptr,
 415                           txq->q.read_ptr);
 416                 return;
 417         }
 418
 419         txq->time_stamp = jiffies;
 420         txb = &txq->txb[txq->q.read_ptr];
 421         info = IEEE80211_SKB_CB(txb->skb);
 422         memset(&info->status, 0, sizeof(info->status));
 423
 424         tid = (tx_resp->ra_tid & IWLAGN_TX_RES_TID_MSK) >>
 425                 IWLAGN_TX_RES_TID_POS;
 426         sta_id = (tx_resp->ra_tid & IWLAGN_TX_RES_RA_MSK) >>
 427                 IWLAGN_TX_RES_RA_POS;
 428
 429         spin_lock_irqsave(&priv->sta_lock, flags);
 430         if (txq->sched_retry) {
 431                 const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp);
 432                 struct iwl_ht_agg *agg;
 433
 434                 agg = &priv->stations[sta_id].tid[tid].agg;
 435                 /*
 436                  * If the BT kill count is non-zero, we'll get this
 437                  * notification again.
 438                  */
 439                 if (tx_resp->bt_kill_count && tx_resp->frame_count == 1 &&
 440                     priv->cfg->bt_params &&
 441                     priv->cfg->bt_params->advanced_bt_coexist) {
 442                         IWL_DEBUG_COEX(priv, "receive reply tx with bt_kill\n");
 443                 }
 444                 iwlagn_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
 445
 446                 /* check if BAR is needed */
 447                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
 448                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
 449
 450                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
 451                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
 452                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
 453                                         "scd_ssn=%d idx=%d txq=%d swq=%d\n",
 454                                         scd_ssn , index, txq_id, txq->swq_id);
 455
 456                         freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
 457                         iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 458
 459                         if (priv->mac80211_registered &&
 460                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
 461                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
 462                                 iwl_wake_queue(priv, txq);
 463                 }
 464         } else {
 465                 iwlagn_set_tx_status(priv, info, txb->ctx, tx_resp,
 466                                      txq_id, false);
 467                 freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
 468                 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 469
 470                 if (priv->mac80211_registered &&
 471                     iwl_queue_space(&txq->q) > txq->q.low_mark &&
 472                     status != TX_STATUS_FAIL_PASSIVE_NO_RX)
 473                         iwl_wake_queue(priv, txq);
 474         }
 475
 476         iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
 477
 478         iwl_check_abort_status(priv, tx_resp->frame_count, status);
 479         spin_unlock_irqrestore(&priv->sta_lock, flags);
 480 }
 481
 482 void iwlagn_rx_handler_setup(struct iwl_priv *priv)
 483 {
 484         /* init calibration handlers */
 485         priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
 486                                         iwlagn_rx_calib_result;
 487         priv->rx_handlers[REPLY_TX] = iwlagn_rx_reply_tx;
 488
 489         /* set up notification wait support */
 490         spin_lock_init(&priv->_agn.notif_wait_lock);
 491         INIT_LIST_HEAD(&priv->_agn.notif_waits);
 492         init_waitqueue_head(&priv->_agn.notif_waitq);
 493 }
 494
 495 void iwlagn_setup_deferred_work(struct iwl_priv *priv)
 496 {
 497         /*
 498          * nothing need to be done here anymore
 499          * still keep for future use if needed
 500          */
 501 }
 502
 503 int iwlagn_hw_valid_rtc_data_addr(u32 addr)
 504 {
 505         return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
 506                 (addr < IWLAGN_RTC_DATA_UPPER_BOUND);
 507 }
 508
 509 int iwlagn_send_tx_power(struct iwl_priv *priv)
 510 {
 511         struct iwlagn_tx_power_dbm_cmd tx_power_cmd;
 512         u8 tx_ant_cfg_cmd;
 513
 514         if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->status),
 515                       "TX Power requested while scanning!\n"))
 516                 return -EAGAIN;
 517
 518         /* half dBm need to multiply */
 519         tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
 520
 521         if (priv->tx_power_lmt_in_half_dbm &&
 522             priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
 523                 /*
 524                  * For the newer devices which using enhanced/extend tx power
 525                  * table in EEPROM, the format is in half dBm. driver need to
 526                  * convert to dBm format before report to mac80211.
 527                  * By doing so, there is a possibility of 1/2 dBm resolution
 528                  * lost. driver will perform "round-up" operation before
 529                  * reporting, but it will cause 1/2 dBm tx power over the
 530                  * regulatory limit. Perform the checking here, if the
 531                  * "tx_power_user_lmt" is higher than EEPROM value (in
 532                  * half-dBm format), lower the tx power based on EEPROM
 533                  */
 534                 tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
 535         }
 536         tx_power_cmd.flags = IWLAGN_TX_POWER_NO_CLOSED;
 537         tx_power_cmd.srv_chan_lmt = IWLAGN_TX_POWER_AUTO;
 538
 539         if (IWL_UCODE_API(priv->ucode_ver) == 1)
 540                 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
 541         else
 542                 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
 543
 544         return trans_send_cmd_pdu(priv, tx_ant_cfg_cmd, CMD_SYNC,
 545                         sizeof(tx_power_cmd), &tx_power_cmd);
 546 }
 547
 548 void iwlagn_temperature(struct iwl_priv *priv)
 549 {
 550         /* store temperature from correct statistics (in Celsius) */
 551         priv->temperature = le32_to_cpu(priv->statistics.common.temperature);
 552         iwl_tt_handler(priv);
 553 }
 554
 555 u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv)
 556 {
 557         struct iwl_eeprom_calib_hdr {
 558                 u8 version;
 559                 u8 pa_type;
 560                 u16 voltage;
 561         } *hdr;
 562
 563         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 564                                                         EEPROM_CALIB_ALL);
 565         return hdr->version;
 566
 567 }
 568
 569 /*
 570  * EEPROM
 571  */
 572 static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
 573 {
 574         u16 offset = 0;
 575
 576         if ((address & INDIRECT_ADDRESS) == 0)
 577                 return address;
 578
 579         switch (address & INDIRECT_TYPE_MSK) {
 580         case INDIRECT_HOST:
 581                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_HOST);
 582                 break;
 583         case INDIRECT_GENERAL:
 584                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_GENERAL);
 585                 break;
 586         case INDIRECT_REGULATORY:
 587                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_REGULATORY);
 588                 break;
 589         case INDIRECT_TXP_LIMIT:
 590                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT);
 591                 break;
 592         case INDIRECT_TXP_LIMIT_SIZE:
 593                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT_SIZE);
 594                 break;
 595         case INDIRECT_CALIBRATION:
 596                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_CALIBRATION);
 597                 break;
 598         case INDIRECT_PROCESS_ADJST:
 599                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_PROCESS_ADJST);
 600                 break;
 601         case INDIRECT_OTHERS:
 602                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_OTHERS);
 603                 break;
 604         default:
 605                 IWL_ERR(priv, "illegal indirect type: 0x%X\n",
 606                 address & INDIRECT_TYPE_MSK);
 607                 break;
 608         }
 609
 610         /* translate the offset from words to byte */
 611         return (address & ADDRESS_MSK) + (offset << 1);
 612 }
 613
 614 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 615 {
 616         u32 address = eeprom_indirect_address(priv, offset);
 617         BUG_ON(address >= priv->cfg->base_params->eeprom_size);
 618         return &priv->eeprom[address];
 619 }
 620
 621 struct iwl_mod_params iwlagn_mod_params = {
 622         .amsdu_size_8K = 1,
 623         .restart_fw = 1,
 624         .plcp_check = true,
 625         .bt_coex_active = true,
 626         .no_sleep_autoadjust = true,
 627         .power_level = IWL_POWER_INDEX_1,
 628         /* the rest are 0 by default */
 629 };
 630
 631 int iwlagn_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 632 {
 633         u32 rb_size;
 634         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 635         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
 636
 637         rb_timeout = RX_RB_TIMEOUT;
 638
 639         if (iwlagn_mod_params.amsdu_size_8K)
 640                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 641         else
 642                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 643
 644         /* Stop Rx DMA */
 645         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 646
 647         /* Reset driver's Rx queue write index */
 648         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 649
 650         /* Tell device where to find RBD circular buffer in DRAM */
 651         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 652                            (u32)(rxq->bd_dma >> 8));
 653
 654         /* Tell device where in DRAM to update its Rx status */
 655         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 656                            rxq->rb_stts_dma >> 4);
 657
 658         /* Enable Rx DMA
 659          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
 660          *      the credit mechanism in 5000 HW RX FIFO
 661          * Direct rx interrupts to hosts
 662          * Rx buffer size 4 or 8k
 663          * RB timeout 0x10
 664          * 256 RBDs
 665          */
 666         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 667                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 668                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 669                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 670                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
 671                            rb_size|
 672                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 673                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 674
 675         /* Set interrupt coalescing timer to default (2048 usecs) */
 676         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
 677
 678         return 0;
 679 }
 680
 681 static void iwlagn_set_pwr_vmain(struct iwl_priv *priv)
 682 {
 683 /*
 684  * (for documentation purposes)
 685  * to set power to V_AUX, do:
 686
 687                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 688                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 689                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 690                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 691  */
 692
 693         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 694                                APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 695                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 696 }
 697
 698 int iwlagn_hw_nic_init(struct iwl_priv *priv)
 699 {
 700         unsigned long flags;
 701         struct iwl_rx_queue *rxq = &priv->rxq;
 702
 703         /* nic_init */
 704         spin_lock_irqsave(&priv->lock, flags);
 705         iwl_apm_init(priv);
 706
 707         /* Set interrupt coalescing calibration timer to default (512 usecs) */
 708         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
 709
 710         spin_unlock_irqrestore(&priv->lock, flags);
 711
 712         iwlagn_set_pwr_vmain(priv);
 713
 714         priv->cfg->ops->lib->nic_config(priv);
 715
 716         /* Allocate the RX queue, or reset if it is already allocated */
 717         trans_rx_init(priv);
 718
 719         iwlagn_rx_replenish(priv);
 720
 721         iwlagn_rx_init(priv, rxq);
 722
 723         spin_lock_irqsave(&priv->lock, flags);
 724
 725         rxq->need_update = 1;
 726         iwl_rx_queue_update_write_ptr(priv, rxq);
 727
 728         spin_unlock_irqrestore(&priv->lock, flags);
 729
 730         /* Allocate or reset and init all Tx and Command queues */
 731         if (trans_tx_init(priv))
 732                 return -ENOMEM;
 733
 734         if (priv->cfg->base_params->shadow_reg_enable) {
 735                 /* enable shadow regs in HW */
 736                 iwl_set_bit(priv, CSR_MAC_SHADOW_REG_CTRL,
 737                         0x800FFFFF);
 738         }
 739
 740         set_bit(STATUS_INIT, &priv->status);
 741
 742         return 0;
 743 }
 744
 745 /**
 746  * iwlagn_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 747  */
 748 static inline __le32 iwlagn_dma_addr2rbd_ptr(struct iwl_priv *priv,
 749                                           dma_addr_t dma_addr)
 750 {
 751         return cpu_to_le32((u32)(dma_addr >> 8));
 752 }
 753
 754 /**
 755  * iwlagn_rx_queue_restock - refill RX queue from pre-allocated pool
 756  *
 757  * If there are slots in the RX queue that need to be restocked,
 758  * and we have free pre-allocated buffers, fill the ranks as much
 759  * as we can, pulling from rx_free.
 760  *
 761  * This moves the 'write' index forward to catch up with 'processed', and
 762  * also updates the memory address in the firmware to reference the new
 763  * target buffer.
 764  */
 765 void iwlagn_rx_queue_restock(struct iwl_priv *priv)
 766 {
 767         struct iwl_rx_queue *rxq = &priv->rxq;
 768         struct list_head *element;
 769         struct iwl_rx_mem_buffer *rxb;
 770         unsigned long flags;
 771
 772         spin_lock_irqsave(&rxq->lock, flags);
 773         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 774                 /* The overwritten rxb must be a used one */
 775                 rxb = rxq->queue[rxq->write];
 776                 BUG_ON(rxb && rxb->page);
 777
 778                 /* Get next free Rx buffer, remove from free list */
 779                 element = rxq->rx_free.next;
 780                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 781                 list_del(element);
 782
 783                 /* Point to Rx buffer via next RBD in circular buffer */
 784                 rxq->bd[rxq->write] = iwlagn_dma_addr2rbd_ptr(priv,
 785                                                               rxb->page_dma);
 786                 rxq->queue[rxq->write] = rxb;
 787                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 788                 rxq->free_count--;
 789         }
 790         spin_unlock_irqrestore(&rxq->lock, flags);
 791         /* If the pre-allocated buffer pool is dropping low, schedule to
 792          * refill it */
 793         if (rxq->free_count <= RX_LOW_WATERMARK)
 794                 queue_work(priv->workqueue, &priv->rx_replenish);
 795
 796
 797         /* If we've added more space for the firmware to place data, tell it.
 798          * Increment device's write pointer in multiples of 8. */
 799         if (rxq->write_actual != (rxq->write & ~0x7)) {
 800                 spin_lock_irqsave(&rxq->lock, flags);
 801                 rxq->need_update = 1;
 802                 spin_unlock_irqrestore(&rxq->lock, flags);
 803                 iwl_rx_queue_update_write_ptr(priv, rxq);
 804         }
 805 }
 806
 807 /**
 808  * iwlagn_rx_replenish - Move all used packet from rx_used to rx_free
 809  *
 810  * When moving to rx_free an SKB is allocated for the slot.
 811  *
 812  * Also restock the Rx queue via iwl_rx_queue_restock.
 813  * This is called as a scheduled work item (except for during initialization)
 814  */
 815 void iwlagn_rx_allocate(struct iwl_priv *priv, gfp_t priority)
 816 {
 817         struct iwl_rx_queue *rxq = &priv->rxq;
 818         struct list_head *element;
 819         struct iwl_rx_mem_buffer *rxb;
 820         struct page *page;
 821         unsigned long flags;
 822         gfp_t gfp_mask = priority;
 823
 824         while (1) {
 825                 spin_lock_irqsave(&rxq->lock, flags);
 826                 if (list_empty(&rxq->rx_used)) {
 827                         spin_unlock_irqrestore(&rxq->lock, flags);
 828                         return;
 829                 }
 830                 spin_unlock_irqrestore(&rxq->lock, flags);
 831
 832                 if (rxq->free_count > RX_LOW_WATERMARK)
 833                         gfp_mask |= __GFP_NOWARN;
 834
 835                 if (priv->hw_params.rx_page_order > 0)
 836                         gfp_mask |= __GFP_COMP;
 837
 838                 /* Alloc a new receive buffer */
 839                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
 840                 if (!page) {
 841                         if (net_ratelimit())
 842                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
 843                                                "order: %d\n",
 844                                                priv->hw_params.rx_page_order);
 845
 846                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
 847                             net_ratelimit())
 848                                 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
 849                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
 850                                          rxq->free_count);
 851                         /* We don't reschedule replenish work here -- we will
 852                          * call the restock method and if it still needs
 853                          * more buffers it will schedule replenish */
 854                         return;
 855                 }
 856
 857                 spin_lock_irqsave(&rxq->lock, flags);
 858
 859                 if (list_empty(&rxq->rx_used)) {
 860                         spin_unlock_irqrestore(&rxq->lock, flags);
 861                         __free_pages(page, priv->hw_params.rx_page_order);
 862                         return;
 863                 }
 864                 element = rxq->rx_used.next;
 865                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 866                 list_del(element);
 867
 868                 spin_unlock_irqrestore(&rxq->lock, flags);
 869
 870                 BUG_ON(rxb->page);
 871                 rxb->page = page;
 872                 /* Get physical address of the RB */
 873                 rxb->page_dma = dma_map_page(priv->bus.dev, page, 0,
 874                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 875                                 DMA_FROM_DEVICE);
 876                 /* dma address must be no more than 36 bits */
 877                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
 878                 /* and also 256 byte aligned! */
 879                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
 880
 881                 spin_lock_irqsave(&rxq->lock, flags);
 882
 883                 list_add_tail(&rxb->list, &rxq->rx_free);
 884                 rxq->free_count++;
 885
 886                 spin_unlock_irqrestore(&rxq->lock, flags);
 887         }
 888 }
 889
 890 void iwlagn_rx_replenish(struct iwl_priv *priv)
 891 {
 892         unsigned long flags;
 893
 894         iwlagn_rx_allocate(priv, GFP_KERNEL);
 895
 896         spin_lock_irqsave(&priv->lock, flags);
 897         iwlagn_rx_queue_restock(priv);
 898         spin_unlock_irqrestore(&priv->lock, flags);
 899 }
 900
 901 void iwlagn_rx_replenish_now(struct iwl_priv *priv)
 902 {
 903         iwlagn_rx_allocate(priv, GFP_ATOMIC);
 904
 905         iwlagn_rx_queue_restock(priv);
 906 }
 907
 908 int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
 909 {
 910         int idx = 0;
 911         int band_offset = 0;
 912
 913         /* HT rate format: mac80211 wants an MCS number, which is just LSB */
 914         if (rate_n_flags & RATE_MCS_HT_MSK) {
 915                 idx = (rate_n_flags & 0xff);
 916                 return idx;
 917         /* Legacy rate format, search for match in table */
 918         } else {
 919                 if (band == IEEE80211_BAND_5GHZ)
 920                         band_offset = IWL_FIRST_OFDM_RATE;
 921                 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
 922                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
 923                                 return idx - band_offset;
 924         }
 925
 926         return -1;
 927 }
 928
 929 static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
 930                                            struct ieee80211_vif *vif,
 931                                            enum ieee80211_band band,
 932                                            struct iwl_scan_channel *scan_ch)
 933 {
 934         const struct ieee80211_supported_band *sband;
 935         u16 passive_dwell = 0;
 936         u16 active_dwell = 0;
 937         int added = 0;
 938         u16 channel = 0;
 939
 940         sband = iwl_get_hw_mode(priv, band);
 941         if (!sband) {
 942                 IWL_ERR(priv, "invalid band\n");
 943                 return added;
 944         }
 945
 946         active_dwell = iwl_get_active_dwell_time(priv, band, 0);
 947         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
 948
 949         if (passive_dwell <= active_dwell)
 950                 passive_dwell = active_dwell + 1;
 951
 952         channel = iwl_get_single_channel_number(priv, band);
 953         if (channel) {
 954                 scan_ch->channel = cpu_to_le16(channel);
 955                 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
 956                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
 957                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
 958                 /* Set txpower levels to defaults */
 959                 scan_ch->dsp_atten = 110;
 960                 if (band == IEEE80211_BAND_5GHZ)
 961                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
 962                 else
 963                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
 964                 added++;
 965         } else
 966                 IWL_ERR(priv, "no valid channel found\n");
 967         return added;
 968 }
 969
 970 static int iwl_get_channels_for_scan(struct iwl_priv *priv,
 971                                      struct ieee80211_vif *vif,
 972                                      enum ieee80211_band band,
 973                                      u8 is_active, u8 n_probes,
 974                                      struct iwl_scan_channel *scan_ch)
 975 {
 976         struct ieee80211_channel *chan;
 977         const struct ieee80211_supported_band *sband;
 978         const struct iwl_channel_info *ch_info;
 979         u16 passive_dwell = 0;
 980         u16 active_dwell = 0;
 981         int added, i;
 982         u16 channel;
 983
 984         sband = iwl_get_hw_mode(priv, band);
 985         if (!sband)
 986                 return 0;
 987
 988         active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
 989         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
 990
 991         if (passive_dwell <= active_dwell)
 992                 passive_dwell = active_dwell + 1;
 993
 994         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
 995                 chan = priv->scan_request->channels[i];
 996
 997                 if (chan->band != band)
 998                         continue;
 999
1000                 channel = chan->hw_value;
1001                 scan_ch->channel = cpu_to_le16(channel);
1002
1003                 ch_info = iwl_get_channel_info(priv, band, channel);
1004                 if (!is_channel_valid(ch_info)) {
1005                         IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1006                                         channel);
1007                         continue;
1008                 }
1009
1010                 if (!is_active || is_channel_passive(ch_info) ||
1011                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
1012                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
1013                 else
1014                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
1015
1016                 if (n_probes)
1017                         scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
1018
1019                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1020                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1021
1022                 /* Set txpower levels to defaults */
1023                 scan_ch->dsp_atten = 110;
1024
1025                 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1026                  * power level:
1027                  * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
1028                  */
1029                 if (band == IEEE80211_BAND_5GHZ)
1030                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
1031                 else
1032                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
1033
1034                 IWL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
1035                                channel, le32_to_cpu(scan_ch->type),
1036                                (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
1037                                 "ACTIVE" : "PASSIVE",
1038                                (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
1039                                active_dwell : passive_dwell);
1040
1041                 scan_ch++;
1042                 added++;
1043         }
1044
1045         IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1046         return added;
1047 }
1048
1049 static int iwl_fill_offch_tx(struct iwl_priv *priv, void *data, size_t maxlen)
1050 {
1051         struct sk_buff *skb = priv->_agn.offchan_tx_skb;
1052
1053         if (skb->len < maxlen)
1054                 maxlen = skb->len;
1055
1056         memcpy(data, skb->data, maxlen);
1057
1058         return maxlen;
1059 }
1060
1061 int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
1062 {
1063         struct iwl_host_cmd cmd = {
1064                 .id = REPLY_SCAN_CMD,
1065                 .len = { sizeof(struct iwl_scan_cmd), },
1066                 .flags = CMD_SYNC,
1067         };
1068         struct iwl_scan_cmd *scan;
1069         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1070         u32 rate_flags = 0;
1071         u16 cmd_len;
1072         u16 rx_chain = 0;
1073         enum ieee80211_band band;
1074         u8 n_probes = 0;
1075         u8 rx_ant = priv->hw_params.valid_rx_ant;
1076         u8 rate;
1077         bool is_active = false;
1078         int  chan_mod;
1079         u8 active_chains;
1080         u8 scan_tx_antennas = priv->hw_params.valid_tx_ant;
1081         int ret;
1082
1083         lockdep_assert_held(&priv->mutex);
1084
1085         if (vif)
1086                 ctx = iwl_rxon_ctx_from_vif(vif);
1087
1088         if (!priv->scan_cmd) {
1089                 priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +
1090                                          IWL_MAX_SCAN_SIZE, GFP_KERNEL);
1091                 if (!priv->scan_cmd) {
1092                         IWL_DEBUG_SCAN(priv,
1093                                        "fail to allocate memory for scan\n");
1094                         return -ENOMEM;
1095                 }
1096         }
1097         scan = priv->scan_cmd;
1098         memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
1099
1100         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
1101         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
1102
1103         if (priv->scan_type != IWL_SCAN_OFFCH_TX &&
1104             iwl_is_any_associated(priv)) {
1105                 u16 interval = 0;
1106                 u32 extra;
1107                 u32 suspend_time = 100;
1108                 u32 scan_suspend_time = 100;
1109
1110                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
1111                 switch (priv->scan_type) {
1112                 case IWL_SCAN_OFFCH_TX:
1113                         WARN_ON(1);
1114                         break;
1115                 case IWL_SCAN_RADIO_RESET:
1116                         interval = 0;
1117                         break;
1118                 case IWL_SCAN_NORMAL:
1119                         interval = vif->bss_conf.beacon_int;
1120                         break;
1121                 }
1122
1123                 scan->suspend_time = 0;
1124                 scan->max_out_time = cpu_to_le32(200 * 1024);
1125                 if (!interval)
1126                         interval = suspend_time;
1127
1128                 extra = (suspend_time / interval) << 22;
1129                 scan_suspend_time = (extra |
1130                     ((suspend_time % interval) * 1024));
1131                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
1132                 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
1133                                scan_suspend_time, interval);
1134         } else if (priv->scan_type == IWL_SCAN_OFFCH_TX) {
1135                 scan->suspend_time = 0;
1136                 scan->max_out_time =
1137                         cpu_to_le32(1024 * priv->_agn.offchan_tx_timeout);
1138         }
1139
1140         switch (priv->scan_type) {
1141         case IWL_SCAN_RADIO_RESET:
1142                 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
1143                 break;
1144         case IWL_SCAN_NORMAL:
1145                 if (priv->scan_request->n_ssids) {
1146                         int i, p = 0;
1147                         IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
1148                         for (i = 0; i < priv->scan_request->n_ssids; i++) {
1149                                 /* always does wildcard anyway */
1150                                 if (!priv->scan_request->ssids[i].ssid_len)
1151                                         continue;
1152                                 scan->direct_scan[p].id = WLAN_EID_SSID;
1153                                 scan->direct_scan[p].len =
1154                                         priv->scan_request->ssids[i].ssid_len;
1155                                 memcpy(scan->direct_scan[p].ssid,
1156                                        priv->scan_request->ssids[i].ssid,
1157                                        priv->scan_request->ssids[i].ssid_len);
1158                                 n_probes++;
1159                                 p++;
1160                         }
1161                         is_active = true;
1162                 } else
1163                         IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
1164                 break;
1165         case IWL_SCAN_OFFCH_TX:
1166                 IWL_DEBUG_SCAN(priv, "Start offchannel TX scan.\n");
1167                 break;
1168         }
1169
1170         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
1171         scan->tx_cmd.sta_id = ctx->bcast_sta_id;
1172         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1173
1174         switch (priv->scan_band) {
1175         case IEEE80211_BAND_2GHZ:
1176                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
1177                 chan_mod = le32_to_cpu(
1178                         priv->contexts[IWL_RXON_CTX_BSS].active.flags &
1179                                                 RXON_FLG_CHANNEL_MODE_MSK)
1180                                        >> RXON_FLG_CHANNEL_MODE_POS;
1181                 if (chan_mod == CHANNEL_MODE_PURE_40) {
1182                         rate = IWL_RATE_6M_PLCP;
1183                 } else {
1184                         rate = IWL_RATE_1M_PLCP;
1185                         rate_flags = RATE_MCS_CCK_MSK;
1186                 }
1187                 /*
1188                  * Internal scans are passive, so we can indiscriminately set
1189                  * the BT ignore flag on 2.4 GHz since it applies to TX only.
1190                  */
1191                 if (priv->cfg->bt_params &&
1192                     priv->cfg->bt_params->advanced_bt_coexist)
1193                         scan->tx_cmd.tx_flags |= TX_CMD_FLG_IGNORE_BT;
1194                 break;
1195         case IEEE80211_BAND_5GHZ:
1196                 rate = IWL_RATE_6M_PLCP;
1197                 break;
1198         default:
1199                 IWL_WARN(priv, "Invalid scan band\n");
1200                 return -EIO;
1201         }
1202
1203         /*
1204          * If active scanning is requested but a certain channel is
1205          * marked passive, we can do active scanning if we detect
1206          * transmissions.
1207          *
1208          * There is an issue with some firmware versions that triggers
1209          * a sysassert on a "good CRC threshold" of zero (== disabled),
1210          * on a radar channel even though this means that we should NOT
1211          * send probes.
1212          *
1213          * The "good CRC threshold" is the number of frames that we
1214          * need to receive during our dwell time on a channel before
1215          * sending out probes -- setting this to a huge value will
1216          * mean we never reach it, but at the same time work around
1217          * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
1218          * here instead of IWL_GOOD_CRC_TH_DISABLED.
1219          *
1220          * This was fixed in later versions along with some other
1221          * scan changes, and the threshold behaves as a flag in those
1222          * versions.
1223          */
1224         if (priv->new_scan_threshold_behaviour)
1225                 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
1226                                                 IWL_GOOD_CRC_TH_DISABLED;
1227         else
1228                 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
1229                                                 IWL_GOOD_CRC_TH_NEVER;
1230
1231         band = priv->scan_band;
1232
1233         if (priv->cfg->scan_rx_antennas[band])
1234                 rx_ant = priv->cfg->scan_rx_antennas[band];
1235
1236         if (band == IEEE80211_BAND_2GHZ &&
1237             priv->cfg->bt_params &&
1238             priv->cfg->bt_params->advanced_bt_coexist) {
1239                 /* transmit 2.4 GHz probes only on first antenna */
1240                 scan_tx_antennas = first_antenna(scan_tx_antennas);
1241         }
1242
1243         priv->scan_tx_ant[band] = iwl_toggle_tx_ant(priv, priv->scan_tx_ant[band],
1244                                                     scan_tx_antennas);
1245         rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]);
1246         scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
1247
1248         /* In power save mode use one chain, otherwise use all chains */
1249         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
1250                 /* rx_ant has been set to all valid chains previously */
1251                 active_chains = rx_ant &
1252                                 ((u8)(priv->chain_noise_data.active_chains));
1253                 if (!active_chains)
1254                         active_chains = rx_ant;
1255
1256                 IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
1257                                 priv->chain_noise_data.active_chains);
1258
1259                 rx_ant = first_antenna(active_chains);
1260         }
1261         if (priv->cfg->bt_params &&
1262             priv->cfg->bt_params->advanced_bt_coexist &&
1263             priv->bt_full_concurrent) {
1264                 /* operated as 1x1 in full concurrency mode */
1265                 rx_ant = first_antenna(rx_ant);
1266         }
1267
1268         /* MIMO is not used here, but value is required */
1269         rx_chain |= priv->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
1270         rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1271         rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
1272         rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1273         scan->rx_chain = cpu_to_le16(rx_chain);
1274         switch (priv->scan_type) {
1275         case IWL_SCAN_NORMAL:
1276                 cmd_len = iwl_fill_probe_req(priv,
1277                                         (struct ieee80211_mgmt *)scan->data,
1278                                         vif->addr,
1279                                         priv->scan_request->ie,
1280                                         priv->scan_request->ie_len,
1281                                         IWL_MAX_SCAN_SIZE - sizeof(*scan));
1282                 break;
1283         case IWL_SCAN_RADIO_RESET:
1284                 /* use bcast addr, will not be transmitted but must be valid */
1285                 cmd_len = iwl_fill_probe_req(priv,
1286                                         (struct ieee80211_mgmt *)scan->data,
1287                                         iwl_bcast_addr, NULL, 0,
1288                                         IWL_MAX_SCAN_SIZE - sizeof(*scan));
1289                 break;
1290         case IWL_SCAN_OFFCH_TX:
1291                 cmd_len = iwl_fill_offch_tx(priv, scan->data,
1292                                             IWL_MAX_SCAN_SIZE
1293                                              - sizeof(*scan)
1294                                              - sizeof(struct iwl_scan_channel));
1295                 scan->scan_flags |= IWL_SCAN_FLAGS_ACTION_FRAME_TX;
1296                 break;
1297         default:
1298                 BUG();
1299         }
1300         scan->tx_cmd.len = cpu_to_le16(cmd_len);
1301
1302         scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
1303                                RXON_FILTER_BCON_AWARE_MSK);
1304
1305         switch (priv->scan_type) {
1306         case IWL_SCAN_RADIO_RESET:
1307                 scan->channel_count =
1308                         iwl_get_single_channel_for_scan(priv, vif, band,
1309                                 (void *)&scan->data[cmd_len]);
1310                 break;
1311         case IWL_SCAN_NORMAL:
1312                 scan->channel_count =
1313                         iwl_get_channels_for_scan(priv, vif, band,
1314                                 is_active, n_probes,
1315                                 (void *)&scan->data[cmd_len]);
1316                 break;
1317         case IWL_SCAN_OFFCH_TX: {
1318                 struct iwl_scan_channel *scan_ch;
1319
1320                 scan->channel_count = 1;
1321
1322                 scan_ch = (void *)&scan->data[cmd_len];
1323                 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
1324                 scan_ch->channel =
1325                         cpu_to_le16(priv->_agn.offchan_tx_chan->hw_value);
1326                 scan_ch->active_dwell =
1327                         cpu_to_le16(priv->_agn.offchan_tx_timeout);
1328                 scan_ch->passive_dwell = 0;
1329
1330                 /* Set txpower levels to defaults */
1331                 scan_ch->dsp_atten = 110;
1332
1333                 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1334                  * power level:
1335                  * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
1336                  */
1337                 if (priv->_agn.offchan_tx_chan->band == IEEE80211_BAND_5GHZ)
1338                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
1339                 else
1340                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
1341                 }
1342                 break;
1343         }
1344
1345         if (scan->channel_count == 0) {
1346                 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
1347                 return -EIO;
1348         }
1349
1350         cmd.len[0] += le16_to_cpu(scan->tx_cmd.len) +
1351             scan->channel_count * sizeof(struct iwl_scan_channel);
1352         cmd.data[0] = scan;
1353         cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
1354         scan->len = cpu_to_le16(cmd.len[0]);
1355
1356         /* set scan bit here for PAN params */
1357         set_bit(STATUS_SCAN_HW, &priv->status);
1358
1359         ret = iwlagn_set_pan_params(priv);
1360         if (ret)
1361                 return ret;
1362
1363         ret = trans_send_cmd(priv, &cmd);
1364         if (ret) {
1365                 clear_bit(STATUS_SCAN_HW, &priv->status);
1366                 iwlagn_set_pan_params(priv);
1367         }
1368
1369         return ret;
1370 }
1371
1372 int iwlagn_manage_ibss_station(struct iwl_priv *priv,
1373                                struct ieee80211_vif *vif, bool add)
1374 {
1375         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
1376
1377         if (add)
1378                 return iwlagn_add_bssid_station(priv, vif_priv->ctx,
1379                                                 vif->bss_conf.bssid,
1380                                                 &vif_priv->ibss_bssid_sta_id);
1381         return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id,
1382                                   vif->bss_conf.bssid);
1383 }
1384
1385 void iwl_free_tfds_in_queue(struct iwl_priv *priv,
1386                             int sta_id, int tid, int freed)
1387 {
1388         lockdep_assert_held(&priv->sta_lock);
1389
1390         if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
1391                 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1392         else {
1393                 IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
1394                         priv->stations[sta_id].tid[tid].tfds_in_queue,
1395                         freed);
1396                 priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
1397         }
1398 }
1399
1400 #define IWL_FLUSH_WAIT_MS       2000
1401
1402 int iwlagn_wait_tx_queue_empty(struct iwl_priv *priv)
1403 {
1404         struct iwl_tx_queue *txq;
1405         struct iwl_queue *q;
1406         int cnt;
1407         unsigned long now = jiffies;
1408         int ret = 0;
1409
1410         /* waiting for all the tx frames complete might take a while */
1411         for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
1412                 if (cnt == priv->cmd_queue)
1413                         continue;
1414                 txq = &priv->txq[cnt];
1415                 q = &txq->q;
1416                 while (q->read_ptr != q->write_ptr && !time_after(jiffies,
1417                        now + msecs_to_jiffies(IWL_FLUSH_WAIT_MS)))
1418                                 msleep(1);
1419
1420                 if (q->read_ptr != q->write_ptr) {
1421                         IWL_ERR(priv, "fail to flush all tx fifo queues\n");
1422                         ret = -ETIMEDOUT;
1423                         break;
1424                 }
1425         }
1426         return ret;
1427 }
1428
1429 #define IWL_TX_QUEUE_MSK        0xfffff
1430
1431 /**
1432  * iwlagn_txfifo_flush: send REPLY_TXFIFO_FLUSH command to uCode
1433  *
1434  * pre-requirements:
1435  *  1. acquire mutex before calling
1436  *  2. make sure rf is on and not in exit state
1437  */
1438 int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
1439 {
1440         struct iwl_txfifo_flush_cmd flush_cmd;
1441         struct iwl_host_cmd cmd = {
1442                 .id = REPLY_TXFIFO_FLUSH,
1443                 .len = { sizeof(struct iwl_txfifo_flush_cmd), },
1444                 .flags = CMD_SYNC,
1445                 .data = { &flush_cmd, },
1446         };
1447
1448         might_sleep();
1449
1450         memset(&flush_cmd, 0, sizeof(flush_cmd));
1451         if (flush_control & BIT(IWL_RXON_CTX_BSS))
1452                 flush_cmd.fifo_control = IWL_SCD_VO_MSK | IWL_SCD_VI_MSK |
1453                                  IWL_SCD_BE_MSK | IWL_SCD_BK_MSK |
1454                                  IWL_SCD_MGMT_MSK;
1455         if ((flush_control & BIT(IWL_RXON_CTX_PAN)) &&
1456             (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)))
1457                 flush_cmd.fifo_control |= IWL_PAN_SCD_VO_MSK |
1458                                 IWL_PAN_SCD_VI_MSK | IWL_PAN_SCD_BE_MSK |
1459                                 IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK |
1460                                 IWL_PAN_SCD_MULTICAST_MSK;
1461
1462         if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
1463                 flush_cmd.fifo_control |= IWL_AGG_TX_QUEUE_MSK;
1464
1465         IWL_DEBUG_INFO(priv, "fifo queue control: 0X%x\n",
1466                        flush_cmd.fifo_control);
1467         flush_cmd.flush_control = cpu_to_le16(flush_control);
1468
1469         return trans_send_cmd(priv, &cmd);
1470 }
1471
1472 void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
1473 {
1474         mutex_lock(&priv->mutex);
1475         ieee80211_stop_queues(priv->hw);
1476         if (iwlagn_txfifo_flush(priv, IWL_DROP_ALL)) {
1477                 IWL_ERR(priv, "flush request fail\n");
1478                 goto done;
1479         }
1480         IWL_DEBUG_INFO(priv, "wait transmit/flush all frames\n");
1481         iwlagn_wait_tx_queue_empty(priv);
1482 done:
1483         ieee80211_wake_queues(priv->hw);
1484         mutex_unlock(&priv->mutex);
1485 }
1486
1487 /*
1488  * BT coex
1489  */
1490 /*
1491  * Macros to access the lookup table.
1492  *
1493  * The lookup table has 7 inputs: bt3_prio, bt3_txrx, bt_rf_act, wifi_req,
1494 * wifi_prio, wifi_txrx and wifi_sh_ant_req.
1495  *
1496  * It has three outputs: WLAN_ACTIVE, WLAN_KILL and ANT_SWITCH
1497  *
1498  * The format is that "registers" 8 through 11 contain the WLAN_ACTIVE bits
1499  * one after another in 32-bit registers, and "registers" 0 through 7 contain
1500  * the WLAN_KILL and ANT_SWITCH bits interleaved (in that order).
1501  *
1502  * These macros encode that format.
1503  */
1504 #define LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, wifi_req, wifi_prio, \
1505                   wifi_txrx, wifi_sh_ant_req) \
1506         (bt3_prio | (bt3_txrx << 1) | (bt_rf_act << 2) | (wifi_req << 3) | \
1507         (wifi_prio << 4) | (wifi_txrx << 5) | (wifi_sh_ant_req << 6))
1508
1509 #define LUT_PTA_WLAN_ACTIVE_OP(lut, op, val) \
1510         lut[8 + ((val) >> 5)] op (cpu_to_le32(BIT((val) & 0x1f)))
1511 #define LUT_TEST_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1512                                  wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1513         (!!(LUT_PTA_WLAN_ACTIVE_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, \
1514                                    bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
1515                                    wifi_sh_ant_req))))
1516 #define LUT_SET_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1517                                 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1518         LUT_PTA_WLAN_ACTIVE_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, \
1519                                bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
1520                                wifi_sh_ant_req))
1521 #define LUT_CLEAR_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, \
1522                                   wifi_req, wifi_prio, wifi_txrx, \
1523                                   wifi_sh_ant_req) \
1524         LUT_PTA_WLAN_ACTIVE_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, \
1525                                bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
1526                                wifi_sh_ant_req))
1527
1528 #define LUT_WLAN_KILL_OP(lut, op, val) \
1529         lut[(val) >> 4] op (cpu_to_le32(BIT(((val) << 1) & 0x1e)))
1530 #define LUT_TEST_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1531                            wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1532         (!!(LUT_WLAN_KILL_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1533                              wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))))
1534 #define LUT_SET_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1535                           wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1536         LUT_WLAN_KILL_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1537                          wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1538 #define LUT_CLEAR_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1539                             wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1540         LUT_WLAN_KILL_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1541                          wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1542
1543 #define LUT_ANT_SWITCH_OP(lut, op, val) \
1544         lut[(val) >> 4] op (cpu_to_le32(BIT((((val) << 1) & 0x1e) + 1)))
1545 #define LUT_TEST_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1546                             wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1547         (!!(LUT_ANT_SWITCH_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1548                               wifi_req, wifi_prio, wifi_txrx, \
1549                               wifi_sh_ant_req))))
1550 #define LUT_SET_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1551                            wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1552         LUT_ANT_SWITCH_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1553                           wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1554 #define LUT_CLEAR_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1555                              wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1556         LUT_ANT_SWITCH_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1557                           wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1558
1559 static const __le32 iwlagn_def_3w_lookup[12] = {
1560         cpu_to_le32(0xaaaaaaaa),
1561         cpu_to_le32(0xaaaaaaaa),
1562         cpu_to_le32(0xaeaaaaaa),
1563         cpu_to_le32(0xaaaaaaaa),
1564         cpu_to_le32(0xcc00ff28),
1565         cpu_to_le32(0x0000aaaa),
1566         cpu_to_le32(0xcc00aaaa),
1567         cpu_to_le32(0x0000aaaa),
1568         cpu_to_le32(0xc0004000),
1569         cpu_to_le32(0x00004000),
1570         cpu_to_le32(0xf0005000),
1571         cpu_to_le32(0xf0005000),
1572 };
1573
1574 static const __le32 iwlagn_concurrent_lookup[12] = {
1575         cpu_to_le32(0xaaaaaaaa),
1576         cpu_to_le32(0xaaaaaaaa),
1577         cpu_to_le32(0xaaaaaaaa),
1578         cpu_to_le32(0xaaaaaaaa),
1579         cpu_to_le32(0xaaaaaaaa),
1580         cpu_to_le32(0xaaaaaaaa),
1581         cpu_to_le32(0xaaaaaaaa),
1582         cpu_to_le32(0xaaaaaaaa),
1583         cpu_to_le32(0x00000000),
1584         cpu_to_le32(0x00000000),
1585         cpu_to_le32(0x00000000),
1586         cpu_to_le32(0x00000000),
1587 };
1588
1589 void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
1590 {
1591         struct iwl_basic_bt_cmd basic = {
1592                 .max_kill = IWLAGN_BT_MAX_KILL_DEFAULT,
1593                 .bt3_timer_t7_value = IWLAGN_BT3_T7_DEFAULT,
1594                 .bt3_prio_sample_time = IWLAGN_BT3_PRIO_SAMPLE_DEFAULT,
1595                 .bt3_timer_t2_value = IWLAGN_BT3_T2_DEFAULT,
1596         };
1597         struct iwl6000_bt_cmd bt_cmd_6000;
1598         struct iwl2000_bt_cmd bt_cmd_2000;
1599         int ret;
1600
1601         BUILD_BUG_ON(sizeof(iwlagn_def_3w_lookup) !=
1602                         sizeof(basic.bt3_lookup_table));
1603
1604         if (priv->cfg->bt_params) {
1605                 if (priv->cfg->bt_params->bt_session_2) {
1606                         bt_cmd_2000.prio_boost = cpu_to_le32(
1607                                 priv->cfg->bt_params->bt_prio_boost);
1608                         bt_cmd_2000.tx_prio_boost = 0;
1609                         bt_cmd_2000.rx_prio_boost = 0;
1610                 } else {
1611                         bt_cmd_6000.prio_boost =
1612                                 priv->cfg->bt_params->bt_prio_boost;
1613                         bt_cmd_6000.tx_prio_boost = 0;
1614                         bt_cmd_6000.rx_prio_boost = 0;
1615                 }
1616         } else {
1617                 IWL_ERR(priv, "failed to construct BT Coex Config\n");
1618                 return;
1619         }
1620
1621         basic.kill_ack_mask = priv->kill_ack_mask;
1622         basic.kill_cts_mask = priv->kill_cts_mask;
1623         basic.valid = priv->bt_valid;
1624
1625         /*
1626          * Configure BT coex mode to "no coexistence" when the
1627          * user disabled BT coexistence, we have no interface
1628          * (might be in monitor mode), or the interface is in
1629          * IBSS mode (no proper uCode support for coex then).
1630          */
1631         if (!iwlagn_mod_params.bt_coex_active ||
1632             priv->iw_mode == NL80211_IFTYPE_ADHOC) {
1633                 basic.flags = IWLAGN_BT_FLAG_COEX_MODE_DISABLED;
1634         } else {
1635                 basic.flags = IWLAGN_BT_FLAG_COEX_MODE_3W <<
1636                                         IWLAGN_BT_FLAG_COEX_MODE_SHIFT;
1637
1638                 if (!priv->bt_enable_pspoll)
1639                         basic.flags |= IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE;
1640                 else
1641                         basic.flags &= ~IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE;
1642
1643                 if (priv->bt_ch_announce)
1644                         basic.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION;
1645                 IWL_DEBUG_COEX(priv, "BT coex flag: 0X%x\n", basic.flags);
1646         }
1647         priv->bt_enable_flag = basic.flags;
1648         if (priv->bt_full_concurrent)
1649                 memcpy(basic.bt3_lookup_table, iwlagn_concurrent_lookup,
1650                         sizeof(iwlagn_concurrent_lookup));
1651         else
1652                 memcpy(basic.bt3_lookup_table, iwlagn_def_3w_lookup,
1653                         sizeof(iwlagn_def_3w_lookup));
1654
1655         IWL_DEBUG_COEX(priv, "BT coex %s in %s mode\n",
1656                        basic.flags ? "active" : "disabled",
1657                        priv->bt_full_concurrent ?
1658                        "full concurrency" : "3-wire");
1659
1660         if (priv->cfg->bt_params->bt_session_2) {
1661                 memcpy(&bt_cmd_2000.basic, &basic,
1662                         sizeof(basic));
1663                 ret = trans_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1664                         CMD_SYNC, sizeof(bt_cmd_2000), &bt_cmd_2000);
1665         } else {
1666                 memcpy(&bt_cmd_6000.basic, &basic,
1667                         sizeof(basic));
1668                 ret = trans_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1669                         CMD_SYNC, sizeof(bt_cmd_6000), &bt_cmd_6000);
1670         }
1671         if (ret)
1672                 IWL_ERR(priv, "failed to send BT Coex Config\n");
1673
1674 }
1675
1676 void iwlagn_bt_adjust_rssi_monitor(struct iwl_priv *priv, bool rssi_ena)
1677 {
1678         struct iwl_rxon_context *ctx, *found_ctx = NULL;
1679         bool found_ap = false;
1680
1681         lockdep_assert_held(&priv->mutex);
1682
1683         /* Check whether AP or GO mode is active. */
1684         if (rssi_ena) {
1685                 for_each_context(priv, ctx) {
1686                         if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_AP &&
1687                             iwl_is_associated_ctx(ctx)) {
1688                                 found_ap = true;
1689                                 break;
1690                         }
1691                 }
1692         }
1693
1694         /*
1695          * If disable was received or If GO/AP mode, disable RSSI
1696          * measurements.
1697          */
1698         if (!rssi_ena || found_ap) {
1699                 if (priv->cur_rssi_ctx) {
1700                         ctx = priv->cur_rssi_ctx;
1701                         ieee80211_disable_rssi_reports(ctx->vif);
1702                         priv->cur_rssi_ctx = NULL;
1703                 }
1704                 return;
1705         }
1706
1707         /*
1708          * If rssi measurements need to be enabled, consider all cases now.
1709          * Figure out how many contexts are active.
1710          */
1711         for_each_context(priv, ctx) {
1712                 if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION &&
1713                     iwl_is_associated_ctx(ctx)) {
1714                         found_ctx = ctx;
1715                         break;
1716                 }
1717         }
1718
1719         /*
1720          * rssi monitor already enabled for the correct interface...nothing
1721          * to do.
1722          */
1723         if (found_ctx == priv->cur_rssi_ctx)
1724                 return;
1725
1726         /*
1727          * Figure out if rssi monitor is currently enabled, and needs
1728          * to be changed. If rssi monitor is already enabled, disable
1729          * it first else just enable rssi measurements on the
1730          * interface found above.
1731          */
1732         if (priv->cur_rssi_ctx) {
1733                 ctx = priv->cur_rssi_ctx;
1734                 if (ctx->vif)
1735                         ieee80211_disable_rssi_reports(ctx->vif);
1736         }
1737
1738         priv->cur_rssi_ctx = found_ctx;
1739
1740         if (!found_ctx)
1741                 return;
1742
1743         ieee80211_enable_rssi_reports(found_ctx->vif,
1744                         IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD,
1745                         IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD);
1746 }
1747
1748 static bool iwlagn_bt_traffic_is_sco(struct iwl_bt_uart_msg *uart_msg)
1749 {
1750         return BT_UART_MSG_FRAME3SCOESCO_MSK & uart_msg->frame3 >>
1751                         BT_UART_MSG_FRAME3SCOESCO_POS;
1752 }
1753
1754 static void iwlagn_bt_traffic_change_work(struct work_struct *work)
1755 {
1756         struct iwl_priv *priv =
1757                 container_of(work, struct iwl_priv, bt_traffic_change_work);
1758         struct iwl_rxon_context *ctx;
1759         int smps_request = -1;
1760
1761         if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
1762                 /* bt coex disabled */
1763                 return;
1764         }
1765
1766         /*
1767          * Note: bt_traffic_load can be overridden by scan complete and
1768          * coex profile notifications. Ignore that since only bad consequence
1769          * can be not matching debug print with actual state.
1770          */
1771         IWL_DEBUG_COEX(priv, "BT traffic load changes: %d\n",
1772                        priv->bt_traffic_load);
1773
1774         switch (priv->bt_traffic_load) {
1775         case IWL_BT_COEX_TRAFFIC_LOAD_NONE:
1776                 if (priv->bt_status)
1777                         smps_request = IEEE80211_SMPS_DYNAMIC;
1778                 else
1779                         smps_request = IEEE80211_SMPS_AUTOMATIC;
1780                 break;
1781         case IWL_BT_COEX_TRAFFIC_LOAD_LOW:
1782                 smps_request = IEEE80211_SMPS_DYNAMIC;
1783                 break;
1784         case IWL_BT_COEX_TRAFFIC_LOAD_HIGH:
1785         case IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS:
1786                 smps_request = IEEE80211_SMPS_STATIC;
1787                 break;
1788         default:
1789                 IWL_ERR(priv, "Invalid BT traffic load: %d\n",
1790                         priv->bt_traffic_load);
1791                 break;
1792         }
1793
1794         mutex_lock(&priv->mutex);
1795
1796         /*
1797          * We can not send command to firmware while scanning. When the scan
1798          * complete we will schedule this work again. We do check with mutex
1799          * locked to prevent new scan request to arrive. We do not check
1800          * STATUS_SCANNING to avoid race when queue_work two times from
1801          * different notifications, but quit and not perform any work at all.
1802          */
1803         if (test_bit(STATUS_SCAN_HW, &priv->status))
1804                 goto out;
1805
1806         iwl_update_chain_flags(priv);
1807
1808         if (smps_request != -1) {
1809                 priv->current_ht_config.smps = smps_request;
1810                 for_each_context(priv, ctx) {
1811                         if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION)
1812                                 ieee80211_request_smps(ctx->vif, smps_request);
1813                 }
1814         }
1815
1816         /*
1817          * Dynamic PS poll related functionality. Adjust RSSI measurements if
1818          * necessary.
1819          */
1820         iwlagn_bt_coex_rssi_monitor(priv);
1821 out:
1822         mutex_unlock(&priv->mutex);
1823 }
1824
1825 /*
1826  * If BT sco traffic, and RSSI monitor is enabled, move measurements to the
1827  * correct interface or disable it if this is the last interface to be
1828  * removed.
1829  */
1830 void iwlagn_bt_coex_rssi_monitor(struct iwl_priv *priv)
1831 {
1832         if (priv->bt_is_sco &&
1833             priv->bt_traffic_load == IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS)
1834                 iwlagn_bt_adjust_rssi_monitor(priv, true);
1835         else
1836                 iwlagn_bt_adjust_rssi_monitor(priv, false);
1837 }
1838
1839 static void iwlagn_print_uartmsg(struct iwl_priv *priv,
1840                                 struct iwl_bt_uart_msg *uart_msg)
1841 {
1842         IWL_DEBUG_COEX(priv, "Message Type = 0x%X, SSN = 0x%X, "
1843                         "Update Req = 0x%X",
1844                 (BT_UART_MSG_FRAME1MSGTYPE_MSK & uart_msg->frame1) >>
1845                         BT_UART_MSG_FRAME1MSGTYPE_POS,
1846                 (BT_UART_MSG_FRAME1SSN_MSK & uart_msg->frame1) >>
1847                         BT_UART_MSG_FRAME1SSN_POS,
1848                 (BT_UART_MSG_FRAME1UPDATEREQ_MSK & uart_msg->frame1) >>
1849                         BT_UART_MSG_FRAME1UPDATEREQ_POS);
1850
1851         IWL_DEBUG_COEX(priv, "Open connections = 0x%X, Traffic load = 0x%X, "
1852                         "Chl_SeqN = 0x%X, In band = 0x%X",
1853                 (BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK & uart_msg->frame2) >>
1854                         BT_UART_MSG_FRAME2OPENCONNECTIONS_POS,
1855                 (BT_UART_MSG_FRAME2TRAFFICLOAD_MSK & uart_msg->frame2) >>
1856                         BT_UART_MSG_FRAME2TRAFFICLOAD_POS,
1857                 (BT_UART_MSG_FRAME2CHLSEQN_MSK & uart_msg->frame2) >>
1858                         BT_UART_MSG_FRAME2CHLSEQN_POS,
1859                 (BT_UART_MSG_FRAME2INBAND_MSK & uart_msg->frame2) >>
1860                         BT_UART_MSG_FRAME2INBAND_POS);
1861
1862         IWL_DEBUG_COEX(priv, "SCO/eSCO = 0x%X, Sniff = 0x%X, A2DP = 0x%X, "
1863                         "ACL = 0x%X, Master = 0x%X, OBEX = 0x%X",
1864                 (BT_UART_MSG_FRAME3SCOESCO_MSK & uart_msg->frame3) >>
1865                         BT_UART_MSG_FRAME3SCOESCO_POS,
1866                 (BT_UART_MSG_FRAME3SNIFF_MSK & uart_msg->frame3) >>
1867                         BT_UART_MSG_FRAME3SNIFF_POS,
1868                 (BT_UART_MSG_FRAME3A2DP_MSK & uart_msg->frame3) >>
1869                         BT_UART_MSG_FRAME3A2DP_POS,
1870                 (BT_UART_MSG_FRAME3ACL_MSK & uart_msg->frame3) >>
1871                         BT_UART_MSG_FRAME3ACL_POS,
1872                 (BT_UART_MSG_FRAME3MASTER_MSK & uart_msg->frame3) >>
1873                         BT_UART_MSG_FRAME3MASTER_POS,
1874                 (BT_UART_MSG_FRAME3OBEX_MSK & uart_msg->frame3) >>
1875                         BT_UART_MSG_FRAME3OBEX_POS);
1876
1877         IWL_DEBUG_COEX(priv, "Idle duration = 0x%X",
1878                 (BT_UART_MSG_FRAME4IDLEDURATION_MSK & uart_msg->frame4) >>
1879                         BT_UART_MSG_FRAME4IDLEDURATION_POS);
1880
1881         IWL_DEBUG_COEX(priv, "Tx Activity = 0x%X, Rx Activity = 0x%X, "
1882                         "eSCO Retransmissions = 0x%X",
1883                 (BT_UART_MSG_FRAME5TXACTIVITY_MSK & uart_msg->frame5) >>
1884                         BT_UART_MSG_FRAME5TXACTIVITY_POS,
1885                 (BT_UART_MSG_FRAME5RXACTIVITY_MSK & uart_msg->frame5) >>
1886                         BT_UART_MSG_FRAME5RXACTIVITY_POS,
1887                 (BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK & uart_msg->frame5) >>
1888                         BT_UART_MSG_FRAME5ESCORETRANSMIT_POS);
1889
1890         IWL_DEBUG_COEX(priv, "Sniff Interval = 0x%X, Discoverable = 0x%X",
1891                 (BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK & uart_msg->frame6) >>
1892                         BT_UART_MSG_FRAME6SNIFFINTERVAL_POS,
1893                 (BT_UART_MSG_FRAME6DISCOVERABLE_MSK & uart_msg->frame6) >>
1894                         BT_UART_MSG_FRAME6DISCOVERABLE_POS);
1895
1896         IWL_DEBUG_COEX(priv, "Sniff Activity = 0x%X, Page = "
1897                         "0x%X, Inquiry = 0x%X, Connectable = 0x%X",
1898                 (BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK & uart_msg->frame7) >>
1899                         BT_UART_MSG_FRAME7SNIFFACTIVITY_POS,
1900                 (BT_UART_MSG_FRAME7PAGE_MSK & uart_msg->frame7) >>
1901                         BT_UART_MSG_FRAME7PAGE_POS,
1902                 (BT_UART_MSG_FRAME7INQUIRY_MSK & uart_msg->frame7) >>
1903                         BT_UART_MSG_FRAME7INQUIRY_POS,
1904                 (BT_UART_MSG_FRAME7CONNECTABLE_MSK & uart_msg->frame7) >>
1905                         BT_UART_MSG_FRAME7CONNECTABLE_POS);
1906 }
1907
1908 static void iwlagn_set_kill_msk(struct iwl_priv *priv,
1909                                 struct iwl_bt_uart_msg *uart_msg)
1910 {
1911         u8 kill_msk;
1912         static const __le32 bt_kill_ack_msg[2] = {
1913                 IWLAGN_BT_KILL_ACK_MASK_DEFAULT,
1914                 IWLAGN_BT_KILL_ACK_CTS_MASK_SCO };
1915         static const __le32 bt_kill_cts_msg[2] = {
1916                 IWLAGN_BT_KILL_CTS_MASK_DEFAULT,
1917                 IWLAGN_BT_KILL_ACK_CTS_MASK_SCO };
1918
1919         kill_msk = (BT_UART_MSG_FRAME3SCOESCO_MSK & uart_msg->frame3)
1920                 ? 1 : 0;
1921         if (priv->kill_ack_mask != bt_kill_ack_msg[kill_msk] ||
1922             priv->kill_cts_mask != bt_kill_cts_msg[kill_msk]) {
1923                 priv->bt_valid |= IWLAGN_BT_VALID_KILL_ACK_MASK;
1924                 priv->kill_ack_mask = bt_kill_ack_msg[kill_msk];
1925                 priv->bt_valid |= IWLAGN_BT_VALID_KILL_CTS_MASK;
1926                 priv->kill_cts_mask = bt_kill_cts_msg[kill_msk];
1927
1928                 /* schedule to send runtime bt_config */
1929                 queue_work(priv->workqueue, &priv->bt_runtime_config);
1930         }
1931 }
1932
1933 void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
1934                                              struct iwl_rx_mem_buffer *rxb)
1935 {
1936         unsigned long flags;
1937         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1938         struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif;
1939         struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg;
1940
1941         if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
1942                 /* bt coex disabled */
1943                 return;
1944         }
1945
1946         IWL_DEBUG_COEX(priv, "BT Coex notification:\n");
1947         IWL_DEBUG_COEX(priv, "    status: %d\n", coex->bt_status);
1948         IWL_DEBUG_COEX(priv, "    traffic load: %d\n", coex->bt_traffic_load);
1949         IWL_DEBUG_COEX(priv, "    CI compliance: %d\n",
1950                         coex->bt_ci_compliance);
1951         iwlagn_print_uartmsg(priv, uart_msg);
1952
1953         priv->last_bt_traffic_load = priv->bt_traffic_load;
1954         priv->bt_is_sco = iwlagn_bt_traffic_is_sco(uart_msg);
1955
1956         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
1957                 if (priv->bt_status != coex->bt_status ||
1958                     priv->last_bt_traffic_load != coex->bt_traffic_load) {
1959                         if (coex->bt_status) {
1960                                 /* BT on */
1961                                 if (!priv->bt_ch_announce)
1962                                         priv->bt_traffic_load =
1963                                                 IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1964                                 else
1965                                         priv->bt_traffic_load =
1966                                                 coex->bt_traffic_load;
1967                         } else {
1968                                 /* BT off */
1969                                 priv->bt_traffic_load =
1970                                         IWL_BT_COEX_TRAFFIC_LOAD_NONE;
1971                         }
1972                         priv->bt_status = coex->bt_status;
1973                         queue_work(priv->workqueue,
1974                                    &priv->bt_traffic_change_work);
1975                 }
1976         }
1977
1978         iwlagn_set_kill_msk(priv, uart_msg);
1979
1980         /* FIXME: based on notification, adjust the prio_boost */
1981
1982         spin_lock_irqsave(&priv->lock, flags);
1983         priv->bt_ci_compliance = coex->bt_ci_compliance;
1984         spin_unlock_irqrestore(&priv->lock, flags);
1985 }
1986
1987 void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv)
1988 {
1989         iwlagn_rx_handler_setup(priv);
1990         priv->rx_handlers[REPLY_BT_COEX_PROFILE_NOTIF] =
1991                 iwlagn_bt_coex_profile_notif;
1992 }
1993
1994 void iwlagn_bt_setup_deferred_work(struct iwl_priv *priv)
1995 {
1996         iwlagn_setup_deferred_work(priv);
1997
1998         INIT_WORK(&priv->bt_traffic_change_work,
1999                   iwlagn_bt_traffic_change_work);
2000 }
2001
2002 void iwlagn_bt_cancel_deferred_work(struct iwl_priv *priv)
2003 {
2004         cancel_work_sync(&priv->bt_traffic_change_work);
2005 }
2006
2007 static bool is_single_rx_stream(struct iwl_priv *priv)
2008 {
2009         return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
2010                priv->current_ht_config.single_chain_sufficient;
2011 }
2012
2013 #define IWL_NUM_RX_CHAINS_MULTIPLE      3
2014 #define IWL_NUM_RX_CHAINS_SINGLE        2
2015 #define IWL_NUM_IDLE_CHAINS_DUAL        2
2016 #define IWL_NUM_IDLE_CHAINS_SINGLE      1
2017
2018 /*
2019  * Determine how many receiver/antenna chains to use.
2020  *
2021  * More provides better reception via diversity.  Fewer saves power
2022  * at the expense of throughput, but only when not in powersave to
2023  * start with.
2024  *
2025  * MIMO (dual stream) requires at least 2, but works better with 3.
2026  * This does not determine *which* chains to use, just how many.
2027  */
2028 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
2029 {
2030         if (priv->cfg->bt_params &&
2031             priv->cfg->bt_params->advanced_bt_coexist &&
2032             (priv->bt_full_concurrent ||
2033              priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
2034                 /*
2035                  * only use chain 'A' in bt high traffic load or
2036                  * full concurrency mode
2037                  */
2038                 return IWL_NUM_RX_CHAINS_SINGLE;
2039         }
2040         /* # of Rx chains to use when expecting MIMO. */
2041         if (is_single_rx_stream(priv))
2042                 return IWL_NUM_RX_CHAINS_SINGLE;
2043         else
2044                 return IWL_NUM_RX_CHAINS_MULTIPLE;
2045 }
2046
2047 /*
2048  * When we are in power saving mode, unless device support spatial
2049  * multiplexing power save, use the active count for rx chain count.
2050  */
2051 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
2052 {
2053         /* # Rx chains when idling, depending on SMPS mode */
2054         switch (priv->current_ht_config.smps) {
2055         case IEEE80211_SMPS_STATIC:
2056         case IEEE80211_SMPS_DYNAMIC:
2057                 return IWL_NUM_IDLE_CHAINS_SINGLE;
2058         case IEEE80211_SMPS_OFF:
2059                 return active_cnt;
2060         default:
2061                 WARN(1, "invalid SMPS mode %d",
2062                      priv->current_ht_config.smps);
2063                 return active_cnt;
2064         }
2065 }
2066
2067 /* up to 4 chains */
2068 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
2069 {
2070         u8 res;
2071         res = (chain_bitmap & BIT(0)) >> 0;
2072         res += (chain_bitmap & BIT(1)) >> 1;
2073         res += (chain_bitmap & BIT(2)) >> 2;
2074         res += (chain_bitmap & BIT(3)) >> 3;
2075         return res;
2076 }
2077
2078 /**
2079  * iwlagn_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
2080  *
2081  * Selects how many and which Rx receivers/antennas/chains to use.
2082  * This should not be used for scan command ... it puts data in wrong place.
2083  */
2084 void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2085 {
2086         bool is_single = is_single_rx_stream(priv);
2087         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
2088         u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
2089         u32 active_chains;
2090         u16 rx_chain;
2091
2092         /* Tell uCode which antennas are actually connected.
2093          * Before first association, we assume all antennas are connected.
2094          * Just after first association, iwl_chain_noise_calibration()
2095          *    checks which antennas actually *are* connected. */
2096         if (priv->chain_noise_data.active_chains)
2097                 active_chains = priv->chain_noise_data.active_chains;
2098         else
2099                 active_chains = priv->hw_params.valid_rx_ant;
2100
2101         if (priv->cfg->bt_params &&
2102             priv->cfg->bt_params->advanced_bt_coexist &&
2103             (priv->bt_full_concurrent ||
2104              priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
2105                 /*
2106                  * only use chain 'A' in bt high traffic load or
2107                  * full concurrency mode
2108                  */
2109                 active_chains = first_antenna(active_chains);
2110         }
2111
2112         rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
2113
2114         /* How many receivers should we use? */
2115         active_rx_cnt = iwl_get_active_rx_chain_count(priv);
2116         idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
2117
2118
2119         /* correct rx chain count according hw settings
2120          * and chain noise calibration
2121          */
2122         valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
2123         if (valid_rx_cnt < active_rx_cnt)
2124                 active_rx_cnt = valid_rx_cnt;
2125
2126         if (valid_rx_cnt < idle_rx_cnt)
2127                 idle_rx_cnt = valid_rx_cnt;
2128
2129         rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
2130         rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;
2131
2132         ctx->staging.rx_chain = cpu_to_le16(rx_chain);
2133
2134         if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
2135                 ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2136         else
2137                 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2138
2139         IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
2140                         ctx->staging.rx_chain,
2141                         active_rx_cnt, idle_rx_cnt);
2142
2143         WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
2144                 active_rx_cnt < idle_rx_cnt);
2145 }
2146
2147 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
2148 {
2149         int i;
2150         u8 ind = ant;
2151
2152         if (priv->band == IEEE80211_BAND_2GHZ &&
2153             priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
2154                 return 0;
2155
2156         for (i = 0; i < RATE_ANT_NUM - 1; i++) {
2157                 ind = (ind + 1) < RATE_ANT_NUM ?  ind + 1 : 0;
2158                 if (valid & BIT(ind))
2159                         return ind;
2160         }
2161         return ant;
2162 }
2163
2164 static const char *get_csr_string(int cmd)
2165 {
2166         switch (cmd) {
2167         IWL_CMD(CSR_HW_IF_CONFIG_REG);
2168         IWL_CMD(CSR_INT_COALESCING);
2169         IWL_CMD(CSR_INT);
2170         IWL_CMD(CSR_INT_MASK);
2171         IWL_CMD(CSR_FH_INT_STATUS);
2172         IWL_CMD(CSR_GPIO_IN);
2173         IWL_CMD(CSR_RESET);
2174         IWL_CMD(CSR_GP_CNTRL);
2175         IWL_CMD(CSR_HW_REV);
2176         IWL_CMD(CSR_EEPROM_REG);
2177         IWL_CMD(CSR_EEPROM_GP);
2178         IWL_CMD(CSR_OTP_GP_REG);
2179         IWL_CMD(CSR_GIO_REG);
2180         IWL_CMD(CSR_GP_UCODE_REG);
2181         IWL_CMD(CSR_GP_DRIVER_REG);
2182         IWL_CMD(CSR_UCODE_DRV_GP1);
2183         IWL_CMD(CSR_UCODE_DRV_GP2);
2184         IWL_CMD(CSR_LED_REG);
2185         IWL_CMD(CSR_DRAM_INT_TBL_REG);
2186         IWL_CMD(CSR_GIO_CHICKEN_BITS);
2187         IWL_CMD(CSR_ANA_PLL_CFG);
2188         IWL_CMD(CSR_HW_REV_WA_REG);
2189         IWL_CMD(CSR_DBG_HPET_MEM_REG);
2190         default:
2191                 return "UNKNOWN";
2192         }
2193 }
2194
2195 void iwl_dump_csr(struct iwl_priv *priv)
2196 {
2197         int i;
2198         static const u32 csr_tbl[] = {
2199                 CSR_HW_IF_CONFIG_REG,
2200                 CSR_INT_COALESCING,
2201                 CSR_INT,
2202                 CSR_INT_MASK,
2203                 CSR_FH_INT_STATUS,
2204                 CSR_GPIO_IN,
2205                 CSR_RESET,
2206                 CSR_GP_CNTRL,
2207                 CSR_HW_REV,
2208                 CSR_EEPROM_REG,
2209                 CSR_EEPROM_GP,
2210                 CSR_OTP_GP_REG,
2211                 CSR_GIO_REG,
2212                 CSR_GP_UCODE_REG,
2213                 CSR_GP_DRIVER_REG,
2214                 CSR_UCODE_DRV_GP1,
2215                 CSR_UCODE_DRV_GP2,
2216                 CSR_LED_REG,
2217                 CSR_DRAM_INT_TBL_REG,
2218                 CSR_GIO_CHICKEN_BITS,
2219                 CSR_ANA_PLL_CFG,
2220                 CSR_HW_REV_WA_REG,
2221                 CSR_DBG_HPET_MEM_REG
2222         };
2223         IWL_ERR(priv, "CSR values:\n");
2224         IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2225                 "CSR_INT_PERIODIC_REG)\n");
2226         for (i = 0; i <  ARRAY_SIZE(csr_tbl); i++) {
2227                 IWL_ERR(priv, "  %25s: 0X%08x\n",
2228                         get_csr_string(csr_tbl[i]),
2229                         iwl_read32(priv, csr_tbl[i]));
2230         }
2231 }
2232
2233 static const char *get_fh_string(int cmd)
2234 {
2235         switch (cmd) {
2236         IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2237         IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2238         IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2239         IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2240         IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2241         IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2242         IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2243         IWL_CMD(FH_TSSR_TX_STATUS_REG);
2244         IWL_CMD(FH_TSSR_TX_ERROR_REG);
2245         default:
2246                 return "UNKNOWN";
2247         }
2248 }
2249
2250 int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2251 {
2252         int i;
2253 #ifdef CONFIG_IWLWIFI_DEBUG
2254         int pos = 0;
2255         size_t bufsz = 0;
2256 #endif
2257         static const u32 fh_tbl[] = {
2258                 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2259                 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2260                 FH_RSCSR_CHNL0_WPTR,
2261                 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2262                 FH_MEM_RSSR_SHARED_CTRL_REG,
2263                 FH_MEM_RSSR_RX_STATUS_REG,
2264                 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2265                 FH_TSSR_TX_STATUS_REG,
2266                 FH_TSSR_TX_ERROR_REG
2267         };
2268 #ifdef CONFIG_IWLWIFI_DEBUG
2269         if (display) {
2270                 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2271                 *buf = kmalloc(bufsz, GFP_KERNEL);
2272                 if (!*buf)
2273                         return -ENOMEM;
2274                 pos += scnprintf(*buf + pos, bufsz - pos,
2275                                 "FH register values:\n");
2276                 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2277                         pos += scnprintf(*buf + pos, bufsz - pos,
2278                                 "  %34s: 0X%08x\n",
2279                                 get_fh_string(fh_tbl[i]),
2280                                 iwl_read_direct32(priv, fh_tbl[i]));
2281                 }
2282                 return pos;
2283         }
2284 #endif
2285         IWL_ERR(priv, "FH register values:\n");
2286         for (i = 0; i <  ARRAY_SIZE(fh_tbl); i++) {
2287                 IWL_ERR(priv, "  %34s: 0X%08x\n",
2288                         get_fh_string(fh_tbl[i]),
2289                         iwl_read_direct32(priv, fh_tbl[i]));
2290         }
2291         return 0;
2292 }
2293
2294 /* notification wait support */
2295 void iwlagn_init_notification_wait(struct iwl_priv *priv,
2296                                    struct iwl_notification_wait *wait_entry,
2297                                    u8 cmd,
2298                                    void (*fn)(struct iwl_priv *priv,
2299                                               struct iwl_rx_packet *pkt,
2300                                               void *data),
2301                                    void *fn_data)
2302 {
2303         wait_entry->fn = fn;
2304         wait_entry->fn_data = fn_data;
2305         wait_entry->cmd = cmd;
2306         wait_entry->triggered = false;
2307         wait_entry->aborted = false;
2308
2309         spin_lock_bh(&priv->_agn.notif_wait_lock);
2310         list_add(&wait_entry->list, &priv->_agn.notif_waits);
2311         spin_unlock_bh(&priv->_agn.notif_wait_lock);
2312 }
2313
2314 int iwlagn_wait_notification(struct iwl_priv *priv,
2315                              struct iwl_notification_wait *wait_entry,
2316                              unsigned long timeout)
2317 {
2318         int ret;
2319
2320         ret = wait_event_timeout(priv->_agn.notif_waitq,
2321                                  wait_entry->triggered || wait_entry->aborted,
2322                                  timeout);
2323
2324         spin_lock_bh(&priv->_agn.notif_wait_lock);
2325         list_del(&wait_entry->list);
2326         spin_unlock_bh(&priv->_agn.notif_wait_lock);
2327
2328         if (wait_entry->aborted)
2329                 return -EIO;
2330
2331         /* return value is always >= 0 */
2332         if (ret <= 0)
2333                 return -ETIMEDOUT;
2334         return 0;
2335 }
2336
2337 void iwlagn_remove_notification(struct iwl_priv *priv,
2338                                 struct iwl_notification_wait *wait_entry)
2339 {
2340         spin_lock_bh(&priv->_agn.notif_wait_lock);
2341         list_del(&wait_entry->list);
2342         spin_unlock_bh(&priv->_agn.notif_wait_lock);
2343 }
2344
2345 int iwlagn_start_device(struct iwl_priv *priv)
2346 {
2347         int ret;
2348
2349         if ((priv->cfg->sku & EEPROM_SKU_CAP_AMT_ENABLE) &&
2350              iwl_prepare_card_hw(priv)) {
2351                 IWL_WARN(priv, "Exit HW not ready\n");
2352                 return -EIO;
2353         }
2354
2355         /* If platform's RF_KILL switch is NOT set to KILL */
2356         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2357                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2358         else
2359                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2360
2361         if (iwl_is_rfkill(priv)) {
2362                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2363                 iwl_enable_interrupts(priv);
2364                 return -ERFKILL;
2365         }
2366
2367         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2368
2369         ret = iwlagn_hw_nic_init(priv);
2370         if (ret) {
2371                 IWL_ERR(priv, "Unable to init nic\n");
2372                 return ret;
2373         }
2374
2375         /* make sure rfkill handshake bits are cleared */
2376         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2377         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2378                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2379
2380         /* clear (again), then enable host interrupts */
2381         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2382         iwl_enable_interrupts(priv);
2383
2384         /* really make sure rfkill handshake bits are cleared */
2385         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2386         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2387
2388         return 0;
2389 }
2390
2391 void iwlagn_stop_device(struct iwl_priv *priv)
2392 {
2393         unsigned long flags;
2394
2395         /* stop and reset the on-board processor */
2396         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2397
2398         /* tell the device to stop sending interrupts */
2399         spin_lock_irqsave(&priv->lock, flags);
2400         iwl_disable_interrupts(priv);
2401         spin_unlock_irqrestore(&priv->lock, flags);
2402         iwl_synchronize_irq(priv);
2403
2404         /* device going down, Stop using ICT table */
2405         iwl_disable_ict(priv);
2406
2407         /*
2408          * If a HW restart happens during firmware loading,
2409          * then the firmware loading might call this function
2410          * and later it might be called again due to the
2411          * restart. So don't process again if the device is
2412          * already dead.
2413          */
2414         if (test_bit(STATUS_DEVICE_ENABLED, &priv->status)) {
2415                 trans_tx_stop(priv);
2416                 trans_rx_stop(priv);
2417
2418                 /* Power-down device's busmaster DMA clocks */
2419                 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2420                                APMG_CLK_VAL_DMA_CLK_RQT);
2421                 udelay(5);
2422         }
2423
2424         /* Make sure (redundant) we've released our request to stay awake */
2425         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2426
2427         /* Stop the device, and put it in low power state */
2428         iwl_apm_stop(priv);
2429 }