ipv6: Use ERR_CAST in addrconf_dst_alloc.
[pandora-kernel.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  *  Intel Linux Wireless <ilw@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/sched.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-eeprom.h"
42 #include "iwl-dev.h"
43 #include "iwl-core.h"
44 #include "iwl-io.h"
45 #include "iwl-helpers.h"
46 #include "iwl-agn-calib.h"
47 #include "iwl-sta.h"
48 #include "iwl-agn-led.h"
49 #include "iwl-agn.h"
50 #include "iwl-agn-debugfs.h"
51 #include "iwl-legacy.h"
52
53 static int iwl4965_send_tx_power(struct iwl_priv *priv);
54 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
55
56 /* Highest firmware API version supported */
57 #define IWL4965_UCODE_API_MAX 2
58
59 /* Lowest firmware API version supported */
60 #define IWL4965_UCODE_API_MIN 2
61
62 #define IWL4965_FW_PRE "iwlwifi-4965-"
63 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
64 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
65
66 /* check contents of special bootstrap uCode SRAM */
67 static int iwl4965_verify_bsm(struct iwl_priv *priv)
68 {
69         __le32 *image = priv->ucode_boot.v_addr;
70         u32 len = priv->ucode_boot.len;
71         u32 reg;
72         u32 val;
73
74         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
75
76         /* verify BSM SRAM contents */
77         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
78         for (reg = BSM_SRAM_LOWER_BOUND;
79              reg < BSM_SRAM_LOWER_BOUND + len;
80              reg += sizeof(u32), image++) {
81                 val = iwl_read_prph(priv, reg);
82                 if (val != le32_to_cpu(*image)) {
83                         IWL_ERR(priv, "BSM uCode verification failed at "
84                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
85                                   BSM_SRAM_LOWER_BOUND,
86                                   reg - BSM_SRAM_LOWER_BOUND, len,
87                                   val, le32_to_cpu(*image));
88                         return -EIO;
89                 }
90         }
91
92         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
93
94         return 0;
95 }
96
97 /**
98  * iwl4965_load_bsm - Load bootstrap instructions
99  *
100  * BSM operation:
101  *
102  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
103  * in special SRAM that does not power down during RFKILL.  When powering back
104  * up after power-saving sleeps (or during initial uCode load), the BSM loads
105  * the bootstrap program into the on-board processor, and starts it.
106  *
107  * The bootstrap program loads (via DMA) instructions and data for a new
108  * program from host DRAM locations indicated by the host driver in the
109  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
110  * automatically.
111  *
112  * When initializing the NIC, the host driver points the BSM to the
113  * "initialize" uCode image.  This uCode sets up some internal data, then
114  * notifies host via "initialize alive" that it is complete.
115  *
116  * The host then replaces the BSM_DRAM_* pointer values to point to the
117  * normal runtime uCode instructions and a backup uCode data cache buffer
118  * (filled initially with starting data values for the on-board processor),
119  * then triggers the "initialize" uCode to load and launch the runtime uCode,
120  * which begins normal operation.
121  *
122  * When doing a power-save shutdown, runtime uCode saves data SRAM into
123  * the backup data cache in DRAM before SRAM is powered down.
124  *
125  * When powering back up, the BSM loads the bootstrap program.  This reloads
126  * the runtime uCode instructions and the backup data cache into SRAM,
127  * and re-launches the runtime uCode from where it left off.
128  */
129 static int iwl4965_load_bsm(struct iwl_priv *priv)
130 {
131         __le32 *image = priv->ucode_boot.v_addr;
132         u32 len = priv->ucode_boot.len;
133         dma_addr_t pinst;
134         dma_addr_t pdata;
135         u32 inst_len;
136         u32 data_len;
137         int i;
138         u32 done;
139         u32 reg_offset;
140         int ret;
141
142         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
143
144         priv->ucode_type = UCODE_RT;
145
146         /* make sure bootstrap program is no larger than BSM's SRAM size */
147         if (len > IWL49_MAX_BSM_SIZE)
148                 return -EINVAL;
149
150         /* Tell bootstrap uCode where to find the "Initialize" uCode
151          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
152          * NOTE:  iwl_init_alive_start() will replace these values,
153          *        after the "initialize" uCode has run, to point to
154          *        runtime/protocol instructions and backup data cache.
155          */
156         pinst = priv->ucode_init.p_addr >> 4;
157         pdata = priv->ucode_init_data.p_addr >> 4;
158         inst_len = priv->ucode_init.len;
159         data_len = priv->ucode_init_data.len;
160
161         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
162         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
163         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
164         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
165
166         /* Fill BSM memory with bootstrap instructions */
167         for (reg_offset = BSM_SRAM_LOWER_BOUND;
168              reg_offset < BSM_SRAM_LOWER_BOUND + len;
169              reg_offset += sizeof(u32), image++)
170                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
171
172         ret = iwl4965_verify_bsm(priv);
173         if (ret)
174                 return ret;
175
176         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
177         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
178         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
179         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
180
181         /* Load bootstrap code into instruction SRAM now,
182          *   to prepare to load "initialize" uCode */
183         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
184
185         /* Wait for load of bootstrap uCode to finish */
186         for (i = 0; i < 100; i++) {
187                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
188                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
189                         break;
190                 udelay(10);
191         }
192         if (i < 100)
193                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
194         else {
195                 IWL_ERR(priv, "BSM write did not complete!\n");
196                 return -EIO;
197         }
198
199         /* Enable future boot loads whenever power management unit triggers it
200          *   (e.g. when powering back up after power-save shutdown) */
201         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
202
203
204         return 0;
205 }
206
207 /**
208  * iwl4965_set_ucode_ptrs - Set uCode address location
209  *
210  * Tell initialization uCode where to find runtime uCode.
211  *
212  * BSM registers initially contain pointers to initialization uCode.
213  * We need to replace them to load runtime uCode inst and data,
214  * and to save runtime data when powering down.
215  */
216 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
217 {
218         dma_addr_t pinst;
219         dma_addr_t pdata;
220         int ret = 0;
221
222         /* bits 35:4 for 4965 */
223         pinst = priv->ucode_code.p_addr >> 4;
224         pdata = priv->ucode_data_backup.p_addr >> 4;
225
226         /* Tell bootstrap uCode where to find image to load */
227         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
228         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
229         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
230                                  priv->ucode_data.len);
231
232         /* Inst byte count must be last to set up, bit 31 signals uCode
233          *   that all new ptr/size info is in place */
234         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
235                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
236         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
237
238         return ret;
239 }
240
241 /**
242  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
243  *
244  * Called after REPLY_ALIVE notification received from "initialize" uCode.
245  *
246  * The 4965 "initialize" ALIVE reply contains calibration data for:
247  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
248  *   (3945 does not contain this data).
249  *
250  * Tell "initialize" uCode to go ahead and load the runtime uCode.
251 */
252 static void iwl4965_init_alive_start(struct iwl_priv *priv)
253 {
254         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
255          * This is a paranoid check, because we would not have gotten the
256          * "initialize" alive if code weren't properly loaded.  */
257         if (iwl_verify_ucode(priv)) {
258                 /* Runtime instruction load was bad;
259                  * take it all the way back down so we can try again */
260                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
261                 goto restart;
262         }
263
264         /* Calculate temperature */
265         priv->temperature = iwl4965_hw_get_temperature(priv);
266
267         /* Send pointers to protocol/runtime uCode image ... init code will
268          * load and launch runtime uCode, which will send us another "Alive"
269          * notification. */
270         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
271         if (iwl4965_set_ucode_ptrs(priv)) {
272                 /* Runtime instruction load won't happen;
273                  * take it all the way back down so we can try again */
274                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
275                 goto restart;
276         }
277         return;
278
279 restart:
280         queue_work(priv->workqueue, &priv->restart);
281 }
282
283 static bool is_ht40_channel(__le32 rxon_flags)
284 {
285         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
286                                     >> RXON_FLG_CHANNEL_MODE_POS;
287         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
288                   (chan_mod == CHANNEL_MODE_MIXED));
289 }
290
291 /*
292  * EEPROM handlers
293  */
294 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
295 {
296         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
297 }
298
299 /*
300  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
301  * must be called under priv->lock and mac access
302  */
303 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
304 {
305         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
306 }
307
308 static void iwl4965_nic_config(struct iwl_priv *priv)
309 {
310         unsigned long flags;
311         u16 radio_cfg;
312
313         spin_lock_irqsave(&priv->lock, flags);
314
315         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
316
317         /* write radio config values to register */
318         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
319                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
320                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
321                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
322                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
323
324         /* set CSR_HW_CONFIG_REG for uCode use */
325         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
326                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
327                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
328
329         priv->calib_info = (struct iwl_eeprom_calib_info *)
330                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
331
332         spin_unlock_irqrestore(&priv->lock, flags);
333 }
334
335 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
336  * Called after every association, but this runs only once!
337  *  ... once chain noise is calibrated the first time, it's good forever.  */
338 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
339 {
340         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
341
342         if ((data->state == IWL_CHAIN_NOISE_ALIVE) &&
343             iwl_is_any_associated(priv)) {
344                 struct iwl_calib_diff_gain_cmd cmd;
345
346                 /* clear data for chain noise calibration algorithm */
347                 data->chain_noise_a = 0;
348                 data->chain_noise_b = 0;
349                 data->chain_noise_c = 0;
350                 data->chain_signal_a = 0;
351                 data->chain_signal_b = 0;
352                 data->chain_signal_c = 0;
353                 data->beacon_count = 0;
354
355                 memset(&cmd, 0, sizeof(cmd));
356                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
357                 cmd.diff_gain_a = 0;
358                 cmd.diff_gain_b = 0;
359                 cmd.diff_gain_c = 0;
360                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
361                                  sizeof(cmd), &cmd))
362                         IWL_ERR(priv,
363                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
364                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
365                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
366         }
367 }
368
369 static void iwl4965_gain_computation(struct iwl_priv *priv,
370                 u32 *average_noise,
371                 u16 min_average_noise_antenna_i,
372                 u32 min_average_noise,
373                 u8 default_chain)
374 {
375         int i, ret;
376         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
377
378         data->delta_gain_code[min_average_noise_antenna_i] = 0;
379
380         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
381                 s32 delta_g = 0;
382
383                 if (!(data->disconn_array[i]) &&
384                     (data->delta_gain_code[i] ==
385                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
386                         delta_g = average_noise[i] - min_average_noise;
387                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
388                         data->delta_gain_code[i] =
389                                 min(data->delta_gain_code[i],
390                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
391
392                         data->delta_gain_code[i] =
393                                 (data->delta_gain_code[i] | (1 << 2));
394                 } else {
395                         data->delta_gain_code[i] = 0;
396                 }
397         }
398         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
399                      data->delta_gain_code[0],
400                      data->delta_gain_code[1],
401                      data->delta_gain_code[2]);
402
403         /* Differential gain gets sent to uCode only once */
404         if (!data->radio_write) {
405                 struct iwl_calib_diff_gain_cmd cmd;
406                 data->radio_write = 1;
407
408                 memset(&cmd, 0, sizeof(cmd));
409                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
410                 cmd.diff_gain_a = data->delta_gain_code[0];
411                 cmd.diff_gain_b = data->delta_gain_code[1];
412                 cmd.diff_gain_c = data->delta_gain_code[2];
413                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
414                                       sizeof(cmd), &cmd);
415                 if (ret)
416                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
417                                      "REPLY_PHY_CALIBRATION_CMD\n");
418
419                 /* TODO we might want recalculate
420                  * rx_chain in rxon cmd */
421
422                 /* Mark so we run this algo only once! */
423                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
424         }
425 }
426
427 static void iwl4965_bg_txpower_work(struct work_struct *work)
428 {
429         struct iwl_priv *priv = container_of(work, struct iwl_priv,
430                         txpower_work);
431
432         /* If a scan happened to start before we got here
433          * then just return; the statistics notification will
434          * kick off another scheduled work to compensate for
435          * any temperature delta we missed here. */
436         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
437             test_bit(STATUS_SCANNING, &priv->status))
438                 return;
439
440         mutex_lock(&priv->mutex);
441
442         /* Regardless of if we are associated, we must reconfigure the
443          * TX power since frames can be sent on non-radar channels while
444          * not associated */
445         iwl4965_send_tx_power(priv);
446
447         /* Update last_temperature to keep is_calib_needed from running
448          * when it isn't needed... */
449         priv->last_temperature = priv->temperature;
450
451         mutex_unlock(&priv->mutex);
452 }
453
454 /*
455  * Acquire priv->lock before calling this function !
456  */
457 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
458 {
459         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
460                              (index & 0xff) | (txq_id << 8));
461         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
462 }
463
464 /**
465  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
466  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
467  * @scd_retry: (1) Indicates queue will be used in aggregation mode
468  *
469  * NOTE:  Acquire priv->lock before calling this function !
470  */
471 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
472                                         struct iwl_tx_queue *txq,
473                                         int tx_fifo_id, int scd_retry)
474 {
475         int txq_id = txq->q.id;
476
477         /* Find out whether to activate Tx queue */
478         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
479
480         /* Set up and activate */
481         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
482                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
483                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
484                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
485                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
486                          IWL49_SCD_QUEUE_STTS_REG_MSK);
487
488         txq->sched_retry = scd_retry;
489
490         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
491                        active ? "Activate" : "Deactivate",
492                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
493 }
494
495 static const s8 default_queue_to_tx_fifo[] = {
496         IWL_TX_FIFO_VO,
497         IWL_TX_FIFO_VI,
498         IWL_TX_FIFO_BE,
499         IWL_TX_FIFO_BK,
500         IWL49_CMD_FIFO_NUM,
501         IWL_TX_FIFO_UNUSED,
502         IWL_TX_FIFO_UNUSED,
503 };
504
505 static int iwl4965_alive_notify(struct iwl_priv *priv)
506 {
507         u32 a;
508         unsigned long flags;
509         int i, chan;
510         u32 reg_val;
511
512         spin_lock_irqsave(&priv->lock, flags);
513
514         /* Clear 4965's internal Tx Scheduler data base */
515         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
516         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
517         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
518                 iwl_write_targ_mem(priv, a, 0);
519         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
520                 iwl_write_targ_mem(priv, a, 0);
521         for (; a < priv->scd_base_addr +
522                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
523                 iwl_write_targ_mem(priv, a, 0);
524
525         /* Tel 4965 where to find Tx byte count tables */
526         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
527                         priv->scd_bc_tbls.dma >> 10);
528
529         /* Enable DMA channel */
530         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
531                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
532                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
533                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
534
535         /* Update FH chicken bits */
536         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
537         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
538                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
539
540         /* Disable chain mode for all queues */
541         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
542
543         /* Initialize each Tx queue (including the command queue) */
544         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
545
546                 /* TFD circular buffer read/write indexes */
547                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
548                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
549
550                 /* Max Tx Window size for Scheduler-ACK mode */
551                 iwl_write_targ_mem(priv, priv->scd_base_addr +
552                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
553                                 (SCD_WIN_SIZE <<
554                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
555                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
556
557                 /* Frame limit */
558                 iwl_write_targ_mem(priv, priv->scd_base_addr +
559                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
560                                 sizeof(u32),
561                                 (SCD_FRAME_LIMIT <<
562                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
563                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
564
565         }
566         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
567                                  (1 << priv->hw_params.max_txq_num) - 1);
568
569         /* Activate all Tx DMA/FIFO channels */
570         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
571
572         iwl4965_set_wr_ptrs(priv, IWL_DEFAULT_CMD_QUEUE_NUM, 0);
573
574         /* make sure all queue are not stopped */
575         memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
576         for (i = 0; i < 4; i++)
577                 atomic_set(&priv->queue_stop_count[i], 0);
578
579         /* reset to 0 to enable all the queue first */
580         priv->txq_ctx_active_msk = 0;
581         /* Map each Tx/cmd queue to its corresponding fifo */
582         BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
583
584         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
585                 int ac = default_queue_to_tx_fifo[i];
586
587                 iwl_txq_ctx_activate(priv, i);
588
589                 if (ac == IWL_TX_FIFO_UNUSED)
590                         continue;
591
592                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
593         }
594
595         spin_unlock_irqrestore(&priv->lock, flags);
596
597         return 0;
598 }
599
600 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
601         .min_nrg_cck = 97,
602         .max_nrg_cck = 0, /* not used, set to 0 */
603
604         .auto_corr_min_ofdm = 85,
605         .auto_corr_min_ofdm_mrc = 170,
606         .auto_corr_min_ofdm_x1 = 105,
607         .auto_corr_min_ofdm_mrc_x1 = 220,
608
609         .auto_corr_max_ofdm = 120,
610         .auto_corr_max_ofdm_mrc = 210,
611         .auto_corr_max_ofdm_x1 = 140,
612         .auto_corr_max_ofdm_mrc_x1 = 270,
613
614         .auto_corr_min_cck = 125,
615         .auto_corr_max_cck = 200,
616         .auto_corr_min_cck_mrc = 200,
617         .auto_corr_max_cck_mrc = 400,
618
619         .nrg_th_cck = 100,
620         .nrg_th_ofdm = 100,
621
622         .barker_corr_th_min = 190,
623         .barker_corr_th_min_mrc = 390,
624         .nrg_th_cca = 62,
625 };
626
627 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
628 {
629         /* want Kelvin */
630         priv->hw_params.ct_kill_threshold =
631                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
632 }
633
634 /**
635  * iwl4965_hw_set_hw_params
636  *
637  * Called when initializing driver
638  */
639 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
640 {
641         if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
642             priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
643                 priv->cfg->base_params->num_of_queues =
644                         priv->cfg->mod_params->num_of_queues;
645
646         priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
647         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
648         priv->hw_params.scd_bc_tbls_size =
649                         priv->cfg->base_params->num_of_queues *
650                         sizeof(struct iwl4965_scd_bc_tbl);
651         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
652         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
653         priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWL4965_BROADCAST_ID;
654         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
655         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
656         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
657         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
658
659         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
660
661         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
662         priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
663         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
664         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
665
666         iwl4965_set_ct_threshold(priv);
667
668         priv->hw_params.sens = &iwl4965_sensitivity;
669         priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
670
671         return 0;
672 }
673
674 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
675 {
676         s32 sign = 1;
677
678         if (num < 0) {
679                 sign = -sign;
680                 num = -num;
681         }
682         if (denom < 0) {
683                 sign = -sign;
684                 denom = -denom;
685         }
686         *res = 1;
687         *res = ((num * 2 + denom) / (denom * 2)) * sign;
688
689         return 1;
690 }
691
692 /**
693  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
694  *
695  * Determines power supply voltage compensation for txpower calculations.
696  * Returns number of 1/2-dB steps to subtract from gain table index,
697  * to compensate for difference between power supply voltage during
698  * factory measurements, vs. current power supply voltage.
699  *
700  * Voltage indication is higher for lower voltage.
701  * Lower voltage requires more gain (lower gain table index).
702  */
703 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
704                                             s32 current_voltage)
705 {
706         s32 comp = 0;
707
708         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
709             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
710                 return 0;
711
712         iwl4965_math_div_round(current_voltage - eeprom_voltage,
713                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
714
715         if (current_voltage > eeprom_voltage)
716                 comp *= 2;
717         if ((comp < -2) || (comp > 2))
718                 comp = 0;
719
720         return comp;
721 }
722
723 static s32 iwl4965_get_tx_atten_grp(u16 channel)
724 {
725         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
726             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
727                 return CALIB_CH_GROUP_5;
728
729         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
730             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
731                 return CALIB_CH_GROUP_1;
732
733         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
734             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
735                 return CALIB_CH_GROUP_2;
736
737         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
738             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
739                 return CALIB_CH_GROUP_3;
740
741         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
742             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
743                 return CALIB_CH_GROUP_4;
744
745         return -1;
746 }
747
748 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
749 {
750         s32 b = -1;
751
752         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
753                 if (priv->calib_info->band_info[b].ch_from == 0)
754                         continue;
755
756                 if ((channel >= priv->calib_info->band_info[b].ch_from)
757                     && (channel <= priv->calib_info->band_info[b].ch_to))
758                         break;
759         }
760
761         return b;
762 }
763
764 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
765 {
766         s32 val;
767
768         if (x2 == x1)
769                 return y1;
770         else {
771                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
772                 return val + y2;
773         }
774 }
775
776 /**
777  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
778  *
779  * Interpolates factory measurements from the two sample channels within a
780  * sub-band, to apply to channel of interest.  Interpolation is proportional to
781  * differences in channel frequencies, which is proportional to differences
782  * in channel number.
783  */
784 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
785                                     struct iwl_eeprom_calib_ch_info *chan_info)
786 {
787         s32 s = -1;
788         u32 c;
789         u32 m;
790         const struct iwl_eeprom_calib_measure *m1;
791         const struct iwl_eeprom_calib_measure *m2;
792         struct iwl_eeprom_calib_measure *omeas;
793         u32 ch_i1;
794         u32 ch_i2;
795
796         s = iwl4965_get_sub_band(priv, channel);
797         if (s >= EEPROM_TX_POWER_BANDS) {
798                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
799                 return -1;
800         }
801
802         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
803         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
804         chan_info->ch_num = (u8) channel;
805
806         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
807                           channel, s, ch_i1, ch_i2);
808
809         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
810                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
811                         m1 = &(priv->calib_info->band_info[s].ch1.
812                                measurements[c][m]);
813                         m2 = &(priv->calib_info->band_info[s].ch2.
814                                measurements[c][m]);
815                         omeas = &(chan_info->measurements[c][m]);
816
817                         omeas->actual_pow =
818                             (u8) iwl4965_interpolate_value(channel, ch_i1,
819                                                            m1->actual_pow,
820                                                            ch_i2,
821                                                            m2->actual_pow);
822                         omeas->gain_idx =
823                             (u8) iwl4965_interpolate_value(channel, ch_i1,
824                                                            m1->gain_idx, ch_i2,
825                                                            m2->gain_idx);
826                         omeas->temperature =
827                             (u8) iwl4965_interpolate_value(channel, ch_i1,
828                                                            m1->temperature,
829                                                            ch_i2,
830                                                            m2->temperature);
831                         omeas->pa_det =
832                             (s8) iwl4965_interpolate_value(channel, ch_i1,
833                                                            m1->pa_det, ch_i2,
834                                                            m2->pa_det);
835
836                         IWL_DEBUG_TXPOWER(priv,
837                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
838                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
839                         IWL_DEBUG_TXPOWER(priv,
840                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
841                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
842                         IWL_DEBUG_TXPOWER(priv,
843                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
844                                 m1->pa_det, m2->pa_det, omeas->pa_det);
845                         IWL_DEBUG_TXPOWER(priv,
846                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
847                                 m1->temperature, m2->temperature,
848                                 omeas->temperature);
849                 }
850         }
851
852         return 0;
853 }
854
855 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
856  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
857 static s32 back_off_table[] = {
858         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
859         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
860         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
861         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
862         10                      /* CCK */
863 };
864
865 /* Thermal compensation values for txpower for various frequency ranges ...
866  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
867 static struct iwl4965_txpower_comp_entry {
868         s32 degrees_per_05db_a;
869         s32 degrees_per_05db_a_denom;
870 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
871         {9, 2},                 /* group 0 5.2, ch  34-43 */
872         {4, 1},                 /* group 1 5.2, ch  44-70 */
873         {4, 1},                 /* group 2 5.2, ch  71-124 */
874         {4, 1},                 /* group 3 5.2, ch 125-200 */
875         {3, 1}                  /* group 4 2.4, ch   all */
876 };
877
878 static s32 get_min_power_index(s32 rate_power_index, u32 band)
879 {
880         if (!band) {
881                 if ((rate_power_index & 7) <= 4)
882                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
883         }
884         return MIN_TX_GAIN_INDEX;
885 }
886
887 struct gain_entry {
888         u8 dsp;
889         u8 radio;
890 };
891
892 static const struct gain_entry gain_table[2][108] = {
893         /* 5.2GHz power gain index table */
894         {
895          {123, 0x3F},           /* highest txpower */
896          {117, 0x3F},
897          {110, 0x3F},
898          {104, 0x3F},
899          {98, 0x3F},
900          {110, 0x3E},
901          {104, 0x3E},
902          {98, 0x3E},
903          {110, 0x3D},
904          {104, 0x3D},
905          {98, 0x3D},
906          {110, 0x3C},
907          {104, 0x3C},
908          {98, 0x3C},
909          {110, 0x3B},
910          {104, 0x3B},
911          {98, 0x3B},
912          {110, 0x3A},
913          {104, 0x3A},
914          {98, 0x3A},
915          {110, 0x39},
916          {104, 0x39},
917          {98, 0x39},
918          {110, 0x38},
919          {104, 0x38},
920          {98, 0x38},
921          {110, 0x37},
922          {104, 0x37},
923          {98, 0x37},
924          {110, 0x36},
925          {104, 0x36},
926          {98, 0x36},
927          {110, 0x35},
928          {104, 0x35},
929          {98, 0x35},
930          {110, 0x34},
931          {104, 0x34},
932          {98, 0x34},
933          {110, 0x33},
934          {104, 0x33},
935          {98, 0x33},
936          {110, 0x32},
937          {104, 0x32},
938          {98, 0x32},
939          {110, 0x31},
940          {104, 0x31},
941          {98, 0x31},
942          {110, 0x30},
943          {104, 0x30},
944          {98, 0x30},
945          {110, 0x25},
946          {104, 0x25},
947          {98, 0x25},
948          {110, 0x24},
949          {104, 0x24},
950          {98, 0x24},
951          {110, 0x23},
952          {104, 0x23},
953          {98, 0x23},
954          {110, 0x22},
955          {104, 0x18},
956          {98, 0x18},
957          {110, 0x17},
958          {104, 0x17},
959          {98, 0x17},
960          {110, 0x16},
961          {104, 0x16},
962          {98, 0x16},
963          {110, 0x15},
964          {104, 0x15},
965          {98, 0x15},
966          {110, 0x14},
967          {104, 0x14},
968          {98, 0x14},
969          {110, 0x13},
970          {104, 0x13},
971          {98, 0x13},
972          {110, 0x12},
973          {104, 0x08},
974          {98, 0x08},
975          {110, 0x07},
976          {104, 0x07},
977          {98, 0x07},
978          {110, 0x06},
979          {104, 0x06},
980          {98, 0x06},
981          {110, 0x05},
982          {104, 0x05},
983          {98, 0x05},
984          {110, 0x04},
985          {104, 0x04},
986          {98, 0x04},
987          {110, 0x03},
988          {104, 0x03},
989          {98, 0x03},
990          {110, 0x02},
991          {104, 0x02},
992          {98, 0x02},
993          {110, 0x01},
994          {104, 0x01},
995          {98, 0x01},
996          {110, 0x00},
997          {104, 0x00},
998          {98, 0x00},
999          {93, 0x00},
1000          {88, 0x00},
1001          {83, 0x00},
1002          {78, 0x00},
1003          },
1004         /* 2.4GHz power gain index table */
1005         {
1006          {110, 0x3f},           /* highest txpower */
1007          {104, 0x3f},
1008          {98, 0x3f},
1009          {110, 0x3e},
1010          {104, 0x3e},
1011          {98, 0x3e},
1012          {110, 0x3d},
1013          {104, 0x3d},
1014          {98, 0x3d},
1015          {110, 0x3c},
1016          {104, 0x3c},
1017          {98, 0x3c},
1018          {110, 0x3b},
1019          {104, 0x3b},
1020          {98, 0x3b},
1021          {110, 0x3a},
1022          {104, 0x3a},
1023          {98, 0x3a},
1024          {110, 0x39},
1025          {104, 0x39},
1026          {98, 0x39},
1027          {110, 0x38},
1028          {104, 0x38},
1029          {98, 0x38},
1030          {110, 0x37},
1031          {104, 0x37},
1032          {98, 0x37},
1033          {110, 0x36},
1034          {104, 0x36},
1035          {98, 0x36},
1036          {110, 0x35},
1037          {104, 0x35},
1038          {98, 0x35},
1039          {110, 0x34},
1040          {104, 0x34},
1041          {98, 0x34},
1042          {110, 0x33},
1043          {104, 0x33},
1044          {98, 0x33},
1045          {110, 0x32},
1046          {104, 0x32},
1047          {98, 0x32},
1048          {110, 0x31},
1049          {104, 0x31},
1050          {98, 0x31},
1051          {110, 0x30},
1052          {104, 0x30},
1053          {98, 0x30},
1054          {110, 0x6},
1055          {104, 0x6},
1056          {98, 0x6},
1057          {110, 0x5},
1058          {104, 0x5},
1059          {98, 0x5},
1060          {110, 0x4},
1061          {104, 0x4},
1062          {98, 0x4},
1063          {110, 0x3},
1064          {104, 0x3},
1065          {98, 0x3},
1066          {110, 0x2},
1067          {104, 0x2},
1068          {98, 0x2},
1069          {110, 0x1},
1070          {104, 0x1},
1071          {98, 0x1},
1072          {110, 0x0},
1073          {104, 0x0},
1074          {98, 0x0},
1075          {97, 0},
1076          {96, 0},
1077          {95, 0},
1078          {94, 0},
1079          {93, 0},
1080          {92, 0},
1081          {91, 0},
1082          {90, 0},
1083          {89, 0},
1084          {88, 0},
1085          {87, 0},
1086          {86, 0},
1087          {85, 0},
1088          {84, 0},
1089          {83, 0},
1090          {82, 0},
1091          {81, 0},
1092          {80, 0},
1093          {79, 0},
1094          {78, 0},
1095          {77, 0},
1096          {76, 0},
1097          {75, 0},
1098          {74, 0},
1099          {73, 0},
1100          {72, 0},
1101          {71, 0},
1102          {70, 0},
1103          {69, 0},
1104          {68, 0},
1105          {67, 0},
1106          {66, 0},
1107          {65, 0},
1108          {64, 0},
1109          {63, 0},
1110          {62, 0},
1111          {61, 0},
1112          {60, 0},
1113          {59, 0},
1114          }
1115 };
1116
1117 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1118                                     u8 is_ht40, u8 ctrl_chan_high,
1119                                     struct iwl4965_tx_power_db *tx_power_tbl)
1120 {
1121         u8 saturation_power;
1122         s32 target_power;
1123         s32 user_target_power;
1124         s32 power_limit;
1125         s32 current_temp;
1126         s32 reg_limit;
1127         s32 current_regulatory;
1128         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1129         int i;
1130         int c;
1131         const struct iwl_channel_info *ch_info = NULL;
1132         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1133         const struct iwl_eeprom_calib_measure *measurement;
1134         s16 voltage;
1135         s32 init_voltage;
1136         s32 voltage_compensation;
1137         s32 degrees_per_05db_num;
1138         s32 degrees_per_05db_denom;
1139         s32 factory_temp;
1140         s32 temperature_comp[2];
1141         s32 factory_gain_index[2];
1142         s32 factory_actual_pwr[2];
1143         s32 power_index;
1144
1145         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1146          *   are used for indexing into txpower table) */
1147         user_target_power = 2 * priv->tx_power_user_lmt;
1148
1149         /* Get current (RXON) channel, band, width */
1150         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1151                           is_ht40);
1152
1153         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1154
1155         if (!is_channel_valid(ch_info))
1156                 return -EINVAL;
1157
1158         /* get txatten group, used to select 1) thermal txpower adjustment
1159          *   and 2) mimo txpower balance between Tx chains. */
1160         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1161         if (txatten_grp < 0) {
1162                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1163                           channel);
1164                 return -EINVAL;
1165         }
1166
1167         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1168                           channel, txatten_grp);
1169
1170         if (is_ht40) {
1171                 if (ctrl_chan_high)
1172                         channel -= 2;
1173                 else
1174                         channel += 2;
1175         }
1176
1177         /* hardware txpower limits ...
1178          * saturation (clipping distortion) txpowers are in half-dBm */
1179         if (band)
1180                 saturation_power = priv->calib_info->saturation_power24;
1181         else
1182                 saturation_power = priv->calib_info->saturation_power52;
1183
1184         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1185             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1186                 if (band)
1187                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1188                 else
1189                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1190         }
1191
1192         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1193          *   max_power_avg values are in dBm, convert * 2 */
1194         if (is_ht40)
1195                 reg_limit = ch_info->ht40_max_power_avg * 2;
1196         else
1197                 reg_limit = ch_info->max_power_avg * 2;
1198
1199         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1200             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1201                 if (band)
1202                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1203                 else
1204                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1205         }
1206
1207         /* Interpolate txpower calibration values for this channel,
1208          *   based on factory calibration tests on spaced channels. */
1209         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1210
1211         /* calculate tx gain adjustment based on power supply voltage */
1212         voltage = le16_to_cpu(priv->calib_info->voltage);
1213         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1214         voltage_compensation =
1215             iwl4965_get_voltage_compensation(voltage, init_voltage);
1216
1217         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1218                           init_voltage,
1219                           voltage, voltage_compensation);
1220
1221         /* get current temperature (Celsius) */
1222         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1223         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1224         current_temp = KELVIN_TO_CELSIUS(current_temp);
1225
1226         /* select thermal txpower adjustment params, based on channel group
1227          *   (same frequency group used for mimo txatten adjustment) */
1228         degrees_per_05db_num =
1229             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1230         degrees_per_05db_denom =
1231             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1232
1233         /* get per-chain txpower values from factory measurements */
1234         for (c = 0; c < 2; c++) {
1235                 measurement = &ch_eeprom_info.measurements[c][1];
1236
1237                 /* txgain adjustment (in half-dB steps) based on difference
1238                  *   between factory and current temperature */
1239                 factory_temp = measurement->temperature;
1240                 iwl4965_math_div_round((current_temp - factory_temp) *
1241                                        degrees_per_05db_denom,
1242                                        degrees_per_05db_num,
1243                                        &temperature_comp[c]);
1244
1245                 factory_gain_index[c] = measurement->gain_idx;
1246                 factory_actual_pwr[c] = measurement->actual_pow;
1247
1248                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1249                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1250                                   "curr tmp %d, comp %d steps\n",
1251                                   factory_temp, current_temp,
1252                                   temperature_comp[c]);
1253
1254                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1255                                   factory_gain_index[c],
1256                                   factory_actual_pwr[c]);
1257         }
1258
1259         /* for each of 33 bit-rates (including 1 for CCK) */
1260         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1261                 u8 is_mimo_rate;
1262                 union iwl4965_tx_power_dual_stream tx_power;
1263
1264                 /* for mimo, reduce each chain's txpower by half
1265                  * (3dB, 6 steps), so total output power is regulatory
1266                  * compliant. */
1267                 if (i & 0x8) {
1268                         current_regulatory = reg_limit -
1269                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1270                         is_mimo_rate = 1;
1271                 } else {
1272                         current_regulatory = reg_limit;
1273                         is_mimo_rate = 0;
1274                 }
1275
1276                 /* find txpower limit, either hardware or regulatory */
1277                 power_limit = saturation_power - back_off_table[i];
1278                 if (power_limit > current_regulatory)
1279                         power_limit = current_regulatory;
1280
1281                 /* reduce user's txpower request if necessary
1282                  * for this rate on this channel */
1283                 target_power = user_target_power;
1284                 if (target_power > power_limit)
1285                         target_power = power_limit;
1286
1287                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1288                                   i, saturation_power - back_off_table[i],
1289                                   current_regulatory, user_target_power,
1290                                   target_power);
1291
1292                 /* for each of 2 Tx chains (radio transmitters) */
1293                 for (c = 0; c < 2; c++) {
1294                         s32 atten_value;
1295
1296                         if (is_mimo_rate)
1297                                 atten_value =
1298                                     (s32)le32_to_cpu(priv->card_alive_init.
1299                                     tx_atten[txatten_grp][c]);
1300                         else
1301                                 atten_value = 0;
1302
1303                         /* calculate index; higher index means lower txpower */
1304                         power_index = (u8) (factory_gain_index[c] -
1305                                             (target_power -
1306                                              factory_actual_pwr[c]) -
1307                                             temperature_comp[c] -
1308                                             voltage_compensation +
1309                                             atten_value);
1310
1311 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1312                                                 power_index); */
1313
1314                         if (power_index < get_min_power_index(i, band))
1315                                 power_index = get_min_power_index(i, band);
1316
1317                         /* adjust 5 GHz index to support negative indexes */
1318                         if (!band)
1319                                 power_index += 9;
1320
1321                         /* CCK, rate 32, reduce txpower for CCK */
1322                         if (i == POWER_TABLE_CCK_ENTRY)
1323                                 power_index +=
1324                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1325
1326                         /* stay within the table! */
1327                         if (power_index > 107) {
1328                                 IWL_WARN(priv, "txpower index %d > 107\n",
1329                                             power_index);
1330                                 power_index = 107;
1331                         }
1332                         if (power_index < 0) {
1333                                 IWL_WARN(priv, "txpower index %d < 0\n",
1334                                             power_index);
1335                                 power_index = 0;
1336                         }
1337
1338                         /* fill txpower command for this rate/chain */
1339                         tx_power.s.radio_tx_gain[c] =
1340                                 gain_table[band][power_index].radio;
1341                         tx_power.s.dsp_predis_atten[c] =
1342                                 gain_table[band][power_index].dsp;
1343
1344                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1345                                           "gain 0x%02x dsp %d\n",
1346                                           c, atten_value, power_index,
1347                                         tx_power.s.radio_tx_gain[c],
1348                                         tx_power.s.dsp_predis_atten[c]);
1349                 } /* for each chain */
1350
1351                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1352
1353         } /* for each rate */
1354
1355         return 0;
1356 }
1357
1358 /**
1359  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1360  *
1361  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1362  * The power limit is taken from priv->tx_power_user_lmt.
1363  */
1364 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1365 {
1366         struct iwl4965_txpowertable_cmd cmd = { 0 };
1367         int ret;
1368         u8 band = 0;
1369         bool is_ht40 = false;
1370         u8 ctrl_chan_high = 0;
1371         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1372
1373         if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->status),
1374                       "TX Power requested while scanning!\n"))
1375                 return -EAGAIN;
1376
1377         band = priv->band == IEEE80211_BAND_2GHZ;
1378
1379         is_ht40 = is_ht40_channel(ctx->active.flags);
1380
1381         if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1382                 ctrl_chan_high = 1;
1383
1384         cmd.band = band;
1385         cmd.channel = ctx->active.channel;
1386
1387         ret = iwl4965_fill_txpower_tbl(priv, band,
1388                                 le16_to_cpu(ctx->active.channel),
1389                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1390         if (ret)
1391                 goto out;
1392
1393         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1394
1395 out:
1396         return ret;
1397 }
1398
1399 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv,
1400                                    struct iwl_rxon_context *ctx)
1401 {
1402         int ret = 0;
1403         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1404         const struct iwl_rxon_cmd *rxon1 = &ctx->staging;
1405         const struct iwl_rxon_cmd *rxon2 = &ctx->active;
1406
1407         if ((rxon1->flags == rxon2->flags) &&
1408             (rxon1->filter_flags == rxon2->filter_flags) &&
1409             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1410             (rxon1->ofdm_ht_single_stream_basic_rates ==
1411              rxon2->ofdm_ht_single_stream_basic_rates) &&
1412             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1413              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1414             (rxon1->rx_chain == rxon2->rx_chain) &&
1415             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1416                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1417                 return 0;
1418         }
1419
1420         rxon_assoc.flags = ctx->staging.flags;
1421         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1422         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1423         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1424         rxon_assoc.reserved = 0;
1425         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1426             ctx->staging.ofdm_ht_single_stream_basic_rates;
1427         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1428             ctx->staging.ofdm_ht_dual_stream_basic_rates;
1429         rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
1430
1431         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1432                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1433         if (ret)
1434                 return ret;
1435
1436         return ret;
1437 }
1438
1439 static int iwl4965_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
1440 {
1441         /* cast away the const for active_rxon in this function */
1442         struct iwl_rxon_cmd *active_rxon = (void *)&ctx->active;
1443         int ret;
1444         bool new_assoc =
1445                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1446
1447         if (!iwl_is_alive(priv))
1448                 return -EBUSY;
1449
1450         if (!ctx->is_active)
1451                 return 0;
1452
1453         /* always get timestamp with Rx frame */
1454         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1455
1456         ret = iwl_check_rxon_cmd(priv, ctx);
1457         if (ret) {
1458                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
1459                 return -EINVAL;
1460         }
1461
1462         /*
1463          * receive commit_rxon request
1464          * abort any previous channel switch if still in process
1465          */
1466         if (priv->switch_rxon.switch_in_progress &&
1467             (priv->switch_rxon.channel != ctx->staging.channel)) {
1468                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
1469                       le16_to_cpu(priv->switch_rxon.channel));
1470                 iwl_chswitch_done(priv, false);
1471         }
1472
1473         /* If we don't need to send a full RXON, we can use
1474          * iwl_rxon_assoc_cmd which is used to reconfigure filter
1475          * and other flags for the current radio configuration. */
1476         if (!iwl_full_rxon_required(priv, ctx)) {
1477                 ret = iwl_send_rxon_assoc(priv, ctx);
1478                 if (ret) {
1479                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
1480                         return ret;
1481                 }
1482
1483                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1484                 iwl_print_rx_config_cmd(priv, ctx);
1485                 return 0;
1486         }
1487
1488         /* If we are currently associated and the new config requires
1489          * an RXON_ASSOC and the new config wants the associated mask enabled,
1490          * we must clear the associated from the active configuration
1491          * before we apply the new config */
1492         if (iwl_is_associated_ctx(ctx) && new_assoc) {
1493                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
1494                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1495
1496                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
1497                                        sizeof(struct iwl_rxon_cmd),
1498                                        active_rxon);
1499
1500                 /* If the mask clearing failed then we set
1501                  * active_rxon back to what it was previously */
1502                 if (ret) {
1503                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1504                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
1505                         return ret;
1506                 }
1507                 iwl_clear_ucode_stations(priv, ctx);
1508                 iwl_restore_stations(priv, ctx);
1509                 ret = iwl_restore_default_wep_keys(priv, ctx);
1510                 if (ret) {
1511                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
1512                         return ret;
1513                 }
1514         }
1515
1516         IWL_DEBUG_INFO(priv, "Sending RXON\n"
1517                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1518                        "* channel = %d\n"
1519                        "* bssid = %pM\n",
1520                        (new_assoc ? "" : "out"),
1521                        le16_to_cpu(ctx->staging.channel),
1522                        ctx->staging.bssid_addr);
1523
1524         iwl_set_rxon_hwcrypto(priv, ctx, !priv->cfg->mod_params->sw_crypto);
1525
1526         /* Apply the new configuration
1527          * RXON unassoc clears the station table in uCode so restoration of
1528          * stations is needed after it (the RXON command) completes
1529          */
1530         if (!new_assoc) {
1531                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
1532                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
1533                 if (ret) {
1534                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
1535                         return ret;
1536                 }
1537                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
1538                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1539                 iwl_clear_ucode_stations(priv, ctx);
1540                 iwl_restore_stations(priv, ctx);
1541                 ret = iwl_restore_default_wep_keys(priv, ctx);
1542                 if (ret) {
1543                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
1544                         return ret;
1545                 }
1546         }
1547         if (new_assoc) {
1548                 priv->start_calib = 0;
1549                 /* Apply the new configuration
1550                  * RXON assoc doesn't clear the station table in uCode,
1551                  */
1552                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
1553                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
1554                 if (ret) {
1555                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
1556                         return ret;
1557                 }
1558                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1559         }
1560         iwl_print_rx_config_cmd(priv, ctx);
1561
1562         iwl_init_sensitivity(priv);
1563
1564         /* If we issue a new RXON command which required a tune then we must
1565          * send a new TXPOWER command or we won't be able to Tx any frames */
1566         ret = iwl_set_tx_power(priv, priv->tx_power_next, true);
1567         if (ret) {
1568                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
1569                 return ret;
1570         }
1571
1572         return 0;
1573 }
1574
1575 static int iwl4965_hw_channel_switch(struct iwl_priv *priv,
1576                                      struct ieee80211_channel_switch *ch_switch)
1577 {
1578         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1579         int rc;
1580         u8 band = 0;
1581         bool is_ht40 = false;
1582         u8 ctrl_chan_high = 0;
1583         struct iwl4965_channel_switch_cmd cmd;
1584         const struct iwl_channel_info *ch_info;
1585         u32 switch_time_in_usec, ucode_switch_time;
1586         u16 ch;
1587         u32 tsf_low;
1588         u8 switch_count;
1589         u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
1590         struct ieee80211_vif *vif = ctx->vif;
1591         band = priv->band == IEEE80211_BAND_2GHZ;
1592
1593         is_ht40 = is_ht40_channel(ctx->staging.flags);
1594
1595         if (is_ht40 &&
1596             (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1597                 ctrl_chan_high = 1;
1598
1599         cmd.band = band;
1600         cmd.expect_beacon = 0;
1601         ch = ch_switch->channel->hw_value;
1602         cmd.channel = cpu_to_le16(ch);
1603         cmd.rxon_flags = ctx->staging.flags;
1604         cmd.rxon_filter_flags = ctx->staging.filter_flags;
1605         switch_count = ch_switch->count;
1606         tsf_low = ch_switch->timestamp & 0x0ffffffff;
1607         /*
1608          * calculate the ucode channel switch time
1609          * adding TSF as one of the factor for when to switch
1610          */
1611         if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
1612                 if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
1613                     beacon_interval)) {
1614                         switch_count -= (priv->ucode_beacon_time -
1615                                 tsf_low) / beacon_interval;
1616                 } else
1617                         switch_count = 0;
1618         }
1619         if (switch_count <= 1)
1620                 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1621         else {
1622                 switch_time_in_usec =
1623                         vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1624                 ucode_switch_time = iwl_usecs_to_beacons(priv,
1625                                                          switch_time_in_usec,
1626                                                          beacon_interval);
1627                 cmd.switch_time = iwl_add_beacon_time(priv,
1628                                                       priv->ucode_beacon_time,
1629                                                       ucode_switch_time,
1630                                                       beacon_interval);
1631         }
1632         IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
1633                       cmd.switch_time);
1634         ch_info = iwl_get_channel_info(priv, priv->band, ch);
1635         if (ch_info)
1636                 cmd.expect_beacon = is_channel_radar(ch_info);
1637         else {
1638                 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1639                         ctx->active.channel, ch);
1640                 return -EFAULT;
1641         }
1642
1643         rc = iwl4965_fill_txpower_tbl(priv, band, ch, is_ht40,
1644                                       ctrl_chan_high, &cmd.tx_power);
1645         if (rc) {
1646                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1647                 return rc;
1648         }
1649
1650         priv->switch_rxon.channel = cmd.channel;
1651         priv->switch_rxon.switch_in_progress = true;
1652
1653         return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1654 }
1655
1656 /**
1657  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1658  */
1659 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1660                                             struct iwl_tx_queue *txq,
1661                                             u16 byte_cnt)
1662 {
1663         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1664         int txq_id = txq->q.id;
1665         int write_ptr = txq->q.write_ptr;
1666         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1667         __le16 bc_ent;
1668
1669         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1670
1671         bc_ent = cpu_to_le16(len & 0xFFF);
1672         /* Set up byte count within first 256 entries */
1673         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1674
1675         /* If within first 64 entries, duplicate at end */
1676         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1677                 scd_bc_tbl[txq_id].
1678                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1679 }
1680
1681 /**
1682  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1683  * @statistics: Provides the temperature reading from the uCode
1684  *
1685  * A return of <0 indicates bogus data in the statistics
1686  */
1687 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1688 {
1689         s32 temperature;
1690         s32 vt;
1691         s32 R1, R2, R3;
1692         u32 R4;
1693
1694         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1695             (priv->_agn.statistics.flag &
1696                         STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1697                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1698                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1699                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1700                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1701                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1702         } else {
1703                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1704                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1705                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1706                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1707                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1708         }
1709
1710         /*
1711          * Temperature is only 23 bits, so sign extend out to 32.
1712          *
1713          * NOTE If we haven't received a statistics notification yet
1714          * with an updated temperature, use R4 provided to us in the
1715          * "initialize" ALIVE response.
1716          */
1717         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1718                 vt = sign_extend32(R4, 23);
1719         else
1720                 vt = sign_extend32(le32_to_cpu(priv->_agn.statistics.
1721                                  general.common.temperature), 23);
1722
1723         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1724
1725         if (R3 == R1) {
1726                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1727                 return -1;
1728         }
1729
1730         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1731          * Add offset to center the adjustment around 0 degrees Centigrade. */
1732         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1733         temperature /= (R3 - R1);
1734         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1735
1736         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1737                         temperature, KELVIN_TO_CELSIUS(temperature));
1738
1739         return temperature;
1740 }
1741
1742 /* Adjust Txpower only if temperature variance is greater than threshold. */
1743 #define IWL_TEMPERATURE_THRESHOLD   3
1744
1745 /**
1746  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1747  *
1748  * If the temperature changed has changed sufficiently, then a recalibration
1749  * is needed.
1750  *
1751  * Assumes caller will replace priv->last_temperature once calibration
1752  * executed.
1753  */
1754 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1755 {
1756         int temp_diff;
1757
1758         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1759                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1760                 return 0;
1761         }
1762
1763         temp_diff = priv->temperature - priv->last_temperature;
1764
1765         /* get absolute value */
1766         if (temp_diff < 0) {
1767                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d\n", temp_diff);
1768                 temp_diff = -temp_diff;
1769         } else if (temp_diff == 0)
1770                 IWL_DEBUG_POWER(priv, "Temperature unchanged\n");
1771         else
1772                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d\n", temp_diff);
1773
1774         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1775                 IWL_DEBUG_POWER(priv, " => thermal txpower calib not needed\n");
1776                 return 0;
1777         }
1778
1779         IWL_DEBUG_POWER(priv, " => thermal txpower calib needed\n");
1780
1781         return 1;
1782 }
1783
1784 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1785 {
1786         s32 temp;
1787
1788         temp = iwl4965_hw_get_temperature(priv);
1789         if (temp < 0)
1790                 return;
1791
1792         if (priv->temperature != temp) {
1793                 if (priv->temperature)
1794                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1795                                        "from %dC to %dC\n",
1796                                        KELVIN_TO_CELSIUS(priv->temperature),
1797                                        KELVIN_TO_CELSIUS(temp));
1798                 else
1799                         IWL_DEBUG_TEMP(priv, "Temperature "
1800                                        "initialized to %dC\n",
1801                                        KELVIN_TO_CELSIUS(temp));
1802         }
1803
1804         priv->temperature = temp;
1805         iwl_tt_handler(priv);
1806         set_bit(STATUS_TEMPERATURE, &priv->status);
1807
1808         if (!priv->disable_tx_power_cal &&
1809              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1810              iwl4965_is_temp_calib_needed(priv))
1811                 queue_work(priv->workqueue, &priv->txpower_work);
1812 }
1813
1814 /**
1815  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1816  */
1817 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1818                                             u16 txq_id)
1819 {
1820         /* Simply stop the queue, but don't change any configuration;
1821          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1822         iwl_write_prph(priv,
1823                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1824                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1825                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1826 }
1827
1828 /**
1829  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1830  * priv->lock must be held by the caller
1831  */
1832 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1833                                    u16 ssn_idx, u8 tx_fifo)
1834 {
1835         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1836             (IWL49_FIRST_AMPDU_QUEUE +
1837                 priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
1838                 IWL_WARN(priv,
1839                         "queue number out of range: %d, must be %d to %d\n",
1840                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1841                         IWL49_FIRST_AMPDU_QUEUE +
1842                         priv->cfg->base_params->num_of_ampdu_queues - 1);
1843                 return -EINVAL;
1844         }
1845
1846         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1847
1848         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1849
1850         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1851         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1852         /* supposes that ssn_idx is valid (!= 0xFFF) */
1853         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1854
1855         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1856         iwl_txq_ctx_deactivate(priv, txq_id);
1857         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1858
1859         return 0;
1860 }
1861
1862 /**
1863  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1864  */
1865 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1866                                         u16 txq_id)
1867 {
1868         u32 tbl_dw_addr;
1869         u32 tbl_dw;
1870         u16 scd_q2ratid;
1871
1872         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1873
1874         tbl_dw_addr = priv->scd_base_addr +
1875                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1876
1877         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1878
1879         if (txq_id & 0x1)
1880                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1881         else
1882                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1883
1884         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1885
1886         return 0;
1887 }
1888
1889
1890 /**
1891  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1892  *
1893  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1894  *        i.e. it must be one of the higher queues used for aggregation
1895  */
1896 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1897                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1898 {
1899         unsigned long flags;
1900         u16 ra_tid;
1901         int ret;
1902
1903         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1904             (IWL49_FIRST_AMPDU_QUEUE +
1905                 priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
1906                 IWL_WARN(priv,
1907                         "queue number out of range: %d, must be %d to %d\n",
1908                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1909                         IWL49_FIRST_AMPDU_QUEUE +
1910                         priv->cfg->base_params->num_of_ampdu_queues - 1);
1911                 return -EINVAL;
1912         }
1913
1914         ra_tid = BUILD_RAxTID(sta_id, tid);
1915
1916         /* Modify device's station table to Tx this TID */
1917         ret = iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1918         if (ret)
1919                 return ret;
1920
1921         spin_lock_irqsave(&priv->lock, flags);
1922
1923         /* Stop this Tx queue before configuring it */
1924         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1925
1926         /* Map receiver-address / traffic-ID to this queue */
1927         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1928
1929         /* Set this queue as a chain-building queue */
1930         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1931
1932         /* Place first TFD at index corresponding to start sequence number.
1933          * Assumes that ssn_idx is valid (!= 0xFFF) */
1934         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1935         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1936         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1937
1938         /* Set up Tx window size and frame limit for this queue */
1939         iwl_write_targ_mem(priv,
1940                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1941                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1942                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1943
1944         iwl_write_targ_mem(priv, priv->scd_base_addr +
1945                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1946                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1947                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1948
1949         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1950
1951         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1952         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1953
1954         spin_unlock_irqrestore(&priv->lock, flags);
1955
1956         return 0;
1957 }
1958
1959
1960 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1961 {
1962         switch (cmd_id) {
1963         case REPLY_RXON:
1964                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1965         default:
1966                 return len;
1967         }
1968 }
1969
1970 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1971 {
1972         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1973         addsta->mode = cmd->mode;
1974         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1975         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1976         addsta->station_flags = cmd->station_flags;
1977         addsta->station_flags_msk = cmd->station_flags_msk;
1978         addsta->tid_disable_tx = cmd->tid_disable_tx;
1979         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1980         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1981         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1982         addsta->sleep_tx_count = cmd->sleep_tx_count;
1983         addsta->reserved1 = cpu_to_le16(0);
1984         addsta->reserved2 = cpu_to_le16(0);
1985
1986         return (u16)sizeof(struct iwl4965_addsta_cmd);
1987 }
1988
1989 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1990 {
1991         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1992 }
1993
1994 /**
1995  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1996  */
1997 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1998                                       struct iwl_ht_agg *agg,
1999                                       struct iwl4965_tx_resp *tx_resp,
2000                                       int txq_id, u16 start_idx)
2001 {
2002         u16 status;
2003         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2004         struct ieee80211_tx_info *info = NULL;
2005         struct ieee80211_hdr *hdr = NULL;
2006         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2007         int i, sh, idx;
2008         u16 seq;
2009         if (agg->wait_for_ba)
2010                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
2011
2012         agg->frame_count = tx_resp->frame_count;
2013         agg->start_idx = start_idx;
2014         agg->rate_n_flags = rate_n_flags;
2015         agg->bitmap = 0;
2016
2017         /* num frames attempted by Tx command */
2018         if (agg->frame_count == 1) {
2019                 /* Only one frame was attempted; no block-ack will arrive */
2020                 status = le16_to_cpu(frame_status[0].status);
2021                 idx = start_idx;
2022
2023                 /* FIXME: code repetition */
2024                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
2025                                    agg->frame_count, agg->start_idx, idx);
2026
2027                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb);
2028                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2029                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2030                 info->flags |= iwl_tx_status_to_mac80211(status);
2031                 iwlagn_hwrate_to_tx_control(priv, rate_n_flags, info);
2032                 /* FIXME: code repetition end */
2033
2034                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
2035                                     status & 0xff, tx_resp->failure_frame);
2036                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
2037
2038                 agg->wait_for_ba = 0;
2039         } else {
2040                 /* Two or more frames were attempted; expect block-ack */
2041                 u64 bitmap = 0;
2042                 int start = agg->start_idx;
2043
2044                 /* Construct bit-map of pending frames within Tx window */
2045                 for (i = 0; i < agg->frame_count; i++) {
2046                         u16 sc;
2047                         status = le16_to_cpu(frame_status[i].status);
2048                         seq  = le16_to_cpu(frame_status[i].sequence);
2049                         idx = SEQ_TO_INDEX(seq);
2050                         txq_id = SEQ_TO_QUEUE(seq);
2051
2052                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2053                                       AGG_TX_STATE_ABORT_MSK))
2054                                 continue;
2055
2056                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2057                                            agg->frame_count, txq_id, idx);
2058
2059                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2060                         if (!hdr) {
2061                                 IWL_ERR(priv,
2062                                         "BUG_ON idx doesn't point to valid skb"
2063                                         " idx=%d, txq_id=%d\n", idx, txq_id);
2064                                 return -1;
2065                         }
2066
2067                         sc = le16_to_cpu(hdr->seq_ctrl);
2068                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2069                                 IWL_ERR(priv,
2070                                         "BUG_ON idx doesn't match seq control"
2071                                         " idx=%d, seq_idx=%d, seq=%d\n",
2072                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2073                                 return -1;
2074                         }
2075
2076                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2077                                            i, idx, SEQ_TO_SN(sc));
2078
2079                         sh = idx - start;
2080                         if (sh > 64) {
2081                                 sh = (start - idx) + 0xff;
2082                                 bitmap = bitmap << sh;
2083                                 sh = 0;
2084                                 start = idx;
2085                         } else if (sh < -64)
2086                                 sh  = 0xff - (start - idx);
2087                         else if (sh < 0) {
2088                                 sh = start - idx;
2089                                 start = idx;
2090                                 bitmap = bitmap << sh;
2091                                 sh = 0;
2092                         }
2093                         bitmap |= 1ULL << sh;
2094                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2095                                            start, (unsigned long long)bitmap);
2096                 }
2097
2098                 agg->bitmap = bitmap;
2099                 agg->start_idx = start;
2100                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2101                                    agg->frame_count, agg->start_idx,
2102                                    (unsigned long long)agg->bitmap);
2103
2104                 if (bitmap)
2105                         agg->wait_for_ba = 1;
2106         }
2107         return 0;
2108 }
2109
2110 static u8 iwl_find_station(struct iwl_priv *priv, const u8 *addr)
2111 {
2112         int i;
2113         int start = 0;
2114         int ret = IWL_INVALID_STATION;
2115         unsigned long flags;
2116
2117         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
2118             (priv->iw_mode == NL80211_IFTYPE_AP))
2119                 start = IWL_STA_ID;
2120
2121         if (is_broadcast_ether_addr(addr))
2122                 return priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2123
2124         spin_lock_irqsave(&priv->sta_lock, flags);
2125         for (i = start; i < priv->hw_params.max_stations; i++)
2126                 if (priv->stations[i].used &&
2127                     (!compare_ether_addr(priv->stations[i].sta.sta.addr,
2128                                          addr))) {
2129                         ret = i;
2130                         goto out;
2131                 }
2132
2133         IWL_DEBUG_ASSOC_LIMIT(priv, "can not find STA %pM total %d\n",
2134                               addr, priv->num_stations);
2135
2136  out:
2137         /*
2138          * It may be possible that more commands interacting with stations
2139          * arrive before we completed processing the adding of
2140          * station
2141          */
2142         if (ret != IWL_INVALID_STATION &&
2143             (!(priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) ||
2144              ((priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) &&
2145               (priv->stations[ret].used & IWL_STA_UCODE_INPROGRESS)))) {
2146                 IWL_ERR(priv, "Requested station info for sta %d before ready.\n",
2147                         ret);
2148                 ret = IWL_INVALID_STATION;
2149         }
2150         spin_unlock_irqrestore(&priv->sta_lock, flags);
2151         return ret;
2152 }
2153
2154 static int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2155 {
2156         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
2157                 return IWL_AP_ID;
2158         } else {
2159                 u8 *da = ieee80211_get_DA(hdr);
2160                 return iwl_find_station(priv, da);
2161         }
2162 }
2163
2164 /**
2165  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2166  */
2167 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2168                                 struct iwl_rx_mem_buffer *rxb)
2169 {
2170         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2171         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2172         int txq_id = SEQ_TO_QUEUE(sequence);
2173         int index = SEQ_TO_INDEX(sequence);
2174         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2175         struct ieee80211_hdr *hdr;
2176         struct ieee80211_tx_info *info;
2177         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2178         u32  status = le32_to_cpu(tx_resp->u.status);
2179         int uninitialized_var(tid);
2180         int sta_id;
2181         int freed;
2182         u8 *qc = NULL;
2183         unsigned long flags;
2184
2185         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2186                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2187                           "is out of range [0-%d] %d %d\n", txq_id,
2188                           index, txq->q.n_bd, txq->q.write_ptr,
2189                           txq->q.read_ptr);
2190                 return;
2191         }
2192
2193         txq->time_stamp = jiffies;
2194         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2195         memset(&info->status, 0, sizeof(info->status));
2196
2197         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2198         if (ieee80211_is_data_qos(hdr->frame_control)) {
2199                 qc = ieee80211_get_qos_ctl(hdr);
2200                 tid = qc[0] & 0xf;
2201         }
2202
2203         sta_id = iwl_get_ra_sta_id(priv, hdr);
2204         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2205                 IWL_ERR(priv, "Station not known\n");
2206                 return;
2207         }
2208
2209         spin_lock_irqsave(&priv->sta_lock, flags);
2210         if (txq->sched_retry) {
2211                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2212                 struct iwl_ht_agg *agg = NULL;
2213                 WARN_ON(!qc);
2214
2215                 agg = &priv->stations[sta_id].tid[tid].agg;
2216
2217                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2218
2219                 /* check if BAR is needed */
2220                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2221                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2222
2223                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2224                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2225                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2226                                            "%d index %d\n", scd_ssn , index);
2227                         freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
2228                         if (qc)
2229                                 iwl_free_tfds_in_queue(priv, sta_id,
2230                                                        tid, freed);
2231
2232                         if (priv->mac80211_registered &&
2233                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2234                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
2235                                 iwl_wake_queue(priv, txq);
2236                 }
2237         } else {
2238                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2239                 info->flags |= iwl_tx_status_to_mac80211(status);
2240                 iwlagn_hwrate_to_tx_control(priv,
2241                                         le32_to_cpu(tx_resp->rate_n_flags),
2242                                         info);
2243
2244                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2245                                    "rate_n_flags 0x%x retries %d\n",
2246                                    txq_id,
2247                                    iwl_get_tx_fail_reason(status), status,
2248                                    le32_to_cpu(tx_resp->rate_n_flags),
2249                                    tx_resp->failure_frame);
2250
2251                 freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
2252                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2253                         iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
2254                 else if (sta_id == IWL_INVALID_STATION)
2255                         IWL_DEBUG_TX_REPLY(priv, "Station not known\n");
2256
2257                 if (priv->mac80211_registered &&
2258                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2259                         iwl_wake_queue(priv, txq);
2260         }
2261         if (qc && likely(sta_id != IWL_INVALID_STATION))
2262                 iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
2263
2264         iwl_check_abort_status(priv, tx_resp->frame_count, status);
2265
2266         spin_unlock_irqrestore(&priv->sta_lock, flags);
2267 }
2268
2269 static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
2270                                     struct iwl_rx_mem_buffer *rxb)
2271 {
2272         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2273         struct iwl4965_beacon_notif *beacon = (void *)pkt->u.raw;
2274 #ifdef CONFIG_IWLWIFI_DEBUG
2275         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
2276
2277         IWL_DEBUG_RX(priv, "beacon status %#x, retries:%d ibssmgr:%d "
2278                 "tsf:0x%.8x%.8x rate:%d\n",
2279                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
2280                 beacon->beacon_notify_hdr.failure_frame,
2281                 le32_to_cpu(beacon->ibss_mgr_status),
2282                 le32_to_cpu(beacon->high_tsf),
2283                 le32_to_cpu(beacon->low_tsf), rate);
2284 #endif
2285
2286         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
2287
2288         if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2289                 queue_work(priv->workqueue, &priv->beacon_update);
2290 }
2291
2292 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2293                              struct iwl_rx_phy_res *rx_resp)
2294 {
2295         /* data from PHY/DSP regarding signal strength, etc.,
2296          *   contents are always there, not configurable by host.  */
2297         struct iwl4965_rx_non_cfg_phy *ncphy =
2298             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2299         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2300                         >> IWL49_AGC_DB_POS;
2301
2302         u32 valid_antennae =
2303             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2304                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2305         u8 max_rssi = 0;
2306         u32 i;
2307
2308         /* Find max rssi among 3 possible receivers.
2309          * These values are measured by the digital signal processor (DSP).
2310          * They should stay fairly constant even as the signal strength varies,
2311          *   if the radio's automatic gain control (AGC) is working right.
2312          * AGC value (see below) will provide the "interesting" info. */
2313         for (i = 0; i < 3; i++)
2314                 if (valid_antennae & (1 << i))
2315                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2316
2317         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2318                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2319                 max_rssi, agc);
2320
2321         /* dBm = max_rssi dB - agc dB - constant.
2322          * Higher AGC (higher radio gain) means lower signal. */
2323         return max_rssi - agc - IWLAGN_RSSI_OFFSET;
2324 }
2325
2326
2327 /* Set up 4965-specific Rx frame reply handlers */
2328 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2329 {
2330         /* Legacy Rx frames */
2331         priv->rx_handlers[REPLY_RX] = iwlagn_rx_reply_rx;
2332         /* Tx response */
2333         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2334         priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
2335
2336         /* set up notification wait support */
2337         spin_lock_init(&priv->_agn.notif_wait_lock);
2338         INIT_LIST_HEAD(&priv->_agn.notif_waits);
2339         init_waitqueue_head(&priv->_agn.notif_waitq);
2340 }
2341
2342 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2343 {
2344         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2345 }
2346
2347 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2348 {
2349         cancel_work_sync(&priv->txpower_work);
2350 }
2351
2352 static struct iwl_hcmd_ops iwl4965_hcmd = {
2353         .rxon_assoc = iwl4965_send_rxon_assoc,
2354         .commit_rxon = iwl4965_commit_rxon,
2355         .set_rxon_chain = iwlagn_set_rxon_chain,
2356         .send_bt_config = iwl_send_bt_config,
2357 };
2358
2359 static void iwl4965_post_scan(struct iwl_priv *priv)
2360 {
2361         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2362
2363         /*
2364          * Since setting the RXON may have been deferred while
2365          * performing the scan, fire one off if needed
2366          */
2367         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2368                 iwlcore_commit_rxon(priv, ctx);
2369 }
2370
2371 static void iwl4965_post_associate(struct iwl_priv *priv)
2372 {
2373         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2374         struct ieee80211_vif *vif = ctx->vif;
2375         struct ieee80211_conf *conf = NULL;
2376         int ret = 0;
2377
2378         if (!vif || !priv->is_open)
2379                 return;
2380
2381         if (vif->type == NL80211_IFTYPE_AP) {
2382                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2383                 return;
2384         }
2385
2386         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2387                 return;
2388
2389         iwl_scan_cancel_timeout(priv, 200);
2390
2391         conf = ieee80211_get_hw_conf(priv->hw);
2392
2393         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2394         iwlcore_commit_rxon(priv, ctx);
2395
2396         ret = iwl_send_rxon_timing(priv, ctx);
2397         if (ret)
2398                 IWL_WARN(priv, "RXON timing - "
2399                             "Attempting to continue.\n");
2400
2401         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2402
2403         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2404
2405         if (priv->cfg->ops->hcmd->set_rxon_chain)
2406                 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2407
2408         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2409
2410         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2411                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2412
2413         if (vif->bss_conf.use_short_preamble)
2414                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2415         else
2416                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2417
2418         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2419                 if (vif->bss_conf.use_short_slot)
2420                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2421                 else
2422                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2423         }
2424
2425         iwlcore_commit_rxon(priv, ctx);
2426
2427         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2428                         vif->bss_conf.aid, ctx->active.bssid_addr);
2429
2430         switch (vif->type) {
2431         case NL80211_IFTYPE_STATION:
2432                 break;
2433         case NL80211_IFTYPE_ADHOC:
2434                 iwlagn_send_beacon_cmd(priv);
2435                 break;
2436         default:
2437                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2438                           __func__, vif->type);
2439                 break;
2440         }
2441
2442         /* the chain noise calibration will enabled PM upon completion
2443          * If chain noise has already been run, then we need to enable
2444          * power management here */
2445         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2446                 iwl_power_update_mode(priv, false);
2447
2448         /* Enable Rx differential gain and sensitivity calibrations */
2449         iwl_chain_noise_reset(priv);
2450         priv->start_calib = 1;
2451 }
2452
2453 static void iwl4965_config_ap(struct iwl_priv *priv)
2454 {
2455         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2456         struct ieee80211_vif *vif = ctx->vif;
2457         int ret = 0;
2458
2459         lockdep_assert_held(&priv->mutex);
2460
2461         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2462                 return;
2463
2464         /* The following should be done only at AP bring up */
2465         if (!iwl_is_associated_ctx(ctx)) {
2466
2467                 /* RXON - unassoc (to set timing command) */
2468                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2469                 iwlcore_commit_rxon(priv, ctx);
2470
2471                 /* RXON Timing */
2472                 ret = iwl_send_rxon_timing(priv, ctx);
2473                 if (ret)
2474                         IWL_WARN(priv, "RXON timing failed - "
2475                                         "Attempting to continue.\n");
2476
2477                 /* AP has all antennas */
2478                 priv->chain_noise_data.active_chains =
2479                         priv->hw_params.valid_rx_ant;
2480                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2481                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2482                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2483
2484                 ctx->staging.assoc_id = 0;
2485
2486                 if (vif->bss_conf.use_short_preamble)
2487                         ctx->staging.flags |=
2488                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2489                 else
2490                         ctx->staging.flags &=
2491                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2492
2493                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2494                         if (vif->bss_conf.use_short_slot)
2495                                 ctx->staging.flags |=
2496                                         RXON_FLG_SHORT_SLOT_MSK;
2497                         else
2498                                 ctx->staging.flags &=
2499                                         ~RXON_FLG_SHORT_SLOT_MSK;
2500                 }
2501                 /* need to send beacon cmd before committing assoc RXON! */
2502                 iwlagn_send_beacon_cmd(priv);
2503                 /* restore RXON assoc */
2504                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2505                 iwlcore_commit_rxon(priv, ctx);
2506         }
2507         iwlagn_send_beacon_cmd(priv);
2508
2509         /* FIXME - we need to add code here to detect a totally new
2510          * configuration, reset the AP, unassoc, rxon timing, assoc,
2511          * clear sta table, add BCAST sta... */
2512 }
2513
2514 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2515         .get_hcmd_size = iwl4965_get_hcmd_size,
2516         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2517         .chain_noise_reset = iwl4965_chain_noise_reset,
2518         .gain_computation = iwl4965_gain_computation,
2519         .tx_cmd_protection = iwl_legacy_tx_cmd_protection,
2520         .calc_rssi = iwl4965_calc_rssi,
2521         .request_scan = iwlagn_request_scan,
2522         .post_scan = iwl4965_post_scan,
2523 };
2524
2525 static struct iwl_lib_ops iwl4965_lib = {
2526         .set_hw_params = iwl4965_hw_set_hw_params,
2527         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2528         .txq_set_sched = iwl4965_txq_set_sched,
2529         .txq_agg_enable = iwl4965_txq_agg_enable,
2530         .txq_agg_disable = iwl4965_txq_agg_disable,
2531         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2532         .txq_free_tfd = iwl_hw_txq_free_tfd,
2533         .txq_init = iwl_hw_tx_queue_init,
2534         .rx_handler_setup = iwl4965_rx_handler_setup,
2535         .setup_deferred_work = iwl4965_setup_deferred_work,
2536         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2537         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2538         .alive_notify = iwl4965_alive_notify,
2539         .init_alive_start = iwl4965_init_alive_start,
2540         .load_ucode = iwl4965_load_bsm,
2541         .dump_nic_event_log = iwl_dump_nic_event_log,
2542         .dump_nic_error_log = iwl_dump_nic_error_log,
2543         .dump_fh = iwl_dump_fh,
2544         .set_channel_switch = iwl4965_hw_channel_switch,
2545         .apm_ops = {
2546                 .init = iwl_apm_init,
2547                 .config = iwl4965_nic_config,
2548         },
2549         .eeprom_ops = {
2550                 .regulatory_bands = {
2551                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2552                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2553                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2554                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2555                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2556                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2557                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2558                 },
2559                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2560                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2561                 .calib_version = iwl4965_eeprom_calib_version,
2562                 .query_addr = iwlcore_eeprom_query_addr,
2563         },
2564         .send_tx_power  = iwl4965_send_tx_power,
2565         .update_chain_flags = iwl_update_chain_flags,
2566         .isr_ops = {
2567                 .isr = iwl_isr_legacy,
2568         },
2569         .temp_ops = {
2570                 .temperature = iwl4965_temperature_calib,
2571         },
2572         .debugfs_ops = {
2573                 .rx_stats_read = iwl_ucode_rx_stats_read,
2574                 .tx_stats_read = iwl_ucode_tx_stats_read,
2575                 .general_stats_read = iwl_ucode_general_stats_read,
2576                 .bt_stats_read = iwl_ucode_bt_stats_read,
2577                 .reply_tx_error = iwl_reply_tx_error_read,
2578         },
2579         .check_plcp_health = iwl_good_plcp_health,
2580 };
2581
2582 static const struct iwl_legacy_ops iwl4965_legacy_ops = {
2583         .post_associate = iwl4965_post_associate,
2584         .config_ap = iwl4965_config_ap,
2585         .manage_ibss_station = iwlagn_manage_ibss_station,
2586         .update_bcast_stations = iwl_update_bcast_stations,
2587 };
2588
2589 struct ieee80211_ops iwl4965_hw_ops = {
2590         .tx = iwlagn_mac_tx,
2591         .start = iwlagn_mac_start,
2592         .stop = iwlagn_mac_stop,
2593         .add_interface = iwl_mac_add_interface,
2594         .remove_interface = iwl_mac_remove_interface,
2595         .change_interface = iwl_mac_change_interface,
2596         .config = iwl_legacy_mac_config,
2597         .configure_filter = iwlagn_configure_filter,
2598         .set_key = iwlagn_mac_set_key,
2599         .update_tkip_key = iwlagn_mac_update_tkip_key,
2600         .conf_tx = iwl_mac_conf_tx,
2601         .reset_tsf = iwl_legacy_mac_reset_tsf,
2602         .bss_info_changed = iwl_legacy_mac_bss_info_changed,
2603         .ampdu_action = iwlagn_mac_ampdu_action,
2604         .hw_scan = iwl_mac_hw_scan,
2605         .sta_add = iwlagn_mac_sta_add,
2606         .sta_remove = iwl_mac_sta_remove,
2607         .channel_switch = iwlagn_mac_channel_switch,
2608         .flush = iwlagn_mac_flush,
2609         .tx_last_beacon = iwl_mac_tx_last_beacon,
2610 };
2611
2612 static const struct iwl_ops iwl4965_ops = {
2613         .lib = &iwl4965_lib,
2614         .hcmd = &iwl4965_hcmd,
2615         .utils = &iwl4965_hcmd_utils,
2616         .led = &iwlagn_led_ops,
2617         .legacy = &iwl4965_legacy_ops,
2618         .ieee80211_ops = &iwl4965_hw_ops,
2619 };
2620
2621 static struct iwl_base_params iwl4965_base_params = {
2622         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2623         .num_of_queues = IWL49_NUM_QUEUES,
2624         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2625         .pll_cfg_val = 0,
2626         .set_l0s = true,
2627         .use_bsm = true,
2628         .use_isr_legacy = true,
2629         .broken_powersave = true,
2630         .led_compensation = 61,
2631         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2632         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2633         .wd_timeout = IWL_DEF_WD_TIMEOUT,
2634         .temperature_kelvin = true,
2635         .max_event_log_size = 512,
2636         .tx_power_by_driver = true,
2637         .ucode_tracing = true,
2638         .sensitivity_calib_by_driver = true,
2639         .chain_noise_calib_by_driver = true,
2640         .no_agg_framecnt_info = true,
2641 };
2642
2643 struct iwl_cfg iwl4965_agn_cfg = {
2644         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2645         .fw_name_pre = IWL4965_FW_PRE,
2646         .ucode_api_max = IWL4965_UCODE_API_MAX,
2647         .ucode_api_min = IWL4965_UCODE_API_MIN,
2648         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2649         .valid_tx_ant = ANT_AB,
2650         .valid_rx_ant = ANT_ABC,
2651         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2652         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2653         .ops = &iwl4965_ops,
2654         .mod_params = &iwlagn_mod_params,
2655         .base_params = &iwl4965_base_params,
2656         .led_mode = IWL_LED_BLINK,
2657         /*
2658          * Force use of chains B and C for scan RX on 5 GHz band
2659          * because the device has off-channel reception on chain A.
2660          */
2661         .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2662 };
2663
2664 /* Module firmware */
2665 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2666