1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/etherdevice.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
33 #include <net/mac80211.h>
34 #include <asm/unaligned.h>
35 #include "iwl-eeprom.h"
40 #include "iwl-helpers.h"
41 /************************** RX-FUNCTIONS ****************************/
43 * Rx theory of operation
45 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
46 * each of which point to Receive Buffers to be filled by the NIC. These get
47 * used not only for Rx frames, but for any command response or notification
48 * from the NIC. The driver and NIC manage the Rx buffers by means
49 * of indexes into the circular buffer.
52 * The host/firmware share two index registers for managing the Rx buffers.
54 * The READ index maps to the first position that the firmware may be writing
55 * to -- the driver can read up to (but not including) this position and get
57 * The READ index is managed by the firmware once the card is enabled.
59 * The WRITE index maps to the last position the driver has read from -- the
60 * position preceding WRITE is the last slot the firmware can place a packet.
62 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
65 * During initialization, the host sets up the READ queue position to the first
66 * INDEX position, and WRITE to the last (READ - 1 wrapped)
68 * When the firmware places a packet in a buffer, it will advance the READ index
69 * and fire the RX interrupt. The driver can then query the READ index and
70 * process as many packets as possible, moving the WRITE index forward as it
71 * resets the Rx queue buffers with new memory.
73 * The management in the driver is as follows:
74 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
75 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
76 * to replenish the iwl->rxq->rx_free.
77 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
78 * iwl->rxq is replenished and the READ INDEX is updated (updating the
79 * 'processed' and 'read' driver indexes as well)
80 * + A received packet is processed and handed to the kernel network stack,
81 * detached from the iwl->rxq. The driver 'processed' index is updated.
82 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
83 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
84 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
85 * were enough free buffers and RX_STALLED is set it is cleared.
90 * iwl_legacy_rx_queue_alloc() Allocates rx_free
91 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
92 * iwl_rx_queue_restock
93 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
94 * queue, updates firmware pointers, and updates
95 * the WRITE index. If insufficient rx_free buffers
96 * are available, schedules iwl_rx_replenish
98 * -- enable interrupts --
99 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
100 * READ INDEX, detaching the SKB from the pool.
101 * Moves the packet buffer from queue to rx_used.
102 * Calls iwl_rx_queue_restock to refill any empty
109 * iwl_legacy_rx_queue_space - Return number of free slots available in queue.
111 int iwl_legacy_rx_queue_space(const struct iwl_rx_queue *q)
113 int s = q->read - q->write;
116 /* keep some buffer to not confuse full and empty queue */
122 EXPORT_SYMBOL(iwl_legacy_rx_queue_space);
125 * iwl_legacy_rx_queue_update_write_ptr - Update the write pointer for the RX queue
128 iwl_legacy_rx_queue_update_write_ptr(struct iwl_priv *priv,
129 struct iwl_rx_queue *q)
132 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
135 spin_lock_irqsave(&q->lock, flags);
137 if (q->need_update == 0)
140 /* If power-saving is in use, make sure device is awake */
141 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
142 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
144 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
146 "Rx queue requesting wakeup,"
147 " GP1 = 0x%x\n", reg);
148 iwl_legacy_set_bit(priv, CSR_GP_CNTRL,
149 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
153 q->write_actual = (q->write & ~0x7);
154 iwl_legacy_write_direct32(priv, rx_wrt_ptr_reg,
157 /* Else device is assumed to be awake */
159 /* Device expects a multiple of 8 */
160 q->write_actual = (q->write & ~0x7);
161 iwl_legacy_write_direct32(priv, rx_wrt_ptr_reg,
168 spin_unlock_irqrestore(&q->lock, flags);
170 EXPORT_SYMBOL(iwl_legacy_rx_queue_update_write_ptr);
172 int iwl_legacy_rx_queue_alloc(struct iwl_priv *priv)
174 struct iwl_rx_queue *rxq = &priv->rxq;
175 struct device *dev = &priv->pci_dev->dev;
178 spin_lock_init(&rxq->lock);
179 INIT_LIST_HEAD(&rxq->rx_free);
180 INIT_LIST_HEAD(&rxq->rx_used);
182 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
183 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
188 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
189 &rxq->rb_stts_dma, GFP_KERNEL);
193 /* Fill the rx_used queue with _all_ of the Rx buffers */
194 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
195 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
197 /* Set us so that we have processed and used all buffers, but have
198 * not restocked the Rx queue with fresh buffers */
199 rxq->read = rxq->write = 0;
200 rxq->write_actual = 0;
202 rxq->need_update = 0;
206 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
211 EXPORT_SYMBOL(iwl_legacy_rx_queue_alloc);
214 void iwl_legacy_rx_spectrum_measure_notif(struct iwl_priv *priv,
215 struct iwl_rx_mem_buffer *rxb)
217 struct iwl_rx_packet *pkt = rxb_addr(rxb);
218 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
220 if (!report->state) {
222 "Spectrum Measure Notification: Start\n");
226 memcpy(&priv->measure_report, report, sizeof(*report));
227 priv->measurement_status |= MEASUREMENT_READY;
229 EXPORT_SYMBOL(iwl_legacy_rx_spectrum_measure_notif);
232 * returns non-zero if packet should be dropped
234 int iwl_legacy_set_decrypted_flag(struct iwl_priv *priv,
235 struct ieee80211_hdr *hdr,
237 struct ieee80211_rx_status *stats)
239 u16 fc = le16_to_cpu(hdr->frame_control);
242 * All contexts have the same setting here due to it being
243 * a module parameter, so OK to check any context.
245 if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags &
246 RXON_FILTER_DIS_DECRYPT_MSK)
249 if (!(fc & IEEE80211_FCTL_PROTECTED))
252 IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
253 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
254 case RX_RES_STATUS_SEC_TYPE_TKIP:
255 /* The uCode has got a bad phase 1 Key, pushes the packet.
256 * Decryption will be done in SW. */
257 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
258 RX_RES_STATUS_BAD_KEY_TTAK)
261 case RX_RES_STATUS_SEC_TYPE_WEP:
262 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
263 RX_RES_STATUS_BAD_ICV_MIC) {
264 /* bad ICV, the packet is destroyed since the
265 * decryption is inplace, drop it */
266 IWL_DEBUG_RX(priv, "Packet destroyed\n");
269 case RX_RES_STATUS_SEC_TYPE_CCMP:
270 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
271 RX_RES_STATUS_DECRYPT_OK) {
272 IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
273 stats->flag |= RX_FLAG_DECRYPTED;
282 EXPORT_SYMBOL(iwl_legacy_set_decrypted_flag);