drivers/net/wireless/brcm80211/brcmsmac/main.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/pci_ids.h>
  18 #include <linux/if_ether.h>
  19 #include <net/mac80211.h>
  20 #include <brcm_hw_ids.h>
  21 #include <aiutils.h>
  22 #include <chipcommon.h>
  23 #include "rate.h"
  24 #include "scb.h"
  25 #include "phy/phy_hal.h"
  26 #include "channel.h"
  27 #include "antsel.h"
  28 #include "stf.h"
  29 #include "ampdu.h"
  30 #include "mac80211_if.h"
  31 #include "ucode_loader.h"
  32 #include "main.h"
  33
  34 /*
  35  * Indication for txflowcontrol that all priority bits in
  36  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
  37  */
  38 #define ALLPRIO         -1
  39
  40 /*
  41  * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
  42  */
  43 #define SSID_FMT_BUF_LEN        ((4 * IEEE80211_MAX_SSID_LEN) + 1)
  44
  45 /* watchdog timer, in unit of ms */
  46 #define TIMER_INTERVAL_WATCHDOG 1000
  47 /* radio monitor timer, in unit of ms */
  48 #define TIMER_INTERVAL_RADIOCHK 800
  49
  50 /* Max MPC timeout, in unit of watchdog */
  51 #ifndef BRCMS_MPC_MAX_DELAYCNT
  52 #define BRCMS_MPC_MAX_DELAYCNT  10
  53 #endif
  54
  55 /* Min MPC timeout, in unit of watchdog */
  56 #define BRCMS_MPC_MIN_DELAYCNT  1
  57 #define BRCMS_MPC_THRESHOLD     3       /* MPC count threshold level */
  58
  59 /* beacon interval, in unit of 1024TU */
  60 #define BEACON_INTERVAL_DEFAULT 100
  61 /* DTIM interval, in unit of beacon interval */
  62 #define DTIM_INTERVAL_DEFAULT   3
  63
  64 /* Scale down delays to accommodate QT slow speed */
  65 /* beacon interval, in unit of 1024TU */
  66 #define BEACON_INTERVAL_DEF_QT  20
  67 /* DTIM interval, in unit of beacon interval */
  68 #define DTIM_INTERVAL_DEF_QT    1
  69
  70 #define TBTT_ALIGN_LEEWAY_US    100     /* min leeway before first TBTT in us */
  71
  72 /* n-mode support capability */
  73 /* 2x2 includes both 1x1 & 2x2 devices
  74  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
  75  * control it independently
  76  */
  77 #define WL_11N_2x2                      1
  78 #define WL_11N_3x3                      3
  79 #define WL_11N_4x4                      4
  80
  81 /* define 11n feature disable flags */
  82 #define WLFEATURE_DISABLE_11N           0x00000001
  83 #define WLFEATURE_DISABLE_11N_STBC_TX   0x00000002
  84 #define WLFEATURE_DISABLE_11N_STBC_RX   0x00000004
  85 #define WLFEATURE_DISABLE_11N_SGI_TX    0x00000008
  86 #define WLFEATURE_DISABLE_11N_SGI_RX    0x00000010
  87 #define WLFEATURE_DISABLE_11N_AMPDU_TX  0x00000020
  88 #define WLFEATURE_DISABLE_11N_AMPDU_RX  0x00000040
  89 #define WLFEATURE_DISABLE_11N_GF        0x00000080
  90
  91 #define EDCF_ACI_MASK                0x60
  92 #define EDCF_ACI_SHIFT               5
  93 #define EDCF_ECWMIN_MASK             0x0f
  94 #define EDCF_ECWMAX_SHIFT            4
  95 #define EDCF_AIFSN_MASK              0x0f
  96 #define EDCF_AIFSN_MAX               15
  97 #define EDCF_ECWMAX_MASK             0xf0
  98
  99 #define EDCF_AC_BE_TXOP_STA          0x0000
 100 #define EDCF_AC_BK_TXOP_STA          0x0000
 101 #define EDCF_AC_VO_ACI_STA           0x62
 102 #define EDCF_AC_VO_ECW_STA           0x32
 103 #define EDCF_AC_VI_ACI_STA           0x42
 104 #define EDCF_AC_VI_ECW_STA           0x43
 105 #define EDCF_AC_BK_ECW_STA           0xA4
 106 #define EDCF_AC_VI_TXOP_STA          0x005e
 107 #define EDCF_AC_VO_TXOP_STA          0x002f
 108 #define EDCF_AC_BE_ACI_STA           0x03
 109 #define EDCF_AC_BE_ECW_STA           0xA4
 110 #define EDCF_AC_BK_ACI_STA           0x27
 111 #define EDCF_AC_VO_TXOP_AP           0x002f
 112
 113 #define EDCF_TXOP2USEC(txop)         ((txop) << 5)
 114 #define EDCF_ECW2CW(exp)             ((1 << (exp)) - 1)
 115
 116 #define APHY_SYMBOL_TIME        4
 117 #define APHY_PREAMBLE_TIME      16
 118 #define APHY_SIGNAL_TIME        4
 119 #define APHY_SIFS_TIME          16
 120 #define APHY_SERVICE_NBITS      16
 121 #define APHY_TAIL_NBITS         6
 122 #define BPHY_SIFS_TIME          10
 123 #define BPHY_PLCP_SHORT_TIME    96
 124
 125 #define PREN_PREAMBLE           24
 126 #define PREN_MM_EXT             12
 127 #define PREN_PREAMBLE_EXT       4
 128
 129 #define DOT11_MAC_HDR_LEN               24
 130 #define DOT11_ACK_LEN           10
 131 #define DOT11_BA_LEN            4
 132 #define DOT11_OFDM_SIGNAL_EXTENSION     6
 133 #define DOT11_MIN_FRAG_LEN              256
 134 #define DOT11_RTS_LEN           16
 135 #define DOT11_CTS_LEN           10
 136 #define DOT11_BA_BITMAP_LEN             128
 137 #define DOT11_MIN_BEACON_PERIOD         1
 138 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
 139 #define DOT11_MAXNUMFRAGS       16
 140 #define DOT11_MAX_FRAG_LEN              2346
 141
 142 #define BPHY_PLCP_TIME          192
 143 #define RIFS_11N_TIME           2
 144
 145 #define WME_VER                 1
 146 #define WME_SUBTYPE_PARAM_IE    1
 147 #define WME_TYPE                2
 148 #define WME_OUI                 "\x00\x50\xf2"
 149
 150 #define AC_BE                   0
 151 #define AC_BK                   1
 152 #define AC_VI                   2
 153 #define AC_VO                   3
 154
 155 #define BCN_TMPL_LEN            512     /* length of the BCN template area */
 156
 157 /* brcms_bss_info flag bit values */
 158 #define BRCMS_BSS_HT            0x0020  /* BSS is HT (MIMO) capable */
 159
 160 /* Flags used in brcms_c_txq_info.stopped */
 161 /* per prio flow control bits */
 162 #define TXQ_STOP_FOR_PRIOFC_MASK        0x000000FF
 163 /* stop txq enqueue for packet drain */
 164 #define TXQ_STOP_FOR_PKT_DRAIN          0x00000100
 165 /* stop txq enqueue for ampdu flow control */
 166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL   0x00000200
 167
 168 #define BRCMS_HWRXOFF           38      /* chip rx buffer offset */
 169
 170 /* Find basic rate for a given rate */
 171 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
 172 {
 173         if (is_mcs_rate(rspec))
 174                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
 175                        .leg_ofdm];
 176         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
 177 }
 178
 179 static u16 frametype(u32 rspec, u8 mimoframe)
 180 {
 181         if (is_mcs_rate(rspec))
 182                 return mimoframe;
 183         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
 184 }
 185
 186 /* rfdisable delay timer 500 ms, runs of ALP clock */
 187 #define RFDISABLE_DEFAULT       10000000
 188
 189 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
 190
 191 /* precedences numbers for wlc queues. These are twice as may levels as
 192  * 802.1D priorities.
 193  * Odd numbers are used for HI priority traffic at same precedence levels
 194  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
 195  * elsewhere.
 196  */
 197 #define _BRCMS_PREC_NONE                0       /* None = - */
 198 #define _BRCMS_PREC_BK          2       /* BK - Background */
 199 #define _BRCMS_PREC_BE          4       /* BE - Best-effort */
 200 #define _BRCMS_PREC_EE          6       /* EE - Excellent-effort */
 201 #define _BRCMS_PREC_CL          8       /* CL - Controlled Load */
 202 #define _BRCMS_PREC_VI          10      /* Vi - Video */
 203 #define _BRCMS_PREC_VO          12      /* Vo - Voice */
 204 #define _BRCMS_PREC_NC          14      /* NC - Network Control */
 205
 206 /* The BSS is generating beacons in HW */
 207 #define BRCMS_BSSCFG_HW_BCN     0x20
 208
 209 #define SYNTHPU_DLY_APHY_US     3700    /* a phy synthpu_dly time in us */
 210 #define SYNTHPU_DLY_BPHY_US     1050    /* b/g phy synthpu_dly time in us */
 211 #define SYNTHPU_DLY_NPHY_US     2048    /* n phy REV3 synthpu_dly time in us */
 212 #define SYNTHPU_DLY_LPPHY_US    300     /* lpphy synthpu_dly time in us */
 213
 214 #define SYNTHPU_DLY_PHY_US_QT   100     /* QT synthpu_dly time in us */
 215
 216 #define ANTCNT                  10      /* vanilla M_MAX_ANTCNT value */
 217
 218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
 219 #define EDCF_SHORT_S            0
 220 #define EDCF_SFB_S              4
 221 #define EDCF_LONG_S             8
 222 #define EDCF_LFB_S              12
 223 #define EDCF_SHORT_M            BITFIELD_MASK(4)
 224 #define EDCF_SFB_M              BITFIELD_MASK(4)
 225 #define EDCF_LONG_M             BITFIELD_MASK(4)
 226 #define EDCF_LFB_M              BITFIELD_MASK(4)
 227
 228 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
 229 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
 230 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
 231 #define RETRY_SHORT_FB                  3 /* Short count for fallback rate */
 232 #define RETRY_LONG_FB                   2 /* Long count for fallback rate */
 233
 234 #define APHY_CWMIN              15
 235 #define PHY_CWMAX               1023
 236
 237 #define EDCF_AIFSN_MIN               1
 238
 239 #define FRAGNUM_MASK            0xF
 240
 241 #define APHY_SLOT_TIME          9
 242 #define BPHY_SLOT_TIME          20
 243
 244 #define WL_SPURAVOID_OFF        0
 245 #define WL_SPURAVOID_ON1        1
 246 #define WL_SPURAVOID_ON2        2
 247
 248 /* invalid core flags, use the saved coreflags */
 249 #define BRCMS_USE_COREFLAGS     0xffffffff
 250
 251 /* values for PLCPHdr_override */
 252 #define BRCMS_PLCP_AUTO -1
 253 #define BRCMS_PLCP_SHORT        0
 254 #define BRCMS_PLCP_LONG 1
 255
 256 /* values for g_protection_override and n_protection_override */
 257 #define BRCMS_PROTECTION_AUTO           -1
 258 #define BRCMS_PROTECTION_OFF            0
 259 #define BRCMS_PROTECTION_ON             1
 260 #define BRCMS_PROTECTION_MMHDR_ONLY     2
 261 #define BRCMS_PROTECTION_CTS_ONLY               3
 262
 263 /* values for g_protection_control and n_protection_control */
 264 #define BRCMS_PROTECTION_CTL_OFF                0
 265 #define BRCMS_PROTECTION_CTL_LOCAL      1
 266 #define BRCMS_PROTECTION_CTL_OVERLAP    2
 267
 268 /* values for n_protection */
 269 #define BRCMS_N_PROTECTION_OFF          0
 270 #define BRCMS_N_PROTECTION_OPTIONAL     1
 271 #define BRCMS_N_PROTECTION_20IN40               2
 272 #define BRCMS_N_PROTECTION_MIXEDMODE    3
 273
 274 /* values for band specific 40MHz capabilities */
 275 #define BRCMS_N_BW_20ALL                        0
 276 #define BRCMS_N_BW_40ALL                        1
 277 #define BRCMS_N_BW_20IN2G_40IN5G                2
 278
 279 /* bitflags for SGI support (sgi_rx iovar) */
 280 #define BRCMS_N_SGI_20                  0x01
 281 #define BRCMS_N_SGI_40                  0x02
 282
 283 /* defines used by the nrate iovar */
 284 /* MSC in use,indicates b0-6 holds an mcs */
 285 #define NRATE_MCS_INUSE 0x00000080
 286 /* rate/mcs value */
 287 #define NRATE_RATE_MASK 0x0000007f
 288 /* stf mode mask: siso, cdd, stbc, sdm */
 289 #define NRATE_STF_MASK  0x0000ff00
 290 /* stf mode shift */
 291 #define NRATE_STF_SHIFT 8
 292 /* bit indicates override both rate & mode */
 293 #define NRATE_OVERRIDE  0x80000000
 294 /* bit indicate to override mcs only */
 295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
 296 #define NRATE_SGI_MASK  0x00800000      /* sgi mode */
 297 #define NRATE_SGI_SHIFT 23      /* sgi mode */
 298 #define NRATE_LDPC_CODING 0x00400000    /* bit indicates adv coding in use */
 299 #define NRATE_LDPC_SHIFT 22     /* ldpc shift */
 300
 301 #define NRATE_STF_SISO  0       /* stf mode SISO */
 302 #define NRATE_STF_CDD   1       /* stf mode CDD */
 303 #define NRATE_STF_STBC  2       /* stf mode STBC */
 304 #define NRATE_STF_SDM   3       /* stf mode SDM */
 305
 306 #define MAX_DMA_SEGS 4
 307
 308 /* Max # of entries in Tx FIFO based on 4kb page size */
 309 #define NTXD            256
 310 /* Max # of entries in Rx FIFO based on 4kb page size */
 311 #define NRXD            256
 312
 313 /* try to keep this # rbufs posted to the chip */
 314 #define NRXBUFPOST      32
 315
 316 /* data msg txq hiwat mark */
 317 #define BRCMS_DATAHIWAT         50
 318
 319 /* bounded rx loops */
 320 #define RXBND           8 /* max # frames to process in brcms_c_recv() */
 321 #define TXSBND          8 /* max # tx status to process in wlc_txstatus() */
 322
 323 /*
 324  * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
 325  */
 326 #define SSID_FMT_BUF_LEN        ((4 * IEEE80211_MAX_SSID_LEN) + 1)
 327
 328 /* brcmu_format_flags() bit description structure */
 329 struct brcms_c_bit_desc {
 330         u32 bit;
 331         const char *name;
 332 };
 333
 334 /*
 335  * The following table lists the buffer memory allocated to xmt fifos in HW.
 336  * the size is in units of 256bytes(one block), total size is HW dependent
 337  * ucode has default fifo partition, sw can overwrite if necessary
 338  *
 339  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
 340  * the twiki is updated before making changes.
 341  */
 342
 343 /* Starting corerev for the fifo size table */
 344 #define XMTFIFOTBL_STARTREV     20
 345
 346 struct d11init {
 347         __le16 addr;
 348         __le16 size;
 349         __le32 value;
 350 };
 351
 352 struct edcf_acparam {
 353         u8 ACI;
 354         u8 ECW;
 355         u16 TXOP;
 356 } __packed;
 357
 358 const u8 prio2fifo[NUMPRIO] = {
 359         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
 360         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
 361         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
 362         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
 363         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
 364         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
 365         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
 366         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
 367 };
 368
 369 /* debug/trace */
 370 uint brcm_msg_level =
 371 #if defined(BCMDBG)
 372         LOG_ERROR_VAL;
 373 #else
 374         0;
 375 #endif                          /* BCMDBG */
 376
 377 /* TX FIFO number to WME/802.1E Access Category */
 378 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
 379
 380 /* WME/802.1E Access Category to TX FIFO number */
 381 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
 382
 383 /* 802.1D Priority to precedence queue mapping */
 384 const u8 wlc_prio2prec_map[] = {
 385         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
 386         _BRCMS_PREC_BK,         /* 1 BK - Background */
 387         _BRCMS_PREC_NONE,               /* 2 None = - */
 388         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
 389         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
 390         _BRCMS_PREC_VI,         /* 5 Vi - Video */
 391         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
 392         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
 393 };
 394
 395 static const u16 xmtfifo_sz[][NFIFO] = {
 396         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
 397         {20, 192, 192, 21, 17, 5},
 398         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
 399         {9, 58, 22, 14, 14, 5},
 400         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
 401         {20, 192, 192, 21, 17, 5},
 402         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
 403         {20, 192, 192, 21, 17, 5},
 404         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
 405         {9, 58, 22, 14, 14, 5},
 406 };
 407
 408 static const u8 acbitmap2maxprio[] = {
 409         PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK,
 410         PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI,
 411         PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO,
 412         PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO
 413 };
 414
 415 #ifdef BCMDBG
 416 static const char * const fifo_names[] = {
 417         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
 418 #else
 419 static const char fifo_names[6][0];
 420 #endif
 421
 422 #ifdef BCMDBG
 423 /* pointer to most recently allocated wl/wlc */
 424 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
 425 #endif
 426
 427 /* currently the best mechanism for determining SIFS is the band in use */
 428 static u16 get_sifs(struct brcms_band *band)
 429 {
 430         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
 431                                  BPHY_SIFS_TIME;
 432 }
 433
 434 /*
 435  * Detect Card removed.
 436  * Even checking an sbconfig register read will not false trigger when the core
 437  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
 438  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
 439  * reg with fixed 0/1 pattern (some platforms return all 0).
 440  * If clocks are present, call the sb routine which will figure out if the
 441  * device is removed.
 442  */
 443 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
 444 {
 445         if (!wlc->hw->clk)
 446                 return ai_deviceremoved(wlc->hw->sih);
 447         return (R_REG(&wlc->hw->regs->maccontrol) &
 448                 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
 449 }
 450
 451 /* sum the individual fifo tx pending packet counts */
 452 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
 453 {
 454         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
 455                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
 456 }
 457
 458 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
 459 {
 460         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
 461 }
 462
 463 static int brcms_chspec_bw(u16 chanspec)
 464 {
 465         if (CHSPEC_IS40(chanspec))
 466                 return BRCMS_40_MHZ;
 467         if (CHSPEC_IS20(chanspec))
 468                 return BRCMS_20_MHZ;
 469
 470         return BRCMS_10_MHZ;
 471 }
 472
 473 /*
 474  * return true if Minimum Power Consumption should
 475  * be entered, false otherwise
 476  */
 477 static bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc)
 478 {
 479         return false;
 480 }
 481
 482 static bool brcms_c_ismpc(struct brcms_c_info *wlc)
 483 {
 484         return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc));
 485 }
 486
 487 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
 488 {
 489         if (cfg == NULL)
 490                 return;
 491
 492         kfree(cfg->current_bss);
 493         kfree(cfg);
 494 }
 495
 496 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
 497 {
 498         if (wlc == NULL)
 499                 return;
 500
 501         brcms_c_bsscfg_mfree(wlc->bsscfg);
 502         kfree(wlc->pub);
 503         kfree(wlc->modulecb);
 504         kfree(wlc->default_bss);
 505         kfree(wlc->protection);
 506         kfree(wlc->stf);
 507         kfree(wlc->bandstate[0]);
 508         kfree(wlc->corestate->macstat_snapshot);
 509         kfree(wlc->corestate);
 510         kfree(wlc->hw->bandstate[0]);
 511         kfree(wlc->hw);
 512
 513         /* free the wlc */
 514         kfree(wlc);
 515         wlc = NULL;
 516 }
 517
 518 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
 519 {
 520         struct brcms_bss_cfg *cfg;
 521
 522         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
 523         if (cfg == NULL)
 524                 goto fail;
 525
 526         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
 527         if (cfg->current_bss == NULL)
 528                 goto fail;
 529
 530         return cfg;
 531
 532  fail:
 533         brcms_c_bsscfg_mfree(cfg);
 534         return NULL;
 535 }
 536
 537 static struct brcms_c_info *
 538 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
 539 {
 540         struct brcms_c_info *wlc;
 541
 542         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
 543         if (wlc == NULL) {
 544                 *err = 1002;
 545                 goto fail;
 546         }
 547
 548         /* allocate struct brcms_c_pub state structure */
 549         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
 550         if (wlc->pub == NULL) {
 551                 *err = 1003;
 552                 goto fail;
 553         }
 554         wlc->pub->wlc = wlc;
 555
 556         /* allocate struct brcms_hardware state structure */
 557
 558         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
 559         if (wlc->hw == NULL) {
 560                 *err = 1005;
 561                 goto fail;
 562         }
 563         wlc->hw->wlc = wlc;
 564
 565         wlc->hw->bandstate[0] =
 566                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
 567         if (wlc->hw->bandstate[0] == NULL) {
 568                 *err = 1006;
 569                 goto fail;
 570         } else {
 571                 int i;
 572
 573                 for (i = 1; i < MAXBANDS; i++)
 574                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
 575                             ((unsigned long)wlc->hw->bandstate[0] +
 576                              (sizeof(struct brcms_hw_band) * i));
 577         }
 578
 579         wlc->modulecb =
 580                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
 581         if (wlc->modulecb == NULL) {
 582                 *err = 1009;
 583                 goto fail;
 584         }
 585
 586         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
 587         if (wlc->default_bss == NULL) {
 588                 *err = 1010;
 589                 goto fail;
 590         }
 591
 592         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
 593         if (wlc->bsscfg == NULL) {
 594                 *err = 1011;
 595                 goto fail;
 596         }
 597
 598         wlc->protection = kzalloc(sizeof(struct brcms_protection),
 599                                   GFP_ATOMIC);
 600         if (wlc->protection == NULL) {
 601                 *err = 1016;
 602                 goto fail;
 603         }
 604
 605         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
 606         if (wlc->stf == NULL) {
 607                 *err = 1017;
 608                 goto fail;
 609         }
 610
 611         wlc->bandstate[0] =
 612                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
 613         if (wlc->bandstate[0] == NULL) {
 614                 *err = 1025;
 615                 goto fail;
 616         } else {
 617                 int i;
 618
 619                 for (i = 1; i < MAXBANDS; i++)
 620                         wlc->bandstate[i] = (struct brcms_band *)
 621                                 ((unsigned long)wlc->bandstate[0]
 622                                 + (sizeof(struct brcms_band)*i));
 623         }
 624
 625         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
 626         if (wlc->corestate == NULL) {
 627                 *err = 1026;
 628                 goto fail;
 629         }
 630
 631         wlc->corestate->macstat_snapshot =
 632                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
 633         if (wlc->corestate->macstat_snapshot == NULL) {
 634                 *err = 1027;
 635                 goto fail;
 636         }
 637
 638         return wlc;
 639
 640  fail:
 641         brcms_c_detach_mfree(wlc);
 642         return NULL;
 643 }
 644
 645 /*
 646  * Update the slot timing for standard 11b/g (20us slots)
 647  * or shortslot 11g (9us slots)
 648  * The PSM needs to be suspended for this call.
 649  */
 650 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
 651                                         bool shortslot)
 652 {
 653         struct d11regs __iomem *regs;
 654
 655         regs = wlc_hw->regs;
 656
 657         if (shortslot) {
 658                 /* 11g short slot: 11a timing */
 659                 W_REG(&regs->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
 660                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
 661         } else {
 662                 /* 11g long slot: 11b timing */
 663                 W_REG(&regs->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
 664                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
 665         }
 666 }
 667
 668 /*
 669  * calculate frame duration of a given rate and length, return
 670  * time in usec unit
 671  */
 672 uint
 673 brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
 674                         u8 preamble_type, uint mac_len)
 675 {
 676         uint nsyms, dur = 0, Ndps, kNdps;
 677         uint rate = rspec2rate(ratespec);
 678
 679         if (rate == 0) {
 680                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
 681                           wlc->pub->unit);
 682                 rate = BRCM_RATE_1M;
 683         }
 684
 685         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
 686                  wlc->pub->unit, ratespec, preamble_type, mac_len);
 687
 688         if (is_mcs_rate(ratespec)) {
 689                 uint mcs = ratespec & RSPEC_RATE_MASK;
 690                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
 691
 692                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
 693                 if (preamble_type == BRCMS_MM_PREAMBLE)
 694                         dur += PREN_MM_EXT;
 695                 /* 1000Ndbps = kbps * 4 */
 696                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
 697                                    rspec_issgi(ratespec)) * 4;
 698
 699                 if (rspec_stc(ratespec) == 0)
 700                         nsyms =
 701                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
 702                                   APHY_TAIL_NBITS) * 1000, kNdps);
 703                 else
 704                         /* STBC needs to have even number of symbols */
 705                         nsyms =
 706                             2 *
 707                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
 708                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
 709
 710                 dur += APHY_SYMBOL_TIME * nsyms;
 711                 if (wlc->band->bandtype == BRCM_BAND_2G)
 712                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
 713         } else if (is_ofdm_rate(rate)) {
 714                 dur = APHY_PREAMBLE_TIME;
 715                 dur += APHY_SIGNAL_TIME;
 716                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
 717                 Ndps = rate * 2;
 718                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
 719                 nsyms =
 720                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
 721                          Ndps);
 722                 dur += APHY_SYMBOL_TIME * nsyms;
 723                 if (wlc->band->bandtype == BRCM_BAND_2G)
 724                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
 725         } else {
 726                 /*
 727                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
 728                  * will divide out
 729                  */
 730                 mac_len = mac_len * 8 * 2;
 731                 /* calc ceiling of bits/rate = microseconds of air time */
 732                 dur = (mac_len + rate - 1) / rate;
 733                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
 734                         dur += BPHY_PLCP_SHORT_TIME;
 735                 else
 736                         dur += BPHY_PLCP_TIME;
 737         }
 738         return dur;
 739 }
 740
 741 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
 742                                 const struct d11init *inits)
 743 {
 744         int i;
 745         u8 __iomem *base;
 746         u8 __iomem *addr;
 747         u16 size;
 748         u32 value;
 749
 750         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
 751
 752         base = (u8 __iomem *)wlc_hw->regs;
 753
 754         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
 755                 size = le16_to_cpu(inits[i].size);
 756                 addr = base + le16_to_cpu(inits[i].addr);
 757                 value = le32_to_cpu(inits[i].value);
 758                 if (size == 2)
 759                         W_REG((u16 __iomem *)addr, value);
 760                 else if (size == 4)
 761                         W_REG((u32 __iomem *)addr, value);
 762                 else
 763                         break;
 764         }
 765 }
 766
 767 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
 768 {
 769         u8 idx;
 770         u16 addr[] = {
 771                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
 772                 M_HOST_FLAGS5
 773         };
 774
 775         for (idx = 0; idx < MHFMAX; idx++)
 776                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
 777 }
 778
 779 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
 780 {
 781         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
 782         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
 783
 784         /* init microcode host flags */
 785         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
 786
 787         /* do band-specific ucode IHR, SHM, and SCR inits */
 788         if (D11REV_IS(wlc_hw->corerev, 23)) {
 789                 if (BRCMS_ISNPHY(wlc_hw->band))
 790                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
 791                 else
 792                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
 793                                   " %d\n", __func__, wlc_hw->unit,
 794                                   wlc_hw->corerev);
 795         } else {
 796                 if (D11REV_IS(wlc_hw->corerev, 24)) {
 797                         if (BRCMS_ISLCNPHY(wlc_hw->band))
 798                                 brcms_c_write_inits(wlc_hw,
 799                                                     ucode->d11lcn0bsinitvals24);
 800                         else
 801                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
 802                                           " core rev %d\n", __func__,
 803                                           wlc_hw->unit, wlc_hw->corerev);
 804                 } else {
 805                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
 806                                 __func__, wlc_hw->unit, wlc_hw->corerev);
 807                 }
 808         }
 809 }
 810
 811 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
 812 {
 813         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
 814
 815         wlc_hw->phyclk = clk;
 816
 817         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
 818
 819                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
 820                                (SICF_PRST | SICF_FGC));
 821                 udelay(1);
 822                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
 823                 udelay(1);
 824
 825         } else {                /* take phy out of reset */
 826
 827                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
 828                 udelay(1);
 829                 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
 830                 udelay(1);
 831
 832         }
 833 }
 834
 835 /* low-level band switch utility routine */
 836 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
 837 {
 838         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
 839                 bandunit);
 840
 841         wlc_hw->band = wlc_hw->bandstate[bandunit];
 842
 843         /*
 844          * BMAC_NOTE:
 845          *   until we eliminate need for wlc->band refs in low level code
 846          */
 847         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
 848
 849         /* set gmode core flag */
 850         if (wlc_hw->sbclk && !wlc_hw->noreset)
 851                 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
 852                                ((bandunit == 0) ? SICF_GMODE : 0));
 853 }
 854
 855 /* switch to new band but leave it inactive */
 856 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
 857 {
 858         struct brcms_hardware *wlc_hw = wlc->hw;
 859         u32 macintmask;
 860
 861         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
 862
 863         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
 864
 865         /* disable interrupts */
 866         macintmask = brcms_intrsoff(wlc->wl);
 867
 868         /* radio off */
 869         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
 870
 871         brcms_b_core_phy_clk(wlc_hw, OFF);
 872
 873         brcms_c_setxband(wlc_hw, bandunit);
 874
 875         return macintmask;
 876 }
 877
 878 /* process an individual struct tx_status */
 879 static bool
 880 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
 881 {
 882         struct sk_buff *p;
 883         uint queue;
 884         struct d11txh *txh;
 885         struct scb *scb = NULL;
 886         bool free_pdu;
 887         int tx_rts, tx_frame_count, tx_rts_count;
 888         uint totlen, supr_status;
 889         bool lastframe;
 890         struct ieee80211_hdr *h;
 891         u16 mcl;
 892         struct ieee80211_tx_info *tx_info;
 893         struct ieee80211_tx_rate *txrate;
 894         int i;
 895
 896         /* discard intermediate indications for ucode with one legitimate case:
 897          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
 898          *   but the subsequent tx of DATA failed. so it will start rts/cts
 899          *   from the beginning (resetting the rts transmission count)
 900          */
 901         if (!(txs->status & TX_STATUS_AMPDU)
 902             && (txs->status & TX_STATUS_INTERMEDIATE)) {
 903                 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
 904                           __func__);
 905                 return false;
 906         }
 907
 908         queue = txs->frameid & TXFID_QUEUE_MASK;
 909         if (queue >= NFIFO) {
 910                 p = NULL;
 911                 goto fatal;
 912         }
 913
 914         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
 915         if (p == NULL)
 916                 goto fatal;
 917
 918         txh = (struct d11txh *) (p->data);
 919         mcl = le16_to_cpu(txh->MacTxControlLow);
 920
 921         if (txs->phyerr) {
 922                 if (brcm_msg_level & LOG_ERROR_VAL) {
 923                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
 924                                   txs->phyerr, txh->MainRates);
 925                         brcms_c_print_txdesc(txh);
 926                 }
 927                 brcms_c_print_txstatus(txs);
 928         }
 929
 930         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
 931                 goto fatal;
 932         tx_info = IEEE80211_SKB_CB(p);
 933         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
 934
 935         if (tx_info->control.sta)
 936                 scb = &wlc->pri_scb;
 937
 938         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
 939                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
 940                 return false;
 941         }
 942
 943         supr_status = txs->status & TX_STATUS_SUPR_MASK;
 944         if (supr_status == TX_STATUS_SUPR_BADCH)
 945                 BCMMSG(wlc->wiphy,
 946                        "%s: Pkt tx suppressed, possibly channel %d\n",
 947                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
 948
 949         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
 950         tx_frame_count =
 951             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
 952         tx_rts_count =
 953             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
 954
 955         lastframe = !ieee80211_has_morefrags(h->frame_control);
 956
 957         if (!lastframe) {
 958                 wiphy_err(wlc->wiphy, "Not last frame!\n");
 959         } else {
 960                 /*
 961                  * Set information to be consumed by Minstrel ht.
 962                  *
 963                  * The "fallback limit" is the number of tx attempts a given
 964                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
 965                  * limit are sent at the "secondary" rate.
 966                  * A 'short frame' does not exceed RTS treshold.
 967                  */
 968                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
 969                     lfbl,       /* Long Frame Rate Fallback Limit */
 970                     fbl;
 971
 972                 if (queue < AC_COUNT) {
 973                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
 974                                       EDCF_SFB);
 975                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
 976                                       EDCF_LFB);
 977                 } else {
 978                         sfbl = wlc->SFBL;
 979                         lfbl = wlc->LFBL;
 980                 }
 981
 982                 txrate = tx_info->status.rates;
 983                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
 984                         fbl = lfbl;
 985                 else
 986                         fbl = sfbl;
 987
 988                 ieee80211_tx_info_clear_status(tx_info);
 989
 990                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
 991                         /*
 992                          * rate selection requested a fallback rate
 993                          * and we used it
 994                          */
 995                         txrate[0].count = fbl;
 996                         txrate[1].count = tx_frame_count - fbl;
 997                 } else {
 998                         /*
 999                          * rate selection did not request fallback rate, or
1000                          * we didn't need it
1001                          */
1002                         txrate[0].count = tx_frame_count;
1003                         /*
1004                          * rc80211_minstrel.c:minstrel_tx_status() expects
1005                          * unused rates to be marked with idx = -1
1006                          */
1007                         txrate[1].idx = -1;
1008                         txrate[1].count = 0;
1009                 }
1010
1011                 /* clear the rest of the rates */
1012                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
1013                         txrate[i].idx = -1;
1014                         txrate[i].count = 0;
1015                 }
1016
1017                 if (txs->status & TX_STATUS_ACK_RCV)
1018                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
1019         }
1020
1021         totlen = brcmu_pkttotlen(p);
1022         free_pdu = true;
1023
1024         brcms_c_txfifo_complete(wlc, queue, 1);
1025
1026         if (lastframe) {
1027                 p->next = NULL;
1028                 p->prev = NULL;
1029                 /* remove PLCP & Broadcom tx descriptor header */
1030                 skb_pull(p, D11_PHY_HDR_LEN);
1031                 skb_pull(p, D11_TXH_LEN);
1032                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
1033         } else {
1034                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
1035                           "tx_status\n", __func__);
1036         }
1037
1038         return false;
1039
1040  fatal:
1041         if (p)
1042                 brcmu_pkt_buf_free_skb(p);
1043
1044         return true;
1045
1046 }
1047
1048 /* process tx completion events in BMAC
1049  * Return true if more tx status need to be processed. false otherwise.
1050  */
1051 static bool
1052 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1053 {
1054         bool morepending = false;
1055         struct brcms_c_info *wlc = wlc_hw->wlc;
1056         struct d11regs __iomem *regs;
1057         struct tx_status txstatus, *txs;
1058         u32 s1, s2;
1059         uint n = 0;
1060         /*
1061          * Param 'max_tx_num' indicates max. # tx status to process before
1062          * break out.
1063          */
1064         uint max_tx_num = bound ? TXSBND : -1;
1065
1066         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1067
1068         txs = &txstatus;
1069         regs = wlc_hw->regs;
1070         *fatal = false;
1071         while (!(*fatal)
1072                && (s1 = R_REG(&regs->frmtxstatus)) & TXS_V) {
1073
1074                 if (s1 == 0xffffffff) {
1075                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1076                                 wlc_hw->unit, __func__);
1077                         return morepending;
1078                 }
1079
1080                 s2 = R_REG(&regs->frmtxstatus2);
1081
1082                 txs->status = s1 & TXS_STATUS_MASK;
1083                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1084                 txs->sequence = s2 & TXS_SEQ_MASK;
1085                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1086                 txs->lasttxtime = 0;
1087
1088                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1089
1090                 /* !give others some time to run! */
1091                 if (++n >= max_tx_num)
1092                         break;
1093         }
1094
1095         if (*fatal)
1096                 return 0;
1097
1098         if (n >= max_tx_num)
1099                 morepending = true;
1100
1101         if (!pktq_empty(&wlc->pkt_queue->q))
1102                 brcms_c_send_q(wlc);
1103
1104         return morepending;
1105 }
1106
1107 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1108 {
1109         if (!wlc->bsscfg->BSS)
1110                 /*
1111                  * DirFrmQ is now valid...defer setting until end
1112                  * of ATIM window
1113                  */
1114                 wlc->qvalid |= MCMD_DIRFRMQVAL;
1115 }
1116
1117 /* set initial host flags value */
1118 static void
1119 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1120 {
1121         struct brcms_hardware *wlc_hw = wlc->hw;
1122
1123         memset(mhfs, 0, MHFMAX * sizeof(u16));
1124
1125         mhfs[MHF2] |= mhf2_init;
1126
1127         /* prohibit use of slowclock on multifunction boards */
1128         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1129                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1130
1131         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1132                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1133                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1134         }
1135 }
1136
1137 static struct dma64regs __iomem *
1138 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1139 {
1140         if (direction == DMA_TX)
1141                 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1142         return &(hw->regs->fifo64regs[fifonum].dmarcv);
1143 }
1144
1145 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1146 {
1147         uint i;
1148         char name[8];
1149         /*
1150          * ucode host flag 2 needed for pio mode, independent of band and fifo
1151          */
1152         u16 pio_mhf2 = 0;
1153         struct brcms_hardware *wlc_hw = wlc->hw;
1154         uint unit = wlc_hw->unit;
1155         struct wiphy *wiphy = wlc->wiphy;
1156
1157         /* name and offsets for dma_attach */
1158         snprintf(name, sizeof(name), "wl%d", unit);
1159
1160         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1161                 int dma_attach_err = 0;
1162
1163                 /*
1164                  * FIFO 0
1165                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1166                  * RX: RX_FIFO (RX data packets)
1167                  */
1168                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1169                                            (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1170                                             NULL), dmareg(wlc_hw, DMA_RX, 0),
1171                                            (wme ? NTXD : 0), NRXD,
1172                                            RXBUFSZ, -1, NRXBUFPOST,
1173                                            BRCMS_HWRXOFF, &brcm_msg_level);
1174                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1175
1176                 /*
1177                  * FIFO 1
1178                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1179                  *   (legacy) TX_DATA_FIFO (TX data packets)
1180                  * RX: UNUSED
1181                  */
1182                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1183                                            dmareg(wlc_hw, DMA_TX, 1), NULL,
1184                                            NTXD, 0, 0, -1, 0, 0,
1185                                            &brcm_msg_level);
1186                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1187
1188                 /*
1189                  * FIFO 2
1190                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1191                  * RX: UNUSED
1192                  */
1193                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1194                                            dmareg(wlc_hw, DMA_TX, 2), NULL,
1195                                            NTXD, 0, 0, -1, 0, 0,
1196                                            &brcm_msg_level);
1197                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1198                 /*
1199                  * FIFO 3
1200                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1201                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1202                  */
1203                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1204                                            dmareg(wlc_hw, DMA_TX, 3),
1205                                            NULL, NTXD, 0, 0, -1,
1206                                            0, 0, &brcm_msg_level);
1207                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1208 /* Cleaner to leave this as if with AP defined */
1209
1210                 if (dma_attach_err) {
1211                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1212                                   "\n", unit);
1213                         return false;
1214                 }
1215
1216                 /* get pointer to dma engine tx flow control variable */
1217                 for (i = 0; i < NFIFO; i++)
1218                         if (wlc_hw->di[i])
1219                                 wlc_hw->txavail[i] =
1220                                     (uint *) dma_getvar(wlc_hw->di[i],
1221                                                         "&txavail");
1222         }
1223
1224         /* initial ucode host flags */
1225         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1226
1227         return true;
1228 }
1229
1230 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1231 {
1232         uint j;
1233
1234         for (j = 0; j < NFIFO; j++) {
1235                 if (wlc_hw->di[j]) {
1236                         dma_detach(wlc_hw->di[j]);
1237                         wlc_hw->di[j] = NULL;
1238                 }
1239         }
1240 }
1241
1242 /*
1243  * Initialize brcms_c_info default values ...
1244  * may get overrides later in this function
1245  *  BMAC_NOTES, move low out and resolve the dangling ones
1246  */
1247 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1248 {
1249         struct brcms_c_info *wlc = wlc_hw->wlc;
1250
1251         /* set default sw macintmask value */
1252         wlc->defmacintmask = DEF_MACINTMASK;
1253
1254         /* various 802.11g modes */
1255         wlc_hw->shortslot = false;
1256
1257         wlc_hw->SFBL = RETRY_SHORT_FB;
1258         wlc_hw->LFBL = RETRY_LONG_FB;
1259
1260         /* default mac retry limits */
1261         wlc_hw->SRL = RETRY_SHORT_DEF;
1262         wlc_hw->LRL = RETRY_LONG_DEF;
1263         wlc_hw->chanspec = ch20mhz_chspec(1);
1264 }
1265
1266 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1267 {
1268         /* delay before first read of ucode state */
1269         udelay(40);
1270
1271         /* wait until ucode is no longer asleep */
1272         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1273                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1274 }
1275
1276 /* control chip clock to save power, enable dynamic clock or force fast clock */
1277 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1278 {
1279         if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1280                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1281                  * on backplane, but mac core will still run on ALP(not HT) when
1282                  * it enters powersave mode, which means the FCA bit may not be
1283                  * set. Should wakeup mac if driver wants it to run on HT.
1284                  */
1285
1286                 if (wlc_hw->clk) {
1287                         if (mode == CLK_FAST) {
1288                                 OR_REG(&wlc_hw->regs->clk_ctl_st,
1289                                        CCS_FORCEHT);
1290
1291                                 udelay(64);
1292
1293                                 SPINWAIT(((R_REG
1294                                            (&wlc_hw->regs->
1295                                             clk_ctl_st) & CCS_HTAVAIL) == 0),
1296                                          PMU_MAX_TRANSITION_DLY);
1297                                 WARN_ON(!(R_REG
1298                                           (&wlc_hw->regs->
1299                                            clk_ctl_st) & CCS_HTAVAIL));
1300                         } else {
1301                                 if ((wlc_hw->sih->pmurev == 0) &&
1302                                     (R_REG
1303                                      (&wlc_hw->regs->
1304                                       clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1305                                         SPINWAIT(((R_REG
1306                                                    (&wlc_hw->regs->
1307                                                     clk_ctl_st) & CCS_HTAVAIL)
1308                                                   == 0),
1309                                                  PMU_MAX_TRANSITION_DLY);
1310                                 AND_REG(&wlc_hw->regs->clk_ctl_st,
1311                                         ~CCS_FORCEHT);
1312                         }
1313                 }
1314                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1315         } else {
1316
1317                 /* old chips w/o PMU, force HT through cc,
1318                  * then use FCA to verify mac is running fast clock
1319                  */
1320
1321                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1322
1323                 /* check fast clock is available (if core is not in reset) */
1324                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1325                         WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1326                                   SISF_FCLKA));
1327
1328                 /*
1329                  * keep the ucode wake bit on if forcefastclk is on since we
1330                  * do not want ucode to put us back to slow clock when it dozes
1331                  * for PM mode. Code below matches the wake override bit with
1332                  * current forcefastclk state. Only setting bit in wake_override
1333                  * instead of waking ucode immediately since old code had this
1334                  * behavior. Older code set wlc->forcefastclk but only had the
1335                  * wake happen if the wakup_ucode work (protected by an up
1336                  * check) was executed just below.
1337                  */
1338                 if (wlc_hw->forcefastclk)
1339                         mboolset(wlc_hw->wake_override,
1340                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1341                 else
1342                         mboolclr(wlc_hw->wake_override,
1343                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1344         }
1345 }
1346
1347 /* set or clear ucode host flag bits
1348  * it has an optimization for no-change write
1349  * it only writes through shared memory when the core has clock;
1350  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1351  *
1352  *
1353  * bands values are: BRCM_BAND_AUTO <--- Current band only
1354  *                   BRCM_BAND_5G   <--- 5G band only
1355  *                   BRCM_BAND_2G   <--- 2G band only
1356  *                   BRCM_BAND_ALL  <--- All bands
1357  */
1358 void
1359 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1360              int bands)
1361 {
1362         u16 save;
1363         u16 addr[MHFMAX] = {
1364                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1365                 M_HOST_FLAGS5
1366         };
1367         struct brcms_hw_band *band;
1368
1369         if ((val & ~mask) || idx >= MHFMAX)
1370                 return; /* error condition */
1371
1372         switch (bands) {
1373                 /* Current band only or all bands,
1374                  * then set the band to current band
1375                  */
1376         case BRCM_BAND_AUTO:
1377         case BRCM_BAND_ALL:
1378                 band = wlc_hw->band;
1379                 break;
1380         case BRCM_BAND_5G:
1381                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1382                 break;
1383         case BRCM_BAND_2G:
1384                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1385                 break;
1386         default:
1387                 band = NULL;    /* error condition */
1388         }
1389
1390         if (band) {
1391                 save = band->mhfs[idx];
1392                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1393
1394                 /* optimization: only write through if changed, and
1395                  * changed band is the current band
1396                  */
1397                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1398                     && (band == wlc_hw->band))
1399                         brcms_b_write_shm(wlc_hw, addr[idx],
1400                                            (u16) band->mhfs[idx]);
1401         }
1402
1403         if (bands == BRCM_BAND_ALL) {
1404                 wlc_hw->bandstate[0]->mhfs[idx] =
1405                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1406                 wlc_hw->bandstate[1]->mhfs[idx] =
1407                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1408         }
1409 }
1410
1411 /* set the maccontrol register to desired reset state and
1412  * initialize the sw cache of the register
1413  */
1414 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1415 {
1416         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1417         wlc_hw->maccontrol = 0;
1418         wlc_hw->suspended_fifos = 0;
1419         wlc_hw->wake_override = 0;
1420         wlc_hw->mute_override = 0;
1421         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1422 }
1423
1424 /*
1425  * write the software state of maccontrol and
1426  * overrides to the maccontrol register
1427  */
1428 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1429 {
1430         u32 maccontrol = wlc_hw->maccontrol;
1431
1432         /* OR in the wake bit if overridden */
1433         if (wlc_hw->wake_override)
1434                 maccontrol |= MCTL_WAKE;
1435
1436         /* set AP and INFRA bits for mute if needed */
1437         if (wlc_hw->mute_override) {
1438                 maccontrol &= ~(MCTL_AP);
1439                 maccontrol |= MCTL_INFRA;
1440         }
1441
1442         W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1443 }
1444
1445 /* set or clear maccontrol bits */
1446 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1447 {
1448         u32 maccontrol;
1449         u32 new_maccontrol;
1450
1451         if (val & ~mask)
1452                 return; /* error condition */
1453         maccontrol = wlc_hw->maccontrol;
1454         new_maccontrol = (maccontrol & ~mask) | val;
1455
1456         /* if the new maccontrol value is the same as the old, nothing to do */
1457         if (new_maccontrol == maccontrol)
1458                 return;
1459
1460         /* something changed, cache the new value */
1461         wlc_hw->maccontrol = new_maccontrol;
1462
1463         /* write the new values with overrides applied */
1464         brcms_c_mctrl_write(wlc_hw);
1465 }
1466
1467 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1468                                  u32 override_bit)
1469 {
1470         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1471                 mboolset(wlc_hw->wake_override, override_bit);
1472                 return;
1473         }
1474
1475         mboolset(wlc_hw->wake_override, override_bit);
1476
1477         brcms_c_mctrl_write(wlc_hw);
1478         brcms_b_wait_for_wake(wlc_hw);
1479 }
1480
1481 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1482                                    u32 override_bit)
1483 {
1484         mboolclr(wlc_hw->wake_override, override_bit);
1485
1486         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1487                 return;
1488
1489         brcms_c_mctrl_write(wlc_hw);
1490 }
1491
1492 /* When driver needs ucode to stop beaconing, it has to make sure that
1493  * MCTL_AP is clear and MCTL_INFRA is set
1494  * Mode           MCTL_AP        MCTL_INFRA
1495  * AP                1              1
1496  * STA               0              1 <--- This will ensure no beacons
1497  * IBSS              0              0
1498  */
1499 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1500 {
1501         wlc_hw->mute_override = 1;
1502
1503         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1504          * override, then there is no change to write
1505          */
1506         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1507                 return;
1508
1509         brcms_c_mctrl_write(wlc_hw);
1510 }
1511
1512 /* Clear the override on AP and INFRA bits */
1513 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1514 {
1515         if (wlc_hw->mute_override == 0)
1516                 return;
1517
1518         wlc_hw->mute_override = 0;
1519
1520         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1521          * override, then there is no change to write
1522          */
1523         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1524                 return;
1525
1526         brcms_c_mctrl_write(wlc_hw);
1527 }
1528
1529 /*
1530  * Write a MAC address to the given match reg offset in the RXE match engine.
1531  */
1532 static void
1533 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1534                        const u8 *addr)
1535 {
1536         struct d11regs __iomem *regs;
1537         u16 mac_l;
1538         u16 mac_m;
1539         u16 mac_h;
1540
1541         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1542                  wlc_hw->unit);
1543
1544         regs = wlc_hw->regs;
1545         mac_l = addr[0] | (addr[1] << 8);
1546         mac_m = addr[2] | (addr[3] << 8);
1547         mac_h = addr[4] | (addr[5] << 8);
1548
1549         /* enter the MAC addr into the RXE match registers */
1550         W_REG(&regs->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1551         W_REG(&regs->rcm_mat_data, mac_l);
1552         W_REG(&regs->rcm_mat_data, mac_m);
1553         W_REG(&regs->rcm_mat_data, mac_h);
1554
1555 }
1556
1557 void
1558 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1559                             void *buf)
1560 {
1561         struct d11regs __iomem *regs;
1562         u32 word;
1563         __le32 word_le;
1564         __be32 word_be;
1565         bool be_bit;
1566         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1567
1568         regs = wlc_hw->regs;
1569         W_REG(&regs->tplatewrptr, offset);
1570
1571         /* if MCTL_BIGEND bit set in mac control register,
1572          * the chip swaps data in fifo, as well as data in
1573          * template ram
1574          */
1575         be_bit = (R_REG(&regs->maccontrol) & MCTL_BIGEND) != 0;
1576
1577         while (len > 0) {
1578                 memcpy(&word, buf, sizeof(u32));
1579
1580                 if (be_bit) {
1581                         word_be = cpu_to_be32(word);
1582                         word = *(u32 *)&word_be;
1583                 } else {
1584                         word_le = cpu_to_le32(word);
1585                         word = *(u32 *)&word_le;
1586                 }
1587
1588                 W_REG(&regs->tplatewrdata, word);
1589
1590                 buf = (u8 *) buf + sizeof(u32);
1591                 len -= sizeof(u32);
1592         }
1593 }
1594
1595 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1596 {
1597         wlc_hw->band->CWmin = newmin;
1598
1599         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1600         (void)R_REG(&wlc_hw->regs->objaddr);
1601         W_REG(&wlc_hw->regs->objdata, newmin);
1602 }
1603
1604 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1605 {
1606         wlc_hw->band->CWmax = newmax;
1607
1608         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1609         (void)R_REG(&wlc_hw->regs->objaddr);
1610         W_REG(&wlc_hw->regs->objdata, newmax);
1611 }
1612
1613 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1614 {
1615         bool fastclk;
1616
1617         /* request FAST clock if not on */
1618         fastclk = wlc_hw->forcefastclk;
1619         if (!fastclk)
1620                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1621
1622         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1623
1624         brcms_b_phy_reset(wlc_hw);
1625         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1626
1627         /* restore the clk */
1628         if (!fastclk)
1629                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1630 }
1631
1632 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1633 {
1634         u16 v;
1635         struct brcms_c_info *wlc = wlc_hw->wlc;
1636         /* update SYNTHPU_DLY */
1637
1638         if (BRCMS_ISLCNPHY(wlc->band))
1639                 v = SYNTHPU_DLY_LPPHY_US;
1640         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1641                 v = SYNTHPU_DLY_NPHY_US;
1642         else
1643                 v = SYNTHPU_DLY_BPHY_US;
1644
1645         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1646 }
1647
1648 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1649 {
1650         u16 phyctl;
1651         u16 phytxant = wlc_hw->bmac_phytxant;
1652         u16 mask = PHY_TXC_ANT_MASK;
1653
1654         /* set the Probe Response frame phy control word */
1655         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1656         phyctl = (phyctl & ~mask) | phytxant;
1657         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1658
1659         /* set the Response (ACK/CTS) frame phy control word */
1660         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1661         phyctl = (phyctl & ~mask) | phytxant;
1662         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1663 }
1664
1665 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1666                                          u8 rate)
1667 {
1668         uint i;
1669         u8 plcp_rate = 0;
1670         struct plcp_signal_rate_lookup {
1671                 u8 rate;
1672                 u8 signal_rate;
1673         };
1674         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1675         const struct plcp_signal_rate_lookup rate_lookup[] = {
1676                 {BRCM_RATE_6M, 0xB},
1677                 {BRCM_RATE_9M, 0xF},
1678                 {BRCM_RATE_12M, 0xA},
1679                 {BRCM_RATE_18M, 0xE},
1680                 {BRCM_RATE_24M, 0x9},
1681                 {BRCM_RATE_36M, 0xD},
1682                 {BRCM_RATE_48M, 0x8},
1683                 {BRCM_RATE_54M, 0xC}
1684         };
1685
1686         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1687                 if (rate == rate_lookup[i].rate) {
1688                         plcp_rate = rate_lookup[i].signal_rate;
1689                         break;
1690                 }
1691         }
1692
1693         /* Find the SHM pointer to the rate table entry by looking in the
1694          * Direct-map Table
1695          */
1696         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1697 }
1698
1699 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1700 {
1701         u8 rate;
1702         u8 rates[8] = {
1703                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1704                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1705         };
1706         u16 entry_ptr;
1707         u16 pctl1;
1708         uint i;
1709
1710         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1711                 return;
1712
1713         /* walk the phy rate table and update the entries */
1714         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1715                 rate = rates[i];
1716
1717                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1718
1719                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1720                 pctl1 =
1721                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1722
1723                 /* modify the value */
1724                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1725                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1726
1727                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1728                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1729                                    pctl1);
1730         }
1731 }
1732
1733 /* band-specific init */
1734 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1735 {
1736         struct brcms_hardware *wlc_hw = wlc->hw;
1737
1738         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1739                 wlc_hw->band->bandunit);
1740
1741         brcms_c_ucode_bsinit(wlc_hw);
1742
1743         wlc_phy_init(wlc_hw->band->pi, chanspec);
1744
1745         brcms_c_ucode_txant_set(wlc_hw);
1746
1747         /*
1748          * cwmin is band-specific, update hardware
1749          * with value for current band
1750          */
1751         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1752         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1753
1754         brcms_b_update_slot_timing(wlc_hw,
1755                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1756                                    true : wlc_hw->shortslot);
1757
1758         /* write phytype and phyvers */
1759         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1760         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1761
1762         /*
1763          * initialize the txphyctl1 rate table since
1764          * shmem is shared between bands
1765          */
1766         brcms_upd_ofdm_pctl1_table(wlc_hw);
1767
1768         brcms_b_upd_synthpu(wlc_hw);
1769 }
1770
1771 /* Perform a soft reset of the PHY PLL */
1772 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1773 {
1774         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1775
1776         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1777                    offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1778         udelay(1);
1779         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1780                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1781         udelay(1);
1782         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1783                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1784         udelay(1);
1785         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1786                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1787         udelay(1);
1788 }
1789
1790 /* light way to turn on phy clock without reset for NPHY only
1791  *  refer to brcms_b_core_phy_clk for full version
1792  */
1793 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1794 {
1795         /* support(necessary for NPHY and HYPHY) only */
1796         if (!BRCMS_ISNPHY(wlc_hw->band))
1797                 return;
1798
1799         if (ON == clk)
1800                 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1801         else
1802                 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1803
1804 }
1805
1806 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1807 {
1808         if (ON == clk)
1809                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1810         else
1811                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1812 }
1813
1814 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1815 {
1816         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1817         u32 phy_bw_clkbits;
1818         bool phy_in_reset = false;
1819
1820         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1821
1822         if (pih == NULL)
1823                 return;
1824
1825         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1826
1827         /* Specific reset sequence required for NPHY rev 3 and 4 */
1828         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1829             NREV_LE(wlc_hw->band->phyrev, 4)) {
1830                 /* Set the PHY bandwidth */
1831                 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1832
1833                 udelay(1);
1834
1835                 /* Perform a soft reset of the PHY PLL */
1836                 brcms_b_core_phypll_reset(wlc_hw);
1837
1838                 /* reset the PHY */
1839                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1840                                (SICF_PRST | SICF_PCLKE));
1841                 phy_in_reset = true;
1842         } else {
1843                 ai_core_cflags(wlc_hw->sih,
1844                                (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1845                                (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1846         }
1847
1848         udelay(2);
1849         brcms_b_core_phy_clk(wlc_hw, ON);
1850
1851         if (pih)
1852                 wlc_phy_anacore(pih, ON);
1853 }
1854
1855 /* switch to and initialize new band */
1856 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1857                             u16 chanspec) {
1858         struct brcms_c_info *wlc = wlc_hw->wlc;
1859         u32 macintmask;
1860
1861         /* Enable the d11 core before accessing it */
1862         if (!ai_iscoreup(wlc_hw->sih)) {
1863                 ai_core_reset(wlc_hw->sih, 0, 0);
1864                 brcms_c_mctrl_reset(wlc_hw);
1865         }
1866
1867         macintmask = brcms_c_setband_inact(wlc, bandunit);
1868
1869         if (!wlc_hw->up)
1870                 return;
1871
1872         brcms_b_core_phy_clk(wlc_hw, ON);
1873
1874         /* band-specific initializations */
1875         brcms_b_bsinit(wlc, chanspec);
1876
1877         /*
1878          * If there are any pending software interrupt bits,
1879          * then replace these with a harmless nonzero value
1880          * so brcms_c_dpc() will re-enable interrupts when done.
1881          */
1882         if (wlc->macintstatus)
1883                 wlc->macintstatus = MI_DMAINT;
1884
1885         /* restore macintmask */
1886         brcms_intrsrestore(wlc->wl, macintmask);
1887
1888         /* ucode should still be suspended.. */
1889         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1890 }
1891
1892 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1893 {
1894
1895         /* reject unsupported corerev */
1896         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1897                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1898                           wlc_hw->corerev);
1899                 return false;
1900         }
1901
1902         return true;
1903 }
1904
1905 /* Validate some board info parameters */
1906 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1907 {
1908         uint boardrev = wlc_hw->boardrev;
1909
1910         /* 4 bits each for board type, major, minor, and tiny version */
1911         uint brt = (boardrev & 0xf000) >> 12;
1912         uint b0 = (boardrev & 0xf00) >> 8;
1913         uint b1 = (boardrev & 0xf0) >> 4;
1914         uint b2 = boardrev & 0xf;
1915
1916         /* voards from other vendors are always considered valid */
1917         if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1918                 return true;
1919
1920         /* do some boardrev sanity checks when boardvendor is Broadcom */
1921         if (boardrev == 0)
1922                 return false;
1923
1924         if (boardrev <= 0xff)
1925                 return true;
1926
1927         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1928                 || (b2 > 9))
1929                 return false;
1930
1931         return true;
1932 }
1933
1934 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1935 {
1936         enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1937         char *macaddr;
1938
1939         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1940         macaddr = getvar(wlc_hw->sih, var_id);
1941         if (macaddr != NULL)
1942                 return macaddr;
1943
1944         if (wlc_hw->_nbands > 1)
1945                 var_id = BRCMS_SROM_ET1MACADDR;
1946         else
1947                 var_id = BRCMS_SROM_IL0MACADDR;
1948
1949         macaddr = getvar(wlc_hw->sih, var_id);
1950         if (macaddr == NULL)
1951                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1952                           "getvar(%d) not found\n", wlc_hw->unit, var_id);
1953
1954         return macaddr;
1955 }
1956
1957 /* power both the pll and external oscillator on/off */
1958 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1959 {
1960         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1961
1962         /*
1963          * dont power down if plldown is false or
1964          * we must poll hw radio disable
1965          */
1966         if (!want && wlc_hw->pllreq)
1967                 return;
1968
1969         if (wlc_hw->sih)
1970                 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1971
1972         wlc_hw->sbclk = want;
1973         if (!wlc_hw->sbclk) {
1974                 wlc_hw->clk = false;
1975                 if (wlc_hw->band && wlc_hw->band->pi)
1976                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1977         }
1978 }
1979
1980 /*
1981  * Return true if radio is disabled, otherwise false.
1982  * hw radio disable signal is an external pin, users activate it asynchronously
1983  * this function could be called when driver is down and w/o clock
1984  * it operates on different registers depending on corerev and boardflag.
1985  */
1986 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1987 {
1988         bool v, clk, xtal;
1989         u32 resetbits = 0, flags = 0;
1990
1991         xtal = wlc_hw->sbclk;
1992         if (!xtal)
1993                 brcms_b_xtal(wlc_hw, ON);
1994
1995         /* may need to take core out of reset first */
1996         clk = wlc_hw->clk;
1997         if (!clk) {
1998                 /*
1999                  * mac no longer enables phyclk automatically when driver
2000                  * accesses phyreg throughput mac. This can be skipped since
2001                  * only mac reg is accessed below
2002                  */
2003                 flags |= SICF_PCLKE;
2004
2005                 /*
2006                  * AI chip doesn't restore bar0win2 on
2007                  * hibernation/resume, need sw fixup
2008                  */
2009                 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2010                     (wlc_hw->sih->chip == BCM43225_CHIP_ID))
2011                         wlc_hw->regs = (struct d11regs __iomem *)
2012                                         ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
2013                 ai_core_reset(wlc_hw->sih, flags, resetbits);
2014                 brcms_c_mctrl_reset(wlc_hw);
2015         }
2016
2017         v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
2018
2019         /* put core back into reset */
2020         if (!clk)
2021                 ai_core_disable(wlc_hw->sih, 0);
2022
2023         if (!xtal)
2024                 brcms_b_xtal(wlc_hw, OFF);
2025
2026         return v;
2027 }
2028
2029 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2030 {
2031         struct dma_pub *di = wlc_hw->di[fifo];
2032         return dma_rxreset(di);
2033 }
2034
2035 /* d11 core reset
2036  *   ensure fask clock during reset
2037  *   reset dma
2038  *   reset d11(out of reset)
2039  *   reset phy(out of reset)
2040  *   clear software macintstatus for fresh new start
2041  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2042  */
2043 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2044 {
2045         struct d11regs __iomem *regs;
2046         uint i;
2047         bool fastclk;
2048         u32 resetbits = 0;
2049
2050         if (flags == BRCMS_USE_COREFLAGS)
2051                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2052
2053         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2054
2055         regs = wlc_hw->regs;
2056
2057         /* request FAST clock if not on  */
2058         fastclk = wlc_hw->forcefastclk;
2059         if (!fastclk)
2060                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2061
2062         /* reset the dma engines except first time thru */
2063         if (ai_iscoreup(wlc_hw->sih)) {
2064                 for (i = 0; i < NFIFO; i++)
2065                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2066                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2067                                           "dma_txreset[%d]: cannot stop dma\n",
2068                                            wlc_hw->unit, __func__, i);
2069
2070                 if ((wlc_hw->di[RX_FIFO])
2071                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2072                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2073                                   "[%d]: cannot stop dma\n",
2074                                   wlc_hw->unit, __func__, RX_FIFO);
2075         }
2076         /* if noreset, just stop the psm and return */
2077         if (wlc_hw->noreset) {
2078                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2079                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2080                 return;
2081         }
2082
2083         /*
2084          * mac no longer enables phyclk automatically when driver accesses
2085          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2086          * band->pi is invalid. need to enable PHY CLK
2087          */
2088         flags |= SICF_PCLKE;
2089
2090         /*
2091          * reset the core
2092          * In chips with PMU, the fastclk request goes through d11 core
2093          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2094          *
2095          * This adds some delay and we can optimize it by also requesting
2096          * fastclk through chipcommon during this period if necessary. But
2097          * that has to work coordinate with other driver like mips/arm since
2098          * they may touch chipcommon as well.
2099          */
2100         wlc_hw->clk = false;
2101         ai_core_reset(wlc_hw->sih, flags, resetbits);
2102         wlc_hw->clk = true;
2103         if (wlc_hw->band && wlc_hw->band->pi)
2104                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2105
2106         brcms_c_mctrl_reset(wlc_hw);
2107
2108         if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2109                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2110
2111         brcms_b_phy_reset(wlc_hw);
2112
2113         /* turn on PHY_PLL */
2114         brcms_b_core_phypll_ctl(wlc_hw, true);
2115
2116         /* clear sw intstatus */
2117         wlc_hw->wlc->macintstatus = 0;
2118
2119         /* restore the clk setting */
2120         if (!fastclk)
2121                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2122 }
2123
2124 /* txfifo sizes needs to be modified(increased) since the newer cores
2125  * have more memory.
2126  */
2127 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2128 {
2129         struct d11regs __iomem *regs = wlc_hw->regs;
2130         u16 fifo_nu;
2131         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2132         u16 txfifo_def, txfifo_def1;
2133         u16 txfifo_cmd;
2134
2135         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2136         txfifo_startblk = TXFIFO_START_BLK;
2137
2138         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2139         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2140
2141                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2142                 txfifo_def = (txfifo_startblk & 0xff) |
2143                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2144                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2145                     ((((txfifo_endblk -
2146                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2147                 txfifo_cmd =
2148                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2149
2150                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2151                 W_REG(&regs->xmtfifodef, txfifo_def);
2152                 W_REG(&regs->xmtfifodef1, txfifo_def1);
2153
2154                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2155
2156                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2157         }
2158         /*
2159          * need to propagate to shm location to be in sync since ucode/hw won't
2160          * do this
2161          */
2162         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2163                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2164         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2165                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2166         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2167                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2168                             xmtfifo_sz[TX_AC_BK_FIFO]));
2169         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2170                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2171                             xmtfifo_sz[TX_BCMC_FIFO]));
2172 }
2173
2174 /* This function is used for changing the tsf frac register
2175  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2176  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2177  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2178  * HTPHY Formula is 2^26/freq(MHz) e.g.
2179  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2180  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2181  * For spuron: 123MHz -> 2^26/123    = 545600.5
2182  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2183  * For spur off: 120MHz -> 2^26/120    = 559240.5
2184  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2185  */
2186
2187 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2188 {
2189         struct d11regs __iomem *regs = wlc_hw->regs;
2190
2191         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2192             (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2193                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2194                         W_REG(&regs->tsf_clk_frac_l, 0x2082);
2195                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2196                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2197                         W_REG(&regs->tsf_clk_frac_l, 0x5341);
2198                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2199                 } else {        /* 120Mhz */
2200                         W_REG(&regs->tsf_clk_frac_l, 0x8889);
2201                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2202                 }
2203         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2204                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2205                         W_REG(&regs->tsf_clk_frac_l, 0x7CE0);
2206                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2207                 } else {        /* 80Mhz */
2208                         W_REG(&regs->tsf_clk_frac_l, 0xCCCD);
2209                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2210                 }
2211         }
2212 }
2213
2214 /* Initialize GPIOs that are controlled by D11 core */
2215 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2216 {
2217         struct brcms_hardware *wlc_hw = wlc->hw;
2218         struct d11regs __iomem *regs;
2219         u32 gc, gm;
2220
2221         regs = wlc_hw->regs;
2222
2223         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2224         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2225
2226         /*
2227          * Common GPIO setup:
2228          *      G0 = LED 0 = WLAN Activity
2229          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2230          *      G2 = LED 2 = WLAN 5 GHz Radio State
2231          *      G4 = radio disable input (HI enabled, LO disabled)
2232          */
2233
2234         gc = gm = 0;
2235
2236         /* Allocate GPIOs for mimo antenna diversity feature */
2237         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2238                 /* Enable antenna diversity, use 2x3 mode */
2239                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2240                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2241                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2242                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2243
2244                 /* init superswitch control */
2245                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2246
2247         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2248                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2249                 /*
2250                  * The board itself is powered by these GPIOs
2251                  * (when not sending pattern) so set them high
2252                  */
2253                 OR_REG(&regs->psm_gpio_oe,
2254                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2255                 OR_REG(&regs->psm_gpio_out,
2256                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2257
2258                 /* Enable antenna diversity, use 2x4 mode */
2259                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2260                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2261                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2262                              BRCM_BAND_ALL);
2263
2264                 /* Configure the desired clock to be 4Mhz */
2265                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2266                                    ANTSEL_CLKDIV_4MHZ);
2267         }
2268
2269         /*
2270          * gpio 9 controls the PA. ucode is responsible
2271          * for wiggling out and oe
2272          */
2273         if (wlc_hw->boardflags & BFL_PACTRL)
2274                 gm |= gc |= BOARD_GPIO_PACTRL;
2275
2276         /* apply to gpiocontrol register */
2277         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2278 }
2279
2280 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2281                               const __le32 ucode[], const size_t nbytes)
2282 {
2283         struct d11regs __iomem *regs = wlc_hw->regs;
2284         uint i;
2285         uint count;
2286
2287         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2288
2289         count = (nbytes / sizeof(u32));
2290
2291         W_REG(&regs->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2292         (void)R_REG(&regs->objaddr);
2293         for (i = 0; i < count; i++)
2294                 W_REG(&regs->objdata, le32_to_cpu(ucode[i]));
2295
2296 }
2297
2298 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2299 {
2300         struct brcms_c_info *wlc;
2301         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2302
2303         wlc = wlc_hw->wlc;
2304
2305         if (wlc_hw->ucode_loaded)
2306                 return;
2307
2308         if (D11REV_IS(wlc_hw->corerev, 23)) {
2309                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2310                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2311                                           ucode->bcm43xx_16_mimosz);
2312                         wlc_hw->ucode_loaded = true;
2313                 } else
2314                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2315                                   "corerev %d\n",
2316                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2317         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2318                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2319                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2320                                           ucode->bcm43xx_24_lcnsz);
2321                         wlc_hw->ucode_loaded = true;
2322                 } else {
2323                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2324                                   "corerev %d\n",
2325                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2326                 }
2327         }
2328 }
2329
2330 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2331 {
2332         /* update sw state */
2333         wlc_hw->bmac_phytxant = phytxant;
2334
2335         /* push to ucode if up */
2336         if (!wlc_hw->up)
2337                 return;
2338         brcms_c_ucode_txant_set(wlc_hw);
2339
2340 }
2341
2342 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2343 {
2344         return (u16) wlc_hw->wlc->stf->txant;
2345 }
2346
2347 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2348 {
2349         wlc_hw->antsel_type = antsel_type;
2350
2351         /* Update the antsel type for phy module to use */
2352         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2353 }
2354
2355 static void brcms_c_fatal_error(struct brcms_c_info *wlc)
2356 {
2357         wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
2358                   wlc->pub->unit);
2359         brcms_init(wlc->wl);
2360 }
2361
2362 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2363 {
2364         bool fatal = false;
2365         uint unit;
2366         uint intstatus, idx;
2367         struct d11regs __iomem *regs = wlc_hw->regs;
2368         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2369
2370         unit = wlc_hw->unit;
2371
2372         for (idx = 0; idx < NFIFO; idx++) {
2373                 /* read intstatus register and ignore any non-error bits */
2374                 intstatus =
2375                     R_REG(&regs->intctrlregs[idx].intstatus) & I_ERRORS;
2376                 if (!intstatus)
2377                         continue;
2378
2379                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2380                         unit, idx, intstatus);
2381
2382                 if (intstatus & I_RO) {
2383                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2384                                   "overflow\n", unit, idx);
2385                         fatal = true;
2386                 }
2387
2388                 if (intstatus & I_PC) {
2389                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2390                                  unit, idx);
2391                         fatal = true;
2392                 }
2393
2394                 if (intstatus & I_PD) {
2395                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2396                                   idx);
2397                         fatal = true;
2398                 }
2399
2400                 if (intstatus & I_DE) {
2401                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2402                                   "error\n", unit, idx);
2403                         fatal = true;
2404                 }
2405
2406                 if (intstatus & I_RU)
2407                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2408                                   "underflow\n", idx, unit);
2409
2410                 if (intstatus & I_XU) {
2411                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2412                                   "underflow\n", idx, unit);
2413                         fatal = true;
2414                 }
2415
2416                 if (fatal) {
2417                         brcms_c_fatal_error(wlc_hw->wlc);       /* big hammer */
2418                         break;
2419                 } else
2420                         W_REG(&regs->intctrlregs[idx].intstatus,
2421                               intstatus);
2422         }
2423 }
2424
2425 void brcms_c_intrson(struct brcms_c_info *wlc)
2426 {
2427         struct brcms_hardware *wlc_hw = wlc->hw;
2428         wlc->macintmask = wlc->defmacintmask;
2429         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2430 }
2431
2432 /*
2433  * callback for siutils.c, which has only wlc handler, no wl they both check
2434  * up, not only because there is no need to off/restore d11 interrupt but also
2435  * because per-port code may require sync with valid interrupt.
2436  */
2437 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2438 {
2439         if (!wlc->hw->up)
2440                 return 0;
2441
2442         return brcms_intrsoff(wlc->wl);
2443 }
2444
2445 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2446 {
2447         if (!wlc->hw->up)
2448                 return;
2449
2450         brcms_intrsrestore(wlc->wl, macintmask);
2451 }
2452
2453 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2454 {
2455         struct brcms_hardware *wlc_hw = wlc->hw;
2456         u32 macintmask;
2457
2458         if (!wlc_hw->clk)
2459                 return 0;
2460
2461         macintmask = wlc->macintmask;   /* isr can still happen */
2462
2463         W_REG(&wlc_hw->regs->macintmask, 0);
2464         (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2465         udelay(1);              /* ensure int line is no longer driven */
2466         wlc->macintmask = 0;
2467
2468         /* return previous macintmask; resolve race between us and our isr */
2469         return wlc->macintstatus ? 0 : macintmask;
2470 }
2471
2472 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2473 {
2474         struct brcms_hardware *wlc_hw = wlc->hw;
2475         if (!wlc_hw->clk)
2476                 return;
2477
2478         wlc->macintmask = macintmask;
2479         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2480 }
2481
2482 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2483                                     uint tx_fifo)
2484 {
2485         u8 fifo = 1 << tx_fifo;
2486
2487         /* Two clients of this code, 11h Quiet period and scanning. */
2488
2489         /* only suspend if not already suspended */
2490         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2491                 return;
2492
2493         /* force the core awake only if not already */
2494         if (wlc_hw->suspended_fifos == 0)
2495                 brcms_c_ucode_wake_override_set(wlc_hw,
2496                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2497
2498         wlc_hw->suspended_fifos |= fifo;
2499
2500         if (wlc_hw->di[tx_fifo]) {
2501                 /*
2502                  * Suspending AMPDU transmissions in the middle can cause
2503                  * underflow which may result in mismatch between ucode and
2504                  * driver so suspend the mac before suspending the FIFO
2505                  */
2506                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2507                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2508
2509                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2510
2511                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2512                         brcms_c_enable_mac(wlc_hw->wlc);
2513         }
2514 }
2515
2516 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2517                                    uint tx_fifo)
2518 {
2519         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2520          * but need to be done here for PIO otherwise the watchdog will catch
2521          * the inconsistency and fire
2522          */
2523         /* Two clients of this code, 11h Quiet period and scanning. */
2524         if (wlc_hw->di[tx_fifo])
2525                 dma_txresume(wlc_hw->di[tx_fifo]);
2526
2527         /* allow core to sleep again */
2528         if (wlc_hw->suspended_fifos == 0)
2529                 return;
2530         else {
2531                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2532                 if (wlc_hw->suspended_fifos == 0)
2533                         brcms_c_ucode_wake_override_clear(wlc_hw,
2534                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2535         }
2536 }
2537
2538 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2539 {
2540         static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2541
2542         if (on) {
2543                 /* suspend tx fifos */
2544                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2545                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2546                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2547                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2548
2549                 /* zero the address match register so we do not send ACKs */
2550                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2551                                        null_ether_addr);
2552         } else {
2553                 /* resume tx fifos */
2554                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2555                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2556                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2557                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2558
2559                 /* Restore address */
2560                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2561                                        wlc_hw->etheraddr);
2562         }
2563
2564         wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2565
2566         if (on)
2567                 brcms_c_ucode_mute_override_set(wlc_hw);
2568         else
2569                 brcms_c_ucode_mute_override_clear(wlc_hw);
2570 }
2571
2572 /*
2573  * Read and clear macintmask and macintstatus and intstatus registers.
2574  * This routine should be called with interrupts off
2575  * Return:
2576  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2577  *   0 if the interrupt is not for us, or we are in some special cases;
2578  *   device interrupt status bits otherwise.
2579  */
2580 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2581 {
2582         struct brcms_hardware *wlc_hw = wlc->hw;
2583         struct d11regs __iomem *regs = wlc_hw->regs;
2584         u32 macintstatus;
2585
2586         /* macintstatus includes a DMA interrupt summary bit */
2587         macintstatus = R_REG(&regs->macintstatus);
2588
2589         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2590                  macintstatus);
2591
2592         /* detect cardbus removed, in power down(suspend) and in reset */
2593         if (brcms_deviceremoved(wlc))
2594                 return -1;
2595
2596         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2597          * handle that case here.
2598          */
2599         if (macintstatus == 0xffffffff)
2600                 return 0;
2601
2602         /* defer unsolicited interrupts */
2603         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2604
2605         /* if not for us */
2606         if (macintstatus == 0)
2607                 return 0;
2608
2609         /* interrupts are already turned off for CFE build
2610          * Caution: For CFE Turning off the interrupts again has some undesired
2611          * consequences
2612          */
2613         /* turn off the interrupts */
2614         W_REG(&regs->macintmask, 0);
2615         (void)R_REG(&regs->macintmask); /* sync readback */
2616         wlc->macintmask = 0;
2617
2618         /* clear device interrupts */
2619         W_REG(&regs->macintstatus, macintstatus);
2620
2621         /* MI_DMAINT is indication of non-zero intstatus */
2622         if (macintstatus & MI_DMAINT)
2623                 /*
2624                  * only fifo interrupt enabled is I_RI in
2625                  * RX_FIFO. If MI_DMAINT is set, assume it
2626                  * is set and clear the interrupt.
2627                  */
2628                 W_REG(&regs->intctrlregs[RX_FIFO].intstatus,
2629                       DEF_RXINTMASK);
2630
2631         return macintstatus;
2632 }
2633
2634 /* Update wlc->macintstatus and wlc->intstatus[]. */
2635 /* Return true if they are updated successfully. false otherwise */
2636 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2637 {
2638         u32 macintstatus;
2639
2640         /* read and clear macintstatus and intstatus registers */
2641         macintstatus = wlc_intstatus(wlc, false);
2642
2643         /* device is removed */
2644         if (macintstatus == 0xffffffff)
2645                 return false;
2646
2647         /* update interrupt status in software */
2648         wlc->macintstatus |= macintstatus;
2649
2650         return true;
2651 }
2652
2653 /*
2654  * First-level interrupt processing.
2655  * Return true if this was our interrupt, false otherwise.
2656  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2657  * false otherwise.
2658  */
2659 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2660 {
2661         struct brcms_hardware *wlc_hw = wlc->hw;
2662         u32 macintstatus;
2663
2664         *wantdpc = false;
2665
2666         if (!wlc_hw->up || !wlc->macintmask)
2667                 return false;
2668
2669         /* read and clear macintstatus and intstatus registers */
2670         macintstatus = wlc_intstatus(wlc, true);
2671
2672         if (macintstatus == 0xffffffff)
2673                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2674                           " path\n");
2675
2676         /* it is not for us */
2677         if (macintstatus == 0)
2678                 return false;
2679
2680         *wantdpc = true;
2681
2682         /* save interrupt status bits */
2683         wlc->macintstatus = macintstatus;
2684
2685         return true;
2686
2687 }
2688
2689 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2690 {
2691         struct brcms_hardware *wlc_hw = wlc->hw;
2692         struct d11regs __iomem *regs = wlc_hw->regs;
2693         u32 mc, mi;
2694         struct wiphy *wiphy = wlc->wiphy;
2695
2696         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2697                 wlc_hw->band->bandunit);
2698
2699         /*
2700          * Track overlapping suspend requests
2701          */
2702         wlc_hw->mac_suspend_depth++;
2703         if (wlc_hw->mac_suspend_depth > 1)
2704                 return;
2705
2706         /* force the core awake */
2707         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2708
2709         mc = R_REG(&regs->maccontrol);
2710
2711         if (mc == 0xffffffff) {
2712                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2713                           __func__);
2714                 brcms_down(wlc->wl);
2715                 return;
2716         }
2717         WARN_ON(mc & MCTL_PSM_JMP_0);
2718         WARN_ON(!(mc & MCTL_PSM_RUN));
2719         WARN_ON(!(mc & MCTL_EN_MAC));
2720
2721         mi = R_REG(&regs->macintstatus);
2722         if (mi == 0xffffffff) {
2723                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2724                           __func__);
2725                 brcms_down(wlc->wl);
2726                 return;
2727         }
2728         WARN_ON(mi & MI_MACSSPNDD);
2729
2730         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2731
2732         SPINWAIT(!(R_REG(&regs->macintstatus) & MI_MACSSPNDD),
2733                  BRCMS_MAX_MAC_SUSPEND);
2734
2735         if (!(R_REG(&regs->macintstatus) & MI_MACSSPNDD)) {
2736                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2737                           " and MI_MACSSPNDD is still not on.\n",
2738                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2739                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2740                           "psm_brc 0x%04x\n", wlc_hw->unit,
2741                           R_REG(&regs->psmdebug),
2742                           R_REG(&regs->phydebug),
2743                           R_REG(&regs->psm_brc));
2744         }
2745
2746         mc = R_REG(&regs->maccontrol);
2747         if (mc == 0xffffffff) {
2748                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2749                           __func__);
2750                 brcms_down(wlc->wl);
2751                 return;
2752         }
2753         WARN_ON(mc & MCTL_PSM_JMP_0);
2754         WARN_ON(!(mc & MCTL_PSM_RUN));
2755         WARN_ON(mc & MCTL_EN_MAC);
2756 }
2757
2758 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2759 {
2760         struct brcms_hardware *wlc_hw = wlc->hw;
2761         struct d11regs __iomem *regs = wlc_hw->regs;
2762         u32 mc, mi;
2763
2764         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2765                 wlc->band->bandunit);
2766
2767         /*
2768          * Track overlapping suspend requests
2769          */
2770         wlc_hw->mac_suspend_depth--;
2771         if (wlc_hw->mac_suspend_depth > 0)
2772                 return;
2773
2774         mc = R_REG(&regs->maccontrol);
2775         WARN_ON(mc & MCTL_PSM_JMP_0);
2776         WARN_ON(mc & MCTL_EN_MAC);
2777         WARN_ON(!(mc & MCTL_PSM_RUN));
2778
2779         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2780         W_REG(&regs->macintstatus, MI_MACSSPNDD);
2781
2782         mc = R_REG(&regs->maccontrol);
2783         WARN_ON(mc & MCTL_PSM_JMP_0);
2784         WARN_ON(!(mc & MCTL_EN_MAC));
2785         WARN_ON(!(mc & MCTL_PSM_RUN));
2786
2787         mi = R_REG(&regs->macintstatus);
2788         WARN_ON(mi & MI_MACSSPNDD);
2789
2790         brcms_c_ucode_wake_override_clear(wlc_hw,
2791                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2792 }
2793
2794 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2795 {
2796         wlc_hw->hw_stf_ss_opmode = stf_mode;
2797
2798         if (wlc_hw->clk)
2799                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2800 }
2801
2802 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2803 {
2804         struct d11regs __iomem *regs;
2805         u32 w, val;
2806         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2807
2808         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2809
2810         regs = wlc_hw->regs;
2811
2812         /* Validate dchip register access */
2813
2814         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2815         (void)R_REG(&regs->objaddr);
2816         w = R_REG(&regs->objdata);
2817
2818         /* Can we write and read back a 32bit register? */
2819         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2820         (void)R_REG(&regs->objaddr);
2821         W_REG(&regs->objdata, (u32) 0xaa5555aa);
2822
2823         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2824         (void)R_REG(&regs->objaddr);
2825         val = R_REG(&regs->objdata);
2826         if (val != (u32) 0xaa5555aa) {
2827                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2828                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2829                 return false;
2830         }
2831
2832         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2833         (void)R_REG(&regs->objaddr);
2834         W_REG(&regs->objdata, (u32) 0x55aaaa55);
2835
2836         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2837         (void)R_REG(&regs->objaddr);
2838         val = R_REG(&regs->objdata);
2839         if (val != (u32) 0x55aaaa55) {
2840                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2841                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2842                 return false;
2843         }
2844
2845         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2846         (void)R_REG(&regs->objaddr);
2847         W_REG(&regs->objdata, w);
2848
2849         /* clear CFPStart */
2850         W_REG(&regs->tsf_cfpstart, 0);
2851
2852         w = R_REG(&regs->maccontrol);
2853         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2854             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2855                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2856                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2857                           (MCTL_IHR_EN | MCTL_WAKE),
2858                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2859                 return false;
2860         }
2861
2862         return true;
2863 }
2864
2865 #define PHYPLL_WAIT_US  100000
2866
2867 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2868 {
2869         struct d11regs __iomem *regs;
2870         u32 tmp;
2871
2872         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2873
2874         tmp = 0;
2875         regs = wlc_hw->regs;
2876
2877         if (on) {
2878                 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2879                         OR_REG(&regs->clk_ctl_st,
2880                                (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2881                                 CCS_ERSRC_REQ_PHYPLL));
2882                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2883                                   (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2884                                  PHYPLL_WAIT_US);
2885
2886                         tmp = R_REG(&regs->clk_ctl_st);
2887                         if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2888                             (CCS_ERSRC_AVAIL_HT))
2889                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2890                                           " PLL failed\n", __func__);
2891                 } else {
2892                         OR_REG(&regs->clk_ctl_st,
2893                                (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2894                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2895                                   (CCS_ERSRC_AVAIL_D11PLL |
2896                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2897                                  (CCS_ERSRC_AVAIL_D11PLL |
2898                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2899
2900                         tmp = R_REG(&regs->clk_ctl_st);
2901                         if ((tmp &
2902                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2903                             !=
2904                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2905                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2906                                           "PHY PLL failed\n", __func__);
2907                 }
2908         } else {
2909                 /*
2910                  * Since the PLL may be shared, other cores can still
2911                  * be requesting it; so we'll deassert the request but
2912                  * not wait for status to comply.
2913                  */
2914                 AND_REG(&regs->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2915                 tmp = R_REG(&regs->clk_ctl_st);
2916         }
2917 }
2918
2919 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2920 {
2921         bool dev_gone;
2922
2923         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2924
2925         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2926
2927         if (dev_gone)
2928                 return;
2929
2930         if (wlc_hw->noreset)
2931                 return;
2932
2933         /* radio off */
2934         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2935
2936         /* turn off analog core */
2937         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2938
2939         /* turn off PHYPLL to save power */
2940         brcms_b_core_phypll_ctl(wlc_hw, false);
2941
2942         wlc_hw->clk = false;
2943         ai_core_disable(wlc_hw->sih, 0);
2944         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2945 }
2946
2947 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2948 {
2949         struct brcms_hardware *wlc_hw = wlc->hw;
2950         uint i;
2951
2952         /* free any posted tx packets */
2953         for (i = 0; i < NFIFO; i++)
2954                 if (wlc_hw->di[i]) {
2955                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2956                         wlc->core->txpktpend[i] = 0;
2957                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2958                 }
2959
2960         /* free any posted rx packets */
2961         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2962 }
2963
2964 static u16
2965 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2966 {
2967         struct d11regs __iomem *regs = wlc_hw->regs;
2968         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
2969         u16 __iomem *objdata_hi = objdata_lo + 1;
2970         u16 v;
2971
2972         W_REG(&regs->objaddr, sel | (offset >> 2));
2973         (void)R_REG(&regs->objaddr);
2974         if (offset & 2)
2975                 v = R_REG(objdata_hi);
2976         else
2977                 v = R_REG(objdata_lo);
2978
2979         return v;
2980 }
2981
2982 static void
2983 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2984                      u32 sel)
2985 {
2986         struct d11regs __iomem *regs = wlc_hw->regs;
2987         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
2988         u16 __iomem *objdata_hi = objdata_lo + 1;
2989
2990         W_REG(&regs->objaddr, sel | (offset >> 2));
2991         (void)R_REG(&regs->objaddr);
2992         if (offset & 2)
2993                 W_REG(objdata_hi, v);
2994         else
2995                 W_REG(objdata_lo, v);
2996 }
2997
2998 /*
2999  * Read a single u16 from shared memory.
3000  * SHM 'offset' needs to be an even address
3001  */
3002 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
3003 {
3004         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
3005 }
3006
3007 /*
3008  * Write a single u16 to shared memory.
3009  * SHM 'offset' needs to be an even address
3010  */
3011 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
3012 {
3013         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
3014 }
3015
3016 /*
3017  * Copy a buffer to shared memory of specified type .
3018  * SHM 'offset' needs to be an even address and
3019  * Buffer length 'len' must be an even number of bytes
3020  * 'sel' selects the type of memory
3021  */
3022 void
3023 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
3024                       const void *buf, int len, u32 sel)
3025 {
3026         u16 v;
3027         const u8 *p = (const u8 *)buf;
3028         int i;
3029
3030         if (len <= 0 || (offset & 1) || (len & 1))
3031                 return;
3032
3033         for (i = 0; i < len; i += 2) {
3034                 v = p[i] | (p[i + 1] << 8);
3035                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
3036         }
3037 }
3038
3039 /*
3040  * Copy a piece of shared memory of specified type to a buffer .
3041  * SHM 'offset' needs to be an even address and
3042  * Buffer length 'len' must be an even number of bytes
3043  * 'sel' selects the type of memory
3044  */
3045 void
3046 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3047                          int len, u32 sel)
3048 {
3049         u16 v;
3050         u8 *p = (u8 *) buf;
3051         int i;
3052
3053         if (len <= 0 || (offset & 1) || (len & 1))
3054                 return;
3055
3056         for (i = 0; i < len; i += 2) {
3057                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3058                 p[i] = v & 0xFF;
3059                 p[i + 1] = (v >> 8) & 0xFF;
3060         }
3061 }
3062
3063 /* Copy a buffer to shared memory.
3064  * SHM 'offset' needs to be an even address and
3065  * Buffer length 'len' must be an even number of bytes
3066  */
3067 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
3068                         const void *buf, int len)
3069 {
3070         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
3071 }
3072
3073 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3074                                    u16 SRL, u16 LRL)
3075 {
3076         wlc_hw->SRL = SRL;
3077         wlc_hw->LRL = LRL;
3078
3079         /* write retry limit to SCR, shouldn't need to suspend */
3080         if (wlc_hw->up) {
3081                 W_REG(&wlc_hw->regs->objaddr,
3082                       OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3083                 (void)R_REG(&wlc_hw->regs->objaddr);
3084                 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3085                 W_REG(&wlc_hw->regs->objaddr,
3086                       OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3087                 (void)R_REG(&wlc_hw->regs->objaddr);
3088                 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3089         }
3090 }
3091
3092 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3093 {
3094         if (set) {
3095                 if (mboolisset(wlc_hw->pllreq, req_bit))
3096                         return;
3097
3098                 mboolset(wlc_hw->pllreq, req_bit);
3099
3100                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3101                         if (!wlc_hw->sbclk)
3102                                 brcms_b_xtal(wlc_hw, ON);
3103                 }
3104         } else {
3105                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3106                         return;
3107
3108                 mboolclr(wlc_hw->pllreq, req_bit);
3109
3110                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3111                         if (wlc_hw->sbclk)
3112                                 brcms_b_xtal(wlc_hw, OFF);
3113                 }
3114         }
3115 }
3116
3117 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3118 {
3119         wlc_hw->antsel_avail = antsel_avail;
3120 }
3121
3122 /*
3123  * conditions under which the PM bit should be set in outgoing frames
3124  * and STAY_AWAKE is meaningful
3125  */
3126 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3127 {
3128         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3129
3130         /* disallow PS when one of the following global conditions meets */
3131         if (!wlc->pub->associated)
3132                 return false;
3133
3134         /* disallow PS when one of these meets when not scanning */
3135         if (wlc->monitor)
3136                 return false;
3137
3138         if (cfg->associated) {
3139                 /*
3140                  * disallow PS when one of the following
3141                  * bsscfg specific conditions meets
3142                  */
3143                 if (!cfg->BSS)
3144                         return false;
3145
3146                 return false;
3147         }
3148
3149         return true;
3150 }
3151
3152 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3153 {
3154         int i;
3155         struct macstat macstats;
3156 #ifdef BCMDBG
3157         u16 delta;
3158         u16 rxf0ovfl;
3159         u16 txfunfl[NFIFO];
3160 #endif                          /* BCMDBG */
3161
3162         /* if driver down, make no sense to update stats */
3163         if (!wlc->pub->up)
3164                 return;
3165
3166 #ifdef BCMDBG
3167         /* save last rx fifo 0 overflow count */
3168         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3169
3170         /* save last tx fifo  underflow count */
3171         for (i = 0; i < NFIFO; i++)
3172                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3173 #endif                          /* BCMDBG */
3174
3175         /* Read mac stats from contiguous shared memory */
3176         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3177                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
3178
3179 #ifdef BCMDBG
3180         /* check for rx fifo 0 overflow */
3181         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3182         if (delta)
3183                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3184                           wlc->pub->unit, delta);
3185
3186         /* check for tx fifo underflows */
3187         for (i = 0; i < NFIFO; i++) {
3188                 delta =
3189                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3190                               txfunfl[i]);
3191                 if (delta)
3192                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3193                                   "\n", wlc->pub->unit, delta, i);
3194         }
3195 #endif                          /* BCMDBG */
3196
3197         /* merge counters from dma module */
3198         for (i = 0; i < NFIFO; i++) {
3199                 if (wlc->hw->di[i])
3200                         dma_counterreset(wlc->hw->di[i]);
3201         }
3202 }
3203
3204 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3205 {
3206         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3207
3208         /* reset the core */
3209         if (!brcms_deviceremoved(wlc_hw->wlc))
3210                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3211
3212         /* purge the dma rings */
3213         brcms_c_flushqueues(wlc_hw->wlc);
3214 }
3215
3216 void brcms_c_reset(struct brcms_c_info *wlc)
3217 {
3218         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3219
3220         /* slurp up hw mac counters before core reset */
3221         brcms_c_statsupd(wlc);
3222
3223         /* reset our snapshot of macstat counters */
3224         memset((char *)wlc->core->macstat_snapshot, 0,
3225                 sizeof(struct macstat));
3226
3227         brcms_b_reset(wlc->hw);
3228 }
3229
3230 /* Return the channel the driver should initialize during brcms_c_init.
3231  * the channel may have to be changed from the currently configured channel
3232  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3233  * invalid channel for current country, etc.)
3234  */
3235 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3236 {
3237         u16 chanspec =
3238             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3239             WL_CHANSPEC_BAND_2G;
3240
3241         return chanspec;
3242 }
3243
3244 void brcms_c_init_scb(struct scb *scb)
3245 {
3246         int i;
3247
3248         memset(scb, 0, sizeof(struct scb));
3249         scb->flags = SCB_WMECAP | SCB_HTCAP;
3250         for (i = 0; i < NUMPRIO; i++) {
3251                 scb->seqnum[i] = 0;
3252                 scb->seqctl[i] = 0xFFFF;
3253         }
3254
3255         scb->seqctl_nonqos = 0xFFFF;
3256         scb->magic = SCB_MAGIC;
3257 }
3258
3259 /* d11 core init
3260  *   reset PSM
3261  *   download ucode/PCM
3262  *   let ucode run to suspended
3263  *   download ucode inits
3264  *   config other core registers
3265  *   init dma
3266  */
3267 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3268 {
3269         struct brcms_hardware *wlc_hw = wlc->hw;
3270         struct d11regs __iomem *regs;
3271         u32 sflags;
3272         uint bcnint_us;
3273         uint i = 0;
3274         bool fifosz_fixup = false;
3275         int err = 0;
3276         u16 buf[NFIFO];
3277         struct wiphy *wiphy = wlc->wiphy;
3278         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3279
3280         regs = wlc_hw->regs;
3281
3282         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3283
3284         /* reset PSM */
3285         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3286
3287         brcms_ucode_download(wlc_hw);
3288         /*
3289          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3290          */
3291         fifosz_fixup = true;
3292
3293         /* let the PSM run to the suspended state, set mode to BSS STA */
3294         W_REG(&regs->macintstatus, -1);
3295         brcms_b_mctrl(wlc_hw, ~0,
3296                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3297
3298         /* wait for ucode to self-suspend after auto-init */
3299         SPINWAIT(((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0),
3300                  1000 * 1000);
3301         if ((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0)
3302                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3303                           "suspend!\n", wlc_hw->unit);
3304
3305         brcms_c_gpio_init(wlc);
3306
3307         sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3308
3309         if (D11REV_IS(wlc_hw->corerev, 23)) {
3310                 if (BRCMS_ISNPHY(wlc_hw->band))
3311                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3312                 else
3313                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3314                                   " %d\n", __func__, wlc_hw->unit,
3315                                   wlc_hw->corerev);
3316         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3317                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3318                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3319                 else
3320                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3321                                   " %d\n", __func__, wlc_hw->unit,
3322                                   wlc_hw->corerev);
3323         } else {
3324                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3325                           __func__, wlc_hw->unit, wlc_hw->corerev);
3326         }
3327
3328         /* For old ucode, txfifo sizes needs to be modified(increased) */
3329         if (fifosz_fixup == true)
3330                 brcms_b_corerev_fifofixup(wlc_hw);
3331
3332         /* check txfifo allocations match between ucode and driver */
3333         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3334         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3335                 i = TX_AC_BE_FIFO;
3336                 err = -1;
3337         }
3338         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3339         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3340                 i = TX_AC_VI_FIFO;
3341                 err = -1;
3342         }
3343         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3344         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3345         buf[TX_AC_BK_FIFO] &= 0xff;
3346         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3347                 i = TX_AC_BK_FIFO;
3348                 err = -1;
3349         }
3350         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3351                 i = TX_AC_VO_FIFO;
3352                 err = -1;
3353         }
3354         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3355         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3356         buf[TX_BCMC_FIFO] &= 0xff;
3357         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3358                 i = TX_BCMC_FIFO;
3359                 err = -1;
3360         }
3361         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3362                 i = TX_ATIM_FIFO;
3363                 err = -1;
3364         }
3365         if (err != 0)
3366                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3367                           " driver size %d index %d\n", buf[i],
3368                           wlc_hw->xmtfifo_sz[i], i);
3369
3370         /* make sure we can still talk to the mac */
3371         WARN_ON(R_REG(&regs->maccontrol) == 0xffffffff);
3372
3373         /* band-specific inits done by wlc_bsinit() */
3374
3375         /* Set up frame burst size and antenna swap threshold init values */
3376         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3377         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3378
3379         /* enable one rx interrupt per received frame */
3380         W_REG(&regs->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3381
3382         /* set the station mode (BSS STA) */
3383         brcms_b_mctrl(wlc_hw,
3384                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3385                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3386
3387         /* set up Beacon interval */
3388         bcnint_us = 0x8000 << 10;
3389         W_REG(&regs->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3390         W_REG(&regs->tsf_cfpstart, bcnint_us);
3391         W_REG(&regs->macintstatus, MI_GP1);
3392
3393         /* write interrupt mask */
3394         W_REG(&regs->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3395
3396         /* allow the MAC to control the PHY clock (dynamic on/off) */
3397         brcms_b_macphyclk_set(wlc_hw, ON);
3398
3399         /* program dynamic clock control fast powerup delay register */
3400         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3401         W_REG(&regs->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3402
3403         /* tell the ucode the corerev */
3404         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3405
3406         /* tell the ucode MAC capabilities */
3407         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3408                            (u16) (wlc_hw->machwcap & 0xffff));
3409         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3410                            (u16) ((wlc_hw->
3411                                       machwcap >> 16) & 0xffff));
3412
3413         /* write retry limits to SCR, this done after PSM init */
3414         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3415         (void)R_REG(&regs->objaddr);
3416         W_REG(&regs->objdata, wlc_hw->SRL);
3417         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3418         (void)R_REG(&regs->objaddr);
3419         W_REG(&regs->objdata, wlc_hw->LRL);
3420
3421         /* write rate fallback retry limits */
3422         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3423         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3424
3425         AND_REG(&regs->ifs_ctl, 0x0FFF);
3426         W_REG(&regs->ifs_aifsn, EDCF_AIFSN_MIN);
3427
3428         /* init the tx dma engines */
3429         for (i = 0; i < NFIFO; i++) {
3430                 if (wlc_hw->di[i])
3431                         dma_txinit(wlc_hw->di[i]);
3432         }
3433
3434         /* init the rx dma engine(s) and post receive buffers */
3435         dma_rxinit(wlc_hw->di[RX_FIFO]);
3436         dma_rxfill(wlc_hw->di[RX_FIFO]);
3437 }
3438
3439 void
3440 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3441                           bool mute) {
3442         u32 macintmask;
3443         bool fastclk;
3444         struct brcms_c_info *wlc = wlc_hw->wlc;
3445
3446         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3447
3448         /* request FAST clock if not on */
3449         fastclk = wlc_hw->forcefastclk;
3450         if (!fastclk)
3451                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3452
3453         /* disable interrupts */
3454         macintmask = brcms_intrsoff(wlc->wl);
3455
3456         /* set up the specified band and chanspec */
3457         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3458         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3459
3460         /* do one-time phy inits and calibration */
3461         wlc_phy_cal_init(wlc_hw->band->pi);
3462
3463         /* core-specific initialization */
3464         brcms_b_coreinit(wlc);
3465
3466         /* suspend the tx fifos and mute the phy for preism cac time */
3467         if (mute)
3468                 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3469
3470         /* band-specific inits */
3471         brcms_b_bsinit(wlc, chanspec);
3472
3473         /* restore macintmask */
3474         brcms_intrsrestore(wlc->wl, macintmask);
3475
3476         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3477          * is suspended and brcms_c_enable_mac() will clear this override bit.
3478          */
3479         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3480
3481         /*
3482          * initialize mac_suspend_depth to 1 to match ucode
3483          * initial suspended state
3484          */
3485         wlc_hw->mac_suspend_depth = 1;
3486
3487         /* restore the clk */
3488         if (!fastclk)
3489                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3490 }
3491
3492 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3493                                      u16 chanspec)
3494 {
3495         /* Save our copy of the chanspec */
3496         wlc->chanspec = chanspec;
3497
3498         /* Set the chanspec and power limits for this locale */
3499         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3500
3501         if (wlc->stf->ss_algosel_auto)
3502                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3503                                             chanspec);
3504
3505         brcms_c_stf_ss_update(wlc, wlc->band);
3506 }
3507
3508 static void
3509 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3510 {
3511         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3512                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3513                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3514                 brcms_chspec_bw(wlc->default_bss->chanspec),
3515                 wlc->stf->txstreams);
3516 }
3517
3518 /* derive wlc->band->basic_rate[] table from 'rateset' */
3519 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3520                               struct brcms_c_rateset *rateset)
3521 {
3522         u8 rate;
3523         u8 mandatory;
3524         u8 cck_basic = 0;
3525         u8 ofdm_basic = 0;
3526         u8 *br = wlc->band->basic_rate;
3527         uint i;
3528
3529         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3530         memset(br, 0, BRCM_MAXRATE + 1);
3531
3532         /* For each basic rate in the rates list, make an entry in the
3533          * best basic lookup.
3534          */
3535         for (i = 0; i < rateset->count; i++) {
3536                 /* only make an entry for a basic rate */
3537                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3538                         continue;
3539
3540                 /* mask off basic bit */
3541                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3542
3543                 if (rate > BRCM_MAXRATE) {
3544                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3545                                   "invalid rate 0x%X in rate set\n",
3546                                   rateset->rates[i]);
3547                         continue;
3548                 }
3549
3550                 br[rate] = rate;
3551         }
3552
3553         /* The rate lookup table now has non-zero entries for each
3554          * basic rate, equal to the basic rate: br[basicN] = basicN
3555          *
3556          * To look up the best basic rate corresponding to any
3557          * particular rate, code can use the basic_rate table
3558          * like this
3559          *
3560          * basic_rate = wlc->band->basic_rate[tx_rate]
3561          *
3562          * Make sure there is a best basic rate entry for
3563          * every rate by walking up the table from low rates
3564          * to high, filling in holes in the lookup table
3565          */
3566
3567         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3568                 rate = wlc->band->hw_rateset.rates[i];
3569
3570                 if (br[rate] != 0) {
3571                         /* This rate is a basic rate.
3572                          * Keep track of the best basic rate so far by
3573                          * modulation type.
3574                          */
3575                         if (is_ofdm_rate(rate))
3576                                 ofdm_basic = rate;
3577                         else
3578                                 cck_basic = rate;
3579
3580                         continue;
3581                 }
3582
3583                 /* This rate is not a basic rate so figure out the
3584                  * best basic rate less than this rate and fill in
3585                  * the hole in the table
3586                  */
3587
3588                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3589
3590                 if (br[rate] != 0)
3591                         continue;
3592
3593                 if (is_ofdm_rate(rate)) {
3594                         /*
3595                          * In 11g and 11a, the OFDM mandatory rates
3596                          * are 6, 12, and 24 Mbps
3597                          */
3598                         if (rate >= BRCM_RATE_24M)
3599                                 mandatory = BRCM_RATE_24M;
3600                         else if (rate >= BRCM_RATE_12M)
3601                                 mandatory = BRCM_RATE_12M;
3602                         else
3603                                 mandatory = BRCM_RATE_6M;
3604                 } else {
3605                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3606                         mandatory = rate;
3607                 }
3608
3609                 br[rate] = mandatory;
3610         }
3611 }
3612
3613 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3614                                      u16 chanspec)
3615 {
3616         struct brcms_c_rateset default_rateset;
3617         uint parkband;
3618         uint i, band_order[2];
3619
3620         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3621         /*
3622          * We might have been bandlocked during down and the chip
3623          * power-cycled (hibernate). Figure out the right band to park on
3624          */
3625         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3626                 /* updated in brcms_c_bandlock() */
3627                 parkband = wlc->band->bandunit;
3628                 band_order[0] = band_order[1] = parkband;
3629         } else {
3630                 /* park on the band of the specified chanspec */
3631                 parkband = chspec_bandunit(chanspec);
3632
3633                 /* order so that parkband initialize last */
3634                 band_order[0] = parkband ^ 1;
3635                 band_order[1] = parkband;
3636         }
3637
3638         /* make each band operational, software state init */
3639         for (i = 0; i < wlc->pub->_nbands; i++) {
3640                 uint j = band_order[i];
3641
3642                 wlc->band = wlc->bandstate[j];
3643
3644                 brcms_default_rateset(wlc, &default_rateset);
3645
3646                 /* fill in hw_rate */
3647                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3648                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3649                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3650
3651                 /* init basic rate lookup */
3652                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3653         }
3654
3655         /* sync up phy/radio chanspec */
3656         brcms_c_set_phy_chanspec(wlc, chanspec);
3657 }
3658
3659 static void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3660 {
3661         if (wlc->bcnmisc_monitor)
3662                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3663         else
3664                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3665 }
3666
3667 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3668 {
3669         wlc->bcnmisc_monitor = promisc;
3670         brcms_c_mac_bcn_promisc(wlc);
3671 }
3672
3673 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3674 static void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3675 {
3676         u32 promisc_bits = 0;
3677
3678         /*
3679          * promiscuous mode just sets MCTL_PROMISC
3680          * Note: APs get all BSS traffic without the need to set
3681          * the MCTL_PROMISC bit since all BSS data traffic is
3682          * directed at the AP
3683          */
3684         if (wlc->pub->promisc)
3685                 promisc_bits |= MCTL_PROMISC;
3686
3687         /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3688          * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3689          * handled in brcms_c_mac_bcn_promisc()
3690          */
3691         if (wlc->monitor)
3692                 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3693
3694         brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3695 }
3696
3697 /*
3698  * ucode, hwmac update
3699  *    Channel dependent updates for ucode and hw
3700  */
3701 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3702 {
3703         /* enable or disable any active IBSSs depending on whether or not
3704          * we are on the home channel
3705          */
3706         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3707                 if (wlc->pub->associated) {
3708                         /*
3709                          * BMAC_NOTE: This is something that should be fixed
3710                          * in ucode inits. I think that the ucode inits set
3711                          * up the bcn templates and shm values with a bogus
3712                          * beacon. This should not be done in the inits. If
3713                          * ucode needs to set up a beacon for testing, the
3714                          * test routines should write it down, not expect the
3715                          * inits to populate a bogus beacon.
3716                          */
3717                         if (BRCMS_PHY_11N_CAP(wlc->band))
3718                                 brcms_b_write_shm(wlc->hw,
3719                                                 M_BCN_TXTSF_OFFSET, 0);
3720                 }
3721         } else {
3722                 /* disable an active IBSS if we are not on the home channel */
3723         }
3724
3725         /* update the various promisc bits */
3726         brcms_c_mac_bcn_promisc(wlc);
3727         brcms_c_mac_promisc(wlc);
3728 }
3729
3730 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3731                                    u8 basic_rate)
3732 {
3733         u8 phy_rate, index;
3734         u8 basic_phy_rate, basic_index;
3735         u16 dir_table, basic_table;
3736         u16 basic_ptr;
3737
3738         /* Shared memory address for the table we are reading */
3739         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3740
3741         /* Shared memory address for the table we are writing */
3742         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3743
3744         /*
3745          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3746          * the index into the rate table.
3747          */
3748         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3749         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3750         index = phy_rate & 0xf;
3751         basic_index = basic_phy_rate & 0xf;
3752
3753         /* Find the SHM pointer to the ACK rate entry by looking in the
3754          * Direct-map Table
3755          */
3756         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3757
3758         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3759          * to the correct basic rate for the given incoming rate
3760          */
3761         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3762 }
3763
3764 static const struct brcms_c_rateset *
3765 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3766 {
3767         const struct brcms_c_rateset *rs_dflt;
3768
3769         if (BRCMS_PHY_11N_CAP(wlc->band)) {
3770                 if (wlc->band->bandtype == BRCM_BAND_5G)
3771                         rs_dflt = &ofdm_mimo_rates;
3772                 else
3773                         rs_dflt = &cck_ofdm_mimo_rates;
3774         } else if (wlc->band->gmode)
3775                 rs_dflt = &cck_ofdm_rates;
3776         else
3777                 rs_dflt = &cck_rates;
3778
3779         return rs_dflt;
3780 }
3781
3782 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3783 {
3784         const struct brcms_c_rateset *rs_dflt;
3785         struct brcms_c_rateset rs;
3786         u8 rate, basic_rate;
3787         uint i;
3788
3789         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3790
3791         brcms_c_rateset_copy(rs_dflt, &rs);
3792         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3793
3794         /* walk the phy rate table and update SHM basic rate lookup table */
3795         for (i = 0; i < rs.count; i++) {
3796                 rate = rs.rates[i] & BRCMS_RATE_MASK;
3797
3798                 /* for a given rate brcms_basic_rate returns the rate at
3799                  * which a response ACK/CTS should be sent.
3800                  */
3801                 basic_rate = brcms_basic_rate(wlc, rate);
3802                 if (basic_rate == 0)
3803                         /* This should only happen if we are using a
3804                          * restricted rateset.
3805                          */
3806                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3807
3808                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3809         }
3810 }
3811
3812 /* band-specific init */
3813 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3814 {
3815         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3816                  wlc->pub->unit, wlc->band->bandunit);
3817
3818         /* write ucode ACK/CTS rate table */
3819         brcms_c_set_ratetable(wlc);
3820
3821         /* update some band specific mac configuration */
3822         brcms_c_ucode_mac_upd(wlc);
3823
3824         /* init antenna selection */
3825         brcms_c_antsel_init(wlc->asi);
3826
3827 }
3828
3829 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3830 static int
3831 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3832                    bool writeToShm)
3833 {
3834         int idle_busy_ratio_x_16 = 0;
3835         uint offset =
3836             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3837             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3838         if (duty_cycle > 100 || duty_cycle < 0) {
3839                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3840                           wlc->pub->unit);
3841                 return -EINVAL;
3842         }
3843         if (duty_cycle)
3844                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3845         /* Only write to shared memory  when wl is up */
3846         if (writeToShm)
3847                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3848
3849         if (isOFDM)
3850                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3851         else
3852                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3853
3854         return 0;
3855 }
3856
3857 /*
3858  * Initialize the base precedence map for dequeueing
3859  * from txq based on WME settings
3860  */
3861 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3862 {
3863         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3864         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3865
3866         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3867         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3868         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3869         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3870 }
3871
3872 static void
3873 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3874                              struct brcms_txq_info *qi, bool on, int prio)
3875 {
3876         /* transmit flowcontrol is not yet implemented */
3877 }
3878
3879 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3880 {
3881         struct brcms_txq_info *qi;
3882
3883         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3884                 if (qi->stopped) {
3885                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3886                         qi->stopped = 0;
3887                 }
3888         }
3889 }
3890
3891 /* push sw hps and wake state through hardware */
3892 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3893 {
3894         u32 v1, v2;
3895         bool hps;
3896         bool awake_before;
3897
3898         hps = brcms_c_ps_allowed(wlc);
3899
3900         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3901
3902         v1 = R_REG(&wlc->regs->maccontrol);
3903         v2 = MCTL_WAKE;
3904         if (hps)
3905                 v2 |= MCTL_HPS;
3906
3907         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3908
3909         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3910
3911         if (!awake_before)
3912                 brcms_b_wait_for_wake(wlc->hw);
3913 }
3914
3915 /*
3916  * Write this BSS config's MAC address to core.
3917  * Updates RXE match engine.
3918  */
3919 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3920 {
3921         int err = 0;
3922         struct brcms_c_info *wlc = bsscfg->wlc;
3923
3924         /* enter the MAC addr into the RXE match registers */
3925         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3926
3927         brcms_c_ampdu_macaddr_upd(wlc);
3928
3929         return err;
3930 }
3931
3932 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3933  * Updates RXE match engine.
3934  */
3935 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3936 {
3937         /* we need to update BSSID in RXE match registers */
3938         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3939 }
3940
3941 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3942 {
3943         wlc_hw->shortslot = shortslot;
3944
3945         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3946                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3947                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3948                 brcms_c_enable_mac(wlc_hw->wlc);
3949         }
3950 }
3951
3952 /*
3953  * Suspend the the MAC and update the slot timing
3954  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3955  */
3956 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3957 {
3958         /* use the override if it is set */
3959         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3960                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3961
3962         if (wlc->shortslot == shortslot)
3963                 return;
3964
3965         wlc->shortslot = shortslot;
3966
3967         brcms_b_set_shortslot(wlc->hw, shortslot);
3968 }
3969
3970 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3971 {
3972         if (wlc->home_chanspec != chanspec) {
3973                 wlc->home_chanspec = chanspec;
3974
3975                 if (wlc->bsscfg->associated)
3976                         wlc->bsscfg->current_bss->chanspec = chanspec;
3977         }
3978 }
3979
3980 void
3981 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3982                       bool mute, struct txpwr_limits *txpwr)
3983 {
3984         uint bandunit;
3985
3986         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3987
3988         wlc_hw->chanspec = chanspec;
3989
3990         /* Switch bands if necessary */
3991         if (wlc_hw->_nbands > 1) {
3992                 bandunit = chspec_bandunit(chanspec);
3993                 if (wlc_hw->band->bandunit != bandunit) {
3994                         /* brcms_b_setband disables other bandunit,
3995                          *  use light band switch if not up yet
3996                          */
3997                         if (wlc_hw->up) {
3998                                 wlc_phy_chanspec_radio_set(wlc_hw->
3999                                                            bandstate[bandunit]->
4000                                                            pi, chanspec);
4001                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
4002                         } else {
4003                                 brcms_c_setxband(wlc_hw, bandunit);
4004                         }
4005                 }
4006         }
4007
4008         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
4009
4010         if (!wlc_hw->up) {
4011                 if (wlc_hw->clk)
4012                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
4013                                                   chanspec);
4014                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
4015         } else {
4016                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
4017                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
4018
4019                 /* Update muting of the channel */
4020                 brcms_b_mute(wlc_hw, mute, 0);
4021         }
4022 }
4023
4024 /* switch to and initialize new band */
4025 static void brcms_c_setband(struct brcms_c_info *wlc,
4026                                            uint bandunit)
4027 {
4028         wlc->band = wlc->bandstate[bandunit];
4029
4030         if (!wlc->pub->up)
4031                 return;
4032
4033         /* wait for at least one beacon before entering sleeping state */
4034         brcms_c_set_ps_ctrl(wlc);
4035
4036         /* band-specific initializations */
4037         brcms_c_bsinit(wlc);
4038 }
4039
4040 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
4041 {
4042         uint bandunit;
4043         bool switchband = false;
4044         u16 old_chanspec = wlc->chanspec;
4045
4046         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
4047                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
4048                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
4049                 return;
4050         }
4051
4052         /* Switch bands if necessary */
4053         if (wlc->pub->_nbands > 1) {
4054                 bandunit = chspec_bandunit(chanspec);
4055                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
4056                         switchband = true;
4057                         if (wlc->bandlocked) {
4058                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
4059                                           "band is locked!\n",
4060                                           wlc->pub->unit, __func__,
4061                                           CHSPEC_CHANNEL(chanspec));
4062                                 return;
4063                         }
4064                         /*
4065                          * should the setband call come after the
4066                          * brcms_b_chanspec() ? if the setband updates
4067                          * (brcms_c_bsinit) use low level calls to inspect and
4068                          * set state, the state inspected may be from the wrong
4069                          * band, or the following brcms_b_set_chanspec() may
4070                          * undo the work.
4071                          */
4072                         brcms_c_setband(wlc, bandunit);
4073                 }
4074         }
4075
4076         /* sync up phy/radio chanspec */
4077         brcms_c_set_phy_chanspec(wlc, chanspec);
4078
4079         /* init antenna selection */
4080         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
4081                 brcms_c_antsel_init(wlc->asi);
4082
4083                 /* Fix the hardware rateset based on bw.
4084                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4085                  */
4086                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4087                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4088         }
4089
4090         /* update some mac configuration since chanspec changed */
4091         brcms_c_ucode_mac_upd(wlc);
4092 }
4093
4094 /*
4095  * This function changes the phytxctl for beacon based on current
4096  * beacon ratespec AND txant setting as per this table:
4097  *  ratespec     CCK            ant = wlc->stf->txant
4098  *              OFDM            ant = 3
4099  */
4100 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4101                                        u32 bcn_rspec)
4102 {
4103         u16 phyctl;
4104         u16 phytxant = wlc->stf->phytxant;
4105         u16 mask = PHY_TXC_ANT_MASK;
4106
4107         /* for non-siso rates or default setting, use the available chains */
4108         if (BRCMS_PHY_11N_CAP(wlc->band))
4109                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4110
4111         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4112         phyctl = (phyctl & ~mask) | phytxant;
4113         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4114 }
4115
4116 /*
4117  * centralized protection config change function to simplify debugging, no
4118  * consistency checking this should be called only on changes to avoid overhead
4119  * in periodic function
4120  */
4121 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4122 {
4123         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4124
4125         switch (idx) {
4126         case BRCMS_PROT_G_SPEC:
4127                 wlc->protection->_g = (bool) val;
4128                 break;
4129         case BRCMS_PROT_G_OVR:
4130                 wlc->protection->g_override = (s8) val;
4131                 break;
4132         case BRCMS_PROT_G_USER:
4133                 wlc->protection->gmode_user = (u8) val;
4134                 break;
4135         case BRCMS_PROT_OVERLAP:
4136                 wlc->protection->overlap = (s8) val;
4137                 break;
4138         case BRCMS_PROT_N_USER:
4139                 wlc->protection->nmode_user = (s8) val;
4140                 break;
4141         case BRCMS_PROT_N_CFG:
4142                 wlc->protection->n_cfg = (s8) val;
4143                 break;
4144         case BRCMS_PROT_N_CFG_OVR:
4145                 wlc->protection->n_cfg_override = (s8) val;
4146                 break;
4147         case BRCMS_PROT_N_NONGF:
4148                 wlc->protection->nongf = (bool) val;
4149                 break;
4150         case BRCMS_PROT_N_NONGF_OVR:
4151                 wlc->protection->nongf_override = (s8) val;
4152                 break;
4153         case BRCMS_PROT_N_PAM_OVR:
4154                 wlc->protection->n_pam_override = (s8) val;
4155                 break;
4156         case BRCMS_PROT_N_OBSS:
4157                 wlc->protection->n_obss = (bool) val;
4158                 break;
4159
4160         default:
4161                 break;
4162         }
4163
4164 }
4165
4166 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4167 {
4168         if (wlc->pub->up) {
4169                 brcms_c_update_beacon(wlc);
4170                 brcms_c_update_probe_resp(wlc, true);
4171         }
4172 }
4173
4174 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4175 {
4176         wlc->stf->ldpc = val;
4177
4178         if (wlc->pub->up) {
4179                 brcms_c_update_beacon(wlc);
4180                 brcms_c_update_probe_resp(wlc, true);
4181                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4182         }
4183 }
4184
4185 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4186                        const struct ieee80211_tx_queue_params *params,
4187                        bool suspend)
4188 {
4189         int i;
4190         struct shm_acparams acp_shm;
4191         u16 *shm_entry;
4192
4193         /* Only apply params if the core is out of reset and has clocks */
4194         if (!wlc->clk) {
4195                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4196                           __func__);
4197                 return;
4198         }
4199
4200         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4201         /* fill in shm ac params struct */
4202         acp_shm.txop = params->txop;
4203         /* convert from units of 32us to us for ucode */
4204         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4205             EDCF_TXOP2USEC(acp_shm.txop);
4206         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4207
4208         if (aci == AC_VI && acp_shm.txop == 0
4209             && acp_shm.aifs < EDCF_AIFSN_MAX)
4210                 acp_shm.aifs++;
4211
4212         if (acp_shm.aifs < EDCF_AIFSN_MIN
4213             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4214                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4215                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4216         } else {
4217                 acp_shm.cwmin = params->cw_min;
4218                 acp_shm.cwmax = params->cw_max;
4219                 acp_shm.cwcur = acp_shm.cwmin;
4220                 acp_shm.bslots =
4221                     R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4222                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4223                 /* Indicate the new params to the ucode */
4224                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4225                                                   wme_ac2fifo[aci] *
4226                                                   M_EDCF_QLEN +
4227                                                   M_EDCF_STATUS_OFF));
4228                 acp_shm.status |= WME_STATUS_NEWAC;
4229
4230                 /* Fill in shm acparam table */
4231                 shm_entry = (u16 *) &acp_shm;
4232                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4233                         brcms_b_write_shm(wlc->hw,
4234                                           M_EDCF_QINFO +
4235                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4236                                           *shm_entry++);
4237         }
4238
4239         if (suspend) {
4240                 brcms_c_suspend_mac_and_wait(wlc);
4241                 brcms_c_enable_mac(wlc);
4242         }
4243 }
4244
4245 void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4246 {
4247         u16 aci;
4248         int i_ac;
4249         struct ieee80211_tx_queue_params txq_pars;
4250         static const struct edcf_acparam default_edcf_acparams[] = {
4251                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4252                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4253                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4254                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4255         }; /* ucode needs these parameters during its initialization */
4256         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4257
4258         for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4259                 /* find out which ac this set of params applies to */
4260                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4261
4262                 /* fill in shm ac params struct */
4263                 txq_pars.txop = edcf_acp->TXOP;
4264                 txq_pars.aifs = edcf_acp->ACI;
4265
4266                 /* CWmin = 2^(ECWmin) - 1 */
4267                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4268                 /* CWmax = 2^(ECWmax) - 1 */
4269                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4270                                             >> EDCF_ECWMAX_SHIFT);
4271                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4272         }
4273
4274         if (suspend) {
4275                 brcms_c_suspend_mac_and_wait(wlc);
4276                 brcms_c_enable_mac(wlc);
4277         }
4278 }
4279
4280 /* maintain LED behavior in down state */
4281 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4282 {
4283         /*
4284          * maintain LEDs while in down state, turn on sbclk if
4285          * not available yet. Turn on sbclk if necessary
4286          */
4287         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4288         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4289 }
4290
4291 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4292 {
4293         /* Don't start the timer if HWRADIO feature is disabled */
4294         if (wlc->radio_monitor)
4295                 return;
4296
4297         wlc->radio_monitor = true;
4298         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4299         brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4300 }
4301
4302 static void brcms_c_radio_disable(struct brcms_c_info *wlc)
4303 {
4304         if (!wlc->pub->up) {
4305                 brcms_c_down_led_upd(wlc);
4306                 return;
4307         }
4308
4309         brcms_c_radio_monitor_start(wlc);
4310         brcms_down(wlc->wl);
4311 }
4312
4313 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4314 {
4315         if (wlc->pub->up)
4316                 return;
4317
4318         if (brcms_deviceremoved(wlc))
4319                 return;
4320
4321         brcms_up(wlc->wl);
4322 }
4323
4324 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4325 {
4326         if (!wlc->radio_monitor)
4327                 return true;
4328
4329         wlc->radio_monitor = false;
4330         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4331         return brcms_del_timer(wlc->radio_timer);
4332 }
4333
4334 /* read hwdisable state and propagate to wlc flag */
4335 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4336 {
4337         if (wlc->pub->hw_off)
4338                 return;
4339
4340         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4341                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4342         else
4343                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4344 }
4345
4346 /*
4347  * centralized radio disable/enable function,
4348  * invoke radio enable/disable after updating hwradio status
4349  */
4350 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4351 {
4352         if (wlc->pub->radio_disabled)
4353                 brcms_c_radio_disable(wlc);
4354         else
4355                 brcms_c_radio_enable(wlc);
4356 }
4357
4358 /* update hwradio status and return it */
4359 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4360 {
4361         brcms_c_radio_hwdisable_upd(wlc);
4362
4363         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4364                         true : false;
4365 }
4366
4367 /* periodical query hw radio button while driver is "down" */
4368 static void brcms_c_radio_timer(void *arg)
4369 {
4370         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4371
4372         if (brcms_deviceremoved(wlc)) {
4373                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4374                         __func__);
4375                 brcms_down(wlc->wl);
4376                 return;
4377         }
4378
4379         /* cap mpc off count */
4380         if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT)
4381                 wlc->mpc_offcnt++;
4382
4383         brcms_c_radio_hwdisable_upd(wlc);
4384         brcms_c_radio_upd(wlc);
4385 }
4386
4387 /* common low-level watchdog code */
4388 static void brcms_b_watchdog(void *arg)
4389 {
4390         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4391         struct brcms_hardware *wlc_hw = wlc->hw;
4392
4393         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4394
4395         if (!wlc_hw->up)
4396                 return;
4397
4398         /* increment second count */
4399         wlc_hw->now++;
4400
4401         /* Check for FIFO error interrupts */
4402         brcms_b_fifoerrors(wlc_hw);
4403
4404         /* make sure RX dma has buffers */
4405         dma_rxfill(wlc->hw->di[RX_FIFO]);
4406
4407         wlc_phy_watchdog(wlc_hw->band->pi);
4408 }
4409
4410 static void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
4411 {
4412         bool mpc_radio, radio_state;
4413
4414         /*
4415          * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
4416          * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
4417          * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
4418          * the radio is going down.
4419          */
4420         if (!wlc->mpc) {
4421                 if (!wlc->pub->radio_disabled)
4422                         return;
4423                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
4424                 brcms_c_radio_upd(wlc);
4425                 if (!wlc->pub->radio_disabled)
4426                         brcms_c_radio_monitor_stop(wlc);
4427                 return;
4428         }
4429
4430         /*
4431          * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
4432          * wlc->pub->radio_disabled to go ON, always call radio_upd
4433          * synchronously to go OFF, postpone radio_upd to later when
4434          * context is safe(e.g. watchdog)
4435          */
4436         radio_state =
4437             (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF :
4438              ON);
4439         mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON;
4440
4441         if (radio_state == ON && mpc_radio == OFF)
4442                 wlc->mpc_delay_off = wlc->mpc_dlycnt;
4443         else if (radio_state == OFF && mpc_radio == ON) {
4444                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
4445                 brcms_c_radio_upd(wlc);
4446                 if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD)
4447                         wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT;
4448                 else
4449                         wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4450         }
4451         /*
4452          * Below logic is meant to capture the transition from mpc off
4453          * to mpc on for reasons other than wlc->mpc_delay_off keeping
4454          * the mpc off. In that case reset wlc->mpc_delay_off to
4455          * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
4456          */
4457         if ((wlc->prev_non_delay_mpc == false) &&
4458             (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off)
4459                 wlc->mpc_delay_off = wlc->mpc_dlycnt;
4460
4461         wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc);
4462 }
4463
4464 /* common watchdog code */
4465 static void brcms_c_watchdog(void *arg)
4466 {
4467         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4468
4469         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4470
4471         if (!wlc->pub->up)
4472                 return;
4473
4474         if (brcms_deviceremoved(wlc)) {
4475                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4476                           __func__);
4477                 brcms_down(wlc->wl);
4478                 return;
4479         }
4480
4481         /* increment second count */
4482         wlc->pub->now++;
4483
4484         /* delay radio disable */
4485         if (wlc->mpc_delay_off) {
4486                 if (--wlc->mpc_delay_off == 0) {
4487                         mboolset(wlc->pub->radio_disabled,
4488                                  WL_RADIO_MPC_DISABLE);
4489                         if (wlc->mpc && brcms_c_ismpc(wlc))
4490                                 wlc->mpc_offcnt = 0;
4491                 }
4492         }
4493
4494         /* mpc sync */
4495         brcms_c_radio_mpc_upd(wlc);
4496         /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4497         brcms_c_radio_hwdisable_upd(wlc);
4498         brcms_c_radio_upd(wlc);
4499         /* if radio is disable, driver may be down, quit here */
4500         if (wlc->pub->radio_disabled)
4501                 return;
4502
4503         brcms_b_watchdog(wlc);
4504
4505         /*
4506          * occasionally sample mac stat counters to
4507          * detect 16-bit counter wrap
4508          */
4509         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4510                 brcms_c_statsupd(wlc);
4511
4512         if (BRCMS_ISNPHY(wlc->band) &&
4513             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4514              BRCMS_TEMPSENSE_PERIOD)) {
4515                 wlc->tempsense_lasttime = wlc->pub->now;
4516                 brcms_c_tempsense_upd(wlc);
4517         }
4518 }
4519
4520 static void brcms_c_watchdog_by_timer(void *arg)
4521 {
4522         brcms_c_watchdog(arg);
4523 }
4524
4525 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4526 {
4527         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4528                 wlc, "watchdog");
4529         if (!wlc->wdtimer) {
4530                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4531                           "failed\n", unit);
4532                 goto fail;
4533         }
4534
4535         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4536                 wlc, "radio");
4537         if (!wlc->radio_timer) {
4538                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4539                           "failed\n", unit);
4540                 goto fail;
4541         }
4542
4543         return true;
4544
4545  fail:
4546         return false;
4547 }
4548
4549 /*
4550  * Initialize brcms_c_info default values ...
4551  * may get overrides later in this function
4552  */
4553 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4554 {
4555         int i;
4556
4557         /* Save our copy of the chanspec */
4558         wlc->chanspec = ch20mhz_chspec(1);
4559
4560         /* various 802.11g modes */
4561         wlc->shortslot = false;
4562         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4563
4564         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4565         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4566
4567         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4568                                BRCMS_PROTECTION_AUTO);
4569         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4570         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4571                                BRCMS_PROTECTION_AUTO);
4572         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4573         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4574
4575         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4576                                BRCMS_PROTECTION_CTL_OVERLAP);
4577
4578         /* 802.11g draft 4.0 NonERP elt advertisement */
4579         wlc->include_legacy_erp = true;
4580
4581         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4582         wlc->stf->txant = ANT_TX_DEF;
4583
4584         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4585
4586         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4587         for (i = 0; i < NFIFO; i++)
4588                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4589         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4590
4591         /* default rate fallback retry limits */
4592         wlc->SFBL = RETRY_SHORT_FB;
4593         wlc->LFBL = RETRY_LONG_FB;
4594
4595         /* default mac retry limits */
4596         wlc->SRL = RETRY_SHORT_DEF;
4597         wlc->LRL = RETRY_LONG_DEF;
4598
4599         /* WME QoS mode is Auto by default */
4600         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4601         wlc->pub->bcmerror = 0;
4602
4603         /* initialize mpc delay */
4604         wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4605 }
4606
4607 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4608 {
4609         uint err = 0;
4610         uint unit;
4611         unit = wlc->pub->unit;
4612
4613         wlc->asi = brcms_c_antsel_attach(wlc);
4614         if (wlc->asi == NULL) {
4615                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4616                           "failed\n", unit);
4617                 err = 44;
4618                 goto fail;
4619         }
4620
4621         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4622         if (wlc->ampdu == NULL) {
4623                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4624                           "failed\n", unit);
4625                 err = 50;
4626                 goto fail;
4627         }
4628
4629         if ((brcms_c_stf_attach(wlc) != 0)) {
4630                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4631                           "failed\n", unit);
4632                 err = 68;
4633                 goto fail;
4634         }
4635  fail:
4636         return err;
4637 }
4638
4639 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4640 {
4641         return wlc->pub;
4642 }
4643
4644 /* low level attach
4645  *    run backplane attach, init nvram
4646  *    run phy attach
4647  *    initialize software state for each core and band
4648  *    put the whole chip in reset(driver down state), no clock
4649  */
4650 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4651                           uint unit, bool piomode, void __iomem *regsva,
4652                           struct pci_dev *btparam)
4653 {
4654         struct brcms_hardware *wlc_hw;
4655         struct d11regs __iomem *regs;
4656         char *macaddr = NULL;
4657         uint err = 0;
4658         uint j;
4659         bool wme = false;
4660         struct shared_phy_params sha_params;
4661         struct wiphy *wiphy = wlc->wiphy;
4662
4663         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4664                 device);
4665
4666         wme = true;
4667
4668         wlc_hw = wlc->hw;
4669         wlc_hw->wlc = wlc;
4670         wlc_hw->unit = unit;
4671         wlc_hw->band = wlc_hw->bandstate[0];
4672         wlc_hw->_piomode = piomode;
4673
4674         /* populate struct brcms_hardware with default values  */
4675         brcms_b_info_init(wlc_hw);
4676
4677         /*
4678          * Do the hardware portion of the attach. Also initialize software
4679          * state that depends on the particular hardware we are running.
4680          */
4681         wlc_hw->sih = ai_attach(regsva, btparam);
4682         if (wlc_hw->sih == NULL) {
4683                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4684                           unit);
4685                 err = 11;
4686                 goto fail;
4687         }
4688
4689         /* verify again the device is supported */
4690         if (!brcms_c_chipmatch(vendor, device)) {
4691                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4692                         "vendor/device (0x%x/0x%x)\n",
4693                          unit, vendor, device);
4694                 err = 12;
4695                 goto fail;
4696         }
4697
4698         wlc_hw->vendorid = vendor;
4699         wlc_hw->deviceid = device;
4700
4701         /* set bar0 window to point at D11 core */
4702         wlc_hw->regs = (struct d11regs __iomem *)
4703                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4704         wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4705
4706         regs = wlc_hw->regs;
4707
4708         wlc->regs = wlc_hw->regs;
4709
4710         /* validate chip, chiprev and corerev */
4711         if (!brcms_c_isgoodchip(wlc_hw)) {
4712                 err = 13;
4713                 goto fail;
4714         }
4715
4716         /* initialize power control registers */
4717         ai_clkctl_init(wlc_hw->sih);
4718
4719         /* request fastclock and force fastclock for the rest of attach
4720          * bring the d11 core out of reset.
4721          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4722          *   is still false; But it will be called again inside wlc_corereset,
4723          *   after d11 is out of reset.
4724          */
4725         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4726         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4727
4728         if (!brcms_b_validate_chip_access(wlc_hw)) {
4729                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4730                         "failed\n", unit);
4731                 err = 14;
4732                 goto fail;
4733         }
4734
4735         /* get the board rev, used just below */
4736         j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4737         /* promote srom boardrev of 0xFF to 1 */
4738         if (j == BOARDREV_PROMOTABLE)
4739                 j = BOARDREV_PROMOTED;
4740         wlc_hw->boardrev = (u16) j;
4741         if (!brcms_c_validboardtype(wlc_hw)) {
4742                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4743                         "board type (0x%x)" " or revision level (0x%x)\n",
4744                          unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4745                 err = 15;
4746                 goto fail;
4747         }
4748         wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4749         wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4750                                              BRCMS_SROM_BOARDFLAGS);
4751         wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4752                                               BRCMS_SROM_BOARDFLAGS2);
4753
4754         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4755                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4756
4757         /* check device id(srom, nvram etc.) to set bands */
4758         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4759             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4760                 /* Dualband boards */
4761                 wlc_hw->_nbands = 2;
4762         else
4763                 wlc_hw->_nbands = 1;
4764
4765         if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4766                 wlc_hw->_nbands = 1;
4767
4768         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4769          * unconditionally does the init of these values
4770          */
4771         wlc->vendorid = wlc_hw->vendorid;
4772         wlc->deviceid = wlc_hw->deviceid;
4773         wlc->pub->sih = wlc_hw->sih;
4774         wlc->pub->corerev = wlc_hw->corerev;
4775         wlc->pub->sromrev = wlc_hw->sromrev;
4776         wlc->pub->boardrev = wlc_hw->boardrev;
4777         wlc->pub->boardflags = wlc_hw->boardflags;
4778         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4779         wlc->pub->_nbands = wlc_hw->_nbands;
4780
4781         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4782
4783         if (wlc_hw->physhim == NULL) {
4784                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4785                         "failed\n", unit);
4786                 err = 25;
4787                 goto fail;
4788         }
4789
4790         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4791         sha_params.sih = wlc_hw->sih;
4792         sha_params.physhim = wlc_hw->physhim;
4793         sha_params.unit = unit;
4794         sha_params.corerev = wlc_hw->corerev;
4795         sha_params.vid = wlc_hw->vendorid;
4796         sha_params.did = wlc_hw->deviceid;
4797         sha_params.chip = wlc_hw->sih->chip;
4798         sha_params.chiprev = wlc_hw->sih->chiprev;
4799         sha_params.chippkg = wlc_hw->sih->chippkg;
4800         sha_params.sromrev = wlc_hw->sromrev;
4801         sha_params.boardtype = wlc_hw->sih->boardtype;
4802         sha_params.boardrev = wlc_hw->boardrev;
4803         sha_params.boardvendor = wlc_hw->sih->boardvendor;
4804         sha_params.boardflags = wlc_hw->boardflags;
4805         sha_params.boardflags2 = wlc_hw->boardflags2;
4806         sha_params.buscorerev = wlc_hw->sih->buscorerev;
4807
4808         /* alloc and save pointer to shared phy state area */
4809         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4810         if (!wlc_hw->phy_sh) {
4811                 err = 16;
4812                 goto fail;
4813         }
4814
4815         /* initialize software state for each core and band */
4816         for (j = 0; j < wlc_hw->_nbands; j++) {
4817                 /*
4818                  * band0 is always 2.4Ghz
4819                  * band1, if present, is 5Ghz
4820                  */
4821
4822                 brcms_c_setxband(wlc_hw, j);
4823
4824                 wlc_hw->band->bandunit = j;
4825                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4826                 wlc->band->bandunit = j;
4827                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4828                 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4829
4830                 wlc_hw->machwcap = R_REG(&regs->machwcap);
4831                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4832
4833                 /* init tx fifo size */
4834                 wlc_hw->xmtfifo_sz =
4835                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4836
4837                 /* Get a phy for this band */
4838                 wlc_hw->band->pi =
4839                         wlc_phy_attach(wlc_hw->phy_sh, regs,
4840                                        wlc_hw->band->bandtype,
4841                                        wlc->wiphy);
4842                 if (wlc_hw->band->pi == NULL) {
4843                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4844                                   "attach failed\n", unit);
4845                         err = 17;
4846                         goto fail;
4847                 }
4848
4849                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4850
4851                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4852                                        &wlc_hw->band->phyrev,
4853                                        &wlc_hw->band->radioid,
4854                                        &wlc_hw->band->radiorev);
4855                 wlc_hw->band->abgphy_encore =
4856                     wlc_phy_get_encore(wlc_hw->band->pi);
4857                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4858                 wlc_hw->band->core_flags =
4859                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4860
4861                 /* verify good phy_type & supported phy revision */
4862                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4863                         if (NCONF_HAS(wlc_hw->band->phyrev))
4864                                 goto good_phy;
4865                         else
4866                                 goto bad_phy;
4867                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4868                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4869                                 goto good_phy;
4870                         else
4871                                 goto bad_phy;
4872                 } else {
4873  bad_phy:
4874                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4875                                   "phy type/rev (%d/%d)\n", unit,
4876                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4877                         err = 18;
4878                         goto fail;
4879                 }
4880
4881  good_phy:
4882                 /*
4883                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4884                  * be done in the high level attach. However we can not make
4885                  * that change until all low level access is changed to
4886                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4887                  * keeping wlc_hw->band->pi as well for incremental update of
4888                  * low level fns, and cut over low only init when all fns
4889                  * updated.
4890                  */
4891                 wlc->band->pi = wlc_hw->band->pi;
4892                 wlc->band->phytype = wlc_hw->band->phytype;
4893                 wlc->band->phyrev = wlc_hw->band->phyrev;
4894                 wlc->band->radioid = wlc_hw->band->radioid;
4895                 wlc->band->radiorev = wlc_hw->band->radiorev;
4896
4897                 /* default contention windows size limits */
4898                 wlc_hw->band->CWmin = APHY_CWMIN;
4899                 wlc_hw->band->CWmax = PHY_CWMAX;
4900
4901                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4902                         err = 19;
4903                         goto fail;
4904                 }
4905         }
4906
4907         /* disable core to match driver "down" state */
4908         brcms_c_coredisable(wlc_hw);
4909
4910         /* Match driver "down" state */
4911         ai_pci_down(wlc_hw->sih);
4912
4913         /* register sb interrupt callback functions */
4914         ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4915                                   (void *)brcms_c_wlintrsrestore, NULL, wlc);
4916
4917         /* turn off pll and xtal to match driver "down" state */
4918         brcms_b_xtal(wlc_hw, OFF);
4919
4920         /* *******************************************************************
4921          * The hardware is in the DOWN state at this point. D11 core
4922          * or cores are in reset with clocks off, and the board PLLs
4923          * are off if possible.
4924          *
4925          * Beyond this point, wlc->sbclk == false and chip registers
4926          * should not be touched.
4927          *********************************************************************
4928          */
4929
4930         /* init etheraddr state variables */
4931         macaddr = brcms_c_get_macaddr(wlc_hw);
4932         if (macaddr == NULL) {
4933                 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4934                           unit);
4935                 err = 21;
4936                 goto fail;
4937         }
4938         if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4939             is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4940             is_zero_ether_addr(wlc_hw->etheraddr)) {
4941                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4942                           unit, macaddr);
4943                 err = 22;
4944                 goto fail;
4945         }
4946
4947         BCMMSG(wlc->wiphy,
4948                  "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4949                  wlc_hw->deviceid, wlc_hw->_nbands,
4950                  wlc_hw->sih->boardtype, macaddr);
4951
4952         return err;
4953
4954  fail:
4955         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4956                   err);
4957         return err;
4958 }
4959
4960 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4961 {
4962         uint unit;
4963         unit = wlc->pub->unit;
4964
4965         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4966                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4967                 wlc->band->antgain = 8;
4968         } else if (wlc->band->antgain == -1) {
4969                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4970                           " srom, using 2dB\n", unit, __func__);
4971                 wlc->band->antgain = 8;
4972         } else {
4973                 s8 gain, fract;
4974                 /* Older sroms specified gain in whole dbm only.  In order
4975                  * be able to specify qdbm granularity and remain backward
4976                  * compatible the whole dbms are now encoded in only
4977                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4978                  * 6 bit signed number ranges from -32 - 31.
4979                  *
4980                  * Examples:
4981                  * 0x1 = 1 db,
4982                  * 0xc1 = 1.75 db (1 + 3 quarters),
4983                  * 0x3f = -1 (-1 + 0 quarters),
4984                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4985                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4986                  */
4987                 gain = wlc->band->antgain & 0x3f;
4988                 gain <<= 2;     /* Sign extend */
4989                 gain >>= 2;
4990                 fract = (wlc->band->antgain & 0xc0) >> 6;
4991                 wlc->band->antgain = 4 * gain + fract;
4992         }
4993 }
4994
4995 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4996 {
4997         int aa;
4998         uint unit;
4999         int bandtype;
5000         struct si_pub *sih = wlc->hw->sih;
5001
5002         unit = wlc->pub->unit;
5003         bandtype = wlc->band->bandtype;
5004
5005         /* get antennas available */
5006         if (bandtype == BRCM_BAND_5G)
5007                 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
5008         else
5009                 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
5010
5011         if ((aa < 1) || (aa > 15)) {
5012                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
5013                           " srom (0x%x), using 3\n", unit, __func__, aa);
5014                 aa = 3;
5015         }
5016
5017         /* reset the defaults if we have a single antenna */
5018         if (aa == 1) {
5019                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
5020                 wlc->stf->txant = ANT_TX_FORCE_0;
5021         } else if (aa == 2) {
5022                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
5023                 wlc->stf->txant = ANT_TX_FORCE_1;
5024         } else {
5025         }
5026
5027         /* Compute Antenna Gain */
5028         if (bandtype == BRCM_BAND_5G)
5029                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
5030         else
5031                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
5032
5033         brcms_c_attach_antgain_init(wlc);
5034
5035         return true;
5036 }
5037
5038 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
5039 {
5040         u16 chanspec;
5041         struct brcms_band *band;
5042         struct brcms_bss_info *bi = wlc->default_bss;
5043
5044         /* init default and target BSS with some sane initial values */
5045         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
5046         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
5047
5048         /* fill the default channel as the first valid channel
5049          * starting from the 2G channels
5050          */
5051         chanspec = ch20mhz_chspec(1);
5052         wlc->home_chanspec = bi->chanspec = chanspec;
5053
5054         /* find the band of our default channel */
5055         band = wlc->band;
5056         if (wlc->pub->_nbands > 1 &&
5057             band->bandunit != chspec_bandunit(chanspec))
5058                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5059
5060         /* init bss rates to the band specific default rate set */
5061         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
5062                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
5063                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
5064                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
5065
5066         if (wlc->pub->_n_enab & SUPPORT_11N)
5067                 bi->flags |= BRCMS_BSS_HT;
5068 }
5069
5070 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
5071 {
5072         struct brcms_txq_info *qi, *p;
5073
5074         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
5075         if (qi != NULL) {
5076                 /*
5077                  * Have enough room for control packets along with HI watermark
5078                  * Also, add room to txq for total psq packets if all the SCBs
5079                  * leave PS mode. The watermark for flowcontrol to OS packets
5080                  * will remain the same
5081                  */
5082                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
5083                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
5084
5085                 /* add this queue to the the global list */
5086                 p = wlc->tx_queues;
5087                 if (p == NULL) {
5088                         wlc->tx_queues = qi;
5089                 } else {
5090                         while (p->next != NULL)
5091                                 p = p->next;
5092                         p->next = qi;
5093                 }
5094         }
5095         return qi;
5096 }
5097
5098 static void brcms_c_txq_free(struct brcms_c_info *wlc,
5099                              struct brcms_txq_info *qi)
5100 {
5101         struct brcms_txq_info *p;
5102
5103         if (qi == NULL)
5104                 return;
5105
5106         /* remove the queue from the linked list */
5107         p = wlc->tx_queues;
5108         if (p == qi)
5109                 wlc->tx_queues = p->next;
5110         else {
5111                 while (p != NULL && p->next != qi)
5112                         p = p->next;
5113                 if (p != NULL)
5114                         p->next = p->next->next;
5115         }
5116
5117         kfree(qi);
5118 }
5119
5120 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5121 {
5122         uint i;
5123         struct brcms_band *band;
5124
5125         for (i = 0; i < wlc->pub->_nbands; i++) {
5126                 band = wlc->bandstate[i];
5127                 if (band->bandtype == BRCM_BAND_5G) {
5128                         if ((bwcap == BRCMS_N_BW_40ALL)
5129                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5130                                 band->mimo_cap_40 = true;
5131                         else
5132                                 band->mimo_cap_40 = false;
5133                 } else {
5134                         if (bwcap == BRCMS_N_BW_40ALL)
5135                                 band->mimo_cap_40 = true;
5136                         else
5137                                 band->mimo_cap_40 = false;
5138                 }
5139         }
5140 }
5141
5142 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5143 {
5144         /* free timer state */
5145         if (wlc->wdtimer) {
5146                 brcms_free_timer(wlc->wdtimer);
5147                 wlc->wdtimer = NULL;
5148         }
5149         if (wlc->radio_timer) {
5150                 brcms_free_timer(wlc->radio_timer);
5151                 wlc->radio_timer = NULL;
5152         }
5153 }
5154
5155 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5156 {
5157         if (wlc->asi) {
5158                 brcms_c_antsel_detach(wlc->asi);
5159                 wlc->asi = NULL;
5160         }
5161
5162         if (wlc->ampdu) {
5163                 brcms_c_ampdu_detach(wlc->ampdu);
5164                 wlc->ampdu = NULL;
5165         }
5166
5167         brcms_c_stf_detach(wlc);
5168 }
5169
5170 /*
5171  * low level detach
5172  */
5173 static int brcms_b_detach(struct brcms_c_info *wlc)
5174 {
5175         uint i;
5176         struct brcms_hw_band *band;
5177         struct brcms_hardware *wlc_hw = wlc->hw;
5178         int callbacks;
5179
5180         callbacks = 0;
5181
5182         if (wlc_hw->sih) {
5183                 /*
5184                  * detach interrupt sync mechanism since interrupt is disabled
5185                  * and per-port interrupt object may has been freed. this must
5186                  * be done before sb core switch
5187                  */
5188                 ai_deregister_intr_callback(wlc_hw->sih);
5189                 ai_pci_sleep(wlc_hw->sih);
5190         }
5191
5192         brcms_b_detach_dmapio(wlc_hw);
5193
5194         band = wlc_hw->band;
5195         for (i = 0; i < wlc_hw->_nbands; i++) {
5196                 if (band->pi) {
5197                         /* Detach this band's phy */
5198                         wlc_phy_detach(band->pi);
5199                         band->pi = NULL;
5200                 }
5201                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5202         }
5203
5204         /* Free shared phy state */
5205         kfree(wlc_hw->phy_sh);
5206
5207         wlc_phy_shim_detach(wlc_hw->physhim);
5208
5209         if (wlc_hw->sih) {
5210                 ai_detach(wlc_hw->sih);
5211                 wlc_hw->sih = NULL;
5212         }
5213
5214         return callbacks;
5215
5216 }
5217
5218 /*
5219  * Return a count of the number of driver callbacks still pending.
5220  *
5221  * General policy is that brcms_c_detach can only dealloc/free software states.
5222  * It can NOT touch hardware registers since the d11core may be in reset and
5223  * clock may not be available.
5224  * One exception is sb register access, which is possible if crystal is turned
5225  * on after "down" state, driver should avoid software timer with the exception
5226  * of radio_monitor.
5227  */
5228 uint brcms_c_detach(struct brcms_c_info *wlc)
5229 {
5230         uint callbacks = 0;
5231
5232         if (wlc == NULL)
5233                 return 0;
5234
5235         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5236
5237         callbacks += brcms_b_detach(wlc);
5238
5239         /* delete software timers */
5240         if (!brcms_c_radio_monitor_stop(wlc))
5241                 callbacks++;
5242
5243         brcms_c_channel_mgr_detach(wlc->cmi);
5244
5245         brcms_c_timers_deinit(wlc);
5246
5247         brcms_c_detach_module(wlc);
5248
5249
5250         while (wlc->tx_queues != NULL)
5251                 brcms_c_txq_free(wlc, wlc->tx_queues);
5252
5253         brcms_c_detach_mfree(wlc);
5254         return callbacks;
5255 }
5256
5257 /* update state that depends on the current value of "ap" */
5258 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5259 {
5260         /* STA-BSS; short capable */
5261         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5262
5263         /* fixup mpc */
5264         wlc->mpc = true;
5265 }
5266
5267 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5268 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5269 {
5270         if (wlc_hw->wlc->pub->hw_up)
5271                 return;
5272
5273         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5274
5275         /*
5276          * Enable pll and xtal, initialize the power control registers,
5277          * and force fastclock for the remainder of brcms_c_up().
5278          */
5279         brcms_b_xtal(wlc_hw, ON);
5280         ai_clkctl_init(wlc_hw->sih);
5281         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5282
5283         ai_pci_fixcfg(wlc_hw->sih);
5284
5285         /*
5286          * AI chip doesn't restore bar0win2 on
5287          * hibernation/resume, need sw fixup
5288          */
5289         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5290             (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5291                 wlc_hw->regs = (struct d11regs __iomem *)
5292                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5293
5294         /*
5295          * Inform phy that a POR reset has occurred so
5296          * it does a complete phy init
5297          */
5298         wlc_phy_por_inform(wlc_hw->band->pi);
5299
5300         wlc_hw->ucode_loaded = false;
5301         wlc_hw->wlc->pub->hw_up = true;
5302
5303         if ((wlc_hw->boardflags & BFL_FEM)
5304             && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5305                 if (!
5306                     (wlc_hw->boardrev >= 0x1250
5307                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5308                         ai_epa_4313war(wlc_hw->sih);
5309         }
5310 }
5311
5312 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5313 {
5314         uint coremask;
5315
5316         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5317
5318         /*
5319          * Enable pll and xtal, initialize the power control registers,
5320          * and force fastclock for the remainder of brcms_c_up().
5321          */
5322         brcms_b_xtal(wlc_hw, ON);
5323         ai_clkctl_init(wlc_hw->sih);
5324         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5325
5326         /*
5327          * Configure pci/pcmcia here instead of in brcms_c_attach()
5328          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5329          */
5330         coremask = (1 << wlc_hw->wlc->core->coreidx);
5331
5332         ai_pci_setup(wlc_hw->sih, coremask);
5333
5334         /*
5335          * Need to read the hwradio status here to cover the case where the
5336          * system is loaded with the hw radio disabled. We do not want to
5337          * bring the driver up in this case.
5338          */
5339         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5340                 /* put SB PCI in down state again */
5341                 ai_pci_down(wlc_hw->sih);
5342                 brcms_b_xtal(wlc_hw, OFF);
5343                 return -ENOMEDIUM;
5344         }
5345
5346         ai_pci_up(wlc_hw->sih);
5347
5348         /* reset the d11 core */
5349         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5350
5351         return 0;
5352 }
5353
5354 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5355 {
5356         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5357
5358         wlc_hw->up = true;
5359         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5360
5361         /* FULLY enable dynamic power control and d11 core interrupt */
5362         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5363         brcms_intrson(wlc_hw->wlc->wl);
5364         return 0;
5365 }
5366
5367 /*
5368  * Write WME tunable parameters for retransmit/max rate
5369  * from wlc struct to ucode
5370  */
5371 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5372 {
5373         int ac;
5374
5375         /* Need clock to do this */
5376         if (!wlc->clk)
5377                 return;
5378
5379         for (ac = 0; ac < AC_COUNT; ac++)
5380                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5381                                   wlc->wme_retries[ac]);
5382 }
5383
5384 /* make interface operational */
5385 int brcms_c_up(struct brcms_c_info *wlc)
5386 {
5387         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5388
5389         /* HW is turned off so don't try to access it */
5390         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5391                 return -ENOMEDIUM;
5392
5393         if (!wlc->pub->hw_up) {
5394                 brcms_b_hw_up(wlc->hw);
5395                 wlc->pub->hw_up = true;
5396         }
5397
5398         if ((wlc->pub->boardflags & BFL_FEM)
5399             && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5400                 if (wlc->pub->boardrev >= 0x1250
5401                     && (wlc->pub->boardflags & BFL_FEM_BT))
5402                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5403                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5404                 else
5405                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5406                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5407         }
5408
5409         /*
5410          * Need to read the hwradio status here to cover the case where the
5411          * system is loaded with the hw radio disabled. We do not want to bring
5412          * the driver up in this case. If radio is disabled, abort up, lower
5413          * power, start radio timer and return 0(for NDIS) don't call
5414          * radio_update to avoid looping brcms_c_up.
5415          *
5416          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5417          */
5418         if (!wlc->pub->radio_disabled) {
5419                 int status = brcms_b_up_prep(wlc->hw);
5420                 if (status == -ENOMEDIUM) {
5421                         if (!mboolisset
5422                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5423                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5424                                 mboolset(wlc->pub->radio_disabled,
5425                                          WL_RADIO_HW_DISABLE);
5426
5427                                 if (bsscfg->enable && bsscfg->BSS)
5428                                         wiphy_err(wlc->wiphy, "wl%d: up"
5429                                                   ": rfdisable -> "
5430                                                   "bsscfg_disable()\n",
5431                                                    wlc->pub->unit);
5432                         }
5433                 }
5434         }
5435
5436         if (wlc->pub->radio_disabled) {
5437                 brcms_c_radio_monitor_start(wlc);
5438                 return 0;
5439         }
5440
5441         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5442         wlc->clk = true;
5443
5444         brcms_c_radio_monitor_stop(wlc);
5445
5446         /* Set EDCF hostflags */
5447         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5448
5449         brcms_init(wlc->wl);
5450         wlc->pub->up = true;
5451
5452         if (wlc->bandinit_pending) {
5453                 brcms_c_suspend_mac_and_wait(wlc);
5454                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5455                 wlc->bandinit_pending = false;
5456                 brcms_c_enable_mac(wlc);
5457         }
5458
5459         brcms_b_up_finish(wlc->hw);
5460
5461         /* Program the TX wme params with the current settings */
5462         brcms_c_wme_retries_write(wlc);
5463
5464         /* start one second watchdog timer */
5465         brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5466         wlc->WDarmed = true;
5467
5468         /* ensure antenna config is up to date */
5469         brcms_c_stf_phy_txant_upd(wlc);
5470         /* ensure LDPC config is in sync */
5471         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5472
5473         return 0;
5474 }
5475
5476 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5477 {
5478         uint callbacks = 0;
5479
5480         return callbacks;
5481 }
5482
5483 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5484 {
5485         bool dev_gone;
5486         uint callbacks = 0;
5487
5488         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5489
5490         if (!wlc_hw->up)
5491                 return callbacks;
5492
5493         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5494
5495         /* disable interrupts */
5496         if (dev_gone)
5497                 wlc_hw->wlc->macintmask = 0;
5498         else {
5499                 /* now disable interrupts */
5500                 brcms_intrsoff(wlc_hw->wlc->wl);
5501
5502                 /* ensure we're running on the pll clock again */
5503                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5504         }
5505         /* down phy at the last of this stage */
5506         callbacks += wlc_phy_down(wlc_hw->band->pi);
5507
5508         return callbacks;
5509 }
5510
5511 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5512 {
5513         uint callbacks = 0;
5514         bool dev_gone;
5515
5516         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5517
5518         if (!wlc_hw->up)
5519                 return callbacks;
5520
5521         wlc_hw->up = false;
5522         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5523
5524         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5525
5526         if (dev_gone) {
5527                 wlc_hw->sbclk = false;
5528                 wlc_hw->clk = false;
5529                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5530
5531                 /* reclaim any posted packets */
5532                 brcms_c_flushqueues(wlc_hw->wlc);
5533         } else {
5534
5535                 /* Reset and disable the core */
5536                 if (ai_iscoreup(wlc_hw->sih)) {
5537                         if (R_REG(&wlc_hw->regs->maccontrol) &
5538                             MCTL_EN_MAC)
5539                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5540                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5541                         brcms_c_coredisable(wlc_hw);
5542                 }
5543
5544                 /* turn off primary xtal and pll */
5545                 if (!wlc_hw->noreset) {
5546                         ai_pci_down(wlc_hw->sih);
5547                         brcms_b_xtal(wlc_hw, OFF);
5548                 }
5549         }
5550
5551         return callbacks;
5552 }
5553
5554 /*
5555  * Mark the interface nonoperational, stop the software mechanisms,
5556  * disable the hardware, free any transient buffer state.
5557  * Return a count of the number of driver callbacks still pending.
5558  */
5559 uint brcms_c_down(struct brcms_c_info *wlc)
5560 {
5561
5562         uint callbacks = 0;
5563         int i;
5564         bool dev_gone = false;
5565         struct brcms_txq_info *qi;
5566
5567         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5568
5569         /* check if we are already in the going down path */
5570         if (wlc->going_down) {
5571                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5572                           "\n", wlc->pub->unit, __func__);
5573                 return 0;
5574         }
5575         if (!wlc->pub->up)
5576                 return callbacks;
5577
5578         /* in between, mpc could try to bring down again.. */
5579         wlc->going_down = true;
5580
5581         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5582
5583         dev_gone = brcms_deviceremoved(wlc);
5584
5585         /* Call any registered down handlers */
5586         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5587                 if (wlc->modulecb[i].down_fn)
5588                         callbacks +=
5589                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5590         }
5591
5592         /* cancel the watchdog timer */
5593         if (wlc->WDarmed) {
5594                 if (!brcms_del_timer(wlc->wdtimer))
5595                         callbacks++;
5596                 wlc->WDarmed = false;
5597         }
5598         /* cancel all other timers */
5599         callbacks += brcms_c_down_del_timer(wlc);
5600
5601         wlc->pub->up = false;
5602
5603         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5604
5605         /* clear txq flow control */
5606         brcms_c_txflowcontrol_reset(wlc);
5607
5608         /* flush tx queues */
5609         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5610                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5611
5612         callbacks += brcms_b_down_finish(wlc->hw);
5613
5614         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5615         wlc->clk = false;
5616
5617         wlc->going_down = false;
5618         return callbacks;
5619 }
5620
5621 /* Set the current gmode configuration */
5622 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5623 {
5624         int ret = 0;
5625         uint i;
5626         struct brcms_c_rateset rs;
5627         /* Default to 54g Auto */
5628         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5629         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5630         bool shortslot_restrict = false; /* Restrict association to stations
5631                                           * that support shortslot
5632                                           */
5633         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5634         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5635         int preamble = BRCMS_PLCP_LONG;
5636         bool preamble_restrict = false; /* Restrict association to stations
5637                                          * that support short preambles
5638                                          */
5639         struct brcms_band *band;
5640
5641         /* if N-support is enabled, allow Gmode set as long as requested
5642          * Gmode is not GMODE_LEGACY_B
5643          */
5644         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5645                 return -ENOTSUPP;
5646
5647         /* verify that we are dealing with 2G band and grab the band pointer */
5648         if (wlc->band->bandtype == BRCM_BAND_2G)
5649                 band = wlc->band;
5650         else if ((wlc->pub->_nbands > 1) &&
5651                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5652                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5653         else
5654                 return -EINVAL;
5655
5656         /* Legacy or bust when no OFDM is supported by regulatory */
5657         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5658              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5659                 return -EINVAL;
5660
5661         /* update configuration value */
5662         if (config == true)
5663                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5664
5665         /* Clear rateset override */
5666         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5667
5668         switch (gmode) {
5669         case GMODE_LEGACY_B:
5670                 shortslot = BRCMS_SHORTSLOT_OFF;
5671                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5672
5673                 break;
5674
5675         case GMODE_LRS:
5676                 break;
5677
5678         case GMODE_AUTO:
5679                 /* Accept defaults */
5680                 break;
5681
5682         case GMODE_ONLY:
5683                 ofdm_basic = true;
5684                 preamble = BRCMS_PLCP_SHORT;
5685                 preamble_restrict = true;
5686                 break;
5687
5688         case GMODE_PERFORMANCE:
5689                 shortslot = BRCMS_SHORTSLOT_ON;
5690                 shortslot_restrict = true;
5691                 ofdm_basic = true;
5692                 preamble = BRCMS_PLCP_SHORT;
5693                 preamble_restrict = true;
5694                 break;
5695
5696         default:
5697                 /* Error */
5698                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5699                           wlc->pub->unit, __func__, gmode);
5700                 return -ENOTSUPP;
5701         }
5702
5703         band->gmode = gmode;
5704
5705         wlc->shortslot_override = shortslot;
5706
5707         /* Use the default 11g rateset */
5708         if (!rs.count)
5709                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5710
5711         if (ofdm_basic) {
5712                 for (i = 0; i < rs.count; i++) {
5713                         if (rs.rates[i] == BRCM_RATE_6M
5714                             || rs.rates[i] == BRCM_RATE_12M
5715                             || rs.rates[i] == BRCM_RATE_24M)
5716                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5717                 }
5718         }
5719
5720         /* Set default bss rateset */
5721         wlc->default_bss->rateset.count = rs.count;
5722         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5723                sizeof(wlc->default_bss->rateset.rates));
5724
5725         return ret;
5726 }
5727
5728 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5729 {
5730         uint i;
5731         s32 nmode = AUTO;
5732
5733         if (wlc->stf->txstreams == WL_11N_3x3)
5734                 nmode = WL_11N_3x3;
5735         else
5736                 nmode = WL_11N_2x2;
5737
5738         /* force GMODE_AUTO if NMODE is ON */
5739         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5740         if (nmode == WL_11N_3x3)
5741                 wlc->pub->_n_enab = SUPPORT_HT;
5742         else
5743                 wlc->pub->_n_enab = SUPPORT_11N;
5744         wlc->default_bss->flags |= BRCMS_BSS_HT;
5745         /* add the mcs rates to the default and hw ratesets */
5746         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5747                               wlc->stf->txstreams);
5748         for (i = 0; i < wlc->pub->_nbands; i++)
5749                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5750                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5751
5752         return 0;
5753 }
5754
5755 static int
5756 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5757                              struct brcms_c_rateset *rs_arg)
5758 {
5759         struct brcms_c_rateset rs, new;
5760         uint bandunit;
5761
5762         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5763
5764         /* check for bad count value */
5765         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5766                 return -EINVAL;
5767
5768         /* try the current band */
5769         bandunit = wlc->band->bandunit;
5770         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5771         if (brcms_c_rate_hwrs_filter_sort_validate
5772             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5773              wlc->stf->txstreams))
5774                 goto good;
5775
5776         /* try the other band */
5777         if (brcms_is_mband_unlocked(wlc)) {
5778                 bandunit = OTHERBANDUNIT(wlc);
5779                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5780                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5781                                                        &wlc->
5782                                                        bandstate[bandunit]->
5783                                                        hw_rateset, true,
5784                                                        wlc->stf->txstreams))
5785                         goto good;
5786         }
5787
5788         return -EBADE;
5789
5790  good:
5791         /* apply new rateset */
5792         memcpy(&wlc->default_bss->rateset, &new,
5793                sizeof(struct brcms_c_rateset));
5794         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5795                sizeof(struct brcms_c_rateset));
5796         return 0;
5797 }
5798
5799 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5800 {
5801         u8 r;
5802         bool war = false;
5803
5804         if (wlc->bsscfg->associated)
5805                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5806         else
5807                 r = wlc->default_bss->rateset.rates[0];
5808
5809         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5810 }
5811
5812 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5813 {
5814         u16 chspec = ch20mhz_chspec(channel);
5815
5816         if (channel < 0 || channel > MAXCHANNEL)
5817                 return -EINVAL;
5818
5819         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5820                 return -EINVAL;
5821
5822
5823         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5824                 if (wlc->band->bandunit != chspec_bandunit(chspec))
5825                         wlc->bandinit_pending = true;
5826                 else
5827                         wlc->bandinit_pending = false;
5828         }
5829
5830         wlc->default_bss->chanspec = chspec;
5831         /* brcms_c_BSSinit() will sanitize the rateset before
5832          * using it.. */
5833         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5834                 brcms_c_set_home_chanspec(wlc, chspec);
5835                 brcms_c_suspend_mac_and_wait(wlc);
5836                 brcms_c_set_chanspec(wlc, chspec);
5837                 brcms_c_enable_mac(wlc);
5838         }
5839         return 0;
5840 }
5841
5842 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5843 {
5844         int ac;
5845
5846         if (srl < 1 || srl > RETRY_SHORT_MAX ||
5847             lrl < 1 || lrl > RETRY_SHORT_MAX)
5848                 return -EINVAL;
5849
5850         wlc->SRL = srl;
5851         wlc->LRL = lrl;
5852
5853         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5854
5855         for (ac = 0; ac < AC_COUNT; ac++) {
5856                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5857                                                EDCF_SHORT,  wlc->SRL);
5858                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5859                                                EDCF_LONG, wlc->LRL);
5860         }
5861         brcms_c_wme_retries_write(wlc);
5862
5863         return 0;
5864 }
5865
5866 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5867                                  struct brcm_rateset *currs)
5868 {
5869         struct brcms_c_rateset *rs;
5870
5871         if (wlc->pub->associated)
5872                 rs = &wlc->bsscfg->current_bss->rateset;
5873         else
5874                 rs = &wlc->default_bss->rateset;
5875
5876         /* Copy only legacy rateset section */
5877         currs->count = rs->count;
5878         memcpy(&currs->rates, &rs->rates, rs->count);
5879 }
5880
5881 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5882 {
5883         struct brcms_c_rateset internal_rs;
5884         int bcmerror;
5885
5886         if (rs->count > BRCMS_NUMRATES)
5887                 return -ENOBUFS;
5888
5889         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5890
5891         /* Copy only legacy rateset section */
5892         internal_rs.count = rs->count;
5893         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5894
5895         /* merge rateset coming in with the current mcsset */
5896         if (wlc->pub->_n_enab & SUPPORT_11N) {
5897                 struct brcms_bss_info *mcsset_bss;
5898                 if (wlc->bsscfg->associated)
5899                         mcsset_bss = wlc->bsscfg->current_bss;
5900                 else
5901                         mcsset_bss = wlc->default_bss;
5902                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5903                        MCSSET_LEN);
5904         }
5905
5906         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5907         if (!bcmerror)
5908                 brcms_c_ofdm_rateset_war(wlc);
5909
5910         return bcmerror;
5911 }
5912
5913 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5914 {
5915         if (period < DOT11_MIN_BEACON_PERIOD ||
5916             period > DOT11_MAX_BEACON_PERIOD)
5917                 return -EINVAL;
5918
5919         wlc->default_bss->beacon_period = period;
5920         return 0;
5921 }
5922
5923 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5924 {
5925         return wlc->band->phytype;
5926 }
5927
5928 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5929 {
5930         wlc->shortslot_override = sslot_override;
5931
5932         /*
5933          * shortslot is an 11g feature, so no more work if we are
5934          * currently on the 5G band
5935          */
5936         if (wlc->band->bandtype == BRCM_BAND_5G)
5937                 return;
5938
5939         if (wlc->pub->up && wlc->pub->associated) {
5940                 /* let watchdog or beacon processing update shortslot */
5941         } else if (wlc->pub->up) {
5942                 /* unassociated shortslot is off */
5943                 brcms_c_switch_shortslot(wlc, false);
5944         } else {
5945                 /* driver is down, so just update the brcms_c_info
5946                  * value */
5947                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5948                         wlc->shortslot = false;
5949                 else
5950                         wlc->shortslot =
5951                             (wlc->shortslot_override ==
5952                              BRCMS_SHORTSLOT_ON);
5953         }
5954 }
5955
5956 /*
5957  * register watchdog and down handlers.
5958  */
5959 int brcms_c_module_register(struct brcms_pub *pub,
5960                             const char *name, struct brcms_info *hdl,
5961                             int (*d_fn)(void *handle))
5962 {
5963         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5964         int i;
5965
5966         /* find an empty entry and just add, no duplication check! */
5967         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5968                 if (wlc->modulecb[i].name[0] == '\0') {
5969                         strncpy(wlc->modulecb[i].name, name,
5970                                 sizeof(wlc->modulecb[i].name) - 1);
5971                         wlc->modulecb[i].hdl = hdl;
5972                         wlc->modulecb[i].down_fn = d_fn;
5973                         return 0;
5974                 }
5975         }
5976
5977         return -ENOSR;
5978 }
5979
5980 /* unregister module callbacks */
5981 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5982                               struct brcms_info *hdl)
5983 {
5984         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5985         int i;
5986
5987         if (wlc == NULL)
5988                 return -ENODATA;
5989
5990         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5991                 if (!strcmp(wlc->modulecb[i].name, name) &&
5992                     (wlc->modulecb[i].hdl == hdl)) {
5993                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5994                         return 0;
5995                 }
5996         }
5997
5998         /* table not found! */
5999         return -ENODATA;
6000 }
6001
6002 #ifdef BCMDBG
6003 static const char * const supr_reason[] = {
6004         "None", "PMQ Entry", "Flush request",
6005         "Previous frag failure", "Channel mismatch",
6006         "Lifetime Expiry", "Underflow"
6007 };
6008
6009 static void brcms_c_print_txs_status(u16 s)
6010 {
6011         printk(KERN_DEBUG "[15:12]  %d  frame attempts\n",
6012                (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
6013         printk(KERN_DEBUG " [11:8]  %d  rts attempts\n",
6014                (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
6015         printk(KERN_DEBUG "    [7]  %d  PM mode indicated\n",
6016                ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
6017         printk(KERN_DEBUG "    [6]  %d  intermediate status\n",
6018                ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
6019         printk(KERN_DEBUG "    [5]  %d  AMPDU\n",
6020                (s & TX_STATUS_AMPDU) ? 1 : 0);
6021         printk(KERN_DEBUG "  [4:2]  %d  Frame Suppressed Reason (%s)\n",
6022                ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
6023                supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
6024         printk(KERN_DEBUG "    [1]  %d  acked\n",
6025                ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
6026 }
6027 #endif                          /* BCMDBG */
6028
6029 void brcms_c_print_txstatus(struct tx_status *txs)
6030 {
6031 #if defined(BCMDBG)
6032         u16 s = txs->status;
6033         u16 ackphyrxsh = txs->ackphyrxsh;
6034
6035         printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
6036
6037         printk(KERN_DEBUG "FrameID: %04x   ", txs->frameid);
6038         printk(KERN_DEBUG "TxStatus: %04x", s);
6039         printk(KERN_DEBUG "\n");
6040
6041         brcms_c_print_txs_status(s);
6042
6043         printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
6044         printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
6045         printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
6046         printk(KERN_DEBUG "RxAckRSSI: %04x ",
6047                (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
6048         printk(KERN_DEBUG "RxAckSQ: %04x",
6049                (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
6050         printk(KERN_DEBUG "\n");
6051 #endif                          /* defined(BCMDBG) */
6052 }
6053
6054 bool brcms_c_chipmatch(u16 vendor, u16 device)
6055 {
6056         if (vendor != PCI_VENDOR_ID_BROADCOM) {
6057                 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
6058                 return false;
6059         }
6060
6061         if (device == BCM43224_D11N_ID_VEN1)
6062                 return true;
6063         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
6064                 return true;
6065         if (device == BCM4313_D11N2G_ID)
6066                 return true;
6067         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
6068                 return true;
6069
6070         pr_err("chipmatch: unknown device id %04x\n", device);
6071         return false;
6072 }
6073
6074 #if defined(BCMDBG)
6075 void brcms_c_print_txdesc(struct d11txh *txh)
6076 {
6077         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
6078         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
6079         u16 mfc = le16_to_cpu(txh->MacFrameControl);
6080         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
6081         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
6082         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
6083         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
6084         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
6085         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
6086         u16 mainrates = le16_to_cpu(txh->MainRates);
6087         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
6088         u8 *iv = txh->IV;
6089         u8 *ra = txh->TxFrameRA;
6090         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
6091         u8 *rtspfb = txh->RTSPLCPFallback;
6092         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
6093         u8 *fragpfb = txh->FragPLCPFallback;
6094         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
6095         u16 mmodelen = le16_to_cpu(txh->MModeLen);
6096         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
6097         u16 tfid = le16_to_cpu(txh->TxFrameID);
6098         u16 txs = le16_to_cpu(txh->TxStatus);
6099         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
6100         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
6101         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
6102         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
6103
6104         u8 *rtsph = txh->RTSPhyHeader;
6105         struct ieee80211_rts rts = txh->rts_frame;
6106         char hexbuf[256];
6107
6108         /* add plcp header along with txh descriptor */
6109         printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
6110         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
6111                              txh, sizeof(struct d11txh) + 48);
6112
6113         printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
6114         printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
6115         printk(KERN_DEBUG "FC: %04x ", mfc);
6116         printk(KERN_DEBUG "FES Time: %04x\n", tfest);
6117         printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
6118                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
6119         printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
6120         printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6121         printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6122         printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6123         printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6124         printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6125         printk(KERN_DEBUG "\n");
6126
6127         brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
6128         printk(KERN_DEBUG "SecIV:       %s\n", hexbuf);
6129         brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
6130         printk(KERN_DEBUG "RA:          %s\n", hexbuf);
6131
6132         printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6133         brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
6134         printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6135         printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6136         brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
6137         printk(KERN_DEBUG "PLCP: %s ", hexbuf);
6138         printk(KERN_DEBUG "DUR: %04x", fragdfb);
6139         printk(KERN_DEBUG "\n");
6140
6141         printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6142         printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6143
6144         printk(KERN_DEBUG "FrameID:     %04x\n", tfid);
6145         printk(KERN_DEBUG "TxStatus:    %04x\n", txs);
6146
6147         printk(KERN_DEBUG "MaxNumMpdu:  %04x\n", mnmpdu);
6148         printk(KERN_DEBUG "MaxAggbyte:  %04x\n", mabyte);
6149         printk(KERN_DEBUG "MaxAggbyte_fb:  %04x\n", mabyte_f);
6150         printk(KERN_DEBUG "MinByte:     %04x\n", mmbyte);
6151
6152         brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
6153         printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6154         brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
6155         printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
6156         printk(KERN_DEBUG "\n");
6157 }
6158 #endif                          /* defined(BCMDBG) */
6159
6160 #if defined(BCMDBG)
6161 int
6162 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
6163                    int len)
6164 {
6165         int i;
6166         char *p = buf;
6167         char hexstr[16];
6168         int slen = 0, nlen = 0;
6169         u32 bit;
6170         const char *name;
6171
6172         if (len < 2 || !buf)
6173                 return 0;
6174
6175         buf[0] = '\0';
6176
6177         for (i = 0; flags != 0; i++) {
6178                 bit = bd[i].bit;
6179                 name = bd[i].name;
6180                 if (bit == 0 && flags != 0) {
6181                         /* print any unnamed bits */
6182                         snprintf(hexstr, 16, "0x%X", flags);
6183                         name = hexstr;
6184                         flags = 0;      /* exit loop */
6185                 } else if ((flags & bit) == 0)
6186                         continue;
6187                 flags &= ~bit;
6188                 nlen = strlen(name);
6189                 slen += nlen;
6190                 /* count btwn flag space */
6191                 if (flags != 0)
6192                         slen += 1;
6193                 /* need NULL char as well */
6194                 if (len <= slen)
6195                         break;
6196                 /* copy NULL char but don't count it */
6197                 strncpy(p, name, nlen + 1);
6198                 p += nlen;
6199                 /* copy btwn flag space and NULL char */
6200                 if (flags != 0)
6201                         p += snprintf(p, 2, " ");
6202                 len -= slen;
6203         }
6204
6205         /* indicate the str was too short */
6206         if (flags != 0) {
6207                 if (len < 2)
6208                         p -= 2 - len;   /* overwrite last char */
6209                 p += snprintf(p, 2, ">");
6210         }
6211
6212         return (int)(p - buf);
6213 }
6214 #endif                          /* defined(BCMDBG) */
6215
6216 #if defined(BCMDBG)
6217 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6218 {
6219         u16 len = rxh->RxFrameSize;
6220         u16 phystatus_0 = rxh->PhyRxStatus_0;
6221         u16 phystatus_1 = rxh->PhyRxStatus_1;
6222         u16 phystatus_2 = rxh->PhyRxStatus_2;
6223         u16 phystatus_3 = rxh->PhyRxStatus_3;
6224         u16 macstatus1 = rxh->RxStatus1;
6225         u16 macstatus2 = rxh->RxStatus2;
6226         char flagstr[64];
6227         char lenbuf[20];
6228         static const struct brcms_c_bit_desc macstat_flags[] = {
6229                 {RXS_FCSERR, "FCSErr"},
6230                 {RXS_RESPFRAMETX, "Reply"},
6231                 {RXS_PBPRES, "PADDING"},
6232                 {RXS_DECATMPT, "DeCr"},
6233                 {RXS_DECERR, "DeCrErr"},
6234                 {RXS_BCNSENT, "Bcn"},
6235                 {0, NULL}
6236         };
6237
6238         printk(KERN_DEBUG "Raw RxDesc:\n");
6239         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6240                              sizeof(struct d11rxhdr));
6241
6242         brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
6243
6244         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6245
6246         printk(KERN_DEBUG "RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
6247                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6248         printk(KERN_DEBUG "RxPHYStatus:     %04x %04x %04x %04x\n",
6249                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6250         printk(KERN_DEBUG "RxMACStatus:     %x %s\n", macstatus1, flagstr);
6251         printk(KERN_DEBUG "RXMACaggtype:    %x\n",
6252                (macstatus2 & RXS_AGGTYPE_MASK));
6253         printk(KERN_DEBUG "RxTSFTime:       %04x\n", rxh->RxTSFTime);
6254 }
6255 #endif                          /* defined(BCMDBG) */
6256
6257 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6258 {
6259         u16 table_ptr;
6260         u8 phy_rate, index;
6261
6262         /* get the phy specific rate encoding for the PLCP SIGNAL field */
6263         if (is_ofdm_rate(rate))
6264                 table_ptr = M_RT_DIRMAP_A;
6265         else
6266                 table_ptr = M_RT_DIRMAP_B;
6267
6268         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6269          * the index into the rate table.
6270          */
6271         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6272         index = phy_rate & 0xf;
6273
6274         /* Find the SHM pointer to the rate table entry by looking in the
6275          * Direct-map Table
6276          */
6277         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6278 }
6279
6280 static bool
6281 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6282                       struct sk_buff *pkt, int prec, bool head)
6283 {
6284         struct sk_buff *p;
6285         int eprec = -1;         /* precedence to evict from */
6286
6287         /* Determine precedence from which to evict packet, if any */
6288         if (pktq_pfull(q, prec))
6289                 eprec = prec;
6290         else if (pktq_full(q)) {
6291                 p = brcmu_pktq_peek_tail(q, &eprec);
6292                 if (eprec > prec) {
6293                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6294                                   "\n", __func__, eprec, prec);
6295                         return false;
6296                 }
6297         }
6298
6299         /* Evict if needed */
6300         if (eprec >= 0) {
6301                 bool discard_oldest;
6302
6303                 discard_oldest = ac_bitmap_tst(0, eprec);
6304
6305                 /* Refuse newer packet unless configured to discard oldest */
6306                 if (eprec == prec && !discard_oldest) {
6307                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6308                                   "\n", __func__, prec);
6309                         return false;
6310                 }
6311
6312                 /* Evict packet according to discard policy */
6313                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6314                         brcmu_pktq_pdeq_tail(q, eprec);
6315                 brcmu_pkt_buf_free_skb(p);
6316         }
6317
6318         /* Enqueue */
6319         if (head)
6320                 p = brcmu_pktq_penq_head(q, prec, pkt);
6321         else
6322                 p = brcmu_pktq_penq(q, prec, pkt);
6323
6324         return true;
6325 }
6326
6327 /*
6328  * Attempts to queue a packet onto a multiple-precedence queue,
6329  * if necessary evicting a lower precedence packet from the queue.
6330  *
6331  * 'prec' is the precedence number that has already been mapped
6332  * from the packet priority.
6333  *
6334  * Returns true if packet consumed (queued), false if not.
6335  */
6336 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6337                       struct sk_buff *pkt, int prec)
6338 {
6339         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6340 }
6341
6342 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6343                      struct sk_buff *sdu, uint prec)
6344 {
6345         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6346         struct pktq *q = &qi->q;
6347         int prio;
6348
6349         prio = sdu->priority;
6350
6351         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6352                 /*
6353                  * we might hit this condtion in case
6354                  * packet flooding from mac80211 stack
6355                  */
6356                 brcmu_pkt_buf_free_skb(sdu);
6357         }
6358 }
6359
6360 /*
6361  * bcmc_fid_generate:
6362  * Generate frame ID for a BCMC packet.  The frag field is not used
6363  * for MC frames so is used as part of the sequence number.
6364  */
6365 static inline u16
6366 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6367                   struct d11txh *txh)
6368 {
6369         u16 frameid;
6370
6371         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6372                                                   TXFID_QUEUE_MASK);
6373         frameid |=
6374             (((wlc->
6375                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6376             TX_BCMC_FIFO;
6377
6378         return frameid;
6379 }
6380
6381 static uint
6382 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6383                       u8 preamble_type)
6384 {
6385         uint dur = 0;
6386
6387         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6388                 wlc->pub->unit, rspec, preamble_type);
6389         /*
6390          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6391          * is less than or equal to the rate of the immediately previous
6392          * frame in the FES
6393          */
6394         rspec = brcms_basic_rate(wlc, rspec);
6395         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6396         dur =
6397             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6398                                 (DOT11_ACK_LEN + FCS_LEN));
6399         return dur;
6400 }
6401
6402 static uint
6403 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6404                       u8 preamble_type)
6405 {
6406         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6407                 wlc->pub->unit, rspec, preamble_type);
6408         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6409 }
6410
6411 static uint
6412 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6413                      u8 preamble_type)
6414 {
6415         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6416                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6417         /*
6418          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6419          * is less than or equal to the rate of the immediately previous
6420          * frame in the FES
6421          */
6422         rspec = brcms_basic_rate(wlc, rspec);
6423         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6424         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6425                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6426                                     FCS_LEN));
6427 }
6428
6429 /* brcms_c_compute_frame_dur()
6430  *
6431  * Calculate the 802.11 MAC header DUR field for MPDU
6432  * DUR for a single frame = 1 SIFS + 1 ACK
6433  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6434  *
6435  * rate                 MPDU rate in unit of 500kbps
6436  * next_frag_len        next MPDU length in bytes
6437  * preamble_type        use short/GF or long/MM PLCP header
6438  */
6439 static u16
6440 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6441                       u8 preamble_type, uint next_frag_len)
6442 {
6443         u16 dur, sifs;
6444
6445         sifs = get_sifs(wlc->band);
6446
6447         dur = sifs;
6448         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6449
6450         if (next_frag_len) {
6451                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6452                 dur *= 2;
6453                 /* add another SIFS and the frag time */
6454                 dur += sifs;
6455                 dur +=
6456                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6457                                                  next_frag_len);
6458         }
6459         return dur;
6460 }
6461
6462 /* The opposite of brcms_c_calc_frame_time */
6463 static uint
6464 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6465                    u8 preamble_type, uint dur)
6466 {
6467         uint nsyms, mac_len, Ndps, kNdps;
6468         uint rate = rspec2rate(ratespec);
6469
6470         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6471                  wlc->pub->unit, ratespec, preamble_type, dur);
6472
6473         if (is_mcs_rate(ratespec)) {
6474                 uint mcs = ratespec & RSPEC_RATE_MASK;
6475                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6476                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6477                 /* payload calculation matches that of regular ofdm */
6478                 if (wlc->band->bandtype == BRCM_BAND_2G)
6479                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6480                 /* kNdbps = kbps * 4 */
6481                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6482                                    rspec_issgi(ratespec)) * 4;
6483                 nsyms = dur / APHY_SYMBOL_TIME;
6484                 mac_len =
6485                     ((nsyms * kNdps) -
6486                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6487         } else if (is_ofdm_rate(ratespec)) {
6488                 dur -= APHY_PREAMBLE_TIME;
6489                 dur -= APHY_SIGNAL_TIME;
6490                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6491                 Ndps = rate * 2;
6492                 nsyms = dur / APHY_SYMBOL_TIME;
6493                 mac_len =
6494                     ((nsyms * Ndps) -
6495                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6496         } else {
6497                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6498                         dur -= BPHY_PLCP_SHORT_TIME;
6499                 else
6500                         dur -= BPHY_PLCP_TIME;
6501                 mac_len = dur * rate;
6502                 /* divide out factor of 2 in rate (1/2 mbps) */
6503                 mac_len = mac_len / 8 / 2;
6504         }
6505         return mac_len;
6506 }
6507
6508 /*
6509  * Return true if the specified rate is supported by the specified band.
6510  * BRCM_BAND_AUTO indicates the current band.
6511  */
6512 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6513                     bool verbose)
6514 {
6515         struct brcms_c_rateset *hw_rateset;
6516         uint i;
6517
6518         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6519                 hw_rateset = &wlc->band->hw_rateset;
6520         else if (wlc->pub->_nbands > 1)
6521                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6522         else
6523                 /* other band specified and we are a single band device */
6524                 return false;
6525
6526         /* check if this is a mimo rate */
6527         if (is_mcs_rate(rspec)) {
6528                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6529                         goto error;
6530
6531                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6532         }
6533
6534         for (i = 0; i < hw_rateset->count; i++)
6535                 if (hw_rateset->rates[i] == rspec2rate(rspec))
6536                         return true;
6537  error:
6538         if (verbose)
6539                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6540                           "not in hw_rateset\n", wlc->pub->unit, rspec);
6541
6542         return false;
6543 }
6544
6545 static u32
6546 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6547                        u32 int_val)
6548 {
6549         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6550         u8 rate = int_val & NRATE_RATE_MASK;
6551         u32 rspec;
6552         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6553         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6554         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6555                                   == NRATE_OVERRIDE_MCS_ONLY);
6556         int bcmerror = 0;
6557
6558         if (!ismcs)
6559                 return (u32) rate;
6560
6561         /* validate the combination of rate/mcs/stf is allowed */
6562         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6563                 /* mcs only allowed when nmode */
6564                 if (stf > PHY_TXC1_MODE_SDM) {
6565                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6566                                   wlc->pub->unit, __func__);
6567                         bcmerror = -EINVAL;
6568                         goto done;
6569                 }
6570
6571                 /* mcs 32 is a special case, DUP mode 40 only */
6572                 if (rate == 32) {
6573                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6574                             ((stf != PHY_TXC1_MODE_SISO)
6575                              && (stf != PHY_TXC1_MODE_CDD))) {
6576                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6577                                           "32\n", wlc->pub->unit, __func__);
6578                                 bcmerror = -EINVAL;
6579                                 goto done;
6580                         }
6581                         /* mcs > 7 must use stf SDM */
6582                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6583                         /* mcs > 7 must use stf SDM */
6584                         if (stf != PHY_TXC1_MODE_SDM) {
6585                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6586                                        "SDM mode for mcs %d\n",
6587                                        wlc->pub->unit, rate);
6588                                 stf = PHY_TXC1_MODE_SDM;
6589                         }
6590                 } else {
6591                         /*
6592                          * MCS 0-7 may use SISO, CDD, and for
6593                          * phy_rev >= 3 STBC
6594                          */
6595                         if ((stf > PHY_TXC1_MODE_STBC) ||
6596                             (!BRCMS_STBC_CAP_PHY(wlc)
6597                              && (stf == PHY_TXC1_MODE_STBC))) {
6598                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6599                                           "\n", wlc->pub->unit, __func__);
6600                                 bcmerror = -EINVAL;
6601                                 goto done;
6602                         }
6603                 }
6604         } else if (is_ofdm_rate(rate)) {
6605                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6606                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6607                                   wlc->pub->unit, __func__);
6608                         bcmerror = -EINVAL;
6609                         goto done;
6610                 }
6611         } else if (is_cck_rate(rate)) {
6612                 if ((cur_band->bandtype != BRCM_BAND_2G)
6613                     || (stf != PHY_TXC1_MODE_SISO)) {
6614                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6615                                   wlc->pub->unit, __func__);
6616                         bcmerror = -EINVAL;
6617                         goto done;
6618                 }
6619         } else {
6620                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6621                           wlc->pub->unit, __func__);
6622                 bcmerror = -EINVAL;
6623                 goto done;
6624         }
6625         /* make sure multiple antennae are available for non-siso rates */
6626         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6627                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6628                           "request\n", wlc->pub->unit, __func__);
6629                 bcmerror = -EINVAL;
6630                 goto done;
6631         }
6632
6633         rspec = rate;
6634         if (ismcs) {
6635                 rspec |= RSPEC_MIMORATE;
6636                 /* For STBC populate the STC field of the ratespec */
6637                 if (stf == PHY_TXC1_MODE_STBC) {
6638                         u8 stc;
6639                         stc = 1;        /* Nss for single stream is always 1 */
6640                         rspec |= (stc << RSPEC_STC_SHIFT);
6641                 }
6642         }
6643
6644         rspec |= (stf << RSPEC_STF_SHIFT);
6645
6646         if (override_mcs_only)
6647                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6648
6649         if (issgi)
6650                 rspec |= RSPEC_SHORT_GI;
6651
6652         if ((rate != 0)
6653             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6654                 return rate;
6655
6656         return rspec;
6657 done:
6658         return rate;
6659 }
6660
6661 /*
6662  * Compute PLCP, but only requires actual rate and length of pkt.
6663  * Rate is given in the driver standard multiple of 500 kbps.
6664  * le is set for 11 Mbps rate if necessary.
6665  * Broken out for PRQ.
6666  */
6667
6668 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6669                              uint length, u8 *plcp)
6670 {
6671         u16 usec = 0;
6672         u8 le = 0;
6673
6674         switch (rate_500) {
6675         case BRCM_RATE_1M:
6676                 usec = length << 3;
6677                 break;
6678         case BRCM_RATE_2M:
6679                 usec = length << 2;
6680                 break;
6681         case BRCM_RATE_5M5:
6682                 usec = (length << 4) / 11;
6683                 if ((length << 4) - (usec * 11) > 0)
6684                         usec++;
6685                 break;
6686         case BRCM_RATE_11M:
6687                 usec = (length << 3) / 11;
6688                 if ((length << 3) - (usec * 11) > 0) {
6689                         usec++;
6690                         if ((usec * 11) - (length << 3) >= 8)
6691                                 le = D11B_PLCP_SIGNAL_LE;
6692                 }
6693                 break;
6694
6695         default:
6696                 wiphy_err(wlc->wiphy,
6697                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
6698                           rate_500);
6699                 rate_500 = BRCM_RATE_1M;
6700                 usec = length << 3;
6701                 break;
6702         }
6703         /* PLCP signal byte */
6704         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6705         /* PLCP service byte */
6706         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6707         /* PLCP length u16, little endian */
6708         plcp[2] = usec & 0xff;
6709         plcp[3] = (usec >> 8) & 0xff;
6710         /* PLCP CRC16 */
6711         plcp[4] = 0;
6712         plcp[5] = 0;
6713 }
6714
6715 /* Rate: 802.11 rate code, length: PSDU length in octets */
6716 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6717 {
6718         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6719         plcp[0] = mcs;
6720         if (rspec_is40mhz(rspec) || (mcs == 32))
6721                 plcp[0] |= MIMO_PLCP_40MHZ;
6722         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6723         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6724         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6725         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6726         plcp[5] = 0;
6727 }
6728
6729 /* Rate: 802.11 rate code, length: PSDU length in octets */
6730 static void
6731 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6732 {
6733         u8 rate_signal;
6734         u32 tmp = 0;
6735         int rate = rspec2rate(rspec);
6736
6737         /*
6738          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6739          * transmitted first
6740          */
6741         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6742         memset(plcp, 0, D11_PHY_HDR_LEN);
6743         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6744
6745         tmp = (length & 0xfff) << 5;
6746         plcp[2] |= (tmp >> 16) & 0xff;
6747         plcp[1] |= (tmp >> 8) & 0xff;
6748         plcp[0] |= tmp & 0xff;
6749 }
6750
6751 /* Rate: 802.11 rate code, length: PSDU length in octets */
6752 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6753                                  uint length, u8 *plcp)
6754 {
6755         int rate = rspec2rate(rspec);
6756
6757         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6758 }
6759
6760 static void
6761 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6762                      uint length, u8 *plcp)
6763 {
6764         if (is_mcs_rate(rspec))
6765                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6766         else if (is_ofdm_rate(rspec))
6767                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6768         else
6769                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6770 }
6771
6772 /* brcms_c_compute_rtscts_dur()
6773  *
6774  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6775  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6776  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
6777  *
6778  * cts                  cts-to-self or rts/cts
6779  * rts_rate             rts or cts rate in unit of 500kbps
6780  * rate                 next MPDU rate in unit of 500kbps
6781  * frame_len            next MPDU frame length in bytes
6782  */
6783 u16
6784 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6785                            u32 rts_rate,
6786                            u32 frame_rate, u8 rts_preamble_type,
6787                            u8 frame_preamble_type, uint frame_len, bool ba)
6788 {
6789         u16 dur, sifs;
6790
6791         sifs = get_sifs(wlc->band);
6792
6793         if (!cts_only) {
6794                 /* RTS/CTS */
6795                 dur = 3 * sifs;
6796                 dur +=
6797                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6798                                                rts_preamble_type);
6799         } else {
6800                 /* CTS-TO-SELF */
6801                 dur = 2 * sifs;
6802         }
6803
6804         dur +=
6805             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6806                                          frame_len);
6807         if (ba)
6808                 dur +=
6809                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6810                                               BRCMS_SHORT_PREAMBLE);
6811         else
6812                 dur +=
6813                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6814                                                frame_preamble_type);
6815         return dur;
6816 }
6817
6818 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6819 {
6820         u16 phyctl1 = 0;
6821         u16 bw;
6822
6823         if (BRCMS_ISLCNPHY(wlc->band)) {
6824                 bw = PHY_TXC1_BW_20MHZ;
6825         } else {
6826                 bw = rspec_get_bw(rspec);
6827                 /* 10Mhz is not supported yet */
6828                 if (bw < PHY_TXC1_BW_20MHZ) {
6829                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6830                                   "not supported yet, set to 20L\n", bw);
6831                         bw = PHY_TXC1_BW_20MHZ;
6832                 }
6833         }
6834
6835         if (is_mcs_rate(rspec)) {
6836                 uint mcs = rspec & RSPEC_RATE_MASK;
6837
6838                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6839                 phyctl1 = rspec_phytxbyte2(rspec);
6840                 /* set the upper byte of phyctl1 */
6841                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6842         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6843                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
6844                 /*
6845                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6846                  * Data Rate. Eventually MIMOPHY would also be converted to
6847                  * this format
6848                  */
6849                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6850                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6851         } else {                /* legacy OFDM/CCK */
6852                 s16 phycfg;
6853                 /* get the phyctl byte from rate phycfg table */
6854                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6855                 if (phycfg == -1) {
6856                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6857                                   "legacy OFDM/CCK rate\n");
6858                         phycfg = 0;
6859                 }
6860                 /* set the upper byte of phyctl1 */
6861                 phyctl1 =
6862                     (bw | (phycfg << 8) |
6863                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6864         }
6865         return phyctl1;
6866 }
6867
6868 /*
6869  * Add struct d11txh, struct cck_phy_hdr.
6870  *
6871  * 'p' data must start with 802.11 MAC header
6872  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6873  *
6874  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6875  *
6876  */
6877 static u16
6878 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6879                      struct sk_buff *p, struct scb *scb, uint frag,
6880                      uint nfrags, uint queue, uint next_frag_len)
6881 {
6882         struct ieee80211_hdr *h;
6883         struct d11txh *txh;
6884         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6885         int len, phylen, rts_phylen;
6886         u16 mch, phyctl, xfts, mainrates;
6887         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6888         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6889         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6890         bool use_rts = false;
6891         bool use_cts = false;
6892         bool use_rifs = false;
6893         bool short_preamble[2] = { false, false };
6894         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6895         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6896         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6897         struct ieee80211_rts *rts = NULL;
6898         bool qos;
6899         uint ac;
6900         bool hwtkmic = false;
6901         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6902 #define ANTCFG_NONE 0xFF
6903         u8 antcfg = ANTCFG_NONE;
6904         u8 fbantcfg = ANTCFG_NONE;
6905         uint phyctl1_stf = 0;
6906         u16 durid = 0;
6907         struct ieee80211_tx_rate *txrate[2];
6908         int k;
6909         struct ieee80211_tx_info *tx_info;
6910         bool is_mcs;
6911         u16 mimo_txbw;
6912         u8 mimo_preamble_type;
6913
6914         /* locate 802.11 MAC header */
6915         h = (struct ieee80211_hdr *)(p->data);
6916         qos = ieee80211_is_data_qos(h->frame_control);
6917
6918         /* compute length of frame in bytes for use in PLCP computations */
6919         len = brcmu_pkttotlen(p);
6920         phylen = len + FCS_LEN;
6921
6922         /* Get tx_info */
6923         tx_info = IEEE80211_SKB_CB(p);
6924
6925         /* add PLCP */
6926         plcp = skb_push(p, D11_PHY_HDR_LEN);
6927
6928         /* add Broadcom tx descriptor header */
6929         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6930         memset(txh, 0, D11_TXH_LEN);
6931
6932         /* setup frameid */
6933         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6934                 /* non-AP STA should never use BCMC queue */
6935                 if (queue == TX_BCMC_FIFO) {
6936                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6937                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6938                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6939                 } else {
6940                         /* Increment the counter for first fragment */
6941                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6942                                 scb->seqnum[p->priority]++;
6943
6944                         /* extract fragment number from frame first */
6945                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6946                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6947                         h->seq_ctrl = cpu_to_le16(seq);
6948
6949                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6950                             (queue & TXFID_QUEUE_MASK);
6951                 }
6952         }
6953         frameid |= queue & TXFID_QUEUE_MASK;
6954
6955         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6956         if (ieee80211_is_beacon(h->frame_control))
6957                 mcl |= TXC_IGNOREPMQ;
6958
6959         txrate[0] = tx_info->control.rates;
6960         txrate[1] = txrate[0] + 1;
6961
6962         /*
6963          * if rate control algorithm didn't give us a fallback
6964          * rate, use the primary rate
6965          */
6966         if (txrate[1]->idx < 0)
6967                 txrate[1] = txrate[0];
6968
6969         for (k = 0; k < hw->max_rates; k++) {
6970                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6971                 if (!is_mcs) {
6972                         if ((txrate[k]->idx >= 0)
6973                             && (txrate[k]->idx <
6974                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6975                                 rspec[k] =
6976                                     hw->wiphy->bands[tx_info->band]->
6977                                     bitrates[txrate[k]->idx].hw_value;
6978                                 short_preamble[k] =
6979                                     txrate[k]->
6980                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6981                                     true : false;
6982                         } else {
6983                                 rspec[k] = BRCM_RATE_1M;
6984                         }
6985                 } else {
6986                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6987                                         NRATE_MCS_INUSE | txrate[k]->idx);
6988                 }
6989
6990                 /*
6991                  * Currently only support same setting for primay and
6992                  * fallback rates. Unify flags for each rate into a
6993                  * single value for the frame
6994                  */
6995                 use_rts |=
6996                     txrate[k]->
6997                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6998                 use_cts |=
6999                     txrate[k]->
7000                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
7001
7002
7003                 /*
7004                  * (1) RATE:
7005                  *   determine and validate primary rate
7006                  *   and fallback rates
7007                  */
7008                 if (!rspec_active(rspec[k])) {
7009                         rspec[k] = BRCM_RATE_1M;
7010                 } else {
7011                         if (!is_multicast_ether_addr(h->addr1)) {
7012                                 /* set tx antenna config */
7013                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
7014                                         false, 0, 0, &antcfg, &fbantcfg);
7015                         }
7016                 }
7017         }
7018
7019         phyctl1_stf = wlc->stf->ss_opmode;
7020
7021         if (wlc->pub->_n_enab & SUPPORT_11N) {
7022                 for (k = 0; k < hw->max_rates; k++) {
7023                         /*
7024                          * apply siso/cdd to single stream mcs's or ofdm
7025                          * if rspec is auto selected
7026                          */
7027                         if (((is_mcs_rate(rspec[k]) &&
7028                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
7029                              is_ofdm_rate(rspec[k]))
7030                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
7031                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
7032                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
7033
7034                                 /* For SISO MCS use STBC if possible */
7035                                 if (is_mcs_rate(rspec[k])
7036                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
7037                                         u8 stc;
7038
7039                                         /* Nss for single stream is always 1 */
7040                                         stc = 1;
7041                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
7042                                                         RSPEC_STF_SHIFT) |
7043                                                     (stc << RSPEC_STC_SHIFT);
7044                                 } else
7045                                         rspec[k] |=
7046                                             (phyctl1_stf << RSPEC_STF_SHIFT);
7047                         }
7048
7049                         /*
7050                          * Is the phy configured to use 40MHZ frames? If
7051                          * so then pick the desired txbw
7052                          */
7053                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
7054                                 /* default txbw is 20in40 SB */
7055                                 mimo_ctlchbw = mimo_txbw =
7056                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
7057                                                                  wlc->band->pi))
7058                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
7059
7060                                 if (is_mcs_rate(rspec[k])) {
7061                                         /* mcs 32 must be 40b/w DUP */
7062                                         if ((rspec[k] & RSPEC_RATE_MASK)
7063                                             == 32) {
7064                                                 mimo_txbw =
7065                                                     PHY_TXC1_BW_40MHZ_DUP;
7066                                                 /* use override */
7067                                         } else if (wlc->mimo_40txbw != AUTO)
7068                                                 mimo_txbw = wlc->mimo_40txbw;
7069                                         /* else check if dst is using 40 Mhz */
7070                                         else if (scb->flags & SCB_IS40)
7071                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
7072                                 } else if (is_ofdm_rate(rspec[k])) {
7073                                         if (wlc->ofdm_40txbw != AUTO)
7074                                                 mimo_txbw = wlc->ofdm_40txbw;
7075                                 } else if (wlc->cck_40txbw != AUTO) {
7076                                         mimo_txbw = wlc->cck_40txbw;
7077                                 }
7078                         } else {
7079                                 /*
7080                                  * mcs32 is 40 b/w only.
7081                                  * This is possible for probe packets on
7082                                  * a STA during SCAN
7083                                  */
7084                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
7085                                         /* mcs 0 */
7086                                         rspec[k] = RSPEC_MIMORATE;
7087
7088                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
7089                         }
7090
7091                         /* Set channel width */
7092                         rspec[k] &= ~RSPEC_BW_MASK;
7093                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
7094                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
7095                         else
7096                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7097
7098                         /* Disable short GI, not supported yet */
7099                         rspec[k] &= ~RSPEC_SHORT_GI;
7100
7101                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
7102                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
7103                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
7104
7105                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
7106                             && (!is_mcs_rate(rspec[k]))) {
7107                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
7108                                           "RC_MCS != is_mcs_rate(rspec)\n",
7109                                           wlc->pub->unit, __func__);
7110                         }
7111
7112                         if (is_mcs_rate(rspec[k])) {
7113                                 preamble_type[k] = mimo_preamble_type;
7114
7115                                 /*
7116                                  * if SGI is selected, then forced mm
7117                                  * for single stream
7118                                  */
7119                                 if ((rspec[k] & RSPEC_SHORT_GI)
7120                                     && is_single_stream(rspec[k] &
7121                                                         RSPEC_RATE_MASK))
7122                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
7123                         }
7124
7125                         /* should be better conditionalized */
7126                         if (!is_mcs_rate(rspec[0])
7127                             && (tx_info->control.rates[0].
7128                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7129                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7130                 }
7131         } else {
7132                 for (k = 0; k < hw->max_rates; k++) {
7133                         /* Set ctrlchbw as 20Mhz */
7134                         rspec[k] &= ~RSPEC_BW_MASK;
7135                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7136
7137                         /* for nphy, stf of ofdm frames must follow policies */
7138                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7139                                 rspec[k] &= ~RSPEC_STF_MASK;
7140                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7141                         }
7142                 }
7143         }
7144
7145         /* Reset these for use with AMPDU's */
7146         txrate[0]->count = 0;
7147         txrate[1]->count = 0;
7148
7149         /* (2) PROTECTION, may change rspec */
7150         if ((ieee80211_is_data(h->frame_control) ||
7151             ieee80211_is_mgmt(h->frame_control)) &&
7152             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7153                 use_rts = true;
7154
7155         /* (3) PLCP: determine PLCP header and MAC duration,
7156          * fill struct d11txh */
7157         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7158         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7159         memcpy(&txh->FragPLCPFallback,
7160                plcp_fallback, sizeof(txh->FragPLCPFallback));
7161
7162         /* Length field now put in CCK FBR CRC field */
7163         if (is_cck_rate(rspec[1])) {
7164                 txh->FragPLCPFallback[4] = phylen & 0xff;
7165                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7166         }
7167
7168         /* MIMO-RATE: need validation ?? */
7169         mainrates = is_ofdm_rate(rspec[0]) ?
7170                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7171                         plcp[0];
7172
7173         /* DUR field for main rate */
7174         if (!ieee80211_is_pspoll(h->frame_control) &&
7175             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7176                 durid =
7177                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7178                                           next_frag_len);
7179                 h->duration_id = cpu_to_le16(durid);
7180         } else if (use_rifs) {
7181                 /* NAV protect to end of next max packet size */
7182                 durid =
7183                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7184                                                  preamble_type[0],
7185                                                  DOT11_MAX_FRAG_LEN);
7186                 durid += RIFS_11N_TIME;
7187                 h->duration_id = cpu_to_le16(durid);
7188         }
7189
7190         /* DUR field for fallback rate */
7191         if (ieee80211_is_pspoll(h->frame_control))
7192                 txh->FragDurFallback = h->duration_id;
7193         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7194                 txh->FragDurFallback = 0;
7195         else {
7196                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7197                                               preamble_type[1], next_frag_len);
7198                 txh->FragDurFallback = cpu_to_le16(durid);
7199         }
7200
7201         /* (4) MAC-HDR: MacTxControlLow */
7202         if (frag == 0)
7203                 mcl |= TXC_STARTMSDU;
7204
7205         if (!is_multicast_ether_addr(h->addr1))
7206                 mcl |= TXC_IMMEDACK;
7207
7208         if (wlc->band->bandtype == BRCM_BAND_5G)
7209                 mcl |= TXC_FREQBAND_5G;
7210
7211         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7212                 mcl |= TXC_BW_40;
7213
7214         /* set AMIC bit if using hardware TKIP MIC */
7215         if (hwtkmic)
7216                 mcl |= TXC_AMIC;
7217
7218         txh->MacTxControlLow = cpu_to_le16(mcl);
7219
7220         /* MacTxControlHigh */
7221         mch = 0;
7222
7223         /* Set fallback rate preamble type */
7224         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7225             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7226                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7227                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7228         }
7229
7230         /* MacFrameControl */
7231         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7232         txh->TxFesTimeNormal = cpu_to_le16(0);
7233
7234         txh->TxFesTimeFallback = cpu_to_le16(0);
7235
7236         /* TxFrameRA */
7237         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7238
7239         /* TxFrameID */
7240         txh->TxFrameID = cpu_to_le16(frameid);
7241
7242         /*
7243          * TxStatus, Note the case of recreating the first frag of a suppressed
7244          * frame then we may need to reset the retry cnt's via the status reg
7245          */
7246         txh->TxStatus = cpu_to_le16(status);
7247
7248         /*
7249          * extra fields for ucode AMPDU aggregation, the new fields are added to
7250          * the END of previous structure so that it's compatible in driver.
7251          */
7252         txh->MaxNMpdus = cpu_to_le16(0);
7253         txh->MaxABytes_MRT = cpu_to_le16(0);
7254         txh->MaxABytes_FBR = cpu_to_le16(0);
7255         txh->MinMBytes = cpu_to_le16(0);
7256
7257         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7258          * furnish struct d11txh */
7259         /* RTS PLCP header and RTS frame */
7260         if (use_rts || use_cts) {
7261                 if (use_rts && use_cts)
7262                         use_cts = false;
7263
7264                 for (k = 0; k < 2; k++) {
7265                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7266                                                               false,
7267                                                               mimo_ctlchbw);
7268                 }
7269
7270                 if (!is_ofdm_rate(rts_rspec[0]) &&
7271                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7272                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7273                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7274                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7275                 }
7276
7277                 if (!is_ofdm_rate(rts_rspec[1]) &&
7278                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7279                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7280                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7281                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7282                 }
7283
7284                 /* RTS/CTS additions to MacTxControlLow */
7285                 if (use_cts) {
7286                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7287                 } else {
7288                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7289                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7290                 }
7291
7292                 /* RTS PLCP header */
7293                 rts_plcp = txh->RTSPhyHeader;
7294                 if (use_cts)
7295                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7296                 else
7297                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7298
7299                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7300
7301                 /* fallback rate version of RTS PLCP header */
7302                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7303                                  rts_plcp_fallback);
7304                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7305                        sizeof(txh->RTSPLCPFallback));
7306
7307                 /* RTS frame fields... */
7308                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7309
7310                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7311                                                rspec[0], rts_preamble_type[0],
7312                                                preamble_type[0], phylen, false);
7313                 rts->duration = cpu_to_le16(durid);
7314                 /* fallback rate version of RTS DUR field */
7315                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7316                                                rts_rspec[1], rspec[1],
7317                                                rts_preamble_type[1],
7318                                                preamble_type[1], phylen, false);
7319                 txh->RTSDurFallback = cpu_to_le16(durid);
7320
7321                 if (use_cts) {
7322                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7323                                                          IEEE80211_STYPE_CTS);
7324
7325                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7326                 } else {
7327                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7328                                                          IEEE80211_STYPE_RTS);
7329
7330                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7331                 }
7332
7333                 /* mainrate
7334                  *    low 8 bits: main frag rate/mcs,
7335                  *    high 8 bits: rts/cts rate/mcs
7336                  */
7337                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7338                                 D11A_PHY_HDR_GRATE(
7339                                         (struct ofdm_phy_hdr *) rts_plcp) :
7340                                 rts_plcp[0]) << 8;
7341         } else {
7342                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7343                 memset((char *)&txh->rts_frame, 0,
7344                         sizeof(struct ieee80211_rts));
7345                 memset((char *)txh->RTSPLCPFallback, 0,
7346                       sizeof(txh->RTSPLCPFallback));
7347                 txh->RTSDurFallback = 0;
7348         }
7349
7350 #ifdef SUPPORT_40MHZ
7351         /* add null delimiter count */
7352         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7353                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7354                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7355
7356 #endif
7357
7358         /*
7359          * Now that RTS/RTS FB preamble types are updated, write
7360          * the final value
7361          */
7362         txh->MacTxControlHigh = cpu_to_le16(mch);
7363
7364         /*
7365          * MainRates (both the rts and frag plcp rates have
7366          * been calculated now)
7367          */
7368         txh->MainRates = cpu_to_le16(mainrates);
7369
7370         /* XtraFrameTypes */
7371         xfts = frametype(rspec[1], wlc->mimoft);
7372         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7373         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7374         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7375                                                              XFTS_CHANNEL_SHIFT;
7376         txh->XtraFrameTypes = cpu_to_le16(xfts);
7377
7378         /* PhyTxControlWord */
7379         phyctl = frametype(rspec[0], wlc->mimoft);
7380         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7381             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7382                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7383                         phyctl |= PHY_TXC_SHORT_HDR;
7384         }
7385
7386         /* phytxant is properly bit shifted */
7387         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7388         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7389
7390         /* PhyTxControlWord_1 */
7391         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7392                 u16 phyctl1 = 0;
7393
7394                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7395                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7396                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7397                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7398
7399                 if (use_rts || use_cts) {
7400                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7401                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7402                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7403                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7404                 }
7405
7406                 /*
7407                  * For mcs frames, if mixedmode(overloaded with long preamble)
7408                  * is going to be set, fill in non-zero MModeLen and/or
7409                  * MModeFbrLen it will be unnecessary if they are separated
7410                  */
7411                 if (is_mcs_rate(rspec[0]) &&
7412                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7413                         u16 mmodelen =
7414                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7415                         txh->MModeLen = cpu_to_le16(mmodelen);
7416                 }
7417
7418                 if (is_mcs_rate(rspec[1]) &&
7419                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7420                         u16 mmodefbrlen =
7421                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7422                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7423                 }
7424         }
7425
7426         ac = skb_get_queue_mapping(p);
7427         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7428                 uint frag_dur, dur, dur_fallback;
7429
7430                 /* WME: Update TXOP threshold */
7431                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7432                         frag_dur =
7433                             brcms_c_calc_frame_time(wlc, rspec[0],
7434                                         preamble_type[0], phylen);
7435
7436                         if (rts) {
7437                                 /* 1 RTS or CTS-to-self frame */
7438                                 dur =
7439                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7440                                                       rts_preamble_type[0]);
7441                                 dur_fallback =
7442                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7443                                                       rts_preamble_type[1]);
7444                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7445                                 dur += le16_to_cpu(rts->duration);
7446                                 dur_fallback +=
7447                                         le16_to_cpu(txh->RTSDurFallback);
7448                         } else if (use_rifs) {
7449                                 dur = frag_dur;
7450                                 dur_fallback = 0;
7451                         } else {
7452                                 /* frame + SIFS + ACK */
7453                                 dur = frag_dur;
7454                                 dur +=
7455                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7456                                                           preamble_type[0], 0);
7457
7458                                 dur_fallback =
7459                                     brcms_c_calc_frame_time(wlc, rspec[1],
7460                                                         preamble_type[1],
7461                                                         phylen);
7462                                 dur_fallback +=
7463                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7464                                                           preamble_type[1], 0);
7465                         }
7466                         /* NEED to set TxFesTimeNormal (hard) */
7467                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7468                         /*
7469                          * NEED to set fallback rate version of
7470                          * TxFesTimeNormal (hard)
7471                          */
7472                         txh->TxFesTimeFallback =
7473                                 cpu_to_le16((u16) dur_fallback);
7474
7475                         /*
7476                          * update txop byte threshold (txop minus intraframe
7477                          * overhead)
7478                          */
7479                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7480                                 uint newfragthresh;
7481
7482                                 newfragthresh =
7483                                     brcms_c_calc_frame_len(wlc,
7484                                         rspec[0], preamble_type[0],
7485                                         (wlc->edcf_txop[ac] -
7486                                                 (dur - frag_dur)));
7487                                 /* range bound the fragthreshold */
7488                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7489                                         newfragthresh =
7490                                             DOT11_MIN_FRAG_LEN;
7491                                 else if (newfragthresh >
7492                                          wlc->usr_fragthresh)
7493                                         newfragthresh =
7494                                             wlc->usr_fragthresh;
7495                                 /* update the fragthresh and do txc update */
7496                                 if (wlc->fragthresh[queue] !=
7497                                     (u16) newfragthresh)
7498                                         wlc->fragthresh[queue] =
7499                                             (u16) newfragthresh;
7500                         } else {
7501                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7502                                           "for rate %d\n",
7503                                           wlc->pub->unit, fifo_names[queue],
7504                                           rspec2rate(rspec[0]));
7505                         }
7506
7507                         if (dur > wlc->edcf_txop[ac])
7508                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7509                                           "exceeded phylen %d/%d dur %d/%d\n",
7510                                           wlc->pub->unit, __func__,
7511                                           fifo_names[queue],
7512                                           phylen, wlc->fragthresh[queue],
7513                                           dur, wlc->edcf_txop[ac]);
7514                 }
7515         }
7516
7517         return 0;
7518 }
7519
7520 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7521                               struct ieee80211_hw *hw)
7522 {
7523         u8 prio;
7524         uint fifo;
7525         struct scb *scb = &wlc->pri_scb;
7526         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7527
7528         /*
7529          * 802.11 standard requires management traffic
7530          * to go at highest priority
7531          */
7532         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7533                 MAXPRIO;
7534         fifo = prio2fifo[prio];
7535         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7536                 return;
7537         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7538         brcms_c_send_q(wlc);
7539 }
7540
7541 void brcms_c_send_q(struct brcms_c_info *wlc)
7542 {
7543         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7544         int prec;
7545         u16 prec_map;
7546         int err = 0, i, count;
7547         uint fifo;
7548         struct brcms_txq_info *qi = wlc->pkt_queue;
7549         struct pktq *q = &qi->q;
7550         struct ieee80211_tx_info *tx_info;
7551
7552         prec_map = wlc->tx_prec_map;
7553
7554         /* Send all the enq'd pkts that we can.
7555          * Dequeue packets with precedence with empty HW fifo only
7556          */
7557         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7558                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7559                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7560                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7561                 } else {
7562                         count = 1;
7563                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7564                         if (!err) {
7565                                 for (i = 0; i < count; i++)
7566                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7567                                                        1);
7568                         }
7569                 }
7570
7571                 if (err == -EBUSY) {
7572                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7573                         /*
7574                          * If send failed due to any other reason than a
7575                          * change in HW FIFO condition, quit. Otherwise,
7576                          * read the new prec_map!
7577                          */
7578                         if (prec_map == wlc->tx_prec_map)
7579                                 break;
7580                         prec_map = wlc->tx_prec_map;
7581                 }
7582         }
7583 }
7584
7585 void
7586 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7587                bool commit, s8 txpktpend)
7588 {
7589         u16 frameid = INVALIDFID;
7590         struct d11txh *txh;
7591
7592         txh = (struct d11txh *) (p->data);
7593
7594         /* When a BC/MC frame is being committed to the BCMC fifo
7595          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7596          */
7597         if (fifo == TX_BCMC_FIFO)
7598                 frameid = le16_to_cpu(txh->TxFrameID);
7599
7600         /*
7601          * Bump up pending count for if not using rpc. If rpc is
7602          * used, this will be handled in brcms_b_txfifo()
7603          */
7604         if (commit) {
7605                 wlc->core->txpktpend[fifo] += txpktpend;
7606                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7607                          txpktpend, wlc->core->txpktpend[fifo]);
7608         }
7609
7610         /* Commit BCMC sequence number in the SHM frame ID location */
7611         if (frameid != INVALIDFID) {
7612                 /*
7613                  * To inform the ucode of the last mcast frame posted
7614                  * so that it can clear moredata bit
7615                  */
7616                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7617         }
7618
7619         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7620                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7621 }
7622
7623 u32
7624 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7625                            bool use_rspec, u16 mimo_ctlchbw)
7626 {
7627         u32 rts_rspec = 0;
7628
7629         if (use_rspec)
7630                 /* use frame rate as rts rate */
7631                 rts_rspec = rspec;
7632         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7633                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7634                  * Use the brcms_basic_rate() lookup to find the best basic rate
7635                  * under the target in case 11 Mbps is not Basic.
7636                  * 6 and 9 Mbps are not usually selected by rate selection, but
7637                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7638                  * is more robust.
7639                  */
7640                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7641         else
7642                 /* calculate RTS rate and fallback rate based on the frame rate
7643                  * RTS must be sent at a basic rate since it is a
7644                  * control frame, sec 9.6 of 802.11 spec
7645                  */
7646                 rts_rspec = brcms_basic_rate(wlc, rspec);
7647
7648         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7649                 /* set rts txbw to correct side band */
7650                 rts_rspec &= ~RSPEC_BW_MASK;
7651
7652                 /*
7653                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7654                  * 20MHz channel (DUP), otherwise send RTS on control channel
7655                  */
7656                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7657                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7658                 else
7659                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7660
7661                 /* pick siso/cdd as default for ofdm */
7662                 if (is_ofdm_rate(rts_rspec)) {
7663                         rts_rspec &= ~RSPEC_STF_MASK;
7664                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7665                 }
7666         }
7667         return rts_rspec;
7668 }
7669
7670 void
7671 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7672 {
7673         wlc->core->txpktpend[fifo] -= txpktpend;
7674         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7675                wlc->core->txpktpend[fifo]);
7676
7677         /* There is more room; mark precedences related to this FIFO sendable */
7678         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7679
7680         /* figure out which bsscfg is being worked on... */
7681 }
7682
7683 /* Update beacon listen interval in shared memory */
7684 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7685 {
7686         /* wake up every DTIM is the default */
7687         if (wlc->bcn_li_dtim == 1)
7688                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7689         else
7690                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7691                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7692 }
7693
7694 static void
7695 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7696                   u32 *tsf_h_ptr)
7697 {
7698         struct d11regs __iomem *regs = wlc_hw->regs;
7699
7700         /* read the tsf timer low, then high to get an atomic read */
7701         *tsf_l_ptr = R_REG(&regs->tsf_timerlow);
7702         *tsf_h_ptr = R_REG(&regs->tsf_timerhigh);
7703 }
7704
7705 /*
7706  * recover 64bit TSF value from the 16bit TSF value in the rx header
7707  * given the assumption that the TSF passed in header is within 65ms
7708  * of the current tsf.
7709  *
7710  * 6       5       4       4       3       2       1
7711  * 3.......6.......8.......0.......2.......4.......6.......8......0
7712  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7713  *
7714  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7715  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7716  * receive call sequence after rx interrupt. Only the higher 16 bits
7717  * are used. Finally, the tsf_h is read from the tsf register.
7718  */
7719 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7720                                  struct d11rxhdr *rxh)
7721 {
7722         u32 tsf_h, tsf_l;
7723         u16 rx_tsf_0_15, rx_tsf_16_31;
7724
7725         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7726
7727         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7728         rx_tsf_0_15 = rxh->RxTSFTime;
7729
7730         /*
7731          * a greater tsf time indicates the low 16 bits of
7732          * tsf_l wrapped, so decrement the high 16 bits.
7733          */
7734         if ((u16)tsf_l < rx_tsf_0_15) {
7735                 rx_tsf_16_31 -= 1;
7736                 if (rx_tsf_16_31 == 0xffff)
7737                         tsf_h -= 1;
7738         }
7739
7740         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7741 }
7742
7743 static void
7744 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7745                      struct sk_buff *p,
7746                      struct ieee80211_rx_status *rx_status)
7747 {
7748         int preamble;
7749         int channel;
7750         u32 rspec;
7751         unsigned char *plcp;
7752
7753         /* fill in TSF and flag its presence */
7754         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7755         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7756
7757         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7758
7759         if (channel > 14) {
7760                 rx_status->band = IEEE80211_BAND_5GHZ;
7761                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7762                                         WF_CHAN_FACTOR_5_G/2, channel);
7763
7764         } else {
7765                 rx_status->band = IEEE80211_BAND_2GHZ;
7766                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7767         }
7768
7769         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7770
7771         /* noise */
7772         /* qual */
7773         rx_status->antenna =
7774                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7775
7776         plcp = p->data;
7777
7778         rspec = brcms_c_compute_rspec(rxh, plcp);
7779         if (is_mcs_rate(rspec)) {
7780                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7781                 rx_status->flag |= RX_FLAG_HT;
7782                 if (rspec_is40mhz(rspec))
7783                         rx_status->flag |= RX_FLAG_40MHZ;
7784         } else {
7785                 switch (rspec2rate(rspec)) {
7786                 case BRCM_RATE_1M:
7787                         rx_status->rate_idx = 0;
7788                         break;
7789                 case BRCM_RATE_2M:
7790                         rx_status->rate_idx = 1;
7791                         break;
7792                 case BRCM_RATE_5M5:
7793                         rx_status->rate_idx = 2;
7794                         break;
7795                 case BRCM_RATE_11M:
7796                         rx_status->rate_idx = 3;
7797                         break;
7798                 case BRCM_RATE_6M:
7799                         rx_status->rate_idx = 4;
7800                         break;
7801                 case BRCM_RATE_9M:
7802                         rx_status->rate_idx = 5;
7803                         break;
7804                 case BRCM_RATE_12M:
7805                         rx_status->rate_idx = 6;
7806                         break;
7807                 case BRCM_RATE_18M:
7808                         rx_status->rate_idx = 7;
7809                         break;
7810                 case BRCM_RATE_24M:
7811                         rx_status->rate_idx = 8;
7812                         break;
7813                 case BRCM_RATE_36M:
7814                         rx_status->rate_idx = 9;
7815                         break;
7816                 case BRCM_RATE_48M:
7817                         rx_status->rate_idx = 10;
7818                         break;
7819                 case BRCM_RATE_54M:
7820                         rx_status->rate_idx = 11;
7821                         break;
7822                 default:
7823                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7824                 }
7825
7826                 /*
7827                  * For 5GHz, we should decrease the index as it is
7828                  * a subset of the 2.4G rates. See bitrates field
7829                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7830                  */
7831                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7832                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7833
7834                 /* Determine short preamble and rate_idx */
7835                 preamble = 0;
7836                 if (is_cck_rate(rspec)) {
7837                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7838                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7839                 } else if (is_ofdm_rate(rspec)) {
7840                         rx_status->flag |= RX_FLAG_SHORTPRE;
7841                 } else {
7842                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7843                                   __func__);
7844                 }
7845         }
7846
7847         if (plcp3_issgi(plcp[3]))
7848                 rx_status->flag |= RX_FLAG_SHORT_GI;
7849
7850         if (rxh->RxStatus1 & RXS_DECERR) {
7851                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7852                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
7853                           __func__);
7854         }
7855         if (rxh->RxStatus1 & RXS_FCSERR) {
7856                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7857                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
7858                           __func__);
7859         }
7860 }
7861
7862 static void
7863 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7864                 struct sk_buff *p)
7865 {
7866         int len_mpdu;
7867         struct ieee80211_rx_status rx_status;
7868
7869         memset(&rx_status, 0, sizeof(rx_status));
7870         prep_mac80211_status(wlc, rxh, p, &rx_status);
7871
7872         /* mac header+body length, exclude CRC and plcp header */
7873         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7874         skb_pull(p, D11_PHY_HDR_LEN);
7875         __skb_trim(p, len_mpdu);
7876
7877         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7878         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7879 }
7880
7881 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7882  * number of bytes goes in the length field
7883  *
7884  * Formula given by HT PHY Spec v 1.13
7885  *   len = 3(nsyms + nstream + 3) - 3
7886  */
7887 u16
7888 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7889                       uint mac_len)
7890 {
7891         uint nsyms, len = 0, kNdps;
7892
7893         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7894                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
7895
7896         if (is_mcs_rate(ratespec)) {
7897                 uint mcs = ratespec & RSPEC_RATE_MASK;
7898                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7899                                   rspec_stc(ratespec);
7900
7901                 /*
7902                  * the payload duration calculation matches that
7903                  * of regular ofdm
7904                  */
7905                 /* 1000Ndbps = kbps * 4 */
7906                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7907                                    rspec_issgi(ratespec)) * 4;
7908
7909                 if (rspec_stc(ratespec) == 0)
7910                         nsyms =
7911                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7912                                   APHY_TAIL_NBITS) * 1000, kNdps);
7913                 else
7914                         /* STBC needs to have even number of symbols */
7915                         nsyms =
7916                             2 *
7917                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7918                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7919
7920                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7921                 nsyms += (tot_streams + 3);
7922                 /*
7923                  * 3 bytes/symbol @ legacy 6Mbps rate
7924                  * (-3) excluding service bits and tail bits
7925                  */
7926                 len = (3 * nsyms) - 3;
7927         }
7928
7929         return (u16) len;
7930 }
7931
7932 static void
7933 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7934 {
7935         const struct brcms_c_rateset *rs_dflt;
7936         struct brcms_c_rateset rs;
7937         u8 rate;
7938         u16 entry_ptr;
7939         u8 plcp[D11_PHY_HDR_LEN];
7940         u16 dur, sifs;
7941         uint i;
7942
7943         sifs = get_sifs(wlc->band);
7944
7945         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7946
7947         brcms_c_rateset_copy(rs_dflt, &rs);
7948         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7949
7950         /*
7951          * walk the phy rate table and update MAC core SHM
7952          * basic rate table entries
7953          */
7954         for (i = 0; i < rs.count; i++) {
7955                 rate = rs.rates[i] & BRCMS_RATE_MASK;
7956
7957                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7958
7959                 /* Calculate the Probe Response PLCP for the given rate */
7960                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7961
7962                 /*
7963                  * Calculate the duration of the Probe Response
7964                  * frame plus SIFS for the MAC
7965                  */
7966                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7967                                                 BRCMS_LONG_PREAMBLE, frame_len);
7968                 dur += sifs;
7969
7970                 /* Update the SHM Rate Table entry Probe Response values */
7971                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7972                               (u16) (plcp[0] + (plcp[1] << 8)));
7973                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7974                               (u16) (plcp[2] + (plcp[3] << 8)));
7975                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7976         }
7977 }
7978
7979 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
7980  *
7981  *      PLCP header is 6 bytes.
7982  *      802.11 A3 header is 24 bytes.
7983  *      Max beacon frame body template length is 112 bytes.
7984  *      Max probe resp frame body template length is 110 bytes.
7985  *
7986  *      *len on input contains the max length of the packet available.
7987  *
7988  *      The *len value is set to the number of bytes in buf used, and starts
7989  *      with the PLCP and included up to, but not including, the 4 byte FCS.
7990  */
7991 static void
7992 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7993                          u32 bcn_rspec,
7994                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7995 {
7996         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7997         struct cck_phy_hdr *plcp;
7998         struct ieee80211_mgmt *h;
7999         int hdr_len, body_len;
8000
8001         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
8002
8003         /* calc buffer size provided for frame body */
8004         body_len = *len - hdr_len;
8005         /* return actual size */
8006         *len = hdr_len + body_len;
8007
8008         /* format PHY and MAC headers */
8009         memset((char *)buf, 0, hdr_len);
8010
8011         plcp = (struct cck_phy_hdr *) buf;
8012
8013         /*
8014          * PLCP for Probe Response frames are filled in from
8015          * core's rate table
8016          */
8017         if (type == IEEE80211_STYPE_BEACON)
8018                 /* fill in PLCP */
8019                 brcms_c_compute_plcp(wlc, bcn_rspec,
8020                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
8021                                  (u8 *) plcp);
8022
8023         /* "Regular" and 16 MBSS but not for 4 MBSS */
8024         /* Update the phytxctl for the beacon based on the rspec */
8025         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
8026
8027         h = (struct ieee80211_mgmt *)&plcp[1];
8028
8029         /* fill in 802.11 header */
8030         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
8031
8032         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8033         /* A1 filled in by MAC for prb resp, broadcast for bcn */
8034         if (type == IEEE80211_STYPE_BEACON)
8035                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
8036         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
8037         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
8038
8039         /* SEQ filled in by MAC */
8040 }
8041
8042 int brcms_c_get_header_len(void)
8043 {
8044         return TXOFF;
8045 }
8046
8047 /*
8048  * Update all beacons for the system.
8049  */
8050 void brcms_c_update_beacon(struct brcms_c_info *wlc)
8051 {
8052         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8053
8054         if (bsscfg->up && !bsscfg->BSS)
8055                 /* Clear the soft intmask */
8056                 wlc->defmacintmask &= ~MI_BCNTPL;
8057 }
8058
8059 /* Write ssid into shared memory */
8060 static void
8061 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
8062 {
8063         u8 *ssidptr = cfg->SSID;
8064         u16 base = M_SSID;
8065         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
8066
8067         /* padding the ssid with zero and copy it into shm */
8068         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
8069         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
8070
8071         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
8072         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
8073 }
8074
8075 static void
8076 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
8077                               struct brcms_bss_cfg *cfg,
8078                               bool suspend)
8079 {
8080         u16 prb_resp[BCN_TMPL_LEN / 2];
8081         int len = BCN_TMPL_LEN;
8082
8083         /*
8084          * write the probe response to hardware, or save in
8085          * the config structure
8086          */
8087
8088         /* create the probe response template */
8089         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
8090                                  cfg, prb_resp, &len);
8091
8092         if (suspend)
8093                 brcms_c_suspend_mac_and_wait(wlc);
8094
8095         /* write the probe response into the template region */
8096         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
8097                                     (len + 3) & ~3, prb_resp);
8098
8099         /* write the length of the probe response frame (+PLCP/-FCS) */
8100         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
8101
8102         /* write the SSID and SSID length */
8103         brcms_c_shm_ssid_upd(wlc, cfg);
8104
8105         /*
8106          * Write PLCP headers and durations for probe response frames
8107          * at all rates. Use the actual frame length covered by the
8108          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8109          * by subtracting the PLCP len and adding the FCS.
8110          */
8111         len += (-D11_PHY_HDR_LEN + FCS_LEN);
8112         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
8113
8114         if (suspend)
8115                 brcms_c_enable_mac(wlc);
8116 }
8117
8118 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
8119 {
8120         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8121
8122         /* update AP or IBSS probe responses */
8123         if (bsscfg->up && !bsscfg->BSS)
8124                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8125 }
8126
8127 /* prepares pdu for transmission. returns BCM error codes */
8128 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8129 {
8130         uint fifo;
8131         struct d11txh *txh;
8132         struct ieee80211_hdr *h;
8133         struct scb *scb;
8134
8135         txh = (struct d11txh *) (pdu->data);
8136         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8137
8138         /* get the pkt queue info. This was put at brcms_c_sendctl or
8139          * brcms_c_send for PDU */
8140         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8141
8142         scb = NULL;
8143
8144         *fifop = fifo;
8145
8146         /* return if insufficient dma resources */
8147         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8148                 /* Mark precedences related to this FIFO, unsendable */
8149                 /* A fifo is full. Clear precedences related to that FIFO */
8150                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8151                 return -EBUSY;
8152         }
8153         return 0;
8154 }
8155
8156 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8157                            uint *blocks)
8158 {
8159         if (fifo >= NFIFO)
8160                 return -EINVAL;
8161
8162         *blocks = wlc_hw->xmtfifo_sz[fifo];
8163
8164         return 0;
8165 }
8166
8167 void
8168 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8169                   const u8 *addr)
8170 {
8171         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8172         if (match_reg_offset == RCM_BSSID_OFFSET)
8173                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8174 }
8175
8176 /*
8177  * Flag 'scan in progress' to withhold dynamic phy calibration
8178  */
8179 void brcms_c_scan_start(struct brcms_c_info *wlc)
8180 {
8181         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8182 }
8183
8184 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8185 {
8186         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8187 }
8188
8189 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8190 {
8191         wlc->pub->associated = state;
8192         wlc->bsscfg->associated = state;
8193 }
8194
8195 /*
8196  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8197  * AMPDU traffic, packets pending in hardware have to be invalidated so that
8198  * when later on hardware releases them, they can be handled appropriately.
8199  */
8200 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8201                                struct ieee80211_sta *sta,
8202                                void (*dma_callback_fn))
8203 {
8204         struct dma_pub *dmah;
8205         int i;
8206         for (i = 0; i < NFIFO; i++) {
8207                 dmah = hw->di[i];
8208                 if (dmah != NULL)
8209                         dma_walk_packets(dmah, dma_callback_fn, sta);
8210         }
8211 }
8212
8213 int brcms_c_get_curband(struct brcms_c_info *wlc)
8214 {
8215         return wlc->band->bandunit;
8216 }
8217
8218 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8219 {
8220         /* flush packet queue when requested */
8221         if (drop)
8222                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8223
8224         /* wait for queue and DMA fifos to run dry */
8225         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8226                 brcms_msleep(wlc->wl, 1);
8227 }
8228
8229 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8230 {
8231         wlc->bcn_li_bcn = interval;
8232         if (wlc->pub->up)
8233                 brcms_c_bcn_li_upd(wlc);
8234 }
8235
8236 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8237 {
8238         uint qdbm;
8239
8240         /* Remove override bit and clip to max qdbm value */
8241         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8242         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8243 }
8244
8245 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8246 {
8247         uint qdbm;
8248         bool override;
8249
8250         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8251
8252         /* Return qdbm units */
8253         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8254 }
8255
8256 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc)
8257 {
8258         wlc->mpc = mpc;
8259         brcms_c_radio_mpc_upd(wlc);
8260 }
8261
8262 /* Process received frames */
8263 /*
8264  * Return true if more frames need to be processed. false otherwise.
8265  * Param 'bound' indicates max. # frames to process before break out.
8266  */
8267 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8268 {
8269         struct d11rxhdr *rxh;
8270         struct ieee80211_hdr *h;
8271         uint len;
8272         bool is_amsdu;
8273
8274         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8275
8276         /* frame starts with rxhdr */
8277         rxh = (struct d11rxhdr *) (p->data);
8278
8279         /* strip off rxhdr */
8280         skb_pull(p, BRCMS_HWRXOFF);
8281
8282         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8283         if (rxh->RxStatus1 & RXS_PBPRES) {
8284                 if (p->len < 2) {
8285                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8286                                   "len %d\n", wlc->pub->unit, p->len);
8287                         goto toss;
8288                 }
8289                 skb_pull(p, 2);
8290         }
8291
8292         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8293         len = p->len;
8294
8295         if (rxh->RxStatus1 & RXS_FCSERR) {
8296                 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8297                         wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8298                                   " tossing\n");
8299                         goto toss;
8300                 } else {
8301                         wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8302                         goto toss;
8303                 }
8304         }
8305
8306         /* check received pkt has at least frame control field */
8307         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8308                 goto toss;
8309
8310         /* not supporting A-MSDU */
8311         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8312         if (is_amsdu)
8313                 goto toss;
8314
8315         brcms_c_recvctl(wlc, rxh, p);
8316         return;
8317
8318  toss:
8319         brcmu_pkt_buf_free_skb(p);
8320 }
8321
8322 /* Process received frames */
8323 /*
8324  * Return true if more frames need to be processed. false otherwise.
8325  * Param 'bound' indicates max. # frames to process before break out.
8326  */
8327 static bool
8328 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8329 {
8330         struct sk_buff *p;
8331         struct sk_buff *head = NULL;
8332         struct sk_buff *tail = NULL;
8333         uint n = 0;
8334         uint bound_limit = bound ? RXBND : -1;
8335
8336         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8337         /* gather received frames */
8338         while ((p = dma_rx(wlc_hw->di[fifo]))) {
8339
8340                 if (!tail)
8341                         head = tail = p;
8342                 else {
8343                         tail->prev = p;
8344                         tail = p;
8345                 }
8346
8347                 /* !give others some time to run! */
8348                 if (++n >= bound_limit)
8349                         break;
8350         }
8351
8352         /* post more rbufs */
8353         dma_rxfill(wlc_hw->di[fifo]);
8354
8355         /* process each frame */
8356         while ((p = head) != NULL) {
8357                 struct d11rxhdr_le *rxh_le;
8358                 struct d11rxhdr *rxh;
8359                 head = head->prev;
8360                 p->prev = NULL;
8361
8362                 rxh_le = (struct d11rxhdr_le *)p->data;
8363                 rxh = (struct d11rxhdr *)p->data;
8364
8365                 /* fixup rx header endianness */
8366                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8367                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8368                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8369                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8370                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8371                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8372                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8373                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8374                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8375                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8376                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8377
8378                 brcms_c_recv(wlc_hw->wlc, p);
8379         }
8380
8381         return n >= bound_limit;
8382 }
8383
8384 /* second-level interrupt processing
8385  *   Return true if another dpc needs to be re-scheduled. false otherwise.
8386  *   Param 'bounded' indicates if applicable loops should be bounded.
8387  */
8388 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8389 {
8390         u32 macintstatus;
8391         struct brcms_hardware *wlc_hw = wlc->hw;
8392         struct d11regs __iomem *regs = wlc_hw->regs;
8393         struct wiphy *wiphy = wlc->wiphy;
8394
8395         if (brcms_deviceremoved(wlc)) {
8396                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8397                           __func__);
8398                 brcms_down(wlc->wl);
8399                 return false;
8400         }
8401
8402         /* grab and clear the saved software intstatus bits */
8403         macintstatus = wlc->macintstatus;
8404         wlc->macintstatus = 0;
8405
8406         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8407                wlc_hw->unit, macintstatus);
8408
8409         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8410
8411         /* tx status */
8412         if (macintstatus & MI_TFS) {
8413                 bool fatal;
8414                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8415                         wlc->macintstatus |= MI_TFS;
8416                 if (fatal) {
8417                         wiphy_err(wiphy, "MI_TFS: fatal\n");
8418                         goto fatal;
8419                 }
8420         }
8421
8422         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8423                 brcms_c_tbtt(wlc);
8424
8425         /* ATIM window end */
8426         if (macintstatus & MI_ATIMWINEND) {
8427                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8428                 OR_REG(&regs->maccommand, wlc->qvalid);
8429                 wlc->qvalid = 0;
8430         }
8431
8432         /*
8433          * received data or control frame, MI_DMAINT is
8434          * indication of RX_FIFO interrupt
8435          */
8436         if (macintstatus & MI_DMAINT)
8437                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8438                         wlc->macintstatus |= MI_DMAINT;
8439
8440         /* noise sample collected */
8441         if (macintstatus & MI_BG_NOISE)
8442                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8443
8444         if (macintstatus & MI_GP0) {
8445                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8446                         "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8447
8448                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8449                                         __func__, wlc_hw->sih->chip,
8450                                         wlc_hw->sih->chiprev);
8451                 /* big hammer */
8452                 brcms_init(wlc->wl);
8453         }
8454
8455         /* gptimer timeout */
8456         if (macintstatus & MI_TO)
8457                 W_REG(&regs->gptimer, 0);
8458
8459         if (macintstatus & MI_RFDISABLE) {
8460                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8461                        " RF Disable Input\n", wlc_hw->unit);
8462                 brcms_rfkill_set_hw_state(wlc->wl);
8463         }
8464
8465         /* send any enq'd tx packets. Just makes sure to jump start tx */
8466         if (!pktq_empty(&wlc->pkt_queue->q))
8467                 brcms_c_send_q(wlc);
8468
8469         /* it isn't done and needs to be resched if macintstatus is non-zero */
8470         return wlc->macintstatus != 0;
8471
8472  fatal:
8473         brcms_init(wlc->wl);
8474         return wlc->macintstatus != 0;
8475 }
8476
8477 void brcms_c_init(struct brcms_c_info *wlc)
8478 {
8479         struct d11regs __iomem *regs;
8480         u16 chanspec;
8481         bool mute = false;
8482
8483         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8484
8485         regs = wlc->regs;
8486
8487         /*
8488          * This will happen if a big-hammer was executed. In
8489          * that case, we want to go back to the channel that
8490          * we were on and not new channel
8491          */
8492         if (wlc->pub->associated)
8493                 chanspec = wlc->home_chanspec;
8494         else
8495                 chanspec = brcms_c_init_chanspec(wlc);
8496
8497         brcms_b_init(wlc->hw, chanspec, mute);
8498
8499         /* update beacon listen interval */
8500         brcms_c_bcn_li_upd(wlc);
8501
8502         /* write ethernet address to core */
8503         brcms_c_set_mac(wlc->bsscfg);
8504         brcms_c_set_bssid(wlc->bsscfg);
8505
8506         /* Update tsf_cfprep if associated and up */
8507         if (wlc->pub->associated && wlc->bsscfg->up) {
8508                 u32 bi;
8509
8510                 /* get beacon period and convert to uS */
8511                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8512                 /*
8513                  * update since init path would reset
8514                  * to default value
8515                  */
8516                 W_REG(&regs->tsf_cfprep,
8517                       (bi << CFPREP_CBI_SHIFT));
8518
8519                 /* Update maccontrol PM related bits */
8520                 brcms_c_set_ps_ctrl(wlc);
8521         }
8522
8523         brcms_c_bandinit_ordered(wlc, chanspec);
8524
8525         /* init probe response timeout */
8526         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8527
8528         /* init max burst txop (framebursting) */
8529         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8530                       (wlc->
8531                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8532
8533         /* initialize maximum allowed duty cycle */
8534         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8535         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8536
8537         /*
8538          * Update some shared memory locations related to
8539          * max AMPDU size allowed to received
8540          */
8541         brcms_c_ampdu_shm_upd(wlc->ampdu);
8542
8543         /* band-specific inits */
8544         brcms_c_bsinit(wlc);
8545
8546         /* Enable EDCF mode (while the MAC is suspended) */
8547         OR_REG(&regs->ifs_ctl, IFS_USEEDCF);
8548         brcms_c_edcf_setparams(wlc, false);
8549
8550         /* Init precedence maps for empty FIFOs */
8551         brcms_c_tx_prec_map_init(wlc);
8552
8553         /* read the ucode version if we have not yet done so */
8554         if (wlc->ucode_rev == 0) {
8555                 wlc->ucode_rev =
8556                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8557                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8558         }
8559
8560         /* ..now really unleash hell (allow the MAC out of suspend) */
8561         brcms_c_enable_mac(wlc);
8562
8563         /* clear tx flow control */
8564         brcms_c_txflowcontrol_reset(wlc);
8565
8566         /* enable the RF Disable Delay timer */
8567         W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
8568
8569         /* initialize mpc delay */
8570         wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
8571
8572         /*
8573          * Initialize WME parameters; if they haven't been set by some other
8574          * mechanism (IOVar, etc) then read them from the hardware.
8575          */
8576         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8577                 /* Uninitialized; read from HW */
8578                 int ac;
8579
8580                 for (ac = 0; ac < AC_COUNT; ac++)
8581                         wlc->wme_retries[ac] =
8582                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8583         }
8584 }
8585
8586 /*
8587  * The common driver entry routine. Error codes should be unique
8588  */
8589 struct brcms_c_info *
8590 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
8591                bool piomode, void __iomem *regsva, struct pci_dev *btparam,
8592                uint *perr)
8593 {
8594         struct brcms_c_info *wlc;
8595         uint err = 0;
8596         uint i, j;
8597         struct brcms_pub *pub;
8598
8599         /* allocate struct brcms_c_info state and its substructures */
8600         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
8601         if (wlc == NULL)
8602                 goto fail;
8603         wlc->wiphy = wl->wiphy;
8604         pub = wlc->pub;
8605
8606 #if defined(BCMDBG)
8607         wlc_info_dbg = wlc;
8608 #endif
8609
8610         wlc->band = wlc->bandstate[0];
8611         wlc->core = wlc->corestate;
8612         wlc->wl = wl;
8613         pub->unit = unit;
8614         pub->_piomode = piomode;
8615         wlc->bandinit_pending = false;
8616
8617         /* populate struct brcms_c_info with default values  */
8618         brcms_c_info_init(wlc, unit);
8619
8620         /* update sta/ap related parameters */
8621         brcms_c_ap_upd(wlc);
8622
8623         /*
8624          * low level attach steps(all hw accesses go
8625          * inside, no more in rest of the attach)
8626          */
8627         err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
8628                              btparam);
8629         if (err)
8630                 goto fail;
8631
8632         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8633
8634         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8635
8636         /* disable allowed duty cycle */
8637         wlc->tx_duty_cycle_ofdm = 0;
8638         wlc->tx_duty_cycle_cck = 0;
8639
8640         brcms_c_stf_phy_chain_calc(wlc);
8641
8642         /* txchain 1: txant 0, txchain 2: txant 1 */
8643         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8644                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8645
8646         /* push to BMAC driver */
8647         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8648                                wlc->stf->hw_rxchain);
8649
8650         /* pull up some info resulting from the low attach */
8651         for (i = 0; i < NFIFO; i++)
8652                 wlc->core->txavail[i] = wlc->hw->txavail[i];
8653
8654         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8655         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8656
8657         for (j = 0; j < wlc->pub->_nbands; j++) {
8658                 wlc->band = wlc->bandstate[j];
8659
8660                 if (!brcms_c_attach_stf_ant_init(wlc)) {
8661                         err = 24;
8662                         goto fail;
8663                 }
8664
8665                 /* default contention windows size limits */
8666                 wlc->band->CWmin = APHY_CWMIN;
8667                 wlc->band->CWmax = PHY_CWMAX;
8668
8669                 /* init gmode value */
8670                 if (wlc->band->bandtype == BRCM_BAND_2G) {
8671                         wlc->band->gmode = GMODE_AUTO;
8672                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8673                                            wlc->band->gmode);
8674                 }
8675
8676                 /* init _n_enab supported mode */
8677                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8678                         pub->_n_enab = SUPPORT_11N;
8679                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8680                                                    ((pub->_n_enab ==
8681                                                      SUPPORT_11N) ? WL_11N_2x2 :
8682                                                     WL_11N_3x3));
8683                 }
8684
8685                 /* init per-band default rateset, depend on band->gmode */
8686                 brcms_default_rateset(wlc, &wlc->band->defrateset);
8687
8688                 /* fill in hw_rateset */
8689                 brcms_c_rateset_filter(&wlc->band->defrateset,
8690                                    &wlc->band->hw_rateset, false,
8691                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8692                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8693         }
8694
8695         /*
8696          * update antenna config due to
8697          * wlc->stf->txant/txchain/ant_rx_ovr change
8698          */
8699         brcms_c_stf_phy_txant_upd(wlc);
8700
8701         /* attach each modules */
8702         err = brcms_c_attach_module(wlc);
8703         if (err != 0)
8704                 goto fail;
8705
8706         if (!brcms_c_timers_init(wlc, unit)) {
8707                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8708                           __func__);
8709                 err = 32;
8710                 goto fail;
8711         }
8712
8713         /* depend on rateset, gmode */
8714         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8715         if (!wlc->cmi) {
8716                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8717                           "\n", unit, __func__);
8718                 err = 33;
8719                 goto fail;
8720         }
8721
8722         /* init default when all parameters are ready, i.e. ->rateset */
8723         brcms_c_bss_default_init(wlc);
8724
8725         /*
8726          * Complete the wlc default state initializations..
8727          */
8728
8729         /* allocate our initial queue */
8730         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8731         if (wlc->pkt_queue == NULL) {
8732                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8733                           unit, __func__);
8734                 err = 100;
8735                 goto fail;
8736         }
8737
8738         wlc->bsscfg->wlc = wlc;
8739
8740         wlc->mimoft = FT_HT;
8741         wlc->mimo_40txbw = AUTO;
8742         wlc->ofdm_40txbw = AUTO;
8743         wlc->cck_40txbw = AUTO;
8744         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8745
8746         /* Set default values of SGI */
8747         if (BRCMS_SGI_CAP_PHY(wlc)) {
8748                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8749                                                BRCMS_N_SGI_40));
8750         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8751                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8752                                                BRCMS_N_SGI_40));
8753         } else {
8754                 brcms_c_ht_update_sgi_rx(wlc, 0);
8755         }
8756
8757         /* initialize radio_mpc_disable according to wlc->mpc */
8758         brcms_c_radio_mpc_upd(wlc);
8759         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8760
8761         if (perr)
8762                 *perr = 0;
8763
8764         return wlc;
8765
8766  fail:
8767         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8768                   unit, __func__, err);
8769         if (wlc)
8770                 brcms_c_detach(wlc);
8771
8772         if (perr)
8773                 *perr = err;
8774         return NULL;
8775 }