2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <asm/unaligned.h>
34 #include <brcmu_wifi.h>
35 #include <brcmu_utils.h>
36 #include <brcm_hw_ids.h>
38 #include "sdio_host.h"
39 #include "sdio_chip.h"
41 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
45 #define BRCMF_TRAP_INFO_SIZE 80
47 #define CBUF_LEN (128)
50 __le32 buf; /* Can't be pointer on (64-bit) hosts */
53 char *_buf_compat; /* Redundant pointer for backward compat. */
58 * When there is no UART (e.g. Quickturn),
59 * the host should write a complete
60 * input line directly into cbuf and then write
61 * the length into vcons_in.
62 * This may also be used when there is a real UART
63 * (at risk of conflicting with
64 * the real UART). vcons_out is currently unused.
69 /* Output (logging) buffer
70 * Console output is written to a ring buffer log_buf at index log_idx.
71 * The host may read the output when it sees log_idx advance.
72 * Output will be lost if the output wraps around faster than the host
75 struct rte_log_le log_le;
77 /* Console input line buffer
78 * Characters are read one at a time into cbuf
79 * until <CR> is received, then
80 * the buffer is processed as a command line.
81 * Also used for virtual UART.
88 #include <chipcommon.h>
92 #include "dhd_proto.h"
95 #define TXQLEN 2048 /* bulk tx queue length */
96 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
97 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
100 #define TXRETRIES 2 /* # of retries for tx frames */
102 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
105 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
108 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
110 #define MEMBLOCK 2048 /* Block size used for downloading
112 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
113 biggest possible glom */
115 #define BRCMF_FIRSTREAD (1 << 6)
118 /* SBSDIO_DEVICE_CTL */
120 /* 1: device will assert busy signal when receiving CMD53 */
121 #define SBSDIO_DEVCTL_SETBUSY 0x01
122 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
123 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
124 /* 1: mask all interrupts to host except the chipActive (rev 8) */
125 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
126 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
127 * sdio bus power cycle to clear (rev 9) */
128 #define SBSDIO_DEVCTL_PADS_ISO 0x08
129 /* Force SD->SB reset mapping (rev 11) */
130 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
131 /* Determined by CoreControl bit */
132 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
133 /* Force backplane reset */
134 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
135 /* Force no backplane reset */
136 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
138 /* direct(mapped) cis space */
140 /* MAPPED common CIS address */
141 #define SBSDIO_CIS_BASE_COMMON 0x1000
142 /* maximum bytes in one CIS */
143 #define SBSDIO_CIS_SIZE_LIMIT 0x200
144 /* cis offset addr is < 17 bits */
145 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
147 /* manfid tuple length, include tuple, link bytes */
148 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
151 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
152 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
153 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
154 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
155 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
156 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
157 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
158 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
159 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
160 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
161 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
162 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
163 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
164 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
165 #define I_PC (1 << 10) /* descriptor error */
166 #define I_PD (1 << 11) /* data error */
167 #define I_DE (1 << 12) /* Descriptor protocol Error */
168 #define I_RU (1 << 13) /* Receive descriptor Underflow */
169 #define I_RO (1 << 14) /* Receive fifo Overflow */
170 #define I_XU (1 << 15) /* Transmit fifo Underflow */
171 #define I_RI (1 << 16) /* Receive Interrupt */
172 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
173 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
174 #define I_XI (1 << 24) /* Transmit Interrupt */
175 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
176 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
177 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
178 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
179 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
180 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
181 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
182 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
183 #define I_DMA (I_RI | I_XI | I_ERRORS)
186 #define CC_CISRDY (1 << 0) /* CIS Ready */
187 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
188 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
189 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
190 #define CC_XMTDATAAVAIL_MODE (1 << 4)
191 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
194 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
195 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
196 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
197 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
200 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
202 /* Total length of frame header for dongle protocol */
203 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
204 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
207 * Software allocation of To SB Mailbox resources
210 /* tosbmailbox bits corresponding to intstatus bits */
211 #define SMB_NAK (1 << 0) /* Frame NAK */
212 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
213 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
214 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216 /* tosbmailboxdata */
217 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
220 * Software allocation of To Host Mailbox resources
224 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
225 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
226 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
227 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229 /* tohostmailboxdata */
230 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
231 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
232 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
233 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235 #define HMB_DATA_FCDATA_MASK 0xff000000
236 #define HMB_DATA_FCDATA_SHIFT 24
238 #define HMB_DATA_VERSION_MASK 0x00ff0000
239 #define HMB_DATA_VERSION_SHIFT 16
242 * Software-defined protocol header
245 /* Current protocol version */
246 #define SDPCM_PROT_VERSION 4
248 /* SW frame header */
249 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
251 #define SDPCM_CHANNEL_MASK 0x00000f00
252 #define SDPCM_CHANNEL_SHIFT 8
253 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
255 #define SDPCM_NEXTLEN_OFFSET 2
257 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
258 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
259 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
260 #define SDPCM_DOFFSET_MASK 0xff000000
261 #define SDPCM_DOFFSET_SHIFT 24
262 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
263 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
264 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
265 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
269 /* logical channel numbers */
270 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
271 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
272 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
273 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
274 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
276 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
278 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
281 * Shared structure between dongle and the host.
282 * The structure contains pointers to trap or assert information.
284 #define SDPCM_SHARED_VERSION 0x0002
285 #define SDPCM_SHARED_VERSION_MASK 0x00FF
286 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
287 #define SDPCM_SHARED_ASSERT 0x0200
288 #define SDPCM_SHARED_TRAP 0x0400
290 /* Space for header read, limit for data packets */
291 #define MAX_HDR_READ (1 << 6)
292 #define MAX_RX_DATASZ 2048
294 /* Maximum milliseconds to wait for F2 to come up */
295 #define BRCMF_WAIT_F2RDY 3000
297 /* Bump up limit on waiting for HT to account for first startup;
298 * if the image is doing a CRC calculation before programming the PMU
299 * for HT availability, it could take a couple hundred ms more, so
300 * max out at a 1 second (1000000us).
302 #undef PMU_MAX_TRANSITION_DLY
303 #define PMU_MAX_TRANSITION_DLY 1000000
305 /* Value for ChipClockCSR during initial setup */
306 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
307 SBSDIO_ALP_AVAIL_REQ)
309 /* Flags for SDH calls */
310 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312 #define BRCMFMAC_FW_NAME "brcm/brcmfmac.bin"
313 #define BRCMFMAC_NV_NAME "brcm/brcmfmac.txt"
314 MODULE_FIRMWARE(BRCMFMAC_FW_NAME);
315 MODULE_FIRMWARE(BRCMFMAC_NV_NAME);
318 * Conversion of 802.1D priority to precedence level
320 static uint prio2prec(u32 prio)
322 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
328 u32 corecontrol; /* 0x00, rev8 */
329 u32 corestatus; /* rev8 */
331 u32 biststatus; /* rev8 */
334 u16 pcmciamesportaladdr; /* 0x010, rev8 */
336 u16 pcmciamesportalmask; /* rev8 */
338 u16 pcmciawrframebc; /* rev8 */
340 u16 pcmciaunderflowtimer; /* rev8 */
344 u32 intstatus; /* 0x020, rev8 */
345 u32 hostintmask; /* rev8 */
346 u32 intmask; /* rev8 */
347 u32 sbintstatus; /* rev8 */
348 u32 sbintmask; /* rev8 */
349 u32 funcintmask; /* rev4 */
351 u32 tosbmailbox; /* 0x040, rev8 */
352 u32 tohostmailbox; /* rev8 */
353 u32 tosbmailboxdata; /* rev8 */
354 u32 tohostmailboxdata; /* rev8 */
356 /* synchronized access to registers in SDIO clock domain */
357 u32 sdioaccess; /* 0x050, rev8 */
360 /* PCMCIA frame control */
361 u8 pcmciaframectrl; /* 0x060, rev8 */
363 u8 pcmciawatermark; /* rev8 */
366 /* interrupt batching control */
367 u32 intrcvlazy; /* 0x100, rev8 */
371 u32 cmd52rd; /* 0x110, rev8 */
372 u32 cmd52wr; /* rev8 */
373 u32 cmd53rd; /* rev8 */
374 u32 cmd53wr; /* rev8 */
375 u32 abort; /* rev8 */
376 u32 datacrcerror; /* rev8 */
377 u32 rdoutofsync; /* rev8 */
378 u32 wroutofsync; /* rev8 */
379 u32 writebusy; /* rev8 */
380 u32 readwait; /* rev8 */
381 u32 readterm; /* rev8 */
382 u32 writeterm; /* rev8 */
384 u32 clockctlstatus; /* rev8 */
387 u32 PAD[128]; /* DMA engines */
389 /* SDIO/PCMCIA CIS region */
390 char cis[512]; /* 0x400-0x5ff, rev6 */
392 /* PCMCIA function control registers */
393 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
396 /* PCMCIA backplane access */
397 u16 backplanecsr; /* 0x76E, rev6 */
398 u16 backplaneaddr0; /* rev6 */
399 u16 backplaneaddr1; /* rev6 */
400 u16 backplaneaddr2; /* rev6 */
401 u16 backplaneaddr3; /* rev6 */
402 u16 backplanedata0; /* rev6 */
403 u16 backplanedata1; /* rev6 */
404 u16 backplanedata2; /* rev6 */
405 u16 backplanedata3; /* rev6 */
408 /* sprom "size" & "blank" info */
409 u16 spromstatus; /* 0x7BE, rev2 */
416 /* Device console log buffer state */
417 struct brcmf_console {
418 uint count; /* Poll interval msec counter */
419 uint log_addr; /* Log struct address (fixed) */
420 struct rte_log_le log_le; /* Log struct (host copy) */
421 uint bufsize; /* Size of log buffer */
422 u8 *buf; /* Log buffer (host copy) */
423 uint last; /* Last buffer read index */
427 struct sdpcm_shared {
431 u32 assert_file_addr;
433 u32 console_addr; /* Address of struct rte_console */
438 struct sdpcm_shared_le {
441 __le32 assert_exp_addr;
442 __le32 assert_file_addr;
444 __le32 console_addr; /* Address of struct rte_console */
445 __le32 msgtrace_addr;
450 /* misc chip info needed by some of the routines */
451 /* Private data for SDIO bus interaction */
453 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
454 struct chip_info *ci; /* Chip info struct */
455 char *vars; /* Variables (from CIS and/or other) */
456 uint varsz; /* Size of variables buffer */
458 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
460 u32 hostintmask; /* Copy of Host Interrupt Mask */
461 u32 intstatus; /* Intstatus bits (events) pending */
462 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
463 bool fcstate; /* State of dongle flow-control */
465 uint blocksize; /* Block size of SDIO transfers */
466 uint roundup; /* Max roundup limit */
468 struct pktq txq; /* Queue length used for flow-control */
469 u8 flowcontrol; /* per prio flow control bitmask */
470 u8 tx_seq; /* Transmit sequence number (next) */
471 u8 tx_max; /* Maximum transmit sequence allowed */
473 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
474 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
475 u16 nextlen; /* Next Read Len from last header */
476 u8 rx_seq; /* Receive sequence number (expected) */
477 bool rxskip; /* Skip receive (awaiting NAK ACK) */
479 uint rxbound; /* Rx frames to read before resched */
480 uint txbound; /* Tx frames to send before resched */
483 struct sk_buff *glomd; /* Packet containing glomming descriptor */
484 struct sk_buff_head glom; /* Packet list for glommed superframe */
485 uint glomerr; /* Glom packet read errors */
487 u8 *rxbuf; /* Buffer for receiving control packets */
488 uint rxblen; /* Allocated length of rxbuf */
489 u8 *rxctl; /* Aligned pointer into rxbuf */
490 u8 *databuf; /* Buffer for receiving big glom packet */
491 u8 *dataptr; /* Aligned pointer into databuf */
492 uint rxlen; /* Length of valid data in buffer */
494 u8 sdpcm_ver; /* Bus protocol reported by dongle */
496 bool intr; /* Use interrupts */
497 bool poll; /* Use polling */
498 bool ipend; /* Device interrupt is pending */
499 uint intrcount; /* Count of device interrupt callbacks */
500 uint lastintrs; /* Count as of last watchdog timer */
501 uint spurious; /* Count of spurious interrupts */
502 uint pollrate; /* Ticks between device polls */
503 uint polltick; /* Tick counter */
504 uint pollcnt; /* Count of active polls */
507 uint console_interval;
508 struct brcmf_console console; /* Console output polling support */
509 uint console_addr; /* Console address from shared struct */
512 uint regfails; /* Count of R_REG failures */
514 uint clkstate; /* State of sd and backplane clock(s) */
515 bool activity; /* Activity flag for clock down */
516 s32 idletime; /* Control for activity timeout */
517 s32 idlecount; /* Activity timeout counter */
518 s32 idleclock; /* How to set bus driver when idle */
520 bool use_rxchain; /* If brcmf should use PKT chains */
521 bool sleeping; /* Is SDIO bus sleeping? */
522 bool rxflow_mode; /* Rx flow control mode */
523 bool rxflow; /* Is rx flow control on */
524 bool alp_only; /* Don't use HT clock (ALP only) */
525 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
528 /* Some additional counters */
529 uint tx_sderrs; /* Count of tx attempts with sd errors */
530 uint fcqueued; /* Tx packets that got queued */
531 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
532 uint rx_toolong; /* Receive frames too long to receive */
533 uint rxc_errors; /* SDIO errors when reading control frames */
534 uint rx_hdrfail; /* SDIO errors on header reads */
535 uint rx_badhdr; /* Bad received headers (roosync?) */
536 uint rx_badseq; /* Mismatched rx sequence number */
537 uint fc_rcvd; /* Number of flow-control events received */
538 uint fc_xoff; /* Number which turned on flow-control */
539 uint fc_xon; /* Number which turned off flow-control */
540 uint rxglomfail; /* Failed deglom attempts */
541 uint rxglomframes; /* Number of glom frames (superframes) */
542 uint rxglompkts; /* Number of packets from glom frames */
543 uint f2rxhdrs; /* Number of header reads */
544 uint f2rxdata; /* Number of frame data reads */
545 uint f2txdata; /* Number of f2 frame writes */
546 uint f1regdata; /* Number of f1 register accesses */
547 uint tickcnt; /* Number of watchdog been schedule */
548 unsigned long tx_ctlerrs; /* Err of sending ctrl frames */
549 unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */
550 unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */
551 unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */
552 unsigned long rx_readahead_cnt; /* Number of packets where header
553 * read-ahead was used. */
557 bool ctrl_frame_stat;
560 wait_queue_head_t ctrl_wait;
561 wait_queue_head_t dcmd_resp_wait;
563 struct timer_list timer;
564 struct completion watchdog_wait;
565 struct task_struct *watchdog_tsk;
569 struct task_struct *dpc_tsk;
570 struct completion dpc_wait;
572 struct semaphore sdsem;
574 const struct firmware *firmware;
577 bool txoff; /* Transmit flow-controlled */
583 #define CLK_PENDING 2 /* Not used yet */
587 static int qcount[NUMPRIO];
588 static int tx_packets[NUMPRIO];
591 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
593 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
595 /* Retry count for register access failures */
596 static const uint retry_limit = 2;
598 /* Limit on rounding up frames */
599 static const uint max_roundup = 512;
603 static void pkt_align(struct sk_buff *p, int len, int align)
606 datalign = (unsigned long)(p->data);
607 datalign = roundup(datalign, (align)) - datalign;
609 skb_pull(p, datalign);
613 /* To check if there's window offered */
614 static bool data_ok(struct brcmf_sdio *bus)
616 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
617 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
621 * Reads a register in the SDIO hardware block. This block occupies a series of
622 * adresses on the 32 bit backplane bus.
625 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
627 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
630 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
631 bus->ci->c_inf[idx].base + reg_offset,
633 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
634 (++(*retryvar) <= retry_limit));
636 bus->regfails += (*retryvar-1);
637 if (*retryvar > retry_limit) {
638 brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
645 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
647 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
650 brcmf_sdcard_reg_write(bus->sdiodev,
651 bus->ci->c_inf[idx].base + reg_offset,
652 sizeof(u32), regval);
653 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
654 (++(*retryvar) <= retry_limit));
656 bus->regfails += (*retryvar-1);
657 if (*retryvar > retry_limit)
658 brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
663 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
665 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
667 /* Packet free applicable unconditionally for sdio and sdspi.
668 * Conditional if bufpool was present for gspi bus.
670 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
673 brcmu_pkt_buf_free_skb(pkt);
676 /* Turn backplane clock on or off */
677 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
680 u8 clkctl, clkreq, devctl;
681 unsigned long timeout;
683 brcmf_dbg(TRACE, "Enter\n");
688 /* Request HT Avail */
690 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
692 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
693 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
695 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
699 /* Check current status */
700 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
701 SBSDIO_FUNC1_CHIPCLKCSR, &err);
703 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
707 /* Go to pending and await interrupt if appropriate */
708 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
709 /* Allow only clock-available interrupt */
710 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
712 SBSDIO_DEVICE_CTL, &err);
714 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
719 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
720 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
721 SBSDIO_DEVICE_CTL, devctl, &err);
722 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
723 bus->clkstate = CLK_PENDING;
726 } else if (bus->clkstate == CLK_PENDING) {
727 /* Cancel CA-only interrupt filter */
729 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
730 SBSDIO_DEVICE_CTL, &err);
731 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
732 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
733 SBSDIO_DEVICE_CTL, devctl, &err);
736 /* Otherwise, wait here (polling) for HT Avail */
738 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
739 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
740 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
742 SBSDIO_FUNC1_CHIPCLKCSR,
744 if (time_after(jiffies, timeout))
747 usleep_range(5000, 10000);
750 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
753 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
754 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
755 PMU_MAX_TRANSITION_DLY, clkctl);
759 /* Mark clock available */
760 bus->clkstate = CLK_AVAIL;
761 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
764 if (bus->alp_only != true) {
765 if (SBSDIO_ALPONLY(clkctl))
766 brcmf_dbg(ERROR, "HT Clock should be on\n");
768 #endif /* defined (BCMDBG) */
770 bus->activity = true;
774 if (bus->clkstate == CLK_PENDING) {
775 /* Cancel CA-only interrupt filter */
776 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
778 SBSDIO_DEVICE_CTL, &err);
779 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
780 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
781 SBSDIO_DEVICE_CTL, devctl, &err);
784 bus->clkstate = CLK_SDONLY;
785 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
786 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
787 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
789 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
797 /* Change idle/active SD state */
798 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
800 brcmf_dbg(TRACE, "Enter\n");
803 bus->clkstate = CLK_SDONLY;
805 bus->clkstate = CLK_NONE;
810 /* Transition SD and backplane clock readiness */
811 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
814 uint oldstate = bus->clkstate;
817 brcmf_dbg(TRACE, "Enter\n");
819 /* Early exit if we're already there */
820 if (bus->clkstate == target) {
821 if (target == CLK_AVAIL) {
822 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
823 bus->activity = true;
830 /* Make sure SD clock is available */
831 if (bus->clkstate == CLK_NONE)
832 brcmf_sdbrcm_sdclk(bus, true);
833 /* Now request HT Avail on the backplane */
834 brcmf_sdbrcm_htclk(bus, true, pendok);
835 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
836 bus->activity = true;
840 /* Remove HT request, or bring up SD clock */
841 if (bus->clkstate == CLK_NONE)
842 brcmf_sdbrcm_sdclk(bus, true);
843 else if (bus->clkstate == CLK_AVAIL)
844 brcmf_sdbrcm_htclk(bus, false, false);
846 brcmf_dbg(ERROR, "request for %d -> %d\n",
847 bus->clkstate, target);
848 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
852 /* Make sure to remove HT request */
853 if (bus->clkstate == CLK_AVAIL)
854 brcmf_sdbrcm_htclk(bus, false, false);
855 /* Now remove the SD clock */
856 brcmf_sdbrcm_sdclk(bus, false);
857 brcmf_sdbrcm_wd_timer(bus, 0);
861 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
867 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
871 brcmf_dbg(INFO, "request %s (currently %s)\n",
872 sleep ? "SLEEP" : "WAKE",
873 bus->sleeping ? "SLEEP" : "WAKE");
875 /* Done if we're already in the requested state */
876 if (sleep == bus->sleeping)
879 /* Going to sleep: set the alarm and turn off the lights... */
881 /* Don't sleep if something is pending */
882 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
885 /* Make sure the controller has the bus up */
886 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
888 /* Tell device to start using OOB wakeup */
889 w_sdreg32(bus, SMB_USE_OOB,
890 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
891 if (retries > retry_limit)
892 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
894 /* Turn off our contribution to the HT clock request */
895 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
897 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
898 SBSDIO_FUNC1_CHIPCLKCSR,
899 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
901 /* Isolate the bus */
902 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
904 SBSDIO_DEVCTL_PADS_ISO, NULL);
907 bus->sleeping = true;
910 /* Waking up: bus power up is ok, set local state */
912 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
913 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
915 /* Make sure the controller has the bus up */
916 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
918 /* Send misc interrupt to indicate OOB not needed */
919 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
921 if (retries <= retry_limit)
922 w_sdreg32(bus, SMB_DEV_INT,
923 offsetof(struct sdpcmd_regs, tosbmailbox),
926 if (retries > retry_limit)
927 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
929 /* Make sure we have SD bus access */
930 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
933 bus->sleeping = false;
939 static void bus_wake(struct brcmf_sdio *bus)
942 brcmf_sdbrcm_bussleep(bus, false);
945 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
952 brcmf_dbg(TRACE, "Enter\n");
954 /* Read mailbox data and ack that we did so */
955 r_sdreg32(bus, &hmb_data,
956 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
958 if (retries <= retry_limit)
959 w_sdreg32(bus, SMB_INT_ACK,
960 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
963 /* Dongle recomposed rx frames, accept them again */
964 if (hmb_data & HMB_DATA_NAKHANDLED) {
965 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
968 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
971 intstatus |= I_HMB_FRAME_IND;
975 * DEVREADY does not occur with gSPI.
977 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
979 (hmb_data & HMB_DATA_VERSION_MASK) >>
980 HMB_DATA_VERSION_SHIFT;
981 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
982 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
984 bus->sdpcm_ver, SDPCM_PROT_VERSION);
986 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
991 * Flow Control has been moved into the RX headers and this out of band
992 * method isn't used any more.
993 * remaining backward compatible with older dongles.
995 if (hmb_data & HMB_DATA_FC) {
996 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
997 HMB_DATA_FCDATA_SHIFT;
999 if (fcbits & ~bus->flowcontrol)
1002 if (bus->flowcontrol & ~fcbits)
1006 bus->flowcontrol = fcbits;
1009 /* Shouldn't be any others */
1010 if (hmb_data & ~(HMB_DATA_DEVREADY |
1011 HMB_DATA_NAKHANDLED |
1014 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1015 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1021 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1028 brcmf_dbg(ERROR, "%sterminate frame%s\n",
1029 abort ? "abort command, " : "",
1030 rtx ? ", send NAK" : "");
1033 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1035 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1036 SBSDIO_FUNC1_FRAMECTRL,
1040 /* Wait until the packet has been flushed (device/FIFO stable) */
1041 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1042 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1043 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1044 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1045 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1046 bus->f1regdata += 2;
1048 if ((hi == 0) && (lo == 0))
1051 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1052 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1053 lastrbc, (hi << 8) + lo);
1055 lastrbc = (hi << 8) + lo;
1059 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1061 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1065 w_sdreg32(bus, SMB_NAK,
1066 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1069 if (retries <= retry_limit)
1073 /* Clear partial in any case */
1076 /* If we can't reach the device, signal failure */
1077 if (err || brcmf_sdcard_regfail(bus->sdiodev))
1078 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1081 /* copy a buffer into a pkt buffer chain */
1082 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1091 skb_queue_walk(&bus->glom, p) {
1092 n = min_t(uint, p->len, len);
1093 memcpy(p->data, buf, n);
1104 /* return total length of buffer chain */
1105 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1111 skb_queue_walk(&bus->glom, p)
1116 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1118 struct sk_buff *cur, *next;
1120 skb_queue_walk_safe(&bus->glom, cur, next) {
1121 skb_unlink(cur, &bus->glom);
1122 brcmu_pkt_buf_free_skb(cur);
1126 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1132 struct sk_buff *pfirst, *pnext;
1135 u8 chan, seq, doff, sfdoff;
1139 bool usechain = bus->use_rxchain;
1141 /* If packets, issue read(s) and send up packet chain */
1142 /* Return sequence numbers consumed? */
1144 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1145 bus->glomd, skb_peek(&bus->glom));
1147 /* If there's a descriptor, generate the packet chain */
1149 pfirst = pnext = NULL;
1150 dlen = (u16) (bus->glomd->len);
1151 dptr = bus->glomd->data;
1152 if (!dlen || (dlen & 1)) {
1153 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1158 for (totlen = num = 0; dlen; num++) {
1159 /* Get (and move past) next length */
1160 sublen = get_unaligned_le16(dptr);
1161 dlen -= sizeof(u16);
1162 dptr += sizeof(u16);
1163 if ((sublen < SDPCM_HDRLEN) ||
1164 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1165 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1170 if (sublen % BRCMF_SDALIGN) {
1171 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1172 sublen, BRCMF_SDALIGN);
1177 /* For last frame, adjust read len so total
1178 is a block multiple */
1181 (roundup(totlen, bus->blocksize) - totlen);
1182 totlen = roundup(totlen, bus->blocksize);
1185 /* Allocate/chain packet for next subframe */
1186 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1187 if (pnext == NULL) {
1188 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1192 skb_queue_tail(&bus->glom, pnext);
1194 /* Adhere to start alignment requirements */
1195 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1198 /* If all allocations succeeded, save packet chain
1201 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1203 if (BRCMF_GLOM_ON() && bus->nextlen &&
1204 totlen != bus->nextlen) {
1205 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1206 bus->nextlen, totlen, rxseq);
1208 pfirst = pnext = NULL;
1210 brcmf_sdbrcm_free_glom(bus);
1214 /* Done with descriptor packet */
1215 brcmu_pkt_buf_free_skb(bus->glomd);
1220 /* Ok -- either we just generated a packet chain,
1221 or had one from before */
1222 if (!skb_queue_empty(&bus->glom)) {
1223 if (BRCMF_GLOM_ON()) {
1224 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1225 skb_queue_walk(&bus->glom, pnext) {
1226 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1227 pnext, (u8 *) (pnext->data),
1228 pnext->len, pnext->len);
1232 pfirst = skb_peek(&bus->glom);
1233 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1235 /* Do an SDIO read for the superframe. Configurable iovar to
1236 * read directly into the chained packet, or allocate a large
1237 * packet and and copy into the chain.
1240 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1241 bus->sdiodev->sbwad,
1242 SDIO_FUNC_2, F2SYNC, &bus->glom);
1243 } else if (bus->dataptr) {
1244 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1245 bus->sdiodev->sbwad,
1246 SDIO_FUNC_2, F2SYNC,
1247 bus->dataptr, dlen);
1248 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1249 if (sublen != dlen) {
1250 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1256 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1262 /* On failure, kill the superframe, allow a couple retries */
1264 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1266 bus->sdiodev->bus_if->dstats.rx_errors++;
1268 if (bus->glomerr++ < 3) {
1269 brcmf_sdbrcm_rxfail(bus, true, true);
1272 brcmf_sdbrcm_rxfail(bus, true, false);
1274 brcmf_sdbrcm_free_glom(bus);
1279 if (BRCMF_GLOM_ON()) {
1280 printk(KERN_DEBUG "SUPERFRAME:\n");
1281 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1282 pfirst->data, min_t(int, pfirst->len, 48));
1286 /* Validate the superframe header */
1287 dptr = (u8 *) (pfirst->data);
1288 sublen = get_unaligned_le16(dptr);
1289 check = get_unaligned_le16(dptr + sizeof(u16));
1291 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1292 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1293 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1294 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1295 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1299 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1300 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1303 if ((u16)~(sublen ^ check)) {
1304 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1307 } else if (roundup(sublen, bus->blocksize) != dlen) {
1308 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1309 sublen, roundup(sublen, bus->blocksize),
1312 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1313 SDPCM_GLOM_CHANNEL) {
1314 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1315 SDPCM_PACKET_CHANNEL(
1316 &dptr[SDPCM_FRAMETAG_LEN]));
1318 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1319 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1321 } else if ((doff < SDPCM_HDRLEN) ||
1322 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1323 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1324 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1328 /* Check sequence number of superframe SW header */
1330 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1336 /* Check window for sanity */
1337 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1338 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1339 txmax, bus->tx_seq);
1340 txmax = bus->tx_seq + 2;
1342 bus->tx_max = txmax;
1344 /* Remove superframe header, remember offset */
1345 skb_pull(pfirst, doff);
1349 /* Validate all the subframe headers */
1350 skb_queue_walk(&bus->glom, pnext) {
1351 /* leave when invalid subframe is found */
1355 dptr = (u8 *) (pnext->data);
1356 dlen = (u16) (pnext->len);
1357 sublen = get_unaligned_le16(dptr);
1358 check = get_unaligned_le16(dptr + sizeof(u16));
1359 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1360 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1362 if (BRCMF_GLOM_ON()) {
1363 printk(KERN_DEBUG "subframe:\n");
1364 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1369 if ((u16)~(sublen ^ check)) {
1370 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1371 num, sublen, check);
1373 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1374 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1377 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1378 (chan != SDPCM_EVENT_CHANNEL)) {
1379 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1382 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1383 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1384 num, doff, sublen, SDPCM_HDRLEN);
1387 /* increase the subframe count */
1392 /* Terminate frame on error, request
1394 if (bus->glomerr++ < 3) {
1395 /* Restore superframe header space */
1396 skb_push(pfirst, sfdoff);
1397 brcmf_sdbrcm_rxfail(bus, true, true);
1400 brcmf_sdbrcm_rxfail(bus, true, false);
1402 brcmf_sdbrcm_free_glom(bus);
1408 /* Basic SD framing looks ok - process each packet (header) */
1410 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1411 dptr = (u8 *) (pfirst->data);
1412 sublen = get_unaligned_le16(dptr);
1413 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1414 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1415 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1417 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1418 num, pfirst, pfirst->data,
1419 pfirst->len, sublen, chan, seq);
1421 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1422 chan == SDPCM_EVENT_CHANNEL */
1425 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1433 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1434 printk(KERN_DEBUG "Rx Subframe Data:\n");
1435 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1440 __skb_trim(pfirst, sublen);
1441 skb_pull(pfirst, doff);
1443 if (pfirst->len == 0) {
1444 skb_unlink(pfirst, &bus->glom);
1445 brcmu_pkt_buf_free_skb(pfirst);
1447 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1448 &ifidx, pfirst) != 0) {
1449 brcmf_dbg(ERROR, "rx protocol error\n");
1450 bus->sdiodev->bus_if->dstats.rx_errors++;
1451 skb_unlink(pfirst, &bus->glom);
1452 brcmu_pkt_buf_free_skb(pfirst);
1457 if (BRCMF_GLOM_ON()) {
1458 brcmf_dbg(GLOM, "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1459 bus->glom.qlen, pfirst, pfirst->data,
1460 pfirst->len, pfirst->next,
1462 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1464 min_t(int, pfirst->len, 32));
1468 /* sent any remaining packets up */
1469 if (bus->glom.qlen) {
1471 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1475 bus->rxglomframes++;
1476 bus->rxglompkts += bus->glom.qlen;
1481 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1484 DECLARE_WAITQUEUE(wait, current);
1485 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1487 /* Wait until control frame is available */
1488 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1489 set_current_state(TASK_INTERRUPTIBLE);
1491 while (!(*condition) && (!signal_pending(current) && timeout))
1492 timeout = schedule_timeout(timeout);
1494 if (signal_pending(current))
1497 set_current_state(TASK_RUNNING);
1498 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1503 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1505 if (waitqueue_active(&bus->dcmd_resp_wait))
1506 wake_up_interruptible(&bus->dcmd_resp_wait);
1511 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1517 brcmf_dbg(TRACE, "Enter\n");
1519 /* Set rxctl for frame (w/optional alignment) */
1520 bus->rxctl = bus->rxbuf;
1521 bus->rxctl += BRCMF_FIRSTREAD;
1522 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1524 bus->rxctl += (BRCMF_SDALIGN - pad);
1525 bus->rxctl -= BRCMF_FIRSTREAD;
1527 /* Copy the already-read portion over */
1528 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1529 if (len <= BRCMF_FIRSTREAD)
1532 /* Raise rdlen to next SDIO block to avoid tail command */
1533 rdlen = len - BRCMF_FIRSTREAD;
1534 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1535 pad = bus->blocksize - (rdlen % bus->blocksize);
1536 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1537 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1539 } else if (rdlen % BRCMF_SDALIGN) {
1540 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1543 /* Satisfy length-alignment requirements */
1544 if (rdlen & (ALIGNMENT - 1))
1545 rdlen = roundup(rdlen, ALIGNMENT);
1547 /* Drop if the read is too big or it exceeds our maximum */
1548 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1549 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1550 rdlen, bus->sdiodev->bus_if->maxctl);
1551 bus->sdiodev->bus_if->dstats.rx_errors++;
1552 brcmf_sdbrcm_rxfail(bus, false, false);
1556 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1557 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1558 len, len - doff, bus->sdiodev->bus_if->maxctl);
1559 bus->sdiodev->bus_if->dstats.rx_errors++;
1561 brcmf_sdbrcm_rxfail(bus, false, false);
1565 /* Read remainder of frame body into the rxctl buffer */
1566 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1567 bus->sdiodev->sbwad,
1569 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1572 /* Control frame failures need retransmission */
1574 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1577 brcmf_sdbrcm_rxfail(bus, true, true);
1584 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1585 printk(KERN_DEBUG "RxCtrl:\n");
1586 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
1590 /* Point to valid data and indicate its length */
1592 bus->rxlen = len - doff;
1595 /* Awake any waiters */
1596 brcmf_sdbrcm_dcmd_resp_wake(bus);
1599 /* Pad read to blocksize for efficiency */
1600 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1602 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1603 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1604 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1605 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1607 } else if (*rdlen % BRCMF_SDALIGN) {
1608 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1613 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1614 struct sk_buff **pkt, u8 **rxbuf)
1616 int sdret; /* Return code from calls */
1618 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1622 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1623 *rxbuf = (u8 *) ((*pkt)->data);
1624 /* Read the entire frame */
1625 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1626 SDIO_FUNC_2, F2SYNC, *pkt);
1630 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1632 brcmu_pkt_buf_free_skb(*pkt);
1633 bus->sdiodev->bus_if->dstats.rx_errors++;
1634 /* Force retry w/normal header read.
1635 * Don't attempt NAK for
1638 brcmf_sdbrcm_rxfail(bus, true, true);
1643 /* Checks the header */
1645 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1646 u8 rxseq, u16 nextlen, u16 *len)
1649 bool len_consistent; /* Result of comparing readahead len and
1652 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1654 /* Extract hardware header fields */
1655 *len = get_unaligned_le16(bus->rxhdr);
1656 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1658 /* All zeros means readahead info was bad */
1659 if (!(*len | check)) {
1660 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1664 /* Validate check bytes */
1665 if ((u16)~(*len ^ check)) {
1666 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1667 nextlen, *len, check);
1669 brcmf_sdbrcm_rxfail(bus, false, false);
1673 /* Validate frame length */
1674 if (*len < SDPCM_HDRLEN) {
1675 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1680 /* Check for consistency with readahead info */
1681 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1682 if (len_consistent) {
1683 /* Mismatch, force retry w/normal
1684 header (may be >4K) */
1685 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1686 nextlen, *len, roundup(*len, 16),
1688 brcmf_sdbrcm_rxfail(bus, true, true);
1695 brcmf_sdbrcm_pktfree2(bus, pkt);
1699 /* Return true if there may be more frames to read */
1701 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1703 u16 len, check; /* Extracted hardware header fields */
1704 u8 chan, seq, doff; /* Extracted software header fields */
1705 u8 fcbits; /* Extracted fcbits from software header */
1707 struct sk_buff *pkt; /* Packet for event or data frames */
1708 u16 pad; /* Number of pad bytes to read */
1709 u16 rdlen; /* Total number of bytes to read */
1710 u8 rxseq; /* Next sequence number to expect */
1711 uint rxleft = 0; /* Remaining number of frames allowed */
1712 int sdret; /* Return code from calls */
1713 u8 txmax; /* Maximum tx sequence offered */
1716 uint rxcount = 0; /* Total frames read */
1718 brcmf_dbg(TRACE, "Enter\n");
1720 /* Not finished unless we encounter no more frames indication */
1723 for (rxseq = bus->rx_seq, rxleft = maxframes;
1724 !bus->rxskip && rxleft &&
1725 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1726 rxseq++, rxleft--) {
1728 /* Handle glomming separately */
1729 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1731 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1732 bus->glomd, skb_peek(&bus->glom));
1733 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1734 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1736 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1740 /* Try doing single read if we can */
1742 u16 nextlen = bus->nextlen;
1745 rdlen = len = nextlen << 4;
1746 brcmf_pad(bus, &pad, &rdlen);
1749 * After the frame is received we have to
1750 * distinguish whether it is data
1751 * or non-data frame.
1753 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1755 /* Give up on data, request rtx of events */
1756 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1761 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1765 /* Extract software header fields */
1766 chan = SDPCM_PACKET_CHANNEL(
1767 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1768 seq = SDPCM_PACKET_SEQUENCE(
1769 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1770 doff = SDPCM_DOFFSET_VALUE(
1771 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1772 txmax = SDPCM_WINDOW_VALUE(
1773 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1776 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1777 SDPCM_NEXTLEN_OFFSET];
1778 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1779 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1784 bus->rx_readahead_cnt++;
1786 /* Handle Flow Control */
1787 fcbits = SDPCM_FCMASK_VALUE(
1788 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1790 if (bus->flowcontrol != fcbits) {
1791 if (~bus->flowcontrol & fcbits)
1794 if (bus->flowcontrol & ~fcbits)
1798 bus->flowcontrol = fcbits;
1801 /* Check and update sequence number */
1803 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1809 /* Check window for sanity */
1810 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1811 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1812 txmax, bus->tx_seq);
1813 txmax = bus->tx_seq + 2;
1815 bus->tx_max = txmax;
1818 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1819 printk(KERN_DEBUG "Rx Data:\n");
1820 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1822 } else if (BRCMF_HDRS_ON()) {
1823 printk(KERN_DEBUG "RxHdr:\n");
1824 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1825 bus->rxhdr, SDPCM_HDRLEN);
1829 if (chan == SDPCM_CONTROL_CHANNEL) {
1830 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1832 /* Force retry w/normal header read */
1834 brcmf_sdbrcm_rxfail(bus, false, true);
1835 brcmf_sdbrcm_pktfree2(bus, pkt);
1839 /* Validate data offset */
1840 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1841 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1842 doff, len, SDPCM_HDRLEN);
1843 brcmf_sdbrcm_rxfail(bus, false, false);
1844 brcmf_sdbrcm_pktfree2(bus, pkt);
1848 /* All done with this one -- now deliver the packet */
1852 /* Read frame header (hardware and software) */
1853 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1854 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1859 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1861 brcmf_sdbrcm_rxfail(bus, true, true);
1865 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
1866 printk(KERN_DEBUG "RxHdr:\n");
1867 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1868 bus->rxhdr, SDPCM_HDRLEN);
1872 /* Extract hardware header fields */
1873 len = get_unaligned_le16(bus->rxhdr);
1874 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1876 /* All zeros means no more frames */
1877 if (!(len | check)) {
1882 /* Validate check bytes */
1883 if ((u16) ~(len ^ check)) {
1884 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1887 brcmf_sdbrcm_rxfail(bus, false, false);
1891 /* Validate frame length */
1892 if (len < SDPCM_HDRLEN) {
1893 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1897 /* Extract software header fields */
1898 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1899 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1900 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1901 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1903 /* Validate data offset */
1904 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1905 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1906 doff, len, SDPCM_HDRLEN, seq);
1908 brcmf_sdbrcm_rxfail(bus, false, false);
1912 /* Save the readahead length if there is one */
1914 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1915 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1916 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1921 /* Handle Flow Control */
1922 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1924 if (bus->flowcontrol != fcbits) {
1925 if (~bus->flowcontrol & fcbits)
1928 if (bus->flowcontrol & ~fcbits)
1932 bus->flowcontrol = fcbits;
1935 /* Check and update sequence number */
1937 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1942 /* Check window for sanity */
1943 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1944 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1945 txmax, bus->tx_seq);
1946 txmax = bus->tx_seq + 2;
1948 bus->tx_max = txmax;
1950 /* Call a separate function for control frames */
1951 if (chan == SDPCM_CONTROL_CHANNEL) {
1952 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1956 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1957 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1958 SDPCM_GLOM_CHANNEL */
1960 /* Length to read */
1961 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1963 /* May pad read to blocksize for efficiency */
1964 if (bus->roundup && bus->blocksize &&
1965 (rdlen > bus->blocksize)) {
1966 pad = bus->blocksize - (rdlen % bus->blocksize);
1967 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1968 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1970 } else if (rdlen % BRCMF_SDALIGN) {
1971 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1974 /* Satisfy length-alignment requirements */
1975 if (rdlen & (ALIGNMENT - 1))
1976 rdlen = roundup(rdlen, ALIGNMENT);
1978 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1979 /* Too long -- skip this frame */
1980 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1982 bus->sdiodev->bus_if->dstats.rx_errors++;
1984 brcmf_sdbrcm_rxfail(bus, false, false);
1988 pkt = brcmu_pkt_buf_get_skb(rdlen +
1989 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1991 /* Give up on data, request rtx of events */
1992 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1994 bus->sdiodev->bus_if->dstats.rx_dropped++;
1995 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1999 /* Leave room for what we already read, and align remainder */
2000 skb_pull(pkt, BRCMF_FIRSTREAD);
2001 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
2003 /* Read the remaining frame data */
2004 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2005 SDIO_FUNC_2, F2SYNC, pkt);
2009 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
2010 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
2011 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
2013 brcmu_pkt_buf_free_skb(pkt);
2014 bus->sdiodev->bus_if->dstats.rx_errors++;
2015 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
2019 /* Copy the already-read portion */
2020 skb_push(pkt, BRCMF_FIRSTREAD);
2021 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
2024 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
2025 printk(KERN_DEBUG "Rx Data:\n");
2026 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2032 /* Save superframe descriptor and allocate packet frame */
2033 if (chan == SDPCM_GLOM_CHANNEL) {
2034 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2035 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2038 if (BRCMF_GLOM_ON()) {
2039 printk(KERN_DEBUG "Glom Data:\n");
2040 print_hex_dump_bytes("",
2045 __skb_trim(pkt, len);
2046 skb_pull(pkt, SDPCM_HDRLEN);
2049 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2050 "descriptor!\n", __func__);
2051 brcmf_sdbrcm_rxfail(bus, false, false);
2056 /* Fill in packet len and prio, deliver upward */
2057 __skb_trim(pkt, len);
2058 skb_pull(pkt, doff);
2060 if (pkt->len == 0) {
2061 brcmu_pkt_buf_free_skb(pkt);
2063 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
2065 brcmf_dbg(ERROR, "rx protocol error\n");
2066 brcmu_pkt_buf_free_skb(pkt);
2067 bus->sdiodev->bus_if->dstats.rx_errors++;
2071 /* Unlock during rx call */
2073 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
2076 rxcount = maxframes - rxleft;
2078 /* Message if we hit the limit */
2080 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2084 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2085 /* Back off rxseq if awaiting rtx, update rx_seq */
2088 bus->rx_seq = rxseq;
2094 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
2097 wait_event_interruptible_timeout(bus->ctrl_wait,
2098 (*lockvar == false), HZ * 2);
2104 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
2106 if (waitqueue_active(&bus->ctrl_wait))
2107 wake_up_interruptible(&bus->ctrl_wait);
2111 /* Writes a HW/SW header into the packet and sends it. */
2112 /* Assumes: (a) header space already there, (b) caller holds lock */
2113 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2114 uint chan, bool free_pkt)
2120 struct sk_buff *new;
2123 brcmf_dbg(TRACE, "Enter\n");
2125 frame = (u8 *) (pkt->data);
2127 /* Add alignment padding, allocate new packet if needed */
2128 pad = ((unsigned long)frame % BRCMF_SDALIGN);
2130 if (skb_headroom(pkt) < pad) {
2131 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2132 skb_headroom(pkt), pad);
2133 bus->sdiodev->bus_if->tx_realloc++;
2134 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2136 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2137 pkt->len + BRCMF_SDALIGN);
2142 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2143 memcpy(new->data, pkt->data, pkt->len);
2145 brcmu_pkt_buf_free_skb(pkt);
2146 /* free the pkt if canned one is not used */
2149 frame = (u8 *) (pkt->data);
2150 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2154 frame = (u8 *) (pkt->data);
2155 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2156 memset(frame, 0, pad + SDPCM_HDRLEN);
2159 /* precondition: pad < BRCMF_SDALIGN */
2161 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2162 len = (u16) (pkt->len);
2163 *(__le16 *) frame = cpu_to_le16(len);
2164 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2166 /* Software tag: channel, sequence number, data offset */
2168 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2170 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2172 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2173 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2176 tx_packets[pkt->priority]++;
2177 if (BRCMF_BYTES_ON() &&
2178 (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
2179 (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
2180 printk(KERN_DEBUG "Tx Frame:\n");
2181 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
2182 } else if (BRCMF_HDRS_ON()) {
2183 printk(KERN_DEBUG "TxHdr:\n");
2184 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2185 frame, min_t(u16, len, 16));
2189 /* Raise len to next SDIO block to eliminate tail command */
2190 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2191 u16 pad = bus->blocksize - (len % bus->blocksize);
2192 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2194 } else if (len % BRCMF_SDALIGN) {
2195 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2198 /* Some controllers have trouble with odd bytes -- round to even */
2199 if (len & (ALIGNMENT - 1))
2200 len = roundup(len, ALIGNMENT);
2202 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2203 SDIO_FUNC_2, F2SYNC, pkt);
2207 /* On failure, abort the command and terminate the frame */
2208 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2212 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2213 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2214 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2218 for (i = 0; i < 3; i++) {
2220 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2222 SBSDIO_FUNC1_WFRAMEBCHI,
2224 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2226 SBSDIO_FUNC1_WFRAMEBCLO,
2228 bus->f1regdata += 2;
2229 if ((hi == 0) && (lo == 0))
2235 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2238 /* restore pkt buffer pointer before calling tx complete routine */
2239 skb_pull(pkt, SDPCM_HDRLEN + pad);
2241 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2245 brcmu_pkt_buf_free_skb(pkt);
2250 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2252 struct sk_buff *pkt;
2255 int ret = 0, prec_out;
2260 brcmf_dbg(TRACE, "Enter\n");
2262 tx_prec_map = ~bus->flowcontrol;
2264 /* Send frames until the limit or some other event */
2265 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2266 spin_lock_bh(&bus->txqlock);
2267 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2269 spin_unlock_bh(&bus->txqlock);
2272 spin_unlock_bh(&bus->txqlock);
2273 datalen = pkt->len - SDPCM_HDRLEN;
2275 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2277 bus->sdiodev->bus_if->dstats.tx_errors++;
2279 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2281 /* In poll mode, need to check for other events */
2282 if (!bus->intr && cnt) {
2283 /* Check device status, signal pending interrupt */
2284 r_sdreg32(bus, &intstatus,
2285 offsetof(struct sdpcmd_regs, intstatus),
2288 if (brcmf_sdcard_regfail(bus->sdiodev))
2290 if (intstatus & bus->hostintmask)
2295 /* Deflow-control stack if needed */
2296 if (bus->sdiodev->bus_if->drvr_up &&
2297 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2298 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2300 brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF);
2306 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2308 u32 intstatus, newstatus = 0;
2310 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2311 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2312 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2313 bool rxdone = true; /* Flag for no more read data */
2314 bool resched = false; /* Flag indicating resched wanted */
2316 brcmf_dbg(TRACE, "Enter\n");
2318 /* Start with leftover status bits */
2319 intstatus = bus->intstatus;
2323 /* If waiting for HTAVAIL, check status */
2324 if (bus->clkstate == CLK_PENDING) {
2326 u8 clkctl, devctl = 0;
2329 /* Check for inconsistent device control */
2330 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2331 SBSDIO_DEVICE_CTL, &err);
2333 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2334 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2338 /* Read CSR, if clock on switch to AVAIL, else ignore */
2339 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2340 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2342 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2344 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2347 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2350 if (SBSDIO_HTAV(clkctl)) {
2351 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
2353 SBSDIO_DEVICE_CTL, &err);
2355 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2357 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2359 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2360 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2361 SBSDIO_DEVICE_CTL, devctl, &err);
2363 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2365 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2367 bus->clkstate = CLK_AVAIL;
2375 /* Make sure backplane clock is on */
2376 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2377 if (bus->clkstate == CLK_PENDING)
2380 /* Pending interrupt indicates new device status */
2383 r_sdreg32(bus, &newstatus,
2384 offsetof(struct sdpcmd_regs, intstatus), &retries);
2386 if (brcmf_sdcard_regfail(bus->sdiodev))
2388 newstatus &= bus->hostintmask;
2389 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2391 w_sdreg32(bus, newstatus,
2392 offsetof(struct sdpcmd_regs, intstatus),
2398 /* Merge new bits with previous */
2399 intstatus |= newstatus;
2402 /* Handle flow-control change: read new state in case our ack
2403 * crossed another change interrupt. If change still set, assume
2404 * FC ON for safety, let next loop through do the debounce.
2406 if (intstatus & I_HMB_FC_CHANGE) {
2407 intstatus &= ~I_HMB_FC_CHANGE;
2408 w_sdreg32(bus, I_HMB_FC_CHANGE,
2409 offsetof(struct sdpcmd_regs, intstatus), &retries);
2411 r_sdreg32(bus, &newstatus,
2412 offsetof(struct sdpcmd_regs, intstatus), &retries);
2413 bus->f1regdata += 2;
2415 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2416 intstatus |= (newstatus & bus->hostintmask);
2419 /* Handle host mailbox indication */
2420 if (intstatus & I_HMB_HOST_INT) {
2421 intstatus &= ~I_HMB_HOST_INT;
2422 intstatus |= brcmf_sdbrcm_hostmail(bus);
2425 /* Generally don't ask for these, can get CRC errors... */
2426 if (intstatus & I_WR_OOSYNC) {
2427 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2428 intstatus &= ~I_WR_OOSYNC;
2431 if (intstatus & I_RD_OOSYNC) {
2432 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2433 intstatus &= ~I_RD_OOSYNC;
2436 if (intstatus & I_SBINT) {
2437 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2438 intstatus &= ~I_SBINT;
2441 /* Would be active due to wake-wlan in gSPI */
2442 if (intstatus & I_CHIPACTIVE) {
2443 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2444 intstatus &= ~I_CHIPACTIVE;
2447 /* Ignore frame indications if rxskip is set */
2449 intstatus &= ~I_HMB_FRAME_IND;
2451 /* On frame indication, read available frames */
2452 if (PKT_AVAILABLE()) {
2453 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2454 if (rxdone || bus->rxskip)
2455 intstatus &= ~I_HMB_FRAME_IND;
2456 rxlimit -= min(framecnt, rxlimit);
2459 /* Keep still-pending events for next scheduling */
2460 bus->intstatus = intstatus;
2463 if (data_ok(bus) && bus->ctrl_frame_stat &&
2464 (bus->clkstate == CLK_AVAIL)) {
2467 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2468 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2469 (u32) bus->ctrl_frame_len);
2472 /* On failure, abort the command and
2473 terminate the frame */
2474 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2478 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2480 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2481 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2485 for (i = 0; i < 3; i++) {
2487 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2489 SBSDIO_FUNC1_WFRAMEBCHI,
2491 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2493 SBSDIO_FUNC1_WFRAMEBCLO,
2495 bus->f1regdata += 2;
2496 if ((hi == 0) && (lo == 0))
2502 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2504 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2505 bus->ctrl_frame_stat = false;
2506 brcmf_sdbrcm_wait_event_wakeup(bus);
2508 /* Send queued frames (limit 1 if rx may still be pending) */
2509 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2510 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2512 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2513 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2514 txlimit -= framecnt;
2517 /* Resched if events or tx frames are pending,
2518 else await next interrupt */
2519 /* On failed register access, all bets are off:
2520 no resched or interrupts */
2521 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) ||
2522 brcmf_sdcard_regfail(bus->sdiodev)) {
2523 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2524 brcmf_sdcard_regfail(bus->sdiodev));
2525 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2527 } else if (bus->clkstate == CLK_PENDING) {
2528 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2530 } else if (bus->intstatus || bus->ipend ||
2531 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2532 && data_ok(bus)) || PKT_AVAILABLE()) {
2536 bus->dpc_sched = resched;
2538 /* If we're done for now, turn off clock request. */
2539 if ((bus->clkstate != CLK_PENDING)
2540 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2541 bus->activity = false;
2542 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2550 static int brcmf_sdbrcm_dpc_thread(void *data)
2552 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2554 allow_signal(SIGTERM);
2555 /* Run until signal received */
2557 if (kthread_should_stop())
2559 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
2560 /* Call bus dpc unless it indicated down
2561 (then clean stop) */
2562 if (bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN) {
2563 if (brcmf_sdbrcm_dpc(bus))
2564 complete(&bus->dpc_wait);
2566 /* after stopping the bus, exit thread */
2567 brcmf_sdbrcm_bus_stop(bus->sdiodev->dev);
2568 bus->dpc_tsk = NULL;
2577 int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2581 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2582 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2583 struct brcmf_sdio *bus = sdiodev->bus;
2585 brcmf_dbg(TRACE, "Enter\n");
2589 /* Add space for the header */
2590 skb_push(pkt, SDPCM_HDRLEN);
2591 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2593 prec = prio2prec((pkt->priority & PRIOMASK));
2595 /* Check for existing queue, current flow-control,
2596 pending event, or pending clock */
2597 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2600 /* Priority based enq */
2601 spin_lock_bh(&bus->txqlock);
2602 if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) ==
2604 skb_pull(pkt, SDPCM_HDRLEN);
2605 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2606 brcmu_pkt_buf_free_skb(pkt);
2607 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2612 spin_unlock_bh(&bus->txqlock);
2614 if (pktq_len(&bus->txq) >= TXHI) {
2616 brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON);
2620 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2621 qcount[prec] = pktq_plen(&bus->txq, prec);
2623 /* Schedule DPC if needed to send queued packet(s) */
2624 if (!bus->dpc_sched) {
2625 bus->dpc_sched = true;
2627 complete(&bus->dpc_wait);
2634 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2641 /* Determine initial transfer parameters */
2642 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2643 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2644 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2648 /* Set the backplane window to include the start address */
2649 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2651 brcmf_dbg(ERROR, "window change failed\n");
2655 /* Do the transfer(s) */
2657 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2658 write ? "write" : "read", dsize,
2659 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2660 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2661 sdaddr, data, dsize);
2663 brcmf_dbg(ERROR, "membytes transfer failed\n");
2667 /* Adjust for next transfer (if any) */
2672 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2675 brcmf_dbg(ERROR, "window change failed\n");
2679 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2684 /* Return the window to backplane enumeration space for core access */
2685 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2686 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2687 bus->sdiodev->sbwad);
2693 #define CONSOLE_LINE_MAX 192
2695 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2697 struct brcmf_console *c = &bus->console;
2698 u8 line[CONSOLE_LINE_MAX], ch;
2702 /* Don't do anything until FWREADY updates console address */
2703 if (bus->console_addr == 0)
2706 /* Read console log struct */
2707 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2708 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2713 /* Allocate console buffer (one time only) */
2714 if (c->buf == NULL) {
2715 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2716 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2721 idx = le32_to_cpu(c->log_le.idx);
2723 /* Protect against corrupt value */
2724 if (idx > c->bufsize)
2727 /* Skip reading the console buffer if the index pointer
2732 /* Read the console buffer */
2733 addr = le32_to_cpu(c->log_le.buf);
2734 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2738 while (c->last != idx) {
2739 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2740 if (c->last == idx) {
2741 /* This would output a partial line.
2743 * the buffer pointer and output this
2744 * line next time around.
2749 c->last = c->bufsize - n;
2752 ch = c->buf[c->last];
2753 c->last = (c->last + 1) % c->bufsize;
2760 if (line[n - 1] == '\r')
2763 printk(KERN_DEBUG "CONSOLE: %s\n", line);
2772 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2777 bus->ctrl_frame_stat = false;
2778 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2779 SDIO_FUNC_2, F2SYNC, frame, len);
2782 /* On failure, abort the command and terminate the frame */
2783 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2787 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2789 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2790 SBSDIO_FUNC1_FRAMECTRL,
2794 for (i = 0; i < 3; i++) {
2796 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2797 SBSDIO_FUNC1_WFRAMEBCHI,
2799 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2800 SBSDIO_FUNC1_WFRAMEBCLO,
2802 bus->f1regdata += 2;
2803 if (hi == 0 && lo == 0)
2809 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2815 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2823 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2824 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2825 struct brcmf_sdio *bus = sdiodev->bus;
2827 brcmf_dbg(TRACE, "Enter\n");
2829 /* Back the pointer to make a room for bus header */
2830 frame = msg - SDPCM_HDRLEN;
2831 len = (msglen += SDPCM_HDRLEN);
2833 /* Add alignment padding (optional for ctl frames) */
2834 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2839 memset(frame, 0, doff + SDPCM_HDRLEN);
2841 /* precondition: doff < BRCMF_SDALIGN */
2842 doff += SDPCM_HDRLEN;
2844 /* Round send length to next SDIO block */
2845 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2846 u16 pad = bus->blocksize - (len % bus->blocksize);
2847 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2849 } else if (len % BRCMF_SDALIGN) {
2850 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2853 /* Satisfy length-alignment requirements */
2854 if (len & (ALIGNMENT - 1))
2855 len = roundup(len, ALIGNMENT);
2857 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2859 /* Need to lock here to protect txseq and SDIO tx calls */
2864 /* Make sure backplane clock is on */
2865 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2867 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2868 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2869 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2871 /* Software tag: channel, sequence number, data offset */
2873 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2875 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2876 SDPCM_DOFFSET_MASK);
2877 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2878 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2880 if (!data_ok(bus)) {
2881 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2882 bus->tx_max, bus->tx_seq);
2883 bus->ctrl_frame_stat = true;
2885 bus->ctrl_frame_buf = frame;
2886 bus->ctrl_frame_len = len;
2888 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2890 if (bus->ctrl_frame_stat == false) {
2891 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2894 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2901 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
2902 printk(KERN_DEBUG "Tx Frame:\n");
2903 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2905 } else if (BRCMF_HDRS_ON()) {
2906 printk(KERN_DEBUG "TxHdr:\n");
2907 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2908 frame, min_t(u16, len, 16));
2913 ret = brcmf_tx_frame(bus, frame, len);
2914 } while (ret < 0 && retries++ < TXRETRIES);
2917 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2918 bus->activity = false;
2919 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2929 return ret ? -EIO : 0;
2933 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
2938 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2939 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2940 struct brcmf_sdio *bus = sdiodev->bus;
2942 brcmf_dbg(TRACE, "Enter\n");
2944 /* Wait until control frame is available */
2945 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2949 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2954 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2956 } else if (timeleft == 0) {
2957 brcmf_dbg(ERROR, "resumed on timeout\n");
2958 } else if (pending == true) {
2959 brcmf_dbg(CTL, "cancelled\n");
2960 return -ERESTARTSYS;
2962 brcmf_dbg(CTL, "resumed for unknown reason?\n");
2970 return rxlen ? (int)rxlen : -ETIMEDOUT;
2973 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
2977 brcmf_dbg(TRACE, "Enter\n");
2979 /* Basic sanity checks */
2980 if (bus->sdiodev->bus_if->drvr_up) {
2981 bcmerror = -EISCONN;
2985 bcmerror = -EOVERFLOW;
2989 /* Free the old ones and replace with passed variables */
2992 bus->vars = kmalloc(len, GFP_ATOMIC);
2993 bus->varsz = bus->vars ? len : 0;
2994 if (bus->vars == NULL) {
2999 /* Copy the passed variables, which should include the
3000 terminating double-null */
3001 memcpy(bus->vars, arg, bus->varsz);
3006 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3015 char *nvram_ularray;
3018 /* Even if there are no vars are to be written, we still
3019 need to set the ramsize. */
3020 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3021 varaddr = (bus->ramsize - 4) - varsize;
3024 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3028 memcpy(vbuffer, bus->vars, bus->varsz);
3030 /* Write the vars list */
3032 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3034 /* Verify NVRAM bytes */
3035 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3036 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3040 /* Upload image to verify downloaded contents. */
3041 memset(nvram_ularray, 0xaa, varsize);
3043 /* Read the vars list to temp buffer for comparison */
3045 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3048 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3049 bcmerror, varsize, varaddr);
3051 /* Compare the org NVRAM with the one read from RAM */
3052 if (memcmp(vbuffer, nvram_ularray, varsize))
3053 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3055 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3057 kfree(nvram_ularray);
3063 /* adjust to the user specified RAM */
3064 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3065 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3067 varsize = ((bus->ramsize - 4) - varaddr);
3070 * Determine the length token:
3071 * Varsize, converted to words, in lower 16-bits, checksum
3076 varsizew_le = cpu_to_le32(0);
3078 varsizew = varsize / 4;
3079 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3080 varsizew_le = cpu_to_le32(varsizew);
3083 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3086 /* Write the length token to the last word */
3087 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3088 (u8 *)&varsizew_le, 4);
3093 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3097 struct chip_info *ci = bus->ci;
3099 /* To enter download state, disable ARM and reset SOCRAM.
3100 * To exit download state, simply reset ARM (default is RAM boot).
3103 bus->alp_only = true;
3105 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3107 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3109 /* Clear the top bit of memory */
3112 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3116 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3117 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3122 bcmerror = brcmf_sdbrcm_write_vars(bus);
3124 brcmf_dbg(ERROR, "no vars written to RAM\n");
3128 w_sdreg32(bus, 0xFFFFFFFF,
3129 offsetof(struct sdpcmd_regs, intstatus), &retries);
3131 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3133 /* Allow HT Clock now that the ARM is running. */
3134 bus->alp_only = false;
3136 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3142 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3144 if (bus->firmware->size < bus->fw_ptr + len)
3145 len = bus->firmware->size - bus->fw_ptr;
3147 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3152 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3156 u8 *memblock = NULL, *memptr;
3159 brcmf_dbg(INFO, "Enter\n");
3161 ret = request_firmware(&bus->firmware, BRCMFMAC_FW_NAME,
3162 &bus->sdiodev->func[2]->dev);
3164 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3169 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3170 if (memblock == NULL) {
3174 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3175 memptr += (BRCMF_SDALIGN -
3176 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3178 /* Download image */
3180 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3181 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3183 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3184 ret, MEMBLOCK, offset);
3194 release_firmware(bus->firmware);
3201 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3202 * and ending in a NUL.
3203 * Removes carriage returns, empty lines, comment lines, and converts
3205 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3209 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3218 findNewline = false;
3221 for (n = 0; n < len; n++) {
3224 if (varbuf[n] == '\r')
3226 if (findNewline && varbuf[n] != '\n')
3228 findNewline = false;
3229 if (varbuf[n] == '#') {
3233 if (varbuf[n] == '\n') {
3243 buf_len = dp - varbuf;
3245 while (dp < varbuf + n)
3251 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3254 char *memblock = NULL;
3258 ret = request_firmware(&bus->firmware, BRCMFMAC_NV_NAME,
3259 &bus->sdiodev->func[2]->dev);
3261 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3266 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3267 if (memblock == NULL) {
3272 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3274 if (len > 0 && len < MEMBLOCK) {
3275 bufp = (char *)memblock;
3277 len = brcmf_process_nvram_vars(bufp, len);
3281 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3283 brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3285 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3292 release_firmware(bus->firmware);
3298 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3302 /* Keep arm in reset */
3303 if (brcmf_sdbrcm_download_state(bus, true)) {
3304 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3308 /* External image takes precedence if specified */
3309 if (brcmf_sdbrcm_download_code_file(bus)) {
3310 brcmf_dbg(ERROR, "dongle image file download failed\n");
3314 /* External nvram takes precedence if specified */
3315 if (brcmf_sdbrcm_download_nvram(bus))
3316 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3318 /* Take arm out of reset */
3319 if (brcmf_sdbrcm_download_state(bus, false)) {
3320 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3331 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3335 /* Download the firmware */
3336 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3338 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3340 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3345 void brcmf_sdbrcm_bus_stop(struct device *dev)
3347 u32 local_hostintmask;
3351 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3352 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
3353 struct brcmf_sdio *bus = sdiodev->bus;
3355 brcmf_dbg(TRACE, "Enter\n");
3357 if (bus->watchdog_tsk) {
3358 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3359 kthread_stop(bus->watchdog_tsk);
3360 bus->watchdog_tsk = NULL;
3363 if (bus->dpc_tsk && bus->dpc_tsk != current) {
3364 send_sig(SIGTERM, bus->dpc_tsk, 1);
3365 kthread_stop(bus->dpc_tsk);
3366 bus->dpc_tsk = NULL;
3373 /* Enable clock for device interrupts */
3374 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3376 /* Disable and clear interrupts at the chip level also */
3377 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3378 local_hostintmask = bus->hostintmask;
3379 bus->hostintmask = 0;
3381 /* Change our idea of bus state */
3382 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3384 /* Force clocks on backplane to be sure F2 interrupt propagates */
3385 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3386 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3388 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3389 SBSDIO_FUNC1_CHIPCLKCSR,
3390 (saveclk | SBSDIO_FORCE_HT), &err);
3393 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3395 /* Turn off the bus (F2), free any pending packets */
3396 brcmf_dbg(INTR, "disable SDIO interrupts\n");
3397 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3398 SDIO_FUNC_ENABLE_1, NULL);
3400 /* Clear any pending interrupts now that F2 is disabled */
3401 w_sdreg32(bus, local_hostintmask,
3402 offsetof(struct sdpcmd_regs, intstatus), &retries);
3404 /* Turn off the backplane clock (only) */
3405 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3407 /* Clear the data packet queues */
3408 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3410 /* Clear any held glomming stuff */
3412 brcmu_pkt_buf_free_skb(bus->glomd);
3413 brcmf_sdbrcm_free_glom(bus);
3415 /* Clear rx control and wake any waiters */
3417 brcmf_sdbrcm_dcmd_resp_wake(bus);
3419 /* Reset some F2 state stuff */
3420 bus->rxskip = false;
3421 bus->tx_seq = bus->rx_seq = 0;
3426 int brcmf_sdbrcm_bus_init(struct device *dev)
3428 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3429 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
3430 struct brcmf_sdio *bus = sdiodev->bus;
3431 unsigned long timeout;
3437 brcmf_dbg(TRACE, "Enter\n");
3439 /* try to download image and nvram to the dongle */
3440 if (bus_if->state == BRCMF_BUS_DOWN) {
3441 if (!(brcmf_sdbrcm_download_firmware(bus)))
3445 if (!bus->sdiodev->bus_if->drvr)
3448 /* Start the watchdog timer */
3450 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3454 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3455 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3456 if (bus->clkstate != CLK_AVAIL)
3459 /* Force clocks on backplane to be sure F2 interrupt propagates */
3461 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3462 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3464 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3465 SBSDIO_FUNC1_CHIPCLKCSR,
3466 (saveclk | SBSDIO_FORCE_HT), &err);
3469 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3473 /* Enable function 2 (frame transfers) */
3474 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3475 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3476 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3478 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3481 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3483 while (enable != ready) {
3484 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3485 SDIO_CCCR_IORx, NULL);
3486 if (time_after(jiffies, timeout))
3488 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3489 /* prevent busy waiting if it takes too long */
3490 msleep_interruptible(20);
3493 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3495 /* If F2 successfully enabled, set core and enable interrupts */
3496 if (ready == enable) {
3497 /* Set up the interrupt mask and enable interrupts */
3498 bus->hostintmask = HOSTINTMASK;
3499 w_sdreg32(bus, bus->hostintmask,
3500 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3502 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3503 SBSDIO_WATERMARK, 8, &err);
3505 /* Set bus state according to enable result */
3506 bus_if->state = BRCMF_BUS_DATA;
3510 /* Disable F2 again */
3511 enable = SDIO_FUNC_ENABLE_1;
3512 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3513 SDIO_CCCR_IOEx, enable, NULL);
3516 /* Restore previous clock setting */
3517 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3518 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3520 /* If we didn't come up, turn off backplane clock */
3521 if (bus_if->state != BRCMF_BUS_DATA)
3522 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3530 void brcmf_sdbrcm_isr(void *arg)
3532 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3534 brcmf_dbg(TRACE, "Enter\n");
3537 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3541 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3542 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3545 /* Count the interrupt call */
3549 /* Shouldn't get this interrupt if we're sleeping? */
3550 if (bus->sleeping) {
3551 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3555 /* Disable additional interrupts (is this needed now)? */
3557 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3559 bus->dpc_sched = true;
3561 complete(&bus->dpc_wait);
3564 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3567 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3570 brcmf_dbg(TIMER, "Enter\n");
3572 /* Ignore the timer if simulating bus down */
3578 /* Poll period: check device if appropriate. */
3579 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3582 /* Reset poll tick */
3585 /* Check device if no interrupts */
3586 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3588 if (!bus->dpc_sched) {
3590 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
3591 SDIO_FUNC_0, SDIO_CCCR_INTx,
3594 devpend & (INTR_STATUS_FUNC1 |
3598 /* If there is something, make like the ISR and
3604 bus->dpc_sched = true;
3606 complete(&bus->dpc_wait);
3610 /* Update interrupt tracking */
3611 bus->lastintrs = bus->intrcount;
3614 /* Poll for console output periodically */
3615 if (bus_if->state == BRCMF_BUS_DATA &&
3616 bus->console_interval != 0) {
3617 bus->console.count += BRCMF_WD_POLL_MS;
3618 if (bus->console.count >= bus->console_interval) {
3619 bus->console.count -= bus->console_interval;
3620 /* Make sure backplane clock is on */
3621 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3622 if (brcmf_sdbrcm_readconsole(bus) < 0)
3624 bus->console_interval = 0;
3629 /* On idle timeout clear activity flag and/or turn off clock */
3630 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3631 if (++bus->idlecount >= bus->idletime) {
3633 if (bus->activity) {
3634 bus->activity = false;
3635 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3637 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3647 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3649 if (chipid == BCM4329_CHIP_ID)
3651 if (chipid == BCM4330_CHIP_ID)
3656 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3658 brcmf_dbg(TRACE, "Enter\n");
3661 bus->rxctl = bus->rxbuf = NULL;
3664 kfree(bus->databuf);
3665 bus->databuf = NULL;
3668 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3670 brcmf_dbg(TRACE, "Enter\n");
3672 if (bus->sdiodev->bus_if->maxctl) {
3674 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3675 ALIGNMENT) + BRCMF_SDALIGN;
3676 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3681 /* Allocate buffer to receive glomed packet */
3682 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3683 if (!(bus->databuf)) {
3684 /* release rxbuf which was already located as above */
3690 /* Align the buffer */
3691 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3692 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3693 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3695 bus->dataptr = bus->databuf;
3704 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3712 bus->alp_only = true;
3714 /* Return the window to backplane enumeration space for core access */
3715 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3716 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3719 printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
3720 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
3725 * Force PLL off until brcmf_sdio_chip_attach()
3726 * programs PLL control regs
3729 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3730 SBSDIO_FUNC1_CHIPCLKCSR,
3731 BRCMF_INIT_CLKCTL1, &err);
3734 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3735 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3737 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3738 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3739 err, BRCMF_INIT_CLKCTL1, clkctl);
3743 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3744 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3748 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3749 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3753 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3754 SDIO_DRIVE_STRENGTH);
3756 /* Get info on the SOCRAM cores... */
3757 bus->ramsize = bus->ci->ramsize;
3758 if (!(bus->ramsize)) {
3759 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3763 /* Set core control so an SDIO reset does a backplane reset */
3764 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3765 reg_addr = bus->ci->c_inf[idx].base +
3766 offsetof(struct sdpcmd_regs, corecontrol);
3767 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
3768 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
3769 reg_val | CC_BPRESEN);
3771 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3773 /* Locate an appropriately-aligned portion of hdrbuf */
3774 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3777 /* Set the poll and/or interrupt flags */
3789 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3791 brcmf_dbg(TRACE, "Enter\n");
3793 /* Disable F2 to clear any intermediate frame state on the dongle */
3794 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3795 SDIO_FUNC_ENABLE_1, NULL);
3797 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3798 bus->sleeping = false;
3799 bus->rxflow = false;
3801 /* Done with backplane-dependent accesses, can drop clock... */
3802 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3803 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3805 /* ...and initialize clock/power states */
3806 bus->clkstate = CLK_SDONLY;
3807 bus->idletime = BRCMF_IDLE_INTERVAL;
3808 bus->idleclock = BRCMF_IDLE_ACTIVE;
3810 /* Query the F2 block size, set roundup accordingly */
3811 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3812 bus->roundup = min(max_roundup, bus->blocksize);
3814 /* bus module does not support packet chaining */
3815 bus->use_rxchain = false;
3816 bus->sd_rxchain = false;
3822 brcmf_sdbrcm_watchdog_thread(void *data)
3824 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3826 allow_signal(SIGTERM);
3827 /* Run until signal received */
3829 if (kthread_should_stop())
3831 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3832 brcmf_sdbrcm_bus_watchdog(bus);
3833 /* Count the tick for reference */
3842 brcmf_sdbrcm_watchdog(unsigned long data)
3844 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3846 if (bus->watchdog_tsk) {
3847 complete(&bus->watchdog_wait);
3848 /* Reschedule the watchdog */
3849 if (bus->wd_timer_valid)
3850 mod_timer(&bus->timer,
3851 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3855 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3857 brcmf_dbg(TRACE, "Enter\n");
3860 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3861 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3862 brcmf_sdio_chip_detach(&bus->ci);
3863 if (bus->vars && bus->varsz)
3868 brcmf_dbg(TRACE, "Disconnected\n");
3871 /* Detach and free everything */
3872 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3874 brcmf_dbg(TRACE, "Enter\n");
3877 /* De-register interrupt handler */
3878 brcmf_sdcard_intr_dereg(bus->sdiodev);
3880 if (bus->sdiodev->bus_if->drvr) {
3881 brcmf_detach(bus->sdiodev->dev);
3882 brcmf_sdbrcm_release_dongle(bus);
3885 brcmf_sdbrcm_release_malloc(bus);
3890 brcmf_dbg(TRACE, "Disconnected\n");
3893 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3896 struct brcmf_sdio *bus;
3898 brcmf_dbg(TRACE, "Enter\n");
3900 /* We make an assumption about address window mappings:
3901 * regsva == SI_ENUM_BASE*/
3903 /* Allocate private bus interface state */
3904 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3908 bus->sdiodev = sdiodev;
3910 skb_queue_head_init(&bus->glom);
3911 bus->txbound = BRCMF_TXBOUND;
3912 bus->rxbound = BRCMF_RXBOUND;
3913 bus->txminmax = BRCMF_TXMINMAX;
3914 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3915 bus->usebufpool = false; /* Use bufpool if allocated,
3916 else use locally malloced rxbuf */
3918 /* attempt to attach to the dongle */
3919 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3920 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3924 spin_lock_init(&bus->txqlock);
3925 init_waitqueue_head(&bus->ctrl_wait);
3926 init_waitqueue_head(&bus->dcmd_resp_wait);
3928 /* Set up the watchdog timer */
3929 init_timer(&bus->timer);
3930 bus->timer.data = (unsigned long)bus;
3931 bus->timer.function = brcmf_sdbrcm_watchdog;
3933 /* Initialize thread based operation and lock */
3934 sema_init(&bus->sdsem, 1);
3936 /* Initialize watchdog thread */
3937 init_completion(&bus->watchdog_wait);
3938 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3939 bus, "brcmf_watchdog");
3940 if (IS_ERR(bus->watchdog_tsk)) {
3942 "brcmf_watchdog thread failed to start\n");
3943 bus->watchdog_tsk = NULL;
3945 /* Initialize DPC thread */
3946 init_completion(&bus->dpc_wait);
3947 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3949 if (IS_ERR(bus->dpc_tsk)) {
3951 "brcmf_dpc thread failed to start\n");
3952 bus->dpc_tsk = NULL;
3955 /* Attach to the brcmf/OS/network interface */
3956 ret = brcmf_attach(bus, SDPCM_RESERVE, bus->sdiodev->dev);
3958 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3962 /* Allocate buffers */
3963 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3964 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3968 if (!(brcmf_sdbrcm_probe_init(bus))) {
3969 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3973 /* Register interrupt callback, but mask it (not operational yet). */
3974 brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
3975 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
3977 brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
3980 brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
3982 brcmf_dbg(INFO, "completed!!\n");
3984 /* if firmware path present try to download and bring up bus */
3985 ret = brcmf_bus_start(bus->sdiodev->dev);
3987 if (ret == -ENOLINK) {
3988 brcmf_dbg(ERROR, "dongle is not responding\n");
3993 /* add interface and open for business */
3994 if (brcmf_add_if(bus->sdiodev->dev, 0, "wlan%d", NULL)) {
3995 brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
4002 brcmf_sdbrcm_release(bus);
4006 void brcmf_sdbrcm_disconnect(void *ptr)
4008 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4010 brcmf_dbg(TRACE, "Enter\n");
4013 brcmf_sdbrcm_release(bus);
4015 brcmf_dbg(TRACE, "Disconnected\n");
4019 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4021 /* Totally stop the timer */
4022 if (!wdtick && bus->wd_timer_valid == true) {
4023 del_timer_sync(&bus->timer);
4024 bus->wd_timer_valid = false;
4025 bus->save_ms = wdtick;
4029 /* don't start the wd until fw is loaded */
4030 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4034 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4035 if (bus->wd_timer_valid == true)
4036 /* Stop timer and restart at new value */
4037 del_timer_sync(&bus->timer);
4039 /* Create timer again when watchdog period is
4040 dynamically changed or in the first instance
4042 bus->timer.expires =
4043 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4044 add_timer(&bus->timer);
4047 /* Re arm the timer, at last watchdog period */
4048 mod_timer(&bus->timer,
4049 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4052 bus->wd_timer_valid = true;
4053 bus->save_ms = wdtick;